2 * AD5933 AD5934 Impedance Converter, Network Analyzer
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/sysfs.h>
13 #include <linux/i2c.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/types.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/kfifo_buf.h>
25 /* AD5933/AD5934 Registers */
26 #define AD5933_REG_CONTROL_HB 0x80 /* R/W, 1 byte */
27 #define AD5933_REG_CONTROL_LB 0x81 /* R/W, 1 byte */
28 #define AD5933_REG_FREQ_START 0x82 /* R/W, 3 bytes */
29 #define AD5933_REG_FREQ_INC 0x85 /* R/W, 3 bytes */
30 #define AD5933_REG_INC_NUM 0x88 /* R/W, 2 bytes, 9 bit */
31 #define AD5933_REG_SETTLING_CYCLES 0x8A /* R/W, 2 bytes */
32 #define AD5933_REG_STATUS 0x8F /* R, 1 byte */
33 #define AD5933_REG_TEMP_DATA 0x92 /* R, 2 bytes*/
34 #define AD5933_REG_REAL_DATA 0x94 /* R, 2 bytes*/
35 #define AD5933_REG_IMAG_DATA 0x96 /* R, 2 bytes*/
37 /* AD5933_REG_CONTROL_HB Bits */
38 #define AD5933_CTRL_INIT_START_FREQ (0x1 << 4)
39 #define AD5933_CTRL_START_SWEEP (0x2 << 4)
40 #define AD5933_CTRL_INC_FREQ (0x3 << 4)
41 #define AD5933_CTRL_REPEAT_FREQ (0x4 << 4)
42 #define AD5933_CTRL_MEASURE_TEMP (0x9 << 4)
43 #define AD5933_CTRL_POWER_DOWN (0xA << 4)
44 #define AD5933_CTRL_STANDBY (0xB << 4)
46 #define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1)
47 #define AD5933_CTRL_RANGE_200mVpp (0x1 << 1)
48 #define AD5933_CTRL_RANGE_400mVpp (0x2 << 1)
49 #define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1)
50 #define AD5933_CTRL_RANGE(x) ((x) << 1)
52 #define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0)
53 #define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0)
55 /* AD5933_REG_CONTROL_LB Bits */
56 #define AD5933_CTRL_RESET (0x1 << 4)
57 #define AD5933_CTRL_INT_SYSCLK (0x0 << 3)
58 #define AD5933_CTRL_EXT_SYSCLK (0x1 << 3)
60 /* AD5933_REG_STATUS Bits */
61 #define AD5933_STAT_TEMP_VALID (0x1 << 0)
62 #define AD5933_STAT_DATA_VALID (0x1 << 1)
63 #define AD5933_STAT_SWEEP_DONE (0x1 << 2)
65 /* I2C Block Commands */
66 #define AD5933_I2C_BLOCK_WRITE 0xA0
67 #define AD5933_I2C_BLOCK_READ 0xA1
68 #define AD5933_I2C_ADDR_POINTER 0xB0
71 #define AD5933_INT_OSC_FREQ_Hz 16776000
72 #define AD5933_MAX_OUTPUT_FREQ_Hz 100000
73 #define AD5933_MAX_RETRIES 100
75 #define AD5933_OUT_RANGE 1
76 #define AD5933_OUT_RANGE_AVAIL 2
77 #define AD5933_OUT_SETTLING_CYCLES 3
78 #define AD5933_IN_PGA_GAIN 4
79 #define AD5933_IN_PGA_GAIN_AVAIL 5
80 #define AD5933_FREQ_POINTS 6
82 #define AD5933_POLL_TIME_ms 10
83 #define AD5933_INIT_EXCITATION_TIME_ms 100
86 * struct ad5933_platform_data - platform specific data
87 * @ext_clk_Hz: the external clock frequency in Hz, if not set
88 * the driver uses the internal clock (16.776 MHz)
89 * @vref_mv: the external reference voltage in millivolt
92 struct ad5933_platform_data {
93 unsigned long ext_clk_Hz;
94 unsigned short vref_mv;
98 struct i2c_client *client;
99 struct regulator *reg;
100 struct delayed_work work;
101 struct mutex lock; /* Protect sensor state */
102 unsigned long mclk_hz;
103 unsigned char ctrl_hb;
104 unsigned char ctrl_lb;
105 unsigned int range_avail[4];
106 unsigned short vref_mv;
107 unsigned short settling_cycles;
108 unsigned short freq_points;
109 unsigned int freq_start;
110 unsigned int freq_inc;
112 unsigned int poll_time_jiffies;
115 static struct ad5933_platform_data ad5933_default_pdata = {
119 static const struct iio_chan_spec ad5933_channels[] = {
124 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
125 BIT(IIO_CHAN_INFO_SCALE),
126 .address = AD5933_REG_TEMP_DATA,
133 }, { /* Ring Channels */
137 .extend_name = "real",
138 .address = AD5933_REG_REAL_DATA,
149 .extend_name = "imag",
150 .address = AD5933_REG_IMAG_DATA,
160 static int ad5933_i2c_write(struct i2c_client *client, u8 reg, u8 len, u8 *data)
165 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
167 dev_err(&client->dev, "I2C write error\n");
174 static int ad5933_i2c_read(struct i2c_client *client, u8 reg, u8 len, u8 *data)
179 ret = i2c_smbus_read_byte_data(client, reg++);
181 dev_err(&client->dev, "I2C read error\n");
189 static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
191 unsigned char dat = st->ctrl_hb | cmd;
193 return ad5933_i2c_write(st->client,
194 AD5933_REG_CONTROL_HB, 1, &dat);
197 static int ad5933_reset(struct ad5933_state *st)
199 unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
201 return ad5933_i2c_write(st->client,
202 AD5933_REG_CONTROL_LB, 1, &dat);
205 static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
207 unsigned char val, timeout = AD5933_MAX_RETRIES;
211 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
223 static int ad5933_set_freq(struct ad5933_state *st,
224 unsigned int reg, unsigned long freq)
226 unsigned long long freqreg;
232 freqreg = (u64) freq * (u64) (1 << 27);
233 do_div(freqreg, st->mclk_hz / 4);
236 case AD5933_REG_FREQ_START:
237 st->freq_start = freq;
239 case AD5933_REG_FREQ_INC:
246 dat.d32 = cpu_to_be32(freqreg);
247 return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
250 static int ad5933_setup(struct ad5933_state *st)
255 ret = ad5933_reset(st);
259 ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
263 ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
267 st->settling_cycles = 10;
268 dat = cpu_to_be16(st->settling_cycles);
270 ret = ad5933_i2c_write(st->client,
271 AD5933_REG_SETTLING_CYCLES,
276 st->freq_points = 100;
277 dat = cpu_to_be16(st->freq_points);
279 return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
282 static void ad5933_calc_out_ranges(struct ad5933_state *st)
285 unsigned int normalized_3v3[4] = {1980, 198, 383, 970};
287 for (i = 0; i < 4; i++)
288 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
293 * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
296 static ssize_t ad5933_show_frequency(struct device *dev,
297 struct device_attribute *attr,
300 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
301 struct ad5933_state *st = iio_priv(indio_dev);
302 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
304 unsigned long long freqreg;
310 ret = iio_device_claim_direct_mode(indio_dev);
313 ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
314 iio_device_release_direct_mode(indio_dev);
318 freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
320 freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
321 do_div(freqreg, 1 << 27);
323 return sprintf(buf, "%d\n", (int)freqreg);
326 static ssize_t ad5933_store_frequency(struct device *dev,
327 struct device_attribute *attr,
331 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
332 struct ad5933_state *st = iio_priv(indio_dev);
333 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
337 ret = kstrtoul(buf, 10, &val);
341 if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
344 ret = iio_device_claim_direct_mode(indio_dev);
347 ret = ad5933_set_freq(st, this_attr->address, val);
348 iio_device_release_direct_mode(indio_dev);
350 return ret ? ret : len;
353 static IIO_DEVICE_ATTR(out_voltage0_freq_start, 0644,
354 ad5933_show_frequency,
355 ad5933_store_frequency,
356 AD5933_REG_FREQ_START);
358 static IIO_DEVICE_ATTR(out_voltage0_freq_increment, 0644,
359 ad5933_show_frequency,
360 ad5933_store_frequency,
361 AD5933_REG_FREQ_INC);
363 static ssize_t ad5933_show(struct device *dev,
364 struct device_attribute *attr,
367 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
368 struct ad5933_state *st = iio_priv(indio_dev);
369 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
370 int ret = 0, len = 0;
372 mutex_lock(&st->lock);
373 switch ((u32)this_attr->address) {
374 case AD5933_OUT_RANGE:
375 len = sprintf(buf, "%u\n",
376 st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
378 case AD5933_OUT_RANGE_AVAIL:
379 len = sprintf(buf, "%u %u %u %u\n", st->range_avail[0],
380 st->range_avail[3], st->range_avail[2],
383 case AD5933_OUT_SETTLING_CYCLES:
384 len = sprintf(buf, "%d\n", st->settling_cycles);
386 case AD5933_IN_PGA_GAIN:
387 len = sprintf(buf, "%s\n",
388 (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
391 case AD5933_IN_PGA_GAIN_AVAIL:
392 len = sprintf(buf, "1 0.2\n");
394 case AD5933_FREQ_POINTS:
395 len = sprintf(buf, "%d\n", st->freq_points);
401 mutex_unlock(&st->lock);
402 return ret ? ret : len;
405 static ssize_t ad5933_store(struct device *dev,
406 struct device_attribute *attr,
410 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
411 struct ad5933_state *st = iio_priv(indio_dev);
412 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
417 if (this_attr->address != AD5933_IN_PGA_GAIN) {
418 ret = kstrtou16(buf, 10, &val);
423 ret = iio_device_claim_direct_mode(indio_dev);
426 mutex_lock(&st->lock);
427 switch ((u32)this_attr->address) {
428 case AD5933_OUT_RANGE:
430 for (i = 0; i < 4; i++)
431 if (val == st->range_avail[i]) {
432 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
433 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
434 ret = ad5933_cmd(st, 0);
438 case AD5933_IN_PGA_GAIN:
439 if (sysfs_streq(buf, "1")) {
440 st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
441 } else if (sysfs_streq(buf, "0.2")) {
442 st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
447 ret = ad5933_cmd(st, 0);
449 case AD5933_OUT_SETTLING_CYCLES:
450 val = clamp(val, (u16)0, (u16)0x7FF);
451 st->settling_cycles = val;
453 /* 2x, 4x handling, see datasheet */
455 val = (val >> 2) | (3 << 9);
457 val = (val >> 1) | (1 << 9);
459 dat = cpu_to_be16(val);
460 ret = ad5933_i2c_write(st->client,
461 AD5933_REG_SETTLING_CYCLES,
464 case AD5933_FREQ_POINTS:
465 val = clamp(val, (u16)0, (u16)511);
466 st->freq_points = val;
468 dat = cpu_to_be16(val);
469 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
476 mutex_unlock(&st->lock);
477 iio_device_release_direct_mode(indio_dev);
478 return ret ? ret : len;
481 static IIO_DEVICE_ATTR(out_voltage0_scale, 0644,
486 static IIO_DEVICE_ATTR(out_voltage0_scale_available, 0444,
489 AD5933_OUT_RANGE_AVAIL);
491 static IIO_DEVICE_ATTR(in_voltage0_scale, 0644,
496 static IIO_DEVICE_ATTR(in_voltage0_scale_available, 0444,
499 AD5933_IN_PGA_GAIN_AVAIL);
501 static IIO_DEVICE_ATTR(out_voltage0_freq_points, 0644,
506 static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, 0644,
509 AD5933_OUT_SETTLING_CYCLES);
512 * ideally we would handle the scale attributes via the iio_info
513 * (read|write)_raw methods, however this part is a untypical since we
514 * don't create dedicated sysfs channel attributes for out0 and in0.
516 static struct attribute *ad5933_attributes[] = {
517 &iio_dev_attr_out_voltage0_scale.dev_attr.attr,
518 &iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
519 &iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
520 &iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
521 &iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
522 &iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
523 &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
524 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
528 static const struct attribute_group ad5933_attribute_group = {
529 .attrs = ad5933_attributes,
532 static int ad5933_read_raw(struct iio_dev *indio_dev,
533 struct iio_chan_spec const *chan,
538 struct ad5933_state *st = iio_priv(indio_dev);
543 case IIO_CHAN_INFO_RAW:
544 ret = iio_device_claim_direct_mode(indio_dev);
547 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
550 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
554 ret = ad5933_i2c_read(st->client,
555 AD5933_REG_TEMP_DATA,
559 iio_device_release_direct_mode(indio_dev);
560 *val = sign_extend32(be16_to_cpu(dat), 13);
563 case IIO_CHAN_INFO_SCALE:
566 return IIO_VAL_FRACTIONAL_LOG2;
571 iio_device_release_direct_mode(indio_dev);
575 static const struct iio_info ad5933_info = {
576 .read_raw = ad5933_read_raw,
577 .attrs = &ad5933_attribute_group,
578 .driver_module = THIS_MODULE,
581 static int ad5933_ring_preenable(struct iio_dev *indio_dev)
583 struct ad5933_state *st = iio_priv(indio_dev);
586 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
589 ret = ad5933_reset(st);
593 ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
597 ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
601 st->state = AD5933_CTRL_INIT_START_FREQ;
606 static int ad5933_ring_postenable(struct iio_dev *indio_dev)
608 struct ad5933_state *st = iio_priv(indio_dev);
610 /* AD5933_CTRL_INIT_START_FREQ:
611 * High Q complex circuits require a long time to reach steady state.
612 * To facilitate the measurement of such impedances, this mode allows
613 * the user full control of the settling time requirement before
614 * entering start frequency sweep mode where the impedance measurement
615 * takes place. In this mode the impedance is excited with the
616 * programmed start frequency (ad5933_ring_preenable),
617 * but no measurement takes place.
620 schedule_delayed_work(&st->work,
621 msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
625 static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
627 struct ad5933_state *st = iio_priv(indio_dev);
629 cancel_delayed_work_sync(&st->work);
630 return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
633 static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
634 .preenable = ad5933_ring_preenable,
635 .postenable = ad5933_ring_postenable,
636 .postdisable = ad5933_ring_postdisable,
639 static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
641 struct iio_buffer *buffer;
643 buffer = iio_kfifo_allocate();
647 iio_device_attach_buffer(indio_dev, buffer);
649 /* Ring buffer functions - here trigger setup related */
650 indio_dev->setup_ops = &ad5933_ring_setup_ops;
655 static void ad5933_work(struct work_struct *work)
657 struct ad5933_state *st = container_of(work,
658 struct ad5933_state, work.work);
659 struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
662 unsigned char status;
665 if (st->state == AD5933_CTRL_INIT_START_FREQ) {
667 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
668 st->state = AD5933_CTRL_START_SWEEP;
669 schedule_delayed_work(&st->work, st->poll_time_jiffies);
673 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
677 if (status & AD5933_STAT_DATA_VALID) {
678 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
679 indio_dev->masklength);
680 ret = ad5933_i2c_read(st->client,
681 test_bit(1, indio_dev->active_scan_mask) ?
682 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
683 scan_count * 2, (u8 *)buf);
687 if (scan_count == 2) {
688 val[0] = be16_to_cpu(buf[0]);
689 val[1] = be16_to_cpu(buf[1]);
691 val[0] = be16_to_cpu(buf[0]);
693 iio_push_to_buffers(indio_dev, val);
695 /* no data available - try again later */
696 schedule_delayed_work(&st->work, st->poll_time_jiffies);
700 if (status & AD5933_STAT_SWEEP_DONE) {
701 /* last sample received - power down do
702 * nothing until the ring enable is toggled
704 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
706 /* we just received a valid datum, move on to the next */
707 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
708 schedule_delayed_work(&st->work, st->poll_time_jiffies);
712 static int ad5933_probe(struct i2c_client *client,
713 const struct i2c_device_id *id)
715 int ret, voltage_uv = 0;
716 struct ad5933_platform_data *pdata = dev_get_platdata(&client->dev);
717 struct ad5933_state *st;
718 struct iio_dev *indio_dev;
720 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
724 st = iio_priv(indio_dev);
725 i2c_set_clientdata(client, indio_dev);
728 mutex_init(&st->lock);
731 pdata = &ad5933_default_pdata;
733 st->reg = devm_regulator_get(&client->dev, "vdd");
735 return PTR_ERR(st->reg);
737 ret = regulator_enable(st->reg);
739 dev_err(&client->dev, "Failed to enable specified VDD supply\n");
742 voltage_uv = regulator_get_voltage(st->reg);
745 st->vref_mv = voltage_uv / 1000;
747 st->vref_mv = pdata->vref_mv;
749 if (pdata->ext_clk_Hz) {
750 st->mclk_hz = pdata->ext_clk_Hz;
751 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
753 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
754 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
757 ad5933_calc_out_ranges(st);
758 INIT_DELAYED_WORK(&st->work, ad5933_work);
759 st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
761 indio_dev->dev.parent = &client->dev;
762 indio_dev->info = &ad5933_info;
763 indio_dev->name = id->name;
764 indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
765 indio_dev->channels = ad5933_channels;
766 indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
768 ret = ad5933_register_ring_funcs_and_init(indio_dev);
770 goto error_disable_reg;
772 ret = ad5933_setup(st);
774 goto error_unreg_ring;
776 ret = iio_device_register(indio_dev);
778 goto error_unreg_ring;
783 iio_kfifo_free(indio_dev->buffer);
785 regulator_disable(st->reg);
790 static int ad5933_remove(struct i2c_client *client)
792 struct iio_dev *indio_dev = i2c_get_clientdata(client);
793 struct ad5933_state *st = iio_priv(indio_dev);
795 iio_device_unregister(indio_dev);
796 iio_kfifo_free(indio_dev->buffer);
797 regulator_disable(st->reg);
802 static const struct i2c_device_id ad5933_id[] = {
808 MODULE_DEVICE_TABLE(i2c, ad5933_id);
810 static struct i2c_driver ad5933_driver = {
814 .probe = ad5933_probe,
815 .remove = ad5933_remove,
816 .id_table = ad5933_id,
818 module_i2c_driver(ad5933_driver);
820 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
821 MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
822 MODULE_LICENSE("GPL v2");