2 * AD9833/AD9834/AD9837/AD9838 SPI DDS driver
4 * Copyright 2010-2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/interrupt.h>
10 #include <linux/workqueue.h>
11 #include <linux/device.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/sysfs.h>
15 #include <linux/list.h>
16 #include <linux/spi/spi.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/err.h>
19 #include <linux/module.h>
20 #include <asm/div64.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
30 #define AD9834_REG_CMD 0
31 #define AD9834_REG_FREQ0 BIT(14)
32 #define AD9834_REG_FREQ1 BIT(15)
33 #define AD9834_REG_PHASE0 (BIT(15) | BIT(14))
34 #define AD9834_REG_PHASE1 (BIT(15) | BIT(14) | BIT(13))
36 /* Command Control Bits */
38 #define AD9834_B28 BIT(13)
39 #define AD9834_HLB BIT(12)
40 #define AD9834_FSEL BIT(11)
41 #define AD9834_PSEL BIT(10)
42 #define AD9834_PIN_SW BIT(9)
43 #define AD9834_RESET BIT(8)
44 #define AD9834_SLEEP1 BIT(7)
45 #define AD9834_SLEEP12 BIT(6)
46 #define AD9834_OPBITEN BIT(5)
47 #define AD9834_SIGN_PIB BIT(4)
48 #define AD9834_DIV2 BIT(3)
49 #define AD9834_MODE BIT(1)
51 #define AD9834_FREQ_BITS 28
52 #define AD9834_PHASE_BITS 12
54 #define RES_MASK(bits) (BIT(bits) - 1)
57 * struct ad9834_state - driver instance specific data
59 * @reg: supply regulator
60 * @mclk: external master clock
61 * @control: cached control word
62 * @xfer: default spi transfer
63 * @msg: default spi message
64 * @freq_xfer: tuning word spi transfer
65 * @freq_msg: tuning word spi message
66 * @lock: protect sensor state
67 * @data: spi transmit buffer
68 * @freq_data: tuning word spi transmit buffer
72 struct spi_device *spi;
73 struct regulator *reg;
75 unsigned short control;
77 struct spi_transfer xfer;
78 struct spi_message msg;
79 struct spi_transfer freq_xfer[2];
80 struct spi_message freq_msg;
81 struct mutex lock; /* protect sensor state */
84 * DMA (thus cache coherency maintenance) requires the
85 * transfer buffers to live in their own cache lines.
87 __be16 data ____cacheline_aligned;
92 * ad9834_supported_device_ids:
95 enum ad9834_supported_device_ids {
102 static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout)
104 unsigned long long freqreg = (u64)fout * (u64)BIT(AD9834_FREQ_BITS);
106 do_div(freqreg, mclk);
110 static int ad9834_write_frequency(struct ad9834_state *st,
111 unsigned long addr, unsigned long fout)
113 unsigned long regval;
115 if (fout > (st->mclk / 2))
118 regval = ad9834_calc_freqreg(st->mclk, fout);
120 st->freq_data[0] = cpu_to_be16(addr | (regval &
121 RES_MASK(AD9834_FREQ_BITS / 2)));
122 st->freq_data[1] = cpu_to_be16(addr | ((regval >>
123 (AD9834_FREQ_BITS / 2)) &
124 RES_MASK(AD9834_FREQ_BITS / 2)));
126 return spi_sync(st->spi, &st->freq_msg);
129 static int ad9834_write_phase(struct ad9834_state *st,
130 unsigned long addr, unsigned long phase)
132 if (phase > BIT(AD9834_PHASE_BITS))
134 st->data = cpu_to_be16(addr | phase);
136 return spi_sync(st->spi, &st->msg);
139 static ssize_t ad9834_write(struct device *dev,
140 struct device_attribute *attr,
144 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
145 struct ad9834_state *st = iio_priv(indio_dev);
146 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
150 ret = kstrtoul(buf, 10, &val);
154 mutex_lock(&st->lock);
155 switch ((u32)this_attr->address) {
156 case AD9834_REG_FREQ0:
157 case AD9834_REG_FREQ1:
158 ret = ad9834_write_frequency(st, this_attr->address, val);
160 case AD9834_REG_PHASE0:
161 case AD9834_REG_PHASE1:
162 ret = ad9834_write_phase(st, this_attr->address, val);
165 if (st->control & AD9834_MODE) {
166 ret = -EINVAL; /* AD9843 reserved mode */
171 st->control |= AD9834_OPBITEN;
173 st->control &= ~AD9834_OPBITEN;
175 st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
176 ret = spi_sync(st->spi, &st->msg);
180 st->control |= AD9834_PIN_SW;
182 st->control &= ~AD9834_PIN_SW;
183 st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
184 ret = spi_sync(st->spi, &st->msg);
189 st->control &= ~(this_attr->address | AD9834_PIN_SW);
190 } else if (val == 1) {
191 st->control |= this_attr->address;
192 st->control &= ~AD9834_PIN_SW;
197 st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
198 ret = spi_sync(st->spi, &st->msg);
202 st->control &= ~AD9834_RESET;
204 st->control |= AD9834_RESET;
206 st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
207 ret = spi_sync(st->spi, &st->msg);
212 mutex_unlock(&st->lock);
214 return ret ? ret : len;
217 static ssize_t ad9834_store_wavetype(struct device *dev,
218 struct device_attribute *attr,
222 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
223 struct ad9834_state *st = iio_priv(indio_dev);
224 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
226 bool is_ad9833_7 = (st->devid == ID_AD9833) || (st->devid == ID_AD9837);
228 mutex_lock(&st->lock);
230 switch ((u32)this_attr->address) {
232 if (sysfs_streq(buf, "sine")) {
233 st->control &= ~AD9834_MODE;
235 st->control &= ~AD9834_OPBITEN;
236 } else if (sysfs_streq(buf, "triangle")) {
238 st->control &= ~AD9834_OPBITEN;
239 st->control |= AD9834_MODE;
240 } else if (st->control & AD9834_OPBITEN) {
241 ret = -EINVAL; /* AD9843 reserved mode */
243 st->control |= AD9834_MODE;
245 } else if (is_ad9833_7 && sysfs_streq(buf, "square")) {
246 st->control &= ~AD9834_MODE;
247 st->control |= AD9834_OPBITEN;
254 if (sysfs_streq(buf, "square") &&
255 !(st->control & AD9834_MODE)) {
256 st->control &= ~AD9834_MODE;
257 st->control |= AD9834_OPBITEN;
268 st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
269 ret = spi_sync(st->spi, &st->msg);
271 mutex_unlock(&st->lock);
273 return ret ? ret : len;
277 ssize_t ad9834_show_out0_wavetype_available(struct device *dev,
278 struct device_attribute *attr,
281 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
282 struct ad9834_state *st = iio_priv(indio_dev);
285 if ((st->devid == ID_AD9833) || (st->devid == ID_AD9837))
286 str = "sine triangle square";
287 else if (st->control & AD9834_OPBITEN)
290 str = "sine triangle";
292 return sprintf(buf, "%s\n", str);
295 static IIO_DEVICE_ATTR(out_altvoltage0_out0_wavetype_available, 0444,
296 ad9834_show_out0_wavetype_available, NULL, 0);
299 ssize_t ad9834_show_out1_wavetype_available(struct device *dev,
300 struct device_attribute *attr,
303 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
304 struct ad9834_state *st = iio_priv(indio_dev);
307 if (st->control & AD9834_MODE)
312 return sprintf(buf, "%s\n", str);
315 static IIO_DEVICE_ATTR(out_altvoltage0_out1_wavetype_available, 0444,
316 ad9834_show_out1_wavetype_available, NULL, 0);
319 * see dds.h for further information
322 static IIO_DEV_ATTR_FREQ(0, 0, 0200, NULL, ad9834_write, AD9834_REG_FREQ0);
323 static IIO_DEV_ATTR_FREQ(0, 1, 0200, NULL, ad9834_write, AD9834_REG_FREQ1);
324 static IIO_DEV_ATTR_FREQSYMBOL(0, 0200, NULL, ad9834_write, AD9834_FSEL);
325 static IIO_CONST_ATTR_FREQ_SCALE(0, "1"); /* 1Hz */
327 static IIO_DEV_ATTR_PHASE(0, 0, 0200, NULL, ad9834_write, AD9834_REG_PHASE0);
328 static IIO_DEV_ATTR_PHASE(0, 1, 0200, NULL, ad9834_write, AD9834_REG_PHASE1);
329 static IIO_DEV_ATTR_PHASESYMBOL(0, 0200, NULL, ad9834_write, AD9834_PSEL);
330 static IIO_CONST_ATTR_PHASE_SCALE(0, "0.0015339808"); /* 2PI/2^12 rad*/
332 static IIO_DEV_ATTR_PINCONTROL_EN(0, 0200, NULL,
333 ad9834_write, AD9834_PIN_SW);
334 static IIO_DEV_ATTR_OUT_ENABLE(0, 0200, NULL, ad9834_write, AD9834_RESET);
335 static IIO_DEV_ATTR_OUTY_ENABLE(0, 1, 0200, NULL,
336 ad9834_write, AD9834_OPBITEN);
337 static IIO_DEV_ATTR_OUT_WAVETYPE(0, 0, ad9834_store_wavetype, 0);
338 static IIO_DEV_ATTR_OUT_WAVETYPE(0, 1, ad9834_store_wavetype, 1);
340 static struct attribute *ad9834_attributes[] = {
341 &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr,
342 &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr,
343 &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr,
344 &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr,
345 &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr,
346 &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr,
347 &iio_dev_attr_out_altvoltage0_pincontrol_en.dev_attr.attr,
348 &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr,
349 &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr,
350 &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr,
351 &iio_dev_attr_out_altvoltage0_out1_enable.dev_attr.attr,
352 &iio_dev_attr_out_altvoltage0_out0_wavetype.dev_attr.attr,
353 &iio_dev_attr_out_altvoltage0_out1_wavetype.dev_attr.attr,
354 &iio_dev_attr_out_altvoltage0_out0_wavetype_available.dev_attr.attr,
355 &iio_dev_attr_out_altvoltage0_out1_wavetype_available.dev_attr.attr,
359 static struct attribute *ad9833_attributes[] = {
360 &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr,
361 &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr,
362 &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr,
363 &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr,
364 &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr,
365 &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr,
366 &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr,
367 &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr,
368 &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr,
369 &iio_dev_attr_out_altvoltage0_out0_wavetype.dev_attr.attr,
370 &iio_dev_attr_out_altvoltage0_out0_wavetype_available.dev_attr.attr,
374 static const struct attribute_group ad9834_attribute_group = {
375 .attrs = ad9834_attributes,
378 static const struct attribute_group ad9833_attribute_group = {
379 .attrs = ad9833_attributes,
382 static const struct iio_info ad9834_info = {
383 .attrs = &ad9834_attribute_group,
384 .driver_module = THIS_MODULE,
387 static const struct iio_info ad9833_info = {
388 .attrs = &ad9833_attribute_group,
389 .driver_module = THIS_MODULE,
392 static int ad9834_probe(struct spi_device *spi)
394 struct ad9834_platform_data *pdata = dev_get_platdata(&spi->dev);
395 struct ad9834_state *st;
396 struct iio_dev *indio_dev;
397 struct regulator *reg;
401 dev_dbg(&spi->dev, "no platform data?\n");
405 reg = devm_regulator_get(&spi->dev, "avdd");
409 ret = regulator_enable(reg);
411 dev_err(&spi->dev, "Failed to enable specified AVDD supply\n");
415 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
418 goto error_disable_reg;
420 spi_set_drvdata(spi, indio_dev);
421 st = iio_priv(indio_dev);
422 mutex_init(&st->lock);
423 st->mclk = pdata->mclk;
425 st->devid = spi_get_device_id(spi)->driver_data;
427 indio_dev->dev.parent = &spi->dev;
428 indio_dev->name = spi_get_device_id(spi)->name;
432 indio_dev->info = &ad9833_info;
435 indio_dev->info = &ad9834_info;
438 indio_dev->modes = INDIO_DIRECT_MODE;
440 /* Setup default messages */
442 st->xfer.tx_buf = &st->data;
445 spi_message_init(&st->msg);
446 spi_message_add_tail(&st->xfer, &st->msg);
448 st->freq_xfer[0].tx_buf = &st->freq_data[0];
449 st->freq_xfer[0].len = 2;
450 st->freq_xfer[0].cs_change = 1;
451 st->freq_xfer[1].tx_buf = &st->freq_data[1];
452 st->freq_xfer[1].len = 2;
454 spi_message_init(&st->freq_msg);
455 spi_message_add_tail(&st->freq_xfer[0], &st->freq_msg);
456 spi_message_add_tail(&st->freq_xfer[1], &st->freq_msg);
458 st->control = AD9834_B28 | AD9834_RESET;
461 st->control |= AD9834_DIV2;
463 if (!pdata->en_signbit_msb_out && (st->devid == ID_AD9834))
464 st->control |= AD9834_SIGN_PIB;
466 st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
467 ret = spi_sync(st->spi, &st->msg);
469 dev_err(&spi->dev, "device init failed\n");
470 goto error_disable_reg;
473 ret = ad9834_write_frequency(st, AD9834_REG_FREQ0, pdata->freq0);
475 goto error_disable_reg;
477 ret = ad9834_write_frequency(st, AD9834_REG_FREQ1, pdata->freq1);
479 goto error_disable_reg;
481 ret = ad9834_write_phase(st, AD9834_REG_PHASE0, pdata->phase0);
483 goto error_disable_reg;
485 ret = ad9834_write_phase(st, AD9834_REG_PHASE1, pdata->phase1);
487 goto error_disable_reg;
489 ret = iio_device_register(indio_dev);
491 goto error_disable_reg;
496 regulator_disable(reg);
501 static int ad9834_remove(struct spi_device *spi)
503 struct iio_dev *indio_dev = spi_get_drvdata(spi);
504 struct ad9834_state *st = iio_priv(indio_dev);
506 iio_device_unregister(indio_dev);
507 regulator_disable(st->reg);
512 static const struct spi_device_id ad9834_id[] = {
513 {"ad9833", ID_AD9833},
514 {"ad9834", ID_AD9834},
515 {"ad9837", ID_AD9837},
516 {"ad9838", ID_AD9838},
519 MODULE_DEVICE_TABLE(spi, ad9834_id);
521 static struct spi_driver ad9834_driver = {
525 .probe = ad9834_probe,
526 .remove = ad9834_remove,
527 .id_table = ad9834_id,
529 module_spi_driver(ad9834_driver);
531 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
532 MODULE_DESCRIPTION("Analog Devices AD9833/AD9834/AD9837/AD9838 DDS");
533 MODULE_LICENSE("GPL v2");