1 // SPDX-License-Identifier: GPL-2.0
3 * AD7746 capacitive sensor driver supporting AD7745, AD7746 and AD7747
5 * Copyright 2011 Analog Devices Inc.
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/i2c.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/stat.h>
16 #include <linux/sysfs.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
22 * AD7746 Register Definition
25 #define AD7746_REG_STATUS 0
26 #define AD7746_REG_CAP_DATA_HIGH 1
27 #define AD7746_REG_VT_DATA_HIGH 4
28 #define AD7746_REG_CAP_SETUP 7
29 #define AD7746_REG_VT_SETUP 8
30 #define AD7746_REG_EXC_SETUP 9
31 #define AD7746_REG_CFG 10
32 #define AD7746_REG_CAPDACA 11
33 #define AD7746_REG_CAPDACB 12
34 #define AD7746_REG_CAP_OFFH 13
35 #define AD7746_REG_CAP_GAINH 15
36 #define AD7746_REG_VOLT_GAINH 17
38 /* Status Register Bit Designations (AD7746_REG_STATUS) */
39 #define AD7746_STATUS_EXCERR BIT(3)
40 #define AD7746_STATUS_RDY BIT(2)
41 #define AD7746_STATUS_RDYVT BIT(1)
42 #define AD7746_STATUS_RDYCAP BIT(0)
44 /* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
45 #define AD7746_CAPSETUP_CAPEN BIT(7)
46 #define AD7746_CAPSETUP_CIN2 BIT(6) /* AD7746 only */
47 #define AD7746_CAPSETUP_CAPDIFF BIT(5)
48 #define AD7746_CAPSETUP_CACHOP BIT(0)
50 /* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
51 #define AD7746_VTSETUP_VTEN (1 << 7)
52 #define AD7746_VTSETUP_VTMD_INT_TEMP (0 << 5)
53 #define AD7746_VTSETUP_VTMD_EXT_TEMP (1 << 5)
54 #define AD7746_VTSETUP_VTMD_VDD_MON (2 << 5)
55 #define AD7746_VTSETUP_VTMD_EXT_VIN (3 << 5)
56 #define AD7746_VTSETUP_EXTREF BIT(4)
57 #define AD7746_VTSETUP_VTSHORT BIT(1)
58 #define AD7746_VTSETUP_VTCHOP BIT(0)
60 /* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
61 #define AD7746_EXCSETUP_CLKCTRL BIT(7)
62 #define AD7746_EXCSETUP_EXCON BIT(6)
63 #define AD7746_EXCSETUP_EXCB BIT(5)
64 #define AD7746_EXCSETUP_NEXCB BIT(4)
65 #define AD7746_EXCSETUP_EXCA BIT(3)
66 #define AD7746_EXCSETUP_NEXCA BIT(2)
67 #define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0)
69 /* Config Register Bit Designations (AD7746_REG_CFG) */
70 #define AD7746_CONF_VTFS_SHIFT 6
71 #define AD7746_CONF_CAPFS_SHIFT 3
72 #define AD7746_CONF_VTFS_MASK GENMASK(7, 6)
73 #define AD7746_CONF_CAPFS_MASK GENMASK(5, 3)
74 #define AD7746_CONF_MODE_IDLE (0 << 0)
75 #define AD7746_CONF_MODE_CONT_CONV (1 << 0)
76 #define AD7746_CONF_MODE_SINGLE_CONV (2 << 0)
77 #define AD7746_CONF_MODE_PWRDN (3 << 0)
78 #define AD7746_CONF_MODE_OFFS_CAL (5 << 0)
79 #define AD7746_CONF_MODE_GAIN_CAL (6 << 0)
81 /* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
82 #define AD7746_CAPDAC_DACEN BIT(7)
83 #define AD7746_CAPDAC_DACP(x) ((x) & 0x7F)
85 struct ad7746_chip_info {
86 struct i2c_client *client;
87 struct mutex lock; /* protect sensor state */
89 * Capacitive channel digital filter setup;
90 * conversion time/update rate setup per channel
101 } data ____cacheline_aligned;
115 static const struct iio_chan_spec ad7746_channels[] = {
120 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
121 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
122 BIT(IIO_CHAN_INFO_SAMP_FREQ),
123 .address = AD7746_REG_VT_DATA_HIGH << 8 |
124 AD7746_VTSETUP_VTMD_EXT_VIN,
130 .extend_name = "supply",
131 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
132 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
133 BIT(IIO_CHAN_INFO_SAMP_FREQ),
134 .address = AD7746_REG_VT_DATA_HIGH << 8 |
135 AD7746_VTSETUP_VTMD_VDD_MON,
141 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
142 .address = AD7746_REG_VT_DATA_HIGH << 8 |
143 AD7746_VTSETUP_VTMD_INT_TEMP,
149 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
150 .address = AD7746_REG_VT_DATA_HIGH << 8 |
151 AD7746_VTSETUP_VTMD_EXT_TEMP,
154 .type = IIO_CAPACITANCE,
157 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
158 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
159 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
160 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
161 .address = AD7746_REG_CAP_DATA_HIGH << 8,
164 .type = IIO_CAPACITANCE,
169 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
170 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
171 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
172 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
173 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
174 AD7746_CAPSETUP_CAPDIFF
177 .type = IIO_CAPACITANCE,
180 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
181 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
182 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
183 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
184 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
185 AD7746_CAPSETUP_CIN2,
188 .type = IIO_CAPACITANCE,
193 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
194 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
195 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
196 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
197 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
198 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
202 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
203 static const unsigned char ad7746_vt_filter_rate_table[][2] = {
204 {50, 20 + 1}, {31, 32 + 1}, {16, 62 + 1}, {8, 122 + 1},
207 static const unsigned char ad7746_cap_filter_rate_table[][2] = {
208 {91, 11 + 1}, {84, 12 + 1}, {50, 20 + 1}, {26, 38 + 1},
209 {16, 62 + 1}, {13, 77 + 1}, {11, 92 + 1}, {9, 110 + 1},
212 static int ad7746_set_capdac(struct ad7746_chip_info *chip, int channel)
214 int ret = i2c_smbus_write_byte_data(chip->client,
216 chip->capdac[channel][0]);
220 return i2c_smbus_write_byte_data(chip->client,
222 chip->capdac[channel][1]);
225 static int ad7746_select_channel(struct iio_dev *indio_dev,
226 struct iio_chan_spec const *chan)
228 struct ad7746_chip_info *chip = iio_priv(indio_dev);
229 u8 vt_setup, cap_setup;
232 switch (chan->type) {
233 case IIO_CAPACITANCE:
234 cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
235 vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
236 idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
237 AD7746_CONF_CAPFS_SHIFT;
238 delay = ad7746_cap_filter_rate_table[idx][1];
240 ret = ad7746_set_capdac(chip, chan->channel);
244 if (chip->capdac_set != chan->channel)
245 chip->capdac_set = chan->channel;
249 vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
250 cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
251 idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
252 AD7746_CONF_VTFS_SHIFT;
253 delay = ad7746_cap_filter_rate_table[idx][1];
259 if (chip->cap_setup != cap_setup) {
260 ret = i2c_smbus_write_byte_data(chip->client,
261 AD7746_REG_CAP_SETUP,
266 chip->cap_setup = cap_setup;
269 if (chip->vt_setup != vt_setup) {
270 ret = i2c_smbus_write_byte_data(chip->client,
276 chip->vt_setup = vt_setup;
282 static inline ssize_t ad7746_start_calib(struct device *dev,
283 struct device_attribute *attr,
288 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
289 struct ad7746_chip_info *chip = iio_priv(indio_dev);
290 int ret, timeout = 10;
293 ret = kstrtobool(buf, &doit);
300 mutex_lock(&chip->lock);
301 regval |= chip->config;
302 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval);
308 ret = i2c_smbus_read_byte_data(chip->client, AD7746_REG_CFG);
312 } while ((ret == regval) && timeout--);
314 mutex_unlock(&chip->lock);
319 mutex_unlock(&chip->lock);
323 static ssize_t ad7746_start_offset_calib(struct device *dev,
324 struct device_attribute *attr,
328 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
329 int ret = ad7746_select_channel(indio_dev,
330 &ad7746_channels[to_iio_dev_attr(attr)->address]);
334 return ad7746_start_calib(dev, attr, buf, len,
335 AD7746_CONF_MODE_OFFS_CAL);
338 static ssize_t ad7746_start_gain_calib(struct device *dev,
339 struct device_attribute *attr,
343 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
344 int ret = ad7746_select_channel(indio_dev,
345 &ad7746_channels[to_iio_dev_attr(attr)->address]);
349 return ad7746_start_calib(dev, attr, buf, len,
350 AD7746_CONF_MODE_GAIN_CAL);
353 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
354 0200, NULL, ad7746_start_offset_calib, CIN1);
355 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
356 0200, NULL, ad7746_start_offset_calib, CIN2);
357 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
358 0200, NULL, ad7746_start_gain_calib, CIN1);
359 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
360 0200, NULL, ad7746_start_gain_calib, CIN2);
361 static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration,
362 0200, NULL, ad7746_start_gain_calib, VIN);
364 static int ad7746_store_cap_filter_rate_setup(struct ad7746_chip_info *chip,
369 for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++)
370 if (val >= ad7746_cap_filter_rate_table[i][0])
373 if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table))
374 i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
376 chip->config &= ~AD7746_CONF_CAPFS_MASK;
377 chip->config |= i << AD7746_CONF_CAPFS_SHIFT;
382 static int ad7746_store_vt_filter_rate_setup(struct ad7746_chip_info *chip,
387 for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++)
388 if (val >= ad7746_vt_filter_rate_table[i][0])
391 if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table))
392 i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
394 chip->config &= ~AD7746_CONF_VTFS_MASK;
395 chip->config |= i << AD7746_CONF_VTFS_SHIFT;
400 static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8");
401 static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available,
402 "91 84 50 26 16 13 11 9");
404 static struct attribute *ad7746_attributes[] = {
405 &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
406 &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
407 &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
408 &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
409 &iio_dev_attr_in_voltage0_calibscale_calibration.dev_attr.attr,
410 &iio_const_attr_in_voltage_sampling_frequency_available.dev_attr.attr,
411 &iio_const_attr_in_capacitance_sampling_frequency_available.dev_attr.attr,
415 static const struct attribute_group ad7746_attribute_group = {
416 .attrs = ad7746_attributes,
419 static int ad7746_write_raw(struct iio_dev *indio_dev,
420 struct iio_chan_spec const *chan,
425 struct ad7746_chip_info *chip = iio_priv(indio_dev);
428 mutex_lock(&chip->lock);
431 case IIO_CHAN_INFO_CALIBSCALE:
437 val = (val2 * 1024) / 15625;
439 switch (chan->type) {
440 case IIO_CAPACITANCE:
441 reg = AD7746_REG_CAP_GAINH;
444 reg = AD7746_REG_VOLT_GAINH;
451 ret = i2c_smbus_write_word_swapped(chip->client, reg, val);
457 case IIO_CHAN_INFO_CALIBBIAS:
458 if (val < 0 || val > 0xFFFF) {
462 ret = i2c_smbus_write_word_swapped(chip->client,
463 AD7746_REG_CAP_OFFH, val);
469 case IIO_CHAN_INFO_OFFSET:
470 if (val < 0 || val > 43008000) { /* 21pF */
476 * CAPDAC Scale = 21pF_typ / 127
477 * CIN Scale = 8.192pF / 2^24
478 * Offset Scale = CAPDAC Scale / CIN Scale = 338646
483 chip->capdac[chan->channel][chan->differential] = val > 0 ?
484 AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0;
486 ret = ad7746_set_capdac(chip, chan->channel);
490 chip->capdac_set = chan->channel;
494 case IIO_CHAN_INFO_SAMP_FREQ:
500 switch (chan->type) {
501 case IIO_CAPACITANCE:
502 ret = ad7746_store_cap_filter_rate_setup(chip, val);
505 ret = ad7746_store_vt_filter_rate_setup(chip, val);
516 mutex_unlock(&chip->lock);
520 static int ad7746_read_raw(struct iio_dev *indio_dev,
521 struct iio_chan_spec const *chan,
525 struct ad7746_chip_info *chip = iio_priv(indio_dev);
529 mutex_lock(&chip->lock);
532 case IIO_CHAN_INFO_RAW:
533 case IIO_CHAN_INFO_PROCESSED:
534 ret = ad7746_select_channel(indio_dev, chan);
539 regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV;
540 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG,
546 /* Now read the actual register */
548 ret = i2c_smbus_read_i2c_block_data(chip->client,
549 chan->address >> 8, 3,
555 *val = (be32_to_cpu(chip->data.d32) & 0xFFFFFF) - 0x800000;
557 switch (chan->type) {
560 * temperature in milli degrees Celsius
561 * T = ((*val / 2048) - 4096) * 1000
563 *val = (*val * 125) / 256;
566 if (chan->channel == 1) /* supply_raw*/
575 case IIO_CHAN_INFO_CALIBSCALE:
576 switch (chan->type) {
577 case IIO_CAPACITANCE:
578 reg = AD7746_REG_CAP_GAINH;
581 reg = AD7746_REG_VOLT_GAINH;
588 ret = i2c_smbus_read_word_swapped(chip->client, reg);
591 /* 1 + gain_val / 2^16 */
593 *val2 = (15625 * ret) / 1024;
595 ret = IIO_VAL_INT_PLUS_MICRO;
597 case IIO_CHAN_INFO_CALIBBIAS:
598 ret = i2c_smbus_read_word_swapped(chip->client,
599 AD7746_REG_CAP_OFFH);
606 case IIO_CHAN_INFO_OFFSET:
607 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
608 [chan->differential]) * 338646;
612 case IIO_CHAN_INFO_SCALE:
613 switch (chan->type) {
614 case IIO_CAPACITANCE:
618 ret = IIO_VAL_INT_PLUS_NANO;
624 ret = IIO_VAL_FRACTIONAL_LOG2;
632 case IIO_CHAN_INFO_SAMP_FREQ:
633 switch (chan->type) {
634 case IIO_CAPACITANCE:
635 idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
636 AD7746_CONF_CAPFS_SHIFT;
637 *val = ad7746_cap_filter_rate_table[idx][0];
641 idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
642 AD7746_CONF_VTFS_SHIFT;
643 *val = ad7746_vt_filter_rate_table[idx][0];
654 mutex_unlock(&chip->lock);
658 static const struct iio_info ad7746_info = {
659 .attrs = &ad7746_attribute_group,
660 .read_raw = ad7746_read_raw,
661 .write_raw = ad7746_write_raw,
664 static int ad7746_probe(struct i2c_client *client,
665 const struct i2c_device_id *id)
667 struct device *dev = &client->dev;
668 struct ad7746_chip_info *chip;
669 struct iio_dev *indio_dev;
670 unsigned char regval = 0;
671 unsigned int vdd_permille;
674 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
677 chip = iio_priv(indio_dev);
678 mutex_init(&chip->lock);
679 /* this is only used for device removal purposes */
680 i2c_set_clientdata(client, indio_dev);
682 chip->client = client;
683 chip->capdac_set = -1;
685 indio_dev->name = id->name;
686 indio_dev->info = &ad7746_info;
687 indio_dev->channels = ad7746_channels;
688 if (id->driver_data == 7746)
689 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
691 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels) - 2;
692 indio_dev->modes = INDIO_DIRECT_MODE;
694 if (device_property_read_bool(dev, "adi,exca-output-en")) {
695 if (device_property_read_bool(dev, "adi,exca-output-invert"))
696 regval |= AD7746_EXCSETUP_NEXCA;
698 regval |= AD7746_EXCSETUP_EXCA;
701 if (device_property_read_bool(dev, "adi,excb-output-en")) {
702 if (device_property_read_bool(dev, "adi,excb-output-invert"))
703 regval |= AD7746_EXCSETUP_NEXCB;
705 regval |= AD7746_EXCSETUP_EXCB;
708 ret = device_property_read_u32(dev, "adi,excitation-vdd-permille",
711 switch (vdd_permille) {
713 regval |= AD7746_EXCSETUP_EXCLVL(0);
716 regval |= AD7746_EXCSETUP_EXCLVL(1);
719 regval |= AD7746_EXCSETUP_EXCLVL(2);
722 regval |= AD7746_EXCSETUP_EXCLVL(3);
729 ret = i2c_smbus_write_byte_data(chip->client,
730 AD7746_REG_EXC_SETUP, regval);
734 return devm_iio_device_register(indio_dev->dev.parent, indio_dev);
737 static const struct i2c_device_id ad7746_id[] = {
744 MODULE_DEVICE_TABLE(i2c, ad7746_id);
746 static const struct of_device_id ad7746_of_match[] = {
747 { .compatible = "adi,ad7745" },
748 { .compatible = "adi,ad7746" },
749 { .compatible = "adi,ad7747" },
753 MODULE_DEVICE_TABLE(of, ad7746_of_match);
755 static struct i2c_driver ad7746_driver = {
757 .name = KBUILD_MODNAME,
758 .of_match_table = ad7746_of_match,
760 .probe = ad7746_probe,
761 .id_table = ad7746_id,
763 module_i2c_driver(ad7746_driver);
765 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
766 MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver");
767 MODULE_LICENSE("GPL v2");