GNU Linux-libre 4.19.314-gnu1
[releases.git] / drivers / staging / iio / cdc / ad7746.c
1 /*
2  * AD7746 capacitive sensor driver supporting AD7745, AD7746 and AD7747
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/stat.h>
17 #include <linux/sysfs.h>
18
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21
22 #include "ad7746.h"
23
24 /*
25  * AD7746 Register Definition
26  */
27
28 #define AD7746_REG_STATUS               0
29 #define AD7746_REG_CAP_DATA_HIGH        1
30 #define AD7746_REG_VT_DATA_HIGH         4
31 #define AD7746_REG_CAP_SETUP            7
32 #define AD7746_REG_VT_SETUP             8
33 #define AD7746_REG_EXC_SETUP            9
34 #define AD7746_REG_CFG                  10
35 #define AD7746_REG_CAPDACA              11
36 #define AD7746_REG_CAPDACB              12
37 #define AD7746_REG_CAP_OFFH             13
38 #define AD7746_REG_CAP_GAINH            15
39 #define AD7746_REG_VOLT_GAINH           17
40
41 /* Status Register Bit Designations (AD7746_REG_STATUS) */
42 #define AD7746_STATUS_EXCERR            BIT(3)
43 #define AD7746_STATUS_RDY               BIT(2)
44 #define AD7746_STATUS_RDYVT             BIT(1)
45 #define AD7746_STATUS_RDYCAP            BIT(0)
46
47 /* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
48 #define AD7746_CAPSETUP_CAPEN           BIT(7)
49 #define AD7746_CAPSETUP_CIN2            BIT(6) /* AD7746 only */
50 #define AD7746_CAPSETUP_CAPDIFF         BIT(5)
51 #define AD7746_CAPSETUP_CACHOP          BIT(0)
52
53 /* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
54 #define AD7746_VTSETUP_VTEN             (1 << 7)
55 #define AD7746_VTSETUP_VTMD_INT_TEMP    (0 << 5)
56 #define AD7746_VTSETUP_VTMD_EXT_TEMP    (1 << 5)
57 #define AD7746_VTSETUP_VTMD_VDD_MON     (2 << 5)
58 #define AD7746_VTSETUP_VTMD_EXT_VIN     (3 << 5)
59 #define AD7746_VTSETUP_EXTREF           BIT(4)
60 #define AD7746_VTSETUP_VTSHORT          BIT(1)
61 #define AD7746_VTSETUP_VTCHOP           BIT(0)
62
63 /* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
64 #define AD7746_EXCSETUP_CLKCTRL         BIT(7)
65 #define AD7746_EXCSETUP_EXCON           BIT(6)
66 #define AD7746_EXCSETUP_EXCB            BIT(5)
67 #define AD7746_EXCSETUP_NEXCB           BIT(4)
68 #define AD7746_EXCSETUP_EXCA            BIT(3)
69 #define AD7746_EXCSETUP_NEXCA           BIT(2)
70 #define AD7746_EXCSETUP_EXCLVL(x)       (((x) & 0x3) << 0)
71
72 /* Config Register Bit Designations (AD7746_REG_CFG) */
73 #define AD7746_CONF_VTFS_SHIFT          6
74 #define AD7746_CONF_CAPFS_SHIFT         3
75 #define AD7746_CONF_VTFS_MASK           GENMASK(7, 6)
76 #define AD7746_CONF_CAPFS_MASK          GENMASK(5, 3)
77 #define AD7746_CONF_MODE_IDLE           (0 << 0)
78 #define AD7746_CONF_MODE_CONT_CONV      (1 << 0)
79 #define AD7746_CONF_MODE_SINGLE_CONV    (2 << 0)
80 #define AD7746_CONF_MODE_PWRDN          (3 << 0)
81 #define AD7746_CONF_MODE_OFFS_CAL       (5 << 0)
82 #define AD7746_CONF_MODE_GAIN_CAL       (6 << 0)
83
84 /* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
85 #define AD7746_CAPDAC_DACEN             BIT(7)
86 #define AD7746_CAPDAC_DACP(x)           ((x) & 0x7F)
87
88 /*
89  * struct ad7746_chip_info - chip specific information
90  */
91
92 struct ad7746_chip_info {
93         struct i2c_client *client;
94         struct mutex lock; /* protect sensor state */
95         /*
96          * Capacitive channel digital filter setup;
97          * conversion time/update rate setup per channel
98          */
99         u8      config;
100         u8      cap_setup;
101         u8      vt_setup;
102         u8      capdac[2][2];
103         s8      capdac_set;
104
105         union {
106                 __be32 d32;
107                 u8 d8[4];
108         } data ____cacheline_aligned;
109 };
110
111 enum ad7746_chan {
112         VIN,
113         VIN_VDD,
114         TEMP_INT,
115         TEMP_EXT,
116         CIN1,
117         CIN1_DIFF,
118         CIN2,
119         CIN2_DIFF,
120 };
121
122 static const struct iio_chan_spec ad7746_channels[] = {
123         [VIN] = {
124                 .type = IIO_VOLTAGE,
125                 .indexed = 1,
126                 .channel = 0,
127                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
128                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
129                         BIT(IIO_CHAN_INFO_SAMP_FREQ),
130                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
131                         AD7746_VTSETUP_VTMD_EXT_VIN,
132         },
133         [VIN_VDD] = {
134                 .type = IIO_VOLTAGE,
135                 .indexed = 1,
136                 .channel = 1,
137                 .extend_name = "supply",
138                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
139                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
140                         BIT(IIO_CHAN_INFO_SAMP_FREQ),
141                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
142                         AD7746_VTSETUP_VTMD_VDD_MON,
143         },
144         [TEMP_INT] = {
145                 .type = IIO_TEMP,
146                 .indexed = 1,
147                 .channel = 0,
148                 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
149                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
150                         AD7746_VTSETUP_VTMD_INT_TEMP,
151         },
152         [TEMP_EXT] = {
153                 .type = IIO_TEMP,
154                 .indexed = 1,
155                 .channel = 1,
156                 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
157                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
158                         AD7746_VTSETUP_VTMD_EXT_TEMP,
159         },
160         [CIN1] = {
161                 .type = IIO_CAPACITANCE,
162                 .indexed = 1,
163                 .channel = 0,
164                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
165                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
166                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
167                 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
168                 .address = AD7746_REG_CAP_DATA_HIGH << 8,
169         },
170         [CIN1_DIFF] = {
171                 .type = IIO_CAPACITANCE,
172                 .differential = 1,
173                 .indexed = 1,
174                 .channel = 0,
175                 .channel2 = 2,
176                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
177                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
178                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
179                 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
180                 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
181                         AD7746_CAPSETUP_CAPDIFF
182         },
183         [CIN2] = {
184                 .type = IIO_CAPACITANCE,
185                 .indexed = 1,
186                 .channel = 1,
187                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
188                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
189                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
190                 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
191                 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
192                         AD7746_CAPSETUP_CIN2,
193         },
194         [CIN2_DIFF] = {
195                 .type = IIO_CAPACITANCE,
196                 .differential = 1,
197                 .indexed = 1,
198                 .channel = 1,
199                 .channel2 = 3,
200                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
201                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
202                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
203                 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
204                 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
205                         AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
206         }
207 };
208
209 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
210 static const unsigned char ad7746_vt_filter_rate_table[][2] = {
211         {50, 20 + 1}, {31, 32 + 1}, {16, 62 + 1}, {8, 122 + 1},
212 };
213
214 static const unsigned char ad7746_cap_filter_rate_table[][2] = {
215         {91, 11 + 1}, {84, 12 + 1}, {50, 20 + 1}, {26, 38 + 1},
216         {16, 62 + 1}, {13, 77 + 1}, {11, 92 + 1}, {9, 110 + 1},
217 };
218
219 static int ad7746_select_channel(struct iio_dev *indio_dev,
220                                  struct iio_chan_spec const *chan)
221 {
222         struct ad7746_chip_info *chip = iio_priv(indio_dev);
223         u8 vt_setup, cap_setup;
224         int ret, delay, idx;
225
226         switch (chan->type) {
227         case IIO_CAPACITANCE:
228                 cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
229                 vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
230                 idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
231                         AD7746_CONF_CAPFS_SHIFT;
232                 delay = ad7746_cap_filter_rate_table[idx][1];
233
234                 if (chip->capdac_set != chan->channel) {
235                         ret = i2c_smbus_write_byte_data(chip->client,
236                                 AD7746_REG_CAPDACA,
237                                 chip->capdac[chan->channel][0]);
238                         if (ret < 0)
239                                 return ret;
240                         ret = i2c_smbus_write_byte_data(chip->client,
241                                 AD7746_REG_CAPDACB,
242                                 chip->capdac[chan->channel][1]);
243                         if (ret < 0)
244                                 return ret;
245
246                         chip->capdac_set = chan->channel;
247                 }
248                 break;
249         case IIO_VOLTAGE:
250         case IIO_TEMP:
251                 vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
252                 cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
253                 idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
254                         AD7746_CONF_VTFS_SHIFT;
255                 delay = ad7746_cap_filter_rate_table[idx][1];
256                 break;
257         default:
258                 return -EINVAL;
259         }
260
261         if (chip->cap_setup != cap_setup) {
262                 ret = i2c_smbus_write_byte_data(chip->client,
263                                                 AD7746_REG_CAP_SETUP,
264                                                 cap_setup);
265                 if (ret < 0)
266                         return ret;
267
268                 chip->cap_setup = cap_setup;
269         }
270
271         if (chip->vt_setup != vt_setup) {
272                 ret = i2c_smbus_write_byte_data(chip->client,
273                                                 AD7746_REG_VT_SETUP,
274                                                 vt_setup);
275                 if (ret < 0)
276                         return ret;
277
278                 chip->vt_setup = vt_setup;
279         }
280
281         return delay;
282 }
283
284 static inline ssize_t ad7746_start_calib(struct device *dev,
285                                          struct device_attribute *attr,
286                                          const char *buf,
287                                          size_t len,
288                                          u8 regval)
289 {
290         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
291         struct ad7746_chip_info *chip = iio_priv(indio_dev);
292         int ret, timeout = 10;
293         bool doit;
294
295         ret = strtobool(buf, &doit);
296         if (ret < 0)
297                 return ret;
298
299         if (!doit)
300                 return 0;
301
302         mutex_lock(&chip->lock);
303         regval |= chip->config;
304         ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval);
305         if (ret < 0)
306                 goto unlock;
307
308         do {
309                 msleep(20);
310                 ret = i2c_smbus_read_byte_data(chip->client, AD7746_REG_CFG);
311                 if (ret < 0)
312                         goto unlock;
313
314         } while ((ret == regval) && timeout--);
315
316         mutex_unlock(&chip->lock);
317
318         return len;
319
320 unlock:
321         mutex_unlock(&chip->lock);
322         return ret;
323 }
324
325 static ssize_t ad7746_start_offset_calib(struct device *dev,
326                                          struct device_attribute *attr,
327                                          const char *buf,
328                                          size_t len)
329 {
330         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
331         int ret = ad7746_select_channel(indio_dev,
332                               &ad7746_channels[to_iio_dev_attr(attr)->address]);
333         if (ret < 0)
334                 return ret;
335
336         return ad7746_start_calib(dev, attr, buf, len,
337                                   AD7746_CONF_MODE_OFFS_CAL);
338 }
339
340 static ssize_t ad7746_start_gain_calib(struct device *dev,
341                                        struct device_attribute *attr,
342                                        const char *buf,
343                                        size_t len)
344 {
345         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
346         int ret = ad7746_select_channel(indio_dev,
347                               &ad7746_channels[to_iio_dev_attr(attr)->address]);
348         if (ret < 0)
349                 return ret;
350
351         return ad7746_start_calib(dev, attr, buf, len,
352                                   AD7746_CONF_MODE_GAIN_CAL);
353 }
354
355 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
356                        0200, NULL, ad7746_start_offset_calib, CIN1);
357 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
358                        0200, NULL, ad7746_start_offset_calib, CIN2);
359 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
360                        0200, NULL, ad7746_start_gain_calib, CIN1);
361 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
362                        0200, NULL, ad7746_start_gain_calib, CIN2);
363 static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration,
364                        0200, NULL, ad7746_start_gain_calib, VIN);
365
366 static int ad7746_store_cap_filter_rate_setup(struct ad7746_chip_info *chip,
367                                               int val)
368 {
369         int i;
370
371         for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++)
372                 if (val >= ad7746_cap_filter_rate_table[i][0])
373                         break;
374
375         if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table))
376                 i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
377
378         chip->config &= ~AD7746_CONF_CAPFS_MASK;
379         chip->config |= i << AD7746_CONF_CAPFS_SHIFT;
380
381         return 0;
382 }
383
384 static int ad7746_store_vt_filter_rate_setup(struct ad7746_chip_info *chip,
385                                              int val)
386 {
387         int i;
388
389         for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++)
390                 if (val >= ad7746_vt_filter_rate_table[i][0])
391                         break;
392
393         if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table))
394                 i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
395
396         chip->config &= ~AD7746_CONF_VTFS_MASK;
397         chip->config |= i << AD7746_CONF_VTFS_SHIFT;
398
399         return 0;
400 }
401
402 static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8");
403 static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available,
404                        "91 84 50 26 16 13 11 9");
405
406 static struct attribute *ad7746_attributes[] = {
407         &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
408         &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
409         &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
410         &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
411         &iio_dev_attr_in_voltage0_calibscale_calibration.dev_attr.attr,
412         &iio_const_attr_in_voltage_sampling_frequency_available.dev_attr.attr,
413         &iio_const_attr_in_capacitance_sampling_frequency_available.dev_attr.attr,
414         NULL,
415 };
416
417 static const struct attribute_group ad7746_attribute_group = {
418         .attrs = ad7746_attributes,
419 };
420
421 static int ad7746_write_raw(struct iio_dev *indio_dev,
422                             struct iio_chan_spec const *chan,
423                             int val,
424                             int val2,
425                             long mask)
426 {
427         struct ad7746_chip_info *chip = iio_priv(indio_dev);
428         int ret, reg;
429
430         mutex_lock(&chip->lock);
431
432         switch (mask) {
433         case IIO_CHAN_INFO_CALIBSCALE:
434                 if (val != 1) {
435                         ret = -EINVAL;
436                         goto out;
437                 }
438
439                 val = (val2 * 1024) / 15625;
440
441                 switch (chan->type) {
442                 case IIO_CAPACITANCE:
443                         reg = AD7746_REG_CAP_GAINH;
444                         break;
445                 case IIO_VOLTAGE:
446                         reg = AD7746_REG_VOLT_GAINH;
447                         break;
448                 default:
449                         ret = -EINVAL;
450                         goto out;
451                 }
452
453                 ret = i2c_smbus_write_word_swapped(chip->client, reg, val);
454                 if (ret < 0)
455                         goto out;
456
457                 ret = 0;
458                 break;
459         case IIO_CHAN_INFO_CALIBBIAS:
460                 if (val < 0 || val > 0xFFFF) {
461                         ret = -EINVAL;
462                         goto out;
463                 }
464                 ret = i2c_smbus_write_word_swapped(chip->client,
465                                                    AD7746_REG_CAP_OFFH, val);
466                 if (ret < 0)
467                         goto out;
468
469                 ret = 0;
470                 break;
471         case IIO_CHAN_INFO_OFFSET:
472                 if (val < 0 || val > 43008000) { /* 21pF */
473                         ret = -EINVAL;
474                         goto out;
475                 }
476
477                 /*
478                  * CAPDAC Scale = 21pF_typ / 127
479                  * CIN Scale = 8.192pF / 2^24
480                  * Offset Scale = CAPDAC Scale / CIN Scale = 338646
481                  */
482
483                 val /= 338646;
484
485                 chip->capdac[chan->channel][chan->differential] = val > 0 ?
486                         AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0;
487
488                 ret = i2c_smbus_write_byte_data(chip->client,
489                                                 AD7746_REG_CAPDACA,
490                                                 chip->capdac[chan->channel][0]);
491                 if (ret < 0)
492                         goto out;
493                 ret = i2c_smbus_write_byte_data(chip->client,
494                                                 AD7746_REG_CAPDACB,
495                                                 chip->capdac[chan->channel][1]);
496                 if (ret < 0)
497                         goto out;
498
499                 chip->capdac_set = chan->channel;
500
501                 ret = 0;
502                 break;
503         case IIO_CHAN_INFO_SAMP_FREQ:
504                 if (val2) {
505                         ret = -EINVAL;
506                         goto out;
507                 }
508
509                 switch (chan->type) {
510                 case IIO_CAPACITANCE:
511                         ret = ad7746_store_cap_filter_rate_setup(chip, val);
512                         break;
513                 case IIO_VOLTAGE:
514                         ret = ad7746_store_vt_filter_rate_setup(chip, val);
515                         break;
516                 default:
517                         ret = -EINVAL;
518                 }
519                 break;
520         default:
521                 ret = -EINVAL;
522         }
523
524 out:
525         mutex_unlock(&chip->lock);
526         return ret;
527 }
528
529 static int ad7746_read_raw(struct iio_dev *indio_dev,
530                            struct iio_chan_spec const *chan,
531                            int *val, int *val2,
532                            long mask)
533 {
534         struct ad7746_chip_info *chip = iio_priv(indio_dev);
535         int ret, delay, idx;
536         u8 regval, reg;
537
538         mutex_lock(&chip->lock);
539
540         switch (mask) {
541         case IIO_CHAN_INFO_RAW:
542         case IIO_CHAN_INFO_PROCESSED:
543                 ret = ad7746_select_channel(indio_dev, chan);
544                 if (ret < 0)
545                         goto out;
546                 delay = ret;
547
548                 regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV;
549                 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG,
550                                                 regval);
551                 if (ret < 0)
552                         goto out;
553
554                 msleep(delay);
555                 /* Now read the actual register */
556
557                 ret = i2c_smbus_read_i2c_block_data(chip->client,
558                                                     chan->address >> 8, 3,
559                                                     &chip->data.d8[1]);
560
561                 if (ret < 0)
562                         goto out;
563
564                 *val = (be32_to_cpu(chip->data.d32) & 0xFFFFFF) - 0x800000;
565
566                 switch (chan->type) {
567                 case IIO_TEMP:
568                 /*
569                  * temperature in milli degrees Celsius
570                  * T = ((*val / 2048) - 4096) * 1000
571                  */
572                         *val = (*val * 125) / 256;
573                         break;
574                 case IIO_VOLTAGE:
575                         if (chan->channel == 1) /* supply_raw*/
576                                 *val = *val * 6;
577                         break;
578                 default:
579                         break;
580                 }
581
582                 ret = IIO_VAL_INT;
583                 break;
584         case IIO_CHAN_INFO_CALIBSCALE:
585                 switch (chan->type) {
586                 case IIO_CAPACITANCE:
587                         reg = AD7746_REG_CAP_GAINH;
588                         break;
589                 case IIO_VOLTAGE:
590                         reg = AD7746_REG_VOLT_GAINH;
591                         break;
592                 default:
593                         ret = -EINVAL;
594                         goto out;
595                 }
596
597                 ret = i2c_smbus_read_word_swapped(chip->client, reg);
598                 if (ret < 0)
599                         goto out;
600                 /* 1 + gain_val / 2^16 */
601                 *val = 1;
602                 *val2 = (15625 * ret) / 1024;
603
604                 ret = IIO_VAL_INT_PLUS_MICRO;
605                 break;
606         case IIO_CHAN_INFO_CALIBBIAS:
607                 ret = i2c_smbus_read_word_swapped(chip->client,
608                                                   AD7746_REG_CAP_OFFH);
609                 if (ret < 0)
610                         goto out;
611                 *val = ret;
612
613                 ret = IIO_VAL_INT;
614                 break;
615         case IIO_CHAN_INFO_OFFSET:
616                 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
617                                           [chan->differential]) * 338646;
618
619                 ret = IIO_VAL_INT;
620                 break;
621         case IIO_CHAN_INFO_SCALE:
622                 switch (chan->type) {
623                 case IIO_CAPACITANCE:
624                         /* 8.192pf / 2^24 */
625                         *val =  0;
626                         *val2 = 488;
627                         ret = IIO_VAL_INT_PLUS_NANO;
628                         break;
629                 case IIO_VOLTAGE:
630                         /* 1170mV / 2^23 */
631                         *val = 1170;
632                         *val2 = 23;
633                         ret = IIO_VAL_FRACTIONAL_LOG2;
634                         break;
635                 default:
636                         ret = -EINVAL;
637                         break;
638                 }
639
640                 break;
641         case IIO_CHAN_INFO_SAMP_FREQ:
642                 switch (chan->type) {
643                 case IIO_CAPACITANCE:
644                         idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
645                                 AD7746_CONF_CAPFS_SHIFT;
646                         *val = ad7746_cap_filter_rate_table[idx][0];
647                         ret = IIO_VAL_INT;
648                         break;
649                 case IIO_VOLTAGE:
650                         idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
651                                 AD7746_CONF_VTFS_SHIFT;
652                         *val = ad7746_vt_filter_rate_table[idx][0];
653                         ret = IIO_VAL_INT;
654                         break;
655                 default:
656                         ret = -EINVAL;
657                 }
658                 break;
659         default:
660                 ret = -EINVAL;
661         }
662 out:
663         mutex_unlock(&chip->lock);
664         return ret;
665 }
666
667 static const struct iio_info ad7746_info = {
668         .attrs = &ad7746_attribute_group,
669         .read_raw = ad7746_read_raw,
670         .write_raw = ad7746_write_raw,
671 };
672
673 /*
674  * device probe and remove
675  */
676
677 static int ad7746_probe(struct i2c_client *client,
678                         const struct i2c_device_id *id)
679 {
680         struct ad7746_platform_data *pdata = client->dev.platform_data;
681         struct ad7746_chip_info *chip;
682         struct iio_dev *indio_dev;
683         unsigned char regval = 0;
684         int ret = 0;
685
686         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
687         if (!indio_dev)
688                 return -ENOMEM;
689         chip = iio_priv(indio_dev);
690         mutex_init(&chip->lock);
691         /* this is only used for device removal purposes */
692         i2c_set_clientdata(client, indio_dev);
693
694         chip->client = client;
695         chip->capdac_set = -1;
696
697         /* Establish that the iio_dev is a child of the i2c device */
698         indio_dev->name = id->name;
699         indio_dev->dev.parent = &client->dev;
700         indio_dev->info = &ad7746_info;
701         indio_dev->channels = ad7746_channels;
702         if (id->driver_data == 7746)
703                 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
704         else
705                 indio_dev->num_channels =  ARRAY_SIZE(ad7746_channels) - 2;
706         indio_dev->modes = INDIO_DIRECT_MODE;
707
708         if (pdata) {
709                 if (pdata->exca_en) {
710                         if (pdata->exca_inv_en)
711                                 regval |= AD7746_EXCSETUP_NEXCA;
712                         else
713                                 regval |= AD7746_EXCSETUP_EXCA;
714                 }
715
716                 if (pdata->excb_en) {
717                         if (pdata->excb_inv_en)
718                                 regval |= AD7746_EXCSETUP_NEXCB;
719                         else
720                                 regval |= AD7746_EXCSETUP_EXCB;
721                 }
722
723                 regval |= AD7746_EXCSETUP_EXCLVL(pdata->exclvl);
724         } else {
725                 dev_warn(&client->dev, "No platform data? using default\n");
726                 regval = AD7746_EXCSETUP_EXCA | AD7746_EXCSETUP_EXCB |
727                         AD7746_EXCSETUP_EXCLVL(3);
728         }
729
730         ret = i2c_smbus_write_byte_data(chip->client,
731                                         AD7746_REG_EXC_SETUP, regval);
732         if (ret < 0)
733                 return ret;
734
735         ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
736         if (ret)
737                 return ret;
738
739         return 0;
740 }
741
742 static const struct i2c_device_id ad7746_id[] = {
743         { "ad7745", 7745 },
744         { "ad7746", 7746 },
745         { "ad7747", 7747 },
746         {}
747 };
748
749 MODULE_DEVICE_TABLE(i2c, ad7746_id);
750
751 static struct i2c_driver ad7746_driver = {
752         .driver = {
753                 .name = KBUILD_MODNAME,
754         },
755         .probe = ad7746_probe,
756         .id_table = ad7746_id,
757 };
758 module_i2c_driver(ad7746_driver);
759
760 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
761 MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver");
762 MODULE_LICENSE("GPL v2");