2 * AD7280A Lithium Ion Battery Monitoring System
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/events.h>
26 #define AD7280A_CELL_VOLTAGE_1 0x0 /* D11 to D0, Read only */
27 #define AD7280A_CELL_VOLTAGE_2 0x1 /* D11 to D0, Read only */
28 #define AD7280A_CELL_VOLTAGE_3 0x2 /* D11 to D0, Read only */
29 #define AD7280A_CELL_VOLTAGE_4 0x3 /* D11 to D0, Read only */
30 #define AD7280A_CELL_VOLTAGE_5 0x4 /* D11 to D0, Read only */
31 #define AD7280A_CELL_VOLTAGE_6 0x5 /* D11 to D0, Read only */
32 #define AD7280A_AUX_ADC_1 0x6 /* D11 to D0, Read only */
33 #define AD7280A_AUX_ADC_2 0x7 /* D11 to D0, Read only */
34 #define AD7280A_AUX_ADC_3 0x8 /* D11 to D0, Read only */
35 #define AD7280A_AUX_ADC_4 0x9 /* D11 to D0, Read only */
36 #define AD7280A_AUX_ADC_5 0xA /* D11 to D0, Read only */
37 #define AD7280A_AUX_ADC_6 0xB /* D11 to D0, Read only */
38 #define AD7280A_SELF_TEST 0xC /* D11 to D0, Read only */
39 #define AD7280A_CONTROL_HB 0xD /* D15 to D8, Read/write */
40 #define AD7280A_CONTROL_LB 0xE /* D7 to D0, Read/write */
41 #define AD7280A_CELL_OVERVOLTAGE 0xF /* D7 to D0, Read/write */
42 #define AD7280A_CELL_UNDERVOLTAGE 0x10 /* D7 to D0, Read/write */
43 #define AD7280A_AUX_ADC_OVERVOLTAGE 0x11 /* D7 to D0, Read/write */
44 #define AD7280A_AUX_ADC_UNDERVOLTAGE 0x12 /* D7 to D0, Read/write */
45 #define AD7280A_ALERT 0x13 /* D7 to D0, Read/write */
46 #define AD7280A_CELL_BALANCE 0x14 /* D7 to D0, Read/write */
47 #define AD7280A_CB1_TIMER 0x15 /* D7 to D0, Read/write */
48 #define AD7280A_CB2_TIMER 0x16 /* D7 to D0, Read/write */
49 #define AD7280A_CB3_TIMER 0x17 /* D7 to D0, Read/write */
50 #define AD7280A_CB4_TIMER 0x18 /* D7 to D0, Read/write */
51 #define AD7280A_CB5_TIMER 0x19 /* D7 to D0, Read/write */
52 #define AD7280A_CB6_TIMER 0x1A /* D7 to D0, Read/write */
53 #define AD7280A_PD_TIMER 0x1B /* D7 to D0, Read/write */
54 #define AD7280A_READ 0x1C /* D7 to D0, Read/write */
55 #define AD7280A_CNVST_CONTROL 0x1D /* D7 to D0, Read/write */
58 #define AD7280A_CTRL_HB_CONV_INPUT_ALL 0
59 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6)
60 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7)
61 #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6))
62 #define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0
63 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4)
64 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5)
65 #define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4))
66 #define AD7280A_CTRL_HB_CONV_START_CNVST 0
67 #define AD7280A_CTRL_HB_CONV_START_CS BIT(3)
68 #define AD7280A_CTRL_HB_CONV_AVG_DIS 0
69 #define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1)
70 #define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2)
71 #define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1))
72 #define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1)
73 #define AD7280A_CTRL_HB_PWRDN_SW BIT(0)
75 #define AD7280A_CTRL_LB_SWRST BIT(7)
76 #define AD7280A_CTRL_LB_ACQ_TIME_400ns 0
77 #define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5)
78 #define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6)
79 #define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5))
80 #define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5)
81 #define AD7280A_CTRL_LB_MUST_SET BIT(4)
82 #define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3)
83 #define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2)
84 #define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1)
85 #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0)
87 #define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6)
88 #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6))
90 #define AD7280A_ALL_CELLS (0xAD << 16)
92 #define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */
93 #define AD7280A_MAX_CHAIN 8
94 #define AD7280A_CELLS_PER_DEV 6
95 #define AD7280A_BITS 12
96 #define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \
97 AD7280A_CELL_VOLTAGE_1 + 1)
99 #define AD7280A_DEVADDR_MASTER 0
100 #define AD7280A_DEVADDR_ALL 0x1F
101 /* 5-bit device address is sent LSB first */
102 static unsigned int ad7280a_devaddr(unsigned int addr)
104 return ((addr & 0x1) << 4) |
105 ((addr & 0x2) << 2) |
107 ((addr & 0x8) >> 2) |
108 ((addr & 0x10) >> 4);
111 /* During a read a valid write is mandatory.
112 * So writing to the highest available address (Address 0x1F)
113 * and setting the address all parts bit to 0 is recommended
114 * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
116 #define AD7280A_READ_TXVAL 0xF800030A
121 * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
124 #define POLYNOM_ORDER 8
125 #define HIGHBIT (1 << (POLYNOM_ORDER - 1))
127 struct ad7280_state {
128 struct spi_device *spi;
129 struct iio_chan_spec *channels;
130 struct iio_dev_attr *iio_attr;
133 int readback_delay_us;
134 unsigned char crc_tab[256];
135 unsigned char ctrl_hb;
136 unsigned char ctrl_lb;
137 unsigned char cell_threshhigh;
138 unsigned char cell_threshlow;
139 unsigned char aux_threshhigh;
140 unsigned char aux_threshlow;
141 unsigned char cb_mask[AD7280A_MAX_CHAIN];
142 struct mutex lock; /* protect sensor state */
144 __be32 buf[2] ____cacheline_aligned;
147 static void ad7280_crc8_build_table(unsigned char *crc_tab)
149 unsigned char bit, crc;
152 for (cnt = 0; cnt < 256; cnt++) {
154 for (i = 0; i < 8; i++) {
164 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val)
168 crc = crc_tab[val >> 16 & 0xFF];
169 crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
171 return crc ^ (val & 0xFF);
174 static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)
176 unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
178 if (crc != ((val >> 2) & 0xFF))
184 /* After initiating a conversion sequence we need to wait until the
185 * conversion is done. The delay is typically in the range of 15..30 us
186 * however depending an the number of devices in the daisy chain and the
187 * number of averages taken, conversion delays and acquisition time options
188 * it may take up to 250us, in this case we better sleep instead of busy
192 static void ad7280_delay(struct ad7280_state *st)
194 if (st->readback_delay_us < 50)
195 udelay(st->readback_delay_us);
197 usleep_range(250, 500);
200 static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)
203 struct spi_transfer t = {
204 .tx_buf = &st->buf[0],
205 .rx_buf = &st->buf[1],
209 st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL);
211 ret = spi_sync_transfer(st->spi, &t, 1);
215 *val = be32_to_cpu(st->buf[1]);
220 static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,
221 unsigned int addr, bool all, unsigned int val)
223 unsigned int reg = devaddr << 27 | addr << 21 |
224 (val & 0xFF) << 13 | all << 12;
226 reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
227 st->buf[0] = cpu_to_be32(reg);
229 return spi_write(st->spi, &st->buf[0], 4);
232 static int ad7280_read(struct ad7280_state *st, unsigned int devaddr,
238 /* turns off the read operation on all parts */
239 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
240 AD7280A_CTRL_HB_CONV_INPUT_ALL |
241 AD7280A_CTRL_HB_CONV_RES_READ_NO |
246 /* turns on the read operation on the addressed part */
247 ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
248 AD7280A_CTRL_HB_CONV_INPUT_ALL |
249 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
254 /* Set register address on the part to be read from */
255 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
259 ret = __ad7280_read32(st, &tmp);
263 if (ad7280_check_crc(st, tmp))
266 if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
269 return (tmp >> 13) & 0xFF;
272 static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,
278 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
282 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
283 AD7280A_CTRL_HB_CONV_INPUT_ALL |
284 AD7280A_CTRL_HB_CONV_RES_READ_NO |
289 ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
290 AD7280A_CTRL_HB_CONV_INPUT_ALL |
291 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
292 AD7280A_CTRL_HB_CONV_START_CS |
299 ret = __ad7280_read32(st, &tmp);
303 if (ad7280_check_crc(st, tmp))
306 if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
309 return (tmp >> 11) & 0xFFF;
312 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,
316 unsigned int tmp, sum = 0;
318 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
319 AD7280A_CELL_VOLTAGE_1 << 2);
323 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
324 AD7280A_CTRL_HB_CONV_INPUT_ALL |
325 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
326 AD7280A_CTRL_HB_CONV_START_CS |
333 for (i = 0; i < cnt; i++) {
334 ret = __ad7280_read32(st, &tmp);
338 if (ad7280_check_crc(st, tmp))
343 /* only sum cell voltages */
344 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
345 sum += ((tmp >> 11) & 0xFFF);
351 static int ad7280_chain_setup(struct ad7280_state *st)
356 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
357 AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
358 AD7280A_CTRL_LB_LOCK_DEV_ADDR |
359 AD7280A_CTRL_LB_MUST_SET |
360 AD7280A_CTRL_LB_SWRST |
365 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
366 AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
367 AD7280A_CTRL_LB_LOCK_DEV_ADDR |
368 AD7280A_CTRL_LB_MUST_SET |
373 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
374 AD7280A_CONTROL_LB << 2);
378 for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
379 ret = __ad7280_read32(st, &val);
386 if (ad7280_check_crc(st, val))
389 if (n != ad7280a_devaddr(val >> 27))
396 static ssize_t ad7280_show_balance_sw(struct device *dev,
397 struct device_attribute *attr,
400 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
401 struct ad7280_state *st = iio_priv(indio_dev);
402 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
404 return sprintf(buf, "%d\n",
405 !!(st->cb_mask[this_attr->address >> 8] &
406 (1 << ((this_attr->address & 0xFF) + 2))));
409 static ssize_t ad7280_store_balance_sw(struct device *dev,
410 struct device_attribute *attr,
414 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
415 struct ad7280_state *st = iio_priv(indio_dev);
416 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
419 unsigned int devaddr, ch;
421 ret = strtobool(buf, &readin);
425 devaddr = this_attr->address >> 8;
426 ch = this_attr->address & 0xFF;
428 mutex_lock(&st->lock);
430 st->cb_mask[devaddr] |= 1 << (ch + 2);
432 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
434 ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
435 0, st->cb_mask[devaddr]);
436 mutex_unlock(&st->lock);
438 return ret ? ret : len;
441 static ssize_t ad7280_show_balance_timer(struct device *dev,
442 struct device_attribute *attr,
445 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
446 struct ad7280_state *st = iio_priv(indio_dev);
447 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
451 mutex_lock(&st->lock);
452 ret = ad7280_read(st, this_attr->address >> 8,
453 this_attr->address & 0xFF);
454 mutex_unlock(&st->lock);
459 msecs = (ret >> 3) * 71500;
461 return sprintf(buf, "%u\n", msecs);
464 static ssize_t ad7280_store_balance_timer(struct device *dev,
465 struct device_attribute *attr,
469 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
470 struct ad7280_state *st = iio_priv(indio_dev);
471 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
475 ret = kstrtoul(buf, 10, &val);
484 mutex_lock(&st->lock);
485 ret = ad7280_write(st, this_attr->address >> 8,
486 this_attr->address & 0xFF,
487 0, (val & 0x1F) << 3);
488 mutex_unlock(&st->lock);
490 return ret ? ret : len;
493 static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
494 AD7280A_CELLS_PER_DEV * 2 + 1];
496 static const struct attribute_group ad7280_attrs_group = {
497 .attrs = ad7280_attributes,
500 static int ad7280_channel_init(struct ad7280_state *st)
504 st->channels = kcalloc((st->slave_num + 1) * 12 + 2,
505 sizeof(*st->channels), GFP_KERNEL);
509 for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
510 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6;
512 if (ch < AD7280A_AUX_ADC_1) {
513 st->channels[cnt].type = IIO_VOLTAGE;
514 st->channels[cnt].differential = 1;
515 st->channels[cnt].channel = (dev * 6) + ch;
516 st->channels[cnt].channel2 =
517 st->channels[cnt].channel + 1;
519 st->channels[cnt].type = IIO_TEMP;
520 st->channels[cnt].channel = (dev * 6) + ch - 6;
522 st->channels[cnt].indexed = 1;
523 st->channels[cnt].info_mask_separate =
524 BIT(IIO_CHAN_INFO_RAW);
525 st->channels[cnt].info_mask_shared_by_type =
526 BIT(IIO_CHAN_INFO_SCALE);
527 st->channels[cnt].address =
528 ad7280a_devaddr(dev) << 8 | ch;
529 st->channels[cnt].scan_index = cnt;
530 st->channels[cnt].scan_type.sign = 'u';
531 st->channels[cnt].scan_type.realbits = 12;
532 st->channels[cnt].scan_type.storagebits = 32;
533 st->channels[cnt].scan_type.shift = 0;
536 st->channels[cnt].type = IIO_VOLTAGE;
537 st->channels[cnt].differential = 1;
538 st->channels[cnt].channel = 0;
539 st->channels[cnt].channel2 = dev * 6;
540 st->channels[cnt].address = AD7280A_ALL_CELLS;
541 st->channels[cnt].indexed = 1;
542 st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
543 st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
544 st->channels[cnt].scan_index = cnt;
545 st->channels[cnt].scan_type.sign = 'u';
546 st->channels[cnt].scan_type.realbits = 32;
547 st->channels[cnt].scan_type.storagebits = 32;
548 st->channels[cnt].scan_type.shift = 0;
550 st->channels[cnt].type = IIO_TIMESTAMP;
551 st->channels[cnt].channel = -1;
552 st->channels[cnt].scan_index = cnt;
553 st->channels[cnt].scan_type.sign = 's';
554 st->channels[cnt].scan_type.realbits = 64;
555 st->channels[cnt].scan_type.storagebits = 64;
556 st->channels[cnt].scan_type.shift = 0;
561 static int ad7280_attr_init(struct ad7280_state *st)
565 st->iio_attr = kcalloc(2, sizeof(*st->iio_attr) *
566 (st->slave_num + 1) * AD7280A_CELLS_PER_DEV,
571 for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
572 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6;
574 st->iio_attr[cnt].address =
575 ad7280a_devaddr(dev) << 8 | ch;
576 st->iio_attr[cnt].dev_attr.attr.mode =
578 st->iio_attr[cnt].dev_attr.show =
579 ad7280_show_balance_sw;
580 st->iio_attr[cnt].dev_attr.store =
581 ad7280_store_balance_sw;
582 st->iio_attr[cnt].dev_attr.attr.name =
583 kasprintf(GFP_KERNEL,
584 "in%d-in%d_balance_switch_en",
585 dev * AD7280A_CELLS_PER_DEV + ch,
586 dev * AD7280A_CELLS_PER_DEV + ch + 1);
587 ad7280_attributes[cnt] =
588 &st->iio_attr[cnt].dev_attr.attr;
590 st->iio_attr[cnt].address =
591 ad7280a_devaddr(dev) << 8 |
592 (AD7280A_CB1_TIMER + ch);
593 st->iio_attr[cnt].dev_attr.attr.mode =
595 st->iio_attr[cnt].dev_attr.show =
596 ad7280_show_balance_timer;
597 st->iio_attr[cnt].dev_attr.store =
598 ad7280_store_balance_timer;
599 st->iio_attr[cnt].dev_attr.attr.name =
600 kasprintf(GFP_KERNEL,
601 "in%d-in%d_balance_timer",
602 dev * AD7280A_CELLS_PER_DEV + ch,
603 dev * AD7280A_CELLS_PER_DEV + ch + 1);
604 ad7280_attributes[cnt] =
605 &st->iio_attr[cnt].dev_attr.attr;
608 ad7280_attributes[cnt] = NULL;
613 static ssize_t ad7280_read_channel_config(struct device *dev,
614 struct device_attribute *attr,
617 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
618 struct ad7280_state *st = iio_priv(indio_dev);
619 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
622 switch ((u32)this_attr->address) {
623 case AD7280A_CELL_OVERVOLTAGE:
624 val = 1000 + (st->cell_threshhigh * 1568) / 100;
626 case AD7280A_CELL_UNDERVOLTAGE:
627 val = 1000 + (st->cell_threshlow * 1568) / 100;
629 case AD7280A_AUX_ADC_OVERVOLTAGE:
630 val = (st->aux_threshhigh * 196) / 10;
632 case AD7280A_AUX_ADC_UNDERVOLTAGE:
633 val = (st->aux_threshlow * 196) / 10;
639 return sprintf(buf, "%u\n", val);
642 static ssize_t ad7280_write_channel_config(struct device *dev,
643 struct device_attribute *attr,
647 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
648 struct ad7280_state *st = iio_priv(indio_dev);
649 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
654 ret = kstrtol(buf, 10, &val);
658 switch ((u32)this_attr->address) {
659 case AD7280A_CELL_OVERVOLTAGE:
660 case AD7280A_CELL_UNDERVOLTAGE:
661 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
663 case AD7280A_AUX_ADC_OVERVOLTAGE:
664 case AD7280A_AUX_ADC_UNDERVOLTAGE:
665 val = (val * 10) / 196; /* LSB 19.6mV */
671 val = clamp(val, 0L, 0xFFL);
673 mutex_lock(&st->lock);
674 switch ((u32)this_attr->address) {
675 case AD7280A_CELL_OVERVOLTAGE:
676 st->cell_threshhigh = val;
678 case AD7280A_CELL_UNDERVOLTAGE:
679 st->cell_threshlow = val;
681 case AD7280A_AUX_ADC_OVERVOLTAGE:
682 st->aux_threshhigh = val;
684 case AD7280A_AUX_ADC_UNDERVOLTAGE:
685 st->aux_threshlow = val;
689 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
690 this_attr->address, 1, val);
692 mutex_unlock(&st->lock);
694 return ret ? ret : len;
697 static irqreturn_t ad7280_event_handler(int irq, void *private)
699 struct iio_dev *indio_dev = private;
700 struct ad7280_state *st = iio_priv(indio_dev);
701 unsigned int *channels;
704 channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
708 ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
712 for (i = 0; i < st->scan_cnt; i++) {
713 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
714 if (((channels[i] >> 11) & 0xFFF) >=
716 iio_push_event(indio_dev,
717 IIO_EVENT_CODE(IIO_VOLTAGE,
723 iio_get_time_ns(indio_dev));
724 else if (((channels[i] >> 11) & 0xFFF) <=
726 iio_push_event(indio_dev,
727 IIO_EVENT_CODE(IIO_VOLTAGE,
733 iio_get_time_ns(indio_dev));
735 if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh)
736 iio_push_event(indio_dev,
737 IIO_UNMOD_EVENT_CODE(
742 iio_get_time_ns(indio_dev));
743 else if (((channels[i] >> 11) & 0xFFF) <=
745 iio_push_event(indio_dev,
746 IIO_UNMOD_EVENT_CODE(
751 iio_get_time_ns(indio_dev));
761 static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
762 in_voltage-voltage_thresh_low_value,
764 ad7280_read_channel_config,
765 ad7280_write_channel_config,
766 AD7280A_CELL_UNDERVOLTAGE);
768 static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
769 in_voltage-voltage_thresh_high_value,
771 ad7280_read_channel_config,
772 ad7280_write_channel_config,
773 AD7280A_CELL_OVERVOLTAGE);
775 static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
777 ad7280_read_channel_config,
778 ad7280_write_channel_config,
779 AD7280A_AUX_ADC_UNDERVOLTAGE);
781 static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
783 ad7280_read_channel_config,
784 ad7280_write_channel_config,
785 AD7280A_AUX_ADC_OVERVOLTAGE);
787 static struct attribute *ad7280_event_attributes[] = {
788 &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
789 &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
790 &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
791 &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
795 static const struct attribute_group ad7280_event_attrs_group = {
796 .attrs = ad7280_event_attributes,
799 static int ad7280_read_raw(struct iio_dev *indio_dev,
800 struct iio_chan_spec const *chan,
805 struct ad7280_state *st = iio_priv(indio_dev);
809 case IIO_CHAN_INFO_RAW:
810 mutex_lock(&st->lock);
811 if (chan->address == AD7280A_ALL_CELLS)
812 ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
814 ret = ad7280_read_channel(st, chan->address >> 8,
815 chan->address & 0xFF);
816 mutex_unlock(&st->lock);
824 case IIO_CHAN_INFO_SCALE:
825 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
830 *val2 = AD7280A_BITS;
831 return IIO_VAL_FRACTIONAL_LOG2;
836 static const struct iio_info ad7280_info = {
837 .read_raw = ad7280_read_raw,
838 .event_attrs = &ad7280_event_attrs_group,
839 .attrs = &ad7280_attrs_group,
840 .driver_module = THIS_MODULE,
843 static const struct ad7280_platform_data ad7793_default_pdata = {
844 .acquisition_time = AD7280A_ACQ_TIME_400ns,
845 .conversion_averaging = AD7280A_CONV_AVG_DIS,
846 .thermistor_term_en = true,
849 static int ad7280_probe(struct spi_device *spi)
851 const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev);
852 struct ad7280_state *st;
854 const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
855 const unsigned short nAVG[4] = {1, 2, 4, 8};
856 struct iio_dev *indio_dev;
858 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
862 st = iio_priv(indio_dev);
863 spi_set_drvdata(spi, indio_dev);
865 mutex_init(&st->lock);
868 pdata = &ad7793_default_pdata;
870 ad7280_crc8_build_table(st->crc_tab);
872 st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
873 st->spi->mode = SPI_MODE_1;
876 st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
877 st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
878 & 0x3) | (pdata->thermistor_term_en ?
879 AD7280A_CTRL_LB_THERMISTOR_EN : 0);
881 ret = ad7280_chain_setup(st);
886 st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
887 st->cell_threshhigh = 0xFF;
888 st->aux_threshhigh = 0xFF;
891 * Total Conversion Time = ((tACQ + tCONV) *
892 * (Number of Conversions per Part)) −
893 * tACQ + ((N - 1) * tDELAY)
895 * Readback Delay = Total Conversion Time + tWAIT
898 st->readback_delay_us =
899 ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) *
900 (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3]))
901 - tACQ_ns[pdata->acquisition_time & 0x3] +
904 /* Convert to usecs */
905 st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
906 st->readback_delay_us += 5; /* Add tWAIT */
908 indio_dev->name = spi_get_device_id(spi)->name;
909 indio_dev->dev.parent = &spi->dev;
910 indio_dev->modes = INDIO_DIRECT_MODE;
912 ret = ad7280_channel_init(st);
916 indio_dev->num_channels = ret;
917 indio_dev->channels = st->channels;
918 indio_dev->info = &ad7280_info;
920 ret = ad7280_attr_init(st);
922 goto error_free_channels;
924 ret = iio_device_register(indio_dev);
926 goto error_free_attr;
929 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
931 AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
933 goto error_unregister;
935 ret = ad7280_write(st, ad7280a_devaddr(st->slave_num),
937 AD7280A_ALERT_GEN_STATIC_HIGH |
938 (pdata->chain_last_alert_ignore & 0xF));
940 goto error_unregister;
942 ret = request_threaded_irq(spi->irq,
944 ad7280_event_handler,
945 IRQF_TRIGGER_FALLING |
950 goto error_unregister;
955 iio_device_unregister(indio_dev);
966 static int ad7280_remove(struct spi_device *spi)
968 struct iio_dev *indio_dev = spi_get_drvdata(spi);
969 struct ad7280_state *st = iio_priv(indio_dev);
972 free_irq(spi->irq, indio_dev);
973 iio_device_unregister(indio_dev);
975 ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
976 AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
984 static const struct spi_device_id ad7280_id[] = {
988 MODULE_DEVICE_TABLE(spi, ad7280_id);
990 static struct spi_driver ad7280_driver = {
994 .probe = ad7280_probe,
995 .remove = ad7280_remove,
996 .id_table = ad7280_id,
998 module_spi_driver(ad7280_driver);
1000 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
1001 MODULE_DESCRIPTION("Analog Devices AD7280A");
1002 MODULE_LICENSE("GPL v2");