drivers/staging/emxx_udc/emxx_udc.c

   1 /*
   2  *  drivers/usb/gadget/emxx_udc.c
   3  *     EMXX FCD (Function Controller Driver) for USB.
   4  *
   5  *  Copyright (C) 2010 Renesas Electronics Corporation
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2
   9  *  as published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  *  GNU General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/delay.h>
  21 #include <linux/ioport.h>
  22 #include <linux/slab.h>
  23 #include <linux/errno.h>
  24 #include <linux/list.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/proc_fs.h>
  27 #include <linux/clk.h>
  28 #include <linux/ctype.h>
  29 #include <linux/string.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/workqueue.h>
  32 #include <linux/device.h>
  33
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36
  37 #include <linux/irq.h>
  38 #include <linux/gpio.h>
  39
  40 #include "emxx_udc.h"
  41
  42 #define DRIVER_DESC     "EMXX UDC driver"
  43 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  44
  45 static const char       driver_name[] = "emxx_udc";
  46 static const char       driver_desc[] = DRIVER_DESC;
  47
  48 /*===========================================================================*/
  49 /* Prototype */
  50 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
  51 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
  52 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
  53 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
  54 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
  55 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
  56
  57 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
  58 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
  59
  60 /*===========================================================================*/
  61 /* Macro */
  62 #define _nbu2ss_zero_len_pkt(udc, epnum)        \
  63         _nbu2ss_ep_in_end(udc, epnum, 0, 0)
  64
  65 /*===========================================================================*/
  66 /* Global */
  67 struct nbu2ss_udc udc_controller;
  68
  69 /*-------------------------------------------------------------------------*/
  70 /* Read */
  71 static inline u32 _nbu2ss_readl(void *address)
  72 {
  73         return __raw_readl(address);
  74 }
  75
  76 /*-------------------------------------------------------------------------*/
  77 /* Write */
  78 static inline void _nbu2ss_writel(void *address, u32 udata)
  79 {
  80         __raw_writel(udata, address);
  81 }
  82
  83 /*-------------------------------------------------------------------------*/
  84 /* Set Bit */
  85 static inline void _nbu2ss_bitset(void *address, u32 udata)
  86 {
  87         u32     reg_dt = __raw_readl(address) | (udata);
  88
  89         __raw_writel(reg_dt, address);
  90 }
  91
  92 /*-------------------------------------------------------------------------*/
  93 /* Clear Bit */
  94 static inline void _nbu2ss_bitclr(void *address, u32 udata)
  95 {
  96         u32     reg_dt = __raw_readl(address) & ~(udata);
  97
  98         __raw_writel(reg_dt, address);
  99 }
 100
 101 #ifdef UDC_DEBUG_DUMP
 102 /*-------------------------------------------------------------------------*/
 103 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
 104 {
 105         int             i;
 106         u32 reg_data;
 107
 108         pr_info("=== %s()\n", __func__);
 109
 110         if (!udc) {
 111                 pr_err("%s udc == NULL\n", __func__);
 112                 return;
 113         }
 114
 115         spin_unlock(&udc->lock);
 116
 117         dev_dbg(&udc->dev, "\n-USB REG-\n");
 118         for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
 119                 reg_data =   _nbu2ss_readl(
 120                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
 121                 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
 122
 123                 reg_data =  _nbu2ss_readl(
 124                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
 125                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 126
 127                 reg_data =  _nbu2ss_readl(
 128                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
 129                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 130
 131                 reg_data =  _nbu2ss_readl(
 132                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
 133                 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
 134         }
 135
 136         spin_lock(&udc->lock);
 137 }
 138 #endif /* UDC_DEBUG_DUMP */
 139
 140 /*-------------------------------------------------------------------------*/
 141 /* Endpoint 0 Callback (Complete) */
 142 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
 143 {
 144         u8              recipient;
 145         u16             selector;
 146         u32             test_mode;
 147         struct usb_ctrlrequest  *p_ctrl;
 148         struct nbu2ss_udc *udc;
 149
 150         if ((!_ep) || (!_req))
 151                 return;
 152
 153         udc = (struct nbu2ss_udc *)_req->context;
 154         p_ctrl = &udc->ctrl;
 155         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 156                 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
 157                         /*-------------------------------------------------*/
 158                         /* SET_FEATURE */
 159                         recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
 160                         selector  = p_ctrl->wValue;
 161                         if ((recipient == USB_RECIP_DEVICE) &&
 162                             (selector == USB_DEVICE_TEST_MODE)) {
 163                                 test_mode = (u32)(p_ctrl->wIndex >> 8);
 164                                 _nbu2ss_set_test_mode(udc, test_mode);
 165                         }
 166                 }
 167         }
 168 }
 169
 170 /*-------------------------------------------------------------------------*/
 171 /* Initialization usb_request */
 172 static void _nbu2ss_create_ep0_packet(
 173         struct nbu2ss_udc *udc,
 174         void *p_buf,
 175         unsigned length
 176 )
 177 {
 178         udc->ep0_req.req.buf            = p_buf;
 179         udc->ep0_req.req.length         = length;
 180         udc->ep0_req.req.dma            = 0;
 181         udc->ep0_req.req.zero           = TRUE;
 182         udc->ep0_req.req.complete       = _nbu2ss_ep0_complete;
 183         udc->ep0_req.req.status         = -EINPROGRESS;
 184         udc->ep0_req.req.context        = udc;
 185         udc->ep0_req.req.actual         = 0;
 186 }
 187
 188 /*-------------------------------------------------------------------------*/
 189 /* Acquisition of the first address of RAM(FIFO) */
 190 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
 191 {
 192         u32             num, buf_type;
 193         u32             data, last_ram_adr, use_ram_size;
 194
 195         struct ep_regs *p_ep_regs;
 196
 197         last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
 198         use_ram_size = 0;
 199
 200         for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
 201                 p_ep_regs = &udc->p_regs->EP_REGS[num];
 202                 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
 203                 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPN_BUF_TYPE;
 204                 if (buf_type == 0) {
 205                         /* Single Buffer */
 206                         use_ram_size += (data & EPN_MPKT) / sizeof(u32);
 207                 } else {
 208                         /* Double Buffer */
 209                         use_ram_size += ((data & EPN_MPKT) / sizeof(u32)) * 2;
 210                 }
 211
 212                 if ((data >> 16) > last_ram_adr)
 213                         last_ram_adr = data >> 16;
 214         }
 215
 216         return last_ram_adr + use_ram_size;
 217 }
 218
 219 /*-------------------------------------------------------------------------*/
 220 /* Construction of Endpoint */
 221 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 222 {
 223         u32             num;
 224         u32             data;
 225         u32             begin_adrs;
 226
 227         if (ep->epnum == 0)
 228                 return  -EINVAL;
 229
 230         num = ep->epnum - 1;
 231
 232         /*-------------------------------------------------------------*/
 233         /* RAM Transfer Address */
 234         begin_adrs = _nbu2ss_get_begin_ram_address(udc);
 235         data = (begin_adrs << 16) | ep->ep.maxpacket;
 236         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
 237
 238         /*-------------------------------------------------------------*/
 239         /* Interrupt Enable */
 240         data = 1 << (ep->epnum + 8);
 241         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
 242
 243         /*-------------------------------------------------------------*/
 244         /* Endpoint Type(Mode) */
 245         /*   Bulk, Interrupt, ISO */
 246         switch (ep->ep_type) {
 247         case USB_ENDPOINT_XFER_BULK:
 248                 data = EPN_BULK;
 249                 break;
 250
 251         case USB_ENDPOINT_XFER_INT:
 252                 data = EPN_BUF_SINGLE | EPN_INTERRUPT;
 253                 break;
 254
 255         case USB_ENDPOINT_XFER_ISOC:
 256                 data = EPN_ISO;
 257                 break;
 258
 259         default:
 260                 data = 0;
 261                 break;
 262         }
 263
 264         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 265         _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum | ep->direct));
 266
 267         if (ep->direct == USB_DIR_OUT) {
 268                 /*---------------------------------------------------------*/
 269                 /* OUT */
 270                 data = EPN_EN | EPN_BCLR | EPN_DIR0;
 271                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 272
 273                 data = EPN_ONAK | EPN_OSTL_EN | EPN_OSTL;
 274                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 275
 276                 data = EPN_OUT_EN | EPN_OUT_END_EN;
 277                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 278         } else {
 279                 /*---------------------------------------------------------*/
 280                 /* IN */
 281                 data = EPN_EN | EPN_BCLR | EPN_AUTO;
 282                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 283
 284                 data = EPN_ISTL;
 285                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 286
 287                 data = EPN_IN_EN | EPN_IN_END_EN;
 288                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 289         }
 290
 291         return 0;
 292 }
 293
 294 /*-------------------------------------------------------------------------*/
 295 /* Release of Endpoint */
 296 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 297 {
 298         u32             num;
 299         u32             data;
 300
 301         if ((ep->epnum == 0) || (udc->vbus_active == 0))
 302                 return  -EINVAL;
 303
 304         num = ep->epnum - 1;
 305
 306         /*-------------------------------------------------------------*/
 307         /* RAM Transfer Address */
 308         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
 309
 310         /*-------------------------------------------------------------*/
 311         /* Interrupt Disable */
 312         data = 1 << (ep->epnum + 8);
 313         _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
 314
 315         if (ep->direct == USB_DIR_OUT) {
 316                 /*---------------------------------------------------------*/
 317                 /* OUT */
 318                 data = EPN_ONAK | EPN_BCLR;
 319                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 320
 321                 data = EPN_EN | EPN_DIR0;
 322                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 323
 324                 data = EPN_OUT_EN | EPN_OUT_END_EN;
 325                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 326         } else {
 327                 /*---------------------------------------------------------*/
 328                 /* IN */
 329                 data = EPN_BCLR;
 330                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 331
 332                 data = EPN_EN | EPN_AUTO;
 333                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 334
 335                 data = EPN_IN_EN | EPN_IN_END_EN;
 336                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 337         }
 338
 339         return 0;
 340 }
 341
 342 /*-------------------------------------------------------------------------*/
 343 /* DMA setting (without Endpoint 0) */
 344 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 345 {
 346         u32             num;
 347         u32             data;
 348
 349         data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
 350         if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
 351                 return;         /* Not Support DMA */
 352
 353         num = ep->epnum - 1;
 354
 355         if (ep->direct == USB_DIR_OUT) {
 356                 /*---------------------------------------------------------*/
 357                 /* OUT */
 358                 data = ep->ep.maxpacket;
 359                 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
 360
 361                 /*---------------------------------------------------------*/
 362                 /* Transfer Direct */
 363                 data = DCR1_EPN_DIR0;
 364                 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
 365
 366                 /*---------------------------------------------------------*/
 367                 /* DMA Mode etc. */
 368                 data = EPN_STOP_MODE | EPN_STOP_SET  | EPN_DMAMODE0;
 369                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 370         } else {
 371                 /*---------------------------------------------------------*/
 372                 /* IN */
 373                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPN_AUTO);
 374
 375                 /*---------------------------------------------------------*/
 376                 /* DMA Mode etc. */
 377                 data = EPN_BURST_SET | EPN_DMAMODE0;
 378                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 379         }
 380 }
 381
 382 /*-------------------------------------------------------------------------*/
 383 /* DMA setting release */
 384 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 385 {
 386         u32             num;
 387         u32             data;
 388         struct fc_regs  *preg = udc->p_regs;
 389
 390         if (udc->vbus_active == 0)
 391                 return;         /* VBUS OFF */
 392
 393         data = _nbu2ss_readl(&preg->USBSSCONF);
 394         if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
 395                 return;         /* Not Support DMA */
 396
 397         num = ep->epnum - 1;
 398
 399         _nbu2ss_ep_dma_abort(udc, ep);
 400
 401         if (ep->direct == USB_DIR_OUT) {
 402                 /*---------------------------------------------------------*/
 403                 /* OUT */
 404                 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
 405                 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPN_DIR0);
 406                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 407         } else {
 408                 /*---------------------------------------------------------*/
 409                 /* IN */
 410                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
 411                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 412         }
 413 }
 414
 415 /*-------------------------------------------------------------------------*/
 416 /* Abort DMA */
 417 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 418 {
 419         struct fc_regs  *preg = udc->p_regs;
 420
 421         _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPN_REQEN);
 422         mdelay(DMA_DISABLE_TIME);       /* DCR1_EPN_REQEN Clear */
 423         _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPN_DMA_EN);
 424 }
 425
 426 /*-------------------------------------------------------------------------*/
 427 /* Start IN Transfer */
 428 static void _nbu2ss_ep_in_end(
 429         struct nbu2ss_udc *udc,
 430         u32 epnum,
 431         u32 data32,
 432         u32 length
 433 )
 434 {
 435         u32             data;
 436         u32             num;
 437         struct fc_regs  *preg = udc->p_regs;
 438
 439         if (length >= sizeof(u32))
 440                 return;
 441
 442         if (epnum == 0) {
 443                 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
 444
 445                 /* Writing of 1-4 bytes */
 446                 if (length)
 447                         _nbu2ss_writel(&preg->EP0_WRITE, data32);
 448
 449                 data = ((length << 5) & EP0_DW) | EP0_DEND;
 450                 _nbu2ss_writel(&preg->EP0_CONTROL, data);
 451
 452                 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
 453         } else {
 454                 num = epnum - 1;
 455
 456                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
 457
 458                 /* Writing of 1-4 bytes */
 459                 if (length)
 460                         _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
 461
 462                 data = (((length) << 5) & EPN_DW) | EPN_DEND;
 463                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
 464
 465                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
 466         }
 467 }
 468
 469 #ifdef USE_DMA
 470 /*-------------------------------------------------------------------------*/
 471 static void _nbu2ss_dma_map_single(
 472         struct nbu2ss_udc *udc,
 473         struct nbu2ss_ep *ep,
 474         struct nbu2ss_req *req,
 475         u8              direct
 476 )
 477 {
 478         if (req->req.dma == DMA_ADDR_INVALID) {
 479                 if (req->unaligned) {
 480                         req->req.dma = ep->phys_buf;
 481                 } else {
 482                         req->req.dma = dma_map_single(
 483                                 udc->gadget.dev.parent,
 484                                 req->req.buf,
 485                                 req->req.length,
 486                                 (direct == USB_DIR_IN)
 487                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 488                 }
 489                 req->mapped = 1;
 490         } else {
 491                 if (!req->unaligned)
 492                         dma_sync_single_for_device(
 493                                 udc->gadget.dev.parent,
 494                                 req->req.dma,
 495                                 req->req.length,
 496                                 (direct == USB_DIR_IN)
 497                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 498
 499                 req->mapped = 0;
 500         }
 501 }
 502
 503 /*-------------------------------------------------------------------------*/
 504 static void _nbu2ss_dma_unmap_single(
 505         struct nbu2ss_udc *udc,
 506         struct nbu2ss_ep *ep,
 507         struct nbu2ss_req *req,
 508         u8              direct
 509 )
 510 {
 511         u8              data[4];
 512         u8              *p;
 513         u32             count = 0;
 514
 515         if (direct == USB_DIR_OUT) {
 516                 count = req->req.actual % 4;
 517                 if (count) {
 518                         p = req->req.buf;
 519                         p += (req->req.actual - count);
 520                         memcpy(data, p, count);
 521                 }
 522         }
 523
 524         if (req->mapped) {
 525                 if (req->unaligned) {
 526                         if (direct == USB_DIR_OUT)
 527                                 memcpy(req->req.buf, ep->virt_buf,
 528                                        req->req.actual & 0xfffffffc);
 529                 } else {
 530                         dma_unmap_single(udc->gadget.dev.parent,
 531                                          req->req.dma, req->req.length,
 532                                 (direct == USB_DIR_IN)
 533                                 ? DMA_TO_DEVICE
 534                                 : DMA_FROM_DEVICE);
 535                 }
 536                 req->req.dma = DMA_ADDR_INVALID;
 537                 req->mapped = 0;
 538         } else {
 539                 if (!req->unaligned)
 540                         dma_sync_single_for_cpu(udc->gadget.dev.parent,
 541                                                 req->req.dma, req->req.length,
 542                                 (direct == USB_DIR_IN)
 543                                 ? DMA_TO_DEVICE
 544                                 : DMA_FROM_DEVICE);
 545         }
 546
 547         if (count) {
 548                 p = req->req.buf;
 549                 p += (req->req.actual - count);
 550                 memcpy(p, data, count);
 551         }
 552 }
 553 #endif
 554
 555 /*-------------------------------------------------------------------------*/
 556 /* Endpoint 0 OUT Transfer (PIO) */
 557 static int ep0_out_pio(struct nbu2ss_udc *udc, u8 *buf, u32 length)
 558 {
 559         u32             i;
 560         u32 numreads = length / sizeof(u32);
 561         union usb_reg_access *buf32 = (union usb_reg_access *)buf;
 562
 563         if (!numreads)
 564                 return 0;
 565
 566         /* PIO Read */
 567         for (i = 0; i < numreads; i++) {
 568                 buf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 569                 buf32++;
 570         }
 571
 572         return  numreads * sizeof(u32);
 573 }
 574
 575 /*-------------------------------------------------------------------------*/
 576 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
 577 static int ep0_out_overbytes(struct nbu2ss_udc *udc, u8 *p_buf, u32 length)
 578 {
 579         u32             i;
 580         u32             i_read_size = 0;
 581         union usb_reg_access  temp_32;
 582         union usb_reg_access  *p_buf_32 = (union usb_reg_access *)p_buf;
 583
 584         if ((length > 0) && (length < sizeof(u32))) {
 585                 temp_32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 586                 for (i = 0 ; i < length ; i++)
 587                         p_buf_32->byte.DATA[i] = temp_32.byte.DATA[i];
 588                 i_read_size += length;
 589         }
 590
 591         return i_read_size;
 592 }
 593
 594 /*-------------------------------------------------------------------------*/
 595 /* Endpoint 0 IN Transfer (PIO) */
 596 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *p_buf, u32 length)
 597 {
 598         u32             i;
 599         u32             i_max_length   = EP0_PACKETSIZE;
 600         u32             i_word_length  = 0;
 601         u32             i_write_length = 0;
 602         union usb_reg_access  *p_buf_32 = (union usb_reg_access *)p_buf;
 603
 604         /*------------------------------------------------------------*/
 605         /* Transfer Length */
 606         if (i_max_length < length)
 607                 i_word_length = i_max_length / sizeof(u32);
 608         else
 609                 i_word_length = length / sizeof(u32);
 610
 611         /*------------------------------------------------------------*/
 612         /* PIO */
 613         for (i = 0; i < i_word_length; i++) {
 614                 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, p_buf_32->dw);
 615                 p_buf_32++;
 616                 i_write_length += sizeof(u32);
 617         }
 618
 619         return i_write_length;
 620 }
 621
 622 /*-------------------------------------------------------------------------*/
 623 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
 624 static int ep0_in_overbytes(struct nbu2ss_udc *udc,
 625                             u8 *p_buf,
 626                             u32 i_remain_size)
 627 {
 628         u32             i;
 629         union usb_reg_access  temp_32;
 630         union usb_reg_access  *p_buf_32 = (union usb_reg_access *)p_buf;
 631
 632         if ((i_remain_size > 0) && (i_remain_size < sizeof(u32))) {
 633                 for (i = 0 ; i < i_remain_size ; i++)
 634                         temp_32.byte.DATA[i] = p_buf_32->byte.DATA[i];
 635                 _nbu2ss_ep_in_end(udc, 0, temp_32.dw, i_remain_size);
 636
 637                 return i_remain_size;
 638         }
 639
 640         return 0;
 641 }
 642
 643 /*-------------------------------------------------------------------------*/
 644 /* Transfer NULL Packet (Epndoint 0) */
 645 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 646 {
 647         u32             data;
 648
 649         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 650         data &= ~(u32)EP0_INAK;
 651
 652         if (pid_flag)
 653                 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
 654         else
 655                 data |= (EP0_INAK_EN | EP0_DEND);
 656
 657         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 658
 659         return 0;
 660 }
 661
 662 /*-------------------------------------------------------------------------*/
 663 /* Receive NULL Packet (Endpoint 0) */
 664 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 665 {
 666         u32             data;
 667
 668         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 669         data &= ~(u32)EP0_ONAK;
 670
 671         if (pid_flag)
 672                 data |= EP0_PIDCLR;
 673
 674         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 675
 676         return 0;
 677 }
 678
 679 /*-------------------------------------------------------------------------*/
 680 static int _nbu2ss_ep0_in_transfer(
 681         struct nbu2ss_udc *udc,
 682         struct nbu2ss_req *req
 683 )
 684 {
 685         u8              *p_buffer;                      /* IN Data Buffer */
 686         u32             data;
 687         u32             i_remain_size = 0;
 688         int             result = 0;
 689
 690         /*-------------------------------------------------------------*/
 691         /* End confirmation */
 692         if (req->req.actual == req->req.length) {
 693                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 694                         if (req->zero) {
 695                                 req->zero = false;
 696                                 EP0_send_NULL(udc, FALSE);
 697                                 return 1;
 698                         }
 699                 }
 700
 701                 return 0;               /* Transfer End */
 702         }
 703
 704         /*-------------------------------------------------------------*/
 705         /* NAK release */
 706         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 707         data |= EP0_INAK_EN;
 708         data &= ~(u32)EP0_INAK;
 709         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 710
 711         i_remain_size = req->req.length - req->req.actual;
 712         p_buffer = (u8 *)req->req.buf;
 713         p_buffer += req->req.actual;
 714
 715         /*-------------------------------------------------------------*/
 716         /* Data transfer */
 717         result = EP0_in_PIO(udc, p_buffer, i_remain_size);
 718
 719         req->div_len = result;
 720         i_remain_size -= result;
 721
 722         if (i_remain_size == 0) {
 723                 EP0_send_NULL(udc, FALSE);
 724                 return result;
 725         }
 726
 727         if ((i_remain_size < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
 728                 p_buffer += result;
 729                 result += ep0_in_overbytes(udc, p_buffer, i_remain_size);
 730                 req->div_len = result;
 731         }
 732
 733         return result;
 734 }
 735
 736 /*-------------------------------------------------------------------------*/
 737 static int _nbu2ss_ep0_out_transfer(
 738         struct nbu2ss_udc *udc,
 739         struct nbu2ss_req *req
 740 )
 741 {
 742         u8              *p_buffer;
 743         u32             i_remain_size;
 744         u32             i_recv_length;
 745         int             result = 0;
 746         int             f_rcv_zero;
 747
 748         /*-------------------------------------------------------------*/
 749         /* Receive data confirmation */
 750         i_recv_length = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
 751         if (i_recv_length != 0) {
 752                 f_rcv_zero = 0;
 753
 754                 i_remain_size = req->req.length - req->req.actual;
 755                 p_buffer = (u8 *)req->req.buf;
 756                 p_buffer += req->req.actual;
 757
 758                 result = ep0_out_pio(udc, p_buffer
 759                                         , min(i_remain_size, i_recv_length));
 760                 if (result < 0)
 761                         return result;
 762
 763                 req->req.actual += result;
 764                 i_recv_length -= result;
 765
 766                 if ((i_recv_length > 0) && (i_recv_length < sizeof(u32))) {
 767                         p_buffer += result;
 768                         i_remain_size -= result;
 769
 770                         result = ep0_out_overbytes(udc, p_buffer
 771                                         , min(i_remain_size, i_recv_length));
 772                         req->req.actual += result;
 773                 }
 774         } else {
 775                 f_rcv_zero = 1;
 776         }
 777
 778         /*-------------------------------------------------------------*/
 779         /* End confirmation */
 780         if (req->req.actual == req->req.length) {
 781                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 782                         if (req->zero) {
 783                                 req->zero = false;
 784                                 EP0_receive_NULL(udc, FALSE);
 785                                 return 1;
 786                         }
 787                 }
 788
 789                 return 0;               /* Transfer End */
 790         }
 791
 792         if ((req->req.actual % EP0_PACKETSIZE) != 0)
 793                 return 0;               /* Short Packet Transfer End */
 794
 795         if (req->req.actual > req->req.length) {
 796                 dev_err(udc->dev, " *** Overrun Error\n");
 797                 return -EOVERFLOW;
 798         }
 799
 800         if (f_rcv_zero != 0) {
 801                 i_remain_size = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 802                 if (i_remain_size & EP0_ONAK) {
 803                         /*---------------------------------------------------*/
 804                         /* NACK release */
 805                         _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
 806                 }
 807                 result = 1;
 808         }
 809
 810         return result;
 811 }
 812
 813 /*-------------------------------------------------------------------------*/
 814 static int _nbu2ss_out_dma(
 815         struct nbu2ss_udc *udc,
 816         struct nbu2ss_req *req,
 817         u32             num,
 818         u32             length
 819 )
 820 {
 821         dma_addr_t      p_buffer;
 822         u32             mpkt;
 823         u32             lmpkt;
 824         u32             dmacnt;
 825         u32             burst = 1;
 826         u32             data;
 827         int             result = -EINVAL;
 828         struct fc_regs  *preg = udc->p_regs;
 829
 830         if (req->dma_flag)
 831                 return 1;               /* DMA is forwarded */
 832
 833         req->dma_flag = TRUE;
 834         p_buffer = req->req.dma;
 835         p_buffer += req->req.actual;
 836
 837         /* DMA Address */
 838         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)p_buffer);
 839
 840         /* Number of transfer packets */
 841         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
 842         dmacnt = length / mpkt;
 843         lmpkt = (length % mpkt) & ~(u32)0x03;
 844
 845         if (dmacnt > DMA_MAX_COUNT) {
 846                 dmacnt = DMA_MAX_COUNT;
 847                 lmpkt = 0;
 848         } else if (lmpkt != 0) {
 849                 if (dmacnt == 0)
 850                         burst = 0;      /* Burst OFF */
 851                 dmacnt++;
 852         }
 853
 854         data = mpkt | (lmpkt << 16);
 855         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
 856
 857         data = ((dmacnt & 0xff) << 16) | DCR1_EPN_DIR0 | DCR1_EPN_REQEN;
 858         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
 859
 860         if (burst == 0) {
 861                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
 862                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
 863         } else {
 864                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
 865                                 , (dmacnt << 16));
 866                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
 867         }
 868         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
 869
 870         result = length & ~(u32)0x03;
 871         req->div_len = result;
 872
 873         return result;
 874 }
 875
 876 /*-------------------------------------------------------------------------*/
 877 static int _nbu2ss_epn_out_pio(
 878         struct nbu2ss_udc *udc,
 879         struct nbu2ss_ep *ep,
 880         struct nbu2ss_req *req,
 881         u32             length
 882 )
 883 {
 884         u8              *p_buffer;
 885         u32             i;
 886         u32             data;
 887         u32             i_word_length;
 888         union usb_reg_access    temp_32;
 889         union usb_reg_access    *p_buf_32;
 890         int             result = 0;
 891         struct fc_regs  *preg = udc->p_regs;
 892
 893         if (req->dma_flag)
 894                 return 1;               /* DMA is forwarded */
 895
 896         if (length == 0)
 897                 return 0;
 898
 899         p_buffer = (u8 *)req->req.buf;
 900         p_buf_32 = (union usb_reg_access *)(p_buffer + req->req.actual);
 901
 902         i_word_length = length / sizeof(u32);
 903         if (i_word_length > 0) {
 904                 /*---------------------------------------------------------*/
 905                 /* Copy of every four bytes */
 906                 for (i = 0; i < i_word_length; i++) {
 907                         p_buf_32->dw =
 908                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 909                         p_buf_32++;
 910                 }
 911                 result = i_word_length * sizeof(u32);
 912         }
 913
 914         data = length - result;
 915         if (data > 0) {
 916                 /*---------------------------------------------------------*/
 917                 /* Copy of fraction byte */
 918                 temp_32.dw =
 919                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 920                 for (i = 0 ; i < data ; i++)
 921                         p_buf_32->byte.DATA[i] = temp_32.byte.DATA[i];
 922                 result += data;
 923         }
 924
 925         req->req.actual += result;
 926
 927         if ((req->req.actual == req->req.length) ||
 928             ((req->req.actual % ep->ep.maxpacket) != 0)) {
 929                 result = 0;
 930         }
 931
 932         return result;
 933 }
 934
 935 /*-------------------------------------------------------------------------*/
 936 static int _nbu2ss_epn_out_data(
 937         struct nbu2ss_udc *udc,
 938         struct nbu2ss_ep *ep,
 939         struct nbu2ss_req *req,
 940         u32             data_size
 941 )
 942 {
 943         u32             num;
 944         u32             i_buf_size;
 945         int             nret = 1;
 946
 947         if (ep->epnum == 0)
 948                 return -EINVAL;
 949
 950         num = ep->epnum - 1;
 951
 952         i_buf_size = min((req->req.length - req->req.actual), data_size);
 953
 954         if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
 955             (i_buf_size  >= sizeof(u32))) {
 956                 nret = _nbu2ss_out_dma(udc, req, num, i_buf_size);
 957         } else {
 958                 i_buf_size = min_t(u32, i_buf_size, ep->ep.maxpacket);
 959                 nret = _nbu2ss_epn_out_pio(udc, ep, req, i_buf_size);
 960         }
 961
 962         return nret;
 963 }
 964
 965 /*-------------------------------------------------------------------------*/
 966 static int _nbu2ss_epn_out_transfer(
 967         struct nbu2ss_udc *udc,
 968         struct nbu2ss_ep *ep,
 969         struct nbu2ss_req *req
 970 )
 971 {
 972         u32             num;
 973         u32             i_recv_length;
 974         int             result = 1;
 975         struct fc_regs  *preg = udc->p_regs;
 976
 977         if (ep->epnum == 0)
 978                 return -EINVAL;
 979
 980         num = ep->epnum - 1;
 981
 982         /*-------------------------------------------------------------*/
 983         /* Receive Length */
 984         i_recv_length
 985                 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPN_LDATA;
 986
 987         if (i_recv_length != 0) {
 988                 result = _nbu2ss_epn_out_data(udc, ep, req, i_recv_length);
 989                 if (i_recv_length < ep->ep.maxpacket) {
 990                         if (i_recv_length == result) {
 991                                 req->req.actual += result;
 992                                 result = 0;
 993                         }
 994                 }
 995         } else {
 996                 if ((req->req.actual == req->req.length) ||
 997                     ((req->req.actual % ep->ep.maxpacket) != 0)) {
 998                         result = 0;
 999                 }
1000         }
1001
1002         if (result == 0) {
1003                 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1004                         if (req->zero) {
1005                                 req->zero = false;
1006                                 return 1;
1007                         }
1008                 }
1009         }
1010
1011         if (req->req.actual > req->req.length) {
1012                 dev_err(udc->dev, " Overrun Error\n");
1013                 dev_err(udc->dev, " actual = %d, length = %d\n",
1014                         req->req.actual, req->req.length);
1015                 result = -EOVERFLOW;
1016         }
1017
1018         return result;
1019 }
1020
1021 /*-------------------------------------------------------------------------*/
1022 static int _nbu2ss_in_dma(
1023         struct nbu2ss_udc *udc,
1024         struct nbu2ss_ep *ep,
1025         struct nbu2ss_req *req,
1026         u32             num,
1027         u32             length
1028 )
1029 {
1030         dma_addr_t      p_buffer;
1031         u32             mpkt;           /* MaxPacketSize */
1032         u32             lmpkt;          /* Last Packet Data Size */
1033         u32             dmacnt;         /* IN Data Size */
1034         u32             i_write_length;
1035         u32             data;
1036         int             result = -EINVAL;
1037         struct fc_regs  *preg = udc->p_regs;
1038
1039         if (req->dma_flag)
1040                 return 1;               /* DMA is forwarded */
1041
1042 #ifdef USE_DMA
1043         if (req->req.actual == 0)
1044                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1045 #endif
1046         req->dma_flag = TRUE;
1047
1048         /* MAX Packet Size */
1049         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
1050
1051         if ((DMA_MAX_COUNT * mpkt) < length)
1052                 i_write_length = DMA_MAX_COUNT * mpkt;
1053         else
1054                 i_write_length = length;
1055
1056         /*------------------------------------------------------------*/
1057         /* Number of transmission packets */
1058         if (mpkt < i_write_length) {
1059                 dmacnt = i_write_length / mpkt;
1060                 lmpkt  = (i_write_length % mpkt) & ~(u32)0x3;
1061                 if (lmpkt != 0)
1062                         dmacnt++;
1063                 else
1064                         lmpkt = mpkt & ~(u32)0x3;
1065
1066         } else {
1067                 dmacnt = 1;
1068                 lmpkt  = i_write_length & ~(u32)0x3;
1069         }
1070
1071         /* Packet setting */
1072         data = mpkt | (lmpkt << 16);
1073         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1074
1075         /* Address setting */
1076         p_buffer = req->req.dma;
1077         p_buffer += req->req.actual;
1078         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)p_buffer);
1079
1080         /* Packet and DMA setting */
1081         data = ((dmacnt & 0xff) << 16) | DCR1_EPN_REQEN;
1082         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1083
1084         /* Packet setting of EPC */
1085         data = dmacnt << 16;
1086         _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1087
1088         /*DMA setting of EPC */
1089         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
1090
1091         result = i_write_length & ~(u32)0x3;
1092         req->div_len = result;
1093
1094         return result;
1095 }
1096
1097 /*-------------------------------------------------------------------------*/
1098 static int _nbu2ss_epn_in_pio(
1099         struct nbu2ss_udc *udc,
1100         struct nbu2ss_ep *ep,
1101         struct nbu2ss_req *req,
1102         u32             length
1103 )
1104 {
1105         u8              *p_buffer;
1106         u32             i;
1107         u32             data;
1108         u32             i_word_length;
1109         union usb_reg_access    temp_32;
1110         union usb_reg_access    *p_buf_32 = NULL;
1111         int             result = 0;
1112         struct fc_regs  *preg = udc->p_regs;
1113
1114         if (req->dma_flag)
1115                 return 1;               /* DMA is forwarded */
1116
1117         if (length > 0) {
1118                 p_buffer = (u8 *)req->req.buf;
1119                 p_buf_32 = (union usb_reg_access *)(p_buffer + req->req.actual);
1120
1121                 i_word_length = length / sizeof(u32);
1122                 if (i_word_length > 0) {
1123                         for (i = 0; i < i_word_length; i++) {
1124                                 _nbu2ss_writel(
1125                                         &preg->EP_REGS[ep->epnum - 1].EP_WRITE
1126                                         , p_buf_32->dw
1127                                 );
1128
1129                                 p_buf_32++;
1130                         }
1131                         result = i_word_length * sizeof(u32);
1132                 }
1133         }
1134
1135         if (result != ep->ep.maxpacket) {
1136                 data = length - result;
1137                 temp_32.dw = 0;
1138                 for (i = 0 ; i < data ; i++)
1139                         temp_32.byte.DATA[i] = p_buf_32->byte.DATA[i];
1140
1141                 _nbu2ss_ep_in_end(udc, ep->epnum, temp_32.dw, data);
1142                 result += data;
1143         }
1144
1145         req->div_len = result;
1146
1147         return result;
1148 }
1149
1150 /*-------------------------------------------------------------------------*/
1151 static int _nbu2ss_epn_in_data(
1152         struct nbu2ss_udc *udc,
1153         struct nbu2ss_ep *ep,
1154         struct nbu2ss_req *req,
1155         u32             data_size
1156 )
1157 {
1158         u32             num;
1159         int             nret = 1;
1160
1161         if (ep->epnum == 0)
1162                 return -EINVAL;
1163
1164         num = ep->epnum - 1;
1165
1166         if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
1167             (data_size >= sizeof(u32))) {
1168                 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1169         } else {
1170                 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1171                 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1172         }
1173
1174         return nret;
1175 }
1176
1177 /*-------------------------------------------------------------------------*/
1178 static int _nbu2ss_epn_in_transfer(
1179         struct nbu2ss_udc *udc,
1180         struct nbu2ss_ep *ep,
1181         struct nbu2ss_req *req
1182 )
1183 {
1184         u32             num;
1185         u32             i_buf_size;
1186         int             result = 0;
1187         u32             status;
1188
1189         if (ep->epnum == 0)
1190                 return -EINVAL;
1191
1192         num = ep->epnum - 1;
1193
1194         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1195
1196         /*-------------------------------------------------------------*/
1197         /* State confirmation of FIFO */
1198         if (req->req.actual == 0) {
1199                 if ((status & EPN_IN_EMPTY) == 0)
1200                         return 1;       /* Not Empty */
1201
1202         } else {
1203                 if ((status & EPN_IN_FULL) != 0)
1204                         return 1;       /* Not Empty */
1205         }
1206
1207         /*-------------------------------------------------------------*/
1208         /* Start transfer */
1209         i_buf_size = req->req.length - req->req.actual;
1210         if (i_buf_size > 0)
1211                 result = _nbu2ss_epn_in_data(udc, ep, req, i_buf_size);
1212         else if (req->req.length == 0)
1213                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1214
1215         return result;
1216 }
1217
1218 /*-------------------------------------------------------------------------*/
1219 static int _nbu2ss_start_transfer(
1220         struct nbu2ss_udc *udc,
1221         struct nbu2ss_ep *ep,
1222         struct nbu2ss_req *req,
1223         bool    bflag)
1224 {
1225         int             nret = -EINVAL;
1226
1227         req->dma_flag = FALSE;
1228         req->div_len = 0;
1229
1230         if (req->req.length == 0) {
1231                 req->zero = false;
1232         } else {
1233                 if ((req->req.length % ep->ep.maxpacket) == 0)
1234                         req->zero = req->req.zero;
1235                 else
1236                         req->zero = false;
1237         }
1238
1239         if (ep->epnum == 0) {
1240                 /* EP0 */
1241                 switch (udc->ep0state) {
1242                 case EP0_IN_DATA_PHASE:
1243                         nret = _nbu2ss_ep0_in_transfer(udc, req);
1244                         break;
1245
1246                 case EP0_OUT_DATA_PHASE:
1247                         nret = _nbu2ss_ep0_out_transfer(udc, req);
1248                         break;
1249
1250                 case EP0_IN_STATUS_PHASE:
1251                         nret = EP0_send_NULL(udc, TRUE);
1252                         break;
1253
1254                 default:
1255                         break;
1256                 }
1257
1258         } else {
1259                 /* EPN */
1260                 if (ep->direct == USB_DIR_OUT) {
1261                         /* OUT */
1262                         if (!bflag)
1263                                 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1264                 } else {
1265                         /* IN */
1266                         nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1267                 }
1268         }
1269
1270         return nret;
1271 }
1272
1273 /*-------------------------------------------------------------------------*/
1274 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1275 {
1276         u32             length;
1277         bool    bflag = FALSE;
1278         struct nbu2ss_req *req;
1279
1280         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1281         if (!req)
1282                 return;
1283
1284         if (ep->epnum > 0) {
1285                 length = _nbu2ss_readl(
1286                         &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1287
1288                 length &= EPN_LDATA;
1289                 if (length < ep->ep.maxpacket)
1290                         bflag = TRUE;
1291         }
1292
1293         _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1294 }
1295
1296 /*-------------------------------------------------------------------------*/
1297 /*      Endpoint Toggle Reset */
1298 static void _nbu2ss_endpoint_toggle_reset(
1299         struct nbu2ss_udc *udc,
1300         u8 ep_adrs)
1301 {
1302         u8              num;
1303         u32             data;
1304
1305         if ((ep_adrs == 0) || (ep_adrs == 0x80))
1306                 return;
1307
1308         num = (ep_adrs & 0x7F) - 1;
1309
1310         if (ep_adrs & USB_DIR_IN)
1311                 data = EPN_IPIDCLR;
1312         else
1313                 data = EPN_BCLR | EPN_OPIDCLR;
1314
1315         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1316 }
1317
1318 /*-------------------------------------------------------------------------*/
1319 /*      Endpoint STALL set */
1320 static void _nbu2ss_set_endpoint_stall(
1321         struct nbu2ss_udc *udc,
1322         u8 ep_adrs,
1323         bool bstall)
1324 {
1325         u8              num, epnum;
1326         u32             data;
1327         struct nbu2ss_ep *ep;
1328         struct fc_regs  *preg = udc->p_regs;
1329
1330         if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1331                 if (bstall) {
1332                         /* Set STALL */
1333                         _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1334                 } else {
1335                         /* Clear STALL */
1336                         _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1337                 }
1338         } else {
1339                 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1340                 num = epnum - 1;
1341                 ep = &udc->ep[epnum];
1342
1343                 if (bstall) {
1344                         /* Set STALL */
1345                         ep->halted = TRUE;
1346
1347                         if (ep_adrs & USB_DIR_IN)
1348                                 data = EPN_BCLR | EPN_ISTL;
1349                         else
1350                                 data = EPN_OSTL_EN | EPN_OSTL;
1351
1352                         _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1353                 } else {
1354                         /* Clear STALL */
1355                         ep->stalled = FALSE;
1356                         if (ep_adrs & USB_DIR_IN) {
1357                                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1358                                                 , EPN_ISTL);
1359                         } else {
1360                                 data =
1361                                 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1362
1363                                 data &= ~EPN_OSTL;
1364                                 data |= EPN_OSTL_EN;
1365
1366                                 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1367                                                 , data);
1368                         }
1369
1370                         ep->stalled = FALSE;
1371                         if (ep->halted) {
1372                                 ep->halted = FALSE;
1373                                 _nbu2ss_restert_transfer(ep);
1374                         }
1375                 }
1376         }
1377 }
1378
1379 /*-------------------------------------------------------------------------*/
1380 /* Device Descriptor */
1381 static struct usb_device_descriptor device_desc = {
1382         .bLength              = sizeof(device_desc),
1383         .bDescriptorType      = USB_DT_DEVICE,
1384         .bcdUSB               = cpu_to_le16(0x0200),
1385         .bDeviceClass         = USB_CLASS_VENDOR_SPEC,
1386         .bDeviceSubClass      = 0x00,
1387         .bDeviceProtocol      = 0x00,
1388         .bMaxPacketSize0      = 64,
1389         .idVendor             = cpu_to_le16(0x0409),
1390         .idProduct            = cpu_to_le16(0xfff0),
1391         .bcdDevice            = 0xffff,
1392         .iManufacturer        = 0x00,
1393         .iProduct             = 0x00,
1394         .iSerialNumber        = 0x00,
1395         .bNumConfigurations   = 0x01,
1396 };
1397
1398 /*-------------------------------------------------------------------------*/
1399 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1400 {
1401         u32             data;
1402
1403         if (mode > MAX_TEST_MODE_NUM)
1404                 return;
1405
1406         dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1407
1408         data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1409         data &= ~TEST_FORCE_ENABLE;
1410         data |= mode << TEST_MODE_SHIFT;
1411
1412         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1413         _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1414 }
1415
1416 /*-------------------------------------------------------------------------*/
1417 static int _nbu2ss_set_feature_device(
1418         struct nbu2ss_udc *udc,
1419         u16 selector,
1420         u16 wIndex
1421 )
1422 {
1423         int     result = -EOPNOTSUPP;
1424
1425         switch (selector) {
1426         case USB_DEVICE_REMOTE_WAKEUP:
1427                 if (wIndex == 0x0000) {
1428                         udc->remote_wakeup = U2F_ENABLE;
1429                         result = 0;
1430                 }
1431                 break;
1432
1433         case USB_DEVICE_TEST_MODE:
1434                 wIndex >>= 8;
1435                 if (wIndex <= MAX_TEST_MODE_NUM)
1436                         result = 0;
1437                 break;
1438
1439         default:
1440                 break;
1441         }
1442
1443         return result;
1444 }
1445
1446 /*-------------------------------------------------------------------------*/
1447 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1448 {
1449         u8              epnum;
1450         u32             data = 0, bit_data;
1451         struct fc_regs  *preg = udc->p_regs;
1452
1453         epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1454         if (epnum == 0) {
1455                 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1456                 bit_data = EP0_STL;
1457
1458         } else {
1459                 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1460                 if ((data & EPN_EN) == 0)
1461                         return -1;
1462
1463                 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1464                         bit_data = EPN_ISTL;
1465                 else
1466                         bit_data = EPN_OSTL;
1467         }
1468
1469         if ((data & bit_data) == 0)
1470                 return 0;
1471         return 1;
1472 }
1473
1474 /*-------------------------------------------------------------------------*/
1475 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1476 {
1477         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1478         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1479         u16     selector  = udc->ctrl.wValue;
1480         u16     wIndex    = udc->ctrl.wIndex;
1481         u8      ep_adrs;
1482         int     result = -EOPNOTSUPP;
1483
1484         if ((udc->ctrl.wLength != 0x0000) ||
1485             (direction != USB_DIR_OUT)) {
1486                 return -EINVAL;
1487         }
1488
1489         switch (recipient) {
1490         case USB_RECIP_DEVICE:
1491                 if (bset)
1492                         result =
1493                         _nbu2ss_set_feature_device(udc, selector, wIndex);
1494                 break;
1495
1496         case USB_RECIP_ENDPOINT:
1497                 if (0x0000 == (wIndex & 0xFF70)) {
1498                         if (selector == USB_ENDPOINT_HALT) {
1499                                 ep_adrs = wIndex & 0xFF;
1500                                 if (!bset) {
1501                                         _nbu2ss_endpoint_toggle_reset(
1502                                                 udc, ep_adrs);
1503                                 }
1504
1505                                 _nbu2ss_set_endpoint_stall(
1506                                         udc, ep_adrs, bset);
1507
1508                                 result = 0;
1509                         }
1510                 }
1511                 break;
1512
1513         default:
1514                 break;
1515         }
1516
1517         if (result >= 0)
1518                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1519
1520         return result;
1521 }
1522
1523 /*-------------------------------------------------------------------------*/
1524 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1525 {
1526         u32             data;
1527         enum usb_device_speed speed = USB_SPEED_FULL;
1528
1529         data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1530         if (data & HIGH_SPEED)
1531                 speed = USB_SPEED_HIGH;
1532
1533         return speed;
1534 }
1535
1536 /*-------------------------------------------------------------------------*/
1537 static void _nbu2ss_epn_set_stall(
1538         struct nbu2ss_udc *udc,
1539         struct nbu2ss_ep *ep
1540 )
1541 {
1542         u8      ep_adrs;
1543         u32     regdata;
1544         int     limit_cnt = 0;
1545
1546         struct fc_regs  *preg = udc->p_regs;
1547
1548         if (ep->direct == USB_DIR_IN) {
1549                 for (limit_cnt = 0
1550                         ; limit_cnt < IN_DATA_EMPTY_COUNT
1551                         ; limit_cnt++) {
1552                         regdata = _nbu2ss_readl(
1553                                 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1554
1555                         if ((regdata & EPN_IN_DATA) == 0)
1556                                 break;
1557
1558                         mdelay(1);
1559                 }
1560         }
1561
1562         ep_adrs = ep->epnum | ep->direct;
1563         _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1564 }
1565
1566 /*-------------------------------------------------------------------------*/
1567 static int std_req_get_status(struct nbu2ss_udc *udc)
1568 {
1569         u32     length;
1570         u16     status_data = 0;
1571         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1572         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1573         u8      ep_adrs;
1574         int     result = -EINVAL;
1575
1576         if ((udc->ctrl.wValue != 0x0000) || (direction != USB_DIR_IN))
1577                 return result;
1578
1579         length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1580
1581         switch (recipient) {
1582         case USB_RECIP_DEVICE:
1583                 if (udc->ctrl.wIndex == 0x0000) {
1584                         if (udc->gadget.is_selfpowered)
1585                                 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1586
1587                         if (udc->remote_wakeup)
1588                                 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1589
1590                         result = 0;
1591                 }
1592                 break;
1593
1594         case USB_RECIP_ENDPOINT:
1595                 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1596                         ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1597                         result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1598
1599                         if (result > 0)
1600                                 status_data |= (1 << USB_ENDPOINT_HALT);
1601                 }
1602                 break;
1603
1604         default:
1605                 break;
1606         }
1607
1608         if (result >= 0) {
1609                 memcpy(udc->ep0_buf, &status_data, length);
1610                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1611                 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1612
1613         } else {
1614                 dev_err(udc->dev, " Error GET_STATUS\n");
1615         }
1616
1617         return result;
1618 }
1619
1620 /*-------------------------------------------------------------------------*/
1621 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1622 {
1623         return _nbu2ss_req_feature(udc, FALSE);
1624 }
1625
1626 /*-------------------------------------------------------------------------*/
1627 static int std_req_set_feature(struct nbu2ss_udc *udc)
1628 {
1629         return _nbu2ss_req_feature(udc, TRUE);
1630 }
1631
1632 /*-------------------------------------------------------------------------*/
1633 static int std_req_set_address(struct nbu2ss_udc *udc)
1634 {
1635         int             result = 0;
1636         u32             wValue = udc->ctrl.wValue;
1637
1638         if ((udc->ctrl.bRequestType != 0x00)    ||
1639             (udc->ctrl.wIndex != 0x0000)        ||
1640                 (udc->ctrl.wLength != 0x0000)) {
1641                 return -EINVAL;
1642         }
1643
1644         if (wValue != (wValue & 0x007F))
1645                 return -EINVAL;
1646
1647         wValue <<= USB_ADRS_SHIFT;
1648
1649         _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1650         _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1651
1652         return result;
1653 }
1654
1655 /*-------------------------------------------------------------------------*/
1656 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1657 {
1658         u32 config_value = (u32)(udc->ctrl.wValue & 0x00ff);
1659
1660         if ((udc->ctrl.wIndex != 0x0000)        ||
1661             (udc->ctrl.wLength != 0x0000)       ||
1662                 (udc->ctrl.bRequestType != 0x00)) {
1663                 return -EINVAL;
1664         }
1665
1666         udc->curr_config = config_value;
1667
1668         if (config_value > 0) {
1669                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1670                 udc->devstate = USB_STATE_CONFIGURED;
1671
1672         } else {
1673                 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1674                 udc->devstate = USB_STATE_ADDRESS;
1675         }
1676
1677         return 0;
1678 }
1679
1680 /*-------------------------------------------------------------------------*/
1681 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1682 {
1683         if ((!udc) && (!pdata))
1684                 return;
1685
1686         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1687         pdata++;
1688         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1689 }
1690
1691 /*-------------------------------------------------------------------------*/
1692 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1693 {
1694         bool                    bcall_back = TRUE;
1695         int                     nret = -EINVAL;
1696         struct usb_ctrlrequest  *p_ctrl;
1697
1698         p_ctrl = &udc->ctrl;
1699         _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1700
1701         /* ep0 state control */
1702         if (p_ctrl->wLength == 0) {
1703                 udc->ep0state = EP0_IN_STATUS_PHASE;
1704
1705         } else {
1706                 if (p_ctrl->bRequestType & USB_DIR_IN)
1707                         udc->ep0state = EP0_IN_DATA_PHASE;
1708                 else
1709                         udc->ep0state = EP0_OUT_DATA_PHASE;
1710         }
1711
1712         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1713                 switch (p_ctrl->bRequest) {
1714                 case USB_REQ_GET_STATUS:
1715                         nret = std_req_get_status(udc);
1716                         bcall_back = FALSE;
1717                         break;
1718
1719                 case USB_REQ_CLEAR_FEATURE:
1720                         nret = std_req_clear_feature(udc);
1721                         bcall_back = FALSE;
1722                         break;
1723
1724                 case USB_REQ_SET_FEATURE:
1725                         nret = std_req_set_feature(udc);
1726                         bcall_back = FALSE;
1727                         break;
1728
1729                 case USB_REQ_SET_ADDRESS:
1730                         nret = std_req_set_address(udc);
1731                         bcall_back = FALSE;
1732                         break;
1733
1734                 case USB_REQ_SET_CONFIGURATION:
1735                         nret = std_req_set_configuration(udc);
1736                         break;
1737
1738                 default:
1739                         break;
1740                 }
1741         }
1742
1743         if (!bcall_back) {
1744                 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1745                         if (nret >= 0) {
1746                                 /*--------------------------------------*/
1747                                 /* Status Stage */
1748                                 nret = EP0_send_NULL(udc, TRUE);
1749                         }
1750                 }
1751
1752         } else {
1753                 spin_unlock(&udc->lock);
1754                 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1755                 spin_lock(&udc->lock);
1756         }
1757
1758         if (nret < 0)
1759                 udc->ep0state = EP0_IDLE;
1760
1761         return nret;
1762 }
1763
1764 /*-------------------------------------------------------------------------*/
1765 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1766 {
1767         int                     nret;
1768         struct nbu2ss_req       *req;
1769         struct nbu2ss_ep        *ep = &udc->ep[0];
1770
1771         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1772         if (!req)
1773                 req = &udc->ep0_req;
1774
1775         req->req.actual += req->div_len;
1776         req->div_len = 0;
1777
1778         nret = _nbu2ss_ep0_in_transfer(udc, req);
1779         if (nret == 0) {
1780                 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1781                 EP0_receive_NULL(udc, TRUE);
1782         }
1783
1784         return 0;
1785 }
1786
1787 /*-------------------------------------------------------------------------*/
1788 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1789 {
1790         int                     nret;
1791         struct nbu2ss_req       *req;
1792         struct nbu2ss_ep        *ep = &udc->ep[0];
1793
1794         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1795         if (!req)
1796                 req = &udc->ep0_req;
1797
1798         nret = _nbu2ss_ep0_out_transfer(udc, req);
1799         if (nret == 0) {
1800                 udc->ep0state = EP0_IN_STATUS_PHASE;
1801                 EP0_send_NULL(udc, TRUE);
1802
1803         } else if (nret < 0) {
1804                 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1805                 req->req.status = nret;
1806         }
1807
1808         return 0;
1809 }
1810
1811 /*-------------------------------------------------------------------------*/
1812 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1813 {
1814         struct nbu2ss_req       *req;
1815         struct nbu2ss_ep        *ep = &udc->ep[0];
1816
1817         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1818         if (!req) {
1819                 req = &udc->ep0_req;
1820                 if (req->req.complete)
1821                         req->req.complete(&ep->ep, &req->req);
1822
1823         } else {
1824                 if (req->req.complete)
1825                         _nbu2ss_ep_done(ep, req, 0);
1826         }
1827
1828         udc->ep0state = EP0_IDLE;
1829
1830         return 0;
1831 }
1832
1833 /*-------------------------------------------------------------------------*/
1834 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1835 {
1836         int             i;
1837         u32             status;
1838         u32             intr;
1839         int             nret = -1;
1840
1841         status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1842         intr = status & EP0_STATUS_RW_BIT;
1843         _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~intr);
1844
1845         status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1846                         | STG_END_INT | EP0_OUT_NULL_INT);
1847
1848         if (status == 0) {
1849                 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1850                 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1851                 return;
1852         }
1853
1854         if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1855                 udc->gadget.speed = _nbu2ss_get_speed(udc);
1856
1857         for (i = 0; i < EP0_END_XFER; i++) {
1858                 switch (udc->ep0state) {
1859                 case EP0_IDLE:
1860                         if (status & SETUP_INT) {
1861                                 status = 0;
1862                                 nret = _nbu2ss_decode_request(udc);
1863                         }
1864                         break;
1865
1866                 case EP0_IN_DATA_PHASE:
1867                         if (status & EP0_IN_INT) {
1868                                 status &= ~EP0_IN_INT;
1869                                 nret = _nbu2ss_ep0_in_data_stage(udc);
1870                         }
1871                         break;
1872
1873                 case EP0_OUT_DATA_PHASE:
1874                         if (status & EP0_OUT_INT) {
1875                                 status &= ~EP0_OUT_INT;
1876                                 nret = _nbu2ss_ep0_out_data_stage(udc);
1877                         }
1878                         break;
1879
1880                 case EP0_IN_STATUS_PHASE:
1881                         if ((status & STG_END_INT) || (status & SETUP_INT)) {
1882                                 status &= ~(STG_END_INT | EP0_IN_INT);
1883                                 nret = _nbu2ss_ep0_status_stage(udc);
1884                         }
1885                         break;
1886
1887                 case EP0_OUT_STATUS_PAHSE:
1888                         if ((status & STG_END_INT) || (status & SETUP_INT) ||
1889                             (status & EP0_OUT_NULL_INT)) {
1890                                 status &= ~(STG_END_INT
1891                                                 | EP0_OUT_INT
1892                                                 | EP0_OUT_NULL_INT);
1893
1894                                 nret = _nbu2ss_ep0_status_stage(udc);
1895                         }
1896
1897                         break;
1898
1899                 default:
1900                         status = 0;
1901                         break;
1902                 }
1903
1904                 if (status == 0)
1905                         break;
1906         }
1907
1908         if (nret < 0) {
1909                 /* Send Stall */
1910                 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1911         }
1912 }
1913
1914 /*-------------------------------------------------------------------------*/
1915 static void _nbu2ss_ep_done(
1916         struct nbu2ss_ep *ep,
1917         struct nbu2ss_req *req,
1918         int status)
1919 {
1920         struct nbu2ss_udc *udc = ep->udc;
1921
1922         list_del_init(&req->queue);
1923
1924         if (status == -ECONNRESET)
1925                 _nbu2ss_fifo_flush(udc, ep);
1926
1927         if (likely(req->req.status == -EINPROGRESS))
1928                 req->req.status = status;
1929
1930         if (ep->stalled) {
1931                 _nbu2ss_epn_set_stall(udc, ep);
1932         } else {
1933                 if (!list_empty(&ep->queue))
1934                         _nbu2ss_restert_transfer(ep);
1935         }
1936
1937 #ifdef USE_DMA
1938         if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1939             (req->req.dma != 0))
1940                 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1941 #endif
1942
1943         spin_unlock(&udc->lock);
1944         req->req.complete(&ep->ep, &req->req);
1945         spin_lock(&udc->lock);
1946 }
1947
1948 /*-------------------------------------------------------------------------*/
1949 static inline void _nbu2ss_epn_in_int(
1950         struct nbu2ss_udc *udc,
1951         struct nbu2ss_ep *ep,
1952         struct nbu2ss_req *req)
1953 {
1954         int     result = 0;
1955         u32     status;
1956
1957         struct fc_regs  *preg = udc->p_regs;
1958
1959         if (req->dma_flag)
1960                 return;         /* DMA is forwarded */
1961
1962         req->req.actual += req->div_len;
1963         req->div_len = 0;
1964
1965         if (req->req.actual != req->req.length) {
1966                 /*---------------------------------------------------------*/
1967                 /* remainder of data */
1968                 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1969
1970         } else {
1971                 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1972                         status =
1973                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1974
1975                         if ((status & EPN_IN_FULL) == 0) {
1976                                 /*-----------------------------------------*/
1977                                 /* 0 Length Packet */
1978                                 req->zero = false;
1979                                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1980                         }
1981                         return;
1982                 }
1983         }
1984
1985         if (result <= 0) {
1986                 /*---------------------------------------------------------*/
1987                 /* Complete */
1988                 _nbu2ss_ep_done(ep, req, result);
1989         }
1990 }
1991
1992 /*-------------------------------------------------------------------------*/
1993 static inline void _nbu2ss_epn_out_int(
1994         struct nbu2ss_udc *udc,
1995         struct nbu2ss_ep *ep,
1996         struct nbu2ss_req *req)
1997 {
1998         int     result;
1999
2000         result = _nbu2ss_epn_out_transfer(udc, ep, req);
2001         if (result <= 0)
2002                 _nbu2ss_ep_done(ep, req, result);
2003 }
2004
2005 /*-------------------------------------------------------------------------*/
2006 static inline void _nbu2ss_epn_in_dma_int(
2007         struct nbu2ss_udc *udc,
2008         struct nbu2ss_ep *ep,
2009         struct nbu2ss_req *req)
2010 {
2011         u32             mpkt;
2012         u32             size;
2013         struct usb_request *preq;
2014
2015         preq = &req->req;
2016
2017         if (!req->dma_flag)
2018                 return;
2019
2020         preq->actual += req->div_len;
2021         req->div_len = 0;
2022         req->dma_flag = FALSE;
2023
2024 #ifdef USE_DMA
2025         _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2026 #endif
2027
2028         if (preq->actual != preq->length) {
2029                 _nbu2ss_epn_in_transfer(udc, ep, req);
2030         } else {
2031                 mpkt = ep->ep.maxpacket;
2032                 size = preq->actual % mpkt;
2033                 if (size > 0) {
2034                         if (((preq->actual & 0x03) == 0) && (size < mpkt))
2035                                 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2036                 } else {
2037                         _nbu2ss_epn_in_int(udc, ep, req);
2038                 }
2039         }
2040 }
2041
2042 /*-------------------------------------------------------------------------*/
2043 static inline void _nbu2ss_epn_out_dma_int(
2044         struct nbu2ss_udc *udc,
2045         struct nbu2ss_ep *ep,
2046         struct nbu2ss_req *req)
2047 {
2048         int             i;
2049         u32             num;
2050         u32             dmacnt, ep_dmacnt;
2051         u32             mpkt;
2052         struct fc_regs  *preg = udc->p_regs;
2053
2054         num = ep->epnum - 1;
2055
2056         if (req->req.actual == req->req.length) {
2057                 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2058                         req->div_len = 0;
2059                         req->dma_flag = FALSE;
2060                         _nbu2ss_ep_done(ep, req, 0);
2061                         return;
2062                 }
2063         }
2064
2065         ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2066                  & EPN_DMACNT;
2067         ep_dmacnt >>= 16;
2068
2069         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2070                 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2071                          & DCR1_EPN_DMACNT;
2072                 dmacnt >>= 16;
2073                 if (ep_dmacnt == dmacnt)
2074                         break;
2075         }
2076
2077         _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPN_REQEN);
2078
2079         if (dmacnt != 0) {
2080                 mpkt = ep->ep.maxpacket;
2081                 if ((req->div_len % mpkt) == 0)
2082                         req->div_len -= mpkt * dmacnt;
2083         }
2084
2085         if ((req->req.actual % ep->ep.maxpacket) > 0) {
2086                 if (req->req.actual == req->div_len) {
2087                         req->div_len = 0;
2088                         req->dma_flag = FALSE;
2089                         _nbu2ss_ep_done(ep, req, 0);
2090                         return;
2091                 }
2092         }
2093
2094         req->req.actual += req->div_len;
2095         req->div_len = 0;
2096         req->dma_flag = FALSE;
2097
2098         _nbu2ss_epn_out_int(udc, ep, req);
2099 }
2100
2101 /*-------------------------------------------------------------------------*/
2102 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2103 {
2104         u32     num;
2105         u32     status;
2106
2107         struct nbu2ss_req       *req;
2108         struct nbu2ss_ep        *ep = &udc->ep[epnum];
2109
2110         num = epnum - 1;
2111
2112         /* Interrupt Status */
2113         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2114
2115         /* Interrupt Clear */
2116         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);
2117
2118         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2119         if (!req) {
2120                 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2121                 return;
2122         }
2123
2124         if (status & EPN_OUT_END_INT) {
2125                 status &= ~EPN_OUT_INT;
2126                 _nbu2ss_epn_out_dma_int(udc, ep, req);
2127         }
2128
2129         if (status & EPN_OUT_INT)
2130                 _nbu2ss_epn_out_int(udc, ep, req);
2131
2132         if (status & EPN_IN_END_INT) {
2133                 status &= ~EPN_IN_INT;
2134                 _nbu2ss_epn_in_dma_int(udc, ep, req);
2135         }
2136
2137         if (status & EPN_IN_INT)
2138                 _nbu2ss_epn_in_int(udc, ep, req);
2139 }
2140
2141 /*-------------------------------------------------------------------------*/
2142 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2143 {
2144         if (epnum == 0)
2145                 _nbu2ss_ep0_int(udc);
2146         else
2147                 _nbu2ss_epn_int(udc, epnum);
2148 }
2149
2150 /*-------------------------------------------------------------------------*/
2151 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2152 {
2153         _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2154         _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2155 }
2156
2157 /*-------------------------------------------------------------------------*/
2158 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2159                         struct nbu2ss_ep *ep,
2160                         int status)
2161 {
2162         struct nbu2ss_req *req, *n;
2163
2164         /* Endpoint Disable */
2165         _nbu2ss_epn_exit(udc, ep);
2166
2167         /* DMA Disable */
2168         _nbu2ss_ep_dma_exit(udc, ep);
2169
2170         if (list_empty(&ep->queue))
2171                 return 0;
2172
2173         /* called with irqs blocked */
2174         list_for_each_entry_safe(req, n, &ep->queue, queue) {
2175                 _nbu2ss_ep_done(ep, req, status);
2176         }
2177
2178         return 0;
2179 }
2180
2181 /*-------------------------------------------------------------------------*/
2182 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2183 {
2184         struct nbu2ss_ep        *ep;
2185
2186         udc->gadget.speed = USB_SPEED_UNKNOWN;
2187
2188         _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2189
2190         /* Endpoint n */
2191         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2192                 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2193         }
2194 }
2195
2196 /*-------------------------------------------------------------------------*/
2197 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2198 {
2199         u32     reg_dt;
2200
2201         if (udc->vbus_active == 0)
2202                 return -ESHUTDOWN;
2203
2204         if (is_on) {
2205                 /* D+ Pullup */
2206                 if (udc->driver) {
2207                         reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2208                                 | PUE2) & ~(u32)CONNECTB;
2209
2210                         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2211                 }
2212
2213         } else {
2214                 /* D+ Pulldown */
2215                 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2216                         & ~(u32)PUE2;
2217
2218                 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2219                 udc->gadget.speed = USB_SPEED_UNKNOWN;
2220         }
2221
2222         return 0;
2223 }
2224
2225 /*-------------------------------------------------------------------------*/
2226 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2227 {
2228         struct fc_regs  *p = udc->p_regs;
2229
2230         if (udc->vbus_active == 0)
2231                 return;
2232
2233         if (ep->epnum == 0) {
2234                 /* EP0 */
2235                 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2236
2237         } else {
2238                 /* EPN */
2239                 _nbu2ss_ep_dma_abort(udc, ep);
2240                 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPN_BCLR);
2241         }
2242 }
2243
2244 /*-------------------------------------------------------------------------*/
2245 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2246 {
2247         int     waitcnt = 0;
2248
2249         if (udc->udc_enabled)
2250                 return 0;
2251
2252         /* Reset */
2253         _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2254         udelay(EPC_RST_DISABLE_TIME);   /* 1us wait */
2255
2256         _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2257         mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2258
2259         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2260
2261         _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2262
2263                 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2264                                HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2265
2266         while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2267                 waitcnt++;
2268                 udelay(1);      /* 1us wait */
2269                 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2270                         dev_err(udc->dev, "*** Reset Cancel failed\n");
2271                         return -EINVAL;
2272                 }
2273         }
2274
2275                 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2276
2277         _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2278
2279         /* EP0 */
2280         _nbu2ss_ep0_enable(udc);
2281
2282         /* USB Interrupt Enable */
2283         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2284
2285         udc->udc_enabled = TRUE;
2286
2287         return 0;
2288 }
2289
2290 /*-------------------------------------------------------------------------*/
2291 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2292 {
2293         _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2294         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2295 }
2296
2297 /*-------------------------------------------------------------------------*/
2298 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2299 {
2300         if (udc->udc_enabled) {
2301                 udc->udc_enabled = FALSE;
2302                 _nbu2ss_reset_controller(udc);
2303                 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2304         }
2305 }
2306
2307 /*-------------------------------------------------------------------------*/
2308 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2309 {
2310         int     nret;
2311         u32     reg_dt;
2312
2313         /* chattering */
2314         mdelay(VBUS_CHATTERING_MDELAY);         /* wait (ms) */
2315
2316         /* VBUS ON Check*/
2317         reg_dt = gpio_get_value(VBUS_VALUE);
2318         if (reg_dt == 0) {
2319                 udc->linux_suspended = 0;
2320
2321                 _nbu2ss_reset_controller(udc);
2322                 dev_info(udc->dev, " ----- VBUS OFF\n");
2323
2324                 if (udc->vbus_active == 1) {
2325                         /* VBUS OFF */
2326                         udc->vbus_active = 0;
2327                         if (udc->usb_suspended) {
2328                                 udc->usb_suspended = 0;
2329                                 /* _nbu2ss_reset_controller(udc); */
2330                         }
2331                         udc->devstate = USB_STATE_NOTATTACHED;
2332
2333                         _nbu2ss_quiesce(udc);
2334                         if (udc->driver) {
2335                                 spin_unlock(&udc->lock);
2336                                 udc->driver->disconnect(&udc->gadget);
2337                                 spin_lock(&udc->lock);
2338                         }
2339
2340                         _nbu2ss_disable_controller(udc);
2341                 }
2342         } else {
2343                 mdelay(5);              /* wait (5ms) */
2344                 reg_dt = gpio_get_value(VBUS_VALUE);
2345                 if (reg_dt == 0)
2346                         return;
2347
2348                 dev_info(udc->dev, " ----- VBUS ON\n");
2349
2350                 if (udc->linux_suspended)
2351                         return;
2352
2353                 if (udc->vbus_active == 0) {
2354                         /* VBUS ON */
2355                         udc->vbus_active = 1;
2356                         udc->devstate = USB_STATE_POWERED;
2357
2358                         nret = _nbu2ss_enable_controller(udc);
2359                         if (nret < 0) {
2360                                 _nbu2ss_disable_controller(udc);
2361                                 udc->vbus_active = 0;
2362                                 return;
2363                         }
2364
2365                         _nbu2ss_pullup(udc, 1);
2366
2367 #ifdef UDC_DEBUG_DUMP
2368                         _nbu2ss_dump_register(udc);
2369 #endif /* UDC_DEBUG_DUMP */
2370
2371                 } else {
2372                         if (udc->devstate == USB_STATE_POWERED)
2373                                 _nbu2ss_pullup(udc, 1);
2374                 }
2375         }
2376 }
2377
2378 /*-------------------------------------------------------------------------*/
2379 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2380 {
2381         udc->devstate           = USB_STATE_DEFAULT;
2382         udc->remote_wakeup      = 0;
2383
2384         _nbu2ss_quiesce(udc);
2385
2386         udc->ep0state = EP0_IDLE;
2387 }
2388
2389 /*-------------------------------------------------------------------------*/
2390 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2391 {
2392         if (udc->usb_suspended == 1) {
2393                 udc->usb_suspended = 0;
2394                 if (udc->driver && udc->driver->resume) {
2395                         spin_unlock(&udc->lock);
2396                         udc->driver->resume(&udc->gadget);
2397                         spin_lock(&udc->lock);
2398                 }
2399         }
2400 }
2401
2402 /*-------------------------------------------------------------------------*/
2403 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2404 {
2405         u32     reg_dt;
2406
2407         if (udc->usb_suspended == 0) {
2408                 reg_dt = gpio_get_value(VBUS_VALUE);
2409
2410                 if (reg_dt == 0)
2411                         return;
2412
2413                 udc->usb_suspended = 1;
2414                 if (udc->driver && udc->driver->suspend) {
2415                         spin_unlock(&udc->lock);
2416                         udc->driver->suspend(&udc->gadget);
2417                         spin_lock(&udc->lock);
2418                 }
2419
2420                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2421         }
2422 }
2423
2424 /*-------------------------------------------------------------------------*/
2425 /* VBUS (GPIO153) Interrupt */
2426 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2427 {
2428         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2429
2430         spin_lock(&udc->lock);
2431         _nbu2ss_check_vbus(udc);
2432         spin_unlock(&udc->lock);
2433
2434         return IRQ_HANDLED;
2435 }
2436
2437 /*-------------------------------------------------------------------------*/
2438 /* Interrupt (udc) */
2439 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2440 {
2441         u8      suspend_flag = 0;
2442         u32     status;
2443         u32     epnum, int_bit;
2444
2445         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2446         struct fc_regs  *preg = udc->p_regs;
2447
2448         if (gpio_get_value(VBUS_VALUE) == 0) {
2449                 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2450                 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2451                 return IRQ_HANDLED;
2452         }
2453
2454         spin_lock(&udc->lock);
2455
2456         for (;;) {
2457                 if (gpio_get_value(VBUS_VALUE) == 0) {
2458                         _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2459                         _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2460                         status = 0;
2461                 } else {
2462                         status = _nbu2ss_readl(&preg->USB_INT_STA);
2463                 }
2464
2465                 if (status == 0)
2466                         break;
2467
2468                 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2469
2470                 if (status & USB_RST_INT) {
2471                         /* USB Reset */
2472                         _nbu2ss_int_bus_reset(udc);
2473                 }
2474
2475                 if (status & RSUM_INT) {
2476                         /* Resume */
2477                         _nbu2ss_int_usb_resume(udc);
2478                 }
2479
2480                 if (status & SPND_INT) {
2481                         /* Suspend */
2482                         suspend_flag = 1;
2483                 }
2484
2485                 if (status & EPN_INT) {
2486                         /* EP INT */
2487                         int_bit = status >> 8;
2488
2489                         for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2490                                 if (0x01 & int_bit)
2491                                         _nbu2ss_ep_int(udc, epnum);
2492
2493                                 int_bit >>= 1;
2494
2495                                 if (int_bit == 0)
2496                                         break;
2497                         }
2498                 }
2499         }
2500
2501         if (suspend_flag)
2502                 _nbu2ss_int_usb_suspend(udc);
2503
2504         spin_unlock(&udc->lock);
2505
2506         return IRQ_HANDLED;
2507 }
2508
2509 /*-------------------------------------------------------------------------*/
2510 /* usb_ep_ops */
2511 static int nbu2ss_ep_enable(
2512         struct usb_ep *_ep,
2513         const struct usb_endpoint_descriptor *desc)
2514 {
2515         u8              ep_type;
2516         unsigned long   flags;
2517
2518         struct nbu2ss_ep        *ep;
2519         struct nbu2ss_udc       *udc;
2520
2521         if ((!_ep) || (!desc)) {
2522                 pr_err(" *** %s, bad param\n", __func__);
2523                 return -EINVAL;
2524         }
2525
2526         ep = container_of(_ep, struct nbu2ss_ep, ep);
2527         if ((!ep) || (!ep->udc)) {
2528                 pr_err(" *** %s, ep == NULL !!\n", __func__);
2529                 return -EINVAL;
2530         }
2531
2532         ep_type = usb_endpoint_type(desc);
2533         if ((ep_type == USB_ENDPOINT_XFER_CONTROL) ||
2534             (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2535                 pr_err(" *** %s, bat bmAttributes\n", __func__);
2536                 return -EINVAL;
2537         }
2538
2539         udc = ep->udc;
2540         if (udc->vbus_active == 0)
2541                 return -ESHUTDOWN;
2542
2543         if ((!udc->driver) || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2544                 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2545                 return -ESHUTDOWN;
2546         }
2547
2548         spin_lock_irqsave(&udc->lock, flags);
2549
2550         ep->desc = desc;
2551         ep->epnum = usb_endpoint_num(desc);
2552         ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2553         ep->ep_type = ep_type;
2554         ep->wedged = 0;
2555         ep->halted = FALSE;
2556         ep->stalled = FALSE;
2557
2558         ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2559
2560         /* DMA setting */
2561         _nbu2ss_ep_dma_init(udc, ep);
2562
2563         /* Endpoint setting */
2564         _nbu2ss_ep_init(udc, ep);
2565
2566         spin_unlock_irqrestore(&udc->lock, flags);
2567
2568         return 0;
2569 }
2570
2571 /*-------------------------------------------------------------------------*/
2572 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2573 {
2574         struct nbu2ss_ep        *ep;
2575         struct nbu2ss_udc       *udc;
2576         unsigned long           flags;
2577
2578         if (!_ep) {
2579                 pr_err(" *** %s, bad param\n", __func__);
2580                 return -EINVAL;
2581         }
2582
2583         ep = container_of(_ep, struct nbu2ss_ep, ep);
2584         if ((!ep) || (!ep->udc)) {
2585                 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2586                 return -EINVAL;
2587         }
2588
2589         udc = ep->udc;
2590         if (udc->vbus_active == 0)
2591                 return -ESHUTDOWN;
2592
2593         spin_lock_irqsave(&udc->lock, flags);
2594         _nbu2ss_nuke(udc, ep, -EINPROGRESS);            /* dequeue request */
2595         spin_unlock_irqrestore(&udc->lock, flags);
2596
2597         return 0;
2598 }
2599
2600 /*-------------------------------------------------------------------------*/
2601 static struct usb_request *nbu2ss_ep_alloc_request(
2602         struct usb_ep *ep,
2603         gfp_t gfp_flags)
2604 {
2605         struct nbu2ss_req *req;
2606
2607         req = kzalloc(sizeof(*req), gfp_flags);
2608         if (!req)
2609                 return NULL;
2610
2611 #ifdef USE_DMA
2612         req->req.dma = DMA_ADDR_INVALID;
2613 #endif
2614         INIT_LIST_HEAD(&req->queue);
2615
2616         return &req->req;
2617 }
2618
2619 /*-------------------------------------------------------------------------*/
2620 static void nbu2ss_ep_free_request(
2621         struct usb_ep *_ep,
2622         struct usb_request *_req)
2623 {
2624         struct nbu2ss_req *req;
2625
2626         if (_req) {
2627                 req = container_of(_req, struct nbu2ss_req, req);
2628
2629                 kfree(req);
2630         }
2631 }
2632
2633 /*-------------------------------------------------------------------------*/
2634 static int nbu2ss_ep_queue(
2635         struct usb_ep *_ep,
2636         struct usb_request *_req,
2637         gfp_t gfp_flags)
2638 {
2639         struct nbu2ss_req       *req;
2640         struct nbu2ss_ep        *ep;
2641         struct nbu2ss_udc       *udc;
2642         unsigned long           flags;
2643         bool                    bflag;
2644         int                     result = -EINVAL;
2645
2646         /* catch various bogus parameters */
2647         if ((!_ep) || (!_req)) {
2648                 if (!_ep)
2649                         pr_err("udc: %s --- _ep == NULL\n", __func__);
2650
2651                 if (!_req)
2652                         pr_err("udc: %s --- _req == NULL\n", __func__);
2653
2654                 return -EINVAL;
2655         }
2656
2657         req = container_of(_req, struct nbu2ss_req, req);
2658         if (unlikely(!_req->complete ||
2659                      !_req->buf ||
2660                      !list_empty(&req->queue))) {
2661                 if (!_req->complete)
2662                         pr_err("udc: %s --- !_req->complete\n", __func__);
2663
2664                 if (!_req->buf)
2665                         pr_err("udc:%s --- !_req->buf\n", __func__);
2666
2667                 if (!list_empty(&req->queue))
2668                         pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2669
2670                 return -EINVAL;
2671         }
2672
2673         ep = container_of(_ep, struct nbu2ss_ep, ep);
2674         udc = ep->udc;
2675
2676         if (udc->vbus_active == 0) {
2677                 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2678                 return -ESHUTDOWN;
2679         }
2680
2681         if (unlikely(!udc->driver)) {
2682                 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2683                         udc->driver);
2684                 return -ESHUTDOWN;
2685         }
2686
2687         spin_lock_irqsave(&udc->lock, flags);
2688
2689 #ifdef USE_DMA
2690         if ((uintptr_t)req->req.buf & 0x3)
2691                 req->unaligned = TRUE;
2692         else
2693                 req->unaligned = FALSE;
2694
2695         if (req->unaligned) {
2696                 if (!ep->virt_buf)
2697                         ep->virt_buf = (u8 *)dma_alloc_coherent(
2698                                 NULL, PAGE_SIZE,
2699                                 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2700                 if (ep->epnum > 0)  {
2701                         if (ep->direct == USB_DIR_IN)
2702                                 memcpy(ep->virt_buf, req->req.buf,
2703                                        req->req.length);
2704                 }
2705         }
2706
2707         if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2708             (req->req.dma != 0))
2709                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2710 #endif
2711
2712         _req->status = -EINPROGRESS;
2713         _req->actual = 0;
2714
2715         bflag = list_empty(&ep->queue);
2716         list_add_tail(&req->queue, &ep->queue);
2717
2718         if (bflag && !ep->stalled) {
2719                 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2720                 if (result < 0) {
2721                         dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2722                                 result);
2723                         list_del(&req->queue);
2724                 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2725 #ifdef USE_DMA
2726                         if (req->req.length < 4 &&
2727                             req->req.length == req->req.actual)
2728 #else
2729                         if (req->req.length == req->req.actual)
2730 #endif
2731                                 _nbu2ss_ep_done(ep, req, result);
2732                 }
2733         }
2734
2735         spin_unlock_irqrestore(&udc->lock, flags);
2736
2737         return 0;
2738 }
2739
2740 /*-------------------------------------------------------------------------*/
2741 static int nbu2ss_ep_dequeue(
2742         struct usb_ep *_ep,
2743         struct usb_request *_req)
2744 {
2745         struct nbu2ss_req       *req;
2746         struct nbu2ss_ep        *ep;
2747         struct nbu2ss_udc       *udc;
2748         unsigned long flags;
2749
2750         /* catch various bogus parameters */
2751         if ((!_ep) || (!_req)) {
2752                 /* pr_err("%s, bad param(1)\n", __func__); */
2753                 return -EINVAL;
2754         }
2755
2756         ep = container_of(_ep, struct nbu2ss_ep, ep);
2757         if (!ep) {
2758                 pr_err("%s, ep == NULL !!\n", __func__);
2759                 return -EINVAL;
2760         }
2761
2762         udc = ep->udc;
2763         if (!udc)
2764                 return -EINVAL;
2765
2766         spin_lock_irqsave(&udc->lock, flags);
2767
2768         /* make sure it's actually queued on this endpoint */
2769         list_for_each_entry(req, &ep->queue, queue) {
2770                 if (&req->req == _req)
2771                         break;
2772         }
2773         if (&req->req != _req) {
2774                 spin_unlock_irqrestore(&udc->lock, flags);
2775                 pr_debug("%s no queue(EINVAL)\n", __func__);
2776                 return -EINVAL;
2777         }
2778
2779         _nbu2ss_ep_done(ep, req, -ECONNRESET);
2780
2781         spin_unlock_irqrestore(&udc->lock, flags);
2782
2783         return 0;
2784 }
2785
2786 /*-------------------------------------------------------------------------*/
2787 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2788 {
2789         u8              ep_adrs;
2790         unsigned long   flags;
2791
2792         struct nbu2ss_ep        *ep;
2793         struct nbu2ss_udc       *udc;
2794
2795         if (!_ep) {
2796                 pr_err("%s, bad param\n", __func__);
2797                 return -EINVAL;
2798         }
2799
2800         ep = container_of(_ep, struct nbu2ss_ep, ep);
2801         if (!ep) {
2802                 pr_err("%s, bad ep\n", __func__);
2803                 return -EINVAL;
2804         }
2805
2806         udc = ep->udc;
2807         if (!udc) {
2808                 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2809                 return -EINVAL;
2810         }
2811
2812         spin_lock_irqsave(&udc->lock, flags);
2813
2814         ep_adrs = ep->epnum | ep->direct;
2815         if (value == 0) {
2816                 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2817                 ep->stalled = FALSE;
2818         } else {
2819                 if (list_empty(&ep->queue))
2820                         _nbu2ss_epn_set_stall(udc, ep);
2821                 else
2822                         ep->stalled = TRUE;
2823         }
2824
2825         if (value == 0)
2826                 ep->wedged = 0;
2827
2828         spin_unlock_irqrestore(&udc->lock, flags);
2829
2830         return 0;
2831 }
2832
2833 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2834 {
2835         return nbu2ss_ep_set_halt(_ep, 1);
2836 }
2837
2838 /*-------------------------------------------------------------------------*/
2839 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2840 {
2841         u32             data;
2842         struct nbu2ss_ep        *ep;
2843         struct nbu2ss_udc       *udc;
2844         unsigned long           flags;
2845         struct fc_regs          *preg;
2846
2847         if (!_ep) {
2848                 pr_err("%s, bad param\n", __func__);
2849                 return -EINVAL;
2850         }
2851
2852         ep = container_of(_ep, struct nbu2ss_ep, ep);
2853         if (!ep) {
2854                 pr_err("%s, bad ep\n", __func__);
2855                 return -EINVAL;
2856         }
2857
2858         udc = ep->udc;
2859         if (!udc) {
2860                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2861                 return -EINVAL;
2862         }
2863
2864         preg = udc->p_regs;
2865
2866         data = gpio_get_value(VBUS_VALUE);
2867         if (data == 0)
2868                 return -EINVAL;
2869
2870         spin_lock_irqsave(&udc->lock, flags);
2871
2872         if (ep->epnum == 0) {
2873                 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2874
2875         } else {
2876                 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2877                         & EPN_LDATA;
2878         }
2879
2880         spin_unlock_irqrestore(&udc->lock, flags);
2881
2882         return 0;
2883 }
2884
2885 /*-------------------------------------------------------------------------*/
2886 static void  nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2887 {
2888         u32                     data;
2889         struct nbu2ss_ep        *ep;
2890         struct nbu2ss_udc       *udc;
2891         unsigned long           flags;
2892
2893         if (!_ep) {
2894                 pr_err("udc: %s, bad param\n", __func__);
2895                 return;
2896         }
2897
2898         ep = container_of(_ep, struct nbu2ss_ep, ep);
2899         if (!ep) {
2900                 pr_err("udc: %s, bad ep\n", __func__);
2901                 return;
2902         }
2903
2904         udc = ep->udc;
2905         if (!udc) {
2906                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2907                 return;
2908         }
2909
2910         data = gpio_get_value(VBUS_VALUE);
2911         if (data == 0)
2912                 return;
2913
2914         spin_lock_irqsave(&udc->lock, flags);
2915         _nbu2ss_fifo_flush(udc, ep);
2916         spin_unlock_irqrestore(&udc->lock, flags);
2917 }
2918
2919 /*-------------------------------------------------------------------------*/
2920 static const struct usb_ep_ops nbu2ss_ep_ops = {
2921         .enable         = nbu2ss_ep_enable,
2922         .disable        = nbu2ss_ep_disable,
2923
2924         .alloc_request  = nbu2ss_ep_alloc_request,
2925         .free_request   = nbu2ss_ep_free_request,
2926
2927         .queue          = nbu2ss_ep_queue,
2928         .dequeue        = nbu2ss_ep_dequeue,
2929
2930         .set_halt       = nbu2ss_ep_set_halt,
2931         .set_wedge      = nbu2ss_ep_set_wedge,
2932
2933         .fifo_status    = nbu2ss_ep_fifo_status,
2934         .fifo_flush     = nbu2ss_ep_fifo_flush,
2935 };
2936
2937 /*-------------------------------------------------------------------------*/
2938 /* usb_gadget_ops */
2939
2940 /*-------------------------------------------------------------------------*/
2941 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2942 {
2943         u32                     data;
2944         struct nbu2ss_udc       *udc;
2945
2946         if (!pgadget) {
2947                 pr_err("udc: %s, bad param\n", __func__);
2948                 return -EINVAL;
2949         }
2950
2951         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2952         if (!udc) {
2953                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2954                 return -EINVAL;
2955         }
2956
2957         data = gpio_get_value(VBUS_VALUE);
2958         if (data == 0)
2959                 return -EINVAL;
2960
2961         return _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2962 }
2963
2964 /*-------------------------------------------------------------------------*/
2965 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2966 {
2967         int     i;
2968         u32     data;
2969
2970         struct nbu2ss_udc       *udc;
2971
2972         if (!pgadget) {
2973                 pr_err("%s, bad param\n", __func__);
2974                 return -EINVAL;
2975         }
2976
2977         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2978         if (!udc) {
2979                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2980                 return -EINVAL;
2981         }
2982
2983         data = gpio_get_value(VBUS_VALUE);
2984         if (data == 0) {
2985                 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
2986                 return -EINVAL;
2987         }
2988
2989         _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
2990
2991         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2992                 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
2993
2994                 if (data & PLL_LOCK)
2995                         break;
2996         }
2997
2998         _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
2999
3000         return 0;
3001 }
3002
3003 /*-------------------------------------------------------------------------*/
3004 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3005                                       int is_selfpowered)
3006 {
3007         struct nbu2ss_udc       *udc;
3008         unsigned long           flags;
3009
3010         if (!pgadget) {
3011                 pr_err("%s, bad param\n", __func__);
3012                 return -EINVAL;
3013         }
3014
3015         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3016
3017         spin_lock_irqsave(&udc->lock, flags);
3018         pgadget->is_selfpowered = (is_selfpowered != 0);
3019         spin_unlock_irqrestore(&udc->lock, flags);
3020
3021         return 0;
3022 }
3023
3024 /*-------------------------------------------------------------------------*/
3025 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3026 {
3027         return 0;
3028 }
3029
3030 /*-------------------------------------------------------------------------*/
3031 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
3032 {
3033         struct nbu2ss_udc       *udc;
3034         unsigned long           flags;
3035
3036         if (!pgadget) {
3037                 pr_err("%s, bad param\n", __func__);
3038                 return -EINVAL;
3039         }
3040
3041         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3042
3043         spin_lock_irqsave(&udc->lock, flags);
3044         udc->mA = mA;
3045         spin_unlock_irqrestore(&udc->lock, flags);
3046
3047         return 0;
3048 }
3049
3050 /*-------------------------------------------------------------------------*/
3051 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3052 {
3053         struct nbu2ss_udc       *udc;
3054         unsigned long           flags;
3055
3056         if (!pgadget) {
3057                 pr_err("%s, bad param\n", __func__);
3058                 return -EINVAL;
3059         }
3060
3061         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3062
3063         if (!udc->driver) {
3064                 pr_warn("%s, Not Regist Driver\n", __func__);
3065                 return -EINVAL;
3066         }
3067
3068         if (udc->vbus_active == 0)
3069                 return -ESHUTDOWN;
3070
3071         spin_lock_irqsave(&udc->lock, flags);
3072         _nbu2ss_pullup(udc, is_on);
3073         spin_unlock_irqrestore(&udc->lock, flags);
3074
3075         return 0;
3076 }
3077
3078 /*-------------------------------------------------------------------------*/
3079 static int nbu2ss_gad_ioctl(
3080         struct usb_gadget *pgadget,
3081         unsigned int code,
3082         unsigned long param)
3083 {
3084         return 0;
3085 }
3086
3087 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3088         .get_frame              = nbu2ss_gad_get_frame,
3089         .wakeup                 = nbu2ss_gad_wakeup,
3090         .set_selfpowered        = nbu2ss_gad_set_selfpowered,
3091         .vbus_session           = nbu2ss_gad_vbus_session,
3092         .vbus_draw              = nbu2ss_gad_vbus_draw,
3093         .pullup                 = nbu2ss_gad_pullup,
3094         .ioctl                  = nbu2ss_gad_ioctl,
3095 };
3096
3097 static const struct {
3098         const char *name;
3099         const struct usb_ep_caps caps;
3100 } ep_info[NUM_ENDPOINTS] = {
3101 #define EP_INFO(_name, _caps) \
3102         { \
3103                 .name = _name, \
3104                 .caps = _caps, \
3105         }
3106
3107         EP_INFO("ep0",
3108                 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3109         EP_INFO("ep1-bulk",
3110                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3111         EP_INFO("ep2-bulk",
3112                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3113         EP_INFO("ep3in-int",
3114                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3115         EP_INFO("ep4-iso",
3116                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3117         EP_INFO("ep5-iso",
3118                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3119         EP_INFO("ep6-bulk",
3120                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3121         EP_INFO("ep7-bulk",
3122                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3123         EP_INFO("ep8in-int",
3124                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3125         EP_INFO("ep9-iso",
3126                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3127         EP_INFO("epa-iso",
3128                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3129         EP_INFO("epb-bulk",
3130                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3131         EP_INFO("epc-bulk",
3132                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3133         EP_INFO("epdin-int",
3134                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3135
3136 #undef EP_INFO
3137 };
3138
3139 /*-------------------------------------------------------------------------*/
3140 static void nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3141 {
3142         int     i;
3143
3144         INIT_LIST_HEAD(&udc->gadget.ep_list);
3145         udc->gadget.ep0 = &udc->ep[0].ep;
3146
3147         for (i = 0; i < NUM_ENDPOINTS; i++) {
3148                 struct nbu2ss_ep *ep = &udc->ep[i];
3149
3150                 ep->udc = udc;
3151                 ep->desc = NULL;
3152
3153                 ep->ep.driver_data = NULL;
3154                 ep->ep.name = ep_info[i].name;
3155                 ep->ep.caps = ep_info[i].caps;
3156                 ep->ep.ops = &nbu2ss_ep_ops;
3157
3158                 usb_ep_set_maxpacket_limit(&ep->ep,
3159                                            i == 0 ? EP0_PACKETSIZE
3160                                            : EP_PACKETSIZE);
3161
3162                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3163                 INIT_LIST_HEAD(&ep->queue);
3164         }
3165
3166         list_del_init(&udc->ep[0].ep.ep_list);
3167 }
3168
3169 /*-------------------------------------------------------------------------*/
3170 /* platform_driver */
3171 static int nbu2ss_drv_contest_init(
3172         struct platform_device *pdev,
3173         struct nbu2ss_udc *udc)
3174 {
3175         spin_lock_init(&udc->lock);
3176         udc->dev = &pdev->dev;
3177
3178         udc->gadget.is_selfpowered = 1;
3179         udc->devstate = USB_STATE_NOTATTACHED;
3180         udc->pdev = pdev;
3181         udc->mA = 0;
3182
3183         udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3184
3185         /* init Endpoint */
3186         nbu2ss_drv_ep_init(udc);
3187
3188         /* init Gadget */
3189         udc->gadget.ops = &nbu2ss_gadget_ops;
3190         udc->gadget.ep0 = &udc->ep[0].ep;
3191         udc->gadget.speed = USB_SPEED_UNKNOWN;
3192         udc->gadget.name = driver_name;
3193         /* udc->gadget.is_dualspeed = 1; */
3194
3195         device_initialize(&udc->gadget.dev);
3196
3197         dev_set_name(&udc->gadget.dev, "gadget");
3198         udc->gadget.dev.parent = &pdev->dev;
3199         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3200
3201         return 0;
3202 }
3203
3204 /*
3205  *      probe - binds to the platform device
3206  */
3207 static int nbu2ss_drv_probe(struct platform_device *pdev)
3208 {
3209         int     status = -ENODEV;
3210         struct nbu2ss_udc       *udc;
3211         struct resource *r;
3212         int irq;
3213         void __iomem *mmio_base;
3214
3215         udc = &udc_controller;
3216         memset(udc, 0, sizeof(struct nbu2ss_udc));
3217
3218         platform_set_drvdata(pdev, udc);
3219
3220         /* require I/O memory and IRQ to be provided as resources */
3221         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3222         mmio_base = devm_ioremap_resource(&pdev->dev, r);
3223         if (IS_ERR(mmio_base))
3224                 return PTR_ERR(mmio_base);
3225
3226         irq = platform_get_irq(pdev, 0);
3227         if (irq < 0) {
3228                 dev_err(&pdev->dev, "failed to get IRQ\n");
3229                 return irq;
3230         }
3231         status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3232                                   0, driver_name, udc);
3233
3234         /* IO Memory */
3235         udc->p_regs = (struct fc_regs *)mmio_base;
3236
3237         /* USB Function Controller Interrupt */
3238         if (status != 0) {
3239                 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3240                 return status;
3241         }
3242
3243         /* Driver Initialization */
3244         status = nbu2ss_drv_contest_init(pdev, udc);
3245         if (status < 0) {
3246                 /* Error */
3247                 return status;
3248         }
3249
3250         /* VBUS Interrupt */
3251         irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3252         status = request_irq(INT_VBUS,
3253                              _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3254
3255         if (status != 0) {
3256                 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3257                 return status;
3258         }
3259
3260         return status;
3261 }
3262
3263 /*-------------------------------------------------------------------------*/
3264 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3265 {
3266         struct nbu2ss_udc       *udc;
3267
3268         udc = platform_get_drvdata(pdev);
3269         if (!udc)
3270                 return;
3271
3272         _nbu2ss_disable_controller(udc);
3273 }
3274
3275 /*-------------------------------------------------------------------------*/
3276 static int nbu2ss_drv_remove(struct platform_device *pdev)
3277 {
3278         struct nbu2ss_udc       *udc;
3279         struct nbu2ss_ep        *ep;
3280         int     i;
3281
3282         udc = &udc_controller;
3283
3284         for (i = 0; i < NUM_ENDPOINTS; i++) {
3285                 ep = &udc->ep[i];
3286                 if (ep->virt_buf)
3287                         dma_free_coherent(NULL, PAGE_SIZE, (void *)ep->virt_buf,
3288                                           ep->phys_buf);
3289         }
3290
3291         /* Interrupt Handler - Release */
3292         free_irq(INT_VBUS, udc);
3293
3294         return 0;
3295 }
3296
3297 /*-------------------------------------------------------------------------*/
3298 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3299 {
3300         struct nbu2ss_udc       *udc;
3301
3302         udc = platform_get_drvdata(pdev);
3303         if (!udc)
3304                 return 0;
3305
3306         if (udc->vbus_active) {
3307                 udc->vbus_active = 0;
3308                 udc->devstate = USB_STATE_NOTATTACHED;
3309                 udc->linux_suspended = 1;
3310
3311                 if (udc->usb_suspended) {
3312                         udc->usb_suspended = 0;
3313                         _nbu2ss_reset_controller(udc);
3314                 }
3315
3316                 _nbu2ss_quiesce(udc);
3317         }
3318         _nbu2ss_disable_controller(udc);
3319
3320         return 0;
3321 }
3322
3323 /*-------------------------------------------------------------------------*/
3324 static int nbu2ss_drv_resume(struct platform_device *pdev)
3325 {
3326         u32     data;
3327         struct nbu2ss_udc       *udc;
3328
3329         udc = platform_get_drvdata(pdev);
3330         if (!udc)
3331                 return 0;
3332
3333         data = gpio_get_value(VBUS_VALUE);
3334         if (data) {
3335                 udc->vbus_active = 1;
3336                 udc->devstate = USB_STATE_POWERED;
3337                 _nbu2ss_enable_controller(udc);
3338                 _nbu2ss_pullup(udc, 1);
3339         }
3340
3341         udc->linux_suspended = 0;
3342
3343         return 0;
3344 }
3345
3346 static struct platform_driver udc_driver = {
3347         .probe          = nbu2ss_drv_probe,
3348         .shutdown       = nbu2ss_drv_shutdown,
3349         .remove         = nbu2ss_drv_remove,
3350         .suspend        = nbu2ss_drv_suspend,
3351         .resume         = nbu2ss_drv_resume,
3352         .driver         = {
3353                 .name   = driver_name,
3354         },
3355 };
3356
3357 module_platform_driver(udc_driver);
3358
3359 MODULE_DESCRIPTION(DRIVER_DESC);
3360 MODULE_AUTHOR("Renesas Electronics Corporation");
3361 MODULE_LICENSE("GPL");