2 * comedi/drivers/ni_labpc_common.c
4 * Common support code for "ni_labpc", "ni_labpc_pci" and "ni_labpc_cs".
6 * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/interrupt.h>
22 #include <linux/delay.h>
23 #include <linux/slab.h>
25 #include "../comedidev.h"
27 #include "comedi_8254.h"
30 #include "ni_labpc_regs.h"
31 #include "ni_labpc_isadma.h"
35 MODE_SINGLE_CHAN_INTERVAL,
40 static const struct comedi_lrange range_labpc_plus_ai = {
61 static const struct comedi_lrange range_labpc_1200_ai = {
80 static const struct comedi_lrange range_labpc_ao = {
88 * functions that do inb/outb and readb/writeb so we can use
89 * function pointers to decide which to use
91 static unsigned int labpc_inb(struct comedi_device *dev, unsigned long reg)
93 return inb(dev->iobase + reg);
96 static void labpc_outb(struct comedi_device *dev,
97 unsigned int byte, unsigned long reg)
99 outb(byte, dev->iobase + reg);
102 static unsigned int labpc_readb(struct comedi_device *dev, unsigned long reg)
104 return readb(dev->mmio + reg);
107 static void labpc_writeb(struct comedi_device *dev,
108 unsigned int byte, unsigned long reg)
110 writeb(byte, dev->mmio + reg);
113 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
115 struct labpc_private *devpriv = dev->private;
118 spin_lock_irqsave(&dev->spinlock, flags);
119 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
120 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
121 spin_unlock_irqrestore(&dev->spinlock, flags);
124 devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
129 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
135 const struct labpc_boardinfo *board = dev->board_ptr;
136 struct labpc_private *devpriv = dev->private;
138 if (board->is_labpc1200) {
140 * The LabPC-1200 boards do not have a gain
141 * of '0x10'. Skip the range values that would
142 * result in this gain.
144 range += (range > 0) + (range > 7);
147 /* munge channel bits for differential/scan disabled mode */
148 if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
151 devpriv->cmd1 = CMD1_MA(chan);
152 devpriv->cmd1 |= CMD1_GAIN(range);
154 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
157 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
158 struct comedi_subdevice *s,
160 enum transfer_type xfer,
165 const struct labpc_boardinfo *board = dev->board_ptr;
166 struct labpc_private *devpriv = dev->private;
168 if (!board->is_labpc1200)
171 /* reference inputs to ground or common? */
172 if (aref != AREF_GROUND)
173 devpriv->cmd6 |= CMD6_NRSE;
175 devpriv->cmd6 &= ~CMD6_NRSE;
177 /* bipolar or unipolar range? */
178 if (comedi_range_is_unipolar(s, range))
179 devpriv->cmd6 |= CMD6_ADCUNI;
181 devpriv->cmd6 &= ~CMD6_ADCUNI;
183 /* interrupt on fifo half full? */
184 if (xfer == fifo_half_full_transfer)
185 devpriv->cmd6 |= CMD6_HFINTEN;
187 devpriv->cmd6 &= ~CMD6_HFINTEN;
189 /* enable interrupt on counter a1 terminal count? */
191 devpriv->cmd6 |= CMD6_DQINTEN;
193 devpriv->cmd6 &= ~CMD6_DQINTEN;
195 /* are we scanning up or down through channels? */
196 if (mode == MODE_MULT_CHAN_UP)
197 devpriv->cmd6 |= CMD6_SCANUP;
199 devpriv->cmd6 &= ~CMD6_SCANUP;
201 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
204 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
206 struct labpc_private *devpriv = dev->private;
207 unsigned int lsb = devpriv->read_byte(dev, ADC_FIFO_REG);
208 unsigned int msb = devpriv->read_byte(dev, ADC_FIFO_REG);
210 return (msb << 8) | lsb;
213 static void labpc_clear_adc_fifo(struct comedi_device *dev)
215 struct labpc_private *devpriv = dev->private;
217 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
218 labpc_read_adc_fifo(dev);
221 static int labpc_ai_eoc(struct comedi_device *dev,
222 struct comedi_subdevice *s,
223 struct comedi_insn *insn,
224 unsigned long context)
226 struct labpc_private *devpriv = dev->private;
228 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
229 if (devpriv->stat1 & STAT1_DAVAIL)
234 static int labpc_ai_insn_read(struct comedi_device *dev,
235 struct comedi_subdevice *s,
236 struct comedi_insn *insn,
239 struct labpc_private *devpriv = dev->private;
240 unsigned int chan = CR_CHAN(insn->chanspec);
241 unsigned int range = CR_RANGE(insn->chanspec);
242 unsigned int aref = CR_AREF(insn->chanspec);
246 /* disable timed conversions, interrupt generation and dma */
247 labpc_cancel(dev, s);
249 labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
251 labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
254 /* setup cmd4 register */
256 devpriv->cmd4 |= CMD4_ECLKRCV;
257 /* single-ended/differential */
258 if (aref == AREF_DIFF)
259 devpriv->cmd4 |= CMD4_SEDIFF;
260 devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
262 /* initialize pacer counter to prevent any problems */
263 comedi_8254_set_mode(devpriv->counter, 0, I8254_MODE2 | I8254_BINARY);
265 labpc_clear_adc_fifo(dev);
267 for (i = 0; i < insn->n; i++) {
268 /* trigger conversion */
269 devpriv->write_byte(dev, 0x1, ADC_START_CONVERT_REG);
271 ret = comedi_timeout(dev, s, insn, labpc_ai_eoc, 0);
275 data[i] = labpc_read_adc_fifo(dev);
281 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
284 if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
290 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
293 if (cmd->convert_src != TRIG_TIMER)
296 if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
297 return cmd->scan_begin_arg;
299 return cmd->convert_arg;
302 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
303 enum scan_mode mode, unsigned int ns)
305 if (cmd->convert_src != TRIG_TIMER)
308 if (mode == MODE_SINGLE_CHAN &&
309 cmd->scan_begin_src == TRIG_TIMER) {
310 cmd->scan_begin_arg = ns;
311 if (cmd->convert_arg > cmd->scan_begin_arg)
312 cmd->convert_arg = cmd->scan_begin_arg;
314 cmd->convert_arg = ns;
318 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
321 if (cmd->scan_begin_src != TRIG_TIMER)
324 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
327 return cmd->scan_begin_arg;
330 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
331 enum scan_mode mode, unsigned int ns)
333 if (cmd->scan_begin_src != TRIG_TIMER)
336 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
339 cmd->scan_begin_arg = ns;
342 /* figures out what counter values to use based on command */
343 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
346 struct comedi_8254 *pacer = dev->pacer;
347 unsigned int convert_period = labpc_ai_convert_period(cmd, mode);
348 unsigned int scan_period = labpc_ai_scan_period(cmd, mode);
349 unsigned int base_period;
352 * If both convert and scan triggers are TRIG_TIMER, then they
353 * both rely on counter b0. If only one TRIG_TIMER is used, we
354 * can use the generic cascaded timing functions.
356 if (convert_period && scan_period) {
358 * pick the lowest divisor value we can (for maximum input
359 * clock speed on convert and scan counters)
361 pacer->next_div1 = (scan_period - 1) /
362 (pacer->osc_base * I8254_MAX_COUNT) + 1;
364 comedi_check_trigger_arg_min(&pacer->next_div1, 2);
365 comedi_check_trigger_arg_max(&pacer->next_div1,
368 base_period = pacer->osc_base * pacer->next_div1;
370 /* set a0 for conversion frequency and b1 for scan frequency */
371 switch (cmd->flags & CMDF_ROUND_MASK) {
373 case CMDF_ROUND_NEAREST:
374 pacer->next_div = DIV_ROUND_CLOSEST(convert_period,
376 pacer->next_div2 = DIV_ROUND_CLOSEST(scan_period,
380 pacer->next_div = DIV_ROUND_UP(convert_period,
382 pacer->next_div2 = DIV_ROUND_UP(scan_period,
385 case CMDF_ROUND_DOWN:
386 pacer->next_div = convert_period / base_period;
387 pacer->next_div2 = scan_period / base_period;
390 /* make sure a0 and b1 values are acceptable */
391 comedi_check_trigger_arg_min(&pacer->next_div, 2);
392 comedi_check_trigger_arg_max(&pacer->next_div, I8254_MAX_COUNT);
393 comedi_check_trigger_arg_min(&pacer->next_div2, 2);
394 comedi_check_trigger_arg_max(&pacer->next_div2,
397 /* write corrected timings to command */
398 labpc_set_ai_convert_period(cmd, mode,
399 base_period * pacer->next_div);
400 labpc_set_ai_scan_period(cmd, mode,
401 base_period * pacer->next_div2);
402 } else if (scan_period) {
404 * calculate cascaded counter values
405 * that give desired scan timing
406 * (pacer->next_div2 / pacer->next_div1)
408 comedi_8254_cascade_ns_to_timer(pacer, &scan_period,
410 labpc_set_ai_scan_period(cmd, mode, scan_period);
411 } else if (convert_period) {
413 * calculate cascaded counter values
414 * that give desired conversion timing
415 * (pacer->next_div / pacer->next_div1)
417 comedi_8254_cascade_ns_to_timer(pacer, &convert_period,
419 /* transfer div2 value so correct timer gets updated */
420 pacer->next_div = pacer->next_div2;
421 labpc_set_ai_convert_period(cmd, mode, convert_period);
425 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
430 if (cmd->chanlist_len == 1)
431 return MODE_SINGLE_CHAN;
433 /* chanlist may be NULL during cmdtest */
435 return MODE_MULT_CHAN_UP;
437 chan0 = CR_CHAN(cmd->chanlist[0]);
438 chan1 = CR_CHAN(cmd->chanlist[1]);
441 return MODE_MULT_CHAN_UP;
444 return MODE_MULT_CHAN_DOWN;
446 return MODE_SINGLE_CHAN_INTERVAL;
449 static int labpc_ai_check_chanlist(struct comedi_device *dev,
450 struct comedi_subdevice *s,
451 struct comedi_cmd *cmd)
453 enum scan_mode mode = labpc_ai_scan_mode(cmd);
454 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
455 unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
456 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
459 for (i = 0; i < cmd->chanlist_len; i++) {
460 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
461 unsigned int range = CR_RANGE(cmd->chanlist[i]);
462 unsigned int aref = CR_AREF(cmd->chanlist[i]);
465 case MODE_SINGLE_CHAN:
467 case MODE_SINGLE_CHAN_INTERVAL:
469 dev_dbg(dev->class_dev,
470 "channel scanning order specified in chanlist is not supported by hardware\n");
474 case MODE_MULT_CHAN_UP:
476 dev_dbg(dev->class_dev,
477 "channel scanning order specified in chanlist is not supported by hardware\n");
481 case MODE_MULT_CHAN_DOWN:
482 if (chan != (cmd->chanlist_len - i - 1)) {
483 dev_dbg(dev->class_dev,
484 "channel scanning order specified in chanlist is not supported by hardware\n");
490 if (range != range0) {
491 dev_dbg(dev->class_dev,
492 "entries in chanlist must all have the same range\n");
497 dev_dbg(dev->class_dev,
498 "entries in chanlist must all have the same reference\n");
506 static int labpc_ai_cmdtest(struct comedi_device *dev,
507 struct comedi_subdevice *s, struct comedi_cmd *cmd)
509 const struct labpc_boardinfo *board = dev->board_ptr;
512 unsigned int stop_mask;
515 /* Step 1 : check if triggers are trivially valid */
517 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
518 err |= comedi_check_trigger_src(&cmd->scan_begin_src,
519 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
520 err |= comedi_check_trigger_src(&cmd->convert_src,
521 TRIG_TIMER | TRIG_EXT);
522 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
524 stop_mask = TRIG_COUNT | TRIG_NONE;
525 if (board->is_labpc1200)
526 stop_mask |= TRIG_EXT;
527 err |= comedi_check_trigger_src(&cmd->stop_src, stop_mask);
532 /* Step 2a : make sure trigger sources are unique */
534 err |= comedi_check_trigger_is_unique(cmd->start_src);
535 err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
536 err |= comedi_check_trigger_is_unique(cmd->convert_src);
537 err |= comedi_check_trigger_is_unique(cmd->stop_src);
539 /* Step 2b : and mutually compatible */
541 /* can't have external stop and start triggers at once */
542 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
548 /* Step 3: check if arguments are trivially valid */
550 switch (cmd->start_src) {
552 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
555 /* start_arg value is ignored */
559 if (!cmd->chanlist_len)
561 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
564 if (cmd->convert_src == TRIG_TIMER) {
565 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
569 /* make sure scan timing is not too fast */
570 if (cmd->scan_begin_src == TRIG_TIMER) {
571 if (cmd->convert_src == TRIG_TIMER) {
572 err |= comedi_check_trigger_arg_min(&cmd->
577 err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
582 switch (cmd->stop_src) {
584 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
587 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
590 * TRIG_EXT doesn't care since it doesn't
591 * trigger off a numbered channel
600 /* step 4: fix up any arguments */
602 tmp = cmd->convert_arg;
603 tmp2 = cmd->scan_begin_arg;
604 mode = labpc_ai_scan_mode(cmd);
605 labpc_adc_timing(dev, cmd, mode);
606 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
612 /* Step 5: check channel list if it exists */
613 if (cmd->chanlist && cmd->chanlist_len > 0)
614 err |= labpc_ai_check_chanlist(dev, s, cmd);
622 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
624 const struct labpc_boardinfo *board = dev->board_ptr;
625 struct labpc_private *devpriv = dev->private;
626 struct comedi_async *async = s->async;
627 struct comedi_cmd *cmd = &async->cmd;
628 enum scan_mode mode = labpc_ai_scan_mode(cmd);
629 unsigned int chanspec = (mode == MODE_MULT_CHAN_UP) ?
630 cmd->chanlist[cmd->chanlist_len - 1] :
632 unsigned int chan = CR_CHAN(chanspec);
633 unsigned int range = CR_RANGE(chanspec);
634 unsigned int aref = CR_AREF(chanspec);
635 enum transfer_type xfer;
638 /* make sure board is disabled before setting up acquisition */
639 labpc_cancel(dev, s);
641 /* initialize software conversion count */
642 if (cmd->stop_src == TRIG_COUNT)
643 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
645 /* setup hardware conversion counter */
646 if (cmd->stop_src == TRIG_EXT) {
648 * load counter a1 with count of 3
649 * (pc+ manual says this is minimum allowed) using mode 0
651 comedi_8254_load(devpriv->counter, 1,
652 3, I8254_MODE0 | I8254_BINARY);
654 /* just put counter a1 in mode 0 to set its output low */
655 comedi_8254_set_mode(devpriv->counter, 1,
656 I8254_MODE0 | I8254_BINARY);
659 /* figure out what method we will use to transfer data */
661 (cmd->flags & (CMDF_WAKE_EOS | CMDF_PRIORITY)) == 0) {
663 * dma unsafe at RT priority,
664 * and too much setup time for CMDF_WAKE_EOS
666 xfer = isa_dma_transfer;
667 } else if (board->is_labpc1200 &&
668 (cmd->flags & CMDF_WAKE_EOS) == 0 &&
669 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
671 * pc-plus has no fifo-half full interrupt
672 * wake-end-of-scan should interrupt on fifo not empty
673 * make sure we are taking more than just a few points
675 xfer = fifo_half_full_transfer;
677 xfer = fifo_not_empty_transfer;
679 devpriv->current_transfer = xfer;
681 labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
683 labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
684 (cmd->stop_src == TRIG_EXT));
686 /* manual says to set scan enable bit on second pass */
687 if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
688 devpriv->cmd1 |= CMD1_SCANEN;
690 * Need a brief delay before enabling scan, or scan
691 * list will get screwed when you switch between
692 * scan up to scan down mode - dunno why.
695 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
698 devpriv->write_byte(dev, cmd->chanlist_len, INTERVAL_COUNT_REG);
700 devpriv->write_byte(dev, 0x1, INTERVAL_STROBE_REG);
702 if (cmd->convert_src == TRIG_TIMER ||
703 cmd->scan_begin_src == TRIG_TIMER) {
704 struct comedi_8254 *pacer = dev->pacer;
705 struct comedi_8254 *counter = devpriv->counter;
707 comedi_8254_update_divisors(pacer);
710 comedi_8254_load(pacer, 0, pacer->divisor1,
711 I8254_MODE3 | I8254_BINARY);
713 /* set up conversion pacing */
714 comedi_8254_set_mode(counter, 0, I8254_MODE2 | I8254_BINARY);
715 if (labpc_ai_convert_period(cmd, mode))
716 comedi_8254_write(counter, 0, pacer->divisor);
718 /* set up scan pacing */
719 if (labpc_ai_scan_period(cmd, mode))
720 comedi_8254_load(pacer, 1, pacer->divisor2,
721 I8254_MODE2 | I8254_BINARY);
724 labpc_clear_adc_fifo(dev);
726 if (xfer == isa_dma_transfer)
727 labpc_setup_dma(dev, s);
729 /* enable error interrupts */
730 devpriv->cmd3 |= CMD3_ERRINTEN;
731 /* enable fifo not empty interrupt? */
732 if (xfer == fifo_not_empty_transfer)
733 devpriv->cmd3 |= CMD3_FIFOINTEN;
734 devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
736 /* setup any external triggering/pacing (cmd4 register) */
738 if (cmd->convert_src != TRIG_EXT)
739 devpriv->cmd4 |= CMD4_ECLKRCV;
741 * XXX should discard first scan when using interval scanning
742 * since manual says it is not synced with scan clock.
744 if (!labpc_use_continuous_mode(cmd, mode)) {
745 devpriv->cmd4 |= CMD4_INTSCAN;
746 if (cmd->scan_begin_src == TRIG_EXT)
747 devpriv->cmd4 |= CMD4_EOIRCV;
749 /* single-ended/differential */
750 if (aref == AREF_DIFF)
751 devpriv->cmd4 |= CMD4_SEDIFF;
752 devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
754 /* startup acquisition */
756 spin_lock_irqsave(&dev->spinlock, flags);
758 /* use 2 cascaded counters for pacing */
759 devpriv->cmd2 |= CMD2_TBSEL;
761 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
762 if (cmd->start_src == TRIG_EXT)
763 devpriv->cmd2 |= CMD2_HWTRIG;
765 devpriv->cmd2 |= CMD2_SWTRIG;
766 if (cmd->stop_src == TRIG_EXT)
767 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
769 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
771 spin_unlock_irqrestore(&dev->spinlock, flags);
776 /* read all available samples from ai fifo */
777 static int labpc_drain_fifo(struct comedi_device *dev)
779 struct labpc_private *devpriv = dev->private;
780 struct comedi_async *async = dev->read_subdev->async;
781 struct comedi_cmd *cmd = &async->cmd;
783 const int timeout = 10000;
786 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
788 for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
790 /* quit if we have all the data we want */
791 if (cmd->stop_src == TRIG_COUNT) {
792 if (devpriv->count == 0)
796 data = labpc_read_adc_fifo(dev);
797 comedi_buf_write_samples(dev->read_subdev, &data, 1);
798 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
801 dev_err(dev->class_dev, "ai timeout, fifo never empties\n");
802 async->events |= COMEDI_CB_ERROR;
810 * Makes sure all data acquired by board is transferred to comedi (used
811 * when acquisition is terminated by stop_src == TRIG_EXT).
813 static void labpc_drain_dregs(struct comedi_device *dev)
815 struct labpc_private *devpriv = dev->private;
817 if (devpriv->current_transfer == isa_dma_transfer)
818 labpc_drain_dma(dev);
820 labpc_drain_fifo(dev);
823 /* interrupt service routine */
824 static irqreturn_t labpc_interrupt(int irq, void *d)
826 struct comedi_device *dev = d;
827 const struct labpc_boardinfo *board = dev->board_ptr;
828 struct labpc_private *devpriv = dev->private;
829 struct comedi_subdevice *s = dev->read_subdev;
830 struct comedi_async *async;
831 struct comedi_cmd *cmd;
833 if (!dev->attached) {
834 dev_err(dev->class_dev, "premature interrupt\n");
841 /* read board status */
842 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
843 if (board->is_labpc1200)
844 devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG);
846 if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
847 STAT1_OVERRUN | STAT1_DAVAIL)) == 0 &&
848 (devpriv->stat2 & STAT2_OUTA1) == 0 &&
849 (devpriv->stat2 & STAT2_FIFONHF)) {
853 if (devpriv->stat1 & STAT1_OVERRUN) {
854 /* clear error interrupt */
855 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
856 async->events |= COMEDI_CB_ERROR;
857 comedi_handle_events(dev, s);
858 dev_err(dev->class_dev, "overrun\n");
862 if (devpriv->current_transfer == isa_dma_transfer)
863 labpc_handle_dma_status(dev);
865 labpc_drain_fifo(dev);
867 if (devpriv->stat1 & STAT1_CNTINT) {
868 dev_err(dev->class_dev, "handled timer interrupt?\n");
870 devpriv->write_byte(dev, 0x1, TIMER_CLEAR_REG);
873 if (devpriv->stat1 & STAT1_OVERFLOW) {
874 /* clear error interrupt */
875 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
876 async->events |= COMEDI_CB_ERROR;
877 comedi_handle_events(dev, s);
878 dev_err(dev->class_dev, "overflow\n");
881 /* handle external stop trigger */
882 if (cmd->stop_src == TRIG_EXT) {
883 if (devpriv->stat2 & STAT2_OUTA1) {
884 labpc_drain_dregs(dev);
885 async->events |= COMEDI_CB_EOA;
889 /* TRIG_COUNT end of acquisition */
890 if (cmd->stop_src == TRIG_COUNT) {
891 if (devpriv->count == 0)
892 async->events |= COMEDI_CB_EOA;
895 comedi_handle_events(dev, s);
899 static void labpc_ao_write(struct comedi_device *dev,
900 struct comedi_subdevice *s,
901 unsigned int chan, unsigned int val)
903 struct labpc_private *devpriv = dev->private;
905 devpriv->write_byte(dev, val & 0xff, DAC_LSB_REG(chan));
906 devpriv->write_byte(dev, (val >> 8) & 0xff, DAC_MSB_REG(chan));
908 s->readback[chan] = val;
911 static int labpc_ao_insn_write(struct comedi_device *dev,
912 struct comedi_subdevice *s,
913 struct comedi_insn *insn,
916 const struct labpc_boardinfo *board = dev->board_ptr;
917 struct labpc_private *devpriv = dev->private;
921 channel = CR_CHAN(insn->chanspec);
924 * Turn off pacing of analog output channel.
925 * NOTE: hardware bug in daqcard-1200 means pacing cannot
926 * be independently enabled/disabled for its the two channels.
928 spin_lock_irqsave(&dev->spinlock, flags);
929 devpriv->cmd2 &= ~CMD2_LDAC(channel);
930 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
931 spin_unlock_irqrestore(&dev->spinlock, flags);
934 if (board->is_labpc1200) {
935 range = CR_RANGE(insn->chanspec);
936 if (comedi_range_is_unipolar(s, range))
937 devpriv->cmd6 |= CMD6_DACUNI(channel);
939 devpriv->cmd6 &= ~CMD6_DACUNI(channel);
940 /* write to register */
941 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
944 labpc_ao_write(dev, s, channel, data[0]);
949 /* lowlevel write to eeprom/dac */
950 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
951 unsigned int value_width)
953 struct labpc_private *devpriv = dev->private;
956 for (i = 1; i <= value_width; i++) {
957 /* clear serial clock */
958 devpriv->cmd5 &= ~CMD5_SCLK;
959 /* send bits most significant bit first */
960 if (value & (1 << (value_width - i)))
961 devpriv->cmd5 |= CMD5_SDATA;
963 devpriv->cmd5 &= ~CMD5_SDATA;
965 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
966 /* set clock to load bit */
967 devpriv->cmd5 |= CMD5_SCLK;
969 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
973 /* lowlevel read from eeprom */
974 static unsigned int labpc_serial_in(struct comedi_device *dev)
976 struct labpc_private *devpriv = dev->private;
977 unsigned int value = 0;
979 const int value_width = 8; /* number of bits wide values are */
981 for (i = 1; i <= value_width; i++) {
982 /* set serial clock */
983 devpriv->cmd5 |= CMD5_SCLK;
985 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
986 /* clear clock bit */
987 devpriv->cmd5 &= ~CMD5_SCLK;
989 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
990 /* read bits most significant bit first */
992 devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG);
993 if (devpriv->stat2 & STAT2_PROMOUT)
994 value |= 1 << (value_width - i);
1000 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1001 unsigned int address)
1003 struct labpc_private *devpriv = dev->private;
1005 /* bits to tell eeprom to expect a read */
1006 const int read_instruction = 0x3;
1007 /* 8 bit write lengths to eeprom */
1008 const int write_length = 8;
1010 /* enable read/write to eeprom */
1011 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1013 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1014 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1016 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1018 /* send read instruction */
1019 labpc_serial_out(dev, read_instruction, write_length);
1020 /* send 8 bit address to read from */
1021 labpc_serial_out(dev, address, write_length);
1023 value = labpc_serial_in(dev);
1025 /* disable read/write to eeprom */
1026 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1028 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1033 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1035 struct labpc_private *devpriv = dev->private;
1037 const int read_status_instruction = 0x5;
1038 const int write_length = 8; /* 8 bit write lengths to eeprom */
1040 /* enable read/write to eeprom */
1041 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1043 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1044 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1046 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1048 /* send read status instruction */
1049 labpc_serial_out(dev, read_status_instruction, write_length);
1051 value = labpc_serial_in(dev);
1053 /* disable read/write to eeprom */
1054 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1056 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1061 static void labpc_eeprom_write(struct comedi_device *dev,
1062 unsigned int address, unsigned int value)
1064 struct labpc_private *devpriv = dev->private;
1065 const int write_enable_instruction = 0x6;
1066 const int write_instruction = 0x2;
1067 const int write_length = 8; /* 8 bit write lengths to eeprom */
1069 /* enable read/write to eeprom */
1070 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1072 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1073 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1075 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1077 /* send write_enable instruction */
1078 labpc_serial_out(dev, write_enable_instruction, write_length);
1079 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1081 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1083 /* send write instruction */
1084 devpriv->cmd5 |= CMD5_EEPROMCS;
1086 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1087 labpc_serial_out(dev, write_instruction, write_length);
1088 /* send 8 bit address to write to */
1089 labpc_serial_out(dev, address, write_length);
1091 labpc_serial_out(dev, value, write_length);
1092 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1094 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1096 /* disable read/write to eeprom */
1097 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1099 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1102 /* writes to 8 bit calibration dacs */
1103 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1106 struct labpc_private *devpriv = dev->private;
1108 /* clear caldac load bit and make sure we don't write to eeprom */
1109 devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1111 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1113 /* write 4 bit channel */
1114 labpc_serial_out(dev, channel, 4);
1115 /* write 8 bit caldac value */
1116 labpc_serial_out(dev, value, 8);
1118 /* set and clear caldac bit to load caldac value */
1119 devpriv->cmd5 |= CMD5_CALDACLD;
1121 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1122 devpriv->cmd5 &= ~CMD5_CALDACLD;
1124 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1127 static int labpc_calib_insn_write(struct comedi_device *dev,
1128 struct comedi_subdevice *s,
1129 struct comedi_insn *insn,
1132 unsigned int chan = CR_CHAN(insn->chanspec);
1135 * Only write the last data value to the caldac. Preceding
1136 * data would be overwritten anyway.
1139 unsigned int val = data[insn->n - 1];
1141 if (s->readback[chan] != val) {
1142 write_caldac(dev, chan, val);
1143 s->readback[chan] = val;
1150 static int labpc_eeprom_ready(struct comedi_device *dev,
1151 struct comedi_subdevice *s,
1152 struct comedi_insn *insn,
1153 unsigned long context)
1155 unsigned int status;
1157 /* make sure there isn't already a write in progress */
1158 status = labpc_eeprom_read_status(dev);
1159 if ((status & 0x1) == 0)
1164 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1165 struct comedi_subdevice *s,
1166 struct comedi_insn *insn,
1169 unsigned int chan = CR_CHAN(insn->chanspec);
1172 /* only allow writes to user area of eeprom */
1173 if (chan < 16 || chan > 127)
1177 * Only write the last data value to the eeprom. Preceding
1178 * data would be overwritten anyway.
1181 unsigned int val = data[insn->n - 1];
1183 ret = comedi_timeout(dev, s, insn, labpc_eeprom_ready, 0);
1187 labpc_eeprom_write(dev, chan, val);
1188 s->readback[chan] = val;
1194 int labpc_common_attach(struct comedi_device *dev,
1195 unsigned int irq, unsigned long isr_flags)
1197 const struct labpc_boardinfo *board = dev->board_ptr;
1198 struct labpc_private *devpriv;
1199 struct comedi_subdevice *s;
1203 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1208 devpriv->read_byte = labpc_readb;
1209 devpriv->write_byte = labpc_writeb;
1211 devpriv->read_byte = labpc_inb;
1212 devpriv->write_byte = labpc_outb;
1215 /* initialize board's command registers */
1216 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
1217 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
1218 devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
1219 devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
1220 if (board->is_labpc1200) {
1221 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1222 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
1226 ret = request_irq(irq, labpc_interrupt, isr_flags,
1227 dev->board_name, dev);
1233 dev->pacer = comedi_8254_mm_init(dev->mmio + COUNTER_B_BASE_REG,
1234 I8254_OSC_BASE_2MHZ,
1236 devpriv->counter = comedi_8254_mm_init(dev->mmio +
1238 I8254_OSC_BASE_2MHZ,
1241 dev->pacer = comedi_8254_init(dev->iobase + COUNTER_B_BASE_REG,
1242 I8254_OSC_BASE_2MHZ,
1244 devpriv->counter = comedi_8254_init(dev->iobase +
1246 I8254_OSC_BASE_2MHZ,
1249 if (!dev->pacer || !devpriv->counter)
1252 ret = comedi_alloc_subdevices(dev, 5);
1256 /* analog input subdevice */
1257 s = &dev->subdevices[0];
1258 s->type = COMEDI_SUBD_AI;
1259 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1261 s->len_chanlist = 8;
1262 s->maxdata = 0x0fff;
1263 s->range_table = board->is_labpc1200 ?
1264 &range_labpc_1200_ai : &range_labpc_plus_ai;
1265 s->insn_read = labpc_ai_insn_read;
1267 dev->read_subdev = s;
1268 s->subdev_flags |= SDF_CMD_READ;
1269 s->do_cmd = labpc_ai_cmd;
1270 s->do_cmdtest = labpc_ai_cmdtest;
1271 s->cancel = labpc_cancel;
1275 s = &dev->subdevices[1];
1276 if (board->has_ao) {
1277 s->type = COMEDI_SUBD_AO;
1278 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1280 s->maxdata = 0x0fff;
1281 s->range_table = &range_labpc_ao;
1282 s->insn_write = labpc_ao_insn_write;
1284 ret = comedi_alloc_subdev_readback(s);
1288 /* initialize analog outputs to a known value */
1289 for (i = 0; i < s->n_chan; i++)
1290 labpc_ao_write(dev, s, i, s->maxdata / 2);
1292 s->type = COMEDI_SUBD_UNUSED;
1296 s = &dev->subdevices[2];
1298 ret = subdev_8255_mm_init(dev, s, NULL, DIO_BASE_REG);
1300 ret = subdev_8255_init(dev, s, NULL, DIO_BASE_REG);
1304 /* calibration subdevices for boards that have one */
1305 s = &dev->subdevices[3];
1306 if (board->is_labpc1200) {
1307 s->type = COMEDI_SUBD_CALIB;
1308 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1311 s->insn_write = labpc_calib_insn_write;
1313 ret = comedi_alloc_subdev_readback(s);
1317 for (i = 0; i < s->n_chan; i++) {
1318 write_caldac(dev, i, s->maxdata / 2);
1319 s->readback[i] = s->maxdata / 2;
1322 s->type = COMEDI_SUBD_UNUSED;
1325 /* EEPROM (256 bytes) */
1326 s = &dev->subdevices[4];
1327 if (board->is_labpc1200) {
1328 s->type = COMEDI_SUBD_MEMORY;
1329 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1332 s->insn_write = labpc_eeprom_insn_write;
1334 ret = comedi_alloc_subdev_readback(s);
1338 for (i = 0; i < s->n_chan; i++)
1339 s->readback[i] = labpc_eeprom_read(dev, i);
1341 s->type = COMEDI_SUBD_UNUSED;
1346 EXPORT_SYMBOL_GPL(labpc_common_attach);
1348 void labpc_common_detach(struct comedi_device *dev)
1350 struct labpc_private *devpriv = dev->private;
1353 kfree(devpriv->counter);
1355 EXPORT_SYMBOL_GPL(labpc_common_detach);
1357 static int __init labpc_common_init(void)
1361 module_init(labpc_common_init);
1363 static void __exit labpc_common_exit(void)
1366 module_exit(labpc_common_exit);
1368 MODULE_AUTHOR("Comedi http://www.comedi.org");
1369 MODULE_DESCRIPTION("Comedi helper for ni_labpc, ni_labpc_pci, ni_labpc_cs");
1370 MODULE_LICENSE("GPL");