2 comedi/drivers/jr3_pci.c
3 hardware driver for JR3/PCI force sensor board
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2007 Anders Blomdell <anders.blomdell@control.lth.se>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
20 * Description: JR3/PCI force sensor board
21 * Author: Anders Blomdell <anders.blomdell@control.lth.se>
22 * Updated: Thu, 01 Nov 2012 17:34:55 +0000
24 * Devices: [JR3] PCI force sensor board (jr3_pci)
26 * Configuration options:
29 * Manual configuration of comedi devices is not supported by this
30 * driver; supported PCI devices are configured as comedi devices
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/delay.h>
38 #include <linux/ctype.h>
39 #include <linux/jiffies.h>
40 #include <linux/slab.h>
41 #include <linux/timer.h>
43 #include "../comedi_pci.h"
47 #define PCI_VENDOR_ID_JR3 0x1762
49 enum jr3_pci_boardid {
56 struct jr3_pci_board {
61 static const struct jr3_pci_board jr3_pci_boards[] = {
80 struct jr3_pci_transform {
87 struct jr3_pci_poll_delay {
92 struct jr3_pci_dev_private {
93 struct jr3_t __iomem *iobase;
94 struct timer_list timer;
97 struct jr3_pci_subdev_private {
98 struct jr3_channel __iomem *channel;
99 unsigned long next_time_min;
100 unsigned long next_time_max;
101 enum { state_jr3_poll,
102 state_jr3_init_wait_for_offset,
103 state_jr3_init_transform_complete,
104 state_jr3_init_set_full_scale_complete,
105 state_jr3_init_use_offset_complete,
112 struct comedi_krange range;
114 const struct comedi_lrange *range_table_list[8 * 7 + 2];
115 unsigned int maxdata_list[8 * 7 + 2];
120 static struct jr3_pci_poll_delay poll_delay_min_max(int min, int max)
122 struct jr3_pci_poll_delay result;
129 static int is_complete(struct jr3_channel __iomem *channel)
131 return get_s16(&channel->command_word0) == 0;
134 static void set_transforms(struct jr3_channel __iomem *channel,
135 struct jr3_pci_transform transf, short num)
139 num &= 0x000f; /* Make sure that 0 <= num <= 15 */
140 for (i = 0; i < 8; i++) {
141 set_u16(&channel->transforms[num].link[i].link_type,
142 transf.link[i].link_type);
144 set_s16(&channel->transforms[num].link[i].link_amount,
145 transf.link[i].link_amount);
147 if (transf.link[i].link_type == end_x_form)
152 static void use_transform(struct jr3_channel __iomem *channel,
155 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
158 static void use_offset(struct jr3_channel __iomem *channel, short offset_num)
160 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
163 static void set_offset(struct jr3_channel __iomem *channel)
165 set_s16(&channel->command_word0, 0x0700);
177 static void set_full_scales(struct jr3_channel __iomem *channel,
178 struct six_axis_t full_scale)
180 set_s16(&channel->full_scale.fx, full_scale.fx);
181 set_s16(&channel->full_scale.fy, full_scale.fy);
182 set_s16(&channel->full_scale.fz, full_scale.fz);
183 set_s16(&channel->full_scale.mx, full_scale.mx);
184 set_s16(&channel->full_scale.my, full_scale.my);
185 set_s16(&channel->full_scale.mz, full_scale.mz);
186 set_s16(&channel->command_word0, 0x0a00);
189 static struct six_axis_t get_min_full_scales(struct jr3_channel __iomem
192 struct six_axis_t result;
194 result.fx = get_s16(&channel->min_full_scale.fx);
195 result.fy = get_s16(&channel->min_full_scale.fy);
196 result.fz = get_s16(&channel->min_full_scale.fz);
197 result.mx = get_s16(&channel->min_full_scale.mx);
198 result.my = get_s16(&channel->min_full_scale.my);
199 result.mz = get_s16(&channel->min_full_scale.mz);
203 static struct six_axis_t get_max_full_scales(struct jr3_channel __iomem
206 struct six_axis_t result;
208 result.fx = get_s16(&channel->max_full_scale.fx);
209 result.fy = get_s16(&channel->max_full_scale.fy);
210 result.fz = get_s16(&channel->max_full_scale.fz);
211 result.mx = get_s16(&channel->max_full_scale.mx);
212 result.my = get_s16(&channel->max_full_scale.my);
213 result.mz = get_s16(&channel->max_full_scale.mz);
217 static unsigned int jr3_pci_ai_read_chan(struct comedi_device *dev,
218 struct comedi_subdevice *s,
221 struct jr3_pci_subdev_private *spriv = s->private;
222 unsigned int val = 0;
224 if (spriv->state != state_jr3_done)
228 unsigned int axis = chan % 8;
229 unsigned filter = chan / 8;
233 val = get_s16(&spriv->channel->filter[filter].fx);
236 val = get_s16(&spriv->channel->filter[filter].fy);
239 val = get_s16(&spriv->channel->filter[filter].fz);
242 val = get_s16(&spriv->channel->filter[filter].mx);
245 val = get_s16(&spriv->channel->filter[filter].my);
248 val = get_s16(&spriv->channel->filter[filter].mz);
251 val = get_s16(&spriv->channel->filter[filter].v1);
254 val = get_s16(&spriv->channel->filter[filter].v2);
258 } else if (chan == 56) {
259 val = get_u16(&spriv->channel->model_no);
260 } else if (chan == 57) {
261 val = get_u16(&spriv->channel->serial_no);
267 static int jr3_pci_ai_insn_read(struct comedi_device *dev,
268 struct comedi_subdevice *s,
269 struct comedi_insn *insn,
272 struct jr3_pci_subdev_private *spriv = s->private;
273 unsigned int chan = CR_CHAN(insn->chanspec);
280 errors = get_u16(&spriv->channel->errors);
281 if (spriv->state != state_jr3_done ||
282 (errors & (watch_dog | watch_dog2 | sensor_change))) {
283 /* No sensor or sensor changed */
284 if (spriv->state == state_jr3_done) {
285 /* Restart polling */
286 spriv->state = state_jr3_poll;
291 for (i = 0; i < insn->n; i++)
292 data[i] = jr3_pci_ai_read_chan(dev, s, chan);
297 static int jr3_pci_open(struct comedi_device *dev)
299 struct jr3_pci_subdev_private *spriv;
300 struct comedi_subdevice *s;
303 dev_dbg(dev->class_dev, "jr3_pci_open\n");
304 for (i = 0; i < dev->n_subdevices; i++) {
305 s = &dev->subdevices[i];
308 dev_dbg(dev->class_dev, "serial: %p %d (%d)\n",
309 spriv, spriv->serial_no, s->index);
314 static int read_idm_word(const u8 *data, size_t size, int *pos,
321 /* Skip over non hex */
322 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++)
326 for (; *pos < size; (*pos)++) {
327 value = hex_to_bin(data[*pos]);
330 *val = (*val << 4) + value;
339 static int jr3_check_firmware(struct comedi_device *dev,
340 const u8 *data, size_t size)
346 * IDM file format is:
347 * { count, address, data <count> } *
351 unsigned int count = 0;
352 unsigned int addr = 0;
354 more = more && read_idm_word(data, size, &pos, &count);
355 if (more && count == 0xffff)
358 more = more && read_idm_word(data, size, &pos, &addr);
359 while (more && count > 0) {
360 unsigned int dummy = 0;
362 more = more && read_idm_word(data, size, &pos, &dummy);
370 static void jr3_write_firmware(struct comedi_device *dev,
371 int subdev, const u8 *data, size_t size)
373 struct jr3_pci_dev_private *devpriv = dev->private;
374 struct jr3_t __iomem *iobase = devpriv->iobase;
381 unsigned int count = 0;
382 unsigned int addr = 0;
384 more = more && read_idm_word(data, size, &pos, &count);
385 if (more && count == 0xffff)
388 more = more && read_idm_word(data, size, &pos, &addr);
390 dev_dbg(dev->class_dev, "Loading#%d %4.4x bytes at %4.4x\n",
391 subdev, count, addr);
393 while (more && count > 0) {
395 /* 16 bit data, never seen in real life!! */
396 unsigned int data1 = 0;
399 read_idm_word(data, size, &pos, &data1);
401 /* jr3[addr + 0x20000 * pnum] = data1; */
403 /* Download 24 bit program */
404 unsigned int data1 = 0;
405 unsigned int data2 = 0;
407 lo = &iobase->channel[subdev].program_lo[addr];
408 hi = &iobase->channel[subdev].program_hi[addr];
411 read_idm_word(data, size, &pos, &data1);
413 read_idm_word(data, size, &pos, &data2);
427 static int jr3_download_firmware(struct comedi_device *dev,
428 const u8 *data, size_t size,
429 unsigned long context)
434 /* verify IDM file format */
435 ret = jr3_check_firmware(dev, data, size);
439 /* write firmware to each subdevice */
440 for (subdev = 0; subdev < dev->n_subdevices; subdev++)
441 jr3_write_firmware(dev, subdev, data, size);
446 static struct jr3_pci_poll_delay jr3_pci_poll_subdevice(struct comedi_subdevice *s)
448 struct jr3_pci_subdev_private *spriv = s->private;
449 struct jr3_pci_poll_delay result = poll_delay_min_max(1000, 2000);
450 struct jr3_channel __iomem *channel;
459 channel = spriv->channel;
460 errors = get_u16(&channel->errors);
462 if (errors != spriv->errors)
463 spriv->errors = errors;
465 /* Sensor communication lost? force poll mode */
466 if (errors & (watch_dog | watch_dog2 | sensor_change))
467 spriv->state = state_jr3_poll;
469 switch (spriv->state) {
471 model_no = get_u16(&channel->model_no);
472 serial_no = get_u16(&channel->serial_no);
474 if ((errors & (watch_dog | watch_dog2)) ||
475 model_no == 0 || serial_no == 0) {
477 * Still no sensor, keep on polling.
478 * Since it takes up to 10 seconds for offsets to
479 * stabilize, polling each second should suffice.
483 spriv->state = state_jr3_init_wait_for_offset;
486 case state_jr3_init_wait_for_offset:
488 if (spriv->retries < 10) {
490 * Wait for offeset to stabilize
491 * (< 10 s according to manual)
494 struct jr3_pci_transform transf;
496 spriv->model_no = get_u16(&channel->model_no);
497 spriv->serial_no = get_u16(&channel->serial_no);
499 /* Transformation all zeros */
500 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
501 transf.link[i].link_type = (enum link_types)0;
502 transf.link[i].link_amount = 0;
505 set_transforms(channel, transf, 0);
506 use_transform(channel, 0);
507 spriv->state = state_jr3_init_transform_complete;
508 /* Allow 20 ms for completion */
509 result = poll_delay_min_max(20, 100);
512 case state_jr3_init_transform_complete:
513 if (!is_complete(channel)) {
514 result = poll_delay_min_max(20, 100);
517 struct six_axis_t min_full_scale;
518 struct six_axis_t max_full_scale;
520 min_full_scale = get_min_full_scales(channel);
521 max_full_scale = get_max_full_scales(channel);
522 set_full_scales(channel, max_full_scale);
524 spriv->state = state_jr3_init_set_full_scale_complete;
525 /* Allow 20 ms for completion */
526 result = poll_delay_min_max(20, 100);
529 case state_jr3_init_set_full_scale_complete:
530 if (!is_complete(channel)) {
531 result = poll_delay_min_max(20, 100);
533 struct force_array __iomem *fs = &channel->full_scale;
535 /* Use ranges in kN or we will overflow around 2000N! */
536 spriv->range[0].range.min = -get_s16(&fs->fx) * 1000;
537 spriv->range[0].range.max = get_s16(&fs->fx) * 1000;
538 spriv->range[1].range.min = -get_s16(&fs->fy) * 1000;
539 spriv->range[1].range.max = get_s16(&fs->fy) * 1000;
540 spriv->range[2].range.min = -get_s16(&fs->fz) * 1000;
541 spriv->range[2].range.max = get_s16(&fs->fz) * 1000;
542 spriv->range[3].range.min = -get_s16(&fs->mx) * 100;
543 spriv->range[3].range.max = get_s16(&fs->mx) * 100;
544 spriv->range[4].range.min = -get_s16(&fs->my) * 100;
545 spriv->range[4].range.max = get_s16(&fs->my) * 100;
546 spriv->range[5].range.min = -get_s16(&fs->mz) * 100;
547 /* the next five are questionable */
548 spriv->range[5].range.max = get_s16(&fs->mz) * 100;
549 spriv->range[6].range.min = -get_s16(&fs->v1) * 100;
550 spriv->range[6].range.max = get_s16(&fs->v1) * 100;
551 spriv->range[7].range.min = -get_s16(&fs->v2) * 100;
552 spriv->range[7].range.max = get_s16(&fs->v2) * 100;
553 spriv->range[8].range.min = 0;
554 spriv->range[8].range.max = 65535;
556 use_offset(channel, 0);
557 spriv->state = state_jr3_init_use_offset_complete;
558 /* Allow 40 ms for completion */
559 result = poll_delay_min_max(40, 100);
562 case state_jr3_init_use_offset_complete:
563 if (!is_complete(channel)) {
564 result = poll_delay_min_max(20, 100);
566 set_s16(&channel->offsets.fx, 0);
567 set_s16(&channel->offsets.fy, 0);
568 set_s16(&channel->offsets.fz, 0);
569 set_s16(&channel->offsets.mx, 0);
570 set_s16(&channel->offsets.my, 0);
571 set_s16(&channel->offsets.mz, 0);
575 spriv->state = state_jr3_done;
579 result = poll_delay_min_max(10000, 20000);
588 static void jr3_pci_poll_dev(unsigned long data)
590 struct comedi_device *dev = (struct comedi_device *)data;
591 struct jr3_pci_dev_private *devpriv = dev->private;
592 struct jr3_pci_subdev_private *spriv;
593 struct comedi_subdevice *s;
599 spin_lock_irqsave(&dev->spinlock, flags);
603 /* Poll all channels that are ready to be polled */
604 for (i = 0; i < dev->n_subdevices; i++) {
605 s = &dev->subdevices[i];
608 if (time_after_eq(now, spriv->next_time_min)) {
609 struct jr3_pci_poll_delay sub_delay;
611 sub_delay = jr3_pci_poll_subdevice(s);
613 spriv->next_time_min = jiffies +
614 msecs_to_jiffies(sub_delay.min);
615 spriv->next_time_max = jiffies +
616 msecs_to_jiffies(sub_delay.max);
618 if (sub_delay.max && sub_delay.max < delay)
620 * Wake up as late as possible ->
621 * poll as many channels as possible at once.
623 delay = sub_delay.max;
626 spin_unlock_irqrestore(&dev->spinlock, flags);
628 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
629 add_timer(&devpriv->timer);
632 static struct jr3_pci_subdev_private *
633 jr3_pci_alloc_spriv(struct comedi_device *dev, struct comedi_subdevice *s)
635 struct jr3_pci_dev_private *devpriv = dev->private;
636 struct jr3_pci_subdev_private *spriv;
640 spriv = comedi_alloc_spriv(s, sizeof(*spriv));
644 spriv->channel = &devpriv->iobase->channel[s->index].data;
646 for (j = 0; j < 8; j++) {
647 spriv->range[j].length = 1;
648 spriv->range[j].range.min = -1000000;
649 spriv->range[j].range.max = 1000000;
651 for (k = 0; k < 7; k++) {
652 spriv->range_table_list[j + k * 8] =
653 (struct comedi_lrange *)&spriv->range[j];
654 spriv->maxdata_list[j + k * 8] = 0x7fff;
657 spriv->range[8].length = 1;
658 spriv->range[8].range.min = 0;
659 spriv->range[8].range.max = 65536;
661 spriv->range_table_list[56] = (struct comedi_lrange *)&spriv->range[8];
662 spriv->range_table_list[57] = (struct comedi_lrange *)&spriv->range[8];
663 spriv->maxdata_list[56] = 0xffff;
664 spriv->maxdata_list[57] = 0xffff;
666 dev_dbg(dev->class_dev, "p->channel %p %p (%tx)\n",
667 spriv->channel, devpriv->iobase,
668 ((char __iomem *)spriv->channel -
669 (char __iomem *)devpriv->iobase));
674 static int jr3_pci_auto_attach(struct comedi_device *dev,
675 unsigned long context)
677 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
678 static const struct jr3_pci_board *board;
679 struct jr3_pci_dev_private *devpriv;
680 struct jr3_pci_subdev_private *spriv;
681 struct comedi_subdevice *s;
685 if (sizeof(struct jr3_channel) != 0xc00) {
686 dev_err(dev->class_dev,
687 "sizeof(struct jr3_channel) = %x [expected %x]\n",
688 (unsigned)sizeof(struct jr3_channel), 0xc00);
692 if (context < ARRAY_SIZE(jr3_pci_boards))
693 board = &jr3_pci_boards[context];
696 dev->board_ptr = board;
697 dev->board_name = board->name;
699 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
703 ret = comedi_pci_enable(dev);
707 devpriv->iobase = pci_ioremap_bar(pcidev, 0);
708 if (!devpriv->iobase)
711 ret = comedi_alloc_subdevices(dev, board->n_subdevs);
715 dev->open = jr3_pci_open;
716 for (i = 0; i < dev->n_subdevices; i++) {
717 s = &dev->subdevices[i];
718 s->type = COMEDI_SUBD_AI;
719 s->subdev_flags = SDF_READABLE | SDF_GROUND;
720 s->n_chan = 8 * 7 + 2;
721 s->insn_read = jr3_pci_ai_insn_read;
723 spriv = jr3_pci_alloc_spriv(dev, s);
727 /* Channel specific range and maxdata */
728 s->range_table_list = spriv->range_table_list;
729 s->maxdata_list = spriv->maxdata_list;
733 writel(0, &devpriv->iobase->channel[0].reset);
735 ret = comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
737 jr3_download_firmware, 0);
738 dev_dbg(dev->class_dev, "Firmare load %d\n", ret);
742 * TODO: use firmware to load preferred offset tables. Suggested
744 * model serial Fx Fy Fz Mx My Mz\n
746 * comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
747 * "comedi/jr3_offsets_table",
748 * jr3_download_firmware, 1);
752 * It takes a few milliseconds for software to settle as much as we
753 * can read firmware version
755 msleep_interruptible(25);
756 for (i = 0; i < 0x18; i++) {
757 dev_dbg(dev->class_dev, "%c\n",
758 get_u16(&devpriv->iobase->channel[0].
759 data.copyright[i]) >> 8);
762 /* Start card timer */
763 for (i = 0; i < dev->n_subdevices; i++) {
764 s = &dev->subdevices[i];
767 spriv->next_time_min = jiffies + msecs_to_jiffies(500);
768 spriv->next_time_max = jiffies + msecs_to_jiffies(2000);
771 setup_timer(&devpriv->timer, jr3_pci_poll_dev, (unsigned long)dev);
772 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
773 add_timer(&devpriv->timer);
778 static void jr3_pci_detach(struct comedi_device *dev)
780 struct jr3_pci_dev_private *devpriv = dev->private;
783 del_timer_sync(&devpriv->timer);
786 iounmap(devpriv->iobase);
788 comedi_pci_disable(dev);
791 static struct comedi_driver jr3_pci_driver = {
792 .driver_name = "jr3_pci",
793 .module = THIS_MODULE,
794 .auto_attach = jr3_pci_auto_attach,
795 .detach = jr3_pci_detach,
798 static int jr3_pci_pci_probe(struct pci_dev *dev,
799 const struct pci_device_id *id)
801 return comedi_pci_auto_config(dev, &jr3_pci_driver, id->driver_data);
804 static const struct pci_device_id jr3_pci_pci_table[] = {
805 { PCI_VDEVICE(JR3, 0x1111), BOARD_JR3_1 },
806 { PCI_VDEVICE(JR3, 0x3111), BOARD_JR3_1 },
807 { PCI_VDEVICE(JR3, 0x3112), BOARD_JR3_2 },
808 { PCI_VDEVICE(JR3, 0x3113), BOARD_JR3_3 },
809 { PCI_VDEVICE(JR3, 0x3114), BOARD_JR3_4 },
812 MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
814 static struct pci_driver jr3_pci_pci_driver = {
816 .id_table = jr3_pci_pci_table,
817 .probe = jr3_pci_pci_probe,
818 .remove = comedi_pci_auto_unconfig,
820 module_comedi_pci_driver(jr3_pci_driver, jr3_pci_pci_driver);
822 MODULE_AUTHOR("Comedi http://www.comedi.org");
823 MODULE_DESCRIPTION("Comedi low-level driver");
824 MODULE_LICENSE("GPL");