1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: James Liao <jamesjj.liao@mediatek.com>
7 #include <linux/delay.h>
8 #include <linux/device.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12 #include <linux/reset-controller.h>
13 #include <linux/soc/mediatek/mtk-mmsys.h>
15 #include "mtk-mmsys.h"
16 #include "mt8167-mmsys.h"
17 #include "mt8183-mmsys.h"
18 #include "mt8186-mmsys.h"
19 #include "mt8192-mmsys.h"
20 #include "mt8195-mmsys.h"
21 #include "mt8365-mmsys.h"
23 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
24 .clk_driver = "clk-mt2701-mm",
25 .routes = mmsys_default_routing_table,
26 .num_routes = ARRAY_SIZE(mmsys_default_routing_table),
29 static const struct mtk_mmsys_match_data mt2701_mmsys_match_data = {
32 &mt2701_mmsys_driver_data,
36 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
37 .clk_driver = "clk-mt2712-mm",
38 .routes = mmsys_default_routing_table,
39 .num_routes = ARRAY_SIZE(mmsys_default_routing_table),
42 static const struct mtk_mmsys_match_data mt2712_mmsys_match_data = {
45 &mt2712_mmsys_driver_data,
49 static const struct mtk_mmsys_driver_data mt6779_mmsys_driver_data = {
50 .clk_driver = "clk-mt6779-mm",
53 static const struct mtk_mmsys_match_data mt6779_mmsys_match_data = {
56 &mt6779_mmsys_driver_data,
60 static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = {
61 .clk_driver = "clk-mt6797-mm",
64 static const struct mtk_mmsys_match_data mt6797_mmsys_match_data = {
67 &mt6797_mmsys_driver_data,
71 static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
72 .clk_driver = "clk-mt8167-mm",
73 .routes = mt8167_mmsys_routing_table,
74 .num_routes = ARRAY_SIZE(mt8167_mmsys_routing_table),
77 static const struct mtk_mmsys_match_data mt8167_mmsys_match_data = {
80 &mt8167_mmsys_driver_data,
84 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
85 .clk_driver = "clk-mt8173-mm",
86 .routes = mmsys_default_routing_table,
87 .num_routes = ARRAY_SIZE(mmsys_default_routing_table),
88 .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
91 static const struct mtk_mmsys_match_data mt8173_mmsys_match_data = {
94 &mt8173_mmsys_driver_data,
98 static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
99 .clk_driver = "clk-mt8183-mm",
100 .routes = mmsys_mt8183_routing_table,
101 .num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
102 .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
105 static const struct mtk_mmsys_match_data mt8183_mmsys_match_data = {
108 &mt8183_mmsys_driver_data,
112 static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
113 .clk_driver = "clk-mt8186-mm",
114 .routes = mmsys_mt8186_routing_table,
115 .num_routes = ARRAY_SIZE(mmsys_mt8186_routing_table),
116 .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
119 static const struct mtk_mmsys_match_data mt8186_mmsys_match_data = {
122 &mt8186_mmsys_driver_data,
126 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
127 .clk_driver = "clk-mt8192-mm",
128 .routes = mmsys_mt8192_routing_table,
129 .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
130 .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
133 static const struct mtk_mmsys_match_data mt8192_mmsys_match_data = {
136 &mt8192_mmsys_driver_data,
140 static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
141 .io_start = 0x1c01a000,
142 .clk_driver = "clk-mt8195-vdo0",
143 .routes = mmsys_mt8195_routing_table,
144 .num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
147 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
148 .io_start = 0x1c100000,
149 .clk_driver = "clk-mt8195-vdo1",
152 static const struct mtk_mmsys_match_data mt8195_mmsys_match_data = {
155 &mt8195_vdosys0_driver_data,
156 &mt8195_vdosys1_driver_data,
160 static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
161 .clk_driver = "clk-mt8365-mm",
162 .routes = mt8365_mmsys_routing_table,
163 .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),
166 static const struct mtk_mmsys_match_data mt8365_mmsys_match_data = {
169 &mt8365_mmsys_driver_data,
175 const struct mtk_mmsys_driver_data *data;
176 spinlock_t lock; /* protects mmsys_sw_rst_b reg */
177 struct reset_controller_dev rcdev;
178 phys_addr_t io_start;
181 static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
182 const struct mtk_mmsys_match_data *match)
186 for (i = 0; i < match->num_drv_data; i++)
187 if (mmsys->io_start == match->drv_data[i]->io_start)
193 void mtk_mmsys_ddp_connect(struct device *dev,
194 enum mtk_ddp_comp_id cur,
195 enum mtk_ddp_comp_id next)
197 struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
198 const struct mtk_mmsys_routes *routes = mmsys->data->routes;
202 for (i = 0; i < mmsys->data->num_routes; i++)
203 if (cur == routes[i].from_comp && next == routes[i].to_comp) {
204 reg = readl_relaxed(mmsys->regs + routes[i].addr);
205 reg &= ~routes[i].mask;
206 reg |= routes[i].val;
207 writel_relaxed(reg, mmsys->regs + routes[i].addr);
210 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
212 void mtk_mmsys_ddp_disconnect(struct device *dev,
213 enum mtk_ddp_comp_id cur,
214 enum mtk_ddp_comp_id next)
216 struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
217 const struct mtk_mmsys_routes *routes = mmsys->data->routes;
221 for (i = 0; i < mmsys->data->num_routes; i++)
222 if (cur == routes[i].from_comp && next == routes[i].to_comp) {
223 reg = readl_relaxed(mmsys->regs + routes[i].addr);
224 reg &= ~routes[i].mask;
225 writel_relaxed(reg, mmsys->regs + routes[i].addr);
228 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
230 static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,
233 struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
237 spin_lock_irqsave(&mmsys->lock, flags);
239 reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
246 writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
248 spin_unlock_irqrestore(&mmsys->lock, flags);
253 static int mtk_mmsys_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)
255 return mtk_mmsys_reset_update(rcdev, id, true);
258 static int mtk_mmsys_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)
260 return mtk_mmsys_reset_update(rcdev, id, false);
263 static int mtk_mmsys_reset(struct reset_controller_dev *rcdev, unsigned long id)
267 ret = mtk_mmsys_reset_assert(rcdev, id);
271 usleep_range(1000, 1100);
273 return mtk_mmsys_reset_deassert(rcdev, id);
276 static const struct reset_control_ops mtk_mmsys_reset_ops = {
277 .assert = mtk_mmsys_reset_assert,
278 .deassert = mtk_mmsys_reset_deassert,
279 .reset = mtk_mmsys_reset,
282 static int mtk_mmsys_probe(struct platform_device *pdev)
284 struct device *dev = &pdev->dev;
285 struct platform_device *clks;
286 struct platform_device *drm;
287 const struct mtk_mmsys_match_data *match_data;
288 struct mtk_mmsys *mmsys;
289 struct resource *res;
292 mmsys = devm_kzalloc(dev, sizeof(*mmsys), GFP_KERNEL);
296 mmsys->regs = devm_platform_ioremap_resource(pdev, 0);
297 if (IS_ERR(mmsys->regs)) {
298 ret = PTR_ERR(mmsys->regs);
299 dev_err(dev, "Failed to ioremap mmsys registers: %d\n", ret);
303 spin_lock_init(&mmsys->lock);
305 mmsys->rcdev.owner = THIS_MODULE;
306 mmsys->rcdev.nr_resets = 32;
307 mmsys->rcdev.ops = &mtk_mmsys_reset_ops;
308 mmsys->rcdev.of_node = pdev->dev.of_node;
309 ret = devm_reset_controller_register(&pdev->dev, &mmsys->rcdev);
311 dev_err(&pdev->dev, "Couldn't register mmsys reset controller: %d\n", ret);
315 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
317 dev_err(dev, "Couldn't get mmsys resource\n");
320 mmsys->io_start = res->start;
322 match_data = of_device_get_match_data(dev);
323 if (match_data->num_drv_data > 1) {
324 /* This SoC has multiple mmsys channels */
325 ret = mtk_mmsys_find_match_drvdata(mmsys, match_data);
327 dev_err(dev, "Couldn't get match driver data\n");
330 mmsys->data = match_data->drv_data[ret];
332 dev_dbg(dev, "Using single mmsys channel\n");
333 mmsys->data = match_data->drv_data[0];
336 platform_set_drvdata(pdev, mmsys);
338 clks = platform_device_register_data(&pdev->dev, mmsys->data->clk_driver,
339 PLATFORM_DEVID_AUTO, NULL, 0);
341 return PTR_ERR(clks);
343 drm = platform_device_register_data(&pdev->dev, "mediatek-drm",
344 PLATFORM_DEVID_AUTO, NULL, 0);
346 platform_device_unregister(clks);
353 static const struct of_device_id of_match_mtk_mmsys[] = {
355 .compatible = "mediatek,mt2701-mmsys",
356 .data = &mt2701_mmsys_match_data,
359 .compatible = "mediatek,mt2712-mmsys",
360 .data = &mt2712_mmsys_match_data,
363 .compatible = "mediatek,mt6779-mmsys",
364 .data = &mt6779_mmsys_match_data,
367 .compatible = "mediatek,mt6797-mmsys",
368 .data = &mt6797_mmsys_match_data,
371 .compatible = "mediatek,mt8167-mmsys",
372 .data = &mt8167_mmsys_match_data,
375 .compatible = "mediatek,mt8173-mmsys",
376 .data = &mt8173_mmsys_match_data,
379 .compatible = "mediatek,mt8183-mmsys",
380 .data = &mt8183_mmsys_match_data,
383 .compatible = "mediatek,mt8186-mmsys",
384 .data = &mt8186_mmsys_match_data,
387 .compatible = "mediatek,mt8192-mmsys",
388 .data = &mt8192_mmsys_match_data,
391 .compatible = "mediatek,mt8195-mmsys",
392 .data = &mt8195_mmsys_match_data,
395 .compatible = "mediatek,mt8365-mmsys",
396 .data = &mt8365_mmsys_match_data,
401 static struct platform_driver mtk_mmsys_drv = {
404 .of_match_table = of_match_mtk_mmsys,
406 .probe = mtk_mmsys_probe,
409 builtin_platform_driver(mtk_mmsys_drv);