1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef __SOC_MEDIATEK_MT8167_MMSYS_H
4 #define __SOC_MEDIATEK_MT8167_MMSYS_H
6 #define MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x030
7 #define MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN 0x038
8 #define MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x058
9 #define MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0x064
10 #define MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x06c
12 #define MT8167_DITHER_MOUT_EN_RDMA0 0x1
13 #define MT8167_RDMA0_SOUT_DSI0 0x2
14 #define MT8167_DSI0_SEL_IN_RDMA0 0x1
16 static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
18 DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
19 MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0,
21 DDP_COMPONENT_DITHER0, DDP_COMPONENT_RDMA0,
22 MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_RDMA0
24 DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
25 MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, COLOR0_SEL_IN_OVL0
27 DDP_COMPONENT_RDMA0, DDP_COMPONENT_DSI0,
28 MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_RDMA0
30 DDP_COMPONENT_RDMA0, DDP_COMPONENT_DSI0,
31 MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_DSI0
35 #endif /* __SOC_MEDIATEK_MT8167_MMSYS_H */