drivers/soc/atmel/soc.c

   1 /*
   2  * Copyright (C) 2015 Atmel
   3  *
   4  * Alexandre Belloni <alexandre.belloni@free-electrons.com
   5  * Boris Brezillon <boris.brezillon@free-electrons.com
   6  *
   7  * This file is licensed under the terms of the GNU General Public
   8  * License version 2.  This program is licensed "as is" without any
   9  * warranty of any kind, whether express or implied.
  10  *
  11  */
  12
  13 #define pr_fmt(fmt)     "AT91: " fmt
  14
  15 #include <linux/io.h>
  16 #include <linux/of.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_platform.h>
  19 #include <linux/slab.h>
  20 #include <linux/sys_soc.h>
  21
  22 #include "soc.h"
  23
  24 #define AT91_DBGU_CIDR                  0x40
  25 #define AT91_DBGU_EXID                  0x44
  26 #define AT91_CHIPID_CIDR                0x00
  27 #define AT91_CHIPID_EXID                0x04
  28 #define AT91_CIDR_VERSION(x)            ((x) & 0x1f)
  29 #define AT91_CIDR_EXT                   BIT(31)
  30 #define AT91_CIDR_MATCH_MASK            0x7fffffe0
  31
  32 static const struct at91_soc __initconst socs[] = {
  33 #ifdef CONFIG_SOC_AT91RM9200
  34         AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"),
  35 #endif
  36 #ifdef CONFIG_SOC_AT91SAM9
  37         AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
  38         AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
  39         AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
  40         AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
  41         AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
  42         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
  43                  "at91sam9m11", "at91sam9g45"),
  44         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
  45                  "at91sam9m10", "at91sam9g45"),
  46         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
  47                  "at91sam9g46", "at91sam9g45"),
  48         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
  49                  "at91sam9g45", "at91sam9g45"),
  50         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
  51                  "at91sam9g15", "at91sam9x5"),
  52         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
  53                  "at91sam9g35", "at91sam9x5"),
  54         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
  55                  "at91sam9x35", "at91sam9x5"),
  56         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
  57                  "at91sam9g25", "at91sam9x5"),
  58         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
  59                  "at91sam9x25", "at91sam9x5"),
  60         AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
  61                  "at91sam9cn12", "at91sam9n12"),
  62         AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
  63                  "at91sam9n12", "at91sam9n12"),
  64         AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
  65                  "at91sam9cn11", "at91sam9n12"),
  66         AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
  67         AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
  68         AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
  69 #endif
  70 #ifdef CONFIG_SOC_SAMA5
  71         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
  72                  "sama5d21", "sama5d2"),
  73         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
  74                  "sama5d22", "sama5d2"),
  75         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D225C_D1M_EXID_MATCH,
  76                  "sama5d225c 16MiB SiP", "sama5d2"),
  77         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
  78                  "sama5d23", "sama5d2"),
  79         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
  80                  "sama5d24", "sama5d2"),
  81         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
  82                  "sama5d24", "sama5d2"),
  83         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
  84                  "sama5d26", "sama5d2"),
  85         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
  86                  "sama5d27", "sama5d2"),
  87         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
  88                  "sama5d27", "sama5d2"),
  89         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D1G_EXID_MATCH,
  90                  "sama5d27c 128MiB SiP", "sama5d2"),
  91         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
  92                  "sama5d27c 64MiB SiP", "sama5d2"),
  93         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
  94                  "sama5d28", "sama5d2"),
  95         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
  96                  "sama5d28", "sama5d2"),
  97         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
  98                  "sama5d28c 128MiB SiP", "sama5d2"),
  99         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
 100                  "sama5d31", "sama5d3"),
 101         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
 102                  "sama5d33", "sama5d3"),
 103         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
 104                  "sama5d34", "sama5d3"),
 105         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
 106                  "sama5d35", "sama5d3"),
 107         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
 108                  "sama5d36", "sama5d3"),
 109         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
 110                  "sama5d41", "sama5d4"),
 111         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
 112                  "sama5d42", "sama5d4"),
 113         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
 114                  "sama5d43", "sama5d4"),
 115         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
 116                  "sama5d44", "sama5d4"),
 117 #endif
 118 #ifdef CONFIG_SOC_SAMV7
 119         AT91_SOC(SAME70Q21_CIDR_MATCH, SAME70Q21_EXID_MATCH,
 120                  "same70q21", "same7"),
 121         AT91_SOC(SAME70Q20_CIDR_MATCH, SAME70Q20_EXID_MATCH,
 122                  "same70q20", "same7"),
 123         AT91_SOC(SAME70Q19_CIDR_MATCH, SAME70Q19_EXID_MATCH,
 124                  "same70q19", "same7"),
 125         AT91_SOC(SAMS70Q21_CIDR_MATCH, SAMS70Q21_EXID_MATCH,
 126                  "sams70q21", "sams7"),
 127         AT91_SOC(SAMS70Q20_CIDR_MATCH, SAMS70Q20_EXID_MATCH,
 128                  "sams70q20", "sams7"),
 129         AT91_SOC(SAMS70Q19_CIDR_MATCH, SAMS70Q19_EXID_MATCH,
 130                  "sams70q19", "sams7"),
 131         AT91_SOC(SAMV71Q21_CIDR_MATCH, SAMV71Q21_EXID_MATCH,
 132                  "samv71q21", "samv7"),
 133         AT91_SOC(SAMV71Q20_CIDR_MATCH, SAMV71Q20_EXID_MATCH,
 134                  "samv71q20", "samv7"),
 135         AT91_SOC(SAMV71Q19_CIDR_MATCH, SAMV71Q19_EXID_MATCH,
 136                  "samv71q19", "samv7"),
 137         AT91_SOC(SAMV70Q20_CIDR_MATCH, SAMV70Q20_EXID_MATCH,
 138                  "samv70q20", "samv7"),
 139         AT91_SOC(SAMV70Q19_CIDR_MATCH, SAMV70Q19_EXID_MATCH,
 140                  "samv70q19", "samv7"),
 141 #endif
 142         { /* sentinel */ },
 143 };
 144
 145 static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
 146 {
 147         struct device_node *np;
 148         void __iomem *regs;
 149
 150         np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
 151         if (!np)
 152                 np = of_find_compatible_node(NULL, NULL,
 153                                              "atmel,at91sam9260-dbgu");
 154         if (!np)
 155                 return -ENODEV;
 156
 157         regs = of_iomap(np, 0);
 158         of_node_put(np);
 159
 160         if (!regs) {
 161                 pr_warn("Could not map DBGU iomem range");
 162                 return -ENXIO;
 163         }
 164
 165         *cidr = readl(regs + AT91_DBGU_CIDR);
 166         *exid = readl(regs + AT91_DBGU_EXID);
 167
 168         iounmap(regs);
 169
 170         return 0;
 171 }
 172
 173 static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid)
 174 {
 175         struct device_node *np;
 176         void __iomem *regs;
 177
 178         np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-chipid");
 179         if (!np)
 180                 return -ENODEV;
 181
 182         regs = of_iomap(np, 0);
 183         of_node_put(np);
 184
 185         if (!regs) {
 186                 pr_warn("Could not map DBGU iomem range");
 187                 return -ENXIO;
 188         }
 189
 190         *cidr = readl(regs + AT91_CHIPID_CIDR);
 191         *exid = readl(regs + AT91_CHIPID_EXID);
 192
 193         iounmap(regs);
 194
 195         return 0;
 196 }
 197
 198 struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
 199 {
 200         struct soc_device_attribute *soc_dev_attr;
 201         const struct at91_soc *soc;
 202         struct soc_device *soc_dev;
 203         u32 cidr, exid;
 204         int ret;
 205
 206         /*
 207          * With SAMA5D2 and later SoCs, CIDR and EXID registers are no more
 208          * in the dbgu device but in the chipid device whose purpose is only
 209          * to expose these two registers.
 210          */
 211         ret = at91_get_cidr_exid_from_dbgu(&cidr, &exid);
 212         if (ret)
 213                 ret = at91_get_cidr_exid_from_chipid(&cidr, &exid);
 214         if (ret) {
 215                 if (ret == -ENODEV)
 216                         pr_warn("Could not find identification node");
 217                 return NULL;
 218         }
 219
 220         for (soc = socs; soc->name; soc++) {
 221                 if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK))
 222                         continue;
 223
 224                 if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid)
 225                         break;
 226         }
 227
 228         if (!soc->name) {
 229                 pr_warn("Could not find matching SoC description\n");
 230                 return NULL;
 231         }
 232
 233         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 234         if (!soc_dev_attr)
 235                 return NULL;
 236
 237         soc_dev_attr->family = soc->family;
 238         soc_dev_attr->soc_id = soc->name;
 239         soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
 240                                            AT91_CIDR_VERSION(cidr));
 241         soc_dev = soc_device_register(soc_dev_attr);
 242         if (IS_ERR(soc_dev)) {
 243                 kfree(soc_dev_attr->revision);
 244                 kfree(soc_dev_attr);
 245                 pr_warn("Could not register SoC device\n");
 246                 return NULL;
 247         }
 248
 249         if (soc->family)
 250                 pr_info("Detected SoC family: %s\n", soc->family);
 251         pr_info("Detected SoC: %s, revision %X\n", soc->name,
 252                 AT91_CIDR_VERSION(cidr));
 253
 254         return soc_dev;
 255 }
 256
 257 static const struct of_device_id at91_soc_allowed_list[] __initconst = {
 258         { .compatible = "atmel,at91rm9200", },
 259         { .compatible = "atmel,at91sam9", },
 260         { .compatible = "atmel,sama5", },
 261         { .compatible = "atmel,samv7", },
 262         { }
 263 };
 264
 265 static int __init atmel_soc_device_init(void)
 266 {
 267         struct device_node *np = of_find_node_by_path("/");
 268
 269         if (!of_match_node(at91_soc_allowed_list, np))
 270                 return 0;
 271
 272         at91_soc_init(socs);
 273
 274         return 0;
 275 }
 276 subsys_initcall(atmel_soc_device_init);