1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
3 // Copyright (c) 2018, Linaro Limited
6 #include <linux/kernel.h>
7 #include <linux/init.h>
8 #include <linux/slab.h>
9 #include <linux/interrupt.h>
10 #include <linux/platform_device.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/dmaengine.h>
13 #include <linux/slimbus.h>
14 #include <linux/delay.h>
15 #include <linux/pm_runtime.h>
18 #include <linux/soc/qcom/qmi.h>
22 /* NGD (Non-ported Generic Device) registers */
24 #define NGD_CFG_ENABLE BIT(0)
25 #define NGD_CFG_RX_MSGQ_EN BIT(1)
26 #define NGD_CFG_TX_MSGQ_EN BIT(2)
27 #define NGD_STATUS 0x4
28 #define NGD_LADDR BIT(1)
29 #define NGD_RX_MSGQ_CFG 0x8
30 #define NGD_INT_EN 0x10
31 #define NGD_INT_RECFG_DONE BIT(24)
32 #define NGD_INT_TX_NACKED_2 BIT(25)
33 #define NGD_INT_MSG_BUF_CONTE BIT(26)
34 #define NGD_INT_MSG_TX_INVAL BIT(27)
35 #define NGD_INT_IE_VE_CHG BIT(28)
36 #define NGD_INT_DEV_ERR BIT(29)
37 #define NGD_INT_RX_MSG_RCVD BIT(30)
38 #define NGD_INT_TX_MSG_SENT BIT(31)
39 #define NGD_INT_STAT 0x14
40 #define NGD_INT_CLR 0x18
41 #define DEF_NGD_INT_MASK (NGD_INT_TX_NACKED_2 | NGD_INT_MSG_BUF_CONTE | \
42 NGD_INT_MSG_TX_INVAL | NGD_INT_IE_VE_CHG | \
43 NGD_INT_DEV_ERR | NGD_INT_TX_MSG_SENT | \
46 /* Slimbus QMI service */
47 #define SLIMBUS_QMI_SVC_ID 0x0301
48 #define SLIMBUS_QMI_SVC_V1 1
49 #define SLIMBUS_QMI_INS_ID 0
50 #define SLIMBUS_QMI_SELECT_INSTANCE_REQ_V01 0x0020
51 #define SLIMBUS_QMI_SELECT_INSTANCE_RESP_V01 0x0020
52 #define SLIMBUS_QMI_POWER_REQ_V01 0x0021
53 #define SLIMBUS_QMI_POWER_RESP_V01 0x0021
54 #define SLIMBUS_QMI_CHECK_FRAMER_STATUS_REQ 0x0022
55 #define SLIMBUS_QMI_CHECK_FRAMER_STATUS_RESP 0x0022
56 #define SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN 14
57 #define SLIMBUS_QMI_POWER_RESP_MAX_MSG_LEN 7
58 #define SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN 14
59 #define SLIMBUS_QMI_SELECT_INSTANCE_RESP_MAX_MSG_LEN 7
60 #define SLIMBUS_QMI_CHECK_FRAMER_STAT_RESP_MAX_MSG_LEN 7
61 /* QMI response timeout of 500ms */
62 #define SLIMBUS_QMI_RESP_TOUT 1000
64 /* User defined commands */
65 #define SLIM_USR_MC_GENERIC_ACK 0x25
66 #define SLIM_USR_MC_MASTER_CAPABILITY 0x0
67 #define SLIM_USR_MC_REPORT_SATELLITE 0x1
68 #define SLIM_USR_MC_ADDR_QUERY 0xD
69 #define SLIM_USR_MC_ADDR_REPLY 0xE
70 #define SLIM_USR_MC_DEFINE_CHAN 0x20
71 #define SLIM_USR_MC_DEF_ACT_CHAN 0x21
72 #define SLIM_USR_MC_CHAN_CTRL 0x23
73 #define SLIM_USR_MC_RECONFIG_NOW 0x24
74 #define SLIM_USR_MC_REQ_BW 0x28
75 #define SLIM_USR_MC_CONNECT_SRC 0x2C
76 #define SLIM_USR_MC_CONNECT_SINK 0x2D
77 #define SLIM_USR_MC_DISCONNECT_PORT 0x2E
78 #define SLIM_USR_MC_REPEAT_CHANGE_VALUE 0x0
80 #define QCOM_SLIM_NGD_AUTOSUSPEND MSEC_PER_SEC
81 #define SLIM_RX_MSGQ_TIMEOUT_VAL 0x10000
83 #define SLIM_LA_MGR 0xFF
84 #define SLIM_ROOT_FREQ 24576000
87 /* Per spec.max 40 bytes per received message */
88 #define SLIM_MSGQ_BUF_LEN 40
89 #define QCOM_SLIM_NGD_DESC_NUM 32
91 #define SLIM_MSG_ASM_FIRST_WORD(l, mt, mc, dt, ad) \
92 ((l) | ((mt) << 5) | ((mc) << 8) | ((dt) << 15) | ((ad) << 16))
94 #define INIT_MX_RETRIES 10
95 #define DEF_RETRY_MS 10
96 #define SAT_MAGIC_LSB 0xD9
97 #define SAT_MAGIC_MSB 0xC5
98 #define SAT_MSG_VER 0x1
99 #define SAT_MSG_PROT 0x1
100 #define to_ngd(d) container_of(d, struct qcom_slim_ngd, dev)
102 struct ngd_reg_offset_data {
106 static const struct ngd_reg_offset_data ngd_v1_5_offset_info = {
111 enum qcom_slim_ngd_state {
112 QCOM_SLIM_NGD_CTRL_AWAKE,
113 QCOM_SLIM_NGD_CTRL_IDLE,
114 QCOM_SLIM_NGD_CTRL_ASLEEP,
115 QCOM_SLIM_NGD_CTRL_DOWN,
118 struct qcom_slim_ngd_qmi {
119 struct qmi_handle qmi;
120 struct sockaddr_qrtr svc_info;
121 struct qmi_handle svc_event_hdl;
122 struct qmi_response_type_v01 resp;
123 struct qmi_handle *handle;
124 struct completion qmi_comp;
127 struct qcom_slim_ngd_ctrl;
128 struct qcom_slim_ngd;
130 struct qcom_slim_ngd_dma_desc {
131 struct dma_async_tx_descriptor *desc;
132 struct qcom_slim_ngd_ctrl *ctrl;
133 struct completion *comp;
139 struct qcom_slim_ngd {
140 struct platform_device *pdev;
145 struct qcom_slim_ngd_ctrl {
146 struct slim_framer framer;
147 struct slim_controller ctrl;
148 struct qcom_slim_ngd_qmi qmi;
149 struct qcom_slim_ngd *ngd;
152 struct dma_chan *dma_rx_channel;
153 struct dma_chan *dma_tx_channel;
154 struct qcom_slim_ngd_dma_desc rx_desc[QCOM_SLIM_NGD_DESC_NUM];
155 struct qcom_slim_ngd_dma_desc txdesc[QCOM_SLIM_NGD_DESC_NUM];
156 struct completion reconf;
157 struct work_struct m_work;
158 struct workqueue_struct *mwq;
159 spinlock_t tx_buf_lock;
160 enum qcom_slim_ngd_state state;
161 dma_addr_t rx_phys_base;
162 dma_addr_t tx_phys_base;
170 enum slimbus_mode_enum_type_v01 {
171 /* To force a 32 bit signed enum. Do not change or use*/
172 SLIMBUS_MODE_ENUM_TYPE_MIN_ENUM_VAL_V01 = INT_MIN,
173 SLIMBUS_MODE_SATELLITE_V01 = 1,
174 SLIMBUS_MODE_MASTER_V01 = 2,
175 SLIMBUS_MODE_ENUM_TYPE_MAX_ENUM_VAL_V01 = INT_MAX,
178 enum slimbus_pm_enum_type_v01 {
179 /* To force a 32 bit signed enum. Do not change or use*/
180 SLIMBUS_PM_ENUM_TYPE_MIN_ENUM_VAL_V01 = INT_MIN,
181 SLIMBUS_PM_INACTIVE_V01 = 1,
182 SLIMBUS_PM_ACTIVE_V01 = 2,
183 SLIMBUS_PM_ENUM_TYPE_MAX_ENUM_VAL_V01 = INT_MAX,
186 enum slimbus_resp_enum_type_v01 {
187 SLIMBUS_RESP_ENUM_TYPE_MIN_VAL_V01 = INT_MIN,
188 SLIMBUS_RESP_SYNCHRONOUS_V01 = 1,
189 SLIMBUS_RESP_ENUM_TYPE_MAX_VAL_V01 = INT_MAX,
192 struct slimbus_select_inst_req_msg_v01 {
195 enum slimbus_mode_enum_type_v01 mode;
198 struct slimbus_select_inst_resp_msg_v01 {
199 struct qmi_response_type_v01 resp;
202 struct slimbus_power_req_msg_v01 {
203 enum slimbus_pm_enum_type_v01 pm_req;
204 uint8_t resp_type_valid;
205 enum slimbus_resp_enum_type_v01 resp_type;
208 struct slimbus_power_resp_msg_v01 {
209 struct qmi_response_type_v01 resp;
212 static struct qmi_elem_info slimbus_select_inst_req_msg_v01_ei[] = {
214 .data_type = QMI_UNSIGNED_4_BYTE,
216 .elem_size = sizeof(uint32_t),
217 .array_type = NO_ARRAY,
219 .offset = offsetof(struct slimbus_select_inst_req_msg_v01,
224 .data_type = QMI_OPT_FLAG,
226 .elem_size = sizeof(uint8_t),
227 .array_type = NO_ARRAY,
229 .offset = offsetof(struct slimbus_select_inst_req_msg_v01,
234 .data_type = QMI_UNSIGNED_4_BYTE,
236 .elem_size = sizeof(enum slimbus_mode_enum_type_v01),
237 .array_type = NO_ARRAY,
239 .offset = offsetof(struct slimbus_select_inst_req_msg_v01,
244 .data_type = QMI_EOTI,
247 .array_type = NO_ARRAY,
254 static struct qmi_elem_info slimbus_select_inst_resp_msg_v01_ei[] = {
256 .data_type = QMI_STRUCT,
258 .elem_size = sizeof(struct qmi_response_type_v01),
259 .array_type = NO_ARRAY,
261 .offset = offsetof(struct slimbus_select_inst_resp_msg_v01,
263 .ei_array = qmi_response_type_v01_ei,
266 .data_type = QMI_EOTI,
269 .array_type = NO_ARRAY,
276 static struct qmi_elem_info slimbus_power_req_msg_v01_ei[] = {
278 .data_type = QMI_UNSIGNED_4_BYTE,
280 .elem_size = sizeof(enum slimbus_pm_enum_type_v01),
281 .array_type = NO_ARRAY,
283 .offset = offsetof(struct slimbus_power_req_msg_v01,
288 .data_type = QMI_OPT_FLAG,
290 .elem_size = sizeof(uint8_t),
291 .array_type = NO_ARRAY,
293 .offset = offsetof(struct slimbus_power_req_msg_v01,
297 .data_type = QMI_SIGNED_4_BYTE_ENUM,
299 .elem_size = sizeof(enum slimbus_resp_enum_type_v01),
300 .array_type = NO_ARRAY,
302 .offset = offsetof(struct slimbus_power_req_msg_v01,
306 .data_type = QMI_EOTI,
309 .array_type = NO_ARRAY,
316 static struct qmi_elem_info slimbus_power_resp_msg_v01_ei[] = {
318 .data_type = QMI_STRUCT,
320 .elem_size = sizeof(struct qmi_response_type_v01),
321 .array_type = NO_ARRAY,
323 .offset = offsetof(struct slimbus_power_resp_msg_v01, resp),
324 .ei_array = qmi_response_type_v01_ei,
327 .data_type = QMI_EOTI,
330 .array_type = NO_ARRAY,
337 static int qcom_slim_qmi_send_select_inst_req(struct qcom_slim_ngd_ctrl *ctrl,
338 struct slimbus_select_inst_req_msg_v01 *req)
340 struct slimbus_select_inst_resp_msg_v01 resp = { { 0, 0 } };
344 rc = qmi_txn_init(ctrl->qmi.handle, &txn,
345 slimbus_select_inst_resp_msg_v01_ei, &resp);
347 dev_err(ctrl->dev, "QMI TXN init fail: %d\n", rc);
351 rc = qmi_send_request(ctrl->qmi.handle, NULL, &txn,
352 SLIMBUS_QMI_SELECT_INSTANCE_REQ_V01,
353 SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN,
354 slimbus_select_inst_req_msg_v01_ei, req);
356 dev_err(ctrl->dev, "QMI send req fail %d\n", rc);
357 qmi_txn_cancel(&txn);
361 rc = qmi_txn_wait(&txn, SLIMBUS_QMI_RESP_TOUT);
363 dev_err(ctrl->dev, "QMI TXN wait fail: %d\n", rc);
366 /* Check the response */
367 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
368 dev_err(ctrl->dev, "QMI request failed 0x%x\n",
376 static void qcom_slim_qmi_power_resp_cb(struct qmi_handle *handle,
377 struct sockaddr_qrtr *sq,
378 struct qmi_txn *txn, const void *data)
380 struct slimbus_power_resp_msg_v01 *resp;
382 resp = (struct slimbus_power_resp_msg_v01 *)data;
383 if (resp->resp.result != QMI_RESULT_SUCCESS_V01)
384 pr_err("QMI power request failed 0x%x\n",
387 complete(&txn->completion);
390 static int qcom_slim_qmi_send_power_request(struct qcom_slim_ngd_ctrl *ctrl,
391 struct slimbus_power_req_msg_v01 *req)
393 struct slimbus_power_resp_msg_v01 resp = { { 0, 0 } };
397 rc = qmi_txn_init(ctrl->qmi.handle, &txn,
398 slimbus_power_resp_msg_v01_ei, &resp);
400 rc = qmi_send_request(ctrl->qmi.handle, NULL, &txn,
401 SLIMBUS_QMI_POWER_REQ_V01,
402 SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN,
403 slimbus_power_req_msg_v01_ei, req);
405 dev_err(ctrl->dev, "QMI send req fail %d\n", rc);
406 qmi_txn_cancel(&txn);
410 rc = qmi_txn_wait(&txn, SLIMBUS_QMI_RESP_TOUT);
412 dev_err(ctrl->dev, "QMI TXN wait fail: %d\n", rc);
416 /* Check the response */
417 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
418 dev_err(ctrl->dev, "QMI request failed 0x%x\n",
426 static struct qmi_msg_handler qcom_slim_qmi_msg_handlers[] = {
428 .type = QMI_RESPONSE,
429 .msg_id = SLIMBUS_QMI_POWER_RESP_V01,
430 .ei = slimbus_power_resp_msg_v01_ei,
431 .decoded_size = sizeof(struct slimbus_power_resp_msg_v01),
432 .fn = qcom_slim_qmi_power_resp_cb,
437 static int qcom_slim_qmi_init(struct qcom_slim_ngd_ctrl *ctrl,
440 struct slimbus_select_inst_req_msg_v01 req;
441 struct qmi_handle *handle;
444 handle = devm_kzalloc(ctrl->dev, sizeof(*handle), GFP_KERNEL);
448 rc = qmi_handle_init(handle, SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN,
449 NULL, qcom_slim_qmi_msg_handlers);
451 dev_err(ctrl->dev, "QMI client init failed: %d\n", rc);
452 goto qmi_handle_init_failed;
455 rc = kernel_connect(handle->sock,
456 (struct sockaddr *)&ctrl->qmi.svc_info,
457 sizeof(ctrl->qmi.svc_info), 0);
459 dev_err(ctrl->dev, "Remote Service connect failed: %d\n", rc);
460 goto qmi_connect_to_service_failed;
463 /* Instance is 0 based */
464 req.instance = (ctrl->ngd->id >> 1);
467 /* Mode indicates the role of the ADSP */
469 req.mode = SLIMBUS_MODE_SATELLITE_V01;
471 req.mode = SLIMBUS_MODE_MASTER_V01;
473 ctrl->qmi.handle = handle;
475 rc = qcom_slim_qmi_send_select_inst_req(ctrl, &req);
477 dev_err(ctrl->dev, "failed to select h/w instance\n");
478 goto qmi_select_instance_failed;
483 qmi_select_instance_failed:
484 ctrl->qmi.handle = NULL;
485 qmi_connect_to_service_failed:
486 qmi_handle_release(handle);
487 qmi_handle_init_failed:
488 devm_kfree(ctrl->dev, handle);
492 static void qcom_slim_qmi_exit(struct qcom_slim_ngd_ctrl *ctrl)
494 if (!ctrl->qmi.handle)
497 qmi_handle_release(ctrl->qmi.handle);
498 devm_kfree(ctrl->dev, ctrl->qmi.handle);
499 ctrl->qmi.handle = NULL;
502 static int qcom_slim_qmi_power_request(struct qcom_slim_ngd_ctrl *ctrl,
505 struct slimbus_power_req_msg_v01 req;
508 req.pm_req = SLIMBUS_PM_ACTIVE_V01;
510 req.pm_req = SLIMBUS_PM_INACTIVE_V01;
512 req.resp_type_valid = 0;
514 return qcom_slim_qmi_send_power_request(ctrl, &req);
517 static u32 *qcom_slim_ngd_tx_msg_get(struct qcom_slim_ngd_ctrl *ctrl, int len,
518 struct completion *comp)
520 struct qcom_slim_ngd_dma_desc *desc;
523 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
525 if ((ctrl->tx_tail + 1) % QCOM_SLIM_NGD_DESC_NUM == ctrl->tx_head) {
526 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
529 desc = &ctrl->txdesc[ctrl->tx_tail];
530 desc->base = ctrl->tx_base + ctrl->tx_tail * SLIM_MSGQ_BUF_LEN;
532 ctrl->tx_tail = (ctrl->tx_tail + 1) % QCOM_SLIM_NGD_DESC_NUM;
534 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
539 static void qcom_slim_ngd_tx_msg_dma_cb(void *args)
541 struct qcom_slim_ngd_dma_desc *desc = args;
542 struct qcom_slim_ngd_ctrl *ctrl = desc->ctrl;
545 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
548 complete(desc->comp);
552 ctrl->tx_head = (ctrl->tx_head + 1) % QCOM_SLIM_NGD_DESC_NUM;
553 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
556 static int qcom_slim_ngd_tx_msg_post(struct qcom_slim_ngd_ctrl *ctrl,
559 struct qcom_slim_ngd_dma_desc *desc;
563 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
564 offset = buf - ctrl->tx_base;
565 index = offset/SLIM_MSGQ_BUF_LEN;
567 desc = &ctrl->txdesc[index];
568 desc->phys = ctrl->tx_phys_base + offset;
569 desc->base = ctrl->tx_base + offset;
571 len = (len + 3) & 0xfc;
573 desc->desc = dmaengine_prep_slave_single(ctrl->dma_tx_channel,
578 dev_err(ctrl->dev, "unable to prepare channel\n");
579 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
583 desc->desc->callback = qcom_slim_ngd_tx_msg_dma_cb;
584 desc->desc->callback_param = desc;
585 desc->desc->cookie = dmaengine_submit(desc->desc);
586 dma_async_issue_pending(ctrl->dma_tx_channel);
587 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
592 static void qcom_slim_ngd_rx(struct qcom_slim_ngd_ctrl *ctrl, u8 *buf)
596 mt = SLIM_HEADER_GET_MT(buf[0]);
597 len = SLIM_HEADER_GET_RL(buf[0]);
598 mc = SLIM_HEADER_GET_MC(buf[1]);
600 if (mc == SLIM_USR_MC_MASTER_CAPABILITY &&
601 mt == SLIM_MSG_MT_SRC_REFERRED_USER)
602 queue_work(ctrl->mwq, &ctrl->m_work);
604 if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||
605 mc == SLIM_MSG_MC_REPLY_VALUE || (mc == SLIM_USR_MC_ADDR_REPLY &&
606 mt == SLIM_MSG_MT_SRC_REFERRED_USER) ||
607 (mc == SLIM_USR_MC_GENERIC_ACK &&
608 mt == SLIM_MSG_MT_SRC_REFERRED_USER)) {
609 slim_msg_response(&ctrl->ctrl, &buf[4], buf[3], len - 4);
610 pm_runtime_mark_last_busy(ctrl->dev);
614 static void qcom_slim_ngd_rx_msgq_cb(void *args)
616 struct qcom_slim_ngd_dma_desc *desc = args;
617 struct qcom_slim_ngd_ctrl *ctrl = desc->ctrl;
619 qcom_slim_ngd_rx(ctrl, (u8 *)desc->base);
620 /* Add descriptor back to the queue */
621 desc->desc = dmaengine_prep_slave_single(ctrl->dma_rx_channel,
622 desc->phys, SLIM_MSGQ_BUF_LEN,
626 dev_err(ctrl->dev, "Unable to prepare rx channel\n");
630 desc->desc->callback = qcom_slim_ngd_rx_msgq_cb;
631 desc->desc->callback_param = desc;
632 desc->desc->cookie = dmaengine_submit(desc->desc);
633 dma_async_issue_pending(ctrl->dma_rx_channel);
636 static int qcom_slim_ngd_post_rx_msgq(struct qcom_slim_ngd_ctrl *ctrl)
638 struct qcom_slim_ngd_dma_desc *desc;
641 for (i = 0; i < QCOM_SLIM_NGD_DESC_NUM; i++) {
642 desc = &ctrl->rx_desc[i];
643 desc->phys = ctrl->rx_phys_base + i * SLIM_MSGQ_BUF_LEN;
645 desc->base = ctrl->rx_base + i * SLIM_MSGQ_BUF_LEN;
646 desc->desc = dmaengine_prep_slave_single(ctrl->dma_rx_channel,
647 desc->phys, SLIM_MSGQ_BUF_LEN,
651 dev_err(ctrl->dev, "Unable to prepare rx channel\n");
655 desc->desc->callback = qcom_slim_ngd_rx_msgq_cb;
656 desc->desc->callback_param = desc;
657 desc->desc->cookie = dmaengine_submit(desc->desc);
659 dma_async_issue_pending(ctrl->dma_rx_channel);
664 static int qcom_slim_ngd_init_rx_msgq(struct qcom_slim_ngd_ctrl *ctrl)
666 struct device *dev = ctrl->dev;
669 ctrl->dma_rx_channel = dma_request_chan(dev, "rx");
670 if (IS_ERR(ctrl->dma_rx_channel)) {
671 dev_err(dev, "Failed to request RX dma channel");
672 ret = PTR_ERR(ctrl->dma_rx_channel);
673 ctrl->dma_rx_channel = NULL;
677 size = QCOM_SLIM_NGD_DESC_NUM * SLIM_MSGQ_BUF_LEN;
678 ctrl->rx_base = dma_alloc_coherent(dev, size, &ctrl->rx_phys_base,
680 if (!ctrl->rx_base) {
681 dev_err(dev, "dma_alloc_coherent failed\n");
686 ret = qcom_slim_ngd_post_rx_msgq(ctrl);
688 dev_err(dev, "post_rx_msgq() failed 0x%x\n", ret);
695 dma_free_coherent(dev, size, ctrl->rx_base, ctrl->rx_phys_base);
697 dma_release_channel(ctrl->dma_rx_channel);
701 static int qcom_slim_ngd_init_tx_msgq(struct qcom_slim_ngd_ctrl *ctrl)
703 struct device *dev = ctrl->dev;
708 ctrl->dma_tx_channel = dma_request_chan(dev, "tx");
709 if (IS_ERR(ctrl->dma_tx_channel)) {
710 dev_err(dev, "Failed to request TX dma channel");
711 ret = PTR_ERR(ctrl->dma_tx_channel);
712 ctrl->dma_tx_channel = NULL;
716 size = ((QCOM_SLIM_NGD_DESC_NUM + 1) * SLIM_MSGQ_BUF_LEN);
717 ctrl->tx_base = dma_alloc_coherent(dev, size, &ctrl->tx_phys_base,
719 if (!ctrl->tx_base) {
720 dev_err(dev, "dma_alloc_coherent failed\n");
725 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
728 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
732 dma_release_channel(ctrl->dma_tx_channel);
736 static int qcom_slim_ngd_init_dma(struct qcom_slim_ngd_ctrl *ctrl)
740 ret = qcom_slim_ngd_init_rx_msgq(ctrl);
742 dev_err(ctrl->dev, "rx dma init failed\n");
746 ret = qcom_slim_ngd_init_tx_msgq(ctrl);
748 dev_err(ctrl->dev, "tx dma init failed\n");
753 static irqreturn_t qcom_slim_ngd_interrupt(int irq, void *d)
755 struct qcom_slim_ngd_ctrl *ctrl = d;
756 void __iomem *base = ctrl->ngd->base;
757 u32 stat = readl(base + NGD_INT_STAT);
759 if ((stat & NGD_INT_MSG_BUF_CONTE) ||
760 (stat & NGD_INT_MSG_TX_INVAL) || (stat & NGD_INT_DEV_ERR) ||
761 (stat & NGD_INT_TX_NACKED_2)) {
762 dev_err(ctrl->dev, "Error Interrupt received 0x%x\n", stat);
765 writel(stat, base + NGD_INT_CLR);
770 static int qcom_slim_ngd_xfer_msg(struct slim_controller *sctrl,
771 struct slim_msg_txn *txn)
773 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(sctrl->dev);
774 DECLARE_COMPLETION_ONSTACK(tx_sent);
775 DECLARE_COMPLETION_ONSTACK(done);
777 u8 wbuf[SLIM_MSGQ_BUF_LEN];
778 u8 rbuf[SLIM_MSGQ_BUF_LEN];
782 bool usr_msg = false;
784 if (txn->mt == SLIM_MSG_MT_CORE &&
785 (txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
786 txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW))
789 if (txn->dt == SLIM_MSG_DEST_ENUMADDR)
790 return -EPROTONOSUPPORT;
792 if (txn->msg->num_bytes > SLIM_MSGQ_BUF_LEN ||
793 txn->rl > SLIM_MSGQ_BUF_LEN) {
794 dev_err(ctrl->dev, "msg exceeds HW limit\n");
798 pbuf = qcom_slim_ngd_tx_msg_get(ctrl, txn->rl, &tx_sent);
800 dev_err(ctrl->dev, "Message buffer unavailable\n");
804 if (txn->mt == SLIM_MSG_MT_CORE &&
805 (txn->mc == SLIM_MSG_MC_CONNECT_SOURCE ||
806 txn->mc == SLIM_MSG_MC_CONNECT_SINK ||
807 txn->mc == SLIM_MSG_MC_DISCONNECT_PORT)) {
808 txn->mt = SLIM_MSG_MT_DEST_REFERRED_USER;
810 case SLIM_MSG_MC_CONNECT_SOURCE:
811 txn->mc = SLIM_USR_MC_CONNECT_SRC;
813 case SLIM_MSG_MC_CONNECT_SINK:
814 txn->mc = SLIM_USR_MC_CONNECT_SINK;
816 case SLIM_MSG_MC_DISCONNECT_PORT:
817 txn->mc = SLIM_USR_MC_DISCONNECT_PORT;
827 wbuf[i++] = txn->msg->wbuf[0];
828 if (txn->mc != SLIM_USR_MC_DISCONNECT_PORT)
829 wbuf[i++] = txn->msg->wbuf[1];
832 ret = slim_alloc_txn_tid(sctrl, txn);
834 dev_err(ctrl->dev, "Unable to allocate TID\n");
838 wbuf[i++] = txn->tid;
840 txn->msg->num_bytes = i;
841 txn->msg->wbuf = wbuf;
842 txn->msg->rbuf = rbuf;
843 txn->rl = txn->msg->num_bytes + 4;
846 /* HW expects length field to be excluded */
850 if (txn->dt == SLIM_MSG_DEST_LOGICALADDR) {
851 *pbuf = SLIM_MSG_ASM_FIRST_WORD(txn->rl, txn->mt, txn->mc, 0,
855 *pbuf = SLIM_MSG_ASM_FIRST_WORD(txn->rl, txn->mt, txn->mc, 1,
860 if (slim_tid_txn(txn->mt, txn->mc))
863 if (slim_ec_txn(txn->mt, txn->mc)) {
864 *(puc++) = (txn->ec & 0xFF);
865 *(puc++) = (txn->ec >> 8) & 0xFF;
868 if (txn->msg && txn->msg->wbuf)
869 memcpy(puc, txn->msg->wbuf, txn->msg->num_bytes);
871 ret = qcom_slim_ngd_tx_msg_post(ctrl, pbuf, txn->rl);
875 timeout = wait_for_completion_timeout(&tx_sent, HZ);
877 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
883 timeout = wait_for_completion_timeout(&done, HZ);
885 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x",
894 static int qcom_slim_ngd_xfer_msg_sync(struct slim_controller *ctrl,
895 struct slim_msg_txn *txn)
897 DECLARE_COMPLETION_ONSTACK(done);
900 pm_runtime_get_sync(ctrl->dev);
904 ret = qcom_slim_ngd_xfer_msg(ctrl, txn);
908 timeout = wait_for_completion_timeout(&done, HZ);
910 dev_err(ctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
917 static int qcom_slim_ngd_enable_stream(struct slim_stream_runtime *rt)
919 struct slim_device *sdev = rt->dev;
920 struct slim_controller *ctrl = sdev->ctrl;
921 struct slim_val_inf msg = {0};
922 u8 wbuf[SLIM_MSGQ_BUF_LEN];
923 u8 rbuf[SLIM_MSGQ_BUF_LEN];
924 struct slim_msg_txn txn = {0,};
927 txn.mt = SLIM_MSG_MT_DEST_REFERRED_USER;
928 txn.dt = SLIM_MSG_DEST_LOGICALADDR;
929 txn.la = SLIM_LA_MGR;
932 txn.msg->num_bytes = 0;
933 txn.msg->wbuf = wbuf;
934 txn.msg->rbuf = rbuf;
936 for (i = 0; i < rt->num_ports; i++) {
937 struct slim_port *port = &rt->ports[i];
939 if (txn.msg->num_bytes == 0) {
940 int seg_interval = SLIM_SLOTS_PER_SUPERFRAME/rt->ratem;
943 wbuf[txn.msg->num_bytes++] = sdev->laddr;
944 wbuf[txn.msg->num_bytes] = rt->bps >> 2 |
945 (port->ch.aux_fmt << 6);
947 /* Data channel segment interval not multiple of 3 */
948 exp = seg_interval % 3;
950 wbuf[txn.msg->num_bytes] |= BIT(5);
952 txn.msg->num_bytes++;
953 wbuf[txn.msg->num_bytes++] = exp << 4 | rt->prot;
955 if (rt->prot == SLIM_PROTO_ISO)
956 wbuf[txn.msg->num_bytes++] =
958 SLIM_CHANNEL_CONTENT_FL;
960 wbuf[txn.msg->num_bytes++] = port->ch.prrate;
962 ret = slim_alloc_txn_tid(ctrl, &txn);
964 dev_err(&sdev->dev, "Fail to allocate TID\n");
967 wbuf[txn.msg->num_bytes++] = txn.tid;
969 wbuf[txn.msg->num_bytes++] = port->ch.id;
972 txn.mc = SLIM_USR_MC_DEF_ACT_CHAN;
973 txn.rl = txn.msg->num_bytes + 4;
974 ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);
976 slim_free_txn_tid(ctrl, &txn);
977 dev_err(&sdev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn.mc,
982 txn.mc = SLIM_USR_MC_RECONFIG_NOW;
983 txn.msg->num_bytes = 2;
984 wbuf[1] = sdev->laddr;
985 txn.rl = txn.msg->num_bytes + 4;
987 ret = slim_alloc_txn_tid(ctrl, &txn);
989 dev_err(ctrl->dev, "Fail to allocate TID\n");
994 ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);
996 slim_free_txn_tid(ctrl, &txn);
997 dev_err(&sdev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn.mc,
1004 static int qcom_slim_ngd_get_laddr(struct slim_controller *ctrl,
1005 struct slim_eaddr *ea, u8 *laddr)
1007 struct slim_val_inf msg = {0};
1008 u8 failed_ea[6] = {0, 0, 0, 0, 0, 0};
1009 struct slim_msg_txn txn;
1014 txn.mt = SLIM_MSG_MT_DEST_REFERRED_USER;
1015 txn.dt = SLIM_MSG_DEST_LOGICALADDR;
1016 txn.la = SLIM_LA_MGR;
1019 txn.mc = SLIM_USR_MC_ADDR_QUERY;
1022 txn.msg->num_bytes = 7;
1023 txn.msg->wbuf = wbuf;
1024 txn.msg->rbuf = rbuf;
1026 ret = slim_alloc_txn_tid(ctrl, &txn);
1030 wbuf[0] = (u8)txn.tid;
1031 memcpy(&wbuf[1], ea, sizeof(*ea));
1033 ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);
1035 slim_free_txn_tid(ctrl, &txn);
1039 if (!memcmp(rbuf, failed_ea, 6))
1047 static int qcom_slim_ngd_exit_dma(struct qcom_slim_ngd_ctrl *ctrl)
1049 if (ctrl->dma_rx_channel) {
1050 dmaengine_terminate_sync(ctrl->dma_rx_channel);
1051 dma_release_channel(ctrl->dma_rx_channel);
1054 if (ctrl->dma_tx_channel) {
1055 dmaengine_terminate_sync(ctrl->dma_tx_channel);
1056 dma_release_channel(ctrl->dma_tx_channel);
1059 ctrl->dma_tx_channel = ctrl->dma_rx_channel = NULL;
1064 static void qcom_slim_ngd_setup(struct qcom_slim_ngd_ctrl *ctrl)
1066 u32 cfg = readl_relaxed(ctrl->ngd->base);
1068 if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN ||
1069 ctrl->state == QCOM_SLIM_NGD_CTRL_ASLEEP)
1070 qcom_slim_ngd_init_dma(ctrl);
1072 /* By default enable message queues */
1073 cfg |= NGD_CFG_RX_MSGQ_EN;
1074 cfg |= NGD_CFG_TX_MSGQ_EN;
1076 /* Enable NGD if it's not already enabled*/
1077 if (!(cfg & NGD_CFG_ENABLE))
1078 cfg |= NGD_CFG_ENABLE;
1080 writel_relaxed(cfg, ctrl->ngd->base);
1083 static int qcom_slim_ngd_power_up(struct qcom_slim_ngd_ctrl *ctrl)
1085 enum qcom_slim_ngd_state cur_state = ctrl->state;
1086 struct qcom_slim_ngd *ngd = ctrl->ngd;
1088 int timeout, ret = 0;
1090 if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN) {
1091 timeout = wait_for_completion_timeout(&ctrl->qmi.qmi_comp, HZ);
1096 if (ctrl->state == QCOM_SLIM_NGD_CTRL_ASLEEP ||
1097 ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN) {
1098 ret = qcom_slim_qmi_power_request(ctrl, true);
1100 dev_err(ctrl->dev, "SLIM QMI power request failed:%d\n",
1106 ctrl->ver = readl_relaxed(ctrl->base);
1107 /* Version info in 16 MSbits */
1110 laddr = readl_relaxed(ngd->base + NGD_STATUS);
1111 if (laddr & NGD_LADDR) {
1113 * external MDM restart case where ADSP itself was active framer
1114 * For example, modem restarted when playback was active
1116 if (cur_state == QCOM_SLIM_NGD_CTRL_AWAKE) {
1117 dev_info(ctrl->dev, "Subsys restart: ADSP active framer\n");
1120 qcom_slim_ngd_setup(ctrl);
1124 writel_relaxed(DEF_NGD_INT_MASK, ngd->base + NGD_INT_EN);
1125 rx_msgq = readl_relaxed(ngd->base + NGD_RX_MSGQ_CFG);
1127 writel_relaxed(rx_msgq|SLIM_RX_MSGQ_TIMEOUT_VAL,
1128 ngd->base + NGD_RX_MSGQ_CFG);
1129 qcom_slim_ngd_setup(ctrl);
1131 timeout = wait_for_completion_timeout(&ctrl->reconf, HZ);
1133 dev_err(ctrl->dev, "capability exchange timed-out\n");
1140 static void qcom_slim_ngd_notify_slaves(struct qcom_slim_ngd_ctrl *ctrl)
1142 struct slim_device *sbdev;
1143 struct device_node *node;
1145 for_each_child_of_node(ctrl->ngd->pdev->dev.of_node, node) {
1146 sbdev = of_slim_get_device(&ctrl->ctrl, node);
1150 if (slim_get_logical_addr(sbdev))
1151 dev_err(ctrl->dev, "Failed to get logical address\n");
1155 static void qcom_slim_ngd_master_worker(struct work_struct *work)
1157 struct qcom_slim_ngd_ctrl *ctrl;
1158 struct slim_msg_txn txn;
1159 struct slim_val_inf msg = {0};
1164 ctrl = container_of(work, struct qcom_slim_ngd_ctrl, m_work);
1165 txn.dt = SLIM_MSG_DEST_LOGICALADDR;
1167 txn.mc = SLIM_USR_MC_REPORT_SATELLITE;
1168 txn.mt = SLIM_MSG_MT_SRC_REFERRED_USER;
1169 txn.la = SLIM_LA_MGR;
1170 wbuf[0] = SAT_MAGIC_LSB;
1171 wbuf[1] = SAT_MAGIC_MSB;
1172 wbuf[2] = SAT_MSG_VER;
1173 wbuf[3] = SAT_MSG_PROT;
1175 txn.msg->wbuf = wbuf;
1176 txn.msg->num_bytes = 4;
1179 dev_info(ctrl->dev, "SLIM SAT: Rcvd master capability\n");
1182 ret = qcom_slim_ngd_xfer_msg(&ctrl->ctrl, &txn);
1184 if (ctrl->state >= QCOM_SLIM_NGD_CTRL_ASLEEP)
1185 complete(&ctrl->reconf);
1187 dev_err(ctrl->dev, "unexpected state:%d\n",
1190 if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN)
1191 qcom_slim_ngd_notify_slaves(ctrl);
1193 } else if (ret == -EIO) {
1194 dev_err(ctrl->dev, "capability message NACKed, retrying\n");
1195 if (retries < INIT_MX_RETRIES) {
1196 msleep(DEF_RETRY_MS);
1198 goto capability_retry;
1201 dev_err(ctrl->dev, "SLIM: capability TX failed:%d\n", ret);
1205 static int qcom_slim_ngd_runtime_resume(struct device *dev)
1207 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);
1210 if (!ctrl->qmi.handle)
1213 if (ctrl->state >= QCOM_SLIM_NGD_CTRL_ASLEEP)
1214 ret = qcom_slim_ngd_power_up(ctrl);
1216 /* Did SSR cause this power up failure */
1217 if (ctrl->state != QCOM_SLIM_NGD_CTRL_DOWN)
1218 ctrl->state = QCOM_SLIM_NGD_CTRL_ASLEEP;
1220 dev_err(ctrl->dev, "HW wakeup attempt during SSR\n");
1222 ctrl->state = QCOM_SLIM_NGD_CTRL_AWAKE;
1228 static int qcom_slim_ngd_enable(struct qcom_slim_ngd_ctrl *ctrl, bool enable)
1231 int ret = qcom_slim_qmi_init(ctrl, false);
1234 dev_err(ctrl->dev, "qmi init fail, ret:%d, state:%d\n",
1238 /* controller state should be in sync with framework state */
1239 complete(&ctrl->qmi.qmi_comp);
1240 if (!pm_runtime_enabled(ctrl->dev) ||
1241 !pm_runtime_suspended(ctrl->dev))
1242 qcom_slim_ngd_runtime_resume(ctrl->dev);
1244 pm_runtime_resume(ctrl->dev);
1245 pm_runtime_mark_last_busy(ctrl->dev);
1246 pm_runtime_put(ctrl->dev);
1248 ret = slim_register_controller(&ctrl->ctrl);
1250 dev_err(ctrl->dev, "error adding slim controller\n");
1254 dev_info(ctrl->dev, "SLIM controller Registered\n");
1256 qcom_slim_qmi_exit(ctrl);
1257 slim_unregister_controller(&ctrl->ctrl);
1263 static int qcom_slim_ngd_qmi_new_server(struct qmi_handle *hdl,
1264 struct qmi_service *service)
1266 struct qcom_slim_ngd_qmi *qmi =
1267 container_of(hdl, struct qcom_slim_ngd_qmi, svc_event_hdl);
1268 struct qcom_slim_ngd_ctrl *ctrl =
1269 container_of(qmi, struct qcom_slim_ngd_ctrl, qmi);
1271 qmi->svc_info.sq_family = AF_QIPCRTR;
1272 qmi->svc_info.sq_node = service->node;
1273 qmi->svc_info.sq_port = service->port;
1275 qcom_slim_ngd_enable(ctrl, true);
1280 static void qcom_slim_ngd_qmi_del_server(struct qmi_handle *hdl,
1281 struct qmi_service *service)
1283 struct qcom_slim_ngd_qmi *qmi =
1284 container_of(hdl, struct qcom_slim_ngd_qmi, svc_event_hdl);
1285 struct qcom_slim_ngd_ctrl *ctrl =
1286 container_of(qmi, struct qcom_slim_ngd_ctrl, qmi);
1288 qmi->svc_info.sq_node = 0;
1289 qmi->svc_info.sq_port = 0;
1291 qcom_slim_ngd_enable(ctrl, false);
1294 static struct qmi_ops qcom_slim_ngd_qmi_svc_event_ops = {
1295 .new_server = qcom_slim_ngd_qmi_new_server,
1296 .del_server = qcom_slim_ngd_qmi_del_server,
1299 static int qcom_slim_ngd_qmi_svc_event_init(struct qcom_slim_ngd_ctrl *ctrl)
1301 struct qcom_slim_ngd_qmi *qmi = &ctrl->qmi;
1304 ret = qmi_handle_init(&qmi->svc_event_hdl, 0,
1305 &qcom_slim_ngd_qmi_svc_event_ops, NULL);
1307 dev_err(ctrl->dev, "qmi_handle_init failed: %d\n", ret);
1311 ret = qmi_add_lookup(&qmi->svc_event_hdl, SLIMBUS_QMI_SVC_ID,
1312 SLIMBUS_QMI_SVC_V1, SLIMBUS_QMI_INS_ID);
1314 dev_err(ctrl->dev, "qmi_add_lookup failed: %d\n", ret);
1315 qmi_handle_release(&qmi->svc_event_hdl);
1320 static void qcom_slim_ngd_qmi_svc_event_deinit(struct qcom_slim_ngd_qmi *qmi)
1322 qmi_handle_release(&qmi->svc_event_hdl);
1325 static struct platform_driver qcom_slim_ngd_driver;
1326 #define QCOM_SLIM_NGD_DRV_NAME "qcom,slim-ngd"
1328 static const struct of_device_id qcom_slim_ngd_dt_match[] = {
1330 .compatible = "qcom,slim-ngd-v1.5.0",
1331 .data = &ngd_v1_5_offset_info,
1333 .compatible = "qcom,slim-ngd-v2.1.0",
1334 .data = &ngd_v1_5_offset_info,
1339 MODULE_DEVICE_TABLE(of, qcom_slim_ngd_dt_match);
1341 static int of_qcom_slim_ngd_register(struct device *parent,
1342 struct qcom_slim_ngd_ctrl *ctrl)
1344 const struct ngd_reg_offset_data *data;
1345 struct qcom_slim_ngd *ngd;
1346 const struct of_device_id *match;
1347 struct device_node *node;
1350 match = of_match_node(qcom_slim_ngd_dt_match, parent->of_node);
1352 for_each_available_child_of_node(parent->of_node, node) {
1353 if (of_property_read_u32(node, "reg", &id))
1356 ngd = kzalloc(sizeof(*ngd), GFP_KERNEL);
1362 ngd->pdev = platform_device_alloc(QCOM_SLIM_NGD_DRV_NAME, id);
1369 ngd->pdev->dev.parent = parent;
1370 ngd->pdev->driver_override = QCOM_SLIM_NGD_DRV_NAME;
1371 ngd->pdev->dev.of_node = node;
1374 platform_device_add(ngd->pdev);
1375 ngd->base = ctrl->base + ngd->id * data->offset +
1376 (ngd->id - 1) * data->size;
1384 static int qcom_slim_ngd_probe(struct platform_device *pdev)
1386 struct device *dev = &pdev->dev;
1387 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev->parent);
1390 ctrl->ctrl.dev = dev;
1392 platform_set_drvdata(pdev, ctrl);
1393 pm_runtime_use_autosuspend(dev);
1394 pm_runtime_set_autosuspend_delay(dev, QCOM_SLIM_NGD_AUTOSUSPEND);
1395 pm_runtime_set_suspended(dev);
1396 pm_runtime_enable(dev);
1397 pm_runtime_get_noresume(dev);
1398 ret = qcom_slim_ngd_qmi_svc_event_init(ctrl);
1400 dev_err(&pdev->dev, "QMI service registration failed:%d", ret);
1404 INIT_WORK(&ctrl->m_work, qcom_slim_ngd_master_worker);
1405 ctrl->mwq = create_singlethread_workqueue("ngd_master");
1407 dev_err(&pdev->dev, "Failed to start master worker\n");
1414 qcom_slim_ngd_qmi_svc_event_deinit(&ctrl->qmi);
1416 destroy_workqueue(ctrl->mwq);
1421 static int qcom_slim_ngd_ctrl_probe(struct platform_device *pdev)
1423 struct device *dev = &pdev->dev;
1424 struct qcom_slim_ngd_ctrl *ctrl;
1425 struct resource *res;
1428 ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
1432 dev_set_drvdata(dev, ctrl);
1434 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1435 ctrl->base = devm_ioremap_resource(dev, res);
1436 if (IS_ERR(ctrl->base))
1437 return PTR_ERR(ctrl->base);
1439 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1441 dev_err(&pdev->dev, "no slimbus IRQ resource\n");
1445 ret = devm_request_irq(dev, res->start, qcom_slim_ngd_interrupt,
1446 IRQF_TRIGGER_HIGH, "slim-ngd", ctrl);
1448 dev_err(&pdev->dev, "request IRQ failed\n");
1453 ctrl->framer.rootfreq = SLIM_ROOT_FREQ >> 3;
1454 ctrl->framer.superfreq =
1455 ctrl->framer.rootfreq / SLIM_CL_PER_SUPERFRAME_DIV8;
1457 ctrl->ctrl.a_framer = &ctrl->framer;
1458 ctrl->ctrl.clkgear = SLIM_MAX_CLK_GEAR;
1459 ctrl->ctrl.get_laddr = qcom_slim_ngd_get_laddr;
1460 ctrl->ctrl.enable_stream = qcom_slim_ngd_enable_stream;
1461 ctrl->ctrl.xfer_msg = qcom_slim_ngd_xfer_msg;
1462 ctrl->ctrl.wakeup = NULL;
1463 ctrl->state = QCOM_SLIM_NGD_CTRL_DOWN;
1465 spin_lock_init(&ctrl->tx_buf_lock);
1466 init_completion(&ctrl->reconf);
1467 init_completion(&ctrl->qmi.qmi_comp);
1469 platform_driver_register(&qcom_slim_ngd_driver);
1470 return of_qcom_slim_ngd_register(dev, ctrl);
1473 static int qcom_slim_ngd_ctrl_remove(struct platform_device *pdev)
1475 platform_driver_unregister(&qcom_slim_ngd_driver);
1480 static int qcom_slim_ngd_remove(struct platform_device *pdev)
1482 struct qcom_slim_ngd_ctrl *ctrl = platform_get_drvdata(pdev);
1484 pm_runtime_disable(&pdev->dev);
1485 qcom_slim_ngd_enable(ctrl, false);
1486 qcom_slim_ngd_exit_dma(ctrl);
1487 qcom_slim_ngd_qmi_svc_event_deinit(&ctrl->qmi);
1489 destroy_workqueue(ctrl->mwq);
1496 static int __maybe_unused qcom_slim_ngd_runtime_idle(struct device *dev)
1498 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);
1500 if (ctrl->state == QCOM_SLIM_NGD_CTRL_AWAKE)
1501 ctrl->state = QCOM_SLIM_NGD_CTRL_IDLE;
1502 pm_request_autosuspend(dev);
1506 static int __maybe_unused qcom_slim_ngd_runtime_suspend(struct device *dev)
1508 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);
1511 qcom_slim_ngd_exit_dma(ctrl);
1512 if (!ctrl->qmi.handle)
1515 ret = qcom_slim_qmi_power_request(ctrl, false);
1516 if (ret && ret != -EBUSY)
1517 dev_info(ctrl->dev, "slim resource not idle:%d\n", ret);
1518 if (!ret || ret == -ETIMEDOUT)
1519 ctrl->state = QCOM_SLIM_NGD_CTRL_ASLEEP;
1524 static const struct dev_pm_ops qcom_slim_ngd_dev_pm_ops = {
1525 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1526 pm_runtime_force_resume)
1528 qcom_slim_ngd_runtime_suspend,
1529 qcom_slim_ngd_runtime_resume,
1530 qcom_slim_ngd_runtime_idle
1534 static struct platform_driver qcom_slim_ngd_ctrl_driver = {
1535 .probe = qcom_slim_ngd_ctrl_probe,
1536 .remove = qcom_slim_ngd_ctrl_remove,
1538 .name = "qcom,slim-ngd-ctrl",
1539 .of_match_table = qcom_slim_ngd_dt_match,
1543 static struct platform_driver qcom_slim_ngd_driver = {
1544 .probe = qcom_slim_ngd_probe,
1545 .remove = qcom_slim_ngd_remove,
1547 .name = QCOM_SLIM_NGD_DRV_NAME,
1548 .pm = &qcom_slim_ngd_dev_pm_ops,
1552 module_platform_driver(qcom_slim_ngd_ctrl_driver);
1553 MODULE_LICENSE("GPL v2");
1554 MODULE_DESCRIPTION("Qualcomm SLIMBus NGD controller");