1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 MediaTek Inc.
5 * Stanley Chu <stanley.chu@mediatek.com>
6 * Peter Wang <peter.wang@mediatek.com>
10 #include <linux/of_address.h>
11 #include <linux/phy/phy.h>
12 #include <linux/platform_device.h>
15 #include "ufshcd-pltfrm.h"
16 #include "ufs_quirks.h"
18 #include "ufs-mediatek.h"
20 static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable)
26 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);
28 (1 << RX_SYMBOL_CLK_GATE_EN) |
29 (1 << SYS_CLK_GATE_EN) |
30 (1 << TX_CLK_GATE_EN);
32 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);
35 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp);
36 tmp = tmp & ~(1 << TX_SYMBOL_CLK_REQ_FORCE);
38 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp);
41 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);
42 tmp = tmp & ~((1 << RX_SYMBOL_CLK_GATE_EN) |
43 (1 << SYS_CLK_GATE_EN) |
44 (1 << TX_CLK_GATE_EN));
46 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);
49 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp);
50 tmp = tmp | (1 << TX_SYMBOL_CLK_REQ_FORCE);
52 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp);
56 static int ufs_mtk_bind_mphy(struct ufs_hba *hba)
58 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
59 struct device *dev = hba->dev;
60 struct device_node *np = dev->of_node;
63 host->mphy = devm_of_phy_get_by_index(dev, np, 0);
65 if (host->mphy == ERR_PTR(-EPROBE_DEFER)) {
67 * UFS driver might be probed before the phy driver does.
68 * In that case we would like to return EPROBE_DEFER code.
72 "%s: required phy hasn't probed yet. err = %d\n",
74 } else if (IS_ERR(host->mphy)) {
75 err = PTR_ERR(host->mphy);
76 dev_info(dev, "%s: PHY get failed %d\n", __func__, err);
86 * ufs_mtk_setup_clocks - enables/disable clocks
87 * @hba: host controller instance
88 * @on: If true, enable clocks else disable them.
89 * @status: PRE_CHANGE or POST_CHANGE notify
91 * Returns 0 on success, non-zero on failure.
93 static int ufs_mtk_setup_clocks(struct ufs_hba *hba, bool on,
94 enum ufs_notify_change_status status)
96 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
100 * In case ufs_mtk_init() is not yet done, simply ignore.
101 * This ufs_mtk_setup_clocks() shall be called from
102 * ufs_mtk_init() after init is done.
110 ret = phy_power_off(host->mphy);
114 ret = phy_power_on(host->mphy);
122 * ufs_mtk_init - find other essential mmio bases
123 * @hba: host controller instance
125 * Binds PHY with controller and powers up PHY enabling clocks
128 * Returns -EPROBE_DEFER if binding fails, returns negative error
129 * on phy power up failure and returns zero on success.
131 static int ufs_mtk_init(struct ufs_hba *hba)
133 struct ufs_mtk_host *host;
134 struct device *dev = hba->dev;
137 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
140 dev_info(dev, "%s: no memory for mtk ufs host\n", __func__);
145 ufshcd_set_variant(hba, host);
147 err = ufs_mtk_bind_mphy(hba);
149 goto out_variant_clear;
152 * ufshcd_vops_init() is invoked after
153 * ufshcd_setup_clock(true) in ufshcd_hba_init() thus
154 * phy clock setup is skipped.
156 * Enable phy clocks specifically here.
158 ufs_mtk_setup_clocks(hba, true, POST_CHANGE);
163 ufshcd_set_variant(hba, NULL);
168 static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
169 struct ufs_pa_layer_attr *dev_max_params,
170 struct ufs_pa_layer_attr *dev_req_params)
172 struct ufs_dev_params host_cap;
175 host_cap.tx_lanes = UFS_MTK_LIMIT_NUM_LANES_TX;
176 host_cap.rx_lanes = UFS_MTK_LIMIT_NUM_LANES_RX;
177 host_cap.hs_rx_gear = UFS_MTK_LIMIT_HSGEAR_RX;
178 host_cap.hs_tx_gear = UFS_MTK_LIMIT_HSGEAR_TX;
179 host_cap.pwm_rx_gear = UFS_MTK_LIMIT_PWMGEAR_RX;
180 host_cap.pwm_tx_gear = UFS_MTK_LIMIT_PWMGEAR_TX;
181 host_cap.rx_pwr_pwm = UFS_MTK_LIMIT_RX_PWR_PWM;
182 host_cap.tx_pwr_pwm = UFS_MTK_LIMIT_TX_PWR_PWM;
183 host_cap.rx_pwr_hs = UFS_MTK_LIMIT_RX_PWR_HS;
184 host_cap.tx_pwr_hs = UFS_MTK_LIMIT_TX_PWR_HS;
185 host_cap.hs_rate = UFS_MTK_LIMIT_HS_RATE;
186 host_cap.desired_working_mode =
187 UFS_MTK_LIMIT_DESIRED_MODE;
189 ret = ufshcd_get_pwr_dev_param(&host_cap,
193 pr_info("%s: failed to determine capabilities\n",
200 static int ufs_mtk_pwr_change_notify(struct ufs_hba *hba,
201 enum ufs_notify_change_status stage,
202 struct ufs_pa_layer_attr *dev_max_params,
203 struct ufs_pa_layer_attr *dev_req_params)
209 ret = ufs_mtk_pre_pwr_change(hba, dev_max_params,
222 static int ufs_mtk_pre_link(struct ufs_hba *hba)
227 /* disable deep stall */
228 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);
234 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);
239 static int ufs_mtk_post_link(struct ufs_hba *hba)
241 /* disable device LCC */
242 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
244 /* enable unipro clock gating feature */
245 ufs_mtk_cfg_unipro_cg(hba, true);
250 static int ufs_mtk_link_startup_notify(struct ufs_hba *hba,
251 enum ufs_notify_change_status stage)
257 ret = ufs_mtk_pre_link(hba);
260 ret = ufs_mtk_post_link(hba);
270 static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
272 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
274 if (ufshcd_is_link_hibern8(hba))
275 phy_power_off(host->mphy);
280 static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
282 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
284 if (ufshcd_is_link_hibern8(hba))
285 phy_power_on(host->mphy);
290 static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba,
291 struct ufs_dev_desc *card)
293 if (card->wmanufacturerid == UFS_VENDOR_SAMSUNG)
294 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6);
300 * struct ufs_hba_mtk_vops - UFS MTK specific variant operations
302 * The variant operations configure the necessary controller and PHY
303 * handshake during initialization.
305 static struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
306 .name = "mediatek.ufshci",
307 .init = ufs_mtk_init,
308 .setup_clocks = ufs_mtk_setup_clocks,
309 .link_startup_notify = ufs_mtk_link_startup_notify,
310 .pwr_change_notify = ufs_mtk_pwr_change_notify,
311 .apply_dev_quirks = ufs_mtk_apply_dev_quirks,
312 .suspend = ufs_mtk_suspend,
313 .resume = ufs_mtk_resume,
317 * ufs_mtk_probe - probe routine of the driver
318 * @pdev: pointer to Platform device handle
320 * Return zero for success and non-zero for failure
322 static int ufs_mtk_probe(struct platform_device *pdev)
325 struct device *dev = &pdev->dev;
327 /* perform generic probe */
328 err = ufshcd_pltfrm_init(pdev, &ufs_hba_mtk_vops);
330 dev_info(dev, "probe failed %d\n", err);
336 * ufs_mtk_remove - set driver_data of the device to NULL
337 * @pdev: pointer to platform device handle
341 static int ufs_mtk_remove(struct platform_device *pdev)
343 struct ufs_hba *hba = platform_get_drvdata(pdev);
345 pm_runtime_get_sync(&(pdev)->dev);
350 static const struct of_device_id ufs_mtk_of_match[] = {
351 { .compatible = "mediatek,mt8183-ufshci"},
355 static const struct dev_pm_ops ufs_mtk_pm_ops = {
356 .suspend = ufshcd_pltfrm_suspend,
357 .resume = ufshcd_pltfrm_resume,
358 .runtime_suspend = ufshcd_pltfrm_runtime_suspend,
359 .runtime_resume = ufshcd_pltfrm_runtime_resume,
360 .runtime_idle = ufshcd_pltfrm_runtime_idle,
363 static struct platform_driver ufs_mtk_pltform = {
364 .probe = ufs_mtk_probe,
365 .remove = ufs_mtk_remove,
366 .shutdown = ufshcd_pltfrm_shutdown,
368 .name = "ufshcd-mtk",
369 .pm = &ufs_mtk_pm_ops,
370 .of_match_table = ufs_mtk_of_match,
374 MODULE_AUTHOR("Stanley Chu <stanley.chu@mediatek.com>");
375 MODULE_AUTHOR("Peter Wang <peter.wang@mediatek.com>");
376 MODULE_DESCRIPTION("MediaTek UFS Host Driver");
377 MODULE_LICENSE("GPL v2");
379 module_platform_driver(ufs_mtk_pltform);