drivers/scsi/qla4xxx/ql4_mbx.c

   1 /*
   2  * QLogic iSCSI HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla4xxx for copyright and licensing details.
   6  */
   7
   8 #include <linux/ctype.h>
   9 #include "ql4_def.h"
  10 #include "ql4_glbl.h"
  11 #include "ql4_dbg.h"
  12 #include "ql4_inline.h"
  13 #include "ql4_version.h"
  14
  15 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd,
  16                             int in_count)
  17 {
  18         int i;
  19
  20         /* Load all mailbox registers, except mailbox 0. */
  21         for (i = 1; i < in_count; i++)
  22                 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
  23
  24         /* Wakeup firmware  */
  25         writel(mbx_cmd[0], &ha->reg->mailbox[0]);
  26         readl(&ha->reg->mailbox[0]);
  27         writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
  28         readl(&ha->reg->ctrl_status);
  29 }
  30
  31 void qla4xxx_process_mbox_intr(struct scsi_qla_host *ha, int out_count)
  32 {
  33         int intr_status;
  34
  35         intr_status = readl(&ha->reg->ctrl_status);
  36         if (intr_status & INTR_PENDING) {
  37                 /*
  38                  * Service the interrupt.
  39                  * The ISR will save the mailbox status registers
  40                  * to a temporary storage location in the adapter structure.
  41                  */
  42                 ha->mbox_status_count = out_count;
  43                 ha->isp_ops->interrupt_service_routine(ha, intr_status);
  44         }
  45 }
  46
  47 /**
  48  * qla4xxx_is_intr_poll_mode – Are we allowed to poll for interrupts?
  49  * @ha: Pointer to host adapter structure.
  50  * @ret: 1=polling mode, 0=non-polling mode
  51  **/
  52 static int qla4xxx_is_intr_poll_mode(struct scsi_qla_host *ha)
  53 {
  54         int rval = 1;
  55
  56         if (is_qla8032(ha) || is_qla8042(ha)) {
  57                 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
  58                     test_bit(AF_83XX_MBOX_INTR_ON, &ha->flags))
  59                         rval = 0;
  60         } else {
  61                 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
  62                     test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
  63                     test_bit(AF_ONLINE, &ha->flags) &&
  64                     !test_bit(AF_HA_REMOVAL, &ha->flags))
  65                         rval = 0;
  66         }
  67
  68         return rval;
  69 }
  70
  71 /**
  72  * qla4xxx_mailbox_command - issues mailbox commands
  73  * @ha: Pointer to host adapter structure.
  74  * @inCount: number of mailbox registers to load.
  75  * @outCount: number of mailbox registers to return.
  76  * @mbx_cmd: data pointer for mailbox in registers.
  77  * @mbx_sts: data pointer for mailbox out registers.
  78  *
  79  * This routine issue mailbox commands and waits for completion.
  80  * If outCount is 0, this routine completes successfully WITHOUT waiting
  81  * for the mailbox command to complete.
  82  **/
  83 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
  84                             uint8_t outCount, uint32_t *mbx_cmd,
  85                             uint32_t *mbx_sts)
  86 {
  87         int status = QLA_ERROR;
  88         uint8_t i;
  89         u_long wait_count;
  90         unsigned long flags = 0;
  91         uint32_t dev_state;
  92
  93         /* Make sure that pointers are valid */
  94         if (!mbx_cmd || !mbx_sts) {
  95                 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
  96                               "pointer\n", ha->host_no, __func__));
  97                 return status;
  98         }
  99
 100         if (is_qla40XX(ha)) {
 101                 if (test_bit(AF_HA_REMOVAL, &ha->flags)) {
 102                         DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
 103                                           "prematurely completing mbx cmd as "
 104                                           "adapter removal detected\n",
 105                                           ha->host_no, __func__));
 106                         return status;
 107                 }
 108         }
 109
 110         if ((is_aer_supported(ha)) &&
 111             (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
 112                 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
 113                     "timeout MBX Exiting.\n", ha->host_no, __func__));
 114                 return status;
 115         }
 116
 117         /* Mailbox code active */
 118         wait_count = MBOX_TOV * 100;
 119
 120         while (wait_count--) {
 121                 mutex_lock(&ha->mbox_sem);
 122                 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
 123                         set_bit(AF_MBOX_COMMAND, &ha->flags);
 124                         mutex_unlock(&ha->mbox_sem);
 125                         break;
 126                 }
 127                 mutex_unlock(&ha->mbox_sem);
 128                 if (!wait_count) {
 129                         DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
 130                                 ha->host_no, __func__));
 131                         return status;
 132                 }
 133                 msleep(10);
 134         }
 135
 136         if (is_qla80XX(ha)) {
 137                 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
 138                         DEBUG2(ql4_printk(KERN_WARNING, ha,
 139                                           "scsi%ld: %s: prematurely completing mbx cmd as firmware recovery detected\n",
 140                                           ha->host_no, __func__));
 141                         goto mbox_exit;
 142                 }
 143                 /* Do not send any mbx cmd if h/w is in failed state*/
 144                 ha->isp_ops->idc_lock(ha);
 145                 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE);
 146                 ha->isp_ops->idc_unlock(ha);
 147                 if (dev_state == QLA8XXX_DEV_FAILED) {
 148                         ql4_printk(KERN_WARNING, ha,
 149                                    "scsi%ld: %s: H/W is in failed state, do not send any mailbox commands\n",
 150                                    ha->host_no, __func__);
 151                         goto mbox_exit;
 152                 }
 153         }
 154
 155         spin_lock_irqsave(&ha->hardware_lock, flags);
 156
 157         ha->mbox_status_count = outCount;
 158         for (i = 0; i < outCount; i++)
 159                 ha->mbox_status[i] = 0;
 160
 161         /* Queue the mailbox command to the firmware */
 162         ha->isp_ops->queue_mailbox_command(ha, mbx_cmd, inCount);
 163
 164         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 165
 166         /* Wait for completion */
 167
 168         /*
 169          * If we don't want status, don't wait for the mailbox command to
 170          * complete.  For example, MBOX_CMD_RESET_FW doesn't return status,
 171          * you must poll the inbound Interrupt Mask for completion.
 172          */
 173         if (outCount == 0) {
 174                 status = QLA_SUCCESS;
 175                 goto mbox_exit;
 176         }
 177
 178         /*
 179          * Wait for completion: Poll or completion queue
 180          */
 181         if (qla4xxx_is_intr_poll_mode(ha)) {
 182                 /* Poll for command to complete */
 183                 wait_count = jiffies + MBOX_TOV * HZ;
 184                 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
 185                         if (time_after_eq(jiffies, wait_count))
 186                                 break;
 187                         /*
 188                          * Service the interrupt.
 189                          * The ISR will save the mailbox status registers
 190                          * to a temporary storage location in the adapter
 191                          * structure.
 192                          */
 193                         spin_lock_irqsave(&ha->hardware_lock, flags);
 194                         ha->isp_ops->process_mailbox_interrupt(ha, outCount);
 195                         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 196                         msleep(10);
 197                 }
 198         } else {
 199                 /* Do not poll for completion. Use completion queue */
 200                 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
 201                 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
 202                 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
 203         }
 204
 205         /* Check for mailbox timeout. */
 206         if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
 207                 if (is_qla80XX(ha) &&
 208                     test_bit(AF_FW_RECOVERY, &ha->flags)) {
 209                         DEBUG2(ql4_printk(KERN_INFO, ha,
 210                             "scsi%ld: %s: prematurely completing mbx cmd as "
 211                             "firmware recovery detected\n",
 212                             ha->host_no, __func__));
 213                         goto mbox_exit;
 214                 }
 215                 ql4_printk(KERN_WARNING, ha, "scsi%ld: Mailbox Cmd 0x%08X timed out, Scheduling Adapter Reset\n",
 216                            ha->host_no, mbx_cmd[0]);
 217                 ha->mailbox_timeout_count++;
 218                 mbx_sts[0] = (-1);
 219                 set_bit(DPC_RESET_HA, &ha->dpc_flags);
 220                 if (is_qla8022(ha)) {
 221                         ql4_printk(KERN_INFO, ha,
 222                                    "disabling pause transmit on port 0 & 1.\n");
 223                         qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,
 224                                         CRB_NIU_XG_PAUSE_CTL_P0 |
 225                                         CRB_NIU_XG_PAUSE_CTL_P1);
 226                 } else if (is_qla8032(ha) || is_qla8042(ha)) {
 227                         ql4_printk(KERN_INFO, ha, " %s: disabling pause transmit on port 0 & 1.\n",
 228                                    __func__);
 229                         qla4_83xx_disable_pause(ha);
 230                 }
 231                 goto mbox_exit;
 232         }
 233
 234         /*
 235          * Copy the mailbox out registers to the caller's mailbox in/out
 236          * structure.
 237          */
 238         spin_lock_irqsave(&ha->hardware_lock, flags);
 239         for (i = 0; i < outCount; i++)
 240                 mbx_sts[i] = ha->mbox_status[i];
 241
 242         /* Set return status and error flags (if applicable). */
 243         switch (ha->mbox_status[0]) {
 244         case MBOX_STS_COMMAND_COMPLETE:
 245                 status = QLA_SUCCESS;
 246                 break;
 247
 248         case MBOX_STS_INTERMEDIATE_COMPLETION:
 249                 status = QLA_SUCCESS;
 250                 break;
 251
 252         case MBOX_STS_BUSY:
 253                 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
 254                            ha->host_no, __func__, mbx_cmd[0]);
 255                 ha->mailbox_timeout_count++;
 256                 break;
 257
 258         default:
 259                 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: FAILED, MBOX CMD = %08X, MBOX STS = %08X %08X %08X %08X %08X %08X %08X %08X\n",
 260                            ha->host_no, __func__, mbx_cmd[0], mbx_sts[0],
 261                            mbx_sts[1], mbx_sts[2], mbx_sts[3], mbx_sts[4],
 262                            mbx_sts[5], mbx_sts[6], mbx_sts[7]);
 263                 break;
 264         }
 265         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 266
 267 mbox_exit:
 268         mutex_lock(&ha->mbox_sem);
 269         clear_bit(AF_MBOX_COMMAND, &ha->flags);
 270         mutex_unlock(&ha->mbox_sem);
 271         clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
 272
 273         return status;
 274 }
 275
 276 /**
 277  * qla4xxx_get_minidump_template - Get the firmware template
 278  * @ha: Pointer to host adapter structure.
 279  * @phys_addr: dma address for template
 280  *
 281  * Obtain the minidump template from firmware during initialization
 282  * as it may not be available when minidump is desired.
 283  **/
 284 int qla4xxx_get_minidump_template(struct scsi_qla_host *ha,
 285                                   dma_addr_t phys_addr)
 286 {
 287         uint32_t mbox_cmd[MBOX_REG_COUNT];
 288         uint32_t mbox_sts[MBOX_REG_COUNT];
 289         int status;
 290
 291         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 292         memset(&mbox_sts, 0, sizeof(mbox_sts));
 293
 294         mbox_cmd[0] = MBOX_CMD_MINIDUMP;
 295         mbox_cmd[1] = MINIDUMP_GET_TMPLT_SUBCOMMAND;
 296         mbox_cmd[2] = LSDW(phys_addr);
 297         mbox_cmd[3] = MSDW(phys_addr);
 298         mbox_cmd[4] = ha->fw_dump_tmplt_size;
 299         mbox_cmd[5] = 0;
 300
 301         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
 302                                          &mbox_sts[0]);
 303         if (status != QLA_SUCCESS) {
 304                 DEBUG2(ql4_printk(KERN_INFO, ha,
 305                                   "scsi%ld: %s: Cmd = %08X, mbx[0] = 0x%04x, mbx[1] = 0x%04x\n",
 306                                   ha->host_no, __func__, mbox_cmd[0],
 307                                   mbox_sts[0], mbox_sts[1]));
 308         }
 309         return status;
 310 }
 311
 312 /**
 313  * qla4xxx_req_template_size - Get minidump template size from firmware.
 314  * @ha: Pointer to host adapter structure.
 315  **/
 316 int qla4xxx_req_template_size(struct scsi_qla_host *ha)
 317 {
 318         uint32_t mbox_cmd[MBOX_REG_COUNT];
 319         uint32_t mbox_sts[MBOX_REG_COUNT];
 320         int status;
 321
 322         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 323         memset(&mbox_sts, 0, sizeof(mbox_sts));
 324
 325         mbox_cmd[0] = MBOX_CMD_MINIDUMP;
 326         mbox_cmd[1] = MINIDUMP_GET_SIZE_SUBCOMMAND;
 327
 328         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0],
 329                                          &mbox_sts[0]);
 330         if (status == QLA_SUCCESS) {
 331                 ha->fw_dump_tmplt_size = mbox_sts[1];
 332                 DEBUG2(ql4_printk(KERN_INFO, ha,
 333                                   "%s: sts[0]=0x%04x, template  size=0x%04x, size_cm_02=0x%04x, size_cm_04=0x%04x, size_cm_08=0x%04x, size_cm_10=0x%04x, size_cm_FF=0x%04x, version=0x%04x\n",
 334                                   __func__, mbox_sts[0], mbox_sts[1],
 335                                   mbox_sts[2], mbox_sts[3], mbox_sts[4],
 336                                   mbox_sts[5], mbox_sts[6], mbox_sts[7]));
 337                 if (ha->fw_dump_tmplt_size == 0)
 338                         status = QLA_ERROR;
 339         } else {
 340                 ql4_printk(KERN_WARNING, ha,
 341                            "%s: Error sts[0]=0x%04x, mbx[1]=0x%04x\n",
 342                            __func__, mbox_sts[0], mbox_sts[1]);
 343                 status = QLA_ERROR;
 344         }
 345
 346         return status;
 347 }
 348
 349 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
 350 {
 351         set_bit(AF_FW_RECOVERY, &ha->flags);
 352         ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
 353             ha->host_no, __func__);
 354
 355         if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
 356                 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
 357                         complete(&ha->mbx_intr_comp);
 358                         ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
 359                             "recovery, doing premature completion of "
 360                             "mbx cmd\n", ha->host_no, __func__);
 361
 362                 } else {
 363                         set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
 364                         ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
 365                             "recovery, doing premature completion of "
 366                             "polling mbx cmd\n", ha->host_no, __func__);
 367                 }
 368         }
 369 }
 370
 371 static uint8_t
 372 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
 373                  uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
 374 {
 375         memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
 376         memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
 377
 378         if (is_qla8022(ha))
 379                 qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, 0);
 380
 381         mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
 382         mbox_cmd[1] = 0;
 383         mbox_cmd[2] = LSDW(init_fw_cb_dma);
 384         mbox_cmd[3] = MSDW(init_fw_cb_dma);
 385         mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
 386
 387         if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
 388             QLA_SUCCESS) {
 389                 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
 390                               "MBOX_CMD_INITIALIZE_FIRMWARE"
 391                               " failed w/ status %04X\n",
 392                               ha->host_no, __func__, mbox_sts[0]));
 393                 return QLA_ERROR;
 394         }
 395         return QLA_SUCCESS;
 396 }
 397
 398 uint8_t
 399 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
 400                  uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
 401 {
 402         memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
 403         memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
 404         mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
 405         mbox_cmd[2] = LSDW(init_fw_cb_dma);
 406         mbox_cmd[3] = MSDW(init_fw_cb_dma);
 407         mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
 408
 409         if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
 410             QLA_SUCCESS) {
 411                 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
 412                               "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
 413                               " failed w/ status %04X\n",
 414                               ha->host_no, __func__, mbox_sts[0]));
 415                 return QLA_ERROR;
 416         }
 417         return QLA_SUCCESS;
 418 }
 419
 420 uint8_t qla4xxx_set_ipaddr_state(uint8_t fw_ipaddr_state)
 421 {
 422         uint8_t ipaddr_state;
 423
 424         switch (fw_ipaddr_state) {
 425         case IP_ADDRSTATE_UNCONFIGURED:
 426                 ipaddr_state = ISCSI_IPDDRESS_STATE_UNCONFIGURED;
 427                 break;
 428         case IP_ADDRSTATE_INVALID:
 429                 ipaddr_state = ISCSI_IPDDRESS_STATE_INVALID;
 430                 break;
 431         case IP_ADDRSTATE_ACQUIRING:
 432                 ipaddr_state = ISCSI_IPDDRESS_STATE_ACQUIRING;
 433                 break;
 434         case IP_ADDRSTATE_TENTATIVE:
 435                 ipaddr_state = ISCSI_IPDDRESS_STATE_TENTATIVE;
 436                 break;
 437         case IP_ADDRSTATE_DEPRICATED:
 438                 ipaddr_state = ISCSI_IPDDRESS_STATE_DEPRECATED;
 439                 break;
 440         case IP_ADDRSTATE_PREFERRED:
 441                 ipaddr_state = ISCSI_IPDDRESS_STATE_VALID;
 442                 break;
 443         case IP_ADDRSTATE_DISABLING:
 444                 ipaddr_state = ISCSI_IPDDRESS_STATE_DISABLING;
 445                 break;
 446         default:
 447                 ipaddr_state = ISCSI_IPDDRESS_STATE_UNCONFIGURED;
 448         }
 449         return ipaddr_state;
 450 }
 451
 452 static void
 453 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
 454                         struct addr_ctrl_blk *init_fw_cb)
 455 {
 456         ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
 457         ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
 458         ha->ip_config.ipv4_addr_state =
 459                         qla4xxx_set_ipaddr_state(init_fw_cb->ipv4_addr_state);
 460         ha->ip_config.eth_mtu_size =
 461                                 le16_to_cpu(init_fw_cb->eth_mtu_size);
 462         ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port);
 463
 464         if (ha->acb_version == ACB_SUPPORTED) {
 465                 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts);
 466                 ha->ip_config.ipv6_addl_options =
 467                                 le16_to_cpu(init_fw_cb->ipv6_addtl_opts);
 468                 ha->ip_config.ipv6_tcp_options =
 469                                 le16_to_cpu(init_fw_cb->ipv6_tcp_opts);
 470         }
 471
 472         /* Save IPv4 Address Info */
 473         memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr,
 474                min(sizeof(ha->ip_config.ip_address),
 475                    sizeof(init_fw_cb->ipv4_addr)));
 476         memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet,
 477                min(sizeof(ha->ip_config.subnet_mask),
 478                    sizeof(init_fw_cb->ipv4_subnet)));
 479         memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr,
 480                min(sizeof(ha->ip_config.gateway),
 481                    sizeof(init_fw_cb->ipv4_gw_addr)));
 482
 483         ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag);
 484         ha->ip_config.control = init_fw_cb->control;
 485         ha->ip_config.tcp_wsf = init_fw_cb->ipv4_tcp_wsf;
 486         ha->ip_config.ipv4_tos = init_fw_cb->ipv4_tos;
 487         ha->ip_config.ipv4_cache_id = init_fw_cb->ipv4_cacheid;
 488         ha->ip_config.ipv4_alt_cid_len = init_fw_cb->ipv4_dhcp_alt_cid_len;
 489         memcpy(ha->ip_config.ipv4_alt_cid, init_fw_cb->ipv4_dhcp_alt_cid,
 490                min(sizeof(ha->ip_config.ipv4_alt_cid),
 491                    sizeof(init_fw_cb->ipv4_dhcp_alt_cid)));
 492         ha->ip_config.ipv4_vid_len = init_fw_cb->ipv4_dhcp_vid_len;
 493         memcpy(ha->ip_config.ipv4_vid, init_fw_cb->ipv4_dhcp_vid,
 494                min(sizeof(ha->ip_config.ipv4_vid),
 495                    sizeof(init_fw_cb->ipv4_dhcp_vid)));
 496         ha->ip_config.ipv4_ttl = init_fw_cb->ipv4_ttl;
 497         ha->ip_config.def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
 498         ha->ip_config.abort_timer = init_fw_cb->abort_timer;
 499         ha->ip_config.iscsi_options = le16_to_cpu(init_fw_cb->iscsi_opts);
 500         ha->ip_config.iscsi_max_pdu_size =
 501                                 le16_to_cpu(init_fw_cb->iscsi_max_pdu_size);
 502         ha->ip_config.iscsi_first_burst_len =
 503                                 le16_to_cpu(init_fw_cb->iscsi_fburst_len);
 504         ha->ip_config.iscsi_max_outstnd_r2t =
 505                                 le16_to_cpu(init_fw_cb->iscsi_max_outstnd_r2t);
 506         ha->ip_config.iscsi_max_burst_len =
 507                                 le16_to_cpu(init_fw_cb->iscsi_max_burst_len);
 508         memcpy(ha->ip_config.iscsi_name, init_fw_cb->iscsi_name,
 509                min(sizeof(ha->ip_config.iscsi_name),
 510                    sizeof(init_fw_cb->iscsi_name)));
 511
 512         if (is_ipv6_enabled(ha)) {
 513                 /* Save IPv6 Address */
 514                 ha->ip_config.ipv6_link_local_state =
 515                   qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_lnk_lcl_addr_state);
 516                 ha->ip_config.ipv6_addr0_state =
 517                         qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_addr0_state);
 518                 ha->ip_config.ipv6_addr1_state =
 519                         qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_addr1_state);
 520
 521                 switch (le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state)) {
 522                 case IPV6_RTRSTATE_UNKNOWN:
 523                         ha->ip_config.ipv6_default_router_state =
 524                                                 ISCSI_ROUTER_STATE_UNKNOWN;
 525                         break;
 526                 case IPV6_RTRSTATE_MANUAL:
 527                         ha->ip_config.ipv6_default_router_state =
 528                                                 ISCSI_ROUTER_STATE_MANUAL;
 529                         break;
 530                 case IPV6_RTRSTATE_ADVERTISED:
 531                         ha->ip_config.ipv6_default_router_state =
 532                                                 ISCSI_ROUTER_STATE_ADVERTISED;
 533                         break;
 534                 case IPV6_RTRSTATE_STALE:
 535                         ha->ip_config.ipv6_default_router_state =
 536                                                 ISCSI_ROUTER_STATE_STALE;
 537                         break;
 538                 default:
 539                         ha->ip_config.ipv6_default_router_state =
 540                                                 ISCSI_ROUTER_STATE_UNKNOWN;
 541                 }
 542
 543                 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
 544                 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
 545
 546                 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8],
 547                        init_fw_cb->ipv6_if_id,
 548                        min(sizeof(ha->ip_config.ipv6_link_local_addr)/2,
 549                            sizeof(init_fw_cb->ipv6_if_id)));
 550                 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0,
 551                        min(sizeof(ha->ip_config.ipv6_addr0),
 552                            sizeof(init_fw_cb->ipv6_addr0)));
 553                 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1,
 554                        min(sizeof(ha->ip_config.ipv6_addr1),
 555                            sizeof(init_fw_cb->ipv6_addr1)));
 556                 memcpy(&ha->ip_config.ipv6_default_router_addr,
 557                        init_fw_cb->ipv6_dflt_rtr_addr,
 558                        min(sizeof(ha->ip_config.ipv6_default_router_addr),
 559                            sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
 560                 ha->ip_config.ipv6_vlan_tag =
 561                                 be16_to_cpu(init_fw_cb->ipv6_vlan_tag);
 562                 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port);
 563                 ha->ip_config.ipv6_cache_id = init_fw_cb->ipv6_cache_id;
 564                 ha->ip_config.ipv6_flow_lbl =
 565                                 le16_to_cpu(init_fw_cb->ipv6_flow_lbl);
 566                 ha->ip_config.ipv6_traffic_class =
 567                                 init_fw_cb->ipv6_traffic_class;
 568                 ha->ip_config.ipv6_hop_limit = init_fw_cb->ipv6_hop_limit;
 569                 ha->ip_config.ipv6_nd_reach_time =
 570                                 le32_to_cpu(init_fw_cb->ipv6_nd_reach_time);
 571                 ha->ip_config.ipv6_nd_rexmit_timer =
 572                                 le32_to_cpu(init_fw_cb->ipv6_nd_rexmit_timer);
 573                 ha->ip_config.ipv6_nd_stale_timeout =
 574                                 le32_to_cpu(init_fw_cb->ipv6_nd_stale_timeout);
 575                 ha->ip_config.ipv6_dup_addr_detect_count =
 576                                         init_fw_cb->ipv6_dup_addr_detect_count;
 577                 ha->ip_config.ipv6_gw_advrt_mtu =
 578                                 le32_to_cpu(init_fw_cb->ipv6_gw_advrt_mtu);
 579                 ha->ip_config.ipv6_tcp_wsf = init_fw_cb->ipv6_tcp_wsf;
 580         }
 581 }
 582
 583 uint8_t
 584 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
 585                           uint32_t *mbox_cmd,
 586                           uint32_t *mbox_sts,
 587                           struct addr_ctrl_blk  *init_fw_cb,
 588                           dma_addr_t init_fw_cb_dma)
 589 {
 590         if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
 591             != QLA_SUCCESS) {
 592                 DEBUG2(printk(KERN_WARNING
 593                               "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
 594                               ha->host_no, __func__));
 595                 return QLA_ERROR;
 596         }
 597
 598         DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
 599
 600         /* Save some info in adapter structure. */
 601         ha->acb_version = init_fw_cb->acb_version;
 602         ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
 603         ha->heartbeat_interval = init_fw_cb->hb_interval;
 604         memcpy(ha->name_string, init_fw_cb->iscsi_name,
 605                 min(sizeof(ha->name_string),
 606                 sizeof(init_fw_cb->iscsi_name)));
 607         ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
 608         /*memcpy(ha->alias, init_fw_cb->Alias,
 609                min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
 610
 611         qla4xxx_update_local_ip(ha, init_fw_cb);
 612
 613         return QLA_SUCCESS;
 614 }
 615
 616 /**
 617  * qla4xxx_initialize_fw_cb - initializes firmware control block.
 618  * @ha: Pointer to host adapter structure.
 619  **/
 620 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
 621 {
 622         struct addr_ctrl_blk *init_fw_cb;
 623         dma_addr_t init_fw_cb_dma;
 624         uint32_t mbox_cmd[MBOX_REG_COUNT];
 625         uint32_t mbox_sts[MBOX_REG_COUNT];
 626         int status = QLA_ERROR;
 627
 628         init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
 629                                         sizeof(struct addr_ctrl_blk),
 630                                         &init_fw_cb_dma, GFP_KERNEL);
 631         if (init_fw_cb == NULL) {
 632                 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
 633                               ha->host_no, __func__));
 634                 goto exit_init_fw_cb_no_free;
 635         }
 636         memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
 637
 638         /* Get Initialize Firmware Control Block. */
 639         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 640         memset(&mbox_sts, 0, sizeof(mbox_sts));
 641
 642         if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
 643             QLA_SUCCESS) {
 644                 goto exit_init_fw_cb;
 645         }
 646
 647         /* Fill in the request and response queue information. */
 648         init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
 649         init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
 650         init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
 651         init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
 652         init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
 653         init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
 654         init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
 655         init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
 656         init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
 657         init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
 658
 659         /* Set up required options. */
 660         init_fw_cb->fw_options |=
 661                 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
 662                                        FWOPT_INITIATOR_MODE);
 663
 664         if (is_qla80XX(ha))
 665                 init_fw_cb->fw_options |=
 666                     __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
 667
 668         init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
 669
 670         init_fw_cb->add_fw_options = 0;
 671         init_fw_cb->add_fw_options |=
 672                         __constant_cpu_to_le16(ADFWOPT_SERIALIZE_TASK_MGMT);
 673         init_fw_cb->add_fw_options |=
 674                         __constant_cpu_to_le16(ADFWOPT_AUTOCONN_DISABLE);
 675
 676         if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
 677                 != QLA_SUCCESS) {
 678                 DEBUG2(printk(KERN_WARNING
 679                               "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
 680                               ha->host_no, __func__));
 681                 goto exit_init_fw_cb;
 682         }
 683
 684         if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
 685                 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
 686                 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
 687                                 ha->host_no, __func__));
 688                 goto exit_init_fw_cb;
 689         }
 690         status = QLA_SUCCESS;
 691
 692 exit_init_fw_cb:
 693         dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
 694                                 init_fw_cb, init_fw_cb_dma);
 695 exit_init_fw_cb_no_free:
 696         return status;
 697 }
 698
 699 /**
 700  * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
 701  * @ha: Pointer to host adapter structure.
 702  **/
 703 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
 704 {
 705         struct addr_ctrl_blk *init_fw_cb;
 706         dma_addr_t init_fw_cb_dma;
 707         uint32_t mbox_cmd[MBOX_REG_COUNT];
 708         uint32_t mbox_sts[MBOX_REG_COUNT];
 709
 710         init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
 711                                         sizeof(struct addr_ctrl_blk),
 712                                         &init_fw_cb_dma, GFP_KERNEL);
 713         if (init_fw_cb == NULL) {
 714                 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
 715                        __func__);
 716                 return QLA_ERROR;
 717         }
 718
 719         /* Get Initialize Firmware Control Block. */
 720         memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
 721         if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
 722             QLA_SUCCESS) {
 723                 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
 724                               ha->host_no, __func__));
 725                 dma_free_coherent(&ha->pdev->dev,
 726                                   sizeof(struct addr_ctrl_blk),
 727                                   init_fw_cb, init_fw_cb_dma);
 728                 return QLA_ERROR;
 729         }
 730
 731         /* Save IP Address. */
 732         qla4xxx_update_local_ip(ha, init_fw_cb);
 733         dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
 734                                 init_fw_cb, init_fw_cb_dma);
 735
 736         return QLA_SUCCESS;
 737 }
 738
 739 /**
 740  * qla4xxx_get_firmware_state - gets firmware state of HBA
 741  * @ha: Pointer to host adapter structure.
 742  **/
 743 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
 744 {
 745         uint32_t mbox_cmd[MBOX_REG_COUNT];
 746         uint32_t mbox_sts[MBOX_REG_COUNT];
 747
 748         /* Get firmware version */
 749         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 750         memset(&mbox_sts, 0, sizeof(mbox_sts));
 751
 752         mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
 753
 754         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
 755             QLA_SUCCESS) {
 756                 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
 757                               "status %04X\n", ha->host_no, __func__,
 758                               mbox_sts[0]));
 759                 return QLA_ERROR;
 760         }
 761         ha->firmware_state = mbox_sts[1];
 762         ha->board_id = mbox_sts[2];
 763         ha->addl_fw_state = mbox_sts[3];
 764         DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
 765                       ha->host_no, __func__, ha->firmware_state);)
 766
 767         return QLA_SUCCESS;
 768 }
 769
 770 /**
 771  * qla4xxx_get_firmware_status - retrieves firmware status
 772  * @ha: Pointer to host adapter structure.
 773  **/
 774 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
 775 {
 776         uint32_t mbox_cmd[MBOX_REG_COUNT];
 777         uint32_t mbox_sts[MBOX_REG_COUNT];
 778
 779         /* Get firmware version */
 780         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 781         memset(&mbox_sts, 0, sizeof(mbox_sts));
 782
 783         mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
 784
 785         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
 786             QLA_SUCCESS) {
 787                 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
 788                               "status %04X\n", ha->host_no, __func__,
 789                               mbox_sts[0]));
 790                 return QLA_ERROR;
 791         }
 792
 793         /* High-water mark of IOCBs */
 794         ha->iocb_hiwat = mbox_sts[2];
 795         DEBUG2(ql4_printk(KERN_INFO, ha,
 796                           "%s: firmware IOCBs available = %d\n", __func__,
 797                           ha->iocb_hiwat));
 798
 799         if (ha->iocb_hiwat > IOCB_HIWAT_CUSHION)
 800                 ha->iocb_hiwat -= IOCB_HIWAT_CUSHION;
 801
 802         /* Ideally, we should not enter this code, as the # of firmware
 803          * IOCBs is hard-coded in the firmware. We set a default
 804          * iocb_hiwat here just in case */
 805         if (ha->iocb_hiwat == 0) {
 806                 ha->iocb_hiwat = REQUEST_QUEUE_DEPTH / 4;
 807                 DEBUG2(ql4_printk(KERN_WARNING, ha,
 808                                   "%s: Setting IOCB's to = %d\n", __func__,
 809                                   ha->iocb_hiwat));
 810         }
 811
 812         return QLA_SUCCESS;
 813 }
 814
 815 /**
 816  * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
 817  * @ha: Pointer to host adapter structure.
 818  * @fw_ddb_index: Firmware's device database index
 819  * @fw_ddb_entry: Pointer to firmware's device database entry structure
 820  * @num_valid_ddb_entries: Pointer to number of valid ddb entries
 821  * @next_ddb_index: Pointer to next valid device database index
 822  * @fw_ddb_device_state: Pointer to device state
 823  **/
 824 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
 825                             uint16_t fw_ddb_index,
 826                             struct dev_db_entry *fw_ddb_entry,
 827                             dma_addr_t fw_ddb_entry_dma,
 828                             uint32_t *num_valid_ddb_entries,
 829                             uint32_t *next_ddb_index,
 830                             uint32_t *fw_ddb_device_state,
 831                             uint32_t *conn_err_detail,
 832                             uint16_t *tcp_source_port_num,
 833                             uint16_t *connection_id)
 834 {
 835         int status = QLA_ERROR;
 836         uint16_t options;
 837         uint32_t mbox_cmd[MBOX_REG_COUNT];
 838         uint32_t mbox_sts[MBOX_REG_COUNT];
 839
 840         /* Make sure the device index is valid */
 841         if (fw_ddb_index >= MAX_DDB_ENTRIES) {
 842                 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
 843                               ha->host_no, __func__, fw_ddb_index));
 844                 goto exit_get_fwddb;
 845         }
 846         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 847         memset(&mbox_sts, 0, sizeof(mbox_sts));
 848         if (fw_ddb_entry)
 849                 memset(fw_ddb_entry, 0, sizeof(struct dev_db_entry));
 850
 851         mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
 852         mbox_cmd[1] = (uint32_t) fw_ddb_index;
 853         mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
 854         mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
 855         mbox_cmd[4] = sizeof(struct dev_db_entry);
 856
 857         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
 858             QLA_ERROR) {
 859                 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
 860                               " with status 0x%04X\n", ha->host_no, __func__,
 861                               mbox_sts[0]));
 862                 goto exit_get_fwddb;
 863         }
 864         if (fw_ddb_index != mbox_sts[1]) {
 865                 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
 866                               ha->host_no, __func__, fw_ddb_index,
 867                               mbox_sts[1]));
 868                 goto exit_get_fwddb;
 869         }
 870         if (fw_ddb_entry) {
 871                 options = le16_to_cpu(fw_ddb_entry->options);
 872                 if (options & DDB_OPT_IPV6_DEVICE) {
 873                         ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
 874                                 "Next %d State %04x ConnErr %08x %pI6 "
 875                                 ":%04d \"%s\"\n", __func__, fw_ddb_index,
 876                                 mbox_sts[0], mbox_sts[2], mbox_sts[3],
 877                                 mbox_sts[4], mbox_sts[5],
 878                                 fw_ddb_entry->ip_addr,
 879                                 le16_to_cpu(fw_ddb_entry->port),
 880                                 fw_ddb_entry->iscsi_name);
 881                 } else {
 882                         ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
 883                                 "Next %d State %04x ConnErr %08x %pI4 "
 884                                 ":%04d \"%s\"\n", __func__, fw_ddb_index,
 885                                 mbox_sts[0], mbox_sts[2], mbox_sts[3],
 886                                 mbox_sts[4], mbox_sts[5],
 887                                 fw_ddb_entry->ip_addr,
 888                                 le16_to_cpu(fw_ddb_entry->port),
 889                                 fw_ddb_entry->iscsi_name);
 890                 }
 891         }
 892         if (num_valid_ddb_entries)
 893                 *num_valid_ddb_entries = mbox_sts[2];
 894         if (next_ddb_index)
 895                 *next_ddb_index = mbox_sts[3];
 896         if (fw_ddb_device_state)
 897                 *fw_ddb_device_state = mbox_sts[4];
 898
 899         /*
 900          * RA: This mailbox has been changed to pass connection error and
 901          * details.  Its true for ISP4010 as per Version E - Not sure when it
 902          * was changed.  Get the time2wait from the fw_dd_entry field :
 903          * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
 904          * struct.
 905          */
 906         if (conn_err_detail)
 907                 *conn_err_detail = mbox_sts[5];
 908         if (tcp_source_port_num)
 909                 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
 910         if (connection_id)
 911                 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
 912         status = QLA_SUCCESS;
 913
 914 exit_get_fwddb:
 915         return status;
 916 }
 917
 918 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index)
 919 {
 920         uint32_t mbox_cmd[MBOX_REG_COUNT];
 921         uint32_t mbox_sts[MBOX_REG_COUNT];
 922         int status;
 923
 924         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 925         memset(&mbox_sts, 0, sizeof(mbox_sts));
 926
 927         mbox_cmd[0] = MBOX_CMD_CONN_OPEN;
 928         mbox_cmd[1] = fw_ddb_index;
 929
 930         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
 931                                          &mbox_sts[0]);
 932         DEBUG2(ql4_printk(KERN_INFO, ha,
 933                           "%s: status = %d mbx0 = 0x%x mbx1 = 0x%x\n",
 934                           __func__, status, mbox_sts[0], mbox_sts[1]));
 935         return status;
 936 }
 937
 938 /**
 939  * qla4xxx_set_fwddb_entry - sets a ddb entry.
 940  * @ha: Pointer to host adapter structure.
 941  * @fw_ddb_index: Firmware's device database index
 942  * @fw_ddb_entry_dma: dma address of ddb entry
 943  * @mbx_sts: mailbox 0 to be returned or NULL
 944  *
 945  * This routine initializes or updates the adapter's device database
 946  * entry for the specified device.
 947  **/
 948 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
 949                           dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts)
 950 {
 951         uint32_t mbox_cmd[MBOX_REG_COUNT];
 952         uint32_t mbox_sts[MBOX_REG_COUNT];
 953         int status;
 954
 955         /* Do not wait for completion. The firmware will send us an
 956          * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
 957          */
 958         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 959         memset(&mbox_sts, 0, sizeof(mbox_sts));
 960
 961         mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
 962         mbox_cmd[1] = (uint32_t) fw_ddb_index;
 963         mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
 964         mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
 965         mbox_cmd[4] = sizeof(struct dev_db_entry);
 966
 967         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
 968                                          &mbox_sts[0]);
 969         if (mbx_sts)
 970                 *mbx_sts = mbox_sts[0];
 971         DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
 972             ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
 973
 974         return status;
 975 }
 976
 977 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha,
 978                                struct ddb_entry *ddb_entry, int options)
 979 {
 980         int status;
 981         uint32_t mbox_cmd[MBOX_REG_COUNT];
 982         uint32_t mbox_sts[MBOX_REG_COUNT];
 983
 984         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
 985         memset(&mbox_sts, 0, sizeof(mbox_sts));
 986
 987         mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
 988         mbox_cmd[1] = ddb_entry->fw_ddb_index;
 989         mbox_cmd[3] = options;
 990
 991         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
 992                                          &mbox_sts[0]);
 993         if (status != QLA_SUCCESS) {
 994                 DEBUG2(ql4_printk(KERN_INFO, ha,
 995                                   "%s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
 996                                   "failed sts %04X %04X", __func__,
 997                                   mbox_sts[0], mbox_sts[1]));
 998                 if ((mbox_sts[0] == MBOX_STS_COMMAND_ERROR) &&
 999                     (mbox_sts[1] == DDB_NOT_LOGGED_IN)) {
1000                         set_bit(DDB_CONN_CLOSE_FAILURE, &ddb_entry->flags);
1001                 }
1002         }
1003
1004         return status;
1005 }
1006
1007 /**
1008  * qla4xxx_get_crash_record - retrieves crash record.
1009  * @ha: Pointer to host adapter structure.
1010  *
1011  * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
1012  **/
1013 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
1014 {
1015         uint32_t mbox_cmd[MBOX_REG_COUNT];
1016         uint32_t mbox_sts[MBOX_REG_COUNT];
1017         struct crash_record *crash_record = NULL;
1018         dma_addr_t crash_record_dma = 0;
1019         uint32_t crash_record_size = 0;
1020
1021         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1022         memset(&mbox_sts, 0, sizeof(mbox_cmd));
1023
1024         /* Get size of crash record. */
1025         mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
1026
1027         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1028             QLA_SUCCESS) {
1029                 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
1030                               ha->host_no, __func__));
1031                 goto exit_get_crash_record;
1032         }
1033         crash_record_size = mbox_sts[4];
1034         if (crash_record_size == 0) {
1035                 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
1036                               ha->host_no, __func__));
1037                 goto exit_get_crash_record;
1038         }
1039
1040         /* Alloc Memory for Crash Record. */
1041         crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
1042                                           &crash_record_dma, GFP_KERNEL);
1043         if (crash_record == NULL)
1044                 goto exit_get_crash_record;
1045
1046         /* Get Crash Record. */
1047         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1048         memset(&mbox_sts, 0, sizeof(mbox_cmd));
1049
1050         mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
1051         mbox_cmd[2] = LSDW(crash_record_dma);
1052         mbox_cmd[3] = MSDW(crash_record_dma);
1053         mbox_cmd[4] = crash_record_size;
1054
1055         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1056             QLA_SUCCESS)
1057                 goto exit_get_crash_record;
1058
1059         /* Dump Crash Record. */
1060
1061 exit_get_crash_record:
1062         if (crash_record)
1063                 dma_free_coherent(&ha->pdev->dev, crash_record_size,
1064                                   crash_record, crash_record_dma);
1065 }
1066
1067 /**
1068  * qla4xxx_get_conn_event_log - retrieves connection event log
1069  * @ha: Pointer to host adapter structure.
1070  **/
1071 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
1072 {
1073         uint32_t mbox_cmd[MBOX_REG_COUNT];
1074         uint32_t mbox_sts[MBOX_REG_COUNT];
1075         struct conn_event_log_entry *event_log = NULL;
1076         dma_addr_t event_log_dma = 0;
1077         uint32_t event_log_size = 0;
1078         uint32_t num_valid_entries;
1079         uint32_t      oldest_entry = 0;
1080         uint32_t        max_event_log_entries;
1081         uint8_t         i;
1082
1083         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1084         memset(&mbox_sts, 0, sizeof(mbox_cmd));
1085
1086         /* Get size of crash record. */
1087         mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
1088
1089         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1090             QLA_SUCCESS)
1091                 goto exit_get_event_log;
1092
1093         event_log_size = mbox_sts[4];
1094         if (event_log_size == 0)
1095                 goto exit_get_event_log;
1096
1097         /* Alloc Memory for Crash Record. */
1098         event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
1099                                        &event_log_dma, GFP_KERNEL);
1100         if (event_log == NULL)
1101                 goto exit_get_event_log;
1102
1103         /* Get Crash Record. */
1104         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1105         memset(&mbox_sts, 0, sizeof(mbox_cmd));
1106
1107         mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
1108         mbox_cmd[2] = LSDW(event_log_dma);
1109         mbox_cmd[3] = MSDW(event_log_dma);
1110
1111         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1112             QLA_SUCCESS) {
1113                 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
1114                               "log!\n", ha->host_no, __func__));
1115                 goto exit_get_event_log;
1116         }
1117
1118         /* Dump Event Log. */
1119         num_valid_entries = mbox_sts[1];
1120
1121         max_event_log_entries = event_log_size /
1122                 sizeof(struct conn_event_log_entry);
1123
1124         if (num_valid_entries > max_event_log_entries)
1125                 oldest_entry = num_valid_entries % max_event_log_entries;
1126
1127         DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
1128                       ha->host_no, num_valid_entries));
1129
1130         if (ql4xextended_error_logging == 3) {
1131                 if (oldest_entry == 0) {
1132                         /* Circular Buffer has not wrapped around */
1133                         for (i=0; i < num_valid_entries; i++) {
1134                                 qla4xxx_dump_buffer((uint8_t *)event_log+
1135                                                     (i*sizeof(*event_log)),
1136                                                     sizeof(*event_log));
1137                         }
1138                 }
1139                 else {
1140                         /* Circular Buffer has wrapped around -
1141                          * display accordingly*/
1142                         for (i=oldest_entry; i < max_event_log_entries; i++) {
1143                                 qla4xxx_dump_buffer((uint8_t *)event_log+
1144                                                     (i*sizeof(*event_log)),
1145                                                     sizeof(*event_log));
1146                         }
1147                         for (i=0; i < oldest_entry; i++) {
1148                                 qla4xxx_dump_buffer((uint8_t *)event_log+
1149                                                     (i*sizeof(*event_log)),
1150                                                     sizeof(*event_log));
1151                         }
1152                 }
1153         }
1154
1155 exit_get_event_log:
1156         if (event_log)
1157                 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
1158                                   event_log_dma);
1159 }
1160
1161 /**
1162  * qla4xxx_abort_task - issues Abort Task
1163  * @ha: Pointer to host adapter structure.
1164  * @srb: Pointer to srb entry
1165  *
1166  * This routine performs a LUN RESET on the specified target/lun.
1167  * The caller must ensure that the ddb_entry and lun_entry pointers
1168  * are valid before calling this routine.
1169  **/
1170 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
1171 {
1172         uint32_t mbox_cmd[MBOX_REG_COUNT];
1173         uint32_t mbox_sts[MBOX_REG_COUNT];
1174         struct scsi_cmnd *cmd = srb->cmd;
1175         int status = QLA_SUCCESS;
1176         unsigned long flags = 0;
1177         uint32_t index;
1178
1179         /*
1180          * Send abort task command to ISP, so that the ISP will return
1181          * request with ABORT status
1182          */
1183         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1184         memset(&mbox_sts, 0, sizeof(mbox_sts));
1185
1186         spin_lock_irqsave(&ha->hardware_lock, flags);
1187         index = (unsigned long)(unsigned char *)cmd->host_scribble;
1188         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1189
1190         /* Firmware already posted completion on response queue */
1191         if (index == MAX_SRBS)
1192                 return status;
1193
1194         mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
1195         mbox_cmd[1] = srb->ddb->fw_ddb_index;
1196         mbox_cmd[2] = index;
1197         /* Immediate Command Enable */
1198         mbox_cmd[5] = 0x01;
1199
1200         qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
1201             &mbox_sts[0]);
1202         if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
1203                 status = QLA_ERROR;
1204
1205                 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%llu: abort task FAILED: "
1206                     "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
1207                     ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
1208                     mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
1209         }
1210
1211         return status;
1212 }
1213
1214 /**
1215  * qla4xxx_reset_lun - issues LUN Reset
1216  * @ha: Pointer to host adapter structure.
1217  * @ddb_entry: Pointer to device database entry
1218  * @lun: lun number
1219  *
1220  * This routine performs a LUN RESET on the specified target/lun.
1221  * The caller must ensure that the ddb_entry and lun_entry pointers
1222  * are valid before calling this routine.
1223  **/
1224 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
1225                       uint64_t lun)
1226 {
1227         uint32_t mbox_cmd[MBOX_REG_COUNT];
1228         uint32_t mbox_sts[MBOX_REG_COUNT];
1229         uint32_t scsi_lun[2];
1230         int status = QLA_SUCCESS;
1231
1232         DEBUG2(printk("scsi%ld:%d:%llu: lun reset issued\n", ha->host_no,
1233                       ddb_entry->fw_ddb_index, lun));
1234
1235         /*
1236          * Send lun reset command to ISP, so that the ISP will return all
1237          * outstanding requests with RESET status
1238          */
1239         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1240         memset(&mbox_sts, 0, sizeof(mbox_sts));
1241         int_to_scsilun(lun, (struct scsi_lun *) scsi_lun);
1242
1243         mbox_cmd[0] = MBOX_CMD_LUN_RESET;
1244         mbox_cmd[1] = ddb_entry->fw_ddb_index;
1245         /* FW expects LUN bytes 0-3 in Incoming Mailbox 2
1246          * (LUN byte 0 is LSByte, byte 3 is MSByte) */
1247         mbox_cmd[2] = cpu_to_le32(scsi_lun[0]);
1248         /* FW expects LUN bytes 4-7 in Incoming Mailbox 3
1249          * (LUN byte 4 is LSByte, byte 7 is MSByte) */
1250         mbox_cmd[3] = cpu_to_le32(scsi_lun[1]);
1251         mbox_cmd[5] = 0x01;     /* Immediate Command Enable */
1252
1253         qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
1254         if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1255             mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1256                 status = QLA_ERROR;
1257
1258         return status;
1259 }
1260
1261 /**
1262  * qla4xxx_reset_target - issues target Reset
1263  * @ha: Pointer to host adapter structure.
1264  * @db_entry: Pointer to device database entry
1265  * @un_entry: Pointer to lun entry structure
1266  *
1267  * This routine performs a TARGET RESET on the specified target.
1268  * The caller must ensure that the ddb_entry pointers
1269  * are valid before calling this routine.
1270  **/
1271 int qla4xxx_reset_target(struct scsi_qla_host *ha,
1272                          struct ddb_entry *ddb_entry)
1273 {
1274         uint32_t mbox_cmd[MBOX_REG_COUNT];
1275         uint32_t mbox_sts[MBOX_REG_COUNT];
1276         int status = QLA_SUCCESS;
1277
1278         DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
1279                       ddb_entry->fw_ddb_index));
1280
1281         /*
1282          * Send target reset command to ISP, so that the ISP will return all
1283          * outstanding requests with RESET status
1284          */
1285         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1286         memset(&mbox_sts, 0, sizeof(mbox_sts));
1287
1288         mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1289         mbox_cmd[1] = ddb_entry->fw_ddb_index;
1290         mbox_cmd[5] = 0x01;     /* Immediate Command Enable */
1291
1292         qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1293                                 &mbox_sts[0]);
1294         if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1295             mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1296                 status = QLA_ERROR;
1297
1298         return status;
1299 }
1300
1301 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1302                       uint32_t offset, uint32_t len)
1303 {
1304         uint32_t mbox_cmd[MBOX_REG_COUNT];
1305         uint32_t mbox_sts[MBOX_REG_COUNT];
1306
1307         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1308         memset(&mbox_sts, 0, sizeof(mbox_sts));
1309
1310         mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1311         mbox_cmd[1] = LSDW(dma_addr);
1312         mbox_cmd[2] = MSDW(dma_addr);
1313         mbox_cmd[3] = offset;
1314         mbox_cmd[4] = len;
1315
1316         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1317             QLA_SUCCESS) {
1318                 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1319                     "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1320                     __func__, mbox_sts[0], mbox_sts[1], offset, len));
1321                 return QLA_ERROR;
1322         }
1323         return QLA_SUCCESS;
1324 }
1325
1326 /**
1327  * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1328  * @ha: Pointer to host adapter structure.
1329  *
1330  * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1331  * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1332  * those mailboxes, if unused.
1333  **/
1334 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1335 {
1336         struct about_fw_info *about_fw = NULL;
1337         dma_addr_t about_fw_dma;
1338         uint32_t mbox_cmd[MBOX_REG_COUNT];
1339         uint32_t mbox_sts[MBOX_REG_COUNT];
1340         int status = QLA_ERROR;
1341
1342         about_fw = dma_alloc_coherent(&ha->pdev->dev,
1343                                       sizeof(struct about_fw_info),
1344                                       &about_fw_dma, GFP_KERNEL);
1345         if (!about_fw) {
1346                 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1347                                   "for about_fw\n", __func__));
1348                 return status;
1349         }
1350
1351         memset(about_fw, 0, sizeof(struct about_fw_info));
1352         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1353         memset(&mbox_sts, 0, sizeof(mbox_sts));
1354
1355         mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1356         mbox_cmd[2] = LSDW(about_fw_dma);
1357         mbox_cmd[3] = MSDW(about_fw_dma);
1358         mbox_cmd[4] = sizeof(struct about_fw_info);
1359
1360         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1361                                          &mbox_cmd[0], &mbox_sts[0]);
1362         if (status != QLA_SUCCESS) {
1363                 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1364                                   "failed w/ status %04X\n", __func__,
1365                                   mbox_sts[0]));
1366                 goto exit_about_fw;
1367         }
1368
1369         /* Save version information. */
1370         ha->fw_info.fw_major = le16_to_cpu(about_fw->fw_major);
1371         ha->fw_info.fw_minor = le16_to_cpu(about_fw->fw_minor);
1372         ha->fw_info.fw_patch = le16_to_cpu(about_fw->fw_patch);
1373         ha->fw_info.fw_build = le16_to_cpu(about_fw->fw_build);
1374         memcpy(ha->fw_info.fw_build_date, about_fw->fw_build_date,
1375                sizeof(about_fw->fw_build_date));
1376         memcpy(ha->fw_info.fw_build_time, about_fw->fw_build_time,
1377                sizeof(about_fw->fw_build_time));
1378         strcpy((char *)ha->fw_info.fw_build_user,
1379                skip_spaces((char *)about_fw->fw_build_user));
1380         ha->fw_info.fw_load_source = le16_to_cpu(about_fw->fw_load_source);
1381         ha->fw_info.iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1382         ha->fw_info.iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1383         ha->fw_info.bootload_major = le16_to_cpu(about_fw->bootload_major);
1384         ha->fw_info.bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1385         ha->fw_info.bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1386         ha->fw_info.bootload_build = le16_to_cpu(about_fw->bootload_build);
1387         strcpy((char *)ha->fw_info.extended_timestamp,
1388                skip_spaces((char *)about_fw->extended_timestamp));
1389
1390         ha->fw_uptime_secs = le32_to_cpu(mbox_sts[5]);
1391         ha->fw_uptime_msecs = le32_to_cpu(mbox_sts[6]);
1392         status = QLA_SUCCESS;
1393
1394 exit_about_fw:
1395         dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1396                           about_fw, about_fw_dma);
1397         return status;
1398 }
1399
1400 int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options,
1401                             dma_addr_t dma_addr)
1402 {
1403         uint32_t mbox_cmd[MBOX_REG_COUNT];
1404         uint32_t mbox_sts[MBOX_REG_COUNT];
1405
1406         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1407         memset(&mbox_sts, 0, sizeof(mbox_sts));
1408
1409         mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1410         mbox_cmd[1] = options;
1411         mbox_cmd[2] = LSDW(dma_addr);
1412         mbox_cmd[3] = MSDW(dma_addr);
1413
1414         if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1415             QLA_SUCCESS) {
1416                 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1417                      ha->host_no, __func__, mbox_sts[0]));
1418                 return QLA_ERROR;
1419         }
1420         return QLA_SUCCESS;
1421 }
1422
1423 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index,
1424                           uint32_t *mbx_sts)
1425 {
1426         int status;
1427         uint32_t mbox_cmd[MBOX_REG_COUNT];
1428         uint32_t mbox_sts[MBOX_REG_COUNT];
1429
1430         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1431         memset(&mbox_sts, 0, sizeof(mbox_sts));
1432
1433         mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1434         mbox_cmd[1] = ddb_index;
1435
1436         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1437                                          &mbox_sts[0]);
1438         if (status != QLA_SUCCESS) {
1439                 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1440                                    __func__, mbox_sts[0]));
1441         }
1442
1443         *mbx_sts = mbox_sts[0];
1444         return status;
1445 }
1446
1447 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index)
1448 {
1449         int status;
1450         uint32_t mbox_cmd[MBOX_REG_COUNT];
1451         uint32_t mbox_sts[MBOX_REG_COUNT];
1452
1453         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1454         memset(&mbox_sts, 0, sizeof(mbox_sts));
1455
1456         mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
1457         mbox_cmd[1] = ddb_index;
1458
1459         status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0],
1460                                          &mbox_sts[0]);
1461         if (status != QLA_SUCCESS) {
1462                 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1463                                    __func__, mbox_sts[0]));
1464         }
1465
1466         return status;
1467 }
1468
1469 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr,
1470                       uint32_t offset, uint32_t length, uint32_t options)
1471 {
1472         uint32_t mbox_cmd[MBOX_REG_COUNT];
1473         uint32_t mbox_sts[MBOX_REG_COUNT];
1474         int status = QLA_SUCCESS;
1475
1476         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1477         memset(&mbox_sts, 0, sizeof(mbox_sts));
1478
1479         mbox_cmd[0] = MBOX_CMD_WRITE_FLASH;
1480         mbox_cmd[1] = LSDW(dma_addr);
1481         mbox_cmd[2] = MSDW(dma_addr);
1482         mbox_cmd[3] = offset;
1483         mbox_cmd[4] = length;
1484         mbox_cmd[5] = options;
1485
1486         status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]);
1487         if (status != QLA_SUCCESS) {
1488                 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH "
1489                                   "failed w/ status %04X, mbx1 %04X\n",
1490                                   __func__, mbox_sts[0], mbox_sts[1]));
1491         }
1492         return status;
1493 }
1494
1495 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
1496                             struct dev_db_entry *fw_ddb_entry,
1497                             dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1498 {
1499         uint32_t dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1500         uint32_t dev_db_end_offset;
1501         int status = QLA_ERROR;
1502
1503         memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1504
1505         dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1506         dev_db_end_offset = FLASH_OFFSET_DB_END;
1507
1508         if (dev_db_start_offset > dev_db_end_offset) {
1509                 DEBUG2(ql4_printk(KERN_ERR, ha,
1510                                   "%s:Invalid DDB index %d", __func__,
1511                                   ddb_index));
1512                 goto exit_bootdb_failed;
1513         }
1514
1515         if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1516                               sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1517                 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash"
1518                            "failed\n", ha->host_no, __func__);
1519                 goto exit_bootdb_failed;
1520         }
1521
1522         if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1523                 status = QLA_SUCCESS;
1524
1525 exit_bootdb_failed:
1526         return status;
1527 }
1528
1529 int qla4xxx_flashdb_by_index(struct scsi_qla_host *ha,
1530                              struct dev_db_entry *fw_ddb_entry,
1531                              dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1532 {
1533         uint32_t dev_db_start_offset;
1534         uint32_t dev_db_end_offset;
1535         int status = QLA_ERROR;
1536
1537         memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1538
1539         if (is_qla40XX(ha)) {
1540                 dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1541                 dev_db_end_offset = FLASH_OFFSET_DB_END;
1542         } else {
1543                 dev_db_start_offset = FLASH_RAW_ACCESS_ADDR +
1544                                       (ha->hw.flt_region_ddb << 2);
1545                 /* flt_ddb_size is DDB table size for both ports
1546                  * so divide it by 2 to calculate the offset for second port
1547                  */
1548                 if (ha->port_num == 1)
1549                         dev_db_start_offset += (ha->hw.flt_ddb_size / 2);
1550
1551                 dev_db_end_offset = dev_db_start_offset +
1552                                     (ha->hw.flt_ddb_size / 2);
1553         }
1554
1555         dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1556
1557         if (dev_db_start_offset > dev_db_end_offset) {
1558                 DEBUG2(ql4_printk(KERN_ERR, ha,
1559                                   "%s:Invalid DDB index %d", __func__,
1560                                   ddb_index));
1561                 goto exit_fdb_failed;
1562         }
1563
1564         if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1565                               sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1566                 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash failed\n",
1567                            ha->host_no, __func__);
1568                 goto exit_fdb_failed;
1569         }
1570
1571         if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1572                 status = QLA_SUCCESS;
1573
1574 exit_fdb_failed:
1575         return status;
1576 }
1577
1578 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password,
1579                      uint16_t idx)
1580 {
1581         int ret = 0;
1582         int rval = QLA_ERROR;
1583         uint32_t offset = 0, chap_size;
1584         struct ql4_chap_table *chap_table;
1585         dma_addr_t chap_dma;
1586
1587         chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1588         if (chap_table == NULL)
1589                 return -ENOMEM;
1590
1591         chap_size = sizeof(struct ql4_chap_table);
1592         memset(chap_table, 0, chap_size);
1593
1594         if (is_qla40XX(ha))
1595                 offset = FLASH_CHAP_OFFSET | (idx * chap_size);
1596         else {
1597                 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1598                 /* flt_chap_size is CHAP table size for both ports
1599                  * so divide it by 2 to calculate the offset for second port
1600                  */
1601                 if (ha->port_num == 1)
1602                         offset += (ha->hw.flt_chap_size / 2);
1603                 offset += (idx * chap_size);
1604         }
1605
1606         rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size);
1607         if (rval != QLA_SUCCESS) {
1608                 ret = -EINVAL;
1609                 goto exit_get_chap;
1610         }
1611
1612         DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n",
1613                 __le16_to_cpu(chap_table->cookie)));
1614
1615         if (__le16_to_cpu(chap_table->cookie) != CHAP_VALID_COOKIE) {
1616                 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n");
1617                 goto exit_get_chap;
1618         }
1619
1620         strlcpy(password, chap_table->secret, QL4_CHAP_MAX_SECRET_LEN);
1621         strlcpy(username, chap_table->name, QL4_CHAP_MAX_NAME_LEN);
1622         chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1623
1624 exit_get_chap:
1625         dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1626         return ret;
1627 }
1628
1629 /**
1630  * qla4xxx_set_chap - Make a chap entry at the given index
1631  * @ha: pointer to adapter structure
1632  * @username: CHAP username to set
1633  * @password: CHAP password to set
1634  * @idx: CHAP index at which to make the entry
1635  * @bidi: type of chap entry (chap_in or chap_out)
1636  *
1637  * Create chap entry at the given index with the information provided.
1638  *
1639  * Note: Caller should acquire the chap lock before getting here.
1640  **/
1641 int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username, char *password,
1642                      uint16_t idx, int bidi)
1643 {
1644         int ret = 0;
1645         int rval = QLA_ERROR;
1646         uint32_t offset = 0;
1647         struct ql4_chap_table *chap_table;
1648         uint32_t chap_size = 0;
1649         dma_addr_t chap_dma;
1650
1651         chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1652         if (chap_table == NULL) {
1653                 ret =  -ENOMEM;
1654                 goto exit_set_chap;
1655         }
1656
1657         memset(chap_table, 0, sizeof(struct ql4_chap_table));
1658         if (bidi)
1659                 chap_table->flags |= BIT_6; /* peer */
1660         else
1661                 chap_table->flags |= BIT_7; /* local */
1662         chap_table->secret_len = strlen(password);
1663         strncpy(chap_table->secret, password, MAX_CHAP_SECRET_LEN - 1);
1664         strncpy(chap_table->name, username, MAX_CHAP_NAME_LEN - 1);
1665         chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1666
1667         if (is_qla40XX(ha)) {
1668                 chap_size = MAX_CHAP_ENTRIES_40XX * sizeof(*chap_table);
1669                 offset = FLASH_CHAP_OFFSET;
1670         } else { /* Single region contains CHAP info for both ports which is
1671                   * divided into half for each port.
1672                   */
1673                 chap_size = ha->hw.flt_chap_size / 2;
1674                 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1675                 if (ha->port_num == 1)
1676                         offset += chap_size;
1677         }
1678
1679         offset += (idx * sizeof(struct ql4_chap_table));
1680         rval = qla4xxx_set_flash(ha, chap_dma, offset,
1681                                 sizeof(struct ql4_chap_table),
1682                                 FLASH_OPT_RMW_COMMIT);
1683
1684         if (rval == QLA_SUCCESS && ha->chap_list) {
1685                 /* Update ha chap_list cache */
1686                 memcpy((struct ql4_chap_table *)ha->chap_list + idx,
1687                        chap_table, sizeof(struct ql4_chap_table));
1688         }
1689         dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1690         if (rval != QLA_SUCCESS)
1691                 ret =  -EINVAL;
1692
1693 exit_set_chap:
1694         return ret;
1695 }
1696
1697
1698 int qla4xxx_get_uni_chap_at_index(struct scsi_qla_host *ha, char *username,
1699                                   char *password, uint16_t chap_index)
1700 {
1701         int rval = QLA_ERROR;
1702         struct ql4_chap_table *chap_table = NULL;
1703         int max_chap_entries;
1704
1705         if (!ha->chap_list) {
1706                 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1707                 rval = QLA_ERROR;
1708                 goto exit_uni_chap;
1709         }
1710
1711         if (!username || !password) {
1712                 ql4_printk(KERN_ERR, ha, "No memory for username & secret\n");
1713                 rval = QLA_ERROR;
1714                 goto exit_uni_chap;
1715         }
1716
1717         if (is_qla80XX(ha))
1718                 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1719                                    sizeof(struct ql4_chap_table);
1720         else
1721                 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1722
1723         if (chap_index > max_chap_entries) {
1724                 ql4_printk(KERN_ERR, ha, "Invalid Chap index\n");
1725                 rval = QLA_ERROR;
1726                 goto exit_uni_chap;
1727         }
1728
1729         mutex_lock(&ha->chap_sem);
1730         chap_table = (struct ql4_chap_table *)ha->chap_list + chap_index;
1731         if (chap_table->cookie != __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1732                 rval = QLA_ERROR;
1733                 goto exit_unlock_uni_chap;
1734         }
1735
1736         if (!(chap_table->flags & BIT_7)) {
1737                 ql4_printk(KERN_ERR, ha, "Unidirectional entry not set\n");
1738                 rval = QLA_ERROR;
1739                 goto exit_unlock_uni_chap;
1740         }
1741
1742         strlcpy(password, chap_table->secret, MAX_CHAP_SECRET_LEN);
1743         strlcpy(username, chap_table->name, MAX_CHAP_NAME_LEN);
1744
1745         rval = QLA_SUCCESS;
1746
1747 exit_unlock_uni_chap:
1748         mutex_unlock(&ha->chap_sem);
1749 exit_uni_chap:
1750         return rval;
1751 }
1752
1753 /**
1754  * qla4xxx_get_chap_index - Get chap index given username and secret
1755  * @ha: pointer to adapter structure
1756  * @username: CHAP username to be searched
1757  * @password: CHAP password to be searched
1758  * @bidi: Is this a BIDI CHAP
1759  * @chap_index: CHAP index to be returned
1760  *
1761  * Match the username and password in the chap_list, return the index if a
1762  * match is found. If a match is not found then add the entry in FLASH and
1763  * return the index at which entry is written in the FLASH.
1764  **/
1765 int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username,
1766                            char *password, int bidi, uint16_t *chap_index)
1767 {
1768         int i, rval;
1769         int free_index = -1;
1770         int found_index = 0;
1771         int max_chap_entries = 0;
1772         struct ql4_chap_table *chap_table;
1773
1774         if (is_qla80XX(ha))
1775                 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1776                                                 sizeof(struct ql4_chap_table);
1777         else
1778                 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1779
1780         if (!ha->chap_list) {
1781                 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1782                 return QLA_ERROR;
1783         }
1784
1785         if (!username || !password) {
1786                 ql4_printk(KERN_ERR, ha, "Do not have username and psw\n");
1787                 return QLA_ERROR;
1788         }
1789
1790         mutex_lock(&ha->chap_sem);
1791         for (i = 0; i < max_chap_entries; i++) {
1792                 chap_table = (struct ql4_chap_table *)ha->chap_list + i;
1793                 if (chap_table->cookie !=
1794                     __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1795                         if (i > MAX_RESRV_CHAP_IDX && free_index == -1)
1796                                 free_index = i;
1797                         continue;
1798                 }
1799                 if (bidi) {
1800                         if (chap_table->flags & BIT_7)
1801                                 continue;
1802                 } else {
1803                         if (chap_table->flags & BIT_6)
1804                                 continue;
1805                 }
1806                 if (!strncmp(chap_table->secret, password,
1807                              MAX_CHAP_SECRET_LEN) &&
1808                     !strncmp(chap_table->name, username,
1809                              MAX_CHAP_NAME_LEN)) {
1810                         *chap_index = i;
1811                         found_index = 1;
1812                         break;
1813                 }
1814         }
1815
1816         /* If chap entry is not present and a free index is available then
1817          * write the entry in flash
1818          */
1819         if (!found_index && free_index != -1) {
1820                 rval = qla4xxx_set_chap(ha, username, password,
1821                                         free_index, bidi);
1822                 if (!rval) {
1823                         *chap_index = free_index;
1824                         found_index = 1;
1825                 }
1826         }
1827
1828         mutex_unlock(&ha->chap_sem);
1829
1830         if (found_index)
1831                 return QLA_SUCCESS;
1832         return QLA_ERROR;
1833 }
1834
1835 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha,
1836                                    uint16_t fw_ddb_index,
1837                                    uint16_t connection_id,
1838                                    uint16_t option)
1839 {
1840         uint32_t mbox_cmd[MBOX_REG_COUNT];
1841         uint32_t mbox_sts[MBOX_REG_COUNT];
1842         int status = QLA_SUCCESS;
1843
1844         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1845         memset(&mbox_sts, 0, sizeof(mbox_sts));
1846
1847         mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
1848         mbox_cmd[1] = fw_ddb_index;
1849         mbox_cmd[2] = connection_id;
1850         mbox_cmd[3] = option;
1851
1852         status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]);
1853         if (status != QLA_SUCCESS) {
1854                 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE "
1855                                   "option %04x failed w/ status %04X %04X\n",
1856                                   __func__, option, mbox_sts[0], mbox_sts[1]));
1857         }
1858         return status;
1859 }
1860
1861 /**
1862  * qla4_84xx_extend_idc_tmo - Extend IDC Timeout.
1863  * @ha: Pointer to host adapter structure.
1864  * @ext_tmo: idc timeout value
1865  *
1866  * Requests firmware to extend the idc timeout value.
1867  **/
1868 static int qla4_84xx_extend_idc_tmo(struct scsi_qla_host *ha, uint32_t ext_tmo)
1869 {
1870         uint32_t mbox_cmd[MBOX_REG_COUNT];
1871         uint32_t mbox_sts[MBOX_REG_COUNT];
1872         int status;
1873
1874         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1875         memset(&mbox_sts, 0, sizeof(mbox_sts));
1876         ext_tmo &= 0xf;
1877
1878         mbox_cmd[0] = MBOX_CMD_IDC_TIME_EXTEND;
1879         mbox_cmd[1] = ((ha->idc_info.request_desc & 0xfffff0ff) |
1880                        (ext_tmo << 8));         /* new timeout */
1881         mbox_cmd[2] = ha->idc_info.info1;
1882         mbox_cmd[3] = ha->idc_info.info2;
1883         mbox_cmd[4] = ha->idc_info.info3;
1884
1885         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1886                                          mbox_cmd, mbox_sts);
1887         if (status != QLA_SUCCESS) {
1888                 DEBUG2(ql4_printk(KERN_INFO, ha,
1889                                   "scsi%ld: %s: failed status %04X\n",
1890                                   ha->host_no, __func__, mbox_sts[0]));
1891                 return QLA_ERROR;
1892         } else {
1893                 ql4_printk(KERN_INFO, ha, "%s: IDC timeout extended by %d secs\n",
1894                            __func__, ext_tmo);
1895         }
1896
1897         return QLA_SUCCESS;
1898 }
1899
1900 int qla4xxx_disable_acb(struct scsi_qla_host *ha)
1901 {
1902         uint32_t mbox_cmd[MBOX_REG_COUNT];
1903         uint32_t mbox_sts[MBOX_REG_COUNT];
1904         int status = QLA_SUCCESS;
1905
1906         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1907         memset(&mbox_sts, 0, sizeof(mbox_sts));
1908
1909         mbox_cmd[0] = MBOX_CMD_DISABLE_ACB;
1910
1911         status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]);
1912         if (status != QLA_SUCCESS) {
1913                 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB "
1914                                   "failed w/ status %04X %04X %04X", __func__,
1915                                   mbox_sts[0], mbox_sts[1], mbox_sts[2]));
1916         } else {
1917                 if (is_qla8042(ha) &&
1918                     test_bit(DPC_POST_IDC_ACK, &ha->dpc_flags) &&
1919                     (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE)) {
1920                         /*
1921                          * Disable ACB mailbox command takes time to complete
1922                          * based on the total number of targets connected.
1923                          * For 512 targets, it took approximately 5 secs to
1924                          * complete. Setting the timeout value to 8, with the 3
1925                          * secs buffer.
1926                          */
1927                         qla4_84xx_extend_idc_tmo(ha, IDC_EXTEND_TOV);
1928                         if (!wait_for_completion_timeout(&ha->disable_acb_comp,
1929                                                          IDC_EXTEND_TOV * HZ)) {
1930                                 ql4_printk(KERN_WARNING, ha, "%s: Disable ACB Completion not received\n",
1931                                            __func__);
1932                         }
1933                 }
1934         }
1935         return status;
1936 }
1937
1938 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma,
1939                     uint32_t acb_type, uint32_t len)
1940 {
1941         uint32_t mbox_cmd[MBOX_REG_COUNT];
1942         uint32_t mbox_sts[MBOX_REG_COUNT];
1943         int status = QLA_SUCCESS;
1944
1945         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1946         memset(&mbox_sts, 0, sizeof(mbox_sts));
1947
1948         mbox_cmd[0] = MBOX_CMD_GET_ACB;
1949         mbox_cmd[1] = acb_type;
1950         mbox_cmd[2] = LSDW(acb_dma);
1951         mbox_cmd[3] = MSDW(acb_dma);
1952         mbox_cmd[4] = len;
1953
1954         status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1955         if (status != QLA_SUCCESS) {
1956                 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB "
1957                                   "failed w/ status %04X\n", __func__,
1958                                   mbox_sts[0]));
1959         }
1960         return status;
1961 }
1962
1963 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1964                     uint32_t *mbox_sts, dma_addr_t acb_dma)
1965 {
1966         int status = QLA_SUCCESS;
1967
1968         memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1969         memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1970         mbox_cmd[0] = MBOX_CMD_SET_ACB;
1971         mbox_cmd[1] = 0; /* Primary ACB */
1972         mbox_cmd[2] = LSDW(acb_dma);
1973         mbox_cmd[3] = MSDW(acb_dma);
1974         mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1975
1976         status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1977         if (status != QLA_SUCCESS) {
1978                 DEBUG2(ql4_printk(KERN_WARNING, ha,  "%s: MBOX_CMD_SET_ACB "
1979                                   "failed w/ status %04X\n", __func__,
1980                                   mbox_sts[0]));
1981         }
1982         return status;
1983 }
1984
1985 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha,
1986                                struct ddb_entry *ddb_entry,
1987                                struct iscsi_cls_conn *cls_conn,
1988                                uint32_t *mbx_sts)
1989 {
1990         struct dev_db_entry *fw_ddb_entry;
1991         struct iscsi_conn *conn;
1992         struct iscsi_session *sess;
1993         struct qla_conn *qla_conn;
1994         struct sockaddr *dst_addr;
1995         dma_addr_t fw_ddb_entry_dma;
1996         int status = QLA_SUCCESS;
1997         int rval = 0;
1998         struct sockaddr_in *addr;
1999         struct sockaddr_in6 *addr6;
2000         char *ip;
2001         uint16_t iscsi_opts = 0;
2002         uint32_t options = 0;
2003         uint16_t idx, *ptid;
2004
2005         fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
2006                                           &fw_ddb_entry_dma, GFP_KERNEL);
2007         if (!fw_ddb_entry) {
2008                 DEBUG2(ql4_printk(KERN_ERR, ha,
2009                                   "%s: Unable to allocate dma buffer.\n",
2010                                   __func__));
2011                 rval = -ENOMEM;
2012                 goto exit_set_param_no_free;
2013         }
2014
2015         conn = cls_conn->dd_data;
2016         qla_conn = conn->dd_data;
2017         sess = conn->session;
2018         dst_addr = (struct sockaddr *)&qla_conn->qla_ep->dst_addr;
2019
2020         if (dst_addr->sa_family == AF_INET6)
2021                 options |= IPV6_DEFAULT_DDB_ENTRY;
2022
2023         status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma);
2024         if (status == QLA_ERROR) {
2025                 rval = -EINVAL;
2026                 goto exit_set_param;
2027         }
2028
2029         ptid = (uint16_t *)&fw_ddb_entry->isid[1];
2030         *ptid = cpu_to_le16((uint16_t)ddb_entry->sess->target_id);
2031
2032         DEBUG2(ql4_printk(KERN_INFO, ha, "ISID [%02x%02x%02x%02x%02x%02x]\n",
2033                           fw_ddb_entry->isid[5], fw_ddb_entry->isid[4],
2034                           fw_ddb_entry->isid[3], fw_ddb_entry->isid[2],
2035                           fw_ddb_entry->isid[1], fw_ddb_entry->isid[0]));
2036
2037         iscsi_opts = le16_to_cpu(fw_ddb_entry->iscsi_options);
2038         memset(fw_ddb_entry->iscsi_alias, 0, sizeof(fw_ddb_entry->iscsi_alias));
2039
2040         memset(fw_ddb_entry->iscsi_name, 0, sizeof(fw_ddb_entry->iscsi_name));
2041
2042         if (sess->targetname != NULL) {
2043                 memcpy(fw_ddb_entry->iscsi_name, sess->targetname,
2044                        min(strlen(sess->targetname),
2045                        sizeof(fw_ddb_entry->iscsi_name)));
2046         }
2047
2048         memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
2049         memset(fw_ddb_entry->tgt_addr, 0, sizeof(fw_ddb_entry->tgt_addr));
2050
2051         fw_ddb_entry->options =  DDB_OPT_TARGET | DDB_OPT_AUTO_SENDTGTS_DISABLE;
2052
2053         if (dst_addr->sa_family == AF_INET) {
2054                 addr = (struct sockaddr_in *)dst_addr;
2055                 ip = (char *)&addr->sin_addr;
2056                 memcpy(fw_ddb_entry->ip_addr, ip, IP_ADDR_LEN);
2057                 fw_ddb_entry->port = cpu_to_le16(ntohs(addr->sin_port));
2058                 DEBUG2(ql4_printk(KERN_INFO, ha,
2059                                   "%s: Destination Address [%pI4]: index [%d]\n",
2060                                    __func__, fw_ddb_entry->ip_addr,
2061                                   ddb_entry->fw_ddb_index));
2062         } else if (dst_addr->sa_family == AF_INET6) {
2063                 addr6 = (struct sockaddr_in6 *)dst_addr;
2064                 ip = (char *)&addr6->sin6_addr;
2065                 memcpy(fw_ddb_entry->ip_addr, ip, IPv6_ADDR_LEN);
2066                 fw_ddb_entry->port = cpu_to_le16(ntohs(addr6->sin6_port));
2067                 fw_ddb_entry->options |= DDB_OPT_IPV6_DEVICE;
2068                 DEBUG2(ql4_printk(KERN_INFO, ha,
2069                                   "%s: Destination Address [%pI6]: index [%d]\n",
2070                                    __func__, fw_ddb_entry->ip_addr,
2071                                   ddb_entry->fw_ddb_index));
2072         } else {
2073                 ql4_printk(KERN_ERR, ha,
2074                            "%s: Failed to get IP Address\n",
2075                            __func__);
2076                 rval = -EINVAL;
2077                 goto exit_set_param;
2078         }
2079
2080         /* CHAP */
2081         if (sess->username != NULL && sess->password != NULL) {
2082                 if (strlen(sess->username) && strlen(sess->password)) {
2083                         iscsi_opts |= BIT_7;
2084
2085                         rval = qla4xxx_get_chap_index(ha, sess->username,
2086                                                 sess->password,
2087                                                 LOCAL_CHAP, &idx);
2088                         if (rval)
2089                                 goto exit_set_param;
2090
2091                         fw_ddb_entry->chap_tbl_idx = cpu_to_le16(idx);
2092                 }
2093         }
2094
2095         if (sess->username_in != NULL && sess->password_in != NULL) {
2096                 /* Check if BIDI CHAP */
2097                 if (strlen(sess->username_in) && strlen(sess->password_in)) {
2098                         iscsi_opts |= BIT_4;
2099
2100                         rval = qla4xxx_get_chap_index(ha, sess->username_in,
2101                                                       sess->password_in,
2102                                                       BIDI_CHAP, &idx);
2103                         if (rval)
2104                                 goto exit_set_param;
2105                 }
2106         }
2107
2108         if (sess->initial_r2t_en)
2109                 iscsi_opts |= BIT_10;
2110
2111         if (sess->imm_data_en)
2112                 iscsi_opts |= BIT_11;
2113
2114         fw_ddb_entry->iscsi_options = cpu_to_le16(iscsi_opts);
2115
2116         if (conn->max_recv_dlength)
2117                 fw_ddb_entry->iscsi_max_rcv_data_seg_len =
2118                   __constant_cpu_to_le16((conn->max_recv_dlength / BYTE_UNITS));
2119
2120         if (sess->max_r2t)
2121                 fw_ddb_entry->iscsi_max_outsnd_r2t = cpu_to_le16(sess->max_r2t);
2122
2123         if (sess->first_burst)
2124                 fw_ddb_entry->iscsi_first_burst_len =
2125                        __constant_cpu_to_le16((sess->first_burst / BYTE_UNITS));
2126
2127         if (sess->max_burst)
2128                 fw_ddb_entry->iscsi_max_burst_len =
2129                         __constant_cpu_to_le16((sess->max_burst / BYTE_UNITS));
2130
2131         if (sess->time2wait)
2132                 fw_ddb_entry->iscsi_def_time2wait =
2133                         cpu_to_le16(sess->time2wait);
2134
2135         if (sess->time2retain)
2136                 fw_ddb_entry->iscsi_def_time2retain =
2137                         cpu_to_le16(sess->time2retain);
2138
2139         status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
2140                                        fw_ddb_entry_dma, mbx_sts);
2141
2142         if (status != QLA_SUCCESS)
2143                 rval = -EINVAL;
2144 exit_set_param:
2145         dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
2146                           fw_ddb_entry, fw_ddb_entry_dma);
2147 exit_set_param_no_free:
2148         return rval;
2149 }
2150
2151 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
2152                           uint16_t stats_size, dma_addr_t stats_dma)
2153 {
2154         int status = QLA_SUCCESS;
2155         uint32_t mbox_cmd[MBOX_REG_COUNT];
2156         uint32_t mbox_sts[MBOX_REG_COUNT];
2157
2158         memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
2159         memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
2160         mbox_cmd[0] = MBOX_CMD_GET_MANAGEMENT_DATA;
2161         mbox_cmd[1] = fw_ddb_index;
2162         mbox_cmd[2] = LSDW(stats_dma);
2163         mbox_cmd[3] = MSDW(stats_dma);
2164         mbox_cmd[4] = stats_size;
2165
2166         status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]);
2167         if (status != QLA_SUCCESS) {
2168                 DEBUG2(ql4_printk(KERN_WARNING, ha,
2169                                   "%s: MBOX_CMD_GET_MANAGEMENT_DATA "
2170                                   "failed w/ status %04X\n", __func__,
2171                                   mbox_sts[0]));
2172         }
2173         return status;
2174 }
2175
2176 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
2177                          uint32_t ip_idx, uint32_t *sts)
2178 {
2179         uint32_t mbox_cmd[MBOX_REG_COUNT];
2180         uint32_t mbox_sts[MBOX_REG_COUNT];
2181         int status = QLA_SUCCESS;
2182
2183         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2184         memset(&mbox_sts, 0, sizeof(mbox_sts));
2185         mbox_cmd[0] = MBOX_CMD_GET_IP_ADDR_STATE;
2186         mbox_cmd[1] = acb_idx;
2187         mbox_cmd[2] = ip_idx;
2188
2189         status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]);
2190         if (status != QLA_SUCCESS) {
2191                 DEBUG2(ql4_printk(KERN_WARNING, ha,  "%s: "
2192                                   "MBOX_CMD_GET_IP_ADDR_STATE failed w/ "
2193                                   "status %04X\n", __func__, mbox_sts[0]));
2194         }
2195         memcpy(sts, mbox_sts, sizeof(mbox_sts));
2196         return status;
2197 }
2198
2199 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
2200                       uint32_t offset, uint32_t size)
2201 {
2202         int status = QLA_SUCCESS;
2203         uint32_t mbox_cmd[MBOX_REG_COUNT];
2204         uint32_t mbox_sts[MBOX_REG_COUNT];
2205
2206         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2207         memset(&mbox_sts, 0, sizeof(mbox_sts));
2208
2209         mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
2210         mbox_cmd[1] = LSDW(nvram_dma);
2211         mbox_cmd[2] = MSDW(nvram_dma);
2212         mbox_cmd[3] = offset;
2213         mbox_cmd[4] = size;
2214
2215         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
2216                                          &mbox_sts[0]);
2217         if (status != QLA_SUCCESS) {
2218                 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
2219                                   "status %04X\n", ha->host_no, __func__,
2220                                   mbox_sts[0]));
2221         }
2222         return status;
2223 }
2224
2225 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
2226                       uint32_t offset, uint32_t size)
2227 {
2228         int status = QLA_SUCCESS;
2229         uint32_t mbox_cmd[MBOX_REG_COUNT];
2230         uint32_t mbox_sts[MBOX_REG_COUNT];
2231
2232         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2233         memset(&mbox_sts, 0, sizeof(mbox_sts));
2234
2235         mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
2236         mbox_cmd[1] = LSDW(nvram_dma);
2237         mbox_cmd[2] = MSDW(nvram_dma);
2238         mbox_cmd[3] = offset;
2239         mbox_cmd[4] = size;
2240
2241         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
2242                                          &mbox_sts[0]);
2243         if (status != QLA_SUCCESS) {
2244                 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
2245                                   "status %04X\n", ha->host_no, __func__,
2246                                   mbox_sts[0]));
2247         }
2248         return status;
2249 }
2250
2251 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha,
2252                                      uint32_t region, uint32_t field0,
2253                                      uint32_t field1)
2254 {
2255         int status = QLA_SUCCESS;
2256         uint32_t mbox_cmd[MBOX_REG_COUNT];
2257         uint32_t mbox_sts[MBOX_REG_COUNT];
2258
2259         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2260         memset(&mbox_sts, 0, sizeof(mbox_sts));
2261
2262         mbox_cmd[0] = MBOX_CMD_RESTORE_FACTORY_DEFAULTS;
2263         mbox_cmd[3] = region;
2264         mbox_cmd[4] = field0;
2265         mbox_cmd[5] = field1;
2266
2267         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0],
2268                                          &mbox_sts[0]);
2269         if (status != QLA_SUCCESS) {
2270                 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
2271                                   "status %04X\n", ha->host_no, __func__,
2272                                   mbox_sts[0]));
2273         }
2274         return status;
2275 }
2276
2277 /**
2278  * qla4_8xxx_set_param - set driver version in firmware.
2279  * @ha: Pointer to host adapter structure.
2280  * @param: Parameter to set i.e driver version
2281  **/
2282 int qla4_8xxx_set_param(struct scsi_qla_host *ha, int param)
2283 {
2284         uint32_t mbox_cmd[MBOX_REG_COUNT];
2285         uint32_t mbox_sts[MBOX_REG_COUNT];
2286         uint32_t status;
2287
2288         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2289         memset(&mbox_sts, 0, sizeof(mbox_sts));
2290
2291         mbox_cmd[0] = MBOX_CMD_SET_PARAM;
2292         if (param == SET_DRVR_VERSION) {
2293                 mbox_cmd[1] = SET_DRVR_VERSION;
2294                 strncpy((char *)&mbox_cmd[2], QLA4XXX_DRIVER_VERSION,
2295                         MAX_DRVR_VER_LEN - 1);
2296         } else {
2297                 ql4_printk(KERN_ERR, ha, "%s: invalid parameter 0x%x\n",
2298                            __func__, param);
2299                 status = QLA_ERROR;
2300                 goto exit_set_param;
2301         }
2302
2303         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, mbox_cmd,
2304                                          mbox_sts);
2305         if (status == QLA_ERROR)
2306                 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
2307                            __func__, mbox_sts[0]);
2308
2309 exit_set_param:
2310         return status;
2311 }
2312
2313 /**
2314  * qla4_83xx_post_idc_ack - post IDC ACK
2315  * @ha: Pointer to host adapter structure.
2316  *
2317  * Posts IDC ACK for IDC Request Notification AEN.
2318  **/
2319 int qla4_83xx_post_idc_ack(struct scsi_qla_host *ha)
2320 {
2321         uint32_t mbox_cmd[MBOX_REG_COUNT];
2322         uint32_t mbox_sts[MBOX_REG_COUNT];
2323         int status;
2324
2325         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2326         memset(&mbox_sts, 0, sizeof(mbox_sts));
2327
2328         mbox_cmd[0] = MBOX_CMD_IDC_ACK;
2329         mbox_cmd[1] = ha->idc_info.request_desc;
2330         mbox_cmd[2] = ha->idc_info.info1;
2331         mbox_cmd[3] = ha->idc_info.info2;
2332         mbox_cmd[4] = ha->idc_info.info3;
2333
2334         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
2335                                          mbox_cmd, mbox_sts);
2336         if (status == QLA_ERROR)
2337                 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,
2338                            mbox_sts[0]);
2339         else
2340                ql4_printk(KERN_INFO, ha, "%s: IDC ACK posted\n", __func__);
2341
2342         return status;
2343 }
2344
2345 int qla4_84xx_config_acb(struct scsi_qla_host *ha, int acb_config)
2346 {
2347         uint32_t mbox_cmd[MBOX_REG_COUNT];
2348         uint32_t mbox_sts[MBOX_REG_COUNT];
2349         struct addr_ctrl_blk *acb = NULL;
2350         uint32_t acb_len = sizeof(struct addr_ctrl_blk);
2351         int rval = QLA_SUCCESS;
2352         dma_addr_t acb_dma;
2353
2354         acb = dma_alloc_coherent(&ha->pdev->dev,
2355                                  sizeof(struct addr_ctrl_blk),
2356                                  &acb_dma, GFP_KERNEL);
2357         if (!acb) {
2358                 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n", __func__);
2359                 rval = QLA_ERROR;
2360                 goto exit_config_acb;
2361         }
2362         memset(acb, 0, acb_len);
2363
2364         switch (acb_config) {
2365         case ACB_CONFIG_DISABLE:
2366                 rval = qla4xxx_get_acb(ha, acb_dma, 0, acb_len);
2367                 if (rval != QLA_SUCCESS)
2368                         goto exit_free_acb;
2369
2370                 rval = qla4xxx_disable_acb(ha);
2371                 if (rval != QLA_SUCCESS)
2372                         goto exit_free_acb;
2373
2374                 if (!ha->saved_acb)
2375                         ha->saved_acb = kzalloc(acb_len, GFP_KERNEL);
2376
2377                 if (!ha->saved_acb) {
2378                         ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n",
2379                                    __func__);
2380                         rval = QLA_ERROR;
2381                         goto exit_free_acb;
2382                 }
2383                 memcpy(ha->saved_acb, acb, acb_len);
2384                 break;
2385         case ACB_CONFIG_SET:
2386
2387                 if (!ha->saved_acb) {
2388                         ql4_printk(KERN_ERR, ha, "%s: Can't set ACB, Saved ACB not available\n",
2389                                    __func__);
2390                         rval = QLA_ERROR;
2391                         goto exit_free_acb;
2392                 }
2393
2394                 memcpy(acb, ha->saved_acb, acb_len);
2395
2396                 rval = qla4xxx_set_acb(ha, &mbox_cmd[0], &mbox_sts[0], acb_dma);
2397                 if (rval != QLA_SUCCESS)
2398                         goto exit_free_acb;
2399
2400                 break;
2401         default:
2402                 ql4_printk(KERN_ERR, ha, "%s: Invalid ACB Configuration\n",
2403                            __func__);
2404         }
2405
2406 exit_free_acb:
2407         dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk), acb,
2408                           acb_dma);
2409 exit_config_acb:
2410         if ((acb_config == ACB_CONFIG_SET) && ha->saved_acb) {
2411                 kfree(ha->saved_acb);
2412                 ha->saved_acb = NULL;
2413         }
2414         DEBUG2(ql4_printk(KERN_INFO, ha,
2415                           "%s %s\n", __func__,
2416                           rval == QLA_SUCCESS ? "SUCCEEDED" : "FAILED"));
2417         return rval;
2418 }
2419
2420 int qla4_83xx_get_port_config(struct scsi_qla_host *ha, uint32_t *config)
2421 {
2422         uint32_t mbox_cmd[MBOX_REG_COUNT];
2423         uint32_t mbox_sts[MBOX_REG_COUNT];
2424         int status;
2425
2426         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2427         memset(&mbox_sts, 0, sizeof(mbox_sts));
2428
2429         mbox_cmd[0] = MBOX_CMD_GET_PORT_CONFIG;
2430
2431         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
2432                                          mbox_cmd, mbox_sts);
2433         if (status == QLA_SUCCESS)
2434                 *config = mbox_sts[1];
2435         else
2436                 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,
2437                            mbox_sts[0]);
2438
2439         return status;
2440 }
2441
2442 int qla4_83xx_set_port_config(struct scsi_qla_host *ha, uint32_t *config)
2443 {
2444         uint32_t mbox_cmd[MBOX_REG_COUNT];
2445         uint32_t mbox_sts[MBOX_REG_COUNT];
2446         int status;
2447
2448         memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2449         memset(&mbox_sts, 0, sizeof(mbox_sts));
2450
2451         mbox_cmd[0] = MBOX_CMD_SET_PORT_CONFIG;
2452         mbox_cmd[1] = *config;
2453
2454         status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
2455                                 mbox_cmd, mbox_sts);
2456         if (status != QLA_SUCCESS)
2457                 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,
2458                            mbox_sts[0]);
2459
2460         return status;
2461 }