drivers/scsi/qla2xxx/qla_tmpl.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * QLogic Fibre Channel HBA Driver
   4  * Copyright (c)  2003-2014 QLogic Corporation
   5  */
   6 #include "qla_def.h"
   7 #include "qla_tmpl.h"
   8
   9 #define ISPREG(vha)     (&(vha)->hw->iobase->isp24)
  10 #define IOBAR(reg)      offsetof(typeof(*(reg)), iobase_addr)
  11 #define IOBASE(vha)     IOBAR(ISPREG(vha))
  12 #define INVALID_ENTRY ((struct qla27xx_fwdt_entry *)0xffffffffffffffffUL)
  13
  14 static inline void
  15 qla27xx_insert16(uint16_t value, void *buf, ulong *len)
  16 {
  17         if (buf) {
  18                 buf += *len;
  19                 *(__le16 *)buf = cpu_to_le16(value);
  20         }
  21         *len += sizeof(value);
  22 }
  23
  24 static inline void
  25 qla27xx_insert32(uint32_t value, void *buf, ulong *len)
  26 {
  27         if (buf) {
  28                 buf += *len;
  29                 *(__le32 *)buf = cpu_to_le32(value);
  30         }
  31         *len += sizeof(value);
  32 }
  33
  34 static inline void
  35 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len)
  36 {
  37         if (buf && mem && size) {
  38                 buf += *len;
  39                 memcpy(buf, mem, size);
  40         }
  41         *len += size;
  42 }
  43
  44 static inline void
  45 qla27xx_read8(void __iomem *window, void *buf, ulong *len)
  46 {
  47         uint8_t value = ~0;
  48
  49         if (buf) {
  50                 value = rd_reg_byte(window);
  51         }
  52         qla27xx_insert32(value, buf, len);
  53 }
  54
  55 static inline void
  56 qla27xx_read16(void __iomem *window, void *buf, ulong *len)
  57 {
  58         uint16_t value = ~0;
  59
  60         if (buf) {
  61                 value = rd_reg_word(window);
  62         }
  63         qla27xx_insert32(value, buf, len);
  64 }
  65
  66 static inline void
  67 qla27xx_read32(void __iomem *window, void *buf, ulong *len)
  68 {
  69         uint32_t value = ~0;
  70
  71         if (buf) {
  72                 value = rd_reg_dword(window);
  73         }
  74         qla27xx_insert32(value, buf, len);
  75 }
  76
  77 static inline void (*qla27xx_read_vector(uint width))(void __iomem*, void *, ulong *)
  78 {
  79         return
  80             (width == 1) ? qla27xx_read8 :
  81             (width == 2) ? qla27xx_read16 :
  82                            qla27xx_read32;
  83 }
  84
  85 static inline void
  86 qla27xx_read_reg(__iomem struct device_reg_24xx *reg,
  87         uint offset, void *buf, ulong *len)
  88 {
  89         void __iomem *window = (void __iomem *)reg + offset;
  90
  91         qla27xx_read32(window, buf, len);
  92 }
  93
  94 static inline void
  95 qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
  96         uint offset, uint32_t data, void *buf)
  97 {
  98         if (buf) {
  99                 void __iomem *window = (void __iomem *)reg + offset;
 100
 101                 wrt_reg_dword(window, data);
 102         }
 103 }
 104
 105 static inline void
 106 qla27xx_read_window(__iomem struct device_reg_24xx *reg,
 107         uint32_t addr, uint offset, uint count, uint width, void *buf,
 108         ulong *len)
 109 {
 110         void __iomem *window = (void __iomem *)reg + offset;
 111         void (*readn)(void __iomem*, void *, ulong *) = qla27xx_read_vector(width);
 112
 113         qla27xx_write_reg(reg, IOBAR(reg), addr, buf);
 114         while (count--) {
 115                 qla27xx_insert32(addr, buf, len);
 116                 readn(window, buf, len);
 117                 window += width;
 118                 addr++;
 119         }
 120 }
 121
 122 static inline void
 123 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
 124 {
 125         if (buf)
 126                 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
 127 }
 128
 129 static inline struct qla27xx_fwdt_entry *
 130 qla27xx_next_entry(struct qla27xx_fwdt_entry *ent)
 131 {
 132         return (void *)ent + le32_to_cpu(ent->hdr.size);
 133 }
 134
 135 static struct qla27xx_fwdt_entry *
 136 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha,
 137         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 138 {
 139         ql_dbg(ql_dbg_misc, vha, 0xd100,
 140             "%s: nop [%lx]\n", __func__, *len);
 141         qla27xx_skip_entry(ent, buf);
 142
 143         return qla27xx_next_entry(ent);
 144 }
 145
 146 static struct qla27xx_fwdt_entry *
 147 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha,
 148         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 149 {
 150         ql_dbg(ql_dbg_misc, vha, 0xd1ff,
 151             "%s: end [%lx]\n", __func__, *len);
 152         qla27xx_skip_entry(ent, buf);
 153
 154         /* terminate */
 155         return NULL;
 156 }
 157
 158 static struct qla27xx_fwdt_entry *
 159 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha,
 160         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 161 {
 162         ulong addr = le32_to_cpu(ent->t256.base_addr);
 163         uint offset = ent->t256.pci_offset;
 164         ulong count = le16_to_cpu(ent->t256.reg_count);
 165         uint width = ent->t256.reg_width;
 166
 167         ql_dbg(ql_dbg_misc, vha, 0xd200,
 168             "%s: rdio t1 [%lx]\n", __func__, *len);
 169         qla27xx_read_window(ISPREG(vha), addr, offset, count, width, buf, len);
 170
 171         return qla27xx_next_entry(ent);
 172 }
 173
 174 static struct qla27xx_fwdt_entry *
 175 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha,
 176         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 177 {
 178         ulong addr = le32_to_cpu(ent->t257.base_addr);
 179         uint offset = ent->t257.pci_offset;
 180         ulong data = le32_to_cpu(ent->t257.write_data);
 181
 182         ql_dbg(ql_dbg_misc, vha, 0xd201,
 183             "%s: wrio t1 [%lx]\n", __func__, *len);
 184         qla27xx_write_reg(ISPREG(vha), IOBASE(vha), addr, buf);
 185         qla27xx_write_reg(ISPREG(vha), offset, data, buf);
 186
 187         return qla27xx_next_entry(ent);
 188 }
 189
 190 static struct qla27xx_fwdt_entry *
 191 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha,
 192         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 193 {
 194         uint banksel = ent->t258.banksel_offset;
 195         ulong bank = le32_to_cpu(ent->t258.bank);
 196         ulong addr = le32_to_cpu(ent->t258.base_addr);
 197         uint offset = ent->t258.pci_offset;
 198         uint count = le16_to_cpu(ent->t258.reg_count);
 199         uint width = ent->t258.reg_width;
 200
 201         ql_dbg(ql_dbg_misc, vha, 0xd202,
 202             "%s: rdio t2 [%lx]\n", __func__, *len);
 203         qla27xx_write_reg(ISPREG(vha), banksel, bank, buf);
 204         qla27xx_read_window(ISPREG(vha), addr, offset, count, width, buf, len);
 205
 206         return qla27xx_next_entry(ent);
 207 }
 208
 209 static struct qla27xx_fwdt_entry *
 210 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha,
 211         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 212 {
 213         ulong addr = le32_to_cpu(ent->t259.base_addr);
 214         uint banksel = ent->t259.banksel_offset;
 215         ulong bank = le32_to_cpu(ent->t259.bank);
 216         uint offset = ent->t259.pci_offset;
 217         ulong data = le32_to_cpu(ent->t259.write_data);
 218
 219         ql_dbg(ql_dbg_misc, vha, 0xd203,
 220             "%s: wrio t2 [%lx]\n", __func__, *len);
 221         qla27xx_write_reg(ISPREG(vha), IOBASE(vha), addr, buf);
 222         qla27xx_write_reg(ISPREG(vha), banksel, bank, buf);
 223         qla27xx_write_reg(ISPREG(vha), offset, data, buf);
 224
 225         return qla27xx_next_entry(ent);
 226 }
 227
 228 static struct qla27xx_fwdt_entry *
 229 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha,
 230         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 231 {
 232         uint offset = ent->t260.pci_offset;
 233
 234         ql_dbg(ql_dbg_misc, vha, 0xd204,
 235             "%s: rdpci [%lx]\n", __func__, *len);
 236         qla27xx_insert32(offset, buf, len);
 237         qla27xx_read_reg(ISPREG(vha), offset, buf, len);
 238
 239         return qla27xx_next_entry(ent);
 240 }
 241
 242 static struct qla27xx_fwdt_entry *
 243 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha,
 244         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 245 {
 246         uint offset = ent->t261.pci_offset;
 247         ulong data = le32_to_cpu(ent->t261.write_data);
 248
 249         ql_dbg(ql_dbg_misc, vha, 0xd205,
 250             "%s: wrpci [%lx]\n", __func__, *len);
 251         qla27xx_write_reg(ISPREG(vha), offset, data, buf);
 252
 253         return qla27xx_next_entry(ent);
 254 }
 255
 256 static struct qla27xx_fwdt_entry *
 257 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha,
 258         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 259 {
 260         uint area = ent->t262.ram_area;
 261         ulong start = le32_to_cpu(ent->t262.start_addr);
 262         ulong end = le32_to_cpu(ent->t262.end_addr);
 263         ulong dwords;
 264         int rc;
 265
 266         ql_dbg(ql_dbg_misc, vha, 0xd206,
 267             "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len);
 268
 269         if (area == T262_RAM_AREA_CRITICAL_RAM) {
 270                 ;
 271         } else if (area == T262_RAM_AREA_EXTERNAL_RAM) {
 272                 end = vha->hw->fw_memory_size;
 273                 if (buf)
 274                         ent->t262.end_addr = cpu_to_le32(end);
 275         } else if (area == T262_RAM_AREA_SHARED_RAM) {
 276                 start = vha->hw->fw_shared_ram_start;
 277                 end = vha->hw->fw_shared_ram_end;
 278                 if (buf) {
 279                         ent->t262.start_addr = cpu_to_le32(start);
 280                         ent->t262.end_addr = cpu_to_le32(end);
 281                 }
 282         } else if (area == T262_RAM_AREA_DDR_RAM) {
 283                 start = vha->hw->fw_ddr_ram_start;
 284                 end = vha->hw->fw_ddr_ram_end;
 285                 if (buf) {
 286                         ent->t262.start_addr = cpu_to_le32(start);
 287                         ent->t262.end_addr = cpu_to_le32(end);
 288                 }
 289         } else if (area == T262_RAM_AREA_MISC) {
 290                 if (buf) {
 291                         ent->t262.start_addr = cpu_to_le32(start);
 292                         ent->t262.end_addr = cpu_to_le32(end);
 293                 }
 294         } else {
 295                 ql_dbg(ql_dbg_misc, vha, 0xd022,
 296                     "%s: unknown area %x\n", __func__, area);
 297                 qla27xx_skip_entry(ent, buf);
 298                 goto done;
 299         }
 300
 301         if (end < start || start == 0 || end == 0) {
 302                 ql_dbg(ql_dbg_misc, vha, 0xd023,
 303                     "%s: unusable range (start=%lx end=%lx)\n",
 304                     __func__, start, end);
 305                 qla27xx_skip_entry(ent, buf);
 306                 goto done;
 307         }
 308
 309         dwords = end - start + 1;
 310         if (buf) {
 311                 buf += *len;
 312                 rc = qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf);
 313                 if (rc != QLA_SUCCESS) {
 314                         ql_dbg(ql_dbg_async, vha, 0xffff,
 315                             "%s: dump ram MB failed. Area %xh start %lxh end %lxh\n",
 316                             __func__, area, start, end);
 317                         return INVALID_ENTRY;
 318                 }
 319         }
 320         *len += dwords * sizeof(uint32_t);
 321 done:
 322         return qla27xx_next_entry(ent);
 323 }
 324
 325 static struct qla27xx_fwdt_entry *
 326 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha,
 327         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 328 {
 329         uint type = ent->t263.queue_type;
 330         uint count = 0;
 331         uint i;
 332         uint length;
 333
 334         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd207,
 335             "%s: getq(%x) [%lx]\n", __func__, type, *len);
 336         if (type == T263_QUEUE_TYPE_REQ) {
 337                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 338                         struct req_que *req = vha->hw->req_q_map[i];
 339
 340                         if (req || !buf) {
 341                                 length = req ?
 342                                     req->length : REQUEST_ENTRY_CNT_24XX;
 343                                 qla27xx_insert16(i, buf, len);
 344                                 qla27xx_insert16(length, buf, len);
 345                                 qla27xx_insertbuf(req ? req->ring : NULL,
 346                                     length * sizeof(*req->ring), buf, len);
 347                                 count++;
 348                         }
 349                 }
 350         } else if (type == T263_QUEUE_TYPE_RSP) {
 351                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 352                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 353
 354                         if (rsp || !buf) {
 355                                 length = rsp ?
 356                                     rsp->length : RESPONSE_ENTRY_CNT_MQ;
 357                                 qla27xx_insert16(i, buf, len);
 358                                 qla27xx_insert16(length, buf, len);
 359                                 qla27xx_insertbuf(rsp ? rsp->ring : NULL,
 360                                     length * sizeof(*rsp->ring), buf, len);
 361                                 count++;
 362                         }
 363                 }
 364         } else if (QLA_TGT_MODE_ENABLED() &&
 365             ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) {
 366                 struct qla_hw_data *ha = vha->hw;
 367                 struct atio *atr = ha->tgt.atio_ring;
 368
 369                 if (atr || !buf) {
 370                         length = ha->tgt.atio_q_length;
 371                         qla27xx_insert16(0, buf, len);
 372                         qla27xx_insert16(length, buf, len);
 373                         qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len);
 374                         count++;
 375                 }
 376         } else {
 377                 ql_dbg(ql_dbg_misc, vha, 0xd026,
 378                     "%s: unknown queue %x\n", __func__, type);
 379                 qla27xx_skip_entry(ent, buf);
 380         }
 381
 382         if (buf) {
 383                 if (count)
 384                         ent->t263.num_queues = count;
 385                 else
 386                         qla27xx_skip_entry(ent, buf);
 387         }
 388
 389         return qla27xx_next_entry(ent);
 390 }
 391
 392 static struct qla27xx_fwdt_entry *
 393 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha,
 394         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 395 {
 396         ql_dbg(ql_dbg_misc, vha, 0xd208,
 397             "%s: getfce [%lx]\n", __func__, *len);
 398         if (vha->hw->fce) {
 399                 if (buf) {
 400                         ent->t264.fce_trace_size = FCE_SIZE;
 401                         ent->t264.write_pointer = vha->hw->fce_wr;
 402                         ent->t264.base_pointer = vha->hw->fce_dma;
 403                         ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0];
 404                         ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2];
 405                         ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3];
 406                         ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4];
 407                         ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5];
 408                         ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6];
 409                 }
 410                 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len);
 411         } else {
 412                 ql_dbg(ql_dbg_misc, vha, 0xd027,
 413                     "%s: missing fce\n", __func__);
 414                 qla27xx_skip_entry(ent, buf);
 415         }
 416
 417         return qla27xx_next_entry(ent);
 418 }
 419
 420 static struct qla27xx_fwdt_entry *
 421 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
 422         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 423 {
 424         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd209,
 425             "%s: pause risc [%lx]\n", __func__, *len);
 426         if (buf)
 427                 qla24xx_pause_risc(ISPREG(vha), vha->hw);
 428
 429         return qla27xx_next_entry(ent);
 430 }
 431
 432 static struct qla27xx_fwdt_entry *
 433 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha,
 434         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 435 {
 436         ql_dbg(ql_dbg_misc, vha, 0xd20a,
 437             "%s: reset risc [%lx]\n", __func__, *len);
 438         if (buf)
 439                 WARN_ON_ONCE(qla24xx_soft_reset(vha->hw) != QLA_SUCCESS);
 440
 441         return qla27xx_next_entry(ent);
 442 }
 443
 444 static struct qla27xx_fwdt_entry *
 445 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha,
 446         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 447 {
 448         uint offset = ent->t267.pci_offset;
 449         ulong data = le32_to_cpu(ent->t267.data);
 450
 451         ql_dbg(ql_dbg_misc, vha, 0xd20b,
 452             "%s: dis intr [%lx]\n", __func__, *len);
 453         qla27xx_write_reg(ISPREG(vha), offset, data, buf);
 454
 455         return qla27xx_next_entry(ent);
 456 }
 457
 458 static struct qla27xx_fwdt_entry *
 459 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha,
 460         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 461 {
 462         ql_dbg(ql_dbg_misc, vha, 0xd20c,
 463             "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len);
 464         switch (ent->t268.buf_type) {
 465         case T268_BUF_TYPE_EXTD_TRACE:
 466                 if (vha->hw->eft) {
 467                         if (buf) {
 468                                 ent->t268.buf_size = EFT_SIZE;
 469                                 ent->t268.start_addr = vha->hw->eft_dma;
 470                         }
 471                         qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len);
 472                 } else {
 473                         ql_dbg(ql_dbg_misc, vha, 0xd028,
 474                             "%s: missing eft\n", __func__);
 475                         qla27xx_skip_entry(ent, buf);
 476                 }
 477                 break;
 478         case T268_BUF_TYPE_EXCH_BUFOFF:
 479                 if (vha->hw->exchoffld_buf) {
 480                         if (buf) {
 481                                 ent->t268.buf_size = vha->hw->exchoffld_size;
 482                                 ent->t268.start_addr =
 483                                         vha->hw->exchoffld_buf_dma;
 484                         }
 485                         qla27xx_insertbuf(vha->hw->exchoffld_buf,
 486                             vha->hw->exchoffld_size, buf, len);
 487                 } else {
 488                         ql_dbg(ql_dbg_misc, vha, 0xd028,
 489                             "%s: missing exch offld\n", __func__);
 490                         qla27xx_skip_entry(ent, buf);
 491                 }
 492                 break;
 493         case T268_BUF_TYPE_EXTD_LOGIN:
 494                 if (vha->hw->exlogin_buf) {
 495                         if (buf) {
 496                                 ent->t268.buf_size = vha->hw->exlogin_size;
 497                                 ent->t268.start_addr =
 498                                         vha->hw->exlogin_buf_dma;
 499                         }
 500                         qla27xx_insertbuf(vha->hw->exlogin_buf,
 501                             vha->hw->exlogin_size, buf, len);
 502                 } else {
 503                         ql_dbg(ql_dbg_misc, vha, 0xd028,
 504                             "%s: missing ext login\n", __func__);
 505                         qla27xx_skip_entry(ent, buf);
 506                 }
 507                 break;
 508
 509         case T268_BUF_TYPE_REQ_MIRROR:
 510         case T268_BUF_TYPE_RSP_MIRROR:
 511                 /*
 512                  * Mirror pointers are not implemented in the
 513                  * driver, instead shadow pointers are used by
 514                  * the drier. Skip these entries.
 515                  */
 516                 qla27xx_skip_entry(ent, buf);
 517                 break;
 518         default:
 519                 ql_dbg(ql_dbg_async, vha, 0xd02b,
 520                     "%s: unknown buffer %x\n", __func__, ent->t268.buf_type);
 521                 qla27xx_skip_entry(ent, buf);
 522                 break;
 523         }
 524
 525         return qla27xx_next_entry(ent);
 526 }
 527
 528 static struct qla27xx_fwdt_entry *
 529 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha,
 530         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 531 {
 532         ql_dbg(ql_dbg_misc, vha, 0xd20d,
 533             "%s: scratch [%lx]\n", __func__, *len);
 534         qla27xx_insert32(0xaaaaaaaa, buf, len);
 535         qla27xx_insert32(0xbbbbbbbb, buf, len);
 536         qla27xx_insert32(0xcccccccc, buf, len);
 537         qla27xx_insert32(0xdddddddd, buf, len);
 538         qla27xx_insert32(*len + sizeof(uint32_t), buf, len);
 539         if (buf)
 540                 ent->t269.scratch_size = 5 * sizeof(uint32_t);
 541
 542         return qla27xx_next_entry(ent);
 543 }
 544
 545 static struct qla27xx_fwdt_entry *
 546 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha,
 547         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 548 {
 549         ulong addr = le32_to_cpu(ent->t270.addr);
 550         ulong dwords = le32_to_cpu(ent->t270.count);
 551
 552         ql_dbg(ql_dbg_misc, vha, 0xd20e,
 553             "%s: rdremreg [%lx]\n", __func__, *len);
 554         qla27xx_write_reg(ISPREG(vha), IOBASE_ADDR, 0x40, buf);
 555         while (dwords--) {
 556                 qla27xx_write_reg(ISPREG(vha), 0xc0, addr|0x80000000, buf);
 557                 qla27xx_insert32(addr, buf, len);
 558                 qla27xx_read_reg(ISPREG(vha), 0xc4, buf, len);
 559                 addr += sizeof(uint32_t);
 560         }
 561
 562         return qla27xx_next_entry(ent);
 563 }
 564
 565 static struct qla27xx_fwdt_entry *
 566 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha,
 567         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 568 {
 569         ulong addr = le32_to_cpu(ent->t271.addr);
 570         ulong data = le32_to_cpu(ent->t271.data);
 571
 572         ql_dbg(ql_dbg_misc, vha, 0xd20f,
 573             "%s: wrremreg [%lx]\n", __func__, *len);
 574         qla27xx_write_reg(ISPREG(vha), IOBASE(vha), 0x40, buf);
 575         qla27xx_write_reg(ISPREG(vha), 0xc4, data, buf);
 576         qla27xx_write_reg(ISPREG(vha), 0xc0, addr, buf);
 577
 578         return qla27xx_next_entry(ent);
 579 }
 580
 581 static struct qla27xx_fwdt_entry *
 582 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha,
 583         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 584 {
 585         ulong dwords = le32_to_cpu(ent->t272.count);
 586         ulong start = le32_to_cpu(ent->t272.addr);
 587
 588         ql_dbg(ql_dbg_misc, vha, 0xd210,
 589             "%s: rdremram [%lx]\n", __func__, *len);
 590         if (buf) {
 591                 ql_dbg(ql_dbg_misc, vha, 0xd02c,
 592                     "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
 593                 buf += *len;
 594                 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf);
 595         }
 596         *len += dwords * sizeof(uint32_t);
 597
 598         return qla27xx_next_entry(ent);
 599 }
 600
 601 static struct qla27xx_fwdt_entry *
 602 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha,
 603         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 604 {
 605         ulong dwords = le32_to_cpu(ent->t273.count);
 606         ulong addr = le32_to_cpu(ent->t273.addr);
 607         uint32_t value;
 608
 609         ql_dbg(ql_dbg_misc, vha, 0xd211,
 610             "%s: pcicfg [%lx]\n", __func__, *len);
 611         while (dwords--) {
 612                 value = ~0;
 613                 if (pci_read_config_dword(vha->hw->pdev, addr, &value))
 614                         ql_dbg(ql_dbg_misc, vha, 0xd02d,
 615                             "%s: failed pcicfg read at %lx\n", __func__, addr);
 616                 qla27xx_insert32(addr, buf, len);
 617                 qla27xx_insert32(value, buf, len);
 618                 addr += sizeof(uint32_t);
 619         }
 620
 621         return qla27xx_next_entry(ent);
 622 }
 623
 624 static struct qla27xx_fwdt_entry *
 625 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
 626         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 627 {
 628         ulong type = ent->t274.queue_type;
 629         uint count = 0;
 630         uint i;
 631
 632         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd212,
 633             "%s: getqsh(%lx) [%lx]\n", __func__, type, *len);
 634         if (type == T274_QUEUE_TYPE_REQ_SHAD) {
 635                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 636                         struct req_que *req = vha->hw->req_q_map[i];
 637
 638                         if (req || !buf) {
 639                                 qla27xx_insert16(i, buf, len);
 640                                 qla27xx_insert16(1, buf, len);
 641                                 qla27xx_insert32(req && req->out_ptr ?
 642                                     *req->out_ptr : 0, buf, len);
 643                                 count++;
 644                         }
 645                 }
 646         } else if (type == T274_QUEUE_TYPE_RSP_SHAD) {
 647                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 648                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 649
 650                         if (rsp || !buf) {
 651                                 qla27xx_insert16(i, buf, len);
 652                                 qla27xx_insert16(1, buf, len);
 653                                 qla27xx_insert32(rsp && rsp->in_ptr ?
 654                                     *rsp->in_ptr : 0, buf, len);
 655                                 count++;
 656                         }
 657                 }
 658         } else if (QLA_TGT_MODE_ENABLED() &&
 659             ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) {
 660                 struct qla_hw_data *ha = vha->hw;
 661                 struct atio *atr = ha->tgt.atio_ring_ptr;
 662
 663                 if (atr || !buf) {
 664                         qla27xx_insert16(0, buf, len);
 665                         qla27xx_insert16(1, buf, len);
 666                         qla27xx_insert32(ha->tgt.atio_q_in ?
 667                             readl(ha->tgt.atio_q_in) : 0, buf, len);
 668                         count++;
 669                 }
 670         } else {
 671                 ql_dbg(ql_dbg_misc, vha, 0xd02f,
 672                     "%s: unknown queue %lx\n", __func__, type);
 673                 qla27xx_skip_entry(ent, buf);
 674         }
 675
 676         if (buf) {
 677                 if (count)
 678                         ent->t274.num_queues = count;
 679                 else
 680                         qla27xx_skip_entry(ent, buf);
 681         }
 682
 683         return qla27xx_next_entry(ent);
 684 }
 685
 686 static struct qla27xx_fwdt_entry *
 687 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha,
 688         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 689 {
 690         ulong offset = offsetof(typeof(*ent), t275.buffer);
 691         ulong length = le32_to_cpu(ent->t275.length);
 692         ulong size = le32_to_cpu(ent->hdr.size);
 693         void *buffer = ent->t275.buffer;
 694
 695         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd213,
 696             "%s: buffer(%lx) [%lx]\n", __func__, length, *len);
 697         if (!length) {
 698                 ql_dbg(ql_dbg_misc, vha, 0xd020,
 699                     "%s: buffer zero length\n", __func__);
 700                 qla27xx_skip_entry(ent, buf);
 701                 goto done;
 702         }
 703         if (offset + length > size) {
 704                 length = size - offset;
 705                 ql_dbg(ql_dbg_misc, vha, 0xd030,
 706                     "%s: buffer overflow, truncate [%lx]\n", __func__, length);
 707                 ent->t275.length = cpu_to_le32(length);
 708         }
 709
 710         qla27xx_insertbuf(buffer, length, buf, len);
 711 done:
 712         return qla27xx_next_entry(ent);
 713 }
 714
 715 static struct qla27xx_fwdt_entry *
 716 qla27xx_fwdt_entry_t276(struct scsi_qla_host *vha,
 717     struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 718 {
 719         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd214,
 720             "%s: cond [%lx]\n", __func__, *len);
 721
 722         if (buf) {
 723                 ulong cond1 = le32_to_cpu(ent->t276.cond1);
 724                 ulong cond2 = le32_to_cpu(ent->t276.cond2);
 725                 uint type = vha->hw->pdev->device >> 4 & 0xf;
 726                 uint func = vha->hw->port_no & 0x3;
 727
 728                 if (type != cond1 || func != cond2) {
 729                         struct qla27xx_fwdt_template *tmp = buf;
 730
 731                         tmp->count--;
 732                         ent = qla27xx_next_entry(ent);
 733                         qla27xx_skip_entry(ent, buf);
 734                 }
 735         }
 736
 737         return qla27xx_next_entry(ent);
 738 }
 739
 740 static struct qla27xx_fwdt_entry *
 741 qla27xx_fwdt_entry_t277(struct scsi_qla_host *vha,
 742     struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 743 {
 744         ulong cmd_addr = le32_to_cpu(ent->t277.cmd_addr);
 745         ulong wr_cmd_data = le32_to_cpu(ent->t277.wr_cmd_data);
 746         ulong data_addr = le32_to_cpu(ent->t277.data_addr);
 747
 748         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd215,
 749             "%s: rdpep [%lx]\n", __func__, *len);
 750         qla27xx_insert32(wr_cmd_data, buf, len);
 751         qla27xx_write_reg(ISPREG(vha), cmd_addr, wr_cmd_data, buf);
 752         qla27xx_read_reg(ISPREG(vha), data_addr, buf, len);
 753
 754         return qla27xx_next_entry(ent);
 755 }
 756
 757 static struct qla27xx_fwdt_entry *
 758 qla27xx_fwdt_entry_t278(struct scsi_qla_host *vha,
 759     struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 760 {
 761         ulong cmd_addr = le32_to_cpu(ent->t278.cmd_addr);
 762         ulong wr_cmd_data = le32_to_cpu(ent->t278.wr_cmd_data);
 763         ulong data_addr = le32_to_cpu(ent->t278.data_addr);
 764         ulong wr_data = le32_to_cpu(ent->t278.wr_data);
 765
 766         ql_dbg(ql_dbg_misc + ql_dbg_verbose, vha, 0xd216,
 767             "%s: wrpep [%lx]\n", __func__, *len);
 768         qla27xx_write_reg(ISPREG(vha), data_addr, wr_data, buf);
 769         qla27xx_write_reg(ISPREG(vha), cmd_addr, wr_cmd_data, buf);
 770
 771         return qla27xx_next_entry(ent);
 772 }
 773
 774 static struct qla27xx_fwdt_entry *
 775 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha,
 776         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 777 {
 778         ulong type = le32_to_cpu(ent->hdr.type);
 779
 780         ql_dbg(ql_dbg_misc, vha, 0xd2ff,
 781             "%s: other %lx [%lx]\n", __func__, type, *len);
 782         qla27xx_skip_entry(ent, buf);
 783
 784         return qla27xx_next_entry(ent);
 785 }
 786
 787 static struct {
 788         uint type;
 789         typeof(qla27xx_fwdt_entry_other)(*call);
 790 } qla27xx_fwdt_entry_call[] = {
 791         { ENTRY_TYPE_NOP,               qla27xx_fwdt_entry_t0    },
 792         { ENTRY_TYPE_TMP_END,           qla27xx_fwdt_entry_t255  },
 793         { ENTRY_TYPE_RD_IOB_T1,         qla27xx_fwdt_entry_t256  },
 794         { ENTRY_TYPE_WR_IOB_T1,         qla27xx_fwdt_entry_t257  },
 795         { ENTRY_TYPE_RD_IOB_T2,         qla27xx_fwdt_entry_t258  },
 796         { ENTRY_TYPE_WR_IOB_T2,         qla27xx_fwdt_entry_t259  },
 797         { ENTRY_TYPE_RD_PCI,            qla27xx_fwdt_entry_t260  },
 798         { ENTRY_TYPE_WR_PCI,            qla27xx_fwdt_entry_t261  },
 799         { ENTRY_TYPE_RD_RAM,            qla27xx_fwdt_entry_t262  },
 800         { ENTRY_TYPE_GET_QUEUE,         qla27xx_fwdt_entry_t263  },
 801         { ENTRY_TYPE_GET_FCE,           qla27xx_fwdt_entry_t264  },
 802         { ENTRY_TYPE_PSE_RISC,          qla27xx_fwdt_entry_t265  },
 803         { ENTRY_TYPE_RST_RISC,          qla27xx_fwdt_entry_t266  },
 804         { ENTRY_TYPE_DIS_INTR,          qla27xx_fwdt_entry_t267  },
 805         { ENTRY_TYPE_GET_HBUF,          qla27xx_fwdt_entry_t268  },
 806         { ENTRY_TYPE_SCRATCH,           qla27xx_fwdt_entry_t269  },
 807         { ENTRY_TYPE_RDREMREG,          qla27xx_fwdt_entry_t270  },
 808         { ENTRY_TYPE_WRREMREG,          qla27xx_fwdt_entry_t271  },
 809         { ENTRY_TYPE_RDREMRAM,          qla27xx_fwdt_entry_t272  },
 810         { ENTRY_TYPE_PCICFG,            qla27xx_fwdt_entry_t273  },
 811         { ENTRY_TYPE_GET_SHADOW,        qla27xx_fwdt_entry_t274  },
 812         { ENTRY_TYPE_WRITE_BUF,         qla27xx_fwdt_entry_t275  },
 813         { ENTRY_TYPE_CONDITIONAL,       qla27xx_fwdt_entry_t276  },
 814         { ENTRY_TYPE_RDPEPREG,          qla27xx_fwdt_entry_t277  },
 815         { ENTRY_TYPE_WRPEPREG,          qla27xx_fwdt_entry_t278  },
 816         { -1,                           qla27xx_fwdt_entry_other }
 817 };
 818
 819 static inline
 820 typeof(qla27xx_fwdt_entry_call->call)(qla27xx_find_entry(uint type))
 821 {
 822         typeof(*qla27xx_fwdt_entry_call) *list = qla27xx_fwdt_entry_call;
 823
 824         while (list->type < type)
 825                 list++;
 826
 827         if (list->type == type)
 828                 return list->call;
 829         return qla27xx_fwdt_entry_other;
 830 }
 831
 832 static void
 833 qla27xx_walk_template(struct scsi_qla_host *vha,
 834         struct qla27xx_fwdt_template *tmp, void *buf, ulong *len)
 835 {
 836         struct qla27xx_fwdt_entry *ent = (void *)tmp +
 837             le32_to_cpu(tmp->entry_offset);
 838         ulong type;
 839
 840         tmp->count = le32_to_cpu(tmp->entry_count);
 841         ql_dbg(ql_dbg_misc, vha, 0xd01a,
 842             "%s: entry count %u\n", __func__, tmp->count);
 843         while (ent && tmp->count--) {
 844                 type = le32_to_cpu(ent->hdr.type);
 845                 ent = qla27xx_find_entry(type)(vha, ent, buf, len);
 846                 if (!ent)
 847                         break;
 848
 849                 if (ent == INVALID_ENTRY) {
 850                         *len = 0;
 851                         ql_dbg(ql_dbg_async, vha, 0xffff,
 852                             "Unable to capture FW dump");
 853                         goto bailout;
 854                 }
 855         }
 856
 857         if (tmp->count)
 858                 ql_dbg(ql_dbg_misc, vha, 0xd018,
 859                     "%s: entry count residual=+%u\n", __func__, tmp->count);
 860
 861         if (ent)
 862                 ql_dbg(ql_dbg_misc, vha, 0xd019,
 863                     "%s: missing end entry\n", __func__);
 864
 865 bailout:
 866         cpu_to_le32s(&tmp->count);      /* endianize residual count */
 867 }
 868
 869 static void
 870 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp)
 871 {
 872         tmp->capture_timestamp = cpu_to_le32(jiffies);
 873 }
 874
 875 static void
 876 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp)
 877 {
 878         uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
 879
 880         WARN_ON_ONCE(sscanf(qla2x00_version_str,
 881                             "%hhu.%hhu.%hhu.%hhu",
 882                             v + 0, v + 1, v + 2, v + 3) != 4);
 883
 884         tmp->driver_info[0] = cpu_to_le32(
 885                 v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0]);
 886         tmp->driver_info[1] = cpu_to_le32(v[5] << 8 | v[4]);
 887         tmp->driver_info[2] = __constant_cpu_to_le32(0x12345678);
 888 }
 889
 890 static void
 891 qla27xx_firmware_info(struct scsi_qla_host *vha,
 892     struct qla27xx_fwdt_template *tmp)
 893 {
 894         tmp->firmware_version[0] = cpu_to_le32(vha->hw->fw_major_version);
 895         tmp->firmware_version[1] = cpu_to_le32(vha->hw->fw_minor_version);
 896         tmp->firmware_version[2] = cpu_to_le32(vha->hw->fw_subminor_version);
 897         tmp->firmware_version[3] = cpu_to_le32(
 898                 vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes);
 899         tmp->firmware_version[4] = cpu_to_le32(
 900           vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0]);
 901 }
 902
 903 static void
 904 ql27xx_edit_template(struct scsi_qla_host *vha,
 905         struct qla27xx_fwdt_template *tmp)
 906 {
 907         qla27xx_time_stamp(tmp);
 908         qla27xx_driver_info(tmp);
 909         qla27xx_firmware_info(vha, tmp);
 910 }
 911
 912 static inline uint32_t
 913 qla27xx_template_checksum(void *p, ulong size)
 914 {
 915         __le32 *buf = p;
 916         uint64_t sum = 0;
 917
 918         size /= sizeof(*buf);
 919
 920         for ( ; size--; buf++)
 921                 sum += le32_to_cpu(*buf);
 922
 923         sum = (sum & 0xffffffff) + (sum >> 32);
 924
 925         return ~sum;
 926 }
 927
 928 static inline int
 929 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp)
 930 {
 931         return qla27xx_template_checksum(tmp,
 932                 le32_to_cpu(tmp->template_size)) == 0;
 933 }
 934
 935 static inline int
 936 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp)
 937 {
 938         return le32_to_cpu(tmp->template_type) == TEMPLATE_TYPE_FWDUMP;
 939 }
 940
 941 static ulong
 942 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha,
 943     struct qla27xx_fwdt_template *tmp, void *buf)
 944 {
 945         ulong len = 0;
 946
 947         if (qla27xx_fwdt_template_valid(tmp)) {
 948                 len = le32_to_cpu(tmp->template_size);
 949                 tmp = memcpy(buf, tmp, len);
 950                 ql27xx_edit_template(vha, tmp);
 951                 qla27xx_walk_template(vha, tmp, buf, &len);
 952         }
 953
 954         return len;
 955 }
 956
 957 ulong
 958 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha, void *p)
 959 {
 960         struct qla27xx_fwdt_template *tmp = p;
 961         ulong len = 0;
 962
 963         if (qla27xx_fwdt_template_valid(tmp)) {
 964                 len = le32_to_cpu(tmp->template_size);
 965                 qla27xx_walk_template(vha, tmp, NULL, &len);
 966         }
 967
 968         return len;
 969 }
 970
 971 ulong
 972 qla27xx_fwdt_template_size(void *p)
 973 {
 974         struct qla27xx_fwdt_template *tmp = p;
 975
 976         return le32_to_cpu(tmp->template_size);
 977 }
 978
 979 int
 980 qla27xx_fwdt_template_valid(void *p)
 981 {
 982         struct qla27xx_fwdt_template *tmp = p;
 983
 984         if (!qla27xx_verify_template_header(tmp)) {
 985                 ql_log(ql_log_warn, NULL, 0xd01c,
 986                     "%s: template type %x\n", __func__,
 987                     le32_to_cpu(tmp->template_type));
 988                 return false;
 989         }
 990
 991         if (!qla27xx_verify_template_checksum(tmp)) {
 992                 ql_log(ql_log_warn, NULL, 0xd01d,
 993                     "%s: failed template checksum\n", __func__);
 994                 return false;
 995         }
 996
 997         return true;
 998 }
 999
1000 void
1001 qla27xx_mpi_fwdump(scsi_qla_host_t *vha, int hardware_locked)
1002 {
1003         ulong flags = 0;
1004
1005         if (!hardware_locked)
1006                 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
1007         if (!vha->hw->mpi_fw_dump) {
1008                 ql_log(ql_log_warn, vha, 0x02f3, "-> mpi_fwdump no buffer\n");
1009         } else {
1010                 struct fwdt *fwdt = &vha->hw->fwdt[1];
1011                 ulong len;
1012                 void *buf = vha->hw->mpi_fw_dump;
1013                 bool walk_template_only = false;
1014
1015                 if (vha->hw->mpi_fw_dumped) {
1016                         /* Use the spare area for any further dumps. */
1017                         buf += fwdt->dump_size;
1018                         walk_template_only = true;
1019                         ql_log(ql_log_warn, vha, 0x02f4,
1020                                "-> MPI firmware already dumped -- dump saving to temporary buffer %p.\n",
1021                                buf);
1022                 }
1023
1024                 ql_log(ql_log_warn, vha, 0x02f5, "-> fwdt1 running...\n");
1025                 if (!fwdt->template) {
1026                         ql_log(ql_log_warn, vha, 0x02f6,
1027                                "-> fwdt1 no template\n");
1028                         goto bailout;
1029                 }
1030                 len = qla27xx_execute_fwdt_template(vha, fwdt->template, buf);
1031                 if (len == 0) {
1032                         goto bailout;
1033                 } else if (len != fwdt->dump_size) {
1034                         ql_log(ql_log_warn, vha, 0x02f7,
1035                                "-> fwdt1 fwdump residual=%+ld\n",
1036                                fwdt->dump_size - len);
1037                 }
1038                 vha->hw->stat.num_mpi_reset++;
1039                 if (walk_template_only)
1040                         goto bailout;
1041
1042                 vha->hw->mpi_fw_dump_len = len;
1043                 vha->hw->mpi_fw_dumped = 1;
1044
1045                 ql_log(ql_log_warn, vha, 0x02f8,
1046                        "-> MPI firmware dump saved to buffer (%lu/%p)\n",
1047                        vha->host_no, vha->hw->mpi_fw_dump);
1048                 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
1049         }
1050
1051 bailout:
1052         if (!hardware_locked)
1053                 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
1054 }
1055
1056 void
1057 qla27xx_fwdump(scsi_qla_host_t *vha)
1058 {
1059         lockdep_assert_held(&vha->hw->hardware_lock);
1060
1061         if (!vha->hw->fw_dump) {
1062                 ql_log(ql_log_warn, vha, 0xd01e, "-> fwdump no buffer\n");
1063         } else if (vha->hw->fw_dumped) {
1064                 ql_log(ql_log_warn, vha, 0xd01f,
1065                     "-> Firmware already dumped (%p) -- ignoring request\n",
1066                     vha->hw->fw_dump);
1067         } else {
1068                 struct fwdt *fwdt = vha->hw->fwdt;
1069                 ulong len;
1070                 void *buf = vha->hw->fw_dump;
1071
1072                 ql_log(ql_log_warn, vha, 0xd011, "-> fwdt0 running...\n");
1073                 if (!fwdt->template) {
1074                         ql_log(ql_log_warn, vha, 0xd012,
1075                                "-> fwdt0 no template\n");
1076                         return;
1077                 }
1078                 len = qla27xx_execute_fwdt_template(vha, fwdt->template, buf);
1079                 if (len == 0) {
1080                         return;
1081                 } else if (len != fwdt->dump_size) {
1082                         ql_log(ql_log_warn, vha, 0xd013,
1083                                "-> fwdt0 fwdump residual=%+ld\n",
1084                                 fwdt->dump_size - len);
1085                 }
1086
1087                 vha->hw->fw_dump_len = len;
1088                 vha->hw->fw_dumped = true;
1089
1090                 ql_log(ql_log_warn, vha, 0xd015,
1091                     "-> Firmware dump saved to buffer (%lu/%p) <%lx>\n",
1092                     vha->host_no, vha->hw->fw_dump, vha->hw->fw_dump_cap_flags);
1093                 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
1094         }
1095 }