drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     64
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 64.");
 122
 123 #if (IS_ENABLED(CONFIG_NVME_FC))
 124 int ql2xenabledif;
 125 #else
 126 int ql2xenabledif = 2;
 127 #endif
 128 module_param(ql2xenabledif, int, S_IRUGO);
 129 MODULE_PARM_DESC(ql2xenabledif,
 130                 " Enable T10-CRC-DIF:\n"
 131                 " Default is 2.\n"
 132                 "  0 -- No DIF Support\n"
 133                 "  1 -- Enable DIF for all types\n"
 134                 "  2 -- Enable DIF for all types, except Type 0.\n");
 135
 136 #if (IS_ENABLED(CONFIG_NVME_FC))
 137 int ql2xnvmeenable = 1;
 138 #else
 139 int ql2xnvmeenable;
 140 #endif
 141 module_param(ql2xnvmeenable, int, 0644);
 142 MODULE_PARM_DESC(ql2xnvmeenable,
 143     "Enables NVME support. "
 144     "0 - no NVMe.  Default is Y");
 145
 146 int ql2xenablehba_err_chk = 2;
 147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 149                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 150                 " Default is 2.\n"
 151                 "  0 -- Error isolation disabled\n"
 152                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 153                 "  2 -- Error isolation enabled for all Types\n");
 154
 155 int ql2xiidmaenable=1;
 156 module_param(ql2xiidmaenable, int, S_IRUGO);
 157 MODULE_PARM_DESC(ql2xiidmaenable,
 158                 "Enables iIDMA settings "
 159                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 160
 161 int ql2xmqsupport = 1;
 162 module_param(ql2xmqsupport, int, S_IRUGO);
 163 MODULE_PARM_DESC(ql2xmqsupport,
 164                 "Enable on demand multiple queue pairs support "
 165                 "Default is 1 for supported. "
 166                 "Set it to 0 to turn off mq qpair support.");
 167
 168 int ql2xfwloadbin;
 169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 171 MODULE_PARM_DESC(ql2xfwloadbin,
 172                 "Option to specify location from which to load ISP firmware:.\n"
 173                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 174                 "      interface.\n"
 175                 " 1 -- load firmware from flash.\n"
 176                 " 0 -- use default semantics.\n");
 177
 178 int ql2xetsenable;
 179 module_param(ql2xetsenable, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xetsenable,
 181                 "Enables firmware ETS burst."
 182                 "Default is 0 - skip ETS enablement.");
 183
 184 int ql2xdbwr = 1;
 185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 186 MODULE_PARM_DESC(ql2xdbwr,
 187                 "Option to specify scheme for request queue posting.\n"
 188                 " 0 -- Regular doorbell.\n"
 189                 " 1 -- CAMRAM doorbell (faster).\n");
 190
 191 int ql2xtargetreset = 1;
 192 module_param(ql2xtargetreset, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xtargetreset,
 194                  "Enable target reset."
 195                  "Default is 1 - use hw defaults.");
 196
 197 int ql2xgffidenable;
 198 module_param(ql2xgffidenable, int, S_IRUGO);
 199 MODULE_PARM_DESC(ql2xgffidenable,
 200                 "Enables GFF_ID checks of port type. "
 201                 "Default is 0 - Do not use GFF_ID information.");
 202
 203 int ql2xasynctmfenable = 1;
 204 module_param(ql2xasynctmfenable, int, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xasynctmfenable,
 206                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 207                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 208
 209 int ql2xdontresethba;
 210 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 211 MODULE_PARM_DESC(ql2xdontresethba,
 212                 "Option to specify reset behaviour.\n"
 213                 " 0 (Default) -- Reset on failure.\n"
 214                 " 1 -- Do not reset on failure.\n");
 215
 216 uint64_t ql2xmaxlun = MAX_LUNS;
 217 module_param(ql2xmaxlun, ullong, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmaxlun,
 219                 "Defines the maximum LU number to register with the SCSI "
 220                 "midlayer. Default is 65535.");
 221
 222 int ql2xmdcapmask = 0x1F;
 223 module_param(ql2xmdcapmask, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xmdcapmask,
 225                 "Set the Minidump driver capture mask level. "
 226                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 227
 228 int ql2xmdenable = 1;
 229 module_param(ql2xmdenable, int, S_IRUGO);
 230 MODULE_PARM_DESC(ql2xmdenable,
 231                 "Enable/disable MiniDump. "
 232                 "0 - MiniDump disabled. "
 233                 "1 (Default) - MiniDump enabled.");
 234
 235 int ql2xexlogins = 0;
 236 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 237 MODULE_PARM_DESC(ql2xexlogins,
 238                  "Number of extended Logins. "
 239                  "0 (Default)- Disabled.");
 240
 241 int ql2xexchoffld = 1024;
 242 module_param(ql2xexchoffld, uint, 0644);
 243 MODULE_PARM_DESC(ql2xexchoffld,
 244         "Number of target exchanges.");
 245
 246 int ql2xiniexchg = 1024;
 247 module_param(ql2xiniexchg, uint, 0644);
 248 MODULE_PARM_DESC(ql2xiniexchg,
 249         "Number of initiator exchanges.");
 250
 251 int ql2xfwholdabts = 0;
 252 module_param(ql2xfwholdabts, int, S_IRUGO);
 253 MODULE_PARM_DESC(ql2xfwholdabts,
 254                 "Allow FW to hold status IOCB until ABTS rsp received. "
 255                 "0 (Default) Do not set fw option. "
 256                 "1 - Set fw option to hold ABTS.");
 257
 258 int ql2xmvasynctoatio = 1;
 259 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 260 MODULE_PARM_DESC(ql2xmvasynctoatio,
 261                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 262                 "0 (Default). Do not move IOCBs"
 263                 "1 - Move IOCBs.");
 264
 265 int ql2xautodetectsfp = 1;
 266 module_param(ql2xautodetectsfp, int, 0444);
 267 MODULE_PARM_DESC(ql2xautodetectsfp,
 268                  "Detect SFP range and set appropriate distance.\n"
 269                  "1 (Default): Enable\n");
 270
 271 /*
 272  * SCSI host template entry points
 273  */
 274 static int qla2xxx_slave_configure(struct scsi_device * device);
 275 static int qla2xxx_slave_alloc(struct scsi_device *);
 276 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 277 static void qla2xxx_scan_start(struct Scsi_Host *);
 278 static void qla2xxx_slave_destroy(struct scsi_device *);
 279 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 280 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 281 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 282 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 283 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 284 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 285
 286 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 287 static void qla2x00_free_device(scsi_qla_host_t *);
 288 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 289 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 290 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 291
 292 struct scsi_host_template qla2xxx_driver_template = {
 293         .module                 = THIS_MODULE,
 294         .name                   = QLA2XXX_DRIVER_NAME,
 295         .queuecommand           = qla2xxx_queuecommand,
 296
 297         .eh_timed_out           = fc_eh_timed_out,
 298         .eh_abort_handler       = qla2xxx_eh_abort,
 299         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 300         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 301         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 302         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 303
 304         .slave_configure        = qla2xxx_slave_configure,
 305
 306         .slave_alloc            = qla2xxx_slave_alloc,
 307         .slave_destroy          = qla2xxx_slave_destroy,
 308         .scan_finished          = qla2xxx_scan_finished,
 309         .scan_start             = qla2xxx_scan_start,
 310         .change_queue_depth     = scsi_change_queue_depth,
 311         .map_queues             = qla2xxx_map_queues,
 312         .this_id                = -1,
 313         .cmd_per_lun            = 3,
 314         .use_clustering         = ENABLE_CLUSTERING,
 315         .sg_tablesize           = SG_ALL,
 316
 317         .max_sectors            = 0xFFFF,
 318         .shost_attrs            = qla2x00_host_attrs,
 319
 320         .supported_mode         = MODE_INITIATOR,
 321         .track_queue_depth      = 1,
 322 };
 323
 324 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 325 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 326
 327 /* TODO Convert to inlines
 328  *
 329  * Timer routines
 330  */
 331
 332 __inline__ void
 333 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 334 {
 335         init_timer(&vha->timer);
 336         vha->timer.expires = jiffies + interval * HZ;
 337         vha->timer.data = (unsigned long)vha;
 338         vha->timer.function = (void (*)(unsigned long))func;
 339         add_timer(&vha->timer);
 340         vha->timer_active = 1;
 341 }
 342
 343 static inline void
 344 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 345 {
 346         /* Currently used for 82XX only. */
 347         if (vha->device_flags & DFLG_DEV_FAILED) {
 348                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 349                     "Device in a failed state, returning.\n");
 350                 return;
 351         }
 352
 353         mod_timer(&vha->timer, jiffies + interval * HZ);
 354 }
 355
 356 static __inline__ void
 357 qla2x00_stop_timer(scsi_qla_host_t *vha)
 358 {
 359         del_timer_sync(&vha->timer);
 360         vha->timer_active = 0;
 361 }
 362
 363 static int qla2x00_do_dpc(void *data);
 364
 365 static void qla2x00_rst_aen(scsi_qla_host_t *);
 366
 367 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 368         struct req_que **, struct rsp_que **);
 369 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 370 static void qla2x00_mem_free(struct qla_hw_data *);
 371 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 372         struct qla_qpair *qpair);
 373
 374 /* -------------------------------------------------------------------------- */
 375 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 376     struct rsp_que *rsp)
 377 {
 378         struct qla_hw_data *ha = vha->hw;
 379         rsp->qpair = ha->base_qpair;
 380         rsp->req = req;
 381         ha->base_qpair->req = req;
 382         ha->base_qpair->rsp = rsp;
 383         ha->base_qpair->vha = vha;
 384         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 385         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 386         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 387         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 388         INIT_LIST_HEAD(&ha->base_qpair->nvme_done_list);
 389         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 390         /* init qpair to this cpu. Will adjust at run time. */
 391         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 392         ha->base_qpair->pdev = ha->pdev;
 393
 394         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 395                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 396 }
 397
 398 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 399                                 struct rsp_que *rsp)
 400 {
 401         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 402         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 403                                 GFP_KERNEL);
 404         if (!ha->req_q_map) {
 405                 ql_log(ql_log_fatal, vha, 0x003b,
 406                     "Unable to allocate memory for request queue ptrs.\n");
 407                 goto fail_req_map;
 408         }
 409
 410         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 411                                 GFP_KERNEL);
 412         if (!ha->rsp_q_map) {
 413                 ql_log(ql_log_fatal, vha, 0x003c,
 414                     "Unable to allocate memory for response queue ptrs.\n");
 415                 goto fail_rsp_map;
 416         }
 417
 418         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 419         if (ha->base_qpair == NULL) {
 420                 ql_log(ql_log_warn, vha, 0x00e0,
 421                     "Failed to allocate base queue pair memory.\n");
 422                 goto fail_base_qpair;
 423         }
 424
 425         qla_init_base_qpair(vha, req, rsp);
 426
 427         if (ql2xmqsupport && ha->max_qpairs) {
 428                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 429                         GFP_KERNEL);
 430                 if (!ha->queue_pair_map) {
 431                         ql_log(ql_log_fatal, vha, 0x0180,
 432                             "Unable to allocate memory for queue pair ptrs.\n");
 433                         goto fail_qpair_map;
 434                 }
 435         }
 436
 437         /*
 438          * Make sure we record at least the request and response queue zero in
 439          * case we need to free them if part of the probe fails.
 440          */
 441         ha->rsp_q_map[0] = rsp;
 442         ha->req_q_map[0] = req;
 443         set_bit(0, ha->rsp_qid_map);
 444         set_bit(0, ha->req_qid_map);
 445         return 0;
 446
 447 fail_qpair_map:
 448         kfree(ha->base_qpair);
 449         ha->base_qpair = NULL;
 450 fail_base_qpair:
 451         kfree(ha->rsp_q_map);
 452         ha->rsp_q_map = NULL;
 453 fail_rsp_map:
 454         kfree(ha->req_q_map);
 455         ha->req_q_map = NULL;
 456 fail_req_map:
 457         return -ENOMEM;
 458 }
 459
 460 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 461 {
 462         if (IS_QLAFX00(ha)) {
 463                 if (req && req->ring_fx00)
 464                         dma_free_coherent(&ha->pdev->dev,
 465                             (req->length_fx00 + 1) * sizeof(request_t),
 466                             req->ring_fx00, req->dma_fx00);
 467         } else if (req && req->ring)
 468                 dma_free_coherent(&ha->pdev->dev,
 469                 (req->length + 1) * sizeof(request_t),
 470                 req->ring, req->dma);
 471
 472         if (req)
 473                 kfree(req->outstanding_cmds);
 474
 475         kfree(req);
 476 }
 477
 478 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 479 {
 480         if (IS_QLAFX00(ha)) {
 481                 if (rsp && rsp->ring)
 482                         dma_free_coherent(&ha->pdev->dev,
 483                             (rsp->length_fx00 + 1) * sizeof(request_t),
 484                             rsp->ring_fx00, rsp->dma_fx00);
 485         } else if (rsp && rsp->ring) {
 486                 dma_free_coherent(&ha->pdev->dev,
 487                 (rsp->length + 1) * sizeof(response_t),
 488                 rsp->ring, rsp->dma);
 489         }
 490         kfree(rsp);
 491 }
 492
 493 static void qla2x00_free_queues(struct qla_hw_data *ha)
 494 {
 495         struct req_que *req;
 496         struct rsp_que *rsp;
 497         int cnt;
 498         unsigned long flags;
 499
 500         if (ha->queue_pair_map) {
 501                 kfree(ha->queue_pair_map);
 502                 ha->queue_pair_map = NULL;
 503         }
 504         if (ha->base_qpair) {
 505                 kfree(ha->base_qpair);
 506                 ha->base_qpair = NULL;
 507         }
 508
 509         spin_lock_irqsave(&ha->hardware_lock, flags);
 510         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 511                 if (!test_bit(cnt, ha->req_qid_map))
 512                         continue;
 513
 514                 req = ha->req_q_map[cnt];
 515                 clear_bit(cnt, ha->req_qid_map);
 516                 ha->req_q_map[cnt] = NULL;
 517
 518                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 519                 qla2x00_free_req_que(ha, req);
 520                 spin_lock_irqsave(&ha->hardware_lock, flags);
 521         }
 522         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 523
 524         kfree(ha->req_q_map);
 525         ha->req_q_map = NULL;
 526
 527
 528         spin_lock_irqsave(&ha->hardware_lock, flags);
 529         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 530                 if (!test_bit(cnt, ha->rsp_qid_map))
 531                         continue;
 532
 533                 rsp = ha->rsp_q_map[cnt];
 534                 clear_bit(cnt, ha->rsp_qid_map);
 535                 ha->rsp_q_map[cnt] =  NULL;
 536                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 537                 qla2x00_free_rsp_que(ha, rsp);
 538                 spin_lock_irqsave(&ha->hardware_lock, flags);
 539         }
 540         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 541
 542         kfree(ha->rsp_q_map);
 543         ha->rsp_q_map = NULL;
 544 }
 545
 546 static char *
 547 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 548 {
 549         struct qla_hw_data *ha = vha->hw;
 550         static char *pci_bus_modes[] = {
 551                 "33", "66", "100", "133",
 552         };
 553         uint16_t pci_bus;
 554
 555         strcpy(str, "PCI");
 556         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 557         if (pci_bus) {
 558                 strcat(str, "-X (");
 559                 strcat(str, pci_bus_modes[pci_bus]);
 560         } else {
 561                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 562                 strcat(str, " (");
 563                 strcat(str, pci_bus_modes[pci_bus]);
 564         }
 565         strcat(str, " MHz)");
 566
 567         return (str);
 568 }
 569
 570 static char *
 571 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 572 {
 573         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 574         struct qla_hw_data *ha = vha->hw;
 575         uint32_t pci_bus;
 576
 577         if (pci_is_pcie(ha->pdev)) {
 578                 char lwstr[6];
 579                 uint32_t lstat, lspeed, lwidth;
 580
 581                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 582                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 583                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 584
 585                 strcpy(str, "PCIe (");
 586                 switch (lspeed) {
 587                 case 1:
 588                         strcat(str, "2.5GT/s ");
 589                         break;
 590                 case 2:
 591                         strcat(str, "5.0GT/s ");
 592                         break;
 593                 case 3:
 594                         strcat(str, "8.0GT/s ");
 595                         break;
 596                 default:
 597                         strcat(str, "<unknown> ");
 598                         break;
 599                 }
 600                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 601                 strcat(str, lwstr);
 602
 603                 return str;
 604         }
 605
 606         strcpy(str, "PCI");
 607         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 608         if (pci_bus == 0 || pci_bus == 8) {
 609                 strcat(str, " (");
 610                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 611         } else {
 612                 strcat(str, "-X ");
 613                 if (pci_bus & BIT_2)
 614                         strcat(str, "Mode 2");
 615                 else
 616                         strcat(str, "Mode 1");
 617                 strcat(str, " (");
 618                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 619         }
 620         strcat(str, " MHz)");
 621
 622         return str;
 623 }
 624
 625 static char *
 626 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 627 {
 628         char un_str[10];
 629         struct qla_hw_data *ha = vha->hw;
 630
 631         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 632             ha->fw_minor_version, ha->fw_subminor_version);
 633
 634         if (ha->fw_attributes & BIT_9) {
 635                 strcat(str, "FLX");
 636                 return (str);
 637         }
 638
 639         switch (ha->fw_attributes & 0xFF) {
 640         case 0x7:
 641                 strcat(str, "EF");
 642                 break;
 643         case 0x17:
 644                 strcat(str, "TP");
 645                 break;
 646         case 0x37:
 647                 strcat(str, "IP");
 648                 break;
 649         case 0x77:
 650                 strcat(str, "VI");
 651                 break;
 652         default:
 653                 sprintf(un_str, "(%x)", ha->fw_attributes);
 654                 strcat(str, un_str);
 655                 break;
 656         }
 657         if (ha->fw_attributes & 0x100)
 658                 strcat(str, "X");
 659
 660         return (str);
 661 }
 662
 663 static char *
 664 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 665 {
 666         struct qla_hw_data *ha = vha->hw;
 667
 668         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 669             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 670         return str;
 671 }
 672
 673 void
 674 qla2x00_sp_free_dma(void *ptr)
 675 {
 676         srb_t *sp = ptr;
 677         struct qla_hw_data *ha = sp->vha->hw;
 678         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 679         void *ctx = GET_CMD_CTX_SP(sp);
 680
 681         if (sp->flags & SRB_DMA_VALID) {
 682                 scsi_dma_unmap(cmd);
 683                 sp->flags &= ~SRB_DMA_VALID;
 684         }
 685
 686         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 687                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 688                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 689                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 690         }
 691
 692         if (!ctx)
 693                 goto end;
 694
 695         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 696                 /* List assured to be having elements */
 697                 qla2x00_clean_dsd_pool(ha, ctx);
 698                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 699         }
 700
 701         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 702                 struct crc_context *ctx0 = ctx;
 703
 704                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 705                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 706         }
 707
 708         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 709                 struct ct6_dsd *ctx1 = ctx;
 710
 711                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 712                     ctx1->fcp_cmnd_dma);
 713                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 714                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 715                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 716                 mempool_free(ctx1, ha->ctx_mempool);
 717         }
 718
 719 end:
 720         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 721                 CMD_SP(cmd) = NULL;
 722                 qla2x00_rel_sp(sp);
 723         }
 724 }
 725
 726 void
 727 qla2x00_sp_compl(void *ptr, int res)
 728 {
 729         srb_t *sp = ptr;
 730         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 731
 732         cmd->result = res;
 733
 734         if (atomic_read(&sp->ref_count) == 0) {
 735                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 736                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 737                     sp, GET_CMD_SP(sp));
 738                 if (ql2xextended_error_logging & ql_dbg_io)
 739                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 740                 return;
 741         }
 742         if (!atomic_dec_and_test(&sp->ref_count))
 743                 return;
 744
 745         sp->free(sp);
 746         cmd->scsi_done(cmd);
 747 }
 748
 749 void
 750 qla2xxx_qpair_sp_free_dma(void *ptr)
 751 {
 752         srb_t *sp = (srb_t *)ptr;
 753         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 754         struct qla_hw_data *ha = sp->fcport->vha->hw;
 755         void *ctx = GET_CMD_CTX_SP(sp);
 756
 757         if (sp->flags & SRB_DMA_VALID) {
 758                 scsi_dma_unmap(cmd);
 759                 sp->flags &= ~SRB_DMA_VALID;
 760         }
 761
 762         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 763                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 764                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 765                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 766         }
 767
 768         if (!ctx)
 769                 goto end;
 770
 771         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 772                 /* List assured to be having elements */
 773                 qla2x00_clean_dsd_pool(ha, ctx);
 774                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 775         }
 776
 777         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 778                 struct crc_context *ctx0 = ctx;
 779
 780                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 781                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 782         }
 783
 784         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 785                 struct ct6_dsd *ctx1 = ctx;
 786                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 787                     ctx1->fcp_cmnd_dma);
 788                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 789                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 790                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 791                 mempool_free(ctx1, ha->ctx_mempool);
 792         }
 793 end:
 794         CMD_SP(cmd) = NULL;
 795         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 796 }
 797
 798 void
 799 qla2xxx_qpair_sp_compl(void *ptr, int res)
 800 {
 801         srb_t *sp = ptr;
 802         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 803
 804         cmd->result = res;
 805
 806         if (atomic_read(&sp->ref_count) == 0) {
 807                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 808                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 809                     sp, GET_CMD_SP(sp));
 810                 if (ql2xextended_error_logging & ql_dbg_io)
 811                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 812                 return;
 813         }
 814         if (!atomic_dec_and_test(&sp->ref_count))
 815                 return;
 816
 817         sp->free(sp);
 818         cmd->scsi_done(cmd);
 819 }
 820
 821 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 822  * does not have the changes necessary to avoid taking host->host_lock.
 823  */
 824 static int
 825 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 826 {
 827         scsi_qla_host_t *vha = shost_priv(host);
 828         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 829         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 830         struct qla_hw_data *ha = vha->hw;
 831         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 832         srb_t *sp;
 833         int rval;
 834         struct qla_qpair *qpair = NULL;
 835         uint32_t tag;
 836         uint16_t hwq;
 837
 838         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 839                 cmd->result = DID_NO_CONNECT << 16;
 840                 goto qc24_fail_command;
 841         }
 842
 843         if (ha->mqenable) {
 844                 if (shost_use_blk_mq(vha->host)) {
 845                         tag = blk_mq_unique_tag(cmd->request);
 846                         hwq = blk_mq_unique_tag_to_hwq(tag);
 847                         qpair = ha->queue_pair_map[hwq];
 848                 } else if (vha->vp_idx && vha->qpair) {
 849                         qpair = vha->qpair;
 850                 }
 851
 852                 if (qpair)
 853                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 854         }
 855
 856         if (ha->flags.eeh_busy) {
 857                 if (ha->flags.pci_channel_io_perm_failure) {
 858                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 859                             "PCI Channel IO permanent failure, exiting "
 860                             "cmd=%p.\n", cmd);
 861                         cmd->result = DID_NO_CONNECT << 16;
 862                 } else {
 863                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 864                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 865                         cmd->result = DID_REQUEUE << 16;
 866                 }
 867                 goto qc24_fail_command;
 868         }
 869
 870         rval = fc_remote_port_chkready(rport);
 871         if (rval) {
 872                 cmd->result = rval;
 873                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 874                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 875                     cmd, rval);
 876                 goto qc24_fail_command;
 877         }
 878
 879         if (!vha->flags.difdix_supported &&
 880                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 881                         ql_dbg(ql_dbg_io, vha, 0x3004,
 882                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 883                             cmd);
 884                         cmd->result = DID_NO_CONNECT << 16;
 885                         goto qc24_fail_command;
 886         }
 887
 888         if (!fcport) {
 889                 cmd->result = DID_NO_CONNECT << 16;
 890                 goto qc24_fail_command;
 891         }
 892
 893         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 894                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 895                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 896                         ql_dbg(ql_dbg_io, vha, 0x3005,
 897                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 898                             atomic_read(&fcport->state),
 899                             atomic_read(&base_vha->loop_state));
 900                         cmd->result = DID_NO_CONNECT << 16;
 901                         goto qc24_fail_command;
 902                 }
 903                 goto qc24_target_busy;
 904         }
 905
 906         /*
 907          * Return target busy if we've received a non-zero retry_delay_timer
 908          * in a FCP_RSP.
 909          */
 910         if (fcport->retry_delay_timestamp == 0) {
 911                 /* retry delay not set */
 912         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 913                 fcport->retry_delay_timestamp = 0;
 914         else
 915                 goto qc24_target_busy;
 916
 917         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 918         if (!sp)
 919                 goto qc24_host_busy;
 920
 921         sp->u.scmd.cmd = cmd;
 922         sp->type = SRB_SCSI_CMD;
 923         atomic_set(&sp->ref_count, 1);
 924         CMD_SP(cmd) = (void *)sp;
 925         sp->free = qla2x00_sp_free_dma;
 926         sp->done = qla2x00_sp_compl;
 927
 928         rval = ha->isp_ops->start_scsi(sp);
 929         if (rval != QLA_SUCCESS) {
 930                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 931                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 932                 goto qc24_host_busy_free_sp;
 933         }
 934
 935         return 0;
 936
 937 qc24_host_busy_free_sp:
 938         sp->free(sp);
 939
 940 qc24_host_busy:
 941         return SCSI_MLQUEUE_HOST_BUSY;
 942
 943 qc24_target_busy:
 944         return SCSI_MLQUEUE_TARGET_BUSY;
 945
 946 qc24_fail_command:
 947         cmd->scsi_done(cmd);
 948
 949         return 0;
 950 }
 951
 952 /* For MQ supported I/O */
 953 int
 954 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 955     struct qla_qpair *qpair)
 956 {
 957         scsi_qla_host_t *vha = shost_priv(host);
 958         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 959         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 960         struct qla_hw_data *ha = vha->hw;
 961         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 962         srb_t *sp;
 963         int rval;
 964
 965         rval = fc_remote_port_chkready(rport);
 966         if (rval) {
 967                 cmd->result = rval;
 968                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 969                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 970                     cmd, rval);
 971                 goto qc24_fail_command;
 972         }
 973
 974         if (!fcport) {
 975                 cmd->result = DID_NO_CONNECT << 16;
 976                 goto qc24_fail_command;
 977         }
 978
 979         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 980                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 981                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 982                         ql_dbg(ql_dbg_io, vha, 0x3077,
 983                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 984                             atomic_read(&fcport->state),
 985                             atomic_read(&base_vha->loop_state));
 986                         cmd->result = DID_NO_CONNECT << 16;
 987                         goto qc24_fail_command;
 988                 }
 989                 goto qc24_target_busy;
 990         }
 991
 992         /*
 993          * Return target busy if we've received a non-zero retry_delay_timer
 994          * in a FCP_RSP.
 995          */
 996         if (fcport->retry_delay_timestamp == 0) {
 997                 /* retry delay not set */
 998         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 999                 fcport->retry_delay_timestamp = 0;
1000         else
1001                 goto qc24_target_busy;
1002
1003         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1004         if (!sp)
1005                 goto qc24_host_busy;
1006
1007         sp->u.scmd.cmd = cmd;
1008         sp->type = SRB_SCSI_CMD;
1009         atomic_set(&sp->ref_count, 1);
1010         CMD_SP(cmd) = (void *)sp;
1011         sp->free = qla2xxx_qpair_sp_free_dma;
1012         sp->done = qla2xxx_qpair_sp_compl;
1013         sp->qpair = qpair;
1014
1015         rval = ha->isp_ops->start_scsi_mq(sp);
1016         if (rval != QLA_SUCCESS) {
1017                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1018                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1019                 if (rval == QLA_INTERFACE_ERROR)
1020                         goto qc24_fail_command;
1021                 goto qc24_host_busy_free_sp;
1022         }
1023
1024         return 0;
1025
1026 qc24_host_busy_free_sp:
1027         sp->free(sp);
1028
1029 qc24_host_busy:
1030         return SCSI_MLQUEUE_HOST_BUSY;
1031
1032 qc24_target_busy:
1033         return SCSI_MLQUEUE_TARGET_BUSY;
1034
1035 qc24_fail_command:
1036         cmd->scsi_done(cmd);
1037
1038         return 0;
1039 }
1040
1041 /*
1042  * qla2x00_eh_wait_on_command
1043  *    Waits for the command to be returned by the Firmware for some
1044  *    max time.
1045  *
1046  * Input:
1047  *    cmd = Scsi Command to wait on.
1048  *
1049  * Return:
1050  *    Not Found : 0
1051  *    Found : 1
1052  */
1053 static int
1054 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1055 {
1056 #define ABORT_POLLING_PERIOD    1000
1057 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1058         unsigned long wait_iter = ABORT_WAIT_ITER;
1059         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1060         struct qla_hw_data *ha = vha->hw;
1061         int ret = QLA_SUCCESS;
1062
1063         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1064                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1065                     "Return:eh_wait.\n");
1066                 return ret;
1067         }
1068
1069         while (CMD_SP(cmd) && wait_iter--) {
1070                 msleep(ABORT_POLLING_PERIOD);
1071         }
1072         if (CMD_SP(cmd))
1073                 ret = QLA_FUNCTION_FAILED;
1074
1075         return ret;
1076 }
1077
1078 /*
1079  * qla2x00_wait_for_hba_online
1080  *    Wait till the HBA is online after going through
1081  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1082  *    finally HBA is disabled ie marked offline
1083  *
1084  * Input:
1085  *     ha - pointer to host adapter structure
1086  *
1087  * Note:
1088  *    Does context switching-Release SPIN_LOCK
1089  *    (if any) before calling this routine.
1090  *
1091  * Return:
1092  *    Success (Adapter is online) : 0
1093  *    Failed  (Adapter is offline/disabled) : 1
1094  */
1095 int
1096 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1097 {
1098         int             return_status;
1099         unsigned long   wait_online;
1100         struct qla_hw_data *ha = vha->hw;
1101         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1102
1103         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1104         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1105             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1106             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1107             ha->dpc_active) && time_before(jiffies, wait_online)) {
1108
1109                 msleep(1000);
1110         }
1111         if (base_vha->flags.online)
1112                 return_status = QLA_SUCCESS;
1113         else
1114                 return_status = QLA_FUNCTION_FAILED;
1115
1116         return (return_status);
1117 }
1118
1119 static inline int test_fcport_count(scsi_qla_host_t *vha)
1120 {
1121         struct qla_hw_data *ha = vha->hw;
1122         unsigned long flags;
1123         int res;
1124
1125         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1126         ql_dbg(ql_dbg_init, vha, 0x00ec,
1127             "tgt %p, fcport_count=%d\n",
1128             vha, vha->fcport_count);
1129         res = (vha->fcport_count == 0);
1130         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1131
1132         return res;
1133 }
1134
1135 /*
1136  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1137  * it has dependency on UNLOADING flag to stop device discovery
1138  */
1139 void
1140 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1141 {
1142         qla2x00_mark_all_devices_lost(vha, 0);
1143
1144         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1145 }
1146
1147 /*
1148  * qla2x00_wait_for_hba_ready
1149  * Wait till the HBA is ready before doing driver unload
1150  *
1151  * Input:
1152  *     ha - pointer to host adapter structure
1153  *
1154  * Note:
1155  *    Does context switching-Release SPIN_LOCK
1156  *    (if any) before calling this routine.
1157  *
1158  */
1159 static void
1160 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1161 {
1162         struct qla_hw_data *ha = vha->hw;
1163         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1164
1165         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1166                 ha->flags.mbox_busy) ||
1167                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1168                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1169                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1170                         break;
1171                 msleep(1000);
1172         }
1173 }
1174
1175 int
1176 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1177 {
1178         int             return_status;
1179         unsigned long   wait_reset;
1180         struct qla_hw_data *ha = vha->hw;
1181         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1182
1183         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1184         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1185             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1186             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1187             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1188
1189                 msleep(1000);
1190
1191                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1192                     ha->flags.chip_reset_done)
1193                         break;
1194         }
1195         if (ha->flags.chip_reset_done)
1196                 return_status = QLA_SUCCESS;
1197         else
1198                 return_status = QLA_FUNCTION_FAILED;
1199
1200         return return_status;
1201 }
1202
1203 static void
1204 sp_get(struct srb *sp)
1205 {
1206         atomic_inc(&sp->ref_count);
1207 }
1208
1209 #define ISP_REG_DISCONNECT 0xffffffffU
1210 /**************************************************************************
1211 * qla2x00_isp_reg_stat
1212 *
1213 * Description:
1214 *       Read the host status register of ISP before aborting the command.
1215 *
1216 * Input:
1217 *       ha = pointer to host adapter structure.
1218 *
1219 *
1220 * Returns:
1221 *       Either true or false.
1222 *
1223 * Note: Return true if there is register disconnect.
1224 **************************************************************************/
1225 static inline
1226 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1227 {
1228         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1229         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1230
1231         if (IS_P3P_TYPE(ha))
1232                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1233         else
1234                 return ((RD_REG_DWORD(&reg->host_status)) ==
1235                         ISP_REG_DISCONNECT);
1236 }
1237
1238 /**************************************************************************
1239 * qla2xxx_eh_abort
1240 *
1241 * Description:
1242 *    The abort function will abort the specified command.
1243 *
1244 * Input:
1245 *    cmd = Linux SCSI command packet to be aborted.
1246 *
1247 * Returns:
1248 *    Either SUCCESS or FAILED.
1249 *
1250 * Note:
1251 *    Only return FAILED if command not returned by firmware.
1252 **************************************************************************/
1253 static int
1254 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1255 {
1256         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1257         srb_t *sp;
1258         int ret;
1259         unsigned int id;
1260         uint64_t lun;
1261         unsigned long flags;
1262         int rval, wait = 0;
1263         struct qla_hw_data *ha = vha->hw;
1264
1265         if (qla2x00_isp_reg_stat(ha)) {
1266                 ql_log(ql_log_info, vha, 0x8042,
1267                     "PCI/Register disconnect, exiting.\n");
1268                 return FAILED;
1269         }
1270         if (!CMD_SP(cmd))
1271                 return SUCCESS;
1272
1273         ret = fc_block_scsi_eh(cmd);
1274         if (ret != 0)
1275                 return ret;
1276         ret = SUCCESS;
1277
1278         id = cmd->device->id;
1279         lun = cmd->device->lun;
1280
1281         spin_lock_irqsave(&ha->hardware_lock, flags);
1282         sp = (srb_t *) CMD_SP(cmd);
1283         if (!sp) {
1284                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1285                 return SUCCESS;
1286         }
1287
1288         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1289             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1290             vha->host_no, id, lun, sp, cmd, sp->handle);
1291
1292         /* Get a reference to the sp and drop the lock.*/
1293         sp_get(sp);
1294
1295         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1296         rval = ha->isp_ops->abort_command(sp);
1297         if (rval) {
1298                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1299                         ret = SUCCESS;
1300                 else
1301                         ret = FAILED;
1302
1303                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1304                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1305         } else {
1306                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1307                     "Abort command mbx success cmd=%p.\n", cmd);
1308                 wait = 1;
1309         }
1310
1311         spin_lock_irqsave(&ha->hardware_lock, flags);
1312         sp->done(sp, 0);
1313         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1314
1315         /* Did the command return during mailbox execution? */
1316         if (ret == FAILED && !CMD_SP(cmd))
1317                 ret = SUCCESS;
1318
1319         /* Wait for the command to be returned. */
1320         if (wait) {
1321                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1322                         ql_log(ql_log_warn, vha, 0x8006,
1323                             "Abort handler timed out cmd=%p.\n", cmd);
1324                         ret = FAILED;
1325                 }
1326         }
1327
1328         ql_log(ql_log_info, vha, 0x801c,
1329             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1330             vha->host_no, id, lun, wait, ret);
1331
1332         return ret;
1333 }
1334
1335 int
1336 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1337         uint64_t l, enum nexus_wait_type type)
1338 {
1339         int cnt, match, status;
1340         unsigned long flags;
1341         struct qla_hw_data *ha = vha->hw;
1342         struct req_que *req;
1343         srb_t *sp;
1344         struct scsi_cmnd *cmd;
1345
1346         status = QLA_SUCCESS;
1347
1348         spin_lock_irqsave(&ha->hardware_lock, flags);
1349         req = vha->req;
1350         for (cnt = 1; status == QLA_SUCCESS &&
1351                 cnt < req->num_outstanding_cmds; cnt++) {
1352                 sp = req->outstanding_cmds[cnt];
1353                 if (!sp)
1354                         continue;
1355                 if (sp->type != SRB_SCSI_CMD)
1356                         continue;
1357                 if (vha->vp_idx != sp->vha->vp_idx)
1358                         continue;
1359                 match = 0;
1360                 cmd = GET_CMD_SP(sp);
1361                 switch (type) {
1362                 case WAIT_HOST:
1363                         match = 1;
1364                         break;
1365                 case WAIT_TARGET:
1366                         match = cmd->device->id == t;
1367                         break;
1368                 case WAIT_LUN:
1369                         match = (cmd->device->id == t &&
1370                                 cmd->device->lun == l);
1371                         break;
1372                 }
1373                 if (!match)
1374                         continue;
1375
1376                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1377                 status = qla2x00_eh_wait_on_command(cmd);
1378                 spin_lock_irqsave(&ha->hardware_lock, flags);
1379         }
1380         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1381
1382         return status;
1383 }
1384
1385 static char *reset_errors[] = {
1386         "HBA not online",
1387         "HBA not ready",
1388         "Task management failed",
1389         "Waiting for command completions",
1390 };
1391
1392 static int
1393 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1394     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1395 {
1396         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1397         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1398         int err;
1399
1400         if (!fcport) {
1401                 return FAILED;
1402         }
1403
1404         err = fc_block_scsi_eh(cmd);
1405         if (err != 0)
1406                 return err;
1407
1408         ql_log(ql_log_info, vha, 0x8009,
1409             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1410             cmd->device->id, cmd->device->lun, cmd);
1411
1412         err = 0;
1413         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1414                 ql_log(ql_log_warn, vha, 0x800a,
1415                     "Wait for hba online failed for cmd=%p.\n", cmd);
1416                 goto eh_reset_failed;
1417         }
1418         err = 2;
1419         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1420                 != QLA_SUCCESS) {
1421                 ql_log(ql_log_warn, vha, 0x800c,
1422                     "do_reset failed for cmd=%p.\n", cmd);
1423                 goto eh_reset_failed;
1424         }
1425         err = 3;
1426         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1427             cmd->device->lun, type) != QLA_SUCCESS) {
1428                 ql_log(ql_log_warn, vha, 0x800d,
1429                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1430                 goto eh_reset_failed;
1431         }
1432
1433         ql_log(ql_log_info, vha, 0x800e,
1434             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1435             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1436
1437         return SUCCESS;
1438
1439 eh_reset_failed:
1440         ql_log(ql_log_info, vha, 0x800f,
1441             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1442             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1443             cmd);
1444         return FAILED;
1445 }
1446
1447 static int
1448 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1449 {
1450         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1451         struct qla_hw_data *ha = vha->hw;
1452
1453         if (qla2x00_isp_reg_stat(ha)) {
1454                 ql_log(ql_log_info, vha, 0x803e,
1455                     "PCI/Register disconnect, exiting.\n");
1456                 return FAILED;
1457         }
1458
1459         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1460             ha->isp_ops->lun_reset);
1461 }
1462
1463 static int
1464 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1465 {
1466         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1467         struct qla_hw_data *ha = vha->hw;
1468
1469         if (qla2x00_isp_reg_stat(ha)) {
1470                 ql_log(ql_log_info, vha, 0x803f,
1471                     "PCI/Register disconnect, exiting.\n");
1472                 return FAILED;
1473         }
1474
1475         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1476             ha->isp_ops->target_reset);
1477 }
1478
1479 /**************************************************************************
1480 * qla2xxx_eh_bus_reset
1481 *
1482 * Description:
1483 *    The bus reset function will reset the bus and abort any executing
1484 *    commands.
1485 *
1486 * Input:
1487 *    cmd = Linux SCSI command packet of the command that cause the
1488 *          bus reset.
1489 *
1490 * Returns:
1491 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1492 *
1493 **************************************************************************/
1494 static int
1495 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1496 {
1497         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1498         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1499         int ret = FAILED;
1500         unsigned int id;
1501         uint64_t lun;
1502         struct qla_hw_data *ha = vha->hw;
1503
1504         if (qla2x00_isp_reg_stat(ha)) {
1505                 ql_log(ql_log_info, vha, 0x8040,
1506                     "PCI/Register disconnect, exiting.\n");
1507                 return FAILED;
1508         }
1509
1510         id = cmd->device->id;
1511         lun = cmd->device->lun;
1512
1513         if (!fcport) {
1514                 return ret;
1515         }
1516
1517         ret = fc_block_scsi_eh(cmd);
1518         if (ret != 0)
1519                 return ret;
1520         ret = FAILED;
1521
1522         ql_log(ql_log_info, vha, 0x8012,
1523             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1524
1525         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1526                 ql_log(ql_log_fatal, vha, 0x8013,
1527                     "Wait for hba online failed board disabled.\n");
1528                 goto eh_bus_reset_done;
1529         }
1530
1531         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1532                 ret = SUCCESS;
1533
1534         if (ret == FAILED)
1535                 goto eh_bus_reset_done;
1536
1537         /* Flush outstanding commands. */
1538         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1539             QLA_SUCCESS) {
1540                 ql_log(ql_log_warn, vha, 0x8014,
1541                     "Wait for pending commands failed.\n");
1542                 ret = FAILED;
1543         }
1544
1545 eh_bus_reset_done:
1546         ql_log(ql_log_warn, vha, 0x802b,
1547             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1548             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1549
1550         return ret;
1551 }
1552
1553 /**************************************************************************
1554 * qla2xxx_eh_host_reset
1555 *
1556 * Description:
1557 *    The reset function will reset the Adapter.
1558 *
1559 * Input:
1560 *      cmd = Linux SCSI command packet of the command that cause the
1561 *            adapter reset.
1562 *
1563 * Returns:
1564 *      Either SUCCESS or FAILED.
1565 *
1566 * Note:
1567 **************************************************************************/
1568 static int
1569 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1570 {
1571         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1572         struct qla_hw_data *ha = vha->hw;
1573         int ret = FAILED;
1574         unsigned int id;
1575         uint64_t lun;
1576         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1577
1578         if (qla2x00_isp_reg_stat(ha)) {
1579                 ql_log(ql_log_info, vha, 0x8041,
1580                     "PCI/Register disconnect, exiting.\n");
1581                 schedule_work(&ha->board_disable);
1582                 return SUCCESS;
1583         }
1584
1585         id = cmd->device->id;
1586         lun = cmd->device->lun;
1587
1588         ql_log(ql_log_info, vha, 0x8018,
1589             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1590
1591         /*
1592          * No point in issuing another reset if one is active.  Also do not
1593          * attempt a reset if we are updating flash.
1594          */
1595         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1596                 goto eh_host_reset_lock;
1597
1598         if (vha != base_vha) {
1599                 if (qla2x00_vp_abort_isp(vha))
1600                         goto eh_host_reset_lock;
1601         } else {
1602                 if (IS_P3P_TYPE(vha->hw)) {
1603                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1604                                 /* Ctx reset success */
1605                                 ret = SUCCESS;
1606                                 goto eh_host_reset_lock;
1607                         }
1608                         /* fall thru if ctx reset failed */
1609                 }
1610                 if (ha->wq)
1611                         flush_workqueue(ha->wq);
1612
1613                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1614                 if (ha->isp_ops->abort_isp(base_vha)) {
1615                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1616                         /* failed. schedule dpc to try */
1617                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1618
1619                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1620                                 ql_log(ql_log_warn, vha, 0x802a,
1621                                     "wait for hba online failed.\n");
1622                                 goto eh_host_reset_lock;
1623                         }
1624                 }
1625                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1626         }
1627
1628         /* Waiting for command to be returned to OS.*/
1629         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1630                 QLA_SUCCESS)
1631                 ret = SUCCESS;
1632
1633 eh_host_reset_lock:
1634         ql_log(ql_log_info, vha, 0x8017,
1635             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1636             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1637
1638         return ret;
1639 }
1640
1641 /*
1642 * qla2x00_loop_reset
1643 *      Issue loop reset.
1644 *
1645 * Input:
1646 *      ha = adapter block pointer.
1647 *
1648 * Returns:
1649 *      0 = success
1650 */
1651 int
1652 qla2x00_loop_reset(scsi_qla_host_t *vha)
1653 {
1654         int ret;
1655         struct fc_port *fcport;
1656         struct qla_hw_data *ha = vha->hw;
1657
1658         if (IS_QLAFX00(ha)) {
1659                 return qlafx00_loop_reset(vha);
1660         }
1661
1662         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1663                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1664                         if (fcport->port_type != FCT_TARGET)
1665                                 continue;
1666
1667                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1668                         if (ret != QLA_SUCCESS) {
1669                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1670                                     "Bus Reset failed: Reset=%d "
1671                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1672                         }
1673                 }
1674         }
1675
1676
1677         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1678                 atomic_set(&vha->loop_state, LOOP_DOWN);
1679                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1680                 qla2x00_mark_all_devices_lost(vha, 0);
1681                 ret = qla2x00_full_login_lip(vha);
1682                 if (ret != QLA_SUCCESS) {
1683                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1684                             "full_login_lip=%d.\n", ret);
1685                 }
1686         }
1687
1688         if (ha->flags.enable_lip_reset) {
1689                 ret = qla2x00_lip_reset(vha);
1690                 if (ret != QLA_SUCCESS)
1691                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1692                             "lip_reset failed (%d).\n", ret);
1693         }
1694
1695         /* Issue marker command only when we are going to start the I/O */
1696         vha->marker_needed = 1;
1697
1698         return QLA_SUCCESS;
1699 }
1700
1701 void
1702 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1703 {
1704         int que, cnt, status;
1705         unsigned long flags;
1706         srb_t *sp;
1707         struct qla_hw_data *ha = vha->hw;
1708         struct req_que *req;
1709         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1710         struct qla_tgt_cmd *cmd;
1711         uint8_t trace = 0;
1712
1713         if (!ha->req_q_map)
1714                 return;
1715         spin_lock_irqsave(&ha->hardware_lock, flags);
1716         for (que = 0; que < ha->max_req_queues; que++) {
1717                 req = ha->req_q_map[que];
1718                 if (!req)
1719                         continue;
1720                 if (!req->outstanding_cmds)
1721                         continue;
1722                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1723                         sp = req->outstanding_cmds[cnt];
1724                         if (sp) {
1725                                 req->outstanding_cmds[cnt] = NULL;
1726                                 if (sp->cmd_type == TYPE_SRB) {
1727                                         if (sp->type == SRB_NVME_CMD ||
1728                                             sp->type == SRB_NVME_LS) {
1729                                                 sp_get(sp);
1730                                                 spin_unlock_irqrestore(
1731                                                     &ha->hardware_lock, flags);
1732                                                 qla_nvme_abort(ha, sp);
1733                                                 spin_lock_irqsave(
1734                                                     &ha->hardware_lock, flags);
1735                                         } else if (GET_CMD_SP(sp) &&
1736                                             !ha->flags.eeh_busy &&
1737                                             (!test_bit(ABORT_ISP_ACTIVE,
1738                                                 &vha->dpc_flags)) &&
1739                                             (sp->type == SRB_SCSI_CMD)) {
1740                                                 /*
1741                                                  * Don't abort commands in
1742                                                  * adapter during EEH
1743                                                  * recovery as it's not
1744                                                  * accessible/responding.
1745                                                  *
1746                                                  * Get a reference to the sp
1747                                                  * and drop the lock. The
1748                                                  * reference ensures this
1749                                                  * sp->done() call and not the
1750                                                  * call in qla2xxx_eh_abort()
1751                                                  * ends the SCSI command (with
1752                                                  * result 'res').
1753                                                  */
1754                                                 sp_get(sp);
1755                                                 spin_unlock_irqrestore(
1756                                                     &ha->hardware_lock, flags);
1757                                                 status = qla2xxx_eh_abort(
1758                                                     GET_CMD_SP(sp));
1759                                                 spin_lock_irqsave(
1760                                                     &ha->hardware_lock, flags);
1761                                                 /*
1762                                                  * Get rid of extra reference
1763                                                  * if immediate exit from
1764                                                  * ql2xxx_eh_abort
1765                                                  */
1766                                                 if (status == FAILED &&
1767                                                     (qla2x00_isp_reg_stat(ha)))
1768                                                         atomic_dec(
1769                                                             &sp->ref_count);
1770                                         }
1771                                         sp->done(sp, res);
1772                                 } else {
1773                                         if (!vha->hw->tgt.tgt_ops || !tgt ||
1774                                             qla_ini_mode_enabled(vha)) {
1775                                                 if (!trace)
1776                                                         ql_dbg(ql_dbg_tgt_mgt,
1777                                                             vha, 0xf003,
1778                                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1779                                                             vha->dpc_flags);
1780                                                 continue;
1781                                         }
1782                                         cmd = (struct qla_tgt_cmd *)sp;
1783                                         qlt_abort_cmd_on_host_reset(cmd->vha,
1784                                             cmd);
1785                                 }
1786                         }
1787                 }
1788         }
1789         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1790 }
1791
1792 static int
1793 qla2xxx_slave_alloc(struct scsi_device *sdev)
1794 {
1795         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1796
1797         if (!rport || fc_remote_port_chkready(rport))
1798                 return -ENXIO;
1799
1800         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1801
1802         return 0;
1803 }
1804
1805 static int
1806 qla2xxx_slave_configure(struct scsi_device *sdev)
1807 {
1808         scsi_qla_host_t *vha = shost_priv(sdev->host);
1809         struct req_que *req = vha->req;
1810
1811         if (IS_T10_PI_CAPABLE(vha->hw))
1812                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1813
1814         scsi_change_queue_depth(sdev, req->max_q_depth);
1815         return 0;
1816 }
1817
1818 static void
1819 qla2xxx_slave_destroy(struct scsi_device *sdev)
1820 {
1821         sdev->hostdata = NULL;
1822 }
1823
1824 /**
1825  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1826  * @ha: HA context
1827  *
1828  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1829  * supported addressing method.
1830  */
1831 static void
1832 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1833 {
1834         /* Assume a 32bit DMA mask. */
1835         ha->flags.enable_64bit_addressing = 0;
1836
1837         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1838                 /* Any upper-dword bits set? */
1839                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1840                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1841                         /* Ok, a 64bit DMA mask is applicable. */
1842                         ha->flags.enable_64bit_addressing = 1;
1843                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1844                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1845                         return;
1846                 }
1847         }
1848
1849         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1850         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1851 }
1852
1853 static void
1854 qla2x00_enable_intrs(struct qla_hw_data *ha)
1855 {
1856         unsigned long flags = 0;
1857         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1858
1859         spin_lock_irqsave(&ha->hardware_lock, flags);
1860         ha->interrupts_on = 1;
1861         /* enable risc and host interrupts */
1862         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1863         RD_REG_WORD(&reg->ictrl);
1864         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1865
1866 }
1867
1868 static void
1869 qla2x00_disable_intrs(struct qla_hw_data *ha)
1870 {
1871         unsigned long flags = 0;
1872         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1873
1874         spin_lock_irqsave(&ha->hardware_lock, flags);
1875         ha->interrupts_on = 0;
1876         /* disable risc and host interrupts */
1877         WRT_REG_WORD(&reg->ictrl, 0);
1878         RD_REG_WORD(&reg->ictrl);
1879         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1880 }
1881
1882 static void
1883 qla24xx_enable_intrs(struct qla_hw_data *ha)
1884 {
1885         unsigned long flags = 0;
1886         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1887
1888         spin_lock_irqsave(&ha->hardware_lock, flags);
1889         ha->interrupts_on = 1;
1890         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1891         RD_REG_DWORD(&reg->ictrl);
1892         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1893 }
1894
1895 static void
1896 qla24xx_disable_intrs(struct qla_hw_data *ha)
1897 {
1898         unsigned long flags = 0;
1899         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1900
1901         if (IS_NOPOLLING_TYPE(ha))
1902                 return;
1903         spin_lock_irqsave(&ha->hardware_lock, flags);
1904         ha->interrupts_on = 0;
1905         WRT_REG_DWORD(&reg->ictrl, 0);
1906         RD_REG_DWORD(&reg->ictrl);
1907         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1908 }
1909
1910 static int
1911 qla2x00_iospace_config(struct qla_hw_data *ha)
1912 {
1913         resource_size_t pio;
1914         uint16_t msix;
1915
1916         if (pci_request_selected_regions(ha->pdev, ha->bars,
1917             QLA2XXX_DRIVER_NAME)) {
1918                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1919                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1920                     pci_name(ha->pdev));
1921                 goto iospace_error_exit;
1922         }
1923         if (!(ha->bars & 1))
1924                 goto skip_pio;
1925
1926         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1927         pio = pci_resource_start(ha->pdev, 0);
1928         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1929                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1930                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1931                             "Invalid pci I/O region size (%s).\n",
1932                             pci_name(ha->pdev));
1933                         pio = 0;
1934                 }
1935         } else {
1936                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1937                     "Region #0 no a PIO resource (%s).\n",
1938                     pci_name(ha->pdev));
1939                 pio = 0;
1940         }
1941         ha->pio_address = pio;
1942         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1943             "PIO address=%llu.\n",
1944             (unsigned long long)ha->pio_address);
1945
1946 skip_pio:
1947         /* Use MMIO operations for all accesses. */
1948         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1949                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1950                     "Region #1 not an MMIO resource (%s), aborting.\n",
1951                     pci_name(ha->pdev));
1952                 goto iospace_error_exit;
1953         }
1954         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1955                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1956                     "Invalid PCI mem region size (%s), aborting.\n",
1957                     pci_name(ha->pdev));
1958                 goto iospace_error_exit;
1959         }
1960
1961         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1962         if (!ha->iobase) {
1963                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1964                     "Cannot remap MMIO (%s), aborting.\n",
1965                     pci_name(ha->pdev));
1966                 goto iospace_error_exit;
1967         }
1968
1969         /* Determine queue resources */
1970         ha->max_req_queues = ha->max_rsp_queues = 1;
1971         ha->msix_count = QLA_BASE_VECTORS;
1972         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1973                 goto mqiobase_exit;
1974
1975         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1976                         pci_resource_len(ha->pdev, 3));
1977         if (ha->mqiobase) {
1978                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1979                     "MQIO Base=%p.\n", ha->mqiobase);
1980                 /* Read MSIX vector size of the board */
1981                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1982                 ha->msix_count = msix + 1;
1983                 /* Max queues are bounded by available msix vectors */
1984                 /* MB interrupt uses 1 vector */
1985                 ha->max_req_queues = ha->msix_count - 1;
1986                 ha->max_rsp_queues = ha->max_req_queues;
1987                 /* Queue pairs is the max value minus the base queue pair */
1988                 ha->max_qpairs = ha->max_rsp_queues - 1;
1989                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1990                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1991
1992                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1993                     "MSI-X vector count: %d.\n", ha->msix_count);
1994         } else
1995                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1996                     "BAR 3 not enabled.\n");
1997
1998 mqiobase_exit:
1999         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2000             "MSIX Count: %d.\n", ha->msix_count);
2001         return (0);
2002
2003 iospace_error_exit:
2004         return (-ENOMEM);
2005 }
2006
2007
2008 static int
2009 qla83xx_iospace_config(struct qla_hw_data *ha)
2010 {
2011         uint16_t msix;
2012
2013         if (pci_request_selected_regions(ha->pdev, ha->bars,
2014             QLA2XXX_DRIVER_NAME)) {
2015                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2016                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2017                     pci_name(ha->pdev));
2018
2019                 goto iospace_error_exit;
2020         }
2021
2022         /* Use MMIO operations for all accesses. */
2023         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2024                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2025                     "Invalid pci I/O region size (%s).\n",
2026                     pci_name(ha->pdev));
2027                 goto iospace_error_exit;
2028         }
2029         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2030                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2031                     "Invalid PCI mem region size (%s), aborting\n",
2032                         pci_name(ha->pdev));
2033                 goto iospace_error_exit;
2034         }
2035
2036         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2037         if (!ha->iobase) {
2038                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2039                     "Cannot remap MMIO (%s), aborting.\n",
2040                     pci_name(ha->pdev));
2041                 goto iospace_error_exit;
2042         }
2043
2044         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2045         /* 83XX 26XX always use MQ type access for queues
2046          * - mbar 2, a.k.a region 4 */
2047         ha->max_req_queues = ha->max_rsp_queues = 1;
2048         ha->msix_count = QLA_BASE_VECTORS;
2049         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2050                         pci_resource_len(ha->pdev, 4));
2051
2052         if (!ha->mqiobase) {
2053                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2054                     "BAR2/region4 not enabled\n");
2055                 goto mqiobase_exit;
2056         }
2057
2058         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2059                         pci_resource_len(ha->pdev, 2));
2060         if (ha->msixbase) {
2061                 /* Read MSIX vector size of the board */
2062                 pci_read_config_word(ha->pdev,
2063                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2064                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2065                 /*
2066                  * By default, driver uses at least two msix vectors
2067                  * (default & rspq)
2068                  */
2069                 if (ql2xmqsupport) {
2070                         /* MB interrupt uses 1 vector */
2071                         ha->max_req_queues = ha->msix_count - 1;
2072
2073                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2074                         if (QLA_TGT_MODE_ENABLED())
2075                                 ha->max_req_queues--;
2076
2077                         ha->max_rsp_queues = ha->max_req_queues;
2078
2079                         /* Queue pairs is the max value minus
2080                          * the base queue pair */
2081                         ha->max_qpairs = ha->max_req_queues - 1;
2082                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2083                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2084                 }
2085                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2086                     "MSI-X vector count: %d.\n", ha->msix_count);
2087         } else
2088                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2089                     "BAR 1 not enabled.\n");
2090
2091 mqiobase_exit:
2092         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2093             "MSIX Count: %d.\n", ha->msix_count);
2094         return 0;
2095
2096 iospace_error_exit:
2097         return -ENOMEM;
2098 }
2099
2100 static struct isp_operations qla2100_isp_ops = {
2101         .pci_config             = qla2100_pci_config,
2102         .reset_chip             = qla2x00_reset_chip,
2103         .chip_diag              = qla2x00_chip_diag,
2104         .config_rings           = qla2x00_config_rings,
2105         .reset_adapter          = qla2x00_reset_adapter,
2106         .nvram_config           = qla2x00_nvram_config,
2107         .update_fw_options      = qla2x00_update_fw_options,
2108         .load_risc              = qla2x00_load_risc,
2109         .pci_info_str           = qla2x00_pci_info_str,
2110         .fw_version_str         = qla2x00_fw_version_str,
2111         .intr_handler           = qla2100_intr_handler,
2112         .enable_intrs           = qla2x00_enable_intrs,
2113         .disable_intrs          = qla2x00_disable_intrs,
2114         .abort_command          = qla2x00_abort_command,
2115         .target_reset           = qla2x00_abort_target,
2116         .lun_reset              = qla2x00_lun_reset,
2117         .fabric_login           = qla2x00_login_fabric,
2118         .fabric_logout          = qla2x00_fabric_logout,
2119         .calc_req_entries       = qla2x00_calc_iocbs_32,
2120         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2121         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2122         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2123         .read_nvram             = qla2x00_read_nvram_data,
2124         .write_nvram            = qla2x00_write_nvram_data,
2125         .fw_dump                = qla2100_fw_dump,
2126         .beacon_on              = NULL,
2127         .beacon_off             = NULL,
2128         .beacon_blink           = NULL,
2129         .read_optrom            = qla2x00_read_optrom_data,
2130         .write_optrom           = qla2x00_write_optrom_data,
2131         .get_flash_version      = qla2x00_get_flash_version,
2132         .start_scsi             = qla2x00_start_scsi,
2133         .start_scsi_mq          = NULL,
2134         .abort_isp              = qla2x00_abort_isp,
2135         .iospace_config         = qla2x00_iospace_config,
2136         .initialize_adapter     = qla2x00_initialize_adapter,
2137 };
2138
2139 static struct isp_operations qla2300_isp_ops = {
2140         .pci_config             = qla2300_pci_config,
2141         .reset_chip             = qla2x00_reset_chip,
2142         .chip_diag              = qla2x00_chip_diag,
2143         .config_rings           = qla2x00_config_rings,
2144         .reset_adapter          = qla2x00_reset_adapter,
2145         .nvram_config           = qla2x00_nvram_config,
2146         .update_fw_options      = qla2x00_update_fw_options,
2147         .load_risc              = qla2x00_load_risc,
2148         .pci_info_str           = qla2x00_pci_info_str,
2149         .fw_version_str         = qla2x00_fw_version_str,
2150         .intr_handler           = qla2300_intr_handler,
2151         .enable_intrs           = qla2x00_enable_intrs,
2152         .disable_intrs          = qla2x00_disable_intrs,
2153         .abort_command          = qla2x00_abort_command,
2154         .target_reset           = qla2x00_abort_target,
2155         .lun_reset              = qla2x00_lun_reset,
2156         .fabric_login           = qla2x00_login_fabric,
2157         .fabric_logout          = qla2x00_fabric_logout,
2158         .calc_req_entries       = qla2x00_calc_iocbs_32,
2159         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2160         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2161         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2162         .read_nvram             = qla2x00_read_nvram_data,
2163         .write_nvram            = qla2x00_write_nvram_data,
2164         .fw_dump                = qla2300_fw_dump,
2165         .beacon_on              = qla2x00_beacon_on,
2166         .beacon_off             = qla2x00_beacon_off,
2167         .beacon_blink           = qla2x00_beacon_blink,
2168         .read_optrom            = qla2x00_read_optrom_data,
2169         .write_optrom           = qla2x00_write_optrom_data,
2170         .get_flash_version      = qla2x00_get_flash_version,
2171         .start_scsi             = qla2x00_start_scsi,
2172         .start_scsi_mq          = NULL,
2173         .abort_isp              = qla2x00_abort_isp,
2174         .iospace_config         = qla2x00_iospace_config,
2175         .initialize_adapter     = qla2x00_initialize_adapter,
2176 };
2177
2178 static struct isp_operations qla24xx_isp_ops = {
2179         .pci_config             = qla24xx_pci_config,
2180         .reset_chip             = qla24xx_reset_chip,
2181         .chip_diag              = qla24xx_chip_diag,
2182         .config_rings           = qla24xx_config_rings,
2183         .reset_adapter          = qla24xx_reset_adapter,
2184         .nvram_config           = qla24xx_nvram_config,
2185         .update_fw_options      = qla24xx_update_fw_options,
2186         .load_risc              = qla24xx_load_risc,
2187         .pci_info_str           = qla24xx_pci_info_str,
2188         .fw_version_str         = qla24xx_fw_version_str,
2189         .intr_handler           = qla24xx_intr_handler,
2190         .enable_intrs           = qla24xx_enable_intrs,
2191         .disable_intrs          = qla24xx_disable_intrs,
2192         .abort_command          = qla24xx_abort_command,
2193         .target_reset           = qla24xx_abort_target,
2194         .lun_reset              = qla24xx_lun_reset,
2195         .fabric_login           = qla24xx_login_fabric,
2196         .fabric_logout          = qla24xx_fabric_logout,
2197         .calc_req_entries       = NULL,
2198         .build_iocbs            = NULL,
2199         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2200         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2201         .read_nvram             = qla24xx_read_nvram_data,
2202         .write_nvram            = qla24xx_write_nvram_data,
2203         .fw_dump                = qla24xx_fw_dump,
2204         .beacon_on              = qla24xx_beacon_on,
2205         .beacon_off             = qla24xx_beacon_off,
2206         .beacon_blink           = qla24xx_beacon_blink,
2207         .read_optrom            = qla24xx_read_optrom_data,
2208         .write_optrom           = qla24xx_write_optrom_data,
2209         .get_flash_version      = qla24xx_get_flash_version,
2210         .start_scsi             = qla24xx_start_scsi,
2211         .start_scsi_mq          = NULL,
2212         .abort_isp              = qla2x00_abort_isp,
2213         .iospace_config         = qla2x00_iospace_config,
2214         .initialize_adapter     = qla2x00_initialize_adapter,
2215 };
2216
2217 static struct isp_operations qla25xx_isp_ops = {
2218         .pci_config             = qla25xx_pci_config,
2219         .reset_chip             = qla24xx_reset_chip,
2220         .chip_diag              = qla24xx_chip_diag,
2221         .config_rings           = qla24xx_config_rings,
2222         .reset_adapter          = qla24xx_reset_adapter,
2223         .nvram_config           = qla24xx_nvram_config,
2224         .update_fw_options      = qla24xx_update_fw_options,
2225         .load_risc              = qla24xx_load_risc,
2226         .pci_info_str           = qla24xx_pci_info_str,
2227         .fw_version_str         = qla24xx_fw_version_str,
2228         .intr_handler           = qla24xx_intr_handler,
2229         .enable_intrs           = qla24xx_enable_intrs,
2230         .disable_intrs          = qla24xx_disable_intrs,
2231         .abort_command          = qla24xx_abort_command,
2232         .target_reset           = qla24xx_abort_target,
2233         .lun_reset              = qla24xx_lun_reset,
2234         .fabric_login           = qla24xx_login_fabric,
2235         .fabric_logout          = qla24xx_fabric_logout,
2236         .calc_req_entries       = NULL,
2237         .build_iocbs            = NULL,
2238         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2239         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2240         .read_nvram             = qla25xx_read_nvram_data,
2241         .write_nvram            = qla25xx_write_nvram_data,
2242         .fw_dump                = qla25xx_fw_dump,
2243         .beacon_on              = qla24xx_beacon_on,
2244         .beacon_off             = qla24xx_beacon_off,
2245         .beacon_blink           = qla24xx_beacon_blink,
2246         .read_optrom            = qla25xx_read_optrom_data,
2247         .write_optrom           = qla24xx_write_optrom_data,
2248         .get_flash_version      = qla24xx_get_flash_version,
2249         .start_scsi             = qla24xx_dif_start_scsi,
2250         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2251         .abort_isp              = qla2x00_abort_isp,
2252         .iospace_config         = qla2x00_iospace_config,
2253         .initialize_adapter     = qla2x00_initialize_adapter,
2254 };
2255
2256 static struct isp_operations qla81xx_isp_ops = {
2257         .pci_config             = qla25xx_pci_config,
2258         .reset_chip             = qla24xx_reset_chip,
2259         .chip_diag              = qla24xx_chip_diag,
2260         .config_rings           = qla24xx_config_rings,
2261         .reset_adapter          = qla24xx_reset_adapter,
2262         .nvram_config           = qla81xx_nvram_config,
2263         .update_fw_options      = qla81xx_update_fw_options,
2264         .load_risc              = qla81xx_load_risc,
2265         .pci_info_str           = qla24xx_pci_info_str,
2266         .fw_version_str         = qla24xx_fw_version_str,
2267         .intr_handler           = qla24xx_intr_handler,
2268         .enable_intrs           = qla24xx_enable_intrs,
2269         .disable_intrs          = qla24xx_disable_intrs,
2270         .abort_command          = qla24xx_abort_command,
2271         .target_reset           = qla24xx_abort_target,
2272         .lun_reset              = qla24xx_lun_reset,
2273         .fabric_login           = qla24xx_login_fabric,
2274         .fabric_logout          = qla24xx_fabric_logout,
2275         .calc_req_entries       = NULL,
2276         .build_iocbs            = NULL,
2277         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2278         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2279         .read_nvram             = NULL,
2280         .write_nvram            = NULL,
2281         .fw_dump                = qla81xx_fw_dump,
2282         .beacon_on              = qla24xx_beacon_on,
2283         .beacon_off             = qla24xx_beacon_off,
2284         .beacon_blink           = qla83xx_beacon_blink,
2285         .read_optrom            = qla25xx_read_optrom_data,
2286         .write_optrom           = qla24xx_write_optrom_data,
2287         .get_flash_version      = qla24xx_get_flash_version,
2288         .start_scsi             = qla24xx_dif_start_scsi,
2289         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2290         .abort_isp              = qla2x00_abort_isp,
2291         .iospace_config         = qla2x00_iospace_config,
2292         .initialize_adapter     = qla2x00_initialize_adapter,
2293 };
2294
2295 static struct isp_operations qla82xx_isp_ops = {
2296         .pci_config             = qla82xx_pci_config,
2297         .reset_chip             = qla82xx_reset_chip,
2298         .chip_diag              = qla24xx_chip_diag,
2299         .config_rings           = qla82xx_config_rings,
2300         .reset_adapter          = qla24xx_reset_adapter,
2301         .nvram_config           = qla81xx_nvram_config,
2302         .update_fw_options      = qla24xx_update_fw_options,
2303         .load_risc              = qla82xx_load_risc,
2304         .pci_info_str           = qla24xx_pci_info_str,
2305         .fw_version_str         = qla24xx_fw_version_str,
2306         .intr_handler           = qla82xx_intr_handler,
2307         .enable_intrs           = qla82xx_enable_intrs,
2308         .disable_intrs          = qla82xx_disable_intrs,
2309         .abort_command          = qla24xx_abort_command,
2310         .target_reset           = qla24xx_abort_target,
2311         .lun_reset              = qla24xx_lun_reset,
2312         .fabric_login           = qla24xx_login_fabric,
2313         .fabric_logout          = qla24xx_fabric_logout,
2314         .calc_req_entries       = NULL,
2315         .build_iocbs            = NULL,
2316         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2317         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2318         .read_nvram             = qla24xx_read_nvram_data,
2319         .write_nvram            = qla24xx_write_nvram_data,
2320         .fw_dump                = qla82xx_fw_dump,
2321         .beacon_on              = qla82xx_beacon_on,
2322         .beacon_off             = qla82xx_beacon_off,
2323         .beacon_blink           = NULL,
2324         .read_optrom            = qla82xx_read_optrom_data,
2325         .write_optrom           = qla82xx_write_optrom_data,
2326         .get_flash_version      = qla82xx_get_flash_version,
2327         .start_scsi             = qla82xx_start_scsi,
2328         .start_scsi_mq          = NULL,
2329         .abort_isp              = qla82xx_abort_isp,
2330         .iospace_config         = qla82xx_iospace_config,
2331         .initialize_adapter     = qla2x00_initialize_adapter,
2332 };
2333
2334 static struct isp_operations qla8044_isp_ops = {
2335         .pci_config             = qla82xx_pci_config,
2336         .reset_chip             = qla82xx_reset_chip,
2337         .chip_diag              = qla24xx_chip_diag,
2338         .config_rings           = qla82xx_config_rings,
2339         .reset_adapter          = qla24xx_reset_adapter,
2340         .nvram_config           = qla81xx_nvram_config,
2341         .update_fw_options      = qla24xx_update_fw_options,
2342         .load_risc              = qla82xx_load_risc,
2343         .pci_info_str           = qla24xx_pci_info_str,
2344         .fw_version_str         = qla24xx_fw_version_str,
2345         .intr_handler           = qla8044_intr_handler,
2346         .enable_intrs           = qla82xx_enable_intrs,
2347         .disable_intrs          = qla82xx_disable_intrs,
2348         .abort_command          = qla24xx_abort_command,
2349         .target_reset           = qla24xx_abort_target,
2350         .lun_reset              = qla24xx_lun_reset,
2351         .fabric_login           = qla24xx_login_fabric,
2352         .fabric_logout          = qla24xx_fabric_logout,
2353         .calc_req_entries       = NULL,
2354         .build_iocbs            = NULL,
2355         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2356         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2357         .read_nvram             = NULL,
2358         .write_nvram            = NULL,
2359         .fw_dump                = qla8044_fw_dump,
2360         .beacon_on              = qla82xx_beacon_on,
2361         .beacon_off             = qla82xx_beacon_off,
2362         .beacon_blink           = NULL,
2363         .read_optrom            = qla8044_read_optrom_data,
2364         .write_optrom           = qla8044_write_optrom_data,
2365         .get_flash_version      = qla82xx_get_flash_version,
2366         .start_scsi             = qla82xx_start_scsi,
2367         .start_scsi_mq          = NULL,
2368         .abort_isp              = qla8044_abort_isp,
2369         .iospace_config         = qla82xx_iospace_config,
2370         .initialize_adapter     = qla2x00_initialize_adapter,
2371 };
2372
2373 static struct isp_operations qla83xx_isp_ops = {
2374         .pci_config             = qla25xx_pci_config,
2375         .reset_chip             = qla24xx_reset_chip,
2376         .chip_diag              = qla24xx_chip_diag,
2377         .config_rings           = qla24xx_config_rings,
2378         .reset_adapter          = qla24xx_reset_adapter,
2379         .nvram_config           = qla81xx_nvram_config,
2380         .update_fw_options      = qla81xx_update_fw_options,
2381         .load_risc              = qla81xx_load_risc,
2382         .pci_info_str           = qla24xx_pci_info_str,
2383         .fw_version_str         = qla24xx_fw_version_str,
2384         .intr_handler           = qla24xx_intr_handler,
2385         .enable_intrs           = qla24xx_enable_intrs,
2386         .disable_intrs          = qla24xx_disable_intrs,
2387         .abort_command          = qla24xx_abort_command,
2388         .target_reset           = qla24xx_abort_target,
2389         .lun_reset              = qla24xx_lun_reset,
2390         .fabric_login           = qla24xx_login_fabric,
2391         .fabric_logout          = qla24xx_fabric_logout,
2392         .calc_req_entries       = NULL,
2393         .build_iocbs            = NULL,
2394         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2395         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2396         .read_nvram             = NULL,
2397         .write_nvram            = NULL,
2398         .fw_dump                = qla83xx_fw_dump,
2399         .beacon_on              = qla24xx_beacon_on,
2400         .beacon_off             = qla24xx_beacon_off,
2401         .beacon_blink           = qla83xx_beacon_blink,
2402         .read_optrom            = qla25xx_read_optrom_data,
2403         .write_optrom           = qla24xx_write_optrom_data,
2404         .get_flash_version      = qla24xx_get_flash_version,
2405         .start_scsi             = qla24xx_dif_start_scsi,
2406         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2407         .abort_isp              = qla2x00_abort_isp,
2408         .iospace_config         = qla83xx_iospace_config,
2409         .initialize_adapter     = qla2x00_initialize_adapter,
2410 };
2411
2412 static struct isp_operations qlafx00_isp_ops = {
2413         .pci_config             = qlafx00_pci_config,
2414         .reset_chip             = qlafx00_soft_reset,
2415         .chip_diag              = qlafx00_chip_diag,
2416         .config_rings           = qlafx00_config_rings,
2417         .reset_adapter          = qlafx00_soft_reset,
2418         .nvram_config           = NULL,
2419         .update_fw_options      = NULL,
2420         .load_risc              = NULL,
2421         .pci_info_str           = qlafx00_pci_info_str,
2422         .fw_version_str         = qlafx00_fw_version_str,
2423         .intr_handler           = qlafx00_intr_handler,
2424         .enable_intrs           = qlafx00_enable_intrs,
2425         .disable_intrs          = qlafx00_disable_intrs,
2426         .abort_command          = qla24xx_async_abort_command,
2427         .target_reset           = qlafx00_abort_target,
2428         .lun_reset              = qlafx00_lun_reset,
2429         .fabric_login           = NULL,
2430         .fabric_logout          = NULL,
2431         .calc_req_entries       = NULL,
2432         .build_iocbs            = NULL,
2433         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2434         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2435         .read_nvram             = qla24xx_read_nvram_data,
2436         .write_nvram            = qla24xx_write_nvram_data,
2437         .fw_dump                = NULL,
2438         .beacon_on              = qla24xx_beacon_on,
2439         .beacon_off             = qla24xx_beacon_off,
2440         .beacon_blink           = NULL,
2441         .read_optrom            = qla24xx_read_optrom_data,
2442         .write_optrom           = qla24xx_write_optrom_data,
2443         .get_flash_version      = qla24xx_get_flash_version,
2444         .start_scsi             = qlafx00_start_scsi,
2445         .start_scsi_mq          = NULL,
2446         .abort_isp              = qlafx00_abort_isp,
2447         .iospace_config         = qlafx00_iospace_config,
2448         .initialize_adapter     = qlafx00_initialize_adapter,
2449 };
2450
2451 static struct isp_operations qla27xx_isp_ops = {
2452         .pci_config             = qla25xx_pci_config,
2453         .reset_chip             = qla24xx_reset_chip,
2454         .chip_diag              = qla24xx_chip_diag,
2455         .config_rings           = qla24xx_config_rings,
2456         .reset_adapter          = qla24xx_reset_adapter,
2457         .nvram_config           = qla81xx_nvram_config,
2458         .update_fw_options      = qla81xx_update_fw_options,
2459         .load_risc              = qla81xx_load_risc,
2460         .pci_info_str           = qla24xx_pci_info_str,
2461         .fw_version_str         = qla24xx_fw_version_str,
2462         .intr_handler           = qla24xx_intr_handler,
2463         .enable_intrs           = qla24xx_enable_intrs,
2464         .disable_intrs          = qla24xx_disable_intrs,
2465         .abort_command          = qla24xx_abort_command,
2466         .target_reset           = qla24xx_abort_target,
2467         .lun_reset              = qla24xx_lun_reset,
2468         .fabric_login           = qla24xx_login_fabric,
2469         .fabric_logout          = qla24xx_fabric_logout,
2470         .calc_req_entries       = NULL,
2471         .build_iocbs            = NULL,
2472         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2473         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2474         .read_nvram             = NULL,
2475         .write_nvram            = NULL,
2476         .fw_dump                = qla27xx_fwdump,
2477         .beacon_on              = qla24xx_beacon_on,
2478         .beacon_off             = qla24xx_beacon_off,
2479         .beacon_blink           = qla83xx_beacon_blink,
2480         .read_optrom            = qla25xx_read_optrom_data,
2481         .write_optrom           = qla24xx_write_optrom_data,
2482         .get_flash_version      = qla24xx_get_flash_version,
2483         .start_scsi             = qla24xx_dif_start_scsi,
2484         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2485         .abort_isp              = qla2x00_abort_isp,
2486         .iospace_config         = qla83xx_iospace_config,
2487         .initialize_adapter     = qla2x00_initialize_adapter,
2488 };
2489
2490 static inline void
2491 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2492 {
2493         ha->device_type = DT_EXTENDED_IDS;
2494         switch (ha->pdev->device) {
2495         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2496                 ha->isp_type |= DT_ISP2100;
2497                 ha->device_type &= ~DT_EXTENDED_IDS;
2498                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2499                 break;
2500         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2501                 ha->isp_type |= DT_ISP2200;
2502                 ha->device_type &= ~DT_EXTENDED_IDS;
2503                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2504                 break;
2505         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2506                 ha->isp_type |= DT_ISP2300;
2507                 ha->device_type |= DT_ZIO_SUPPORTED;
2508                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2509                 break;
2510         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2511                 ha->isp_type |= DT_ISP2312;
2512                 ha->device_type |= DT_ZIO_SUPPORTED;
2513                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2514                 break;
2515         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2516                 ha->isp_type |= DT_ISP2322;
2517                 ha->device_type |= DT_ZIO_SUPPORTED;
2518                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2519                     ha->pdev->subsystem_device == 0x0170)
2520                         ha->device_type |= DT_OEM_001;
2521                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2522                 break;
2523         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2524                 ha->isp_type |= DT_ISP6312;
2525                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2526                 break;
2527         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2528                 ha->isp_type |= DT_ISP6322;
2529                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2530                 break;
2531         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2532                 ha->isp_type |= DT_ISP2422;
2533                 ha->device_type |= DT_ZIO_SUPPORTED;
2534                 ha->device_type |= DT_FWI2;
2535                 ha->device_type |= DT_IIDMA;
2536                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2537                 break;
2538         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2539                 ha->isp_type |= DT_ISP2432;
2540                 ha->device_type |= DT_ZIO_SUPPORTED;
2541                 ha->device_type |= DT_FWI2;
2542                 ha->device_type |= DT_IIDMA;
2543                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2544                 break;
2545         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2546                 ha->isp_type |= DT_ISP8432;
2547                 ha->device_type |= DT_ZIO_SUPPORTED;
2548                 ha->device_type |= DT_FWI2;
2549                 ha->device_type |= DT_IIDMA;
2550                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2551                 break;
2552         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2553                 ha->isp_type |= DT_ISP5422;
2554                 ha->device_type |= DT_FWI2;
2555                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2556                 break;
2557         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2558                 ha->isp_type |= DT_ISP5432;
2559                 ha->device_type |= DT_FWI2;
2560                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2561                 break;
2562         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2563                 ha->isp_type |= DT_ISP2532;
2564                 ha->device_type |= DT_ZIO_SUPPORTED;
2565                 ha->device_type |= DT_FWI2;
2566                 ha->device_type |= DT_IIDMA;
2567                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2568                 break;
2569         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2570                 ha->isp_type |= DT_ISP8001;
2571                 ha->device_type |= DT_ZIO_SUPPORTED;
2572                 ha->device_type |= DT_FWI2;
2573                 ha->device_type |= DT_IIDMA;
2574                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2575                 break;
2576         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2577                 ha->isp_type |= DT_ISP8021;
2578                 ha->device_type |= DT_ZIO_SUPPORTED;
2579                 ha->device_type |= DT_FWI2;
2580                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2581                 /* Initialize 82XX ISP flags */
2582                 qla82xx_init_flags(ha);
2583                 break;
2584          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2585                 ha->isp_type |= DT_ISP8044;
2586                 ha->device_type |= DT_ZIO_SUPPORTED;
2587                 ha->device_type |= DT_FWI2;
2588                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2589                 /* Initialize 82XX ISP flags */
2590                 qla82xx_init_flags(ha);
2591                 break;
2592         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2593                 ha->isp_type |= DT_ISP2031;
2594                 ha->device_type |= DT_ZIO_SUPPORTED;
2595                 ha->device_type |= DT_FWI2;
2596                 ha->device_type |= DT_IIDMA;
2597                 ha->device_type |= DT_T10_PI;
2598                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2599                 break;
2600         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2601                 ha->isp_type |= DT_ISP8031;
2602                 ha->device_type |= DT_ZIO_SUPPORTED;
2603                 ha->device_type |= DT_FWI2;
2604                 ha->device_type |= DT_IIDMA;
2605                 ha->device_type |= DT_T10_PI;
2606                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2607                 break;
2608         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2609                 ha->isp_type |= DT_ISPFX00;
2610                 break;
2611         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2612                 ha->isp_type |= DT_ISP2071;
2613                 ha->device_type |= DT_ZIO_SUPPORTED;
2614                 ha->device_type |= DT_FWI2;
2615                 ha->device_type |= DT_IIDMA;
2616                 ha->device_type |= DT_T10_PI;
2617                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2618                 break;
2619         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2620                 ha->isp_type |= DT_ISP2271;
2621                 ha->device_type |= DT_ZIO_SUPPORTED;
2622                 ha->device_type |= DT_FWI2;
2623                 ha->device_type |= DT_IIDMA;
2624                 ha->device_type |= DT_T10_PI;
2625                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2626                 break;
2627         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2628                 ha->isp_type |= DT_ISP2261;
2629                 ha->device_type |= DT_ZIO_SUPPORTED;
2630                 ha->device_type |= DT_FWI2;
2631                 ha->device_type |= DT_IIDMA;
2632                 ha->device_type |= DT_T10_PI;
2633                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2634                 break;
2635         }
2636
2637         if (IS_QLA82XX(ha))
2638                 ha->port_no = ha->portnum & 1;
2639         else {
2640                 /* Get adapter physical port no from interrupt pin register. */
2641                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2642                 if (IS_QLA27XX(ha))
2643                         ha->port_no--;
2644                 else
2645                         ha->port_no = !(ha->port_no & 1);
2646         }
2647
2648         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2649             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2650             ha->device_type, ha->port_no, ha->fw_srisc_address);
2651 }
2652
2653 static void
2654 qla2xxx_scan_start(struct Scsi_Host *shost)
2655 {
2656         scsi_qla_host_t *vha = shost_priv(shost);
2657
2658         if (vha->hw->flags.running_gold_fw)
2659                 return;
2660
2661         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2662         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2663         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2664         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2665 }
2666
2667 static int
2668 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2669 {
2670         scsi_qla_host_t *vha = shost_priv(shost);
2671
2672         if (test_bit(UNLOADING, &vha->dpc_flags))
2673                 return 1;
2674         if (!vha->host)
2675                 return 1;
2676         if (time > vha->hw->loop_reset_delay * HZ)
2677                 return 1;
2678
2679         return atomic_read(&vha->loop_state) == LOOP_READY;
2680 }
2681
2682 static void qla2x00_iocb_work_fn(struct work_struct *work)
2683 {
2684         struct scsi_qla_host *vha = container_of(work,
2685                 struct scsi_qla_host, iocb_work);
2686         int cnt = 0;
2687
2688         while (!list_empty(&vha->work_list)) {
2689                 qla2x00_do_work(vha);
2690                 cnt++;
2691                 if (cnt > 10)
2692                         break;
2693         }
2694 }
2695
2696 /*
2697  * PCI driver interface
2698  */
2699 static int
2700 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2701 {
2702         int     ret = -ENODEV;
2703         struct Scsi_Host *host;
2704         scsi_qla_host_t *base_vha = NULL;
2705         struct qla_hw_data *ha;
2706         char pci_info[30];
2707         char fw_str[30], wq_name[30];
2708         struct scsi_host_template *sht;
2709         int bars, mem_only = 0;
2710         uint16_t req_length = 0, rsp_length = 0;
2711         struct req_que *req = NULL;
2712         struct rsp_que *rsp = NULL;
2713         int i;
2714
2715         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2716         sht = &qla2xxx_driver_template;
2717         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2718             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2719             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2720             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2721             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2722             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2723             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2724             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2725             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2726             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2727             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2728             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2729             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2730             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2731             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2732                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2733                 mem_only = 1;
2734                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2735                     "Mem only adapter.\n");
2736         }
2737         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2738             "Bars=%d.\n", bars);
2739
2740         if (mem_only) {
2741                 if (pci_enable_device_mem(pdev))
2742                         return ret;
2743         } else {
2744                 if (pci_enable_device(pdev))
2745                         return ret;
2746         }
2747
2748         /* This may fail but that's ok */
2749         pci_enable_pcie_error_reporting(pdev);
2750
2751         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2752         if (!ha) {
2753                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2754                     "Unable to allocate memory for ha.\n");
2755                 goto disable_device;
2756         }
2757         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2758             "Memory allocated for ha=%p.\n", ha);
2759         ha->pdev = pdev;
2760         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2761         spin_lock_init(&ha->tgt.q_full_lock);
2762         spin_lock_init(&ha->tgt.sess_lock);
2763         spin_lock_init(&ha->tgt.atio_lock);
2764
2765         atomic_set(&ha->nvme_active_aen_cnt, 0);
2766
2767         /* Clear our data area */
2768         ha->bars = bars;
2769         ha->mem_only = mem_only;
2770         spin_lock_init(&ha->hardware_lock);
2771         spin_lock_init(&ha->vport_slock);
2772         mutex_init(&ha->selflogin_lock);
2773         mutex_init(&ha->optrom_mutex);
2774
2775         /* Set ISP-type information. */
2776         qla2x00_set_isp_flags(ha);
2777
2778         /* Set EEH reset type to fundamental if required by hba */
2779         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2780             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2781                 pdev->needs_freset = 1;
2782
2783         ha->prev_topology = 0;
2784         ha->init_cb_size = sizeof(init_cb_t);
2785         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2786         ha->optrom_size = OPTROM_SIZE_2300;
2787
2788         /* Assign ISP specific operations. */
2789         if (IS_QLA2100(ha)) {
2790                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2791                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2792                 req_length = REQUEST_ENTRY_CNT_2100;
2793                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2794                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2795                 ha->gid_list_info_size = 4;
2796                 ha->flash_conf_off = ~0;
2797                 ha->flash_data_off = ~0;
2798                 ha->nvram_conf_off = ~0;
2799                 ha->nvram_data_off = ~0;
2800                 ha->isp_ops = &qla2100_isp_ops;
2801         } else if (IS_QLA2200(ha)) {
2802                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2803                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2804                 req_length = REQUEST_ENTRY_CNT_2200;
2805                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2806                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2807                 ha->gid_list_info_size = 4;
2808                 ha->flash_conf_off = ~0;
2809                 ha->flash_data_off = ~0;
2810                 ha->nvram_conf_off = ~0;
2811                 ha->nvram_data_off = ~0;
2812                 ha->isp_ops = &qla2100_isp_ops;
2813         } else if (IS_QLA23XX(ha)) {
2814                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2815                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2816                 req_length = REQUEST_ENTRY_CNT_2200;
2817                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2818                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2819                 ha->gid_list_info_size = 6;
2820                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2821                         ha->optrom_size = OPTROM_SIZE_2322;
2822                 ha->flash_conf_off = ~0;
2823                 ha->flash_data_off = ~0;
2824                 ha->nvram_conf_off = ~0;
2825                 ha->nvram_data_off = ~0;
2826                 ha->isp_ops = &qla2300_isp_ops;
2827         } else if (IS_QLA24XX_TYPE(ha)) {
2828                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2829                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2830                 req_length = REQUEST_ENTRY_CNT_24XX;
2831                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2832                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2833                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2834                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2835                 ha->gid_list_info_size = 8;
2836                 ha->optrom_size = OPTROM_SIZE_24XX;
2837                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2838                 ha->isp_ops = &qla24xx_isp_ops;
2839                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2840                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2841                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2842                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2843         } else if (IS_QLA25XX(ha)) {
2844                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2845                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2846                 req_length = REQUEST_ENTRY_CNT_24XX;
2847                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2848                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2849                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2850                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2851                 ha->gid_list_info_size = 8;
2852                 ha->optrom_size = OPTROM_SIZE_25XX;
2853                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2854                 ha->isp_ops = &qla25xx_isp_ops;
2855                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2856                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2857                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2858                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2859         } else if (IS_QLA81XX(ha)) {
2860                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2861                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2862                 req_length = REQUEST_ENTRY_CNT_24XX;
2863                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2864                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2865                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2866                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2867                 ha->gid_list_info_size = 8;
2868                 ha->optrom_size = OPTROM_SIZE_81XX;
2869                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2870                 ha->isp_ops = &qla81xx_isp_ops;
2871                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2872                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2873                 ha->nvram_conf_off = ~0;
2874                 ha->nvram_data_off = ~0;
2875         } else if (IS_QLA82XX(ha)) {
2876                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2877                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2878                 req_length = REQUEST_ENTRY_CNT_82XX;
2879                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2880                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2881                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2882                 ha->gid_list_info_size = 8;
2883                 ha->optrom_size = OPTROM_SIZE_82XX;
2884                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2885                 ha->isp_ops = &qla82xx_isp_ops;
2886                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2887                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2888                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2889                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2890         } else if (IS_QLA8044(ha)) {
2891                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2892                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2893                 req_length = REQUEST_ENTRY_CNT_82XX;
2894                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2895                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2896                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2897                 ha->gid_list_info_size = 8;
2898                 ha->optrom_size = OPTROM_SIZE_83XX;
2899                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2900                 ha->isp_ops = &qla8044_isp_ops;
2901                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2902                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2903                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2904                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2905         } else if (IS_QLA83XX(ha)) {
2906                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2907                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2908                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2909                 req_length = REQUEST_ENTRY_CNT_83XX;
2910                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2911                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2912                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2913                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2914                 ha->gid_list_info_size = 8;
2915                 ha->optrom_size = OPTROM_SIZE_83XX;
2916                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2917                 ha->isp_ops = &qla83xx_isp_ops;
2918                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2919                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2920                 ha->nvram_conf_off = ~0;
2921                 ha->nvram_data_off = ~0;
2922         }  else if (IS_QLAFX00(ha)) {
2923                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2924                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2925                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2926                 req_length = REQUEST_ENTRY_CNT_FX00;
2927                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2928                 ha->isp_ops = &qlafx00_isp_ops;
2929                 ha->port_down_retry_count = 30; /* default value */
2930                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2931                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2932                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2933                 ha->mr.fw_hbt_en = 1;
2934                 ha->mr.host_info_resend = false;
2935                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2936         } else if (IS_QLA27XX(ha)) {
2937                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2938                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2939                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2940                 req_length = REQUEST_ENTRY_CNT_83XX;
2941                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2942                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2943                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2944                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2945                 ha->gid_list_info_size = 8;
2946                 ha->optrom_size = OPTROM_SIZE_83XX;
2947                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2948                 ha->isp_ops = &qla27xx_isp_ops;
2949                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2950                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2951                 ha->nvram_conf_off = ~0;
2952                 ha->nvram_data_off = ~0;
2953         }
2954
2955         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2956             "mbx_count=%d, req_length=%d, "
2957             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2958             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2959             "max_fibre_devices=%d.\n",
2960             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2961             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2962             ha->nvram_npiv_size, ha->max_fibre_devices);
2963         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2964             "isp_ops=%p, flash_conf_off=%d, "
2965             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2966             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2967             ha->nvram_conf_off, ha->nvram_data_off);
2968
2969         /* Configure PCI I/O space */
2970         ret = ha->isp_ops->iospace_config(ha);
2971         if (ret)
2972                 goto iospace_config_failed;
2973
2974         ql_log_pci(ql_log_info, pdev, 0x001d,
2975             "Found an ISP%04X irq %d iobase 0x%p.\n",
2976             pdev->device, pdev->irq, ha->iobase);
2977         mutex_init(&ha->vport_lock);
2978         mutex_init(&ha->mq_lock);
2979         init_completion(&ha->mbx_cmd_comp);
2980         complete(&ha->mbx_cmd_comp);
2981         init_completion(&ha->mbx_intr_comp);
2982         init_completion(&ha->dcbx_comp);
2983         init_completion(&ha->lb_portup_comp);
2984
2985         set_bit(0, (unsigned long *) ha->vp_idx_map);
2986
2987         qla2x00_config_dma_addressing(ha);
2988         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2989             "64 Bit addressing is %s.\n",
2990             ha->flags.enable_64bit_addressing ? "enable" :
2991             "disable");
2992         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2993         if (ret) {
2994                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2995                     "Failed to allocate memory for adapter, aborting.\n");
2996
2997                 goto probe_hw_failed;
2998         }
2999
3000         req->max_q_depth = MAX_Q_DEPTH;
3001         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3002                 req->max_q_depth = ql2xmaxqdepth;
3003
3004
3005         base_vha = qla2x00_create_host(sht, ha);
3006         if (!base_vha) {
3007                 ret = -ENOMEM;
3008                 goto probe_hw_failed;
3009         }
3010
3011         pci_set_drvdata(pdev, base_vha);
3012         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3013
3014         host = base_vha->host;
3015         base_vha->req = req;
3016         if (IS_QLA2XXX_MIDTYPE(ha))
3017                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
3018         else
3019                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3020                                                 base_vha->vp_idx;
3021
3022         /* Setup fcport template structure. */
3023         ha->mr.fcport.vha = base_vha;
3024         ha->mr.fcport.port_type = FCT_UNKNOWN;
3025         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3026         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3027         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3028         ha->mr.fcport.scan_state = 1;
3029
3030         /* Set the SG table size based on ISP type */
3031         if (!IS_FWI2_CAPABLE(ha)) {
3032                 if (IS_QLA2100(ha))
3033                         host->sg_tablesize = 32;
3034         } else {
3035                 if (!IS_QLA82XX(ha))
3036                         host->sg_tablesize = QLA_SG_ALL;
3037         }
3038         host->max_id = ha->max_fibre_devices;
3039         host->cmd_per_lun = 3;
3040         host->unique_id = host->host_no;
3041         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3042                 host->max_cmd_len = 32;
3043         else
3044                 host->max_cmd_len = MAX_CMDSZ;
3045         host->max_channel = MAX_BUSES - 1;
3046         /* Older HBAs support only 16-bit LUNs */
3047         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3048             ql2xmaxlun > 0xffff)
3049                 host->max_lun = 0xffff;
3050         else
3051                 host->max_lun = ql2xmaxlun;
3052         host->transportt = qla2xxx_transport_template;
3053         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3054
3055         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3056             "max_id=%d this_id=%d "
3057             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3058             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3059             host->this_id, host->cmd_per_lun, host->unique_id,
3060             host->max_cmd_len, host->max_channel, host->max_lun,
3061             host->transportt, sht->vendor_id);
3062
3063         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3064
3065         /* Set up the irqs */
3066         ret = qla2x00_request_irqs(ha, rsp);
3067         if (ret)
3068                 goto probe_failed;
3069
3070         /* Alloc arrays of request and response ring ptrs */
3071         ret = qla2x00_alloc_queues(ha, req, rsp);
3072         if (ret) {
3073                 ql_log(ql_log_fatal, base_vha, 0x003d,
3074                     "Failed to allocate memory for queue pointers..."
3075                     "aborting.\n");
3076                 goto probe_failed;
3077         }
3078
3079         if (ha->mqenable && shost_use_blk_mq(host)) {
3080                 /* number of hardware queues supported by blk/scsi-mq*/
3081                 host->nr_hw_queues = ha->max_qpairs;
3082
3083                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3084                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3085         } else
3086                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3087                         "blk/scsi-mq disabled.\n");
3088
3089         qlt_probe_one_stage1(base_vha, ha);
3090
3091         pci_save_state(pdev);
3092
3093         /* Assign back pointers */
3094         rsp->req = req;
3095         req->rsp = rsp;
3096
3097         if (IS_QLAFX00(ha)) {
3098                 ha->rsp_q_map[0] = rsp;
3099                 ha->req_q_map[0] = req;
3100                 set_bit(0, ha->req_qid_map);
3101                 set_bit(0, ha->rsp_qid_map);
3102         }
3103
3104         /* FWI2-capable only. */
3105         req->req_q_in = &ha->iobase->isp24.req_q_in;
3106         req->req_q_out = &ha->iobase->isp24.req_q_out;
3107         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3108         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3109         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3110                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3111                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3112                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3113                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3114         }
3115
3116         if (IS_QLAFX00(ha)) {
3117                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3118                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3119                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3120                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3121         }
3122
3123         if (IS_P3P_TYPE(ha)) {
3124                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3125                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3126                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3127         }
3128
3129         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3130             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3131             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3132         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3133             "req->req_q_in=%p req->req_q_out=%p "
3134             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3135             req->req_q_in, req->req_q_out,
3136             rsp->rsp_q_in, rsp->rsp_q_out);
3137         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3138             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3139             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3140         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3141             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3142             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3143
3144         if (ha->isp_ops->initialize_adapter(base_vha)) {
3145                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3146                     "Failed to initialize adapter - Adapter flags %x.\n",
3147                     base_vha->device_flags);
3148
3149                 if (IS_QLA82XX(ha)) {
3150                         qla82xx_idc_lock(ha);
3151                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3152                                 QLA8XXX_DEV_FAILED);
3153                         qla82xx_idc_unlock(ha);
3154                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3155                             "HW State: FAILED.\n");
3156                 } else if (IS_QLA8044(ha)) {
3157                         qla8044_idc_lock(ha);
3158                         qla8044_wr_direct(base_vha,
3159                                 QLA8044_CRB_DEV_STATE_INDEX,
3160                                 QLA8XXX_DEV_FAILED);
3161                         qla8044_idc_unlock(ha);
3162                         ql_log(ql_log_fatal, base_vha, 0x0150,
3163                             "HW State: FAILED.\n");
3164                 }
3165
3166                 ret = -ENODEV;
3167                 goto probe_failed;
3168         }
3169
3170         if (IS_QLAFX00(ha))
3171                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3172         else
3173                 host->can_queue = req->num_outstanding_cmds - 10;
3174
3175         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3176             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3177             host->can_queue, base_vha->req,
3178             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3179
3180         ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3181         if (unlikely(!ha->wq)) {
3182                 ret = -ENOMEM;
3183                 goto probe_failed;
3184         }
3185
3186         if (ha->mqenable) {
3187                 bool mq = false;
3188                 bool startit = false;
3189
3190                 if (QLA_TGT_MODE_ENABLED()) {
3191                         mq = true;
3192                         startit = false;
3193                 }
3194
3195                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3196                     shost_use_blk_mq(host)) {
3197                         mq = true;
3198                         startit = true;
3199                 }
3200
3201                 if (mq) {
3202                         /* Create start of day qpairs for Block MQ */
3203                         for (i = 0; i < ha->max_qpairs; i++)
3204                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3205                 }
3206         }
3207
3208         if (ha->flags.running_gold_fw)
3209                 goto skip_dpc;
3210
3211         /*
3212          * Startup the kernel thread for this host adapter
3213          */
3214         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3215             "%s_dpc", base_vha->host_str);
3216         if (IS_ERR(ha->dpc_thread)) {
3217                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3218                     "Failed to start DPC thread.\n");
3219                 ret = PTR_ERR(ha->dpc_thread);
3220                 ha->dpc_thread = NULL;
3221                 goto probe_failed;
3222         }
3223         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3224             "DPC thread started successfully.\n");
3225
3226         /*
3227          * If we're not coming up in initiator mode, we might sit for
3228          * a while without waking up the dpc thread, which leads to a
3229          * stuck process warning.  So just kick the dpc once here and
3230          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3231          */
3232         qla2xxx_wake_dpc(base_vha);
3233
3234         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3235
3236         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3237                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3238                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3239                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3240
3241                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3242                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3243                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3244                 INIT_WORK(&ha->idc_state_handler,
3245                     qla83xx_idc_state_handler_work);
3246                 INIT_WORK(&ha->nic_core_unrecoverable,
3247                     qla83xx_nic_core_unrecoverable_work);
3248         }
3249
3250 skip_dpc:
3251         list_add_tail(&base_vha->list, &ha->vp_list);
3252         base_vha->host->irq = ha->pdev->irq;
3253
3254         /* Initialized the timer */
3255         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3256         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3257             "Started qla2x00_timer with "
3258             "interval=%d.\n", WATCH_INTERVAL);
3259         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3260             "Detected hba at address=%p.\n",
3261             ha);
3262
3263         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3264                 if (ha->fw_attributes & BIT_4) {
3265                         int prot = 0, guard;
3266                         base_vha->flags.difdix_supported = 1;
3267                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3268                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3269                         if (ql2xenabledif == 1)
3270                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3271                         scsi_host_set_prot(host,
3272                             prot | SHOST_DIF_TYPE1_PROTECTION
3273                             | SHOST_DIF_TYPE2_PROTECTION
3274                             | SHOST_DIF_TYPE3_PROTECTION
3275                             | SHOST_DIX_TYPE1_PROTECTION
3276                             | SHOST_DIX_TYPE2_PROTECTION
3277                             | SHOST_DIX_TYPE3_PROTECTION);
3278
3279                         guard = SHOST_DIX_GUARD_CRC;
3280
3281                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3282                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3283                                 guard |= SHOST_DIX_GUARD_IP;
3284
3285                         scsi_host_set_guard(host, guard);
3286                 } else
3287                         base_vha->flags.difdix_supported = 0;
3288         }
3289
3290         ha->isp_ops->enable_intrs(ha);
3291
3292         if (IS_QLAFX00(ha)) {
3293                 ret = qlafx00_fx_disc(base_vha,
3294                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3295                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3296                     QLA_SG_ALL : 128;
3297         }
3298
3299         ret = scsi_add_host(host, &pdev->dev);
3300         if (ret)
3301                 goto probe_failed;
3302
3303         base_vha->flags.init_done = 1;
3304         base_vha->flags.online = 1;
3305         ha->prev_minidump_failed = 0;
3306
3307         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3308             "Init done and hba is online.\n");
3309
3310         if (qla_ini_mode_enabled(base_vha) ||
3311                 qla_dual_mode_enabled(base_vha))
3312                 scsi_scan_host(host);
3313         else
3314                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3315                         "skipping scsi_scan_host() for non-initiator port\n");
3316
3317         qla2x00_alloc_sysfs_attr(base_vha);
3318
3319         if (IS_QLAFX00(ha)) {
3320                 ret = qlafx00_fx_disc(base_vha,
3321                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3322
3323                 /* Register system information */
3324                 ret =  qlafx00_fx_disc(base_vha,
3325                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3326         }
3327
3328         qla2x00_init_host_attr(base_vha);
3329
3330         qla2x00_dfs_setup(base_vha);
3331
3332         ql_log(ql_log_info, base_vha, 0x00fb,
3333             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3334         ql_log(ql_log_info, base_vha, 0x00fc,
3335             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3336             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3337             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3338             base_vha->host_no,
3339             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3340
3341         qlt_add_target(ha, base_vha);
3342
3343         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3344
3345         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3346                 return -ENODEV;
3347
3348         if (ha->flags.detected_lr_sfp) {
3349                 ql_log(ql_log_info, base_vha, 0xffff,
3350                     "Reset chip to pick up LR SFP setting\n");
3351                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3352                 qla2xxx_wake_dpc(base_vha);
3353         }
3354
3355         return 0;
3356
3357 probe_failed:
3358         if (base_vha->timer_active)
3359                 qla2x00_stop_timer(base_vha);
3360         base_vha->flags.online = 0;
3361         if (ha->dpc_thread) {
3362                 struct task_struct *t = ha->dpc_thread;
3363
3364                 ha->dpc_thread = NULL;
3365                 kthread_stop(t);
3366         }
3367
3368         qla2x00_free_device(base_vha);
3369         scsi_host_put(base_vha->host);
3370         /*
3371          * Need to NULL out local req/rsp after
3372          * qla2x00_free_device => qla2x00_free_queues frees
3373          * what these are pointing to. Or else we'll
3374          * fall over below in qla2x00_free_req/rsp_que.
3375          */
3376         req = NULL;
3377         rsp = NULL;
3378
3379 probe_hw_failed:
3380         qla2x00_mem_free(ha);
3381         qla2x00_free_req_que(ha, req);
3382         qla2x00_free_rsp_que(ha, rsp);
3383         qla2x00_clear_drv_active(ha);
3384
3385 iospace_config_failed:
3386         if (IS_P3P_TYPE(ha)) {
3387                 if (!ha->nx_pcibase)
3388                         iounmap((device_reg_t *)ha->nx_pcibase);
3389                 if (!ql2xdbwr)
3390                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3391         } else {
3392                 if (ha->iobase)
3393                         iounmap(ha->iobase);
3394                 if (ha->cregbase)
3395                         iounmap(ha->cregbase);
3396         }
3397         pci_release_selected_regions(ha->pdev, ha->bars);
3398         kfree(ha);
3399
3400 disable_device:
3401         pci_disable_device(pdev);
3402         return ret;
3403 }
3404
3405 static void
3406 qla2x00_shutdown(struct pci_dev *pdev)
3407 {
3408         scsi_qla_host_t *vha;
3409         struct qla_hw_data  *ha;
3410
3411         vha = pci_get_drvdata(pdev);
3412         ha = vha->hw;
3413
3414         ql_log(ql_log_info, vha, 0xfffa,
3415                 "Adapter shutdown\n");
3416
3417         /*
3418          * Prevent future board_disable and wait
3419          * until any pending board_disable has completed.
3420          */
3421         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3422         cancel_work_sync(&ha->board_disable);
3423
3424         if (!atomic_read(&pdev->enable_cnt))
3425                 return;
3426
3427         /* Notify ISPFX00 firmware */
3428         if (IS_QLAFX00(ha))
3429                 qlafx00_driver_shutdown(vha, 20);
3430
3431         /* Turn-off FCE trace */
3432         if (ha->flags.fce_enabled) {
3433                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3434                 ha->flags.fce_enabled = 0;
3435         }
3436
3437         /* Turn-off EFT trace */
3438         if (ha->eft)
3439                 qla2x00_disable_eft_trace(vha);
3440
3441         /* Stop currently executing firmware. */
3442         qla2x00_try_to_stop_firmware(vha);
3443
3444         /* Disable timer */
3445         if (vha->timer_active)
3446                 qla2x00_stop_timer(vha);
3447
3448         /* Turn adapter off line */
3449         vha->flags.online = 0;
3450
3451         /* turn-off interrupts on the card */
3452         if (ha->interrupts_on) {
3453                 vha->flags.init_done = 0;
3454                 ha->isp_ops->disable_intrs(ha);
3455         }
3456
3457         qla2x00_free_irqs(vha);
3458
3459         qla2x00_free_fw_dump(ha);
3460
3461         pci_disable_device(pdev);
3462         ql_log(ql_log_info, vha, 0xfffe,
3463                 "Adapter shutdown successfully.\n");
3464 }
3465
3466 /* Deletes all the virtual ports for a given ha */
3467 static void
3468 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3469 {
3470         scsi_qla_host_t *vha;
3471         unsigned long flags;
3472
3473         mutex_lock(&ha->vport_lock);
3474         while (ha->cur_vport_count) {
3475                 spin_lock_irqsave(&ha->vport_slock, flags);
3476
3477                 BUG_ON(base_vha->list.next == &ha->vp_list);
3478                 /* This assumes first entry in ha->vp_list is always base vha */
3479                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3480                 scsi_host_get(vha->host);
3481
3482                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3483                 mutex_unlock(&ha->vport_lock);
3484
3485                 fc_vport_terminate(vha->fc_vport);
3486                 scsi_host_put(vha->host);
3487
3488                 mutex_lock(&ha->vport_lock);
3489         }
3490         mutex_unlock(&ha->vport_lock);
3491 }
3492
3493 /* Stops all deferred work threads */
3494 static void
3495 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3496 {
3497         /* Cancel all work and destroy DPC workqueues */
3498         if (ha->dpc_lp_wq) {
3499                 cancel_work_sync(&ha->idc_aen);
3500                 destroy_workqueue(ha->dpc_lp_wq);
3501                 ha->dpc_lp_wq = NULL;
3502         }
3503
3504         if (ha->dpc_hp_wq) {
3505                 cancel_work_sync(&ha->nic_core_reset);
3506                 cancel_work_sync(&ha->idc_state_handler);
3507                 cancel_work_sync(&ha->nic_core_unrecoverable);
3508                 destroy_workqueue(ha->dpc_hp_wq);
3509                 ha->dpc_hp_wq = NULL;
3510         }
3511
3512         /* Kill the kernel thread for this host */
3513         if (ha->dpc_thread) {
3514                 struct task_struct *t = ha->dpc_thread;
3515
3516                 /*
3517                  * qla2xxx_wake_dpc checks for ->dpc_thread
3518                  * so we need to zero it out.
3519                  */
3520                 ha->dpc_thread = NULL;
3521                 kthread_stop(t);
3522         }
3523 }
3524
3525 static void
3526 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3527 {
3528         if (IS_QLA82XX(ha)) {
3529
3530                 iounmap((device_reg_t *)ha->nx_pcibase);
3531                 if (!ql2xdbwr)
3532                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3533         } else {
3534                 if (ha->iobase)
3535                         iounmap(ha->iobase);
3536
3537                 if (ha->cregbase)
3538                         iounmap(ha->cregbase);
3539
3540                 if (ha->mqiobase)
3541                         iounmap(ha->mqiobase);
3542
3543                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3544                         iounmap(ha->msixbase);
3545         }
3546 }
3547
3548 static void
3549 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3550 {
3551         if (IS_QLA8044(ha)) {
3552                 qla8044_idc_lock(ha);
3553                 qla8044_clear_drv_active(ha);
3554                 qla8044_idc_unlock(ha);
3555         } else if (IS_QLA82XX(ha)) {
3556                 qla82xx_idc_lock(ha);
3557                 qla82xx_clear_drv_active(ha);
3558                 qla82xx_idc_unlock(ha);
3559         }
3560 }
3561
3562 static void
3563 qla2x00_remove_one(struct pci_dev *pdev)
3564 {
3565         scsi_qla_host_t *base_vha;
3566         struct qla_hw_data  *ha;
3567
3568         base_vha = pci_get_drvdata(pdev);
3569         ha = base_vha->hw;
3570
3571         /* Indicate device removal to prevent future board_disable and wait
3572          * until any pending board_disable has completed. */
3573         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3574         cancel_work_sync(&ha->board_disable);
3575
3576         /*
3577          * If the PCI device is disabled then there was a PCI-disconnect and
3578          * qla2x00_disable_board_on_pci_error has taken care of most of the
3579          * resources.
3580          */
3581         if (!atomic_read(&pdev->enable_cnt)) {
3582                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3583                     base_vha->gnl.l, base_vha->gnl.ldma);
3584
3585                 scsi_host_put(base_vha->host);
3586                 kfree(ha);
3587                 pci_set_drvdata(pdev, NULL);
3588                 return;
3589         }
3590         qla2x00_wait_for_hba_ready(base_vha);
3591
3592         qla2x00_wait_for_sess_deletion(base_vha);
3593
3594         /*
3595          * if UNLOAD flag is already set, then continue unload,
3596          * where it was set first.
3597          */
3598         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3599                 return;
3600
3601         set_bit(UNLOADING, &base_vha->dpc_flags);
3602
3603         qla_nvme_delete(base_vha);
3604
3605         dma_free_coherent(&ha->pdev->dev,
3606                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3607
3608         if (IS_QLAFX00(ha))
3609                 qlafx00_driver_shutdown(base_vha, 20);
3610
3611         qla2x00_delete_all_vps(ha, base_vha);
3612
3613         if (IS_QLA8031(ha)) {
3614                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3615                     "Clearing fcoe driver presence.\n");
3616                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3617                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3618                             "Error while clearing DRV-Presence.\n");
3619         }
3620
3621         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3622
3623         qla2x00_dfs_remove(base_vha);
3624
3625         qla84xx_put_chip(base_vha);
3626
3627         /* Laser should be disabled only for ISP2031 */
3628         if (IS_QLA2031(ha))
3629                 qla83xx_disable_laser(base_vha);
3630
3631         /* Disable timer */
3632         if (base_vha->timer_active)
3633                 qla2x00_stop_timer(base_vha);
3634
3635         base_vha->flags.online = 0;
3636
3637         /* free DMA memory */
3638         if (ha->exlogin_buf)
3639                 qla2x00_free_exlogin_buffer(ha);
3640
3641         /* free DMA memory */
3642         if (ha->exchoffld_buf)
3643                 qla2x00_free_exchoffld_buffer(ha);
3644
3645         qla2x00_destroy_deferred_work(ha);
3646
3647         qlt_remove_target(ha, base_vha);
3648
3649         qla2x00_free_sysfs_attr(base_vha, true);
3650
3651         fc_remove_host(base_vha->host);
3652         qlt_remove_target_resources(ha);
3653
3654         scsi_remove_host(base_vha->host);
3655
3656         qla2x00_free_device(base_vha);
3657
3658         qla2x00_clear_drv_active(ha);
3659
3660         scsi_host_put(base_vha->host);
3661
3662         qla2x00_unmap_iobases(ha);
3663
3664         pci_release_selected_regions(ha->pdev, ha->bars);
3665         kfree(ha);
3666
3667         pci_disable_pcie_error_reporting(pdev);
3668
3669         pci_disable_device(pdev);
3670 }
3671
3672 static void
3673 qla2x00_free_device(scsi_qla_host_t *vha)
3674 {
3675         struct qla_hw_data *ha = vha->hw;
3676
3677         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3678
3679         /* Disable timer */
3680         if (vha->timer_active)
3681                 qla2x00_stop_timer(vha);
3682
3683         qla25xx_delete_queues(vha);
3684
3685         if (ha->flags.fce_enabled)
3686                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3687
3688         if (ha->eft)
3689                 qla2x00_disable_eft_trace(vha);
3690
3691         /* Stop currently executing firmware. */
3692         qla2x00_try_to_stop_firmware(vha);
3693
3694         vha->flags.online = 0;
3695
3696         /* turn-off interrupts on the card */
3697         if (ha->interrupts_on) {
3698                 vha->flags.init_done = 0;
3699                 ha->isp_ops->disable_intrs(ha);
3700         }
3701
3702         qla2x00_free_fcports(vha);
3703
3704         qla2x00_free_irqs(vha);
3705
3706         /* Flush the work queue and remove it */
3707         if (ha->wq) {
3708                 flush_workqueue(ha->wq);
3709                 destroy_workqueue(ha->wq);
3710                 ha->wq = NULL;
3711         }
3712
3713
3714         qla2x00_mem_free(ha);
3715
3716         qla82xx_md_free(vha);
3717
3718         qla2x00_free_queues(ha);
3719 }
3720
3721 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3722 {
3723         fc_port_t *fcport, *tfcport;
3724
3725         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3726                 list_del(&fcport->list);
3727                 qla2x00_clear_loop_id(fcport);
3728                 kfree(fcport);
3729         }
3730 }
3731
3732 static inline void
3733 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3734     int defer)
3735 {
3736         struct fc_rport *rport;
3737         scsi_qla_host_t *base_vha;
3738         unsigned long flags;
3739
3740         if (!fcport->rport)
3741                 return;
3742
3743         rport = fcport->rport;
3744         if (defer) {
3745                 base_vha = pci_get_drvdata(vha->hw->pdev);
3746                 spin_lock_irqsave(vha->host->host_lock, flags);
3747                 fcport->drport = rport;
3748                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3749                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3750                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3751                 qla2xxx_wake_dpc(base_vha);
3752         } else {
3753                 int now;
3754                 if (rport) {
3755                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3756                             "%s %8phN. rport %p roles %x\n",
3757                             __func__, fcport->port_name, rport,
3758                             rport->roles);
3759                         fc_remote_port_delete(rport);
3760                 }
3761                 qlt_do_generation_tick(vha, &now);
3762         }
3763 }
3764
3765 /*
3766  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3767  *
3768  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3769  *
3770  * Return: None.
3771  *
3772  * Context:
3773  */
3774 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3775     int do_login, int defer)
3776 {
3777         if (IS_QLAFX00(vha->hw)) {
3778                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3779                 qla2x00_schedule_rport_del(vha, fcport, defer);
3780                 return;
3781         }
3782
3783         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3784             vha->vp_idx == fcport->vha->vp_idx) {
3785                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3786                 qla2x00_schedule_rport_del(vha, fcport, defer);
3787         }
3788         /*
3789          * We may need to retry the login, so don't change the state of the
3790          * port but do the retries.
3791          */
3792         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3793                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3794
3795         if (!do_login)
3796                 return;
3797
3798         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3799
3800         if (fcport->login_retry == 0) {
3801                 fcport->login_retry = vha->hw->login_retry_count;
3802
3803                 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3804                     "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3805                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3806         }
3807 }
3808
3809 /*
3810  * qla2x00_mark_all_devices_lost
3811  *      Updates fcport state when device goes offline.
3812  *
3813  * Input:
3814  *      ha = adapter block pointer.
3815  *      fcport = port structure pointer.
3816  *
3817  * Return:
3818  *      None.
3819  *
3820  * Context:
3821  */
3822 void
3823 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3824 {
3825         fc_port_t *fcport;
3826
3827         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3828             "Mark all dev lost\n");
3829
3830         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3831                 fcport->scan_state = 0;
3832                 qlt_schedule_sess_for_deletion_lock(fcport);
3833
3834                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3835                         continue;
3836
3837                 /*
3838                  * No point in marking the device as lost, if the device is
3839                  * already DEAD.
3840                  */
3841                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3842                         continue;
3843                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3844                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3845                         if (defer)
3846                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3847                         else if (vha->vp_idx == fcport->vha->vp_idx)
3848                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3849                 }
3850         }
3851 }
3852
3853 /*
3854 * qla2x00_mem_alloc
3855 *      Allocates adapter memory.
3856 *
3857 * Returns:
3858 *      0  = success.
3859 *      !0  = failure.
3860 */
3861 static int
3862 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3863         struct req_que **req, struct rsp_que **rsp)
3864 {
3865         char    name[16];
3866
3867         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3868                 &ha->init_cb_dma, GFP_KERNEL);
3869         if (!ha->init_cb)
3870                 goto fail;
3871
3872         if (qlt_mem_alloc(ha) < 0)
3873                 goto fail_free_init_cb;
3874
3875         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3876                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3877         if (!ha->gid_list)
3878                 goto fail_free_tgt_mem;
3879
3880         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3881         if (!ha->srb_mempool)
3882                 goto fail_free_gid_list;
3883
3884         if (IS_P3P_TYPE(ha)) {
3885                 /* Allocate cache for CT6 Ctx. */
3886                 if (!ctx_cachep) {
3887                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3888                                 sizeof(struct ct6_dsd), 0,
3889                                 SLAB_HWCACHE_ALIGN, NULL);
3890                         if (!ctx_cachep)
3891                                 goto fail_free_srb_mempool;
3892                 }
3893                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3894                         ctx_cachep);
3895                 if (!ha->ctx_mempool)
3896                         goto fail_free_srb_mempool;
3897                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3898                     "ctx_cachep=%p ctx_mempool=%p.\n",
3899                     ctx_cachep, ha->ctx_mempool);
3900         }
3901
3902         /* Get memory for cached NVRAM */
3903         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3904         if (!ha->nvram)
3905                 goto fail_free_ctx_mempool;
3906
3907         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3908                 ha->pdev->device);
3909         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3910                 DMA_POOL_SIZE, 8, 0);
3911         if (!ha->s_dma_pool)
3912                 goto fail_free_nvram;
3913
3914         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3915             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3916             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3917
3918         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3919                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3920                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3921                 if (!ha->dl_dma_pool) {
3922                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3923                             "Failed to allocate memory for dl_dma_pool.\n");
3924                         goto fail_s_dma_pool;
3925                 }
3926
3927                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3928                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3929                 if (!ha->fcp_cmnd_dma_pool) {
3930                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3931                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3932                         goto fail_dl_dma_pool;
3933                 }
3934                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3935                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3936                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3937         }
3938
3939         /* Allocate memory for SNS commands */
3940         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3941         /* Get consistent memory allocated for SNS commands */
3942                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3943                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3944                 if (!ha->sns_cmd)
3945                         goto fail_dma_pool;
3946                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3947                     "sns_cmd: %p.\n", ha->sns_cmd);
3948         } else {
3949         /* Get consistent memory allocated for MS IOCB */
3950                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3951                         &ha->ms_iocb_dma);
3952                 if (!ha->ms_iocb)
3953                         goto fail_dma_pool;
3954         /* Get consistent memory allocated for CT SNS commands */
3955                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3956                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3957                 if (!ha->ct_sns)
3958                         goto fail_free_ms_iocb;
3959                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3960                     "ms_iocb=%p ct_sns=%p.\n",
3961                     ha->ms_iocb, ha->ct_sns);
3962         }
3963
3964         /* Allocate memory for request ring */
3965         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3966         if (!*req) {
3967                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3968                     "Failed to allocate memory for req.\n");
3969                 goto fail_req;
3970         }
3971         (*req)->length = req_len;
3972         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3973                 ((*req)->length + 1) * sizeof(request_t),
3974                 &(*req)->dma, GFP_KERNEL);
3975         if (!(*req)->ring) {
3976                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3977                     "Failed to allocate memory for req_ring.\n");
3978                 goto fail_req_ring;
3979         }
3980         /* Allocate memory for response ring */
3981         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3982         if (!*rsp) {
3983                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3984                     "Failed to allocate memory for rsp.\n");
3985                 goto fail_rsp;
3986         }
3987         (*rsp)->hw = ha;
3988         (*rsp)->length = rsp_len;
3989         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3990                 ((*rsp)->length + 1) * sizeof(response_t),
3991                 &(*rsp)->dma, GFP_KERNEL);
3992         if (!(*rsp)->ring) {
3993                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3994                     "Failed to allocate memory for rsp_ring.\n");
3995                 goto fail_rsp_ring;
3996         }
3997         (*req)->rsp = *rsp;
3998         (*rsp)->req = *req;
3999         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4000             "req=%p req->length=%d req->ring=%p rsp=%p "
4001             "rsp->length=%d rsp->ring=%p.\n",
4002             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4003             (*rsp)->ring);
4004         /* Allocate memory for NVRAM data for vports */
4005         if (ha->nvram_npiv_size) {
4006                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
4007                     ha->nvram_npiv_size, GFP_KERNEL);
4008                 if (!ha->npiv_info) {
4009                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4010                             "Failed to allocate memory for npiv_info.\n");
4011                         goto fail_npiv_info;
4012                 }
4013         } else
4014                 ha->npiv_info = NULL;
4015
4016         /* Get consistent memory allocated for EX-INIT-CB. */
4017         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4018                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4019                     &ha->ex_init_cb_dma);
4020                 if (!ha->ex_init_cb)
4021                         goto fail_ex_init_cb;
4022                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4023                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4024         }
4025
4026         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4027
4028         /* Get consistent memory allocated for Async Port-Database. */
4029         if (!IS_FWI2_CAPABLE(ha)) {
4030                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4031                         &ha->async_pd_dma);
4032                 if (!ha->async_pd)
4033                         goto fail_async_pd;
4034                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4035                     "async_pd=%p.\n", ha->async_pd);
4036         }
4037
4038         INIT_LIST_HEAD(&ha->vp_list);
4039
4040         /* Allocate memory for our loop_id bitmap */
4041         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
4042             GFP_KERNEL);
4043         if (!ha->loop_id_map)
4044                 goto fail_loop_id_map;
4045         else {
4046                 qla2x00_set_reserved_loop_ids(ha);
4047                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4048                     "loop_id_map=%p.\n", ha->loop_id_map);
4049         }
4050
4051         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4052             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4053         if (!ha->sfp_data) {
4054                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4055                     "Unable to allocate memory for SFP read-data.\n");
4056                 goto fail_sfp_data;
4057         }
4058
4059         return 0;
4060
4061 fail_sfp_data:
4062         kfree(ha->loop_id_map);
4063 fail_loop_id_map:
4064         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4065 fail_async_pd:
4066         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4067 fail_ex_init_cb:
4068         kfree(ha->npiv_info);
4069 fail_npiv_info:
4070         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4071                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4072         (*rsp)->ring = NULL;
4073         (*rsp)->dma = 0;
4074 fail_rsp_ring:
4075         kfree(*rsp);
4076         *rsp = NULL;
4077 fail_rsp:
4078         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4079                 sizeof(request_t), (*req)->ring, (*req)->dma);
4080         (*req)->ring = NULL;
4081         (*req)->dma = 0;
4082 fail_req_ring:
4083         kfree(*req);
4084         *req = NULL;
4085 fail_req:
4086         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4087                 ha->ct_sns, ha->ct_sns_dma);
4088         ha->ct_sns = NULL;
4089         ha->ct_sns_dma = 0;
4090 fail_free_ms_iocb:
4091         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4092         ha->ms_iocb = NULL;
4093         ha->ms_iocb_dma = 0;
4094
4095         if (ha->sns_cmd)
4096                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4097                     ha->sns_cmd, ha->sns_cmd_dma);
4098 fail_dma_pool:
4099         if (IS_QLA82XX(ha) || ql2xenabledif) {
4100                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4101                 ha->fcp_cmnd_dma_pool = NULL;
4102         }
4103 fail_dl_dma_pool:
4104         if (IS_QLA82XX(ha) || ql2xenabledif) {
4105                 dma_pool_destroy(ha->dl_dma_pool);
4106                 ha->dl_dma_pool = NULL;
4107         }
4108 fail_s_dma_pool:
4109         dma_pool_destroy(ha->s_dma_pool);
4110         ha->s_dma_pool = NULL;
4111 fail_free_nvram:
4112         kfree(ha->nvram);
4113         ha->nvram = NULL;
4114 fail_free_ctx_mempool:
4115         if (ha->ctx_mempool)
4116                 mempool_destroy(ha->ctx_mempool);
4117         ha->ctx_mempool = NULL;
4118 fail_free_srb_mempool:
4119         if (ha->srb_mempool)
4120                 mempool_destroy(ha->srb_mempool);
4121         ha->srb_mempool = NULL;
4122 fail_free_gid_list:
4123         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4124         ha->gid_list,
4125         ha->gid_list_dma);
4126         ha->gid_list = NULL;
4127         ha->gid_list_dma = 0;
4128 fail_free_tgt_mem:
4129         qlt_mem_free(ha);
4130 fail_free_init_cb:
4131         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4132         ha->init_cb_dma);
4133         ha->init_cb = NULL;
4134         ha->init_cb_dma = 0;
4135 fail:
4136         ql_log(ql_log_fatal, NULL, 0x0030,
4137             "Memory allocation failure.\n");
4138         return -ENOMEM;
4139 }
4140
4141 int
4142 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4143 {
4144         int rval;
4145         uint16_t        size, max_cnt, temp;
4146         struct qla_hw_data *ha = vha->hw;
4147
4148         /* Return if we don't need to alloacate any extended logins */
4149         if (!ql2xexlogins)
4150                 return QLA_SUCCESS;
4151
4152         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4153                 return QLA_SUCCESS;
4154
4155         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4156         max_cnt = 0;
4157         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4158         if (rval != QLA_SUCCESS) {
4159                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4160                     "Failed to get exlogin status.\n");
4161                 return rval;
4162         }
4163
4164         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4165         temp *= size;
4166
4167         if (temp != ha->exlogin_size) {
4168                 qla2x00_free_exlogin_buffer(ha);
4169                 ha->exlogin_size = temp;
4170
4171                 ql_log(ql_log_info, vha, 0xd024,
4172                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4173                     max_cnt, size, temp);
4174
4175                 ql_log(ql_log_info, vha, 0xd025,
4176                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4177
4178                 /* Get consistent memory for extended logins */
4179                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4180                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4181                 if (!ha->exlogin_buf) {
4182                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4183                     "Failed to allocate memory for exlogin_buf_dma.\n");
4184                         return -ENOMEM;
4185                 }
4186         }
4187
4188         /* Now configure the dma buffer */
4189         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4190         if (rval) {
4191                 ql_log(ql_log_fatal, vha, 0xd033,
4192                     "Setup extended login buffer  ****FAILED****.\n");
4193                 qla2x00_free_exlogin_buffer(ha);
4194         }
4195
4196         return rval;
4197 }
4198
4199 /*
4200 * qla2x00_free_exlogin_buffer
4201 *
4202 * Input:
4203 *       ha = adapter block pointer
4204 */
4205 void
4206 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4207 {
4208         if (ha->exlogin_buf) {
4209                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4210                     ha->exlogin_buf, ha->exlogin_buf_dma);
4211                 ha->exlogin_buf = NULL;
4212                 ha->exlogin_size = 0;
4213         }
4214 }
4215
4216 static void
4217 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4218 {
4219         u32 temp;
4220         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4221
4222         if (qla_ini_mode_enabled(vha)) {
4223                 if (ql2xiniexchg > max_cnt)
4224                         ql2xiniexchg = max_cnt;
4225
4226                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4227                         *ret_cnt = ql2xiniexchg;
4228         } else if (qla_tgt_mode_enabled(vha)) {
4229                 if (ql2xexchoffld > max_cnt)
4230                         ql2xexchoffld = max_cnt;
4231
4232                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4233                         *ret_cnt = ql2xexchoffld;
4234         } else if (qla_dual_mode_enabled(vha)) {
4235                 temp = ql2xiniexchg + ql2xexchoffld;
4236                 if (temp > max_cnt) {
4237                         ql2xiniexchg -= (temp - max_cnt)/2;
4238                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4239                         temp = max_cnt;
4240                 }
4241
4242                 if (temp > FW_DEF_EXCHANGES_CNT)
4243                         *ret_cnt = temp;
4244         }
4245 }
4246
4247 int
4248 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4249 {
4250         int rval;
4251         u16 size, max_cnt;
4252         u32 temp;
4253         struct qla_hw_data *ha = vha->hw;
4254
4255         if (!ha->flags.exchoffld_enabled)
4256                 return QLA_SUCCESS;
4257
4258         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4259                 return QLA_SUCCESS;
4260
4261         max_cnt = 0;
4262         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4263         if (rval != QLA_SUCCESS) {
4264                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4265                     "Failed to get exlogin status.\n");
4266                 return rval;
4267         }
4268
4269         qla2x00_number_of_exch(vha, &temp, max_cnt);
4270         temp *= size;
4271
4272         if (temp != ha->exchoffld_size) {
4273                 qla2x00_free_exchoffld_buffer(ha);
4274                 ha->exchoffld_size = temp;
4275
4276                 ql_log(ql_log_info, vha, 0xd016,
4277                     "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4278                     max_cnt, size, temp);
4279
4280                 ql_log(ql_log_info, vha, 0xd017,
4281                     "Exchange Buffers requested size = 0x%x\n",
4282                     ha->exchoffld_size);
4283
4284                 /* Get consistent memory for extended logins */
4285                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4286                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4287                 if (!ha->exchoffld_buf) {
4288                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4289                         "Failed to allocate memory for exchoffld_buf_dma.\n");
4290                         return -ENOMEM;
4291                 }
4292         }
4293
4294         /* Now configure the dma buffer */
4295         rval = qla_set_exchoffld_mem_cfg(vha);
4296         if (rval) {
4297                 ql_log(ql_log_fatal, vha, 0xd02e,
4298                     "Setup exchange offload buffer ****FAILED****.\n");
4299                 qla2x00_free_exchoffld_buffer(ha);
4300         } else {
4301                 /* re-adjust number of target exchange */
4302                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4303
4304                 if (qla_ini_mode_enabled(vha))
4305                         icb->exchange_count = 0;
4306                 else
4307                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4308         }
4309
4310         return rval;
4311 }
4312
4313 /*
4314 * qla2x00_free_exchoffld_buffer
4315 *
4316 * Input:
4317 *       ha = adapter block pointer
4318 */
4319 void
4320 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4321 {
4322         if (ha->exchoffld_buf) {
4323                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4324                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4325                 ha->exchoffld_buf = NULL;
4326                 ha->exchoffld_size = 0;
4327         }
4328 }
4329
4330 /*
4331 * qla2x00_free_fw_dump
4332 *       Frees fw dump stuff.
4333 *
4334 * Input:
4335 *       ha = adapter block pointer
4336 */
4337 static void
4338 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4339 {
4340         if (ha->fce)
4341                 dma_free_coherent(&ha->pdev->dev,
4342                     FCE_SIZE, ha->fce, ha->fce_dma);
4343
4344         if (ha->eft)
4345                 dma_free_coherent(&ha->pdev->dev,
4346                     EFT_SIZE, ha->eft, ha->eft_dma);
4347
4348         if (ha->fw_dump)
4349                 vfree(ha->fw_dump);
4350         if (ha->fw_dump_template)
4351                 vfree(ha->fw_dump_template);
4352
4353         ha->fce = NULL;
4354         ha->fce_dma = 0;
4355         ha->eft = NULL;
4356         ha->eft_dma = 0;
4357         ha->fw_dumped = 0;
4358         ha->fw_dump_cap_flags = 0;
4359         ha->fw_dump_reading = 0;
4360         ha->fw_dump = NULL;
4361         ha->fw_dump_len = 0;
4362         ha->fw_dump_template = NULL;
4363         ha->fw_dump_template_len = 0;
4364 }
4365
4366 /*
4367 * qla2x00_mem_free
4368 *      Frees all adapter allocated memory.
4369 *
4370 * Input:
4371 *      ha = adapter block pointer.
4372 */
4373 static void
4374 qla2x00_mem_free(struct qla_hw_data *ha)
4375 {
4376         qla2x00_free_fw_dump(ha);
4377
4378         if (ha->mctp_dump)
4379                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4380                     ha->mctp_dump_dma);
4381
4382         if (ha->srb_mempool)
4383                 mempool_destroy(ha->srb_mempool);
4384
4385         if (ha->dcbx_tlv)
4386                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4387                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4388
4389         if (ha->xgmac_data)
4390                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4391                     ha->xgmac_data, ha->xgmac_data_dma);
4392
4393         if (ha->sns_cmd)
4394                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4395                 ha->sns_cmd, ha->sns_cmd_dma);
4396
4397         if (ha->ct_sns)
4398                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4399                 ha->ct_sns, ha->ct_sns_dma);
4400
4401         if (ha->sfp_data)
4402                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4403                     ha->sfp_data_dma);
4404
4405         if (ha->ms_iocb)
4406                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4407
4408         if (ha->ex_init_cb)
4409                 dma_pool_free(ha->s_dma_pool,
4410                         ha->ex_init_cb, ha->ex_init_cb_dma);
4411
4412         if (ha->async_pd)
4413                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4414
4415         if (ha->s_dma_pool)
4416                 dma_pool_destroy(ha->s_dma_pool);
4417
4418         if (ha->gid_list)
4419                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4420                 ha->gid_list, ha->gid_list_dma);
4421
4422         if (IS_QLA82XX(ha)) {
4423                 if (!list_empty(&ha->gbl_dsd_list)) {
4424                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4425
4426                         /* clean up allocated prev pool */
4427                         list_for_each_entry_safe(dsd_ptr,
4428                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4429                                 dma_pool_free(ha->dl_dma_pool,
4430                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4431                                 list_del(&dsd_ptr->list);
4432                                 kfree(dsd_ptr);
4433                         }
4434                 }
4435         }
4436
4437         if (ha->dl_dma_pool)
4438                 dma_pool_destroy(ha->dl_dma_pool);
4439
4440         if (ha->fcp_cmnd_dma_pool)
4441                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4442
4443         if (ha->ctx_mempool)
4444                 mempool_destroy(ha->ctx_mempool);
4445
4446         qlt_mem_free(ha);
4447
4448         if (ha->init_cb)
4449                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4450                         ha->init_cb, ha->init_cb_dma);
4451
4452         vfree(ha->optrom_buffer);
4453         kfree(ha->nvram);
4454         kfree(ha->npiv_info);
4455         kfree(ha->swl);
4456         kfree(ha->loop_id_map);
4457
4458         ha->srb_mempool = NULL;
4459         ha->ctx_mempool = NULL;
4460         ha->sns_cmd = NULL;
4461         ha->sns_cmd_dma = 0;
4462         ha->ct_sns = NULL;
4463         ha->ct_sns_dma = 0;
4464         ha->ms_iocb = NULL;
4465         ha->ms_iocb_dma = 0;
4466         ha->init_cb = NULL;
4467         ha->init_cb_dma = 0;
4468         ha->ex_init_cb = NULL;
4469         ha->ex_init_cb_dma = 0;
4470         ha->async_pd = NULL;
4471         ha->async_pd_dma = 0;
4472         ha->loop_id_map = NULL;
4473         ha->npiv_info = NULL;
4474         ha->optrom_buffer = NULL;
4475         ha->swl = NULL;
4476         ha->nvram = NULL;
4477         ha->mctp_dump = NULL;
4478         ha->dcbx_tlv = NULL;
4479         ha->xgmac_data = NULL;
4480         ha->sfp_data = NULL;
4481
4482         ha->s_dma_pool = NULL;
4483         ha->dl_dma_pool = NULL;
4484         ha->fcp_cmnd_dma_pool = NULL;
4485
4486         ha->gid_list = NULL;
4487         ha->gid_list_dma = 0;
4488
4489         ha->tgt.atio_ring = NULL;
4490         ha->tgt.atio_dma = 0;
4491         ha->tgt.tgt_vp_map = NULL;
4492 }
4493
4494 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4495                                                 struct qla_hw_data *ha)
4496 {
4497         struct Scsi_Host *host;
4498         struct scsi_qla_host *vha = NULL;
4499
4500         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4501         if (!host) {
4502                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4503                     "Failed to allocate host from the scsi layer, aborting.\n");
4504                 return NULL;
4505         }
4506
4507         /* Clear our data area */
4508         vha = shost_priv(host);
4509         memset(vha, 0, sizeof(scsi_qla_host_t));
4510
4511         vha->host = host;
4512         vha->host_no = host->host_no;
4513         vha->hw = ha;
4514
4515         INIT_LIST_HEAD(&vha->vp_fcports);
4516         INIT_LIST_HEAD(&vha->work_list);
4517         INIT_LIST_HEAD(&vha->list);
4518         INIT_LIST_HEAD(&vha->qla_cmd_list);
4519         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4520         INIT_LIST_HEAD(&vha->logo_list);
4521         INIT_LIST_HEAD(&vha->plogi_ack_list);
4522         INIT_LIST_HEAD(&vha->qp_list);
4523         INIT_LIST_HEAD(&vha->gnl.fcports);
4524         INIT_LIST_HEAD(&vha->nvme_rport_list);
4525         INIT_LIST_HEAD(&vha->gpnid_list);
4526
4527         spin_lock_init(&vha->work_lock);
4528         spin_lock_init(&vha->cmd_list_lock);
4529         init_waitqueue_head(&vha->fcport_waitQ);
4530         init_waitqueue_head(&vha->vref_waitq);
4531
4532         vha->gnl.size = sizeof(struct get_name_list_extended) *
4533                         (ha->max_loop_id + 1);
4534         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4535             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4536         if (!vha->gnl.l) {
4537                 ql_log(ql_log_fatal, vha, 0xd04a,
4538                     "Alloc failed for name list.\n");
4539                 scsi_remove_host(vha->host);
4540                 return NULL;
4541         }
4542
4543         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4544         ql_dbg(ql_dbg_init, vha, 0x0041,
4545             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4546             vha->host, vha->hw, vha,
4547             dev_name(&(ha->pdev->dev)));
4548
4549         return vha;
4550 }
4551
4552 struct qla_work_evt *
4553 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4554 {
4555         struct qla_work_evt *e;
4556         uint8_t bail;
4557
4558         QLA_VHA_MARK_BUSY(vha, bail);
4559         if (bail)
4560                 return NULL;
4561
4562         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4563         if (!e) {
4564                 QLA_VHA_MARK_NOT_BUSY(vha);
4565                 return NULL;
4566         }
4567
4568         INIT_LIST_HEAD(&e->list);
4569         e->type = type;
4570         e->flags = QLA_EVT_FLAG_FREE;
4571         return e;
4572 }
4573
4574 int
4575 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4576 {
4577         unsigned long flags;
4578
4579         spin_lock_irqsave(&vha->work_lock, flags);
4580         list_add_tail(&e->list, &vha->work_list);
4581         spin_unlock_irqrestore(&vha->work_lock, flags);
4582
4583         if (QLA_EARLY_LINKUP(vha->hw))
4584                 schedule_work(&vha->iocb_work);
4585         else
4586                 qla2xxx_wake_dpc(vha);
4587
4588         return QLA_SUCCESS;
4589 }
4590
4591 int
4592 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4593     u32 data)
4594 {
4595         struct qla_work_evt *e;
4596
4597         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4598         if (!e)
4599                 return QLA_FUNCTION_FAILED;
4600
4601         e->u.aen.code = code;
4602         e->u.aen.data = data;
4603         return qla2x00_post_work(vha, e);
4604 }
4605
4606 int
4607 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4608 {
4609         struct qla_work_evt *e;
4610
4611         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4612         if (!e)
4613                 return QLA_FUNCTION_FAILED;
4614
4615         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4616         return qla2x00_post_work(vha, e);
4617 }
4618
4619 #define qla2x00_post_async_work(name, type)     \
4620 int qla2x00_post_async_##name##_work(           \
4621     struct scsi_qla_host *vha,                  \
4622     fc_port_t *fcport, uint16_t *data)          \
4623 {                                               \
4624         struct qla_work_evt *e;                 \
4625                                                 \
4626         e = qla2x00_alloc_work(vha, type);      \
4627         if (!e)                                 \
4628                 return QLA_FUNCTION_FAILED;     \
4629                                                 \
4630         e->u.logio.fcport = fcport;             \
4631         if (data) {                             \
4632                 e->u.logio.data[0] = data[0];   \
4633                 e->u.logio.data[1] = data[1];   \
4634         }                                       \
4635         return qla2x00_post_work(vha, e);       \
4636 }
4637
4638 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4639 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4640 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4641 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4642 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4643
4644 int
4645 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4646 {
4647         struct qla_work_evt *e;
4648
4649         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4650         if (!e)
4651                 return QLA_FUNCTION_FAILED;
4652
4653         e->u.uevent.code = code;
4654         return qla2x00_post_work(vha, e);
4655 }
4656
4657 static void
4658 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4659 {
4660         char event_string[40];
4661         char *envp[] = { event_string, NULL };
4662
4663         switch (code) {
4664         case QLA_UEVENT_CODE_FW_DUMP:
4665                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4666                     vha->host_no);
4667                 break;
4668         default:
4669                 /* do nothing */
4670                 break;
4671         }
4672         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4673 }
4674
4675 int
4676 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4677                         uint32_t *data, int cnt)
4678 {
4679         struct qla_work_evt *e;
4680
4681         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4682         if (!e)
4683                 return QLA_FUNCTION_FAILED;
4684
4685         e->u.aenfx.evtcode = evtcode;
4686         e->u.aenfx.count = cnt;
4687         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4688         return qla2x00_post_work(vha, e);
4689 }
4690
4691 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4692 {
4693         struct qla_work_evt *e;
4694
4695         e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4696         if (!e)
4697                 return QLA_FUNCTION_FAILED;
4698
4699         e->u.fcport.fcport = fcport;
4700         return qla2x00_post_work(vha, e);
4701 }
4702
4703 static
4704 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4705 {
4706         unsigned long flags;
4707         fc_port_t *fcport =  NULL, *tfcp;
4708         struct qlt_plogi_ack_t *pla =
4709             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4710         uint8_t free_fcport = 0;
4711
4712         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4713         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4714         if (fcport) {
4715                 fcport->d_id = e->u.new_sess.id;
4716                 if (pla) {
4717                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4718                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4719                         /* we took an extra ref_count to prevent PLOGI ACK when
4720                          * fcport/sess has not been created.
4721                          */
4722                         pla->ref_count--;
4723                 }
4724         } else {
4725                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4726                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4727                 if (fcport) {
4728                         fcport->d_id = e->u.new_sess.id;
4729                         fcport->scan_state = QLA_FCPORT_FOUND;
4730                         fcport->flags |= FCF_FABRIC_DEVICE;
4731                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4732
4733                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4734                             WWN_SIZE);
4735                 } else {
4736                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4737                                    "%s %8phC mem alloc fail.\n",
4738                                    __func__, e->u.new_sess.port_name);
4739
4740                         if (pla)
4741                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4742                         return;
4743                 }
4744
4745                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4746                 /* search again to make sure one else got ahead */
4747                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4748                     e->u.new_sess.port_name, 1);
4749                 if (tfcp) {
4750                         /* should rarily happen */
4751                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4752                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4753                             __func__, tfcp->port_name, tfcp->disc_state,
4754                             tfcp->fw_login_state);
4755
4756                         free_fcport = 1;
4757                 } else {
4758                         list_add_tail(&fcport->list, &vha->vp_fcports);
4759
4760                 }
4761                 if (pla) {
4762                         qlt_plogi_ack_link(vha, pla, fcport,
4763                             QLT_PLOGI_LINK_SAME_WWN);
4764                         pla->ref_count--;
4765                 }
4766         }
4767         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4768
4769         if (fcport) {
4770                 if (pla)
4771                         qlt_plogi_ack_unref(vha, pla);
4772                 else
4773                         qla24xx_async_gnl(vha, fcport);
4774         }
4775
4776         if (free_fcport) {
4777                 qla2x00_free_fcport(fcport);
4778                 if (pla)
4779                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
4780         }
4781 }
4782
4783 void
4784 qla2x00_do_work(struct scsi_qla_host *vha)
4785 {
4786         struct qla_work_evt *e, *tmp;
4787         unsigned long flags;
4788         LIST_HEAD(work);
4789
4790         spin_lock_irqsave(&vha->work_lock, flags);
4791         list_splice_init(&vha->work_list, &work);
4792         spin_unlock_irqrestore(&vha->work_lock, flags);
4793
4794         list_for_each_entry_safe(e, tmp, &work, list) {
4795                 list_del_init(&e->list);
4796
4797                 switch (e->type) {
4798                 case QLA_EVT_AEN:
4799                         fc_host_post_event(vha->host, fc_get_event_number(),
4800                             e->u.aen.code, e->u.aen.data);
4801                         break;
4802                 case QLA_EVT_IDC_ACK:
4803                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4804                         break;
4805                 case QLA_EVT_ASYNC_LOGIN:
4806                         qla2x00_async_login(vha, e->u.logio.fcport,
4807                             e->u.logio.data);
4808                         break;
4809                 case QLA_EVT_ASYNC_LOGOUT:
4810                         qla2x00_async_logout(vha, e->u.logio.fcport);
4811                         break;
4812                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4813                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4814                             e->u.logio.data);
4815                         break;
4816                 case QLA_EVT_ASYNC_ADISC:
4817                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4818                             e->u.logio.data);
4819                         break;
4820                 case QLA_EVT_ASYNC_ADISC_DONE:
4821                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4822                             e->u.logio.data);
4823                         break;
4824                 case QLA_EVT_UEVENT:
4825                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4826                         break;
4827                 case QLA_EVT_AENFX:
4828                         qlafx00_process_aen(vha, e);
4829                         break;
4830                 case QLA_EVT_GIDPN:
4831                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4832                         break;
4833                 case QLA_EVT_GPNID:
4834                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4835                         break;
4836                 case QLA_EVT_GPNID_DONE:
4837                         qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4838                         break;
4839                 case QLA_EVT_NEW_SESS:
4840                         qla24xx_create_new_sess(vha, e);
4841                         break;
4842                 case QLA_EVT_GPDB:
4843                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4844                             e->u.fcport.opt);
4845                         break;
4846                 case QLA_EVT_PRLI:
4847                         qla24xx_async_prli(vha, e->u.fcport.fcport);
4848                         break;
4849                 case QLA_EVT_GPSC:
4850                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4851                         break;
4852                 case QLA_EVT_UPD_FCPORT:
4853                         qla2x00_update_fcport(vha, e->u.fcport.fcport);
4854                         break;
4855                 case QLA_EVT_GNL:
4856                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
4857                         break;
4858                 case QLA_EVT_NACK:
4859                         qla24xx_do_nack_work(vha, e);
4860                         break;
4861                 }
4862                 if (e->flags & QLA_EVT_FLAG_FREE)
4863                         kfree(e);
4864
4865                 /* For each work completed decrement vha ref count */
4866                 QLA_VHA_MARK_NOT_BUSY(vha);
4867         }
4868 }
4869
4870 /* Relogins all the fcports of a vport
4871  * Context: dpc thread
4872  */
4873 void qla2x00_relogin(struct scsi_qla_host *vha)
4874 {
4875         fc_port_t       *fcport;
4876         int status;
4877         struct event_arg ea;
4878
4879         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4880         /*
4881          * If the port is not ONLINE then try to login
4882          * to it if we haven't run out of retries.
4883          */
4884                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4885                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4886
4887                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4888                                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
4889                                     "%s %8phC DS %d LS %d\n", __func__,
4890                                     fcport->port_name, fcport->disc_state,
4891                                     fcport->fw_login_state);
4892                                 memset(&ea, 0, sizeof(ea));
4893                                 ea.event = FCME_RELOGIN;
4894                                 ea.fcport = fcport;
4895                                 qla2x00_fcport_event_handler(vha, &ea);
4896                         } else {
4897                                 fcport->login_retry--;
4898                                 status = qla2x00_local_device_login(vha,
4899                                                                 fcport);
4900                                 if (status == QLA_SUCCESS) {
4901                                         fcport->old_loop_id = fcport->loop_id;
4902                                         ql_dbg(ql_dbg_disc, vha, 0x2003,
4903                                             "Port login OK: logged in ID 0x%x.\n",
4904                                             fcport->loop_id);
4905                                         qla2x00_update_fcport(vha, fcport);
4906                                 } else if (status == 1) {
4907                                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4908                                         /* retry the login again */
4909                                         ql_dbg(ql_dbg_disc, vha, 0x2007,
4910                                             "Retrying %d login again loop_id 0x%x.\n",
4911                                             fcport->login_retry,
4912                                             fcport->loop_id);
4913                                 } else {
4914                                         fcport->login_retry = 0;
4915                                 }
4916
4917                                 if (fcport->login_retry == 0 &&
4918                                     status != QLA_SUCCESS)
4919                                         qla2x00_clear_loop_id(fcport);
4920                         }
4921                 }
4922                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4923                         break;
4924         }
4925 }
4926
4927 /* Schedule work on any of the dpc-workqueues */
4928 void
4929 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4930 {
4931         struct qla_hw_data *ha = base_vha->hw;
4932
4933         switch (work_code) {
4934         case MBA_IDC_AEN: /* 0x8200 */
4935                 if (ha->dpc_lp_wq)
4936                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4937                 break;
4938
4939         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4940                 if (!ha->flags.nic_core_reset_hdlr_active) {
4941                         if (ha->dpc_hp_wq)
4942                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4943                 } else
4944                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4945                             "NIC Core reset is already active. Skip "
4946                             "scheduling it again.\n");
4947                 break;
4948         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4949                 if (ha->dpc_hp_wq)
4950                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4951                 break;
4952         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4953                 if (ha->dpc_hp_wq)
4954                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4955                 break;
4956         default:
4957                 ql_log(ql_log_warn, base_vha, 0xb05f,
4958                     "Unknown work-code=0x%x.\n", work_code);
4959         }
4960
4961         return;
4962 }
4963
4964 /* Work: Perform NIC Core Unrecoverable state handling */
4965 void
4966 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4967 {
4968         struct qla_hw_data *ha =
4969                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4970         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4971         uint32_t dev_state = 0;
4972
4973         qla83xx_idc_lock(base_vha, 0);
4974         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4975         qla83xx_reset_ownership(base_vha);
4976         if (ha->flags.nic_core_reset_owner) {
4977                 ha->flags.nic_core_reset_owner = 0;
4978                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4979                     QLA8XXX_DEV_FAILED);
4980                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4981                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4982         }
4983         qla83xx_idc_unlock(base_vha, 0);
4984 }
4985
4986 /* Work: Execute IDC state handler */
4987 void
4988 qla83xx_idc_state_handler_work(struct work_struct *work)
4989 {
4990         struct qla_hw_data *ha =
4991                 container_of(work, struct qla_hw_data, idc_state_handler);
4992         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4993         uint32_t dev_state = 0;
4994
4995         qla83xx_idc_lock(base_vha, 0);
4996         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4997         if (dev_state == QLA8XXX_DEV_FAILED ||
4998                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4999                 qla83xx_idc_state_handler(base_vha);
5000         qla83xx_idc_unlock(base_vha, 0);
5001 }
5002
5003 static int
5004 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5005 {
5006         int rval = QLA_SUCCESS;
5007         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5008         uint32_t heart_beat_counter1, heart_beat_counter2;
5009
5010         do {
5011                 if (time_after(jiffies, heart_beat_wait)) {
5012                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5013                             "Nic Core f/w is not alive.\n");
5014                         rval = QLA_FUNCTION_FAILED;
5015                         break;
5016                 }
5017
5018                 qla83xx_idc_lock(base_vha, 0);
5019                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5020                     &heart_beat_counter1);
5021                 qla83xx_idc_unlock(base_vha, 0);
5022                 msleep(100);
5023                 qla83xx_idc_lock(base_vha, 0);
5024                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5025                     &heart_beat_counter2);
5026                 qla83xx_idc_unlock(base_vha, 0);
5027         } while (heart_beat_counter1 == heart_beat_counter2);
5028
5029         return rval;
5030 }
5031
5032 /* Work: Perform NIC Core Reset handling */
5033 void
5034 qla83xx_nic_core_reset_work(struct work_struct *work)
5035 {
5036         struct qla_hw_data *ha =
5037                 container_of(work, struct qla_hw_data, nic_core_reset);
5038         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5039         uint32_t dev_state = 0;
5040
5041         if (IS_QLA2031(ha)) {
5042                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5043                         ql_log(ql_log_warn, base_vha, 0xb081,
5044                             "Failed to dump mctp\n");
5045                 return;
5046         }
5047
5048         if (!ha->flags.nic_core_reset_hdlr_active) {
5049                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5050                         qla83xx_idc_lock(base_vha, 0);
5051                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5052                             &dev_state);
5053                         qla83xx_idc_unlock(base_vha, 0);
5054                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5055                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5056                                     "Nic Core f/w is alive.\n");
5057                                 return;
5058                         }
5059                 }
5060
5061                 ha->flags.nic_core_reset_hdlr_active = 1;
5062                 if (qla83xx_nic_core_reset(base_vha)) {
5063                         /* NIC Core reset failed. */
5064                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5065                             "NIC Core reset failed.\n");
5066                 }
5067                 ha->flags.nic_core_reset_hdlr_active = 0;
5068         }
5069 }
5070
5071 /* Work: Handle 8200 IDC aens */
5072 void
5073 qla83xx_service_idc_aen(struct work_struct *work)
5074 {
5075         struct qla_hw_data *ha =
5076                 container_of(work, struct qla_hw_data, idc_aen);
5077         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5078         uint32_t dev_state, idc_control;
5079
5080         qla83xx_idc_lock(base_vha, 0);
5081         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5082         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5083         qla83xx_idc_unlock(base_vha, 0);
5084         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5085                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5086                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5087                             "Application requested NIC Core Reset.\n");
5088                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5089                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5090                     QLA_SUCCESS) {
5091                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5092                             "Other protocol driver requested NIC Core Reset.\n");
5093                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5094                 }
5095         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5096                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5097                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5098         }
5099 }
5100
5101 static void
5102 qla83xx_wait_logic(void)
5103 {
5104         int i;
5105
5106         /* Yield CPU */
5107         if (!in_interrupt()) {
5108                 /*
5109                  * Wait about 200ms before retrying again.
5110                  * This controls the number of retries for single
5111                  * lock operation.
5112                  */
5113                 msleep(100);
5114                 schedule();
5115         } else {
5116                 for (i = 0; i < 20; i++)
5117                         cpu_relax(); /* This a nop instr on i386 */
5118         }
5119 }
5120
5121 static int
5122 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5123 {
5124         int rval;
5125         uint32_t data;
5126         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5127         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5128         struct qla_hw_data *ha = base_vha->hw;
5129         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5130             "Trying force recovery of the IDC lock.\n");
5131
5132         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5133         if (rval)
5134                 return rval;
5135
5136         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5137                 return QLA_SUCCESS;
5138         } else {
5139                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5140                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5141                     data);
5142                 if (rval)
5143                         return rval;
5144
5145                 msleep(200);
5146
5147                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5148                     &data);
5149                 if (rval)
5150                         return rval;
5151
5152                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5153                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5154                                         ~(idc_lck_rcvry_stage_mask));
5155                         rval = qla83xx_wr_reg(base_vha,
5156                             QLA83XX_IDC_LOCK_RECOVERY, data);
5157                         if (rval)
5158                                 return rval;
5159
5160                         /* Forcefully perform IDC UnLock */
5161                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5162                             &data);
5163                         if (rval)
5164                                 return rval;
5165                         /* Clear lock-id by setting 0xff */
5166                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5167                             0xff);
5168                         if (rval)
5169                                 return rval;
5170                         /* Clear lock-recovery by setting 0x0 */
5171                         rval = qla83xx_wr_reg(base_vha,
5172                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5173                         if (rval)
5174                                 return rval;
5175                 } else
5176                         return QLA_SUCCESS;
5177         }
5178
5179         return rval;
5180 }
5181
5182 static int
5183 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5184 {
5185         int rval = QLA_SUCCESS;
5186         uint32_t o_drv_lockid, n_drv_lockid;
5187         unsigned long lock_recovery_timeout;
5188
5189         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5190 retry_lockid:
5191         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5192         if (rval)
5193                 goto exit;
5194
5195         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5196         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5197                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5198                         return QLA_SUCCESS;
5199                 else
5200                         return QLA_FUNCTION_FAILED;
5201         }
5202
5203         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5204         if (rval)
5205                 goto exit;
5206
5207         if (o_drv_lockid == n_drv_lockid) {
5208                 qla83xx_wait_logic();
5209                 goto retry_lockid;
5210         } else
5211                 return QLA_SUCCESS;
5212
5213 exit:
5214         return rval;
5215 }
5216
5217 void
5218 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5219 {
5220         uint16_t options = (requester_id << 15) | BIT_6;
5221         uint32_t data;
5222         uint32_t lock_owner;
5223         struct qla_hw_data *ha = base_vha->hw;
5224
5225         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5226 retry_lock:
5227         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5228             == QLA_SUCCESS) {
5229                 if (data) {
5230                         /* Setting lock-id to our function-number */
5231                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5232                             ha->portnum);
5233                 } else {
5234                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5235                             &lock_owner);
5236                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5237                             "Failed to acquire IDC lock, acquired by %d, "
5238                             "retrying...\n", lock_owner);
5239
5240                         /* Retry/Perform IDC-Lock recovery */
5241                         if (qla83xx_idc_lock_recovery(base_vha)
5242                             == QLA_SUCCESS) {
5243                                 qla83xx_wait_logic();
5244                                 goto retry_lock;
5245                         } else
5246                                 ql_log(ql_log_warn, base_vha, 0xb075,
5247                                     "IDC Lock recovery FAILED.\n");
5248                 }
5249
5250         }
5251
5252         return;
5253
5254         /* XXX: IDC-lock implementation using access-control mbx */
5255 retry_lock2:
5256         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5257                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5258                     "Failed to acquire IDC lock. retrying...\n");
5259                 /* Retry/Perform IDC-Lock recovery */
5260                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5261                         qla83xx_wait_logic();
5262                         goto retry_lock2;
5263                 } else
5264                         ql_log(ql_log_warn, base_vha, 0xb076,
5265                             "IDC Lock recovery FAILED.\n");
5266         }
5267
5268         return;
5269 }
5270
5271 void
5272 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5273 {
5274 #if 0
5275         uint16_t options = (requester_id << 15) | BIT_7;
5276 #endif
5277         uint16_t retry;
5278         uint32_t data;
5279         struct qla_hw_data *ha = base_vha->hw;
5280
5281         /* IDC-unlock implementation using driver-unlock/lock-id
5282          * remote registers
5283          */
5284         retry = 0;
5285 retry_unlock:
5286         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5287             == QLA_SUCCESS) {
5288                 if (data == ha->portnum) {
5289                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5290                         /* Clearing lock-id by setting 0xff */
5291                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5292                 } else if (retry < 10) {
5293                         /* SV: XXX: IDC unlock retrying needed here? */
5294
5295                         /* Retry for IDC-unlock */
5296                         qla83xx_wait_logic();
5297                         retry++;
5298                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5299                             "Failed to release IDC lock, retrying=%d\n", retry);
5300                         goto retry_unlock;
5301                 }
5302         } else if (retry < 10) {
5303                 /* Retry for IDC-unlock */
5304                 qla83xx_wait_logic();
5305                 retry++;
5306                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5307                     "Failed to read drv-lockid, retrying=%d\n", retry);
5308                 goto retry_unlock;
5309         }
5310
5311         return;
5312
5313 #if 0
5314         /* XXX: IDC-unlock implementation using access-control mbx */
5315         retry = 0;
5316 retry_unlock2:
5317         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5318                 if (retry < 10) {
5319                         /* Retry for IDC-unlock */
5320                         qla83xx_wait_logic();
5321                         retry++;
5322                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5323                             "Failed to release IDC lock, retrying=%d\n", retry);
5324                         goto retry_unlock2;
5325                 }
5326         }
5327
5328         return;
5329 #endif
5330 }
5331
5332 int
5333 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5334 {
5335         int rval = QLA_SUCCESS;
5336         struct qla_hw_data *ha = vha->hw;
5337         uint32_t drv_presence;
5338
5339         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5340         if (rval == QLA_SUCCESS) {
5341                 drv_presence |= (1 << ha->portnum);
5342                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5343                     drv_presence);
5344         }
5345
5346         return rval;
5347 }
5348
5349 int
5350 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5351 {
5352         int rval = QLA_SUCCESS;
5353
5354         qla83xx_idc_lock(vha, 0);
5355         rval = __qla83xx_set_drv_presence(vha);
5356         qla83xx_idc_unlock(vha, 0);
5357
5358         return rval;
5359 }
5360
5361 int
5362 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5363 {
5364         int rval = QLA_SUCCESS;
5365         struct qla_hw_data *ha = vha->hw;
5366         uint32_t drv_presence;
5367
5368         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5369         if (rval == QLA_SUCCESS) {
5370                 drv_presence &= ~(1 << ha->portnum);
5371                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5372                     drv_presence);
5373         }
5374
5375         return rval;
5376 }
5377
5378 int
5379 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5380 {
5381         int rval = QLA_SUCCESS;
5382
5383         qla83xx_idc_lock(vha, 0);
5384         rval = __qla83xx_clear_drv_presence(vha);
5385         qla83xx_idc_unlock(vha, 0);
5386
5387         return rval;
5388 }
5389
5390 static void
5391 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5392 {
5393         struct qla_hw_data *ha = vha->hw;
5394         uint32_t drv_ack, drv_presence;
5395         unsigned long ack_timeout;
5396
5397         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5398         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5399         while (1) {
5400                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5401                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5402                 if ((drv_ack & drv_presence) == drv_presence)
5403                         break;
5404
5405                 if (time_after_eq(jiffies, ack_timeout)) {
5406                         ql_log(ql_log_warn, vha, 0xb067,
5407                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5408                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5409                         /*
5410                          * The function(s) which did not ack in time are forced
5411                          * to withdraw any further participation in the IDC
5412                          * reset.
5413                          */
5414                         if (drv_ack != drv_presence)
5415                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5416                                     drv_ack);
5417                         break;
5418                 }
5419
5420                 qla83xx_idc_unlock(vha, 0);
5421                 msleep(1000);
5422                 qla83xx_idc_lock(vha, 0);
5423         }
5424
5425         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5426         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5427 }
5428
5429 static int
5430 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5431 {
5432         int rval = QLA_SUCCESS;
5433         uint32_t idc_control;
5434
5435         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5436         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5437
5438         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5439         __qla83xx_get_idc_control(vha, &idc_control);
5440         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5441         __qla83xx_set_idc_control(vha, 0);
5442
5443         qla83xx_idc_unlock(vha, 0);
5444         rval = qla83xx_restart_nic_firmware(vha);
5445         qla83xx_idc_lock(vha, 0);
5446
5447         if (rval != QLA_SUCCESS) {
5448                 ql_log(ql_log_fatal, vha, 0xb06a,
5449                     "Failed to restart NIC f/w.\n");
5450                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5451                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5452         } else {
5453                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5454                     "Success in restarting nic f/w.\n");
5455                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5456                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5457         }
5458
5459         return rval;
5460 }
5461
5462 /* Assumes idc_lock always held on entry */
5463 int
5464 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5465 {
5466         struct qla_hw_data *ha = base_vha->hw;
5467         int rval = QLA_SUCCESS;
5468         unsigned long dev_init_timeout;
5469         uint32_t dev_state;
5470
5471         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5472         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5473
5474         while (1) {
5475
5476                 if (time_after_eq(jiffies, dev_init_timeout)) {
5477                         ql_log(ql_log_warn, base_vha, 0xb06e,
5478                             "Initialization TIMEOUT!\n");
5479                         /* Init timeout. Disable further NIC Core
5480                          * communication.
5481                          */
5482                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5483                                 QLA8XXX_DEV_FAILED);
5484                         ql_log(ql_log_info, base_vha, 0xb06f,
5485                             "HW State: FAILED.\n");
5486                 }
5487
5488                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5489                 switch (dev_state) {
5490                 case QLA8XXX_DEV_READY:
5491                         if (ha->flags.nic_core_reset_owner)
5492                                 qla83xx_idc_audit(base_vha,
5493                                     IDC_AUDIT_COMPLETION);
5494                         ha->flags.nic_core_reset_owner = 0;
5495                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5496                             "Reset_owner reset by 0x%x.\n",
5497                             ha->portnum);
5498                         goto exit;
5499                 case QLA8XXX_DEV_COLD:
5500                         if (ha->flags.nic_core_reset_owner)
5501                                 rval = qla83xx_device_bootstrap(base_vha);
5502                         else {
5503                         /* Wait for AEN to change device-state */
5504                                 qla83xx_idc_unlock(base_vha, 0);
5505                                 msleep(1000);
5506                                 qla83xx_idc_lock(base_vha, 0);
5507                         }
5508                         break;
5509                 case QLA8XXX_DEV_INITIALIZING:
5510                         /* Wait for AEN to change device-state */
5511                         qla83xx_idc_unlock(base_vha, 0);
5512                         msleep(1000);
5513                         qla83xx_idc_lock(base_vha, 0);
5514                         break;
5515                 case QLA8XXX_DEV_NEED_RESET:
5516                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5517                                 qla83xx_need_reset_handler(base_vha);
5518                         else {
5519                                 /* Wait for AEN to change device-state */
5520                                 qla83xx_idc_unlock(base_vha, 0);
5521                                 msleep(1000);
5522                                 qla83xx_idc_lock(base_vha, 0);
5523                         }
5524                         /* reset timeout value after need reset handler */
5525                         dev_init_timeout = jiffies +
5526                             (ha->fcoe_dev_init_timeout * HZ);
5527                         break;
5528                 case QLA8XXX_DEV_NEED_QUIESCENT:
5529                         /* XXX: DEBUG for now */
5530                         qla83xx_idc_unlock(base_vha, 0);
5531                         msleep(1000);
5532                         qla83xx_idc_lock(base_vha, 0);
5533                         break;
5534                 case QLA8XXX_DEV_QUIESCENT:
5535                         /* XXX: DEBUG for now */
5536                         if (ha->flags.quiesce_owner)
5537                                 goto exit;
5538
5539                         qla83xx_idc_unlock(base_vha, 0);
5540                         msleep(1000);
5541                         qla83xx_idc_lock(base_vha, 0);
5542                         dev_init_timeout = jiffies +
5543                             (ha->fcoe_dev_init_timeout * HZ);
5544                         break;
5545                 case QLA8XXX_DEV_FAILED:
5546                         if (ha->flags.nic_core_reset_owner)
5547                                 qla83xx_idc_audit(base_vha,
5548                                     IDC_AUDIT_COMPLETION);
5549                         ha->flags.nic_core_reset_owner = 0;
5550                         __qla83xx_clear_drv_presence(base_vha);
5551                         qla83xx_idc_unlock(base_vha, 0);
5552                         qla8xxx_dev_failed_handler(base_vha);
5553                         rval = QLA_FUNCTION_FAILED;
5554                         qla83xx_idc_lock(base_vha, 0);
5555                         goto exit;
5556                 case QLA8XXX_BAD_VALUE:
5557                         qla83xx_idc_unlock(base_vha, 0);
5558                         msleep(1000);
5559                         qla83xx_idc_lock(base_vha, 0);
5560                         break;
5561                 default:
5562                         ql_log(ql_log_warn, base_vha, 0xb071,
5563                             "Unknown Device State: %x.\n", dev_state);
5564                         qla83xx_idc_unlock(base_vha, 0);
5565                         qla8xxx_dev_failed_handler(base_vha);
5566                         rval = QLA_FUNCTION_FAILED;
5567                         qla83xx_idc_lock(base_vha, 0);
5568                         goto exit;
5569                 }
5570         }
5571
5572 exit:
5573         return rval;
5574 }
5575
5576 void
5577 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5578 {
5579         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5580             board_disable);
5581         struct pci_dev *pdev = ha->pdev;
5582         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5583
5584         /*
5585          * if UNLOAD flag is already set, then continue unload,
5586          * where it was set first.
5587          */
5588         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5589                 return;
5590
5591         ql_log(ql_log_warn, base_vha, 0x015b,
5592             "Disabling adapter.\n");
5593
5594         if (!atomic_read(&pdev->enable_cnt)) {
5595                 ql_log(ql_log_info, base_vha, 0xfffc,
5596                     "PCI device disabled, no action req for PCI error=%lx\n",
5597                     base_vha->pci_flags);
5598                 return;
5599         }
5600
5601         qla2x00_wait_for_sess_deletion(base_vha);
5602
5603         set_bit(UNLOADING, &base_vha->dpc_flags);
5604
5605         qla2x00_delete_all_vps(ha, base_vha);
5606
5607         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5608
5609         qla2x00_dfs_remove(base_vha);
5610
5611         qla84xx_put_chip(base_vha);
5612
5613         if (base_vha->timer_active)
5614                 qla2x00_stop_timer(base_vha);
5615
5616         base_vha->flags.online = 0;
5617
5618         qla2x00_destroy_deferred_work(ha);
5619
5620         /*
5621          * Do not try to stop beacon blink as it will issue a mailbox
5622          * command.
5623          */
5624         qla2x00_free_sysfs_attr(base_vha, false);
5625
5626         fc_remove_host(base_vha->host);
5627
5628         scsi_remove_host(base_vha->host);
5629
5630         base_vha->flags.init_done = 0;
5631         qla25xx_delete_queues(base_vha);
5632         qla2x00_free_fcports(base_vha);
5633         qla2x00_free_irqs(base_vha);
5634         qla2x00_mem_free(ha);
5635         qla82xx_md_free(base_vha);
5636         qla2x00_free_queues(ha);
5637
5638         qla2x00_unmap_iobases(ha);
5639
5640         pci_release_selected_regions(ha->pdev, ha->bars);
5641         pci_disable_pcie_error_reporting(pdev);
5642         pci_disable_device(pdev);
5643
5644         /*
5645          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5646          */
5647 }
5648
5649 /**************************************************************************
5650 * qla2x00_do_dpc
5651 *   This kernel thread is a task that is schedule by the interrupt handler
5652 *   to perform the background processing for interrupts.
5653 *
5654 * Notes:
5655 * This task always run in the context of a kernel thread.  It
5656 * is kick-off by the driver's detect code and starts up
5657 * up one per adapter. It immediately goes to sleep and waits for
5658 * some fibre event.  When either the interrupt handler or
5659 * the timer routine detects a event it will one of the task
5660 * bits then wake us up.
5661 **************************************************************************/
5662 static int
5663 qla2x00_do_dpc(void *data)
5664 {
5665         scsi_qla_host_t *base_vha;
5666         struct qla_hw_data *ha;
5667         uint32_t online;
5668         struct qla_qpair *qpair;
5669
5670         ha = (struct qla_hw_data *)data;
5671         base_vha = pci_get_drvdata(ha->pdev);
5672
5673         set_user_nice(current, MIN_NICE);
5674
5675         set_current_state(TASK_INTERRUPTIBLE);
5676         while (!kthread_should_stop()) {
5677                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5678                     "DPC handler sleeping.\n");
5679
5680                 schedule();
5681
5682                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5683                         goto end_loop;
5684
5685                 if (ha->flags.eeh_busy) {
5686                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5687                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5688                         goto end_loop;
5689                 }
5690
5691                 ha->dpc_active = 1;
5692
5693                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5694                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5695                     base_vha->dpc_flags);
5696
5697                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5698                         break;
5699
5700                 qla2x00_do_work(base_vha);
5701
5702                 if (IS_P3P_TYPE(ha)) {
5703                         if (IS_QLA8044(ha)) {
5704                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5705                                         &base_vha->dpc_flags)) {
5706                                         qla8044_idc_lock(ha);
5707                                         qla8044_wr_direct(base_vha,
5708                                                 QLA8044_CRB_DEV_STATE_INDEX,
5709                                                 QLA8XXX_DEV_FAILED);
5710                                         qla8044_idc_unlock(ha);
5711                                         ql_log(ql_log_info, base_vha, 0x4004,
5712                                                 "HW State: FAILED.\n");
5713                                         qla8044_device_state_handler(base_vha);
5714                                         continue;
5715                                 }
5716
5717                         } else {
5718                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5719                                         &base_vha->dpc_flags)) {
5720                                         qla82xx_idc_lock(ha);
5721                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5722                                                 QLA8XXX_DEV_FAILED);
5723                                         qla82xx_idc_unlock(ha);
5724                                         ql_log(ql_log_info, base_vha, 0x0151,
5725                                                 "HW State: FAILED.\n");
5726                                         qla82xx_device_state_handler(base_vha);
5727                                         continue;
5728                                 }
5729                         }
5730
5731                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5732                                 &base_vha->dpc_flags)) {
5733
5734                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5735                                     "FCoE context reset scheduled.\n");
5736                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5737                                         &base_vha->dpc_flags))) {
5738                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5739                                                 /* FCoE-ctx reset failed.
5740                                                  * Escalate to chip-reset
5741                                                  */
5742                                                 set_bit(ISP_ABORT_NEEDED,
5743                                                         &base_vha->dpc_flags);
5744                                         }
5745                                         clear_bit(ABORT_ISP_ACTIVE,
5746                                                 &base_vha->dpc_flags);
5747                                 }
5748
5749                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5750                                     "FCoE context reset end.\n");
5751                         }
5752                 } else if (IS_QLAFX00(ha)) {
5753                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5754                                 &base_vha->dpc_flags)) {
5755                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5756                                     "Firmware Reset Recovery\n");
5757                                 if (qlafx00_reset_initialize(base_vha)) {
5758                                         /* Failed. Abort isp later. */
5759                                         if (!test_bit(UNLOADING,
5760                                             &base_vha->dpc_flags)) {
5761                                                 set_bit(ISP_UNRECOVERABLE,
5762                                                     &base_vha->dpc_flags);
5763                                                 ql_dbg(ql_dbg_dpc, base_vha,
5764                                                     0x4021,
5765                                                     "Reset Recovery Failed\n");
5766                                         }
5767                                 }
5768                         }
5769
5770                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5771                                 &base_vha->dpc_flags)) {
5772                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5773                                     "ISPFx00 Target Scan scheduled\n");
5774                                 if (qlafx00_rescan_isp(base_vha)) {
5775                                         if (!test_bit(UNLOADING,
5776                                             &base_vha->dpc_flags))
5777                                                 set_bit(ISP_UNRECOVERABLE,
5778                                                     &base_vha->dpc_flags);
5779                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5780                                             "ISPFx00 Target Scan Failed\n");
5781                                 }
5782                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5783                                     "ISPFx00 Target Scan End\n");
5784                         }
5785                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5786                                 &base_vha->dpc_flags)) {
5787                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5788                                     "ISPFx00 Host Info resend scheduled\n");
5789                                 qlafx00_fx_disc(base_vha,
5790                                     &base_vha->hw->mr.fcport,
5791                                     FXDISC_REG_HOST_INFO);
5792                         }
5793                 }
5794
5795                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
5796                         &base_vha->dpc_flags) &&
5797                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
5798                         qla24xx_detect_sfp(base_vha);
5799
5800                         if (ha->flags.detected_lr_sfp !=
5801                             ha->flags.using_lr_setting)
5802                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
5803                 }
5804
5805                 if (test_and_clear_bit
5806                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
5807                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
5808                         bool do_reset = true;
5809
5810                         switch (ql2x_ini_mode) {
5811                         case QLA2XXX_INI_MODE_ENABLED:
5812                                 break;
5813                         case QLA2XXX_INI_MODE_DISABLED:
5814                                 if (!qla_tgt_mode_enabled(base_vha))
5815                                         do_reset = false;
5816                                 break;
5817                         case QLA2XXX_INI_MODE_DUAL:
5818                                 if (!qla_dual_mode_enabled(base_vha))
5819                                         do_reset = false;
5820                                 break;
5821                         default:
5822                                 break;
5823                         }
5824
5825                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
5826                             &base_vha->dpc_flags))) {
5827                                 base_vha->flags.online = 1;
5828                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5829                                     "ISP abort scheduled.\n");
5830                                 if (ha->isp_ops->abort_isp(base_vha)) {
5831                                         /* failed. retry later */
5832                                         set_bit(ISP_ABORT_NEEDED,
5833                                             &base_vha->dpc_flags);
5834                                 }
5835                                 clear_bit(ABORT_ISP_ACTIVE,
5836                                                 &base_vha->dpc_flags);
5837                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5838                                     "ISP abort end.\n");
5839                         }
5840                 }
5841
5842                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5843                     &base_vha->dpc_flags)) {
5844                         qla2x00_update_fcports(base_vha);
5845                 }
5846
5847                 if (IS_QLAFX00(ha))
5848                         goto loop_resync_check;
5849
5850                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5851                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5852                             "Quiescence mode scheduled.\n");
5853                         if (IS_P3P_TYPE(ha)) {
5854                                 if (IS_QLA82XX(ha))
5855                                         qla82xx_device_state_handler(base_vha);
5856                                 if (IS_QLA8044(ha))
5857                                         qla8044_device_state_handler(base_vha);
5858                                 clear_bit(ISP_QUIESCE_NEEDED,
5859                                     &base_vha->dpc_flags);
5860                                 if (!ha->flags.quiesce_owner) {
5861                                         qla2x00_perform_loop_resync(base_vha);
5862                                         if (IS_QLA82XX(ha)) {
5863                                                 qla82xx_idc_lock(ha);
5864                                                 qla82xx_clear_qsnt_ready(
5865                                                     base_vha);
5866                                                 qla82xx_idc_unlock(ha);
5867                                         } else if (IS_QLA8044(ha)) {
5868                                                 qla8044_idc_lock(ha);
5869                                                 qla8044_clear_qsnt_ready(
5870                                                     base_vha);
5871                                                 qla8044_idc_unlock(ha);
5872                                         }
5873                                 }
5874                         } else {
5875                                 clear_bit(ISP_QUIESCE_NEEDED,
5876                                     &base_vha->dpc_flags);
5877                                 qla2x00_quiesce_io(base_vha);
5878                         }
5879                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5880                             "Quiescence mode end.\n");
5881                 }
5882
5883                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5884                                 &base_vha->dpc_flags) &&
5885                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5886
5887                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5888                             "Reset marker scheduled.\n");
5889                         qla2x00_rst_aen(base_vha);
5890                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5891                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5892                             "Reset marker end.\n");
5893                 }
5894
5895                 /* Retry each device up to login retry count */
5896                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
5897                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5898                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5899
5900                         if (!base_vha->relogin_jif ||
5901                             time_after_eq(jiffies, base_vha->relogin_jif)) {
5902                                 base_vha->relogin_jif = jiffies + HZ;
5903                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
5904
5905                                 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5906                                     "Relogin scheduled.\n");
5907                                 qla2x00_relogin(base_vha);
5908                                 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5909                                     "Relogin end.\n");
5910                         }
5911                 }
5912 loop_resync_check:
5913                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5914                     &base_vha->dpc_flags)) {
5915
5916                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5917                             "Loop resync scheduled.\n");
5918
5919                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5920                             &base_vha->dpc_flags))) {
5921
5922                                 qla2x00_loop_resync(base_vha);
5923
5924                                 clear_bit(LOOP_RESYNC_ACTIVE,
5925                                                 &base_vha->dpc_flags);
5926                         }
5927
5928                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5929                             "Loop resync end.\n");
5930                 }
5931
5932                 if (IS_QLAFX00(ha))
5933                         goto intr_on_check;
5934
5935                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5936                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5937                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5938                         qla2xxx_flash_npiv_conf(base_vha);
5939                 }
5940
5941 intr_on_check:
5942                 if (!ha->interrupts_on)
5943                         ha->isp_ops->enable_intrs(ha);
5944
5945                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5946                                         &base_vha->dpc_flags)) {
5947                         if (ha->beacon_blink_led == 1)
5948                                 ha->isp_ops->beacon_blink(base_vha);
5949                 }
5950
5951                 /* qpair online check */
5952                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5953                     &base_vha->dpc_flags)) {
5954                         if (ha->flags.eeh_busy ||
5955                             ha->flags.pci_channel_io_perm_failure)
5956                                 online = 0;
5957                         else
5958                                 online = 1;
5959
5960                         mutex_lock(&ha->mq_lock);
5961                         list_for_each_entry(qpair, &base_vha->qp_list,
5962                             qp_list_elem)
5963                         qpair->online = online;
5964                         mutex_unlock(&ha->mq_lock);
5965                 }
5966
5967                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
5968                         ql_log(ql_log_info, base_vha, 0xffffff,
5969                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
5970                                                 ha->nvme_last_rptd_aen);
5971                         if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
5972                                 ql_log(ql_log_info, base_vha, 0xffffff,
5973                                         "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
5974                                                 ha->nvme_last_rptd_aen);
5975                         }
5976                 }
5977
5978                 if (!IS_QLAFX00(ha))
5979                         qla2x00_do_dpc_all_vps(base_vha);
5980
5981                 ha->dpc_active = 0;
5982 end_loop:
5983                 set_current_state(TASK_INTERRUPTIBLE);
5984         } /* End of while(1) */
5985         __set_current_state(TASK_RUNNING);
5986
5987         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5988             "DPC handler exiting.\n");
5989
5990         /*
5991          * Make sure that nobody tries to wake us up again.
5992          */
5993         ha->dpc_active = 0;
5994
5995         /* Cleanup any residual CTX SRBs. */
5996         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5997
5998         return 0;
5999 }
6000
6001 void
6002 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6003 {
6004         struct qla_hw_data *ha = vha->hw;
6005         struct task_struct *t = ha->dpc_thread;
6006
6007         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6008                 wake_up_process(t);
6009 }
6010
6011 /*
6012 *  qla2x00_rst_aen
6013 *      Processes asynchronous reset.
6014 *
6015 * Input:
6016 *      ha  = adapter block pointer.
6017 */
6018 static void
6019 qla2x00_rst_aen(scsi_qla_host_t *vha)
6020 {
6021         if (vha->flags.online && !vha->flags.reset_active &&
6022             !atomic_read(&vha->loop_down_timer) &&
6023             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6024                 do {
6025                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6026
6027                         /*
6028                          * Issue marker command only when we are going to start
6029                          * the I/O.
6030                          */
6031                         vha->marker_needed = 1;
6032                 } while (!atomic_read(&vha->loop_down_timer) &&
6033                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6034         }
6035 }
6036
6037 /**************************************************************************
6038 *   qla2x00_timer
6039 *
6040 * Description:
6041 *   One second timer
6042 *
6043 * Context: Interrupt
6044 ***************************************************************************/
6045 void
6046 qla2x00_timer(scsi_qla_host_t *vha)
6047 {
6048         unsigned long   cpu_flags = 0;
6049         int             start_dpc = 0;
6050         int             index;
6051         srb_t           *sp;
6052         uint16_t        w;
6053         struct qla_hw_data *ha = vha->hw;
6054         struct req_que *req;
6055
6056         if (ha->flags.eeh_busy) {
6057                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6058                     "EEH = %d, restarting timer.\n",
6059                     ha->flags.eeh_busy);
6060                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6061                 return;
6062         }
6063
6064         /*
6065          * Hardware read to raise pending EEH errors during mailbox waits. If
6066          * the read returns -1 then disable the board.
6067          */
6068         if (!pci_channel_offline(ha->pdev)) {
6069                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6070                 qla2x00_check_reg16_for_disconnect(vha, w);
6071         }
6072
6073         /* Make sure qla82xx_watchdog is run only for physical port */
6074         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6075                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6076                         start_dpc++;
6077                 if (IS_QLA82XX(ha))
6078                         qla82xx_watchdog(vha);
6079                 else if (IS_QLA8044(ha))
6080                         qla8044_watchdog(vha);
6081         }
6082
6083         if (!vha->vp_idx && IS_QLAFX00(ha))
6084                 qlafx00_timer_routine(vha);
6085
6086         /* Loop down handler. */
6087         if (atomic_read(&vha->loop_down_timer) > 0 &&
6088             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6089             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6090                 && vha->flags.online) {
6091
6092                 if (atomic_read(&vha->loop_down_timer) ==
6093                     vha->loop_down_abort_time) {
6094
6095                         ql_log(ql_log_info, vha, 0x6008,
6096                             "Loop down - aborting the queues before time expires.\n");
6097
6098                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6099                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6100
6101                         /*
6102                          * Schedule an ISP abort to return any FCP2-device
6103                          * commands.
6104                          */
6105                         /* NPIV - scan physical port only */
6106                         if (!vha->vp_idx) {
6107                                 spin_lock_irqsave(&ha->hardware_lock,
6108                                     cpu_flags);
6109                                 req = ha->req_q_map[0];
6110                                 for (index = 1;
6111                                     index < req->num_outstanding_cmds;
6112                                     index++) {
6113                                         fc_port_t *sfcp;
6114
6115                                         sp = req->outstanding_cmds[index];
6116                                         if (!sp)
6117                                                 continue;
6118                                         if (sp->cmd_type != TYPE_SRB)
6119                                                 continue;
6120                                         if (sp->type != SRB_SCSI_CMD)
6121                                                 continue;
6122                                         sfcp = sp->fcport;
6123                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6124                                                 continue;
6125
6126                                         if (IS_QLA82XX(ha))
6127                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6128                                                         &vha->dpc_flags);
6129                                         else
6130                                                 set_bit(ISP_ABORT_NEEDED,
6131                                                         &vha->dpc_flags);
6132                                         break;
6133                                 }
6134                                 spin_unlock_irqrestore(&ha->hardware_lock,
6135                                                                 cpu_flags);
6136                         }
6137                         start_dpc++;
6138                 }
6139
6140                 /* if the loop has been down for 4 minutes, reinit adapter */
6141                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6142                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6143                                 ql_log(ql_log_warn, vha, 0x6009,
6144                                     "Loop down - aborting ISP.\n");
6145
6146                                 if (IS_QLA82XX(ha))
6147                                         set_bit(FCOE_CTX_RESET_NEEDED,
6148                                                 &vha->dpc_flags);
6149                                 else
6150                                         set_bit(ISP_ABORT_NEEDED,
6151                                                 &vha->dpc_flags);
6152                         }
6153                 }
6154                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6155                     "Loop down - seconds remaining %d.\n",
6156                     atomic_read(&vha->loop_down_timer));
6157         }
6158         /* Check if beacon LED needs to be blinked for physical host only */
6159         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6160                 /* There is no beacon_blink function for ISP82xx */
6161                 if (!IS_P3P_TYPE(ha)) {
6162                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6163                         start_dpc++;
6164                 }
6165         }
6166
6167         /* Process any deferred work. */
6168         if (!list_empty(&vha->work_list))
6169                 start_dpc++;
6170
6171         /*
6172          * FC-NVME
6173          * see if the active AEN count has changed from what was last reported.
6174          */
6175         if (!vha->vp_idx &&
6176                 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6177                 ha->zio_mode == QLA_ZIO_MODE_6) {
6178                 ql_log(ql_log_info, vha, 0x3002,
6179                         "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6180                         ha->nvme_last_rptd_aen);
6181                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6182                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6183                 start_dpc++;
6184         }
6185
6186         /* Schedule the DPC routine if needed */
6187         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6188             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6189             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6190             start_dpc ||
6191             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6192             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6193             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6194             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6195             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6196             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6197                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6198                     "isp_abort_needed=%d loop_resync_needed=%d "
6199                     "fcport_update_needed=%d start_dpc=%d "
6200                     "reset_marker_needed=%d",
6201                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6202                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6203                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6204                     start_dpc,
6205                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6206                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6207                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6208                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6209                     "relogin_needed=%d.\n",
6210                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6211                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6212                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6213                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6214                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6215                 qla2xxx_wake_dpc(vha);
6216         }
6217
6218         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6219 }
6220
6221 /* Firmware interface routines. */
6222
6223 #define FW_BLOBS        11
6224 #define FW_ISP21XX      0
6225 #define FW_ISP22XX      1
6226 #define FW_ISP2300      2
6227 #define FW_ISP2322      3
6228 #define FW_ISP24XX      4
6229 #define FW_ISP25XX      5
6230 #define FW_ISP81XX      6
6231 #define FW_ISP82XX      7
6232 #define FW_ISP2031      8
6233 #define FW_ISP8031      9
6234 #define FW_ISP27XX      10
6235
6236 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
6237 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
6238 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
6239 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
6240 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
6241 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
6242 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
6243 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
6244 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
6245 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
6246 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
6247
6248
6249 static DEFINE_MUTEX(qla_fw_lock);
6250
6251 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6252         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6253         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6254         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6255         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6256         { .name = FW_FILE_ISP24XX, },
6257         { .name = FW_FILE_ISP25XX, },
6258         { .name = FW_FILE_ISP81XX, },
6259         { .name = FW_FILE_ISP82XX, },
6260         { .name = FW_FILE_ISP2031, },
6261         { .name = FW_FILE_ISP8031, },
6262         { .name = FW_FILE_ISP27XX, },
6263 };
6264
6265 struct fw_blob *
6266 qla2x00_request_firmware(scsi_qla_host_t *vha)
6267 {
6268         struct qla_hw_data *ha = vha->hw;
6269         struct fw_blob *blob;
6270
6271         if (IS_QLA2100(ha)) {
6272                 blob = &qla_fw_blobs[FW_ISP21XX];
6273         } else if (IS_QLA2200(ha)) {
6274                 blob = &qla_fw_blobs[FW_ISP22XX];
6275         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6276                 blob = &qla_fw_blobs[FW_ISP2300];
6277         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6278                 blob = &qla_fw_blobs[FW_ISP2322];
6279         } else if (IS_QLA24XX_TYPE(ha)) {
6280                 blob = &qla_fw_blobs[FW_ISP24XX];
6281         } else if (IS_QLA25XX(ha)) {
6282                 blob = &qla_fw_blobs[FW_ISP25XX];
6283         } else if (IS_QLA81XX(ha)) {
6284                 blob = &qla_fw_blobs[FW_ISP81XX];
6285         } else if (IS_QLA82XX(ha)) {
6286                 blob = &qla_fw_blobs[FW_ISP82XX];
6287         } else if (IS_QLA2031(ha)) {
6288                 blob = &qla_fw_blobs[FW_ISP2031];
6289         } else if (IS_QLA8031(ha)) {
6290                 blob = &qla_fw_blobs[FW_ISP8031];
6291         } else if (IS_QLA27XX(ha)) {
6292                 blob = &qla_fw_blobs[FW_ISP27XX];
6293         } else {
6294                 return NULL;
6295         }
6296
6297         mutex_lock(&qla_fw_lock);
6298         if (blob->fw)
6299                 goto out;
6300
6301         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6302                 ql_log(ql_log_warn, vha, 0x0063,
6303                     "Failed to load firmware image (%s).\n", blob->name);
6304                 blob->fw = NULL;
6305                 blob = NULL;
6306                 goto out;
6307         }
6308
6309 out:
6310         mutex_unlock(&qla_fw_lock);
6311         return blob;
6312 }
6313
6314 static void
6315 qla2x00_release_firmware(void)
6316 {
6317         int idx;
6318
6319         mutex_lock(&qla_fw_lock);
6320         for (idx = 0; idx < FW_BLOBS; idx++)
6321                 release_firmware(qla_fw_blobs[idx].fw);
6322         mutex_unlock(&qla_fw_lock);
6323 }
6324
6325 static pci_ers_result_t
6326 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6327 {
6328         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6329         struct qla_hw_data *ha = vha->hw;
6330
6331         ql_dbg(ql_dbg_aer, vha, 0x9000,
6332             "PCI error detected, state %x.\n", state);
6333
6334         if (!atomic_read(&pdev->enable_cnt)) {
6335                 ql_log(ql_log_info, vha, 0xffff,
6336                         "PCI device is disabled,state %x\n", state);
6337                 return PCI_ERS_RESULT_NEED_RESET;
6338         }
6339
6340         switch (state) {
6341         case pci_channel_io_normal:
6342                 ha->flags.eeh_busy = 0;
6343                 if (ql2xmqsupport) {
6344                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6345                         qla2xxx_wake_dpc(vha);
6346                 }
6347                 return PCI_ERS_RESULT_CAN_RECOVER;
6348         case pci_channel_io_frozen:
6349                 ha->flags.eeh_busy = 1;
6350                 /* For ISP82XX complete any pending mailbox cmd */
6351                 if (IS_QLA82XX(ha)) {
6352                         ha->flags.isp82xx_fw_hung = 1;
6353                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6354                         qla82xx_clear_pending_mbx(vha);
6355                 }
6356                 qla2x00_free_irqs(vha);
6357                 pci_disable_device(pdev);
6358                 /* Return back all IOs */
6359                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6360                 if (ql2xmqsupport) {
6361                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6362                         qla2xxx_wake_dpc(vha);
6363                 }
6364                 return PCI_ERS_RESULT_NEED_RESET;
6365         case pci_channel_io_perm_failure:
6366                 ha->flags.pci_channel_io_perm_failure = 1;
6367                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6368                 if (ql2xmqsupport) {
6369                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6370                         qla2xxx_wake_dpc(vha);
6371                 }
6372                 return PCI_ERS_RESULT_DISCONNECT;
6373         }
6374         return PCI_ERS_RESULT_NEED_RESET;
6375 }
6376
6377 static pci_ers_result_t
6378 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6379 {
6380         int risc_paused = 0;
6381         uint32_t stat;
6382         unsigned long flags;
6383         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6384         struct qla_hw_data *ha = base_vha->hw;
6385         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6386         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6387
6388         if (IS_QLA82XX(ha))
6389                 return PCI_ERS_RESULT_RECOVERED;
6390
6391         spin_lock_irqsave(&ha->hardware_lock, flags);
6392         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6393                 stat = RD_REG_DWORD(&reg->hccr);
6394                 if (stat & HCCR_RISC_PAUSE)
6395                         risc_paused = 1;
6396         } else if (IS_QLA23XX(ha)) {
6397                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6398                 if (stat & HSR_RISC_PAUSED)
6399                         risc_paused = 1;
6400         } else if (IS_FWI2_CAPABLE(ha)) {
6401                 stat = RD_REG_DWORD(&reg24->host_status);
6402                 if (stat & HSRX_RISC_PAUSED)
6403                         risc_paused = 1;
6404         }
6405         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6406
6407         if (risc_paused) {
6408                 ql_log(ql_log_info, base_vha, 0x9003,
6409                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6410                 ha->isp_ops->fw_dump(base_vha, 0);
6411
6412                 return PCI_ERS_RESULT_NEED_RESET;
6413         } else
6414                 return PCI_ERS_RESULT_RECOVERED;
6415 }
6416
6417 static uint32_t
6418 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6419 {
6420         uint32_t rval = QLA_FUNCTION_FAILED;
6421         uint32_t drv_active = 0;
6422         struct qla_hw_data *ha = base_vha->hw;
6423         int fn;
6424         struct pci_dev *other_pdev = NULL;
6425
6426         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6427             "Entered %s.\n", __func__);
6428
6429         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6430
6431         if (base_vha->flags.online) {
6432                 /* Abort all outstanding commands,
6433                  * so as to be requeued later */
6434                 qla2x00_abort_isp_cleanup(base_vha);
6435         }
6436
6437
6438         fn = PCI_FUNC(ha->pdev->devfn);
6439         while (fn > 0) {
6440                 fn--;
6441                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6442                     "Finding pci device at function = 0x%x.\n", fn);
6443                 other_pdev =
6444                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6445                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6446                     fn));
6447
6448                 if (!other_pdev)
6449                         continue;
6450                 if (atomic_read(&other_pdev->enable_cnt)) {
6451                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6452                             "Found PCI func available and enable at 0x%x.\n",
6453                             fn);
6454                         pci_dev_put(other_pdev);
6455                         break;
6456                 }
6457                 pci_dev_put(other_pdev);
6458         }
6459
6460         if (!fn) {
6461                 /* Reset owner */
6462                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6463                     "This devfn is reset owner = 0x%x.\n",
6464                     ha->pdev->devfn);
6465                 qla82xx_idc_lock(ha);
6466
6467                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6468                     QLA8XXX_DEV_INITIALIZING);
6469
6470                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6471                     QLA82XX_IDC_VERSION);
6472
6473                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6474                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6475                     "drv_active = 0x%x.\n", drv_active);
6476
6477                 qla82xx_idc_unlock(ha);
6478                 /* Reset if device is not already reset
6479                  * drv_active would be 0 if a reset has already been done
6480                  */
6481                 if (drv_active)
6482                         rval = qla82xx_start_firmware(base_vha);
6483                 else
6484                         rval = QLA_SUCCESS;
6485                 qla82xx_idc_lock(ha);
6486
6487                 if (rval != QLA_SUCCESS) {
6488                         ql_log(ql_log_info, base_vha, 0x900b,
6489                             "HW State: FAILED.\n");
6490                         qla82xx_clear_drv_active(ha);
6491                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6492                             QLA8XXX_DEV_FAILED);
6493                 } else {
6494                         ql_log(ql_log_info, base_vha, 0x900c,
6495                             "HW State: READY.\n");
6496                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6497                             QLA8XXX_DEV_READY);
6498                         qla82xx_idc_unlock(ha);
6499                         ha->flags.isp82xx_fw_hung = 0;
6500                         rval = qla82xx_restart_isp(base_vha);
6501                         qla82xx_idc_lock(ha);
6502                         /* Clear driver state register */
6503                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6504                         qla82xx_set_drv_active(base_vha);
6505                 }
6506                 qla82xx_idc_unlock(ha);
6507         } else {
6508                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6509                     "This devfn is not reset owner = 0x%x.\n",
6510                     ha->pdev->devfn);
6511                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6512                     QLA8XXX_DEV_READY)) {
6513                         ha->flags.isp82xx_fw_hung = 0;
6514                         rval = qla82xx_restart_isp(base_vha);
6515                         qla82xx_idc_lock(ha);
6516                         qla82xx_set_drv_active(base_vha);
6517                         qla82xx_idc_unlock(ha);
6518                 }
6519         }
6520         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6521
6522         return rval;
6523 }
6524
6525 static pci_ers_result_t
6526 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6527 {
6528         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6529         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6530         struct qla_hw_data *ha = base_vha->hw;
6531         struct rsp_que *rsp;
6532         int rc, retries = 10;
6533
6534         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6535             "Slot Reset.\n");
6536
6537         /* Workaround: qla2xxx driver which access hardware earlier
6538          * needs error state to be pci_channel_io_online.
6539          * Otherwise mailbox command timesout.
6540          */
6541         pdev->error_state = pci_channel_io_normal;
6542
6543         pci_restore_state(pdev);
6544
6545         /* pci_restore_state() clears the saved_state flag of the device
6546          * save restored state which resets saved_state flag
6547          */
6548         pci_save_state(pdev);
6549
6550         if (ha->mem_only)
6551                 rc = pci_enable_device_mem(pdev);
6552         else
6553                 rc = pci_enable_device(pdev);
6554
6555         if (rc) {
6556                 ql_log(ql_log_warn, base_vha, 0x9005,
6557                     "Can't re-enable PCI device after reset.\n");
6558                 goto exit_slot_reset;
6559         }
6560
6561         rsp = ha->rsp_q_map[0];
6562         if (qla2x00_request_irqs(ha, rsp))
6563                 goto exit_slot_reset;
6564
6565         if (ha->isp_ops->pci_config(base_vha))
6566                 goto exit_slot_reset;
6567
6568         if (IS_QLA82XX(ha)) {
6569                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6570                         ret = PCI_ERS_RESULT_RECOVERED;
6571                         goto exit_slot_reset;
6572                 } else
6573                         goto exit_slot_reset;
6574         }
6575
6576         while (ha->flags.mbox_busy && retries--)
6577                 msleep(1000);
6578
6579         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6580         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6581                 ret =  PCI_ERS_RESULT_RECOVERED;
6582         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6583
6584
6585 exit_slot_reset:
6586         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6587             "slot_reset return %x.\n", ret);
6588
6589         return ret;
6590 }
6591
6592 static void
6593 qla2xxx_pci_resume(struct pci_dev *pdev)
6594 {
6595         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6596         struct qla_hw_data *ha = base_vha->hw;
6597         int ret;
6598
6599         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6600             "pci_resume.\n");
6601
6602         ret = qla2x00_wait_for_hba_online(base_vha);
6603         if (ret != QLA_SUCCESS) {
6604                 ql_log(ql_log_fatal, base_vha, 0x9002,
6605                     "The device failed to resume I/O from slot/link_reset.\n");
6606         }
6607
6608         pci_cleanup_aer_uncorrect_error_status(pdev);
6609
6610         ha->flags.eeh_busy = 0;
6611 }
6612
6613 static void
6614 qla83xx_disable_laser(scsi_qla_host_t *vha)
6615 {
6616         uint32_t reg, data, fn;
6617         struct qla_hw_data *ha = vha->hw;
6618         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6619
6620         /* pci func #/port # */
6621         ql_dbg(ql_dbg_init, vha, 0x004b,
6622             "Disabling Laser for hba: %p\n", vha);
6623
6624         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6625                 (BIT_15|BIT_14|BIT_13|BIT_12));
6626
6627         fn = (fn >> 12);
6628
6629         if (fn & 1)
6630                 reg = PORT_1_2031;
6631         else
6632                 reg = PORT_0_2031;
6633
6634         data = LASER_OFF_2031;
6635
6636         qla83xx_wr_reg(vha, reg, data);
6637 }
6638
6639 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6640 {
6641         int rc;
6642         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6643
6644         if (USER_CTRL_IRQ(vha->hw))
6645                 rc = blk_mq_map_queues(&shost->tag_set);
6646         else
6647                 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6648         return rc;
6649 }
6650
6651 static const struct pci_error_handlers qla2xxx_err_handler = {
6652         .error_detected = qla2xxx_pci_error_detected,
6653         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6654         .slot_reset = qla2xxx_pci_slot_reset,
6655         .resume = qla2xxx_pci_resume,
6656 };
6657
6658 static struct pci_device_id qla2xxx_pci_tbl[] = {
6659         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6660         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6661         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6662         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6663         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6664         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6665         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6666         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6667         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6668         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6669         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6670         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6671         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6672         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6673         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6674         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6675         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6676         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6677         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6678         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6679         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6680         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6681         { 0 },
6682 };
6683 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6684
6685 static struct pci_driver qla2xxx_pci_driver = {
6686         .name           = QLA2XXX_DRIVER_NAME,
6687         .driver         = {
6688                 .owner          = THIS_MODULE,
6689         },
6690         .id_table       = qla2xxx_pci_tbl,
6691         .probe          = qla2x00_probe_one,
6692         .remove         = qla2x00_remove_one,
6693         .shutdown       = qla2x00_shutdown,
6694         .err_handler    = &qla2xxx_err_handler,
6695 };
6696
6697 static const struct file_operations apidev_fops = {
6698         .owner = THIS_MODULE,
6699         .llseek = noop_llseek,
6700 };
6701
6702 /**
6703  * qla2x00_module_init - Module initialization.
6704  **/
6705 static int __init
6706 qla2x00_module_init(void)
6707 {
6708         int ret = 0;
6709
6710         /* Allocate cache for SRBs. */
6711         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6712             SLAB_HWCACHE_ALIGN, NULL);
6713         if (srb_cachep == NULL) {
6714                 ql_log(ql_log_fatal, NULL, 0x0001,
6715                     "Unable to allocate SRB cache...Failing load!.\n");
6716                 return -ENOMEM;
6717         }
6718
6719         /* Initialize target kmem_cache and mem_pools */
6720         ret = qlt_init();
6721         if (ret < 0) {
6722                 goto destroy_cache;
6723         } else if (ret > 0) {
6724                 /*
6725                  * If initiator mode is explictly disabled by qlt_init(),
6726                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6727                  * performing scsi_scan_target() during LOOP UP event.
6728                  */
6729                 qla2xxx_transport_functions.disable_target_scan = 1;
6730                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6731         }
6732
6733         /* Derive version string. */
6734         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6735         if (ql2xextended_error_logging)
6736                 strcat(qla2x00_version_str, "-debug");
6737         if (ql2xextended_error_logging == 1)
6738                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6739
6740         qla2xxx_transport_template =
6741             fc_attach_transport(&qla2xxx_transport_functions);
6742         if (!qla2xxx_transport_template) {
6743                 ql_log(ql_log_fatal, NULL, 0x0002,
6744                     "fc_attach_transport failed...Failing load!.\n");
6745                 ret = -ENODEV;
6746                 goto qlt_exit;
6747         }
6748
6749         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6750         if (apidev_major < 0) {
6751                 ql_log(ql_log_fatal, NULL, 0x0003,
6752                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6753         }
6754
6755         qla2xxx_transport_vport_template =
6756             fc_attach_transport(&qla2xxx_transport_vport_functions);
6757         if (!qla2xxx_transport_vport_template) {
6758                 ql_log(ql_log_fatal, NULL, 0x0004,
6759                     "fc_attach_transport vport failed...Failing load!.\n");
6760                 ret = -ENODEV;
6761                 goto unreg_chrdev;
6762         }
6763         ql_log(ql_log_info, NULL, 0x0005,
6764             "QLogic Fibre Channel HBA Driver: %s.\n",
6765             qla2x00_version_str);
6766         ret = pci_register_driver(&qla2xxx_pci_driver);
6767         if (ret) {
6768                 ql_log(ql_log_fatal, NULL, 0x0006,
6769                     "pci_register_driver failed...ret=%d Failing load!.\n",
6770                     ret);
6771                 goto release_vport_transport;
6772         }
6773         return ret;
6774
6775 release_vport_transport:
6776         fc_release_transport(qla2xxx_transport_vport_template);
6777
6778 unreg_chrdev:
6779         if (apidev_major >= 0)
6780                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6781         fc_release_transport(qla2xxx_transport_template);
6782
6783 qlt_exit:
6784         qlt_exit();
6785
6786 destroy_cache:
6787         kmem_cache_destroy(srb_cachep);
6788         return ret;
6789 }
6790
6791 /**
6792  * qla2x00_module_exit - Module cleanup.
6793  **/
6794 static void __exit
6795 qla2x00_module_exit(void)
6796 {
6797         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6798         pci_unregister_driver(&qla2xxx_pci_driver);
6799         qla2x00_release_firmware();
6800         kmem_cache_destroy(srb_cachep);
6801         qlt_exit();
6802         if (ctx_cachep)
6803                 kmem_cache_destroy(ctx_cachep);
6804         fc_release_transport(qla2xxx_transport_template);
6805         fc_release_transport(qla2xxx_transport_vport_template);
6806 }
6807
6808 module_init(qla2x00_module_init);
6809 module_exit(qla2x00_module_exit);
6810
6811 MODULE_AUTHOR("QLogic Corporation");
6812 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6813 MODULE_LICENSE("GPL");
6814 MODULE_VERSION(QLA2XXX_VERSION);
6815 /*(DEBLOBBED)*/