drivers/scsi/qla2xxx/qla_os.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * QLogic Fibre Channel HBA Driver
   4  * Copyright (c)  2003-2014 QLogic Corporation
   5  */
   6 #include "qla_def.h"
   7
   8 #include <linux/moduleparam.h>
   9 #include <linux/vmalloc.h>
  10 #include <linux/delay.h>
  11 #include <linux/kthread.h>
  12 #include <linux/mutex.h>
  13 #include <linux/kobject.h>
  14 #include <linux/slab.h>
  15 #include <linux/blk-mq-pci.h>
  16 #include <linux/refcount.h>
  17 #include <linux/crash_dump.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 int ql2xfulldump_on_mpifail;
  39 module_param(ql2xfulldump_on_mpifail, int, S_IRUGO | S_IWUSR);
  40 MODULE_PARM_DESC(ql2xfulldump_on_mpifail,
  41                  "Set this to take full dump on MPI hang.");
  42
  43 int ql2xenforce_iocb_limit = 1;
  44 module_param(ql2xenforce_iocb_limit, int, S_IRUGO | S_IWUSR);
  45 MODULE_PARM_DESC(ql2xenforce_iocb_limit,
  46                  "Enforce IOCB throttling, to avoid FW congestion. (default: 1)");
  47
  48 /*
  49  * CT6 CTX allocation cache
  50  */
  51 static struct kmem_cache *ctx_cachep;
  52 /*
  53  * error level for logging
  54  */
  55 uint ql_errlev = 0x8001;
  56
  57 int ql2xsecenable;
  58 module_param(ql2xsecenable, int, S_IRUGO);
  59 MODULE_PARM_DESC(ql2xsecenable,
  60         "Enable/disable security. 0(Default) - Security disabled. 1 - Security enabled.");
  61
  62 static int ql2xenableclass2;
  63 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  64 MODULE_PARM_DESC(ql2xenableclass2,
  65                 "Specify if Class 2 operations are supported from the very "
  66                 "beginning. Default is 0 - class 2 not supported.");
  67
  68
  69 int ql2xlogintimeout = 20;
  70 module_param(ql2xlogintimeout, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xlogintimeout,
  72                 "Login timeout value in seconds.");
  73
  74 int qlport_down_retry;
  75 module_param(qlport_down_retry, int, S_IRUGO);
  76 MODULE_PARM_DESC(qlport_down_retry,
  77                 "Maximum number of command retries to a port that returns "
  78                 "a PORT-DOWN status.");
  79
  80 int ql2xplogiabsentdevice;
  81 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  83                 "Option to enable PLOGI to devices that are not present after "
  84                 "a Fabric scan.  This is needed for several broken switches. "
  85                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  86
  87 int ql2xloginretrycount;
  88 module_param(ql2xloginretrycount, int, S_IRUGO);
  89 MODULE_PARM_DESC(ql2xloginretrycount,
  90                 "Specify an alternate value for the NVRAM login retry count.");
  91
  92 int ql2xallocfwdump = 1;
  93 module_param(ql2xallocfwdump, int, S_IRUGO);
  94 MODULE_PARM_DESC(ql2xallocfwdump,
  95                 "Option to enable allocation of memory for a firmware dump "
  96                 "during HBA initialization.  Memory allocation requirements "
  97                 "vary by ISP type.  Default is 1 - allocate memory.");
  98
  99 int ql2xextended_error_logging;
 100 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
 101 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
 102 MODULE_PARM_DESC(ql2xextended_error_logging,
 103                 "Option to enable extended error logging,\n"
 104                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
 105                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
 106                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
 107                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
 108                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
 109                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 110                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 111                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 112                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 113                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 114                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 115                 "\t\t0x1e400000 - Preferred value for capturing essential "
 116                 "debug information (equivalent to old "
 117                 "ql2xextended_error_logging=1).\n"
 118                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 119
 120 int ql2xshiftctondsd = 6;
 121 module_param(ql2xshiftctondsd, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xshiftctondsd,
 123                 "Set to control shifting of command type processing "
 124                 "based on total number of SG elements.");
 125
 126 int ql2xfdmienable = 1;
 127 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 128 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 129 MODULE_PARM_DESC(ql2xfdmienable,
 130                 "Enables FDMI registrations. "
 131                 "0 - no FDMI registrations. "
 132                 "1 - provide FDMI registrations (default).");
 133
 134 #define MAX_Q_DEPTH     64
 135 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 136 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 137 MODULE_PARM_DESC(ql2xmaxqdepth,
 138                 "Maximum queue depth to set for each LUN. "
 139                 "Default is 64.");
 140
 141 int ql2xenabledif = 2;
 142 module_param(ql2xenabledif, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xenabledif,
 144                 " Enable T10-CRC-DIF:\n"
 145                 " Default is 2.\n"
 146                 "  0 -- No DIF Support\n"
 147                 "  1 -- Enable DIF for all types\n"
 148                 "  2 -- Enable DIF for all types, except Type 0.\n");
 149
 150 #if (IS_ENABLED(CONFIG_NVME_FC))
 151 int ql2xnvmeenable = 1;
 152 #else
 153 int ql2xnvmeenable;
 154 #endif
 155 module_param(ql2xnvmeenable, int, 0644);
 156 MODULE_PARM_DESC(ql2xnvmeenable,
 157     "Enables NVME support. "
 158     "0 - no NVMe.  Default is Y");
 159
 160 int ql2xenablehba_err_chk = 2;
 161 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 162 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 163                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 164                 " Default is 2.\n"
 165                 "  0 -- Error isolation disabled\n"
 166                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 167                 "  2 -- Error isolation enabled for all Types\n");
 168
 169 int ql2xiidmaenable = 1;
 170 module_param(ql2xiidmaenable, int, S_IRUGO);
 171 MODULE_PARM_DESC(ql2xiidmaenable,
 172                 "Enables iIDMA settings "
 173                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 174
 175 int ql2xmqsupport = 1;
 176 module_param(ql2xmqsupport, int, S_IRUGO);
 177 MODULE_PARM_DESC(ql2xmqsupport,
 178                 "Enable on demand multiple queue pairs support "
 179                 "Default is 1 for supported. "
 180                 "Set it to 0 to turn off mq qpair support.");
 181
 182 int ql2xfwloadbin;
 183 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 184 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 185 MODULE_PARM_DESC(ql2xfwloadbin,
 186                 "Option to specify location from which to load ISP firmware:.\n"
 187                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 188                 "      interface.\n"
 189                 " 1 -- load firmware from flash.\n"
 190                 " 0 -- use default semantics.\n");
 191
 192 int ql2xetsenable;
 193 module_param(ql2xetsenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xetsenable,
 195                 "Enables firmware ETS burst."
 196                 "Default is 0 - skip ETS enablement.");
 197
 198 int ql2xdbwr = 1;
 199 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdbwr,
 201                 "Option to specify scheme for request queue posting.\n"
 202                 " 0 -- Regular doorbell.\n"
 203                 " 1 -- CAMRAM doorbell (faster).\n");
 204
 205 int ql2xgffidenable;
 206 module_param(ql2xgffidenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xgffidenable,
 208                 "Enables GFF_ID checks of port type. "
 209                 "Default is 0 - Do not use GFF_ID information.");
 210
 211 int ql2xasynctmfenable = 1;
 212 module_param(ql2xasynctmfenable, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xasynctmfenable,
 214                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 215                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 216
 217 int ql2xdontresethba;
 218 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 219 MODULE_PARM_DESC(ql2xdontresethba,
 220                 "Option to specify reset behaviour.\n"
 221                 " 0 (Default) -- Reset on failure.\n"
 222                 " 1 -- Do not reset on failure.\n");
 223
 224 uint64_t ql2xmaxlun = MAX_LUNS;
 225 module_param(ql2xmaxlun, ullong, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmaxlun,
 227                 "Defines the maximum LU number to register with the SCSI "
 228                 "midlayer. Default is 65535.");
 229
 230 int ql2xmdcapmask = 0x1F;
 231 module_param(ql2xmdcapmask, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdcapmask,
 233                 "Set the Minidump driver capture mask level. "
 234                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 235
 236 int ql2xmdenable = 1;
 237 module_param(ql2xmdenable, int, S_IRUGO);
 238 MODULE_PARM_DESC(ql2xmdenable,
 239                 "Enable/disable MiniDump. "
 240                 "0 - MiniDump disabled. "
 241                 "1 (Default) - MiniDump enabled.");
 242
 243 int ql2xexlogins;
 244 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 245 MODULE_PARM_DESC(ql2xexlogins,
 246                  "Number of extended Logins. "
 247                  "0 (Default)- Disabled.");
 248
 249 int ql2xexchoffld = 1024;
 250 module_param(ql2xexchoffld, uint, 0644);
 251 MODULE_PARM_DESC(ql2xexchoffld,
 252         "Number of target exchanges.");
 253
 254 int ql2xiniexchg = 1024;
 255 module_param(ql2xiniexchg, uint, 0644);
 256 MODULE_PARM_DESC(ql2xiniexchg,
 257         "Number of initiator exchanges.");
 258
 259 int ql2xfwholdabts;
 260 module_param(ql2xfwholdabts, int, S_IRUGO);
 261 MODULE_PARM_DESC(ql2xfwholdabts,
 262                 "Allow FW to hold status IOCB until ABTS rsp received. "
 263                 "0 (Default) Do not set fw option. "
 264                 "1 - Set fw option to hold ABTS.");
 265
 266 int ql2xmvasynctoatio = 1;
 267 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 268 MODULE_PARM_DESC(ql2xmvasynctoatio,
 269                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 270                 "0 (Default). Do not move IOCBs"
 271                 "1 - Move IOCBs.");
 272
 273 int ql2xautodetectsfp = 1;
 274 module_param(ql2xautodetectsfp, int, 0444);
 275 MODULE_PARM_DESC(ql2xautodetectsfp,
 276                  "Detect SFP range and set appropriate distance.\n"
 277                  "1 (Default): Enable\n");
 278
 279 int ql2xenablemsix = 1;
 280 module_param(ql2xenablemsix, int, 0444);
 281 MODULE_PARM_DESC(ql2xenablemsix,
 282                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 283                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 284                  " 0 -- enable traditional pin-based mechanism.\n"
 285                  " 1 -- enable MSI-X interrupt mechanism.\n"
 286                  " 2 -- enable MSI interrupt mechanism.\n");
 287
 288 int qla2xuseresexchforels;
 289 module_param(qla2xuseresexchforels, int, 0444);
 290 MODULE_PARM_DESC(qla2xuseresexchforels,
 291                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 292                  " 0 (default): disabled");
 293
 294 static int ql2xprotmask;
 295 module_param(ql2xprotmask, int, 0644);
 296 MODULE_PARM_DESC(ql2xprotmask,
 297                  "Override DIF/DIX protection capabilities mask\n"
 298                  "Default is 0 which sets protection mask based on "
 299                  "capabilities reported by HBA firmware.\n");
 300
 301 static int ql2xprotguard;
 302 module_param(ql2xprotguard, int, 0644);
 303 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 304                  "  0 -- Let HBA firmware decide\n"
 305                  "  1 -- Force T10 CRC\n"
 306                  "  2 -- Force IP checksum\n");
 307
 308 int ql2xdifbundlinginternalbuffers;
 309 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 310 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 311     "Force using internal buffers for DIF information\n"
 312     "0 (Default). Based on check.\n"
 313     "1 Force using internal buffers\n");
 314
 315 int ql2xsmartsan;
 316 module_param(ql2xsmartsan, int, 0444);
 317 module_param_named(smartsan, ql2xsmartsan, int, 0444);
 318 MODULE_PARM_DESC(ql2xsmartsan,
 319                 "Send SmartSAN Management Attributes for FDMI Registration."
 320                 " Default is 0 - No SmartSAN registration,"
 321                 " 1 - Register SmartSAN Management Attributes.");
 322
 323 int ql2xrdpenable;
 324 module_param(ql2xrdpenable, int, 0444);
 325 module_param_named(rdpenable, ql2xrdpenable, int, 0444);
 326 MODULE_PARM_DESC(ql2xrdpenable,
 327                 "Enables RDP responses. "
 328                 "0 - no RDP responses (default). "
 329                 "1 - provide RDP responses.");
 330 int ql2xabts_wait_nvme = 1;
 331 module_param(ql2xabts_wait_nvme, int, 0444);
 332 MODULE_PARM_DESC(ql2xabts_wait_nvme,
 333                  "To wait for ABTS response on I/O timeouts for NVMe. (default: 1)");
 334
 335
 336 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 337 static void qla2x00_free_device(scsi_qla_host_t *);
 338 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 339 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 340
 341
 342 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 343 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 344
 345 /* TODO Convert to inlines
 346  *
 347  * Timer routines
 348  */
 349
 350 __inline__ void
 351 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 352 {
 353         timer_setup(&vha->timer, qla2x00_timer, 0);
 354         vha->timer.expires = jiffies + interval * HZ;
 355         add_timer(&vha->timer);
 356         vha->timer_active = 1;
 357 }
 358
 359 static inline void
 360 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 361 {
 362         /* Currently used for 82XX only. */
 363         if (vha->device_flags & DFLG_DEV_FAILED) {
 364                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 365                     "Device in a failed state, returning.\n");
 366                 return;
 367         }
 368
 369         mod_timer(&vha->timer, jiffies + interval * HZ);
 370 }
 371
 372 static __inline__ void
 373 qla2x00_stop_timer(scsi_qla_host_t *vha)
 374 {
 375         del_timer_sync(&vha->timer);
 376         vha->timer_active = 0;
 377 }
 378
 379 static int qla2x00_do_dpc(void *data);
 380
 381 static void qla2x00_rst_aen(scsi_qla_host_t *);
 382
 383 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 384         struct req_que **, struct rsp_que **);
 385 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 386 static void qla2x00_mem_free(struct qla_hw_data *);
 387 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 388         struct qla_qpair *qpair);
 389
 390 /* -------------------------------------------------------------------------- */
 391 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 392     struct rsp_que *rsp)
 393 {
 394         struct qla_hw_data *ha = vha->hw;
 395
 396         rsp->qpair = ha->base_qpair;
 397         rsp->req = req;
 398         ha->base_qpair->hw = ha;
 399         ha->base_qpair->req = req;
 400         ha->base_qpair->rsp = rsp;
 401         ha->base_qpair->vha = vha;
 402         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 403         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 404         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 405         ha->base_qpair->srb_mempool = ha->srb_mempool;
 406         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 407         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 408         /* init qpair to this cpu. Will adjust at run time. */
 409         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 410         ha->base_qpair->pdev = ha->pdev;
 411
 412         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 413                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 414 }
 415
 416 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 417                                 struct rsp_que *rsp)
 418 {
 419         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 420
 421         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 422                                 GFP_KERNEL);
 423         if (!ha->req_q_map) {
 424                 ql_log(ql_log_fatal, vha, 0x003b,
 425                     "Unable to allocate memory for request queue ptrs.\n");
 426                 goto fail_req_map;
 427         }
 428
 429         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 430                                 GFP_KERNEL);
 431         if (!ha->rsp_q_map) {
 432                 ql_log(ql_log_fatal, vha, 0x003c,
 433                     "Unable to allocate memory for response queue ptrs.\n");
 434                 goto fail_rsp_map;
 435         }
 436
 437         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 438         if (ha->base_qpair == NULL) {
 439                 ql_log(ql_log_warn, vha, 0x00e0,
 440                     "Failed to allocate base queue pair memory.\n");
 441                 goto fail_base_qpair;
 442         }
 443
 444         qla_init_base_qpair(vha, req, rsp);
 445
 446         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 447                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 448                         GFP_KERNEL);
 449                 if (!ha->queue_pair_map) {
 450                         ql_log(ql_log_fatal, vha, 0x0180,
 451                             "Unable to allocate memory for queue pair ptrs.\n");
 452                         goto fail_qpair_map;
 453                 }
 454         }
 455
 456         /*
 457          * Make sure we record at least the request and response queue zero in
 458          * case we need to free them if part of the probe fails.
 459          */
 460         ha->rsp_q_map[0] = rsp;
 461         ha->req_q_map[0] = req;
 462         set_bit(0, ha->rsp_qid_map);
 463         set_bit(0, ha->req_qid_map);
 464         return 0;
 465
 466 fail_qpair_map:
 467         kfree(ha->base_qpair);
 468         ha->base_qpair = NULL;
 469 fail_base_qpair:
 470         kfree(ha->rsp_q_map);
 471         ha->rsp_q_map = NULL;
 472 fail_rsp_map:
 473         kfree(ha->req_q_map);
 474         ha->req_q_map = NULL;
 475 fail_req_map:
 476         return -ENOMEM;
 477 }
 478
 479 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 480 {
 481         if (IS_QLAFX00(ha)) {
 482                 if (req && req->ring_fx00)
 483                         dma_free_coherent(&ha->pdev->dev,
 484                             (req->length_fx00 + 1) * sizeof(request_t),
 485                             req->ring_fx00, req->dma_fx00);
 486         } else if (req && req->ring)
 487                 dma_free_coherent(&ha->pdev->dev,
 488                 (req->length + 1) * sizeof(request_t),
 489                 req->ring, req->dma);
 490
 491         if (req)
 492                 kfree(req->outstanding_cmds);
 493
 494         kfree(req);
 495 }
 496
 497 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 498 {
 499         if (IS_QLAFX00(ha)) {
 500                 if (rsp && rsp->ring_fx00)
 501                         dma_free_coherent(&ha->pdev->dev,
 502                             (rsp->length_fx00 + 1) * sizeof(request_t),
 503                             rsp->ring_fx00, rsp->dma_fx00);
 504         } else if (rsp && rsp->ring) {
 505                 dma_free_coherent(&ha->pdev->dev,
 506                 (rsp->length + 1) * sizeof(response_t),
 507                 rsp->ring, rsp->dma);
 508         }
 509         kfree(rsp);
 510 }
 511
 512 static void qla2x00_free_queues(struct qla_hw_data *ha)
 513 {
 514         struct req_que *req;
 515         struct rsp_que *rsp;
 516         int cnt;
 517         unsigned long flags;
 518
 519         if (ha->queue_pair_map) {
 520                 kfree(ha->queue_pair_map);
 521                 ha->queue_pair_map = NULL;
 522         }
 523         if (ha->base_qpair) {
 524                 kfree(ha->base_qpair);
 525                 ha->base_qpair = NULL;
 526         }
 527
 528         spin_lock_irqsave(&ha->hardware_lock, flags);
 529         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 530                 if (!test_bit(cnt, ha->req_qid_map))
 531                         continue;
 532
 533                 req = ha->req_q_map[cnt];
 534                 clear_bit(cnt, ha->req_qid_map);
 535                 ha->req_q_map[cnt] = NULL;
 536
 537                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 538                 qla2x00_free_req_que(ha, req);
 539                 spin_lock_irqsave(&ha->hardware_lock, flags);
 540         }
 541         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 542
 543         kfree(ha->req_q_map);
 544         ha->req_q_map = NULL;
 545
 546
 547         spin_lock_irqsave(&ha->hardware_lock, flags);
 548         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 549                 if (!test_bit(cnt, ha->rsp_qid_map))
 550                         continue;
 551
 552                 rsp = ha->rsp_q_map[cnt];
 553                 clear_bit(cnt, ha->rsp_qid_map);
 554                 ha->rsp_q_map[cnt] =  NULL;
 555                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 556                 qla2x00_free_rsp_que(ha, rsp);
 557                 spin_lock_irqsave(&ha->hardware_lock, flags);
 558         }
 559         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 560
 561         kfree(ha->rsp_q_map);
 562         ha->rsp_q_map = NULL;
 563 }
 564
 565 static char *
 566 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 567 {
 568         struct qla_hw_data *ha = vha->hw;
 569         static const char *const pci_bus_modes[] = {
 570                 "33", "66", "100", "133",
 571         };
 572         uint16_t pci_bus;
 573
 574         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 575         if (pci_bus) {
 576                 snprintf(str, str_len, "PCI-X (%s MHz)",
 577                          pci_bus_modes[pci_bus]);
 578         } else {
 579                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 580                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 581         }
 582
 583         return str;
 584 }
 585
 586 static char *
 587 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 588 {
 589         static const char *const pci_bus_modes[] = {
 590                 "33", "66", "100", "133",
 591         };
 592         struct qla_hw_data *ha = vha->hw;
 593         uint32_t pci_bus;
 594
 595         if (pci_is_pcie(ha->pdev)) {
 596                 uint32_t lstat, lspeed, lwidth;
 597                 const char *speed_str;
 598
 599                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 600                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 601                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 602
 603                 switch (lspeed) {
 604                 case 1:
 605                         speed_str = "2.5GT/s";
 606                         break;
 607                 case 2:
 608                         speed_str = "5.0GT/s";
 609                         break;
 610                 case 3:
 611                         speed_str = "8.0GT/s";
 612                         break;
 613                 case 4:
 614                         speed_str = "16.0GT/s";
 615                         break;
 616                 default:
 617                         speed_str = "<unknown>";
 618                         break;
 619                 }
 620                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 621
 622                 return str;
 623         }
 624
 625         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 626         if (pci_bus == 0 || pci_bus == 8)
 627                 snprintf(str, str_len, "PCI (%s MHz)",
 628                          pci_bus_modes[pci_bus >> 3]);
 629         else
 630                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 631                          pci_bus & 4 ? 2 : 1,
 632                          pci_bus_modes[pci_bus & 3]);
 633
 634         return str;
 635 }
 636
 637 static char *
 638 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 639 {
 640         char un_str[10];
 641         struct qla_hw_data *ha = vha->hw;
 642
 643         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 644             ha->fw_minor_version, ha->fw_subminor_version);
 645
 646         if (ha->fw_attributes & BIT_9) {
 647                 strcat(str, "FLX");
 648                 return (str);
 649         }
 650
 651         switch (ha->fw_attributes & 0xFF) {
 652         case 0x7:
 653                 strcat(str, "EF");
 654                 break;
 655         case 0x17:
 656                 strcat(str, "TP");
 657                 break;
 658         case 0x37:
 659                 strcat(str, "IP");
 660                 break;
 661         case 0x77:
 662                 strcat(str, "VI");
 663                 break;
 664         default:
 665                 sprintf(un_str, "(%x)", ha->fw_attributes);
 666                 strcat(str, un_str);
 667                 break;
 668         }
 669         if (ha->fw_attributes & 0x100)
 670                 strcat(str, "X");
 671
 672         return (str);
 673 }
 674
 675 static char *
 676 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 677 {
 678         struct qla_hw_data *ha = vha->hw;
 679
 680         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 681             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 682         return str;
 683 }
 684
 685 void qla2x00_sp_free_dma(srb_t *sp)
 686 {
 687         struct qla_hw_data *ha = sp->vha->hw;
 688         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 689
 690         if (sp->flags & SRB_DMA_VALID) {
 691                 scsi_dma_unmap(cmd);
 692                 sp->flags &= ~SRB_DMA_VALID;
 693         }
 694
 695         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 696                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 697                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 698                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 699         }
 700
 701         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 702                 /* List assured to be having elements */
 703                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 704                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 705         }
 706
 707         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 708                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 709
 710                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 711                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 712         }
 713
 714         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 715                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 716
 717                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 718                     ctx1->fcp_cmnd_dma);
 719                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 720                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 721                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 722                 mempool_free(ctx1, ha->ctx_mempool);
 723         }
 724 }
 725
 726 void qla2x00_sp_compl(srb_t *sp, int res)
 727 {
 728         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 729         struct completion *comp = sp->comp;
 730
 731         /* kref: INIT */
 732         kref_put(&sp->cmd_kref, qla2x00_sp_release);
 733         cmd->result = res;
 734         CMD_SP(cmd) = NULL;
 735         cmd->scsi_done(cmd);
 736         if (comp)
 737                 complete(comp);
 738 }
 739
 740 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 741 {
 742         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 743         struct qla_hw_data *ha = sp->fcport->vha->hw;
 744
 745         if (sp->flags & SRB_DMA_VALID) {
 746                 scsi_dma_unmap(cmd);
 747                 sp->flags &= ~SRB_DMA_VALID;
 748         }
 749
 750         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 751                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 752                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 753                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 754         }
 755
 756         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 757                 /* List assured to be having elements */
 758                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 759                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 760         }
 761
 762         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 763                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 764                 struct dsd_dma *dif_dsd, *nxt_dsd;
 765
 766                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 767                     &difctx->ldif_dma_hndl_list, list) {
 768                         list_del(&dif_dsd->list);
 769                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 770                             dif_dsd->dsd_list_dma);
 771                         kfree(dif_dsd);
 772                         difctx->no_dif_bundl--;
 773                 }
 774
 775                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 776                     &difctx->ldif_dsd_list, list) {
 777                         list_del(&dif_dsd->list);
 778                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 779                             dif_dsd->dsd_list_dma);
 780                         kfree(dif_dsd);
 781                         difctx->no_ldif_dsd--;
 782                 }
 783
 784                 if (difctx->no_ldif_dsd) {
 785                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 786                             "%s: difctx->no_ldif_dsd=%x\n",
 787                             __func__, difctx->no_ldif_dsd);
 788                 }
 789
 790                 if (difctx->no_dif_bundl) {
 791                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 792                             "%s: difctx->no_dif_bundl=%x\n",
 793                             __func__, difctx->no_dif_bundl);
 794                 }
 795                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 796         }
 797
 798         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 799                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 800
 801                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 802                     ctx1->fcp_cmnd_dma);
 803                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 804                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 805                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 806                 mempool_free(ctx1, ha->ctx_mempool);
 807                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 808         }
 809
 810         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 811                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 812
 813                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 814                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 815         }
 816 }
 817
 818 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 819 {
 820         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 821         struct completion *comp = sp->comp;
 822
 823         /* ref: INIT */
 824         kref_put(&sp->cmd_kref, qla2x00_sp_release);
 825         cmd->result = res;
 826         CMD_SP(cmd) = NULL;
 827         cmd->scsi_done(cmd);
 828         if (comp)
 829                 complete(comp);
 830 }
 831
 832 static int
 833 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 834 {
 835         scsi_qla_host_t *vha = shost_priv(host);
 836         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 837         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 838         struct qla_hw_data *ha = vha->hw;
 839         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 840         srb_t *sp;
 841         int rval;
 842
 843         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 844             WARN_ON_ONCE(!rport)) {
 845                 cmd->result = DID_NO_CONNECT << 16;
 846                 goto qc24_fail_command;
 847         }
 848
 849         if (ha->mqenable) {
 850                 uint32_t tag;
 851                 uint16_t hwq;
 852                 struct qla_qpair *qpair = NULL;
 853
 854                 tag = blk_mq_unique_tag(scsi_cmd_to_rq(cmd));
 855                 hwq = blk_mq_unique_tag_to_hwq(tag);
 856                 qpair = ha->queue_pair_map[hwq];
 857
 858                 if (qpair)
 859                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 860         }
 861
 862         if (ha->flags.eeh_busy) {
 863                 if (ha->flags.pci_channel_io_perm_failure) {
 864                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 865                             "PCI Channel IO permanent failure, exiting "
 866                             "cmd=%p.\n", cmd);
 867                         cmd->result = DID_NO_CONNECT << 16;
 868                 } else {
 869                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 870                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 871                         cmd->result = DID_REQUEUE << 16;
 872                 }
 873                 goto qc24_fail_command;
 874         }
 875
 876         rval = fc_remote_port_chkready(rport);
 877         if (rval) {
 878                 cmd->result = rval;
 879                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 880                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 881                     cmd, rval);
 882                 goto qc24_fail_command;
 883         }
 884
 885         if (!vha->flags.difdix_supported &&
 886                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 887                         ql_dbg(ql_dbg_io, vha, 0x3004,
 888                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 889                             cmd);
 890                         cmd->result = DID_NO_CONNECT << 16;
 891                         goto qc24_fail_command;
 892         }
 893
 894         if (!fcport || fcport->deleted) {
 895                 cmd->result = DID_IMM_RETRY << 16;
 896                 goto qc24_fail_command;
 897         }
 898
 899         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 900                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 901                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 902                         ql_dbg(ql_dbg_io, vha, 0x3005,
 903                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 904                             atomic_read(&fcport->state),
 905                             atomic_read(&base_vha->loop_state));
 906                         cmd->result = DID_NO_CONNECT << 16;
 907                         goto qc24_fail_command;
 908                 }
 909                 goto qc24_target_busy;
 910         }
 911
 912         /*
 913          * Return target busy if we've received a non-zero retry_delay_timer
 914          * in a FCP_RSP.
 915          */
 916         if (fcport->retry_delay_timestamp == 0) {
 917                 /* retry delay not set */
 918         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 919                 fcport->retry_delay_timestamp = 0;
 920         else
 921                 goto qc24_target_busy;
 922
 923         sp = scsi_cmd_priv(cmd);
 924         /* ref: INIT */
 925         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 926
 927         sp->u.scmd.cmd = cmd;
 928         sp->type = SRB_SCSI_CMD;
 929
 930         CMD_SP(cmd) = (void *)sp;
 931         sp->free = qla2x00_sp_free_dma;
 932         sp->done = qla2x00_sp_compl;
 933
 934         rval = ha->isp_ops->start_scsi(sp);
 935         if (rval != QLA_SUCCESS) {
 936                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 937                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 938                 goto qc24_host_busy_free_sp;
 939         }
 940
 941         return 0;
 942
 943 qc24_host_busy_free_sp:
 944         /* ref: INIT */
 945         kref_put(&sp->cmd_kref, qla2x00_sp_release);
 946
 947 qc24_target_busy:
 948         return SCSI_MLQUEUE_TARGET_BUSY;
 949
 950 qc24_fail_command:
 951         cmd->scsi_done(cmd);
 952
 953         return 0;
 954 }
 955
 956 /* For MQ supported I/O */
 957 int
 958 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 959     struct qla_qpair *qpair)
 960 {
 961         scsi_qla_host_t *vha = shost_priv(host);
 962         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 963         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 964         struct qla_hw_data *ha = vha->hw;
 965         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 966         srb_t *sp;
 967         int rval;
 968
 969         rval = rport ? fc_remote_port_chkready(rport) : (DID_NO_CONNECT << 16);
 970         if (rval) {
 971                 cmd->result = rval;
 972                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 973                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 974                     cmd, rval);
 975                 goto qc24_fail_command;
 976         }
 977
 978         if (!qpair->online) {
 979                 ql_dbg(ql_dbg_io, vha, 0x3077,
 980                        "qpair not online. eeh_busy=%d.\n", ha->flags.eeh_busy);
 981                 cmd->result = DID_NO_CONNECT << 16;
 982                 goto qc24_fail_command;
 983         }
 984
 985         if (!fcport || fcport->deleted) {
 986                 cmd->result = DID_IMM_RETRY << 16;
 987                 goto qc24_fail_command;
 988         }
 989
 990         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 991                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 992                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 993                         ql_dbg(ql_dbg_io, vha, 0x3077,
 994                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 995                             atomic_read(&fcport->state),
 996                             atomic_read(&base_vha->loop_state));
 997                         cmd->result = DID_NO_CONNECT << 16;
 998                         goto qc24_fail_command;
 999                 }
1000                 goto qc24_target_busy;
1001         }
1002
1003         /*
1004          * Return target busy if we've received a non-zero retry_delay_timer
1005          * in a FCP_RSP.
1006          */
1007         if (fcport->retry_delay_timestamp == 0) {
1008                 /* retry delay not set */
1009         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1010                 fcport->retry_delay_timestamp = 0;
1011         else
1012                 goto qc24_target_busy;
1013
1014         sp = scsi_cmd_priv(cmd);
1015         /* ref: INIT */
1016         qla2xxx_init_sp(sp, vha, qpair, fcport);
1017
1018         sp->u.scmd.cmd = cmd;
1019         sp->type = SRB_SCSI_CMD;
1020         CMD_SP(cmd) = (void *)sp;
1021         sp->free = qla2xxx_qpair_sp_free_dma;
1022         sp->done = qla2xxx_qpair_sp_compl;
1023
1024         rval = ha->isp_ops->start_scsi_mq(sp);
1025         if (rval != QLA_SUCCESS) {
1026                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1027                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1028                 goto qc24_host_busy_free_sp;
1029         }
1030
1031         return 0;
1032
1033 qc24_host_busy_free_sp:
1034         /* ref: INIT */
1035         kref_put(&sp->cmd_kref, qla2x00_sp_release);
1036
1037 qc24_target_busy:
1038         return SCSI_MLQUEUE_TARGET_BUSY;
1039
1040 qc24_fail_command:
1041         cmd->scsi_done(cmd);
1042
1043         return 0;
1044 }
1045
1046 /*
1047  * qla2x00_eh_wait_on_command
1048  *    Waits for the command to be returned by the Firmware for some
1049  *    max time.
1050  *
1051  * Input:
1052  *    cmd = Scsi Command to wait on.
1053  *
1054  * Return:
1055  *    Completed in time : QLA_SUCCESS
1056  *    Did not complete in time : QLA_FUNCTION_FAILED
1057  */
1058 static int
1059 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1060 {
1061 #define ABORT_POLLING_PERIOD    1000
1062 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1063         unsigned long wait_iter = ABORT_WAIT_ITER;
1064         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1065         struct qla_hw_data *ha = vha->hw;
1066         int ret = QLA_SUCCESS;
1067
1068         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1069                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1070                     "Return:eh_wait.\n");
1071                 return ret;
1072         }
1073
1074         while (CMD_SP(cmd) && wait_iter--) {
1075                 msleep(ABORT_POLLING_PERIOD);
1076         }
1077         if (CMD_SP(cmd))
1078                 ret = QLA_FUNCTION_FAILED;
1079
1080         return ret;
1081 }
1082
1083 /*
1084  * qla2x00_wait_for_hba_online
1085  *    Wait till the HBA is online after going through
1086  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1087  *    finally HBA is disabled ie marked offline
1088  *
1089  * Input:
1090  *     ha - pointer to host adapter structure
1091  *
1092  * Note:
1093  *    Does context switching-Release SPIN_LOCK
1094  *    (if any) before calling this routine.
1095  *
1096  * Return:
1097  *    Success (Adapter is online) : 0
1098  *    Failed  (Adapter is offline/disabled) : 1
1099  */
1100 int
1101 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1102 {
1103         int             return_status;
1104         unsigned long   wait_online;
1105         struct qla_hw_data *ha = vha->hw;
1106         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1107
1108         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1109         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1110             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1111             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1112             ha->dpc_active) && time_before(jiffies, wait_online)) {
1113
1114                 msleep(1000);
1115         }
1116         if (base_vha->flags.online)
1117                 return_status = QLA_SUCCESS;
1118         else
1119                 return_status = QLA_FUNCTION_FAILED;
1120
1121         return (return_status);
1122 }
1123
1124 static inline int test_fcport_count(scsi_qla_host_t *vha)
1125 {
1126         struct qla_hw_data *ha = vha->hw;
1127         unsigned long flags;
1128         int res;
1129         /* Return 0 = sleep, x=wake */
1130
1131         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1132         ql_dbg(ql_dbg_init, vha, 0x00ec,
1133             "tgt %p, fcport_count=%d\n",
1134             vha, vha->fcport_count);
1135         res = (vha->fcport_count == 0);
1136         if  (res) {
1137                 struct fc_port *fcport;
1138
1139                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1140                         if (fcport->deleted != QLA_SESS_DELETED) {
1141                                 /* session(s) may not be fully logged in
1142                                  * (ie fcport_count=0), but session
1143                                  * deletion thread(s) may be inflight.
1144                                  */
1145
1146                                 res = 0;
1147                                 break;
1148                         }
1149                 }
1150         }
1151         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1152
1153         return res;
1154 }
1155
1156 /*
1157  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1158  * it has dependency on UNLOADING flag to stop device discovery
1159  */
1160 void
1161 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1162 {
1163         u8 i;
1164
1165         qla2x00_mark_all_devices_lost(vha);
1166
1167         for (i = 0; i < 10; i++) {
1168                 if (wait_event_timeout(vha->fcport_waitQ,
1169                     test_fcport_count(vha), HZ) > 0)
1170                         break;
1171         }
1172
1173         flush_workqueue(vha->hw->wq);
1174 }
1175
1176 /*
1177  * qla2x00_wait_for_hba_ready
1178  * Wait till the HBA is ready before doing driver unload
1179  *
1180  * Input:
1181  *     ha - pointer to host adapter structure
1182  *
1183  * Note:
1184  *    Does context switching-Release SPIN_LOCK
1185  *    (if any) before calling this routine.
1186  *
1187  */
1188 static void
1189 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1190 {
1191         struct qla_hw_data *ha = vha->hw;
1192         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1193
1194         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1195                 ha->flags.mbox_busy) ||
1196                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1197                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1198                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1199                         break;
1200                 msleep(1000);
1201         }
1202 }
1203
1204 int
1205 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1206 {
1207         int             return_status;
1208         unsigned long   wait_reset;
1209         struct qla_hw_data *ha = vha->hw;
1210         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1211
1212         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1213         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1214             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1215             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1216             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1217
1218                 msleep(1000);
1219
1220                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1221                     ha->flags.chip_reset_done)
1222                         break;
1223         }
1224         if (ha->flags.chip_reset_done)
1225                 return_status = QLA_SUCCESS;
1226         else
1227                 return_status = QLA_FUNCTION_FAILED;
1228
1229         return return_status;
1230 }
1231
1232 /**************************************************************************
1233 * qla2xxx_eh_abort
1234 *
1235 * Description:
1236 *    The abort function will abort the specified command.
1237 *
1238 * Input:
1239 *    cmd = Linux SCSI command packet to be aborted.
1240 *
1241 * Returns:
1242 *    Either SUCCESS or FAILED.
1243 *
1244 * Note:
1245 *    Only return FAILED if command not returned by firmware.
1246 **************************************************************************/
1247 static int
1248 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1249 {
1250         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1251         DECLARE_COMPLETION_ONSTACK(comp);
1252         srb_t *sp;
1253         int ret;
1254         unsigned int id;
1255         uint64_t lun;
1256         int rval;
1257         struct qla_hw_data *ha = vha->hw;
1258         uint32_t ratov_j;
1259         struct qla_qpair *qpair;
1260         unsigned long flags;
1261         int fast_fail_status = SUCCESS;
1262
1263         if (qla2x00_isp_reg_stat(ha)) {
1264                 ql_log(ql_log_info, vha, 0x8042,
1265                     "PCI/Register disconnect, exiting.\n");
1266                 qla_pci_set_eeh_busy(vha);
1267                 return FAILED;
1268         }
1269
1270         /* Save any FAST_IO_FAIL value to return later if abort succeeds */
1271         ret = fc_block_scsi_eh(cmd);
1272         if (ret != 0)
1273                 fast_fail_status = ret;
1274
1275         sp = scsi_cmd_priv(cmd);
1276         qpair = sp->qpair;
1277
1278         vha->cmd_timeout_cnt++;
1279
1280         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1281                 return fast_fail_status != SUCCESS ? fast_fail_status : FAILED;
1282
1283         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1284         sp->comp = &comp;
1285         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1286
1287
1288         id = cmd->device->id;
1289         lun = cmd->device->lun;
1290
1291         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1292             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1293             vha->host_no, id, lun, sp, cmd, sp->handle);
1294
1295         /*
1296          * Abort will release the original Command/sp from FW. Let the
1297          * original command call scsi_done. In return, he will wakeup
1298          * this sleeping thread.
1299          */
1300         rval = ha->isp_ops->abort_command(sp);
1301
1302         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1303                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1304
1305         /* Wait for the command completion. */
1306         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1307         ratov_j = msecs_to_jiffies(ratov_j);
1308         switch (rval) {
1309         case QLA_SUCCESS:
1310                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1311                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1312                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1313                             __func__, ha->r_a_tov/10);
1314                         ret = FAILED;
1315                 } else {
1316                         ret = fast_fail_status;
1317                 }
1318                 break;
1319         default:
1320                 ret = FAILED;
1321                 break;
1322         }
1323
1324         sp->comp = NULL;
1325
1326         ql_log(ql_log_info, vha, 0x801c,
1327             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1328             vha->host_no, id, lun, ret);
1329
1330         return ret;
1331 }
1332
1333 /*
1334  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1335  */
1336 int
1337 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1338         uint64_t l, enum nexus_wait_type type)
1339 {
1340         int cnt, match, status;
1341         unsigned long flags;
1342         struct qla_hw_data *ha = vha->hw;
1343         struct req_que *req;
1344         srb_t *sp;
1345         struct scsi_cmnd *cmd;
1346
1347         status = QLA_SUCCESS;
1348
1349         spin_lock_irqsave(&ha->hardware_lock, flags);
1350         req = vha->req;
1351         for (cnt = 1; status == QLA_SUCCESS &&
1352                 cnt < req->num_outstanding_cmds; cnt++) {
1353                 sp = req->outstanding_cmds[cnt];
1354                 if (!sp)
1355                         continue;
1356                 if (sp->type != SRB_SCSI_CMD)
1357                         continue;
1358                 if (vha->vp_idx != sp->vha->vp_idx)
1359                         continue;
1360                 match = 0;
1361                 cmd = GET_CMD_SP(sp);
1362                 switch (type) {
1363                 case WAIT_HOST:
1364                         match = 1;
1365                         break;
1366                 case WAIT_TARGET:
1367                         match = cmd->device->id == t;
1368                         break;
1369                 case WAIT_LUN:
1370                         match = (cmd->device->id == t &&
1371                                 cmd->device->lun == l);
1372                         break;
1373                 }
1374                 if (!match)
1375                         continue;
1376
1377                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1378                 status = qla2x00_eh_wait_on_command(cmd);
1379                 spin_lock_irqsave(&ha->hardware_lock, flags);
1380         }
1381         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1382
1383         return status;
1384 }
1385
1386 static char *reset_errors[] = {
1387         "HBA not online",
1388         "HBA not ready",
1389         "Task management failed",
1390         "Waiting for command completions",
1391 };
1392
1393 static int
1394 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1395 {
1396         struct scsi_device *sdev = cmd->device;
1397         scsi_qla_host_t *vha = shost_priv(sdev->host);
1398         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1399         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1400         struct qla_hw_data *ha = vha->hw;
1401         int err;
1402
1403         if (qla2x00_isp_reg_stat(ha)) {
1404                 ql_log(ql_log_info, vha, 0x803e,
1405                     "PCI/Register disconnect, exiting.\n");
1406                 qla_pci_set_eeh_busy(vha);
1407                 return FAILED;
1408         }
1409
1410         if (!fcport) {
1411                 return FAILED;
1412         }
1413
1414         err = fc_block_rport(rport);
1415         if (err != 0)
1416                 return err;
1417
1418         if (fcport->deleted)
1419                 return SUCCESS;
1420
1421         ql_log(ql_log_info, vha, 0x8009,
1422             "DEVICE RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", vha->host_no,
1423             sdev->id, sdev->lun, cmd);
1424
1425         err = 0;
1426         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1427                 ql_log(ql_log_warn, vha, 0x800a,
1428                     "Wait for hba online failed for cmd=%p.\n", cmd);
1429                 goto eh_reset_failed;
1430         }
1431         err = 2;
1432         if (ha->isp_ops->lun_reset(fcport, sdev->lun, 1)
1433                 != QLA_SUCCESS) {
1434                 ql_log(ql_log_warn, vha, 0x800c,
1435                     "do_reset failed for cmd=%p.\n", cmd);
1436                 goto eh_reset_failed;
1437         }
1438         err = 3;
1439         if (qla2x00_eh_wait_for_pending_commands(vha, sdev->id,
1440             sdev->lun, WAIT_LUN) != QLA_SUCCESS) {
1441                 ql_log(ql_log_warn, vha, 0x800d,
1442                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1443                 goto eh_reset_failed;
1444         }
1445
1446         ql_log(ql_log_info, vha, 0x800e,
1447             "DEVICE RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n",
1448             vha->host_no, sdev->id, sdev->lun, cmd);
1449
1450         return SUCCESS;
1451
1452 eh_reset_failed:
1453         ql_log(ql_log_info, vha, 0x800f,
1454             "DEVICE RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n",
1455             reset_errors[err], vha->host_no, sdev->id, sdev->lun,
1456             cmd);
1457         vha->reset_cmd_err_cnt++;
1458         return FAILED;
1459 }
1460
1461 static int
1462 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1463 {
1464         struct scsi_device *sdev = cmd->device;
1465         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1466         scsi_qla_host_t *vha = shost_priv(rport_to_shost(rport));
1467         struct qla_hw_data *ha = vha->hw;
1468         fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
1469         int err;
1470
1471         if (qla2x00_isp_reg_stat(ha)) {
1472                 ql_log(ql_log_info, vha, 0x803f,
1473                     "PCI/Register disconnect, exiting.\n");
1474                 qla_pci_set_eeh_busy(vha);
1475                 return FAILED;
1476         }
1477
1478         if (!fcport) {
1479                 return FAILED;
1480         }
1481
1482         err = fc_block_rport(rport);
1483         if (err != 0)
1484                 return err;
1485
1486         if (fcport->deleted)
1487                 return SUCCESS;
1488
1489         ql_log(ql_log_info, vha, 0x8009,
1490             "TARGET RESET ISSUED nexus=%ld:%d cmd=%p.\n", vha->host_no,
1491             sdev->id, cmd);
1492
1493         err = 0;
1494         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1495                 ql_log(ql_log_warn, vha, 0x800a,
1496                     "Wait for hba online failed for cmd=%p.\n", cmd);
1497                 goto eh_reset_failed;
1498         }
1499         err = 2;
1500         if (ha->isp_ops->target_reset(fcport, 0, 0) != QLA_SUCCESS) {
1501                 ql_log(ql_log_warn, vha, 0x800c,
1502                     "target_reset failed for cmd=%p.\n", cmd);
1503                 goto eh_reset_failed;
1504         }
1505         err = 3;
1506         if (qla2x00_eh_wait_for_pending_commands(vha, sdev->id,
1507             0, WAIT_TARGET) != QLA_SUCCESS) {
1508                 ql_log(ql_log_warn, vha, 0x800d,
1509                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1510                 goto eh_reset_failed;
1511         }
1512
1513         ql_log(ql_log_info, vha, 0x800e,
1514             "TARGET RESET SUCCEEDED nexus:%ld:%d cmd=%p.\n",
1515             vha->host_no, sdev->id, cmd);
1516
1517         return SUCCESS;
1518
1519 eh_reset_failed:
1520         ql_log(ql_log_info, vha, 0x800f,
1521             "TARGET RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n",
1522             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1523             cmd);
1524         vha->reset_cmd_err_cnt++;
1525         return FAILED;
1526 }
1527
1528 /**************************************************************************
1529 * qla2xxx_eh_bus_reset
1530 *
1531 * Description:
1532 *    The bus reset function will reset the bus and abort any executing
1533 *    commands.
1534 *
1535 * Input:
1536 *    cmd = Linux SCSI command packet of the command that cause the
1537 *          bus reset.
1538 *
1539 * Returns:
1540 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1541 *
1542 **************************************************************************/
1543 static int
1544 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1545 {
1546         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1547         int ret = FAILED;
1548         unsigned int id;
1549         uint64_t lun;
1550         struct qla_hw_data *ha = vha->hw;
1551
1552         if (qla2x00_isp_reg_stat(ha)) {
1553                 ql_log(ql_log_info, vha, 0x8040,
1554                     "PCI/Register disconnect, exiting.\n");
1555                 qla_pci_set_eeh_busy(vha);
1556                 return FAILED;
1557         }
1558
1559         id = cmd->device->id;
1560         lun = cmd->device->lun;
1561
1562         if (qla2x00_chip_is_down(vha))
1563                 return ret;
1564
1565         ql_log(ql_log_info, vha, 0x8012,
1566             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1567
1568         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1569                 ql_log(ql_log_fatal, vha, 0x8013,
1570                     "Wait for hba online failed board disabled.\n");
1571                 goto eh_bus_reset_done;
1572         }
1573
1574         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1575                 ret = SUCCESS;
1576
1577         if (ret == FAILED)
1578                 goto eh_bus_reset_done;
1579
1580         /* Flush outstanding commands. */
1581         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1582             QLA_SUCCESS) {
1583                 ql_log(ql_log_warn, vha, 0x8014,
1584                     "Wait for pending commands failed.\n");
1585                 ret = FAILED;
1586         }
1587
1588 eh_bus_reset_done:
1589         ql_log(ql_log_warn, vha, 0x802b,
1590             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1591             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1592
1593         return ret;
1594 }
1595
1596 /**************************************************************************
1597 * qla2xxx_eh_host_reset
1598 *
1599 * Description:
1600 *    The reset function will reset the Adapter.
1601 *
1602 * Input:
1603 *      cmd = Linux SCSI command packet of the command that cause the
1604 *            adapter reset.
1605 *
1606 * Returns:
1607 *      Either SUCCESS or FAILED.
1608 *
1609 * Note:
1610 **************************************************************************/
1611 static int
1612 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1613 {
1614         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1615         struct qla_hw_data *ha = vha->hw;
1616         int ret = FAILED;
1617         unsigned int id;
1618         uint64_t lun;
1619         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1620
1621         if (qla2x00_isp_reg_stat(ha)) {
1622                 ql_log(ql_log_info, vha, 0x8041,
1623                     "PCI/Register disconnect, exiting.\n");
1624                 qla_pci_set_eeh_busy(vha);
1625                 return SUCCESS;
1626         }
1627
1628         id = cmd->device->id;
1629         lun = cmd->device->lun;
1630
1631         ql_log(ql_log_info, vha, 0x8018,
1632             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1633
1634         /*
1635          * No point in issuing another reset if one is active.  Also do not
1636          * attempt a reset if we are updating flash.
1637          */
1638         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1639                 goto eh_host_reset_lock;
1640
1641         if (vha != base_vha) {
1642                 if (qla2x00_vp_abort_isp(vha))
1643                         goto eh_host_reset_lock;
1644         } else {
1645                 if (IS_P3P_TYPE(vha->hw)) {
1646                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1647                                 /* Ctx reset success */
1648                                 ret = SUCCESS;
1649                                 goto eh_host_reset_lock;
1650                         }
1651                         /* fall thru if ctx reset failed */
1652                 }
1653                 if (ha->wq)
1654                         flush_workqueue(ha->wq);
1655
1656                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1657                 if (ha->isp_ops->abort_isp(base_vha)) {
1658                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1659                         /* failed. schedule dpc to try */
1660                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1661
1662                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1663                                 ql_log(ql_log_warn, vha, 0x802a,
1664                                     "wait for hba online failed.\n");
1665                                 goto eh_host_reset_lock;
1666                         }
1667                 }
1668                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1669         }
1670
1671         /* Waiting for command to be returned to OS.*/
1672         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1673                 QLA_SUCCESS)
1674                 ret = SUCCESS;
1675
1676 eh_host_reset_lock:
1677         ql_log(ql_log_info, vha, 0x8017,
1678             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1679             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1680
1681         return ret;
1682 }
1683
1684 /*
1685 * qla2x00_loop_reset
1686 *      Issue loop reset.
1687 *
1688 * Input:
1689 *      ha = adapter block pointer.
1690 *
1691 * Returns:
1692 *      0 = success
1693 */
1694 int
1695 qla2x00_loop_reset(scsi_qla_host_t *vha)
1696 {
1697         int ret;
1698         struct qla_hw_data *ha = vha->hw;
1699
1700         if (IS_QLAFX00(ha))
1701                 return QLA_SUCCESS;
1702
1703         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1704                 atomic_set(&vha->loop_state, LOOP_DOWN);
1705                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1706                 qla2x00_mark_all_devices_lost(vha);
1707                 ret = qla2x00_full_login_lip(vha);
1708                 if (ret != QLA_SUCCESS) {
1709                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1710                             "full_login_lip=%d.\n", ret);
1711                 }
1712         }
1713
1714         if (ha->flags.enable_lip_reset) {
1715                 ret = qla2x00_lip_reset(vha);
1716                 if (ret != QLA_SUCCESS)
1717                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1718                             "lip_reset failed (%d).\n", ret);
1719         }
1720
1721         /* Issue marker command only when we are going to start the I/O */
1722         vha->marker_needed = 1;
1723
1724         return QLA_SUCCESS;
1725 }
1726
1727 /*
1728  * The caller must ensure that no completion interrupts will happen
1729  * while this function is in progress.
1730  */
1731 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1732                               unsigned long *flags)
1733         __releases(qp->qp_lock_ptr)
1734         __acquires(qp->qp_lock_ptr)
1735 {
1736         DECLARE_COMPLETION_ONSTACK(comp);
1737         scsi_qla_host_t *vha = qp->vha;
1738         struct qla_hw_data *ha = vha->hw;
1739         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1740         int rval;
1741         bool ret_cmd;
1742         uint32_t ratov_j;
1743
1744         lockdep_assert_held(qp->qp_lock_ptr);
1745
1746         if (qla2x00_chip_is_down(vha)) {
1747                 sp->done(sp, res);
1748                 return;
1749         }
1750
1751         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1752             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1753              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1754              !qla2x00_isp_reg_stat(ha))) {
1755                 if (sp->comp) {
1756                         sp->done(sp, res);
1757                         return;
1758                 }
1759
1760                 sp->comp = &comp;
1761                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1762
1763                 rval = ha->isp_ops->abort_command(sp);
1764                 /* Wait for command completion. */
1765                 ret_cmd = false;
1766                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1767                 ratov_j = msecs_to_jiffies(ratov_j);
1768                 switch (rval) {
1769                 case QLA_SUCCESS:
1770                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1771                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1772                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1773                                     __func__, ha->r_a_tov/10);
1774                                 ret_cmd = true;
1775                         }
1776                         /* else FW return SP to driver */
1777                         break;
1778                 default:
1779                         ret_cmd = true;
1780                         break;
1781                 }
1782
1783                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1784                 if (ret_cmd && blk_mq_request_started(scsi_cmd_to_rq(cmd)))
1785                         sp->done(sp, res);
1786         } else {
1787                 sp->done(sp, res);
1788         }
1789 }
1790
1791 /*
1792  * The caller must ensure that no completion interrupts will happen
1793  * while this function is in progress.
1794  */
1795 static void
1796 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1797 {
1798         int cnt;
1799         unsigned long flags;
1800         srb_t *sp;
1801         scsi_qla_host_t *vha = qp->vha;
1802         struct qla_hw_data *ha = vha->hw;
1803         struct req_que *req;
1804         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1805         struct qla_tgt_cmd *cmd;
1806
1807         if (!ha->req_q_map)
1808                 return;
1809         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1810         req = qp->req;
1811         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1812                 sp = req->outstanding_cmds[cnt];
1813                 if (sp) {
1814                         switch (sp->cmd_type) {
1815                         case TYPE_SRB:
1816                                 qla2x00_abort_srb(qp, sp, res, &flags);
1817                                 break;
1818                         case TYPE_TGT_CMD:
1819                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1820                                     qla_ini_mode_enabled(vha)) {
1821                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1822                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1823                                             vha->dpc_flags);
1824                                         continue;
1825                                 }
1826                                 cmd = (struct qla_tgt_cmd *)sp;
1827                                 cmd->aborted = 1;
1828                                 break;
1829                         case TYPE_TGT_TMCMD:
1830                                 /* Skip task management functions. */
1831                                 break;
1832                         default:
1833                                 break;
1834                         }
1835                         req->outstanding_cmds[cnt] = NULL;
1836                 }
1837         }
1838         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1839 }
1840
1841 /*
1842  * The caller must ensure that no completion interrupts will happen
1843  * while this function is in progress.
1844  */
1845 void
1846 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1847 {
1848         int que;
1849         struct qla_hw_data *ha = vha->hw;
1850
1851         /* Continue only if initialization complete. */
1852         if (!ha->base_qpair)
1853                 return;
1854         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1855
1856         if (!ha->queue_pair_map)
1857                 return;
1858         for (que = 0; que < ha->max_qpairs; que++) {
1859                 if (!ha->queue_pair_map[que])
1860                         continue;
1861
1862                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1863         }
1864 }
1865
1866 static int
1867 qla2xxx_slave_alloc(struct scsi_device *sdev)
1868 {
1869         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1870
1871         if (!rport || fc_remote_port_chkready(rport))
1872                 return -ENXIO;
1873
1874         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1875
1876         return 0;
1877 }
1878
1879 static int
1880 qla2xxx_slave_configure(struct scsi_device *sdev)
1881 {
1882         scsi_qla_host_t *vha = shost_priv(sdev->host);
1883         struct req_que *req = vha->req;
1884
1885         if (IS_T10_PI_CAPABLE(vha->hw))
1886                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1887
1888         scsi_change_queue_depth(sdev, req->max_q_depth);
1889         return 0;
1890 }
1891
1892 static void
1893 qla2xxx_slave_destroy(struct scsi_device *sdev)
1894 {
1895         sdev->hostdata = NULL;
1896 }
1897
1898 /**
1899  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1900  * @ha: HA context
1901  *
1902  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1903  * supported addressing method.
1904  */
1905 static void
1906 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1907 {
1908         /* Assume a 32bit DMA mask. */
1909         ha->flags.enable_64bit_addressing = 0;
1910
1911         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1912                 /* Any upper-dword bits set? */
1913                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1914                     !dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1915                         /* Ok, a 64bit DMA mask is applicable. */
1916                         ha->flags.enable_64bit_addressing = 1;
1917                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1918                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1919                         return;
1920                 }
1921         }
1922
1923         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1924         dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1925 }
1926
1927 static void
1928 qla2x00_enable_intrs(struct qla_hw_data *ha)
1929 {
1930         unsigned long flags = 0;
1931         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1932
1933         spin_lock_irqsave(&ha->hardware_lock, flags);
1934         ha->interrupts_on = 1;
1935         /* enable risc and host interrupts */
1936         wrt_reg_word(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1937         rd_reg_word(&reg->ictrl);
1938         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1939
1940 }
1941
1942 static void
1943 qla2x00_disable_intrs(struct qla_hw_data *ha)
1944 {
1945         unsigned long flags = 0;
1946         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1947
1948         spin_lock_irqsave(&ha->hardware_lock, flags);
1949         ha->interrupts_on = 0;
1950         /* disable risc and host interrupts */
1951         wrt_reg_word(&reg->ictrl, 0);
1952         rd_reg_word(&reg->ictrl);
1953         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1954 }
1955
1956 static void
1957 qla24xx_enable_intrs(struct qla_hw_data *ha)
1958 {
1959         unsigned long flags = 0;
1960         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1961
1962         spin_lock_irqsave(&ha->hardware_lock, flags);
1963         ha->interrupts_on = 1;
1964         wrt_reg_dword(&reg->ictrl, ICRX_EN_RISC_INT);
1965         rd_reg_dword(&reg->ictrl);
1966         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1967 }
1968
1969 static void
1970 qla24xx_disable_intrs(struct qla_hw_data *ha)
1971 {
1972         unsigned long flags = 0;
1973         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1974
1975         if (IS_NOPOLLING_TYPE(ha))
1976                 return;
1977         spin_lock_irqsave(&ha->hardware_lock, flags);
1978         ha->interrupts_on = 0;
1979         wrt_reg_dword(&reg->ictrl, 0);
1980         rd_reg_dword(&reg->ictrl);
1981         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1982 }
1983
1984 static int
1985 qla2x00_iospace_config(struct qla_hw_data *ha)
1986 {
1987         resource_size_t pio;
1988         uint16_t msix;
1989
1990         if (pci_request_selected_regions(ha->pdev, ha->bars,
1991             QLA2XXX_DRIVER_NAME)) {
1992                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1993                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1994                     pci_name(ha->pdev));
1995                 goto iospace_error_exit;
1996         }
1997         if (!(ha->bars & 1))
1998                 goto skip_pio;
1999
2000         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
2001         pio = pci_resource_start(ha->pdev, 0);
2002         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
2003                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2004                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
2005                             "Invalid pci I/O region size (%s).\n",
2006                             pci_name(ha->pdev));
2007                         pio = 0;
2008                 }
2009         } else {
2010                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
2011                     "Region #0 no a PIO resource (%s).\n",
2012                     pci_name(ha->pdev));
2013                 pio = 0;
2014         }
2015         ha->pio_address = pio;
2016         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
2017             "PIO address=%llu.\n",
2018             (unsigned long long)ha->pio_address);
2019
2020 skip_pio:
2021         /* Use MMIO operations for all accesses. */
2022         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2023                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2024                     "Region #1 not an MMIO resource (%s), aborting.\n",
2025                     pci_name(ha->pdev));
2026                 goto iospace_error_exit;
2027         }
2028         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2029                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2030                     "Invalid PCI mem region size (%s), aborting.\n",
2031                     pci_name(ha->pdev));
2032                 goto iospace_error_exit;
2033         }
2034
2035         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2036         if (!ha->iobase) {
2037                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2038                     "Cannot remap MMIO (%s), aborting.\n",
2039                     pci_name(ha->pdev));
2040                 goto iospace_error_exit;
2041         }
2042
2043         /* Determine queue resources */
2044         ha->max_req_queues = ha->max_rsp_queues = 1;
2045         ha->msix_count = QLA_BASE_VECTORS;
2046
2047         /* Check if FW supports MQ or not */
2048         if (!(ha->fw_attributes & BIT_6))
2049                 goto mqiobase_exit;
2050
2051         if (!ql2xmqsupport || !ql2xnvmeenable ||
2052             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2053                 goto mqiobase_exit;
2054
2055         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2056                         pci_resource_len(ha->pdev, 3));
2057         if (ha->mqiobase) {
2058                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2059                     "MQIO Base=%p.\n", ha->mqiobase);
2060                 /* Read MSIX vector size of the board */
2061                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2062                 ha->msix_count = msix + 1;
2063                 /* Max queues are bounded by available msix vectors */
2064                 /* MB interrupt uses 1 vector */
2065                 ha->max_req_queues = ha->msix_count - 1;
2066                 ha->max_rsp_queues = ha->max_req_queues;
2067                 /* Queue pairs is the max value minus the base queue pair */
2068                 ha->max_qpairs = ha->max_rsp_queues - 1;
2069                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2070                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2071
2072                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2073                     "MSI-X vector count: %d.\n", ha->msix_count);
2074         } else
2075                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2076                     "BAR 3 not enabled.\n");
2077
2078 mqiobase_exit:
2079         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2080             "MSIX Count: %d.\n", ha->msix_count);
2081         return (0);
2082
2083 iospace_error_exit:
2084         return (-ENOMEM);
2085 }
2086
2087
2088 static int
2089 qla83xx_iospace_config(struct qla_hw_data *ha)
2090 {
2091         uint16_t msix;
2092
2093         if (pci_request_selected_regions(ha->pdev, ha->bars,
2094             QLA2XXX_DRIVER_NAME)) {
2095                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2096                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2097                     pci_name(ha->pdev));
2098
2099                 goto iospace_error_exit;
2100         }
2101
2102         /* Use MMIO operations for all accesses. */
2103         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2104                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2105                     "Invalid pci I/O region size (%s).\n",
2106                     pci_name(ha->pdev));
2107                 goto iospace_error_exit;
2108         }
2109         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2110                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2111                     "Invalid PCI mem region size (%s), aborting\n",
2112                         pci_name(ha->pdev));
2113                 goto iospace_error_exit;
2114         }
2115
2116         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2117         if (!ha->iobase) {
2118                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2119                     "Cannot remap MMIO (%s), aborting.\n",
2120                     pci_name(ha->pdev));
2121                 goto iospace_error_exit;
2122         }
2123
2124         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2125         /* 83XX 26XX always use MQ type access for queues
2126          * - mbar 2, a.k.a region 4 */
2127         ha->max_req_queues = ha->max_rsp_queues = 1;
2128         ha->msix_count = QLA_BASE_VECTORS;
2129         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2130                         pci_resource_len(ha->pdev, 4));
2131
2132         if (!ha->mqiobase) {
2133                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2134                     "BAR2/region4 not enabled\n");
2135                 goto mqiobase_exit;
2136         }
2137
2138         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2139                         pci_resource_len(ha->pdev, 2));
2140         if (ha->msixbase) {
2141                 /* Read MSIX vector size of the board */
2142                 pci_read_config_word(ha->pdev,
2143                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2144                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2145                 /*
2146                  * By default, driver uses at least two msix vectors
2147                  * (default & rspq)
2148                  */
2149                 if (ql2xmqsupport || ql2xnvmeenable) {
2150                         /* MB interrupt uses 1 vector */
2151                         ha->max_req_queues = ha->msix_count - 1;
2152
2153                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2154                         if (QLA_TGT_MODE_ENABLED())
2155                                 ha->max_req_queues--;
2156
2157                         ha->max_rsp_queues = ha->max_req_queues;
2158
2159                         /* Queue pairs is the max value minus
2160                          * the base queue pair */
2161                         ha->max_qpairs = ha->max_req_queues - 1;
2162                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2163                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2164                 }
2165                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2166                     "MSI-X vector count: %d.\n", ha->msix_count);
2167         } else
2168                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2169                     "BAR 1 not enabled.\n");
2170
2171 mqiobase_exit:
2172         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2173             "MSIX Count: %d.\n", ha->msix_count);
2174         return 0;
2175
2176 iospace_error_exit:
2177         return -ENOMEM;
2178 }
2179
2180 static struct isp_operations qla2100_isp_ops = {
2181         .pci_config             = qla2100_pci_config,
2182         .reset_chip             = qla2x00_reset_chip,
2183         .chip_diag              = qla2x00_chip_diag,
2184         .config_rings           = qla2x00_config_rings,
2185         .reset_adapter          = qla2x00_reset_adapter,
2186         .nvram_config           = qla2x00_nvram_config,
2187         .update_fw_options      = qla2x00_update_fw_options,
2188         .load_risc              = qla2x00_load_risc,
2189         .pci_info_str           = qla2x00_pci_info_str,
2190         .fw_version_str         = qla2x00_fw_version_str,
2191         .intr_handler           = qla2100_intr_handler,
2192         .enable_intrs           = qla2x00_enable_intrs,
2193         .disable_intrs          = qla2x00_disable_intrs,
2194         .abort_command          = qla2x00_abort_command,
2195         .target_reset           = qla2x00_abort_target,
2196         .lun_reset              = qla2x00_lun_reset,
2197         .fabric_login           = qla2x00_login_fabric,
2198         .fabric_logout          = qla2x00_fabric_logout,
2199         .calc_req_entries       = qla2x00_calc_iocbs_32,
2200         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2201         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2202         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2203         .read_nvram             = qla2x00_read_nvram_data,
2204         .write_nvram            = qla2x00_write_nvram_data,
2205         .fw_dump                = qla2100_fw_dump,
2206         .beacon_on              = NULL,
2207         .beacon_off             = NULL,
2208         .beacon_blink           = NULL,
2209         .read_optrom            = qla2x00_read_optrom_data,
2210         .write_optrom           = qla2x00_write_optrom_data,
2211         .get_flash_version      = qla2x00_get_flash_version,
2212         .start_scsi             = qla2x00_start_scsi,
2213         .start_scsi_mq          = NULL,
2214         .abort_isp              = qla2x00_abort_isp,
2215         .iospace_config         = qla2x00_iospace_config,
2216         .initialize_adapter     = qla2x00_initialize_adapter,
2217 };
2218
2219 static struct isp_operations qla2300_isp_ops = {
2220         .pci_config             = qla2300_pci_config,
2221         .reset_chip             = qla2x00_reset_chip,
2222         .chip_diag              = qla2x00_chip_diag,
2223         .config_rings           = qla2x00_config_rings,
2224         .reset_adapter          = qla2x00_reset_adapter,
2225         .nvram_config           = qla2x00_nvram_config,
2226         .update_fw_options      = qla2x00_update_fw_options,
2227         .load_risc              = qla2x00_load_risc,
2228         .pci_info_str           = qla2x00_pci_info_str,
2229         .fw_version_str         = qla2x00_fw_version_str,
2230         .intr_handler           = qla2300_intr_handler,
2231         .enable_intrs           = qla2x00_enable_intrs,
2232         .disable_intrs          = qla2x00_disable_intrs,
2233         .abort_command          = qla2x00_abort_command,
2234         .target_reset           = qla2x00_abort_target,
2235         .lun_reset              = qla2x00_lun_reset,
2236         .fabric_login           = qla2x00_login_fabric,
2237         .fabric_logout          = qla2x00_fabric_logout,
2238         .calc_req_entries       = qla2x00_calc_iocbs_32,
2239         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2240         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2241         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2242         .read_nvram             = qla2x00_read_nvram_data,
2243         .write_nvram            = qla2x00_write_nvram_data,
2244         .fw_dump                = qla2300_fw_dump,
2245         .beacon_on              = qla2x00_beacon_on,
2246         .beacon_off             = qla2x00_beacon_off,
2247         .beacon_blink           = qla2x00_beacon_blink,
2248         .read_optrom            = qla2x00_read_optrom_data,
2249         .write_optrom           = qla2x00_write_optrom_data,
2250         .get_flash_version      = qla2x00_get_flash_version,
2251         .start_scsi             = qla2x00_start_scsi,
2252         .start_scsi_mq          = NULL,
2253         .abort_isp              = qla2x00_abort_isp,
2254         .iospace_config         = qla2x00_iospace_config,
2255         .initialize_adapter     = qla2x00_initialize_adapter,
2256 };
2257
2258 static struct isp_operations qla24xx_isp_ops = {
2259         .pci_config             = qla24xx_pci_config,
2260         .reset_chip             = qla24xx_reset_chip,
2261         .chip_diag              = qla24xx_chip_diag,
2262         .config_rings           = qla24xx_config_rings,
2263         .reset_adapter          = qla24xx_reset_adapter,
2264         .nvram_config           = qla24xx_nvram_config,
2265         .update_fw_options      = qla24xx_update_fw_options,
2266         .load_risc              = qla24xx_load_risc,
2267         .pci_info_str           = qla24xx_pci_info_str,
2268         .fw_version_str         = qla24xx_fw_version_str,
2269         .intr_handler           = qla24xx_intr_handler,
2270         .enable_intrs           = qla24xx_enable_intrs,
2271         .disable_intrs          = qla24xx_disable_intrs,
2272         .abort_command          = qla24xx_abort_command,
2273         .target_reset           = qla24xx_abort_target,
2274         .lun_reset              = qla24xx_lun_reset,
2275         .fabric_login           = qla24xx_login_fabric,
2276         .fabric_logout          = qla24xx_fabric_logout,
2277         .calc_req_entries       = NULL,
2278         .build_iocbs            = NULL,
2279         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2280         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2281         .read_nvram             = qla24xx_read_nvram_data,
2282         .write_nvram            = qla24xx_write_nvram_data,
2283         .fw_dump                = qla24xx_fw_dump,
2284         .beacon_on              = qla24xx_beacon_on,
2285         .beacon_off             = qla24xx_beacon_off,
2286         .beacon_blink           = qla24xx_beacon_blink,
2287         .read_optrom            = qla24xx_read_optrom_data,
2288         .write_optrom           = qla24xx_write_optrom_data,
2289         .get_flash_version      = qla24xx_get_flash_version,
2290         .start_scsi             = qla24xx_start_scsi,
2291         .start_scsi_mq          = NULL,
2292         .abort_isp              = qla2x00_abort_isp,
2293         .iospace_config         = qla2x00_iospace_config,
2294         .initialize_adapter     = qla2x00_initialize_adapter,
2295 };
2296
2297 static struct isp_operations qla25xx_isp_ops = {
2298         .pci_config             = qla25xx_pci_config,
2299         .reset_chip             = qla24xx_reset_chip,
2300         .chip_diag              = qla24xx_chip_diag,
2301         .config_rings           = qla24xx_config_rings,
2302         .reset_adapter          = qla24xx_reset_adapter,
2303         .nvram_config           = qla24xx_nvram_config,
2304         .update_fw_options      = qla24xx_update_fw_options,
2305         .load_risc              = qla24xx_load_risc,
2306         .pci_info_str           = qla24xx_pci_info_str,
2307         .fw_version_str         = qla24xx_fw_version_str,
2308         .intr_handler           = qla24xx_intr_handler,
2309         .enable_intrs           = qla24xx_enable_intrs,
2310         .disable_intrs          = qla24xx_disable_intrs,
2311         .abort_command          = qla24xx_abort_command,
2312         .target_reset           = qla24xx_abort_target,
2313         .lun_reset              = qla24xx_lun_reset,
2314         .fabric_login           = qla24xx_login_fabric,
2315         .fabric_logout          = qla24xx_fabric_logout,
2316         .calc_req_entries       = NULL,
2317         .build_iocbs            = NULL,
2318         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2319         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2320         .read_nvram             = qla25xx_read_nvram_data,
2321         .write_nvram            = qla25xx_write_nvram_data,
2322         .fw_dump                = qla25xx_fw_dump,
2323         .beacon_on              = qla24xx_beacon_on,
2324         .beacon_off             = qla24xx_beacon_off,
2325         .beacon_blink           = qla24xx_beacon_blink,
2326         .read_optrom            = qla25xx_read_optrom_data,
2327         .write_optrom           = qla24xx_write_optrom_data,
2328         .get_flash_version      = qla24xx_get_flash_version,
2329         .start_scsi             = qla24xx_dif_start_scsi,
2330         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2331         .abort_isp              = qla2x00_abort_isp,
2332         .iospace_config         = qla2x00_iospace_config,
2333         .initialize_adapter     = qla2x00_initialize_adapter,
2334 };
2335
2336 static struct isp_operations qla81xx_isp_ops = {
2337         .pci_config             = qla25xx_pci_config,
2338         .reset_chip             = qla24xx_reset_chip,
2339         .chip_diag              = qla24xx_chip_diag,
2340         .config_rings           = qla24xx_config_rings,
2341         .reset_adapter          = qla24xx_reset_adapter,
2342         .nvram_config           = qla81xx_nvram_config,
2343         .update_fw_options      = qla24xx_update_fw_options,
2344         .load_risc              = qla81xx_load_risc,
2345         .pci_info_str           = qla24xx_pci_info_str,
2346         .fw_version_str         = qla24xx_fw_version_str,
2347         .intr_handler           = qla24xx_intr_handler,
2348         .enable_intrs           = qla24xx_enable_intrs,
2349         .disable_intrs          = qla24xx_disable_intrs,
2350         .abort_command          = qla24xx_abort_command,
2351         .target_reset           = qla24xx_abort_target,
2352         .lun_reset              = qla24xx_lun_reset,
2353         .fabric_login           = qla24xx_login_fabric,
2354         .fabric_logout          = qla24xx_fabric_logout,
2355         .calc_req_entries       = NULL,
2356         .build_iocbs            = NULL,
2357         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2358         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2359         .read_nvram             = NULL,
2360         .write_nvram            = NULL,
2361         .fw_dump                = qla81xx_fw_dump,
2362         .beacon_on              = qla24xx_beacon_on,
2363         .beacon_off             = qla24xx_beacon_off,
2364         .beacon_blink           = qla83xx_beacon_blink,
2365         .read_optrom            = qla25xx_read_optrom_data,
2366         .write_optrom           = qla24xx_write_optrom_data,
2367         .get_flash_version      = qla24xx_get_flash_version,
2368         .start_scsi             = qla24xx_dif_start_scsi,
2369         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2370         .abort_isp              = qla2x00_abort_isp,
2371         .iospace_config         = qla2x00_iospace_config,
2372         .initialize_adapter     = qla2x00_initialize_adapter,
2373 };
2374
2375 static struct isp_operations qla82xx_isp_ops = {
2376         .pci_config             = qla82xx_pci_config,
2377         .reset_chip             = qla82xx_reset_chip,
2378         .chip_diag              = qla24xx_chip_diag,
2379         .config_rings           = qla82xx_config_rings,
2380         .reset_adapter          = qla24xx_reset_adapter,
2381         .nvram_config           = qla81xx_nvram_config,
2382         .update_fw_options      = qla24xx_update_fw_options,
2383         .load_risc              = qla82xx_load_risc,
2384         .pci_info_str           = qla24xx_pci_info_str,
2385         .fw_version_str         = qla24xx_fw_version_str,
2386         .intr_handler           = qla82xx_intr_handler,
2387         .enable_intrs           = qla82xx_enable_intrs,
2388         .disable_intrs          = qla82xx_disable_intrs,
2389         .abort_command          = qla24xx_abort_command,
2390         .target_reset           = qla24xx_abort_target,
2391         .lun_reset              = qla24xx_lun_reset,
2392         .fabric_login           = qla24xx_login_fabric,
2393         .fabric_logout          = qla24xx_fabric_logout,
2394         .calc_req_entries       = NULL,
2395         .build_iocbs            = NULL,
2396         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2397         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2398         .read_nvram             = qla24xx_read_nvram_data,
2399         .write_nvram            = qla24xx_write_nvram_data,
2400         .fw_dump                = qla82xx_fw_dump,
2401         .beacon_on              = qla82xx_beacon_on,
2402         .beacon_off             = qla82xx_beacon_off,
2403         .beacon_blink           = NULL,
2404         .read_optrom            = qla82xx_read_optrom_data,
2405         .write_optrom           = qla82xx_write_optrom_data,
2406         .get_flash_version      = qla82xx_get_flash_version,
2407         .start_scsi             = qla82xx_start_scsi,
2408         .start_scsi_mq          = NULL,
2409         .abort_isp              = qla82xx_abort_isp,
2410         .iospace_config         = qla82xx_iospace_config,
2411         .initialize_adapter     = qla2x00_initialize_adapter,
2412 };
2413
2414 static struct isp_operations qla8044_isp_ops = {
2415         .pci_config             = qla82xx_pci_config,
2416         .reset_chip             = qla82xx_reset_chip,
2417         .chip_diag              = qla24xx_chip_diag,
2418         .config_rings           = qla82xx_config_rings,
2419         .reset_adapter          = qla24xx_reset_adapter,
2420         .nvram_config           = qla81xx_nvram_config,
2421         .update_fw_options      = qla24xx_update_fw_options,
2422         .load_risc              = qla82xx_load_risc,
2423         .pci_info_str           = qla24xx_pci_info_str,
2424         .fw_version_str         = qla24xx_fw_version_str,
2425         .intr_handler           = qla8044_intr_handler,
2426         .enable_intrs           = qla82xx_enable_intrs,
2427         .disable_intrs          = qla82xx_disable_intrs,
2428         .abort_command          = qla24xx_abort_command,
2429         .target_reset           = qla24xx_abort_target,
2430         .lun_reset              = qla24xx_lun_reset,
2431         .fabric_login           = qla24xx_login_fabric,
2432         .fabric_logout          = qla24xx_fabric_logout,
2433         .calc_req_entries       = NULL,
2434         .build_iocbs            = NULL,
2435         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2436         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2437         .read_nvram             = NULL,
2438         .write_nvram            = NULL,
2439         .fw_dump                = qla8044_fw_dump,
2440         .beacon_on              = qla82xx_beacon_on,
2441         .beacon_off             = qla82xx_beacon_off,
2442         .beacon_blink           = NULL,
2443         .read_optrom            = qla8044_read_optrom_data,
2444         .write_optrom           = qla8044_write_optrom_data,
2445         .get_flash_version      = qla82xx_get_flash_version,
2446         .start_scsi             = qla82xx_start_scsi,
2447         .start_scsi_mq          = NULL,
2448         .abort_isp              = qla8044_abort_isp,
2449         .iospace_config         = qla82xx_iospace_config,
2450         .initialize_adapter     = qla2x00_initialize_adapter,
2451 };
2452
2453 static struct isp_operations qla83xx_isp_ops = {
2454         .pci_config             = qla25xx_pci_config,
2455         .reset_chip             = qla24xx_reset_chip,
2456         .chip_diag              = qla24xx_chip_diag,
2457         .config_rings           = qla24xx_config_rings,
2458         .reset_adapter          = qla24xx_reset_adapter,
2459         .nvram_config           = qla81xx_nvram_config,
2460         .update_fw_options      = qla24xx_update_fw_options,
2461         .load_risc              = qla81xx_load_risc,
2462         .pci_info_str           = qla24xx_pci_info_str,
2463         .fw_version_str         = qla24xx_fw_version_str,
2464         .intr_handler           = qla24xx_intr_handler,
2465         .enable_intrs           = qla24xx_enable_intrs,
2466         .disable_intrs          = qla24xx_disable_intrs,
2467         .abort_command          = qla24xx_abort_command,
2468         .target_reset           = qla24xx_abort_target,
2469         .lun_reset              = qla24xx_lun_reset,
2470         .fabric_login           = qla24xx_login_fabric,
2471         .fabric_logout          = qla24xx_fabric_logout,
2472         .calc_req_entries       = NULL,
2473         .build_iocbs            = NULL,
2474         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2475         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2476         .read_nvram             = NULL,
2477         .write_nvram            = NULL,
2478         .fw_dump                = qla83xx_fw_dump,
2479         .beacon_on              = qla24xx_beacon_on,
2480         .beacon_off             = qla24xx_beacon_off,
2481         .beacon_blink           = qla83xx_beacon_blink,
2482         .read_optrom            = qla25xx_read_optrom_data,
2483         .write_optrom           = qla24xx_write_optrom_data,
2484         .get_flash_version      = qla24xx_get_flash_version,
2485         .start_scsi             = qla24xx_dif_start_scsi,
2486         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2487         .abort_isp              = qla2x00_abort_isp,
2488         .iospace_config         = qla83xx_iospace_config,
2489         .initialize_adapter     = qla2x00_initialize_adapter,
2490 };
2491
2492 static struct isp_operations qlafx00_isp_ops = {
2493         .pci_config             = qlafx00_pci_config,
2494         .reset_chip             = qlafx00_soft_reset,
2495         .chip_diag              = qlafx00_chip_diag,
2496         .config_rings           = qlafx00_config_rings,
2497         .reset_adapter          = qlafx00_soft_reset,
2498         .nvram_config           = NULL,
2499         .update_fw_options      = NULL,
2500         .load_risc              = NULL,
2501         .pci_info_str           = qlafx00_pci_info_str,
2502         .fw_version_str         = qlafx00_fw_version_str,
2503         .intr_handler           = qlafx00_intr_handler,
2504         .enable_intrs           = qlafx00_enable_intrs,
2505         .disable_intrs          = qlafx00_disable_intrs,
2506         .abort_command          = qla24xx_async_abort_command,
2507         .target_reset           = qlafx00_abort_target,
2508         .lun_reset              = qlafx00_lun_reset,
2509         .fabric_login           = NULL,
2510         .fabric_logout          = NULL,
2511         .calc_req_entries       = NULL,
2512         .build_iocbs            = NULL,
2513         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2514         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2515         .read_nvram             = qla24xx_read_nvram_data,
2516         .write_nvram            = qla24xx_write_nvram_data,
2517         .fw_dump                = NULL,
2518         .beacon_on              = qla24xx_beacon_on,
2519         .beacon_off             = qla24xx_beacon_off,
2520         .beacon_blink           = NULL,
2521         .read_optrom            = qla24xx_read_optrom_data,
2522         .write_optrom           = qla24xx_write_optrom_data,
2523         .get_flash_version      = qla24xx_get_flash_version,
2524         .start_scsi             = qlafx00_start_scsi,
2525         .start_scsi_mq          = NULL,
2526         .abort_isp              = qlafx00_abort_isp,
2527         .iospace_config         = qlafx00_iospace_config,
2528         .initialize_adapter     = qlafx00_initialize_adapter,
2529 };
2530
2531 static struct isp_operations qla27xx_isp_ops = {
2532         .pci_config             = qla25xx_pci_config,
2533         .reset_chip             = qla24xx_reset_chip,
2534         .chip_diag              = qla24xx_chip_diag,
2535         .config_rings           = qla24xx_config_rings,
2536         .reset_adapter          = qla24xx_reset_adapter,
2537         .nvram_config           = qla81xx_nvram_config,
2538         .update_fw_options      = qla24xx_update_fw_options,
2539         .load_risc              = qla81xx_load_risc,
2540         .pci_info_str           = qla24xx_pci_info_str,
2541         .fw_version_str         = qla24xx_fw_version_str,
2542         .intr_handler           = qla24xx_intr_handler,
2543         .enable_intrs           = qla24xx_enable_intrs,
2544         .disable_intrs          = qla24xx_disable_intrs,
2545         .abort_command          = qla24xx_abort_command,
2546         .target_reset           = qla24xx_abort_target,
2547         .lun_reset              = qla24xx_lun_reset,
2548         .fabric_login           = qla24xx_login_fabric,
2549         .fabric_logout          = qla24xx_fabric_logout,
2550         .calc_req_entries       = NULL,
2551         .build_iocbs            = NULL,
2552         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2553         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2554         .read_nvram             = NULL,
2555         .write_nvram            = NULL,
2556         .fw_dump                = qla27xx_fwdump,
2557         .mpi_fw_dump            = qla27xx_mpi_fwdump,
2558         .beacon_on              = qla24xx_beacon_on,
2559         .beacon_off             = qla24xx_beacon_off,
2560         .beacon_blink           = qla83xx_beacon_blink,
2561         .read_optrom            = qla25xx_read_optrom_data,
2562         .write_optrom           = qla24xx_write_optrom_data,
2563         .get_flash_version      = qla24xx_get_flash_version,
2564         .start_scsi             = qla24xx_dif_start_scsi,
2565         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2566         .abort_isp              = qla2x00_abort_isp,
2567         .iospace_config         = qla83xx_iospace_config,
2568         .initialize_adapter     = qla2x00_initialize_adapter,
2569 };
2570
2571 static inline void
2572 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2573 {
2574         ha->device_type = DT_EXTENDED_IDS;
2575         switch (ha->pdev->device) {
2576         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2577                 ha->isp_type |= DT_ISP2100;
2578                 ha->device_type &= ~DT_EXTENDED_IDS;
2579                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2580                 break;
2581         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2582                 ha->isp_type |= DT_ISP2200;
2583                 ha->device_type &= ~DT_EXTENDED_IDS;
2584                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2585                 break;
2586         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2587                 ha->isp_type |= DT_ISP2300;
2588                 ha->device_type |= DT_ZIO_SUPPORTED;
2589                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2590                 break;
2591         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2592                 ha->isp_type |= DT_ISP2312;
2593                 ha->device_type |= DT_ZIO_SUPPORTED;
2594                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2595                 break;
2596         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2597                 ha->isp_type |= DT_ISP2322;
2598                 ha->device_type |= DT_ZIO_SUPPORTED;
2599                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2600                     ha->pdev->subsystem_device == 0x0170)
2601                         ha->device_type |= DT_OEM_001;
2602                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2603                 break;
2604         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2605                 ha->isp_type |= DT_ISP6312;
2606                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2607                 break;
2608         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2609                 ha->isp_type |= DT_ISP6322;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2611                 break;
2612         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2613                 ha->isp_type |= DT_ISP2422;
2614                 ha->device_type |= DT_ZIO_SUPPORTED;
2615                 ha->device_type |= DT_FWI2;
2616                 ha->device_type |= DT_IIDMA;
2617                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2618                 break;
2619         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2620                 ha->isp_type |= DT_ISP2432;
2621                 ha->device_type |= DT_ZIO_SUPPORTED;
2622                 ha->device_type |= DT_FWI2;
2623                 ha->device_type |= DT_IIDMA;
2624                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2625                 break;
2626         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2627                 ha->isp_type |= DT_ISP8432;
2628                 ha->device_type |= DT_ZIO_SUPPORTED;
2629                 ha->device_type |= DT_FWI2;
2630                 ha->device_type |= DT_IIDMA;
2631                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2632                 break;
2633         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2634                 ha->isp_type |= DT_ISP5422;
2635                 ha->device_type |= DT_FWI2;
2636                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2637                 break;
2638         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2639                 ha->isp_type |= DT_ISP5432;
2640                 ha->device_type |= DT_FWI2;
2641                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2642                 break;
2643         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2644                 ha->isp_type |= DT_ISP2532;
2645                 ha->device_type |= DT_ZIO_SUPPORTED;
2646                 ha->device_type |= DT_FWI2;
2647                 ha->device_type |= DT_IIDMA;
2648                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649                 break;
2650         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2651                 ha->isp_type |= DT_ISP8001;
2652                 ha->device_type |= DT_ZIO_SUPPORTED;
2653                 ha->device_type |= DT_FWI2;
2654                 ha->device_type |= DT_IIDMA;
2655                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2656                 break;
2657         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2658                 ha->isp_type |= DT_ISP8021;
2659                 ha->device_type |= DT_ZIO_SUPPORTED;
2660                 ha->device_type |= DT_FWI2;
2661                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2662                 /* Initialize 82XX ISP flags */
2663                 qla82xx_init_flags(ha);
2664                 break;
2665          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2666                 ha->isp_type |= DT_ISP8044;
2667                 ha->device_type |= DT_ZIO_SUPPORTED;
2668                 ha->device_type |= DT_FWI2;
2669                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2670                 /* Initialize 82XX ISP flags */
2671                 qla82xx_init_flags(ha);
2672                 break;
2673         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2674                 ha->isp_type |= DT_ISP2031;
2675                 ha->device_type |= DT_ZIO_SUPPORTED;
2676                 ha->device_type |= DT_FWI2;
2677                 ha->device_type |= DT_IIDMA;
2678                 ha->device_type |= DT_T10_PI;
2679                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2680                 break;
2681         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2682                 ha->isp_type |= DT_ISP8031;
2683                 ha->device_type |= DT_ZIO_SUPPORTED;
2684                 ha->device_type |= DT_FWI2;
2685                 ha->device_type |= DT_IIDMA;
2686                 ha->device_type |= DT_T10_PI;
2687                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2688                 break;
2689         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2690                 ha->isp_type |= DT_ISPFX00;
2691                 break;
2692         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2693                 ha->isp_type |= DT_ISP2071;
2694                 ha->device_type |= DT_ZIO_SUPPORTED;
2695                 ha->device_type |= DT_FWI2;
2696                 ha->device_type |= DT_IIDMA;
2697                 ha->device_type |= DT_T10_PI;
2698                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2699                 break;
2700         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2701                 ha->isp_type |= DT_ISP2271;
2702                 ha->device_type |= DT_ZIO_SUPPORTED;
2703                 ha->device_type |= DT_FWI2;
2704                 ha->device_type |= DT_IIDMA;
2705                 ha->device_type |= DT_T10_PI;
2706                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2707                 break;
2708         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2709                 ha->isp_type |= DT_ISP2261;
2710                 ha->device_type |= DT_ZIO_SUPPORTED;
2711                 ha->device_type |= DT_FWI2;
2712                 ha->device_type |= DT_IIDMA;
2713                 ha->device_type |= DT_T10_PI;
2714                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2715                 break;
2716         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2717         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2718                 ha->isp_type |= DT_ISP2081;
2719                 ha->device_type |= DT_ZIO_SUPPORTED;
2720                 ha->device_type |= DT_FWI2;
2721                 ha->device_type |= DT_IIDMA;
2722                 ha->device_type |= DT_T10_PI;
2723                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2724                 break;
2725         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2726         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2727                 ha->isp_type |= DT_ISP2281;
2728                 ha->device_type |= DT_ZIO_SUPPORTED;
2729                 ha->device_type |= DT_FWI2;
2730                 ha->device_type |= DT_IIDMA;
2731                 ha->device_type |= DT_T10_PI;
2732                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2733                 break;
2734         }
2735
2736         if (IS_QLA82XX(ha))
2737                 ha->port_no = ha->portnum & 1;
2738         else {
2739                 /* Get adapter physical port no from interrupt pin register. */
2740                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2741                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2742                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2743                         ha->port_no--;
2744                 else
2745                         ha->port_no = !(ha->port_no & 1);
2746         }
2747
2748         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2749             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2750             ha->device_type, ha->port_no, ha->fw_srisc_address);
2751 }
2752
2753 static void
2754 qla2xxx_scan_start(struct Scsi_Host *shost)
2755 {
2756         scsi_qla_host_t *vha = shost_priv(shost);
2757
2758         if (vha->hw->flags.running_gold_fw)
2759                 return;
2760
2761         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2762         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2763         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2764         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2765 }
2766
2767 static int
2768 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2769 {
2770         scsi_qla_host_t *vha = shost_priv(shost);
2771
2772         if (test_bit(UNLOADING, &vha->dpc_flags))
2773                 return 1;
2774         if (!vha->host)
2775                 return 1;
2776         if (time > vha->hw->loop_reset_delay * HZ)
2777                 return 1;
2778
2779         return atomic_read(&vha->loop_state) == LOOP_READY;
2780 }
2781
2782 static void qla_heartbeat_work_fn(struct work_struct *work)
2783 {
2784         struct qla_hw_data *ha = container_of(work,
2785                 struct qla_hw_data, heartbeat_work);
2786         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2787
2788         if (!ha->flags.mbox_busy && base_vha->flags.init_done)
2789                 qla_no_op_mb(base_vha);
2790 }
2791
2792 static void qla2x00_iocb_work_fn(struct work_struct *work)
2793 {
2794         struct scsi_qla_host *vha = container_of(work,
2795                 struct scsi_qla_host, iocb_work);
2796         struct qla_hw_data *ha = vha->hw;
2797         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2798         int i = 2;
2799         unsigned long flags;
2800
2801         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2802                 return;
2803
2804         while (!list_empty(&vha->work_list) && i > 0) {
2805                 qla2x00_do_work(vha);
2806                 i--;
2807         }
2808
2809         spin_lock_irqsave(&vha->work_lock, flags);
2810         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2811         spin_unlock_irqrestore(&vha->work_lock, flags);
2812 }
2813
2814 /*
2815  * PCI driver interface
2816  */
2817 static int
2818 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2819 {
2820         int     ret = -ENODEV;
2821         struct Scsi_Host *host;
2822         scsi_qla_host_t *base_vha = NULL;
2823         struct qla_hw_data *ha;
2824         char pci_info[30];
2825         char fw_str[30], wq_name[30];
2826         struct scsi_host_template *sht;
2827         int bars, mem_only = 0;
2828         uint16_t req_length = 0, rsp_length = 0;
2829         struct req_que *req = NULL;
2830         struct rsp_que *rsp = NULL;
2831         int i;
2832
2833         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2834         sht = &qla2xxx_driver_template;
2835         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2836             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2837             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2838             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2839             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2840             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2841             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2842             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2843             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2844             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2845             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2846             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2847             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2848             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2849             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2850             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2851             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2852             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2853             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2854                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2855                 mem_only = 1;
2856                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2857                     "Mem only adapter.\n");
2858         }
2859         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2860             "Bars=%d.\n", bars);
2861
2862         if (mem_only) {
2863                 if (pci_enable_device_mem(pdev))
2864                         return ret;
2865         } else {
2866                 if (pci_enable_device(pdev))
2867                         return ret;
2868         }
2869
2870         if (is_kdump_kernel()) {
2871                 ql2xmqsupport = 0;
2872                 ql2xallocfwdump = 0;
2873         }
2874
2875         /* This may fail but that's ok */
2876         pci_enable_pcie_error_reporting(pdev);
2877
2878         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2879         if (!ha) {
2880                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2881                     "Unable to allocate memory for ha.\n");
2882                 goto disable_device;
2883         }
2884         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2885             "Memory allocated for ha=%p.\n", ha);
2886         ha->pdev = pdev;
2887         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2888         spin_lock_init(&ha->tgt.q_full_lock);
2889         spin_lock_init(&ha->tgt.sess_lock);
2890         spin_lock_init(&ha->tgt.atio_lock);
2891
2892         spin_lock_init(&ha->sadb_lock);
2893         INIT_LIST_HEAD(&ha->sadb_tx_index_list);
2894         INIT_LIST_HEAD(&ha->sadb_rx_index_list);
2895
2896         spin_lock_init(&ha->sadb_fp_lock);
2897
2898         if (qla_edif_sadb_build_free_pool(ha)) {
2899                 kfree(ha);
2900                 goto  disable_device;
2901         }
2902
2903         atomic_set(&ha->nvme_active_aen_cnt, 0);
2904
2905         /* Clear our data area */
2906         ha->bars = bars;
2907         ha->mem_only = mem_only;
2908         spin_lock_init(&ha->hardware_lock);
2909         spin_lock_init(&ha->vport_slock);
2910         mutex_init(&ha->selflogin_lock);
2911         mutex_init(&ha->optrom_mutex);
2912
2913         /* Set ISP-type information. */
2914         qla2x00_set_isp_flags(ha);
2915
2916         /* Set EEH reset type to fundamental if required by hba */
2917         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2918             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2919                 pdev->needs_freset = 1;
2920
2921         ha->prev_topology = 0;
2922         ha->init_cb_size = sizeof(init_cb_t);
2923         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2924         ha->optrom_size = OPTROM_SIZE_2300;
2925         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2926         atomic_set(&ha->num_pend_mbx_stage1, 0);
2927         atomic_set(&ha->num_pend_mbx_stage2, 0);
2928         atomic_set(&ha->num_pend_mbx_stage3, 0);
2929         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2930         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2931
2932         /* Assign ISP specific operations. */
2933         if (IS_QLA2100(ha)) {
2934                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2935                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2936                 req_length = REQUEST_ENTRY_CNT_2100;
2937                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2938                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2939                 ha->gid_list_info_size = 4;
2940                 ha->flash_conf_off = ~0;
2941                 ha->flash_data_off = ~0;
2942                 ha->nvram_conf_off = ~0;
2943                 ha->nvram_data_off = ~0;
2944                 ha->isp_ops = &qla2100_isp_ops;
2945         } else if (IS_QLA2200(ha)) {
2946                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2947                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2948                 req_length = REQUEST_ENTRY_CNT_2200;
2949                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2950                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2951                 ha->gid_list_info_size = 4;
2952                 ha->flash_conf_off = ~0;
2953                 ha->flash_data_off = ~0;
2954                 ha->nvram_conf_off = ~0;
2955                 ha->nvram_data_off = ~0;
2956                 ha->isp_ops = &qla2100_isp_ops;
2957         } else if (IS_QLA23XX(ha)) {
2958                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2959                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2960                 req_length = REQUEST_ENTRY_CNT_2200;
2961                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2962                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2963                 ha->gid_list_info_size = 6;
2964                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2965                         ha->optrom_size = OPTROM_SIZE_2322;
2966                 ha->flash_conf_off = ~0;
2967                 ha->flash_data_off = ~0;
2968                 ha->nvram_conf_off = ~0;
2969                 ha->nvram_data_off = ~0;
2970                 ha->isp_ops = &qla2300_isp_ops;
2971         } else if (IS_QLA24XX_TYPE(ha)) {
2972                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2973                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2974                 req_length = REQUEST_ENTRY_CNT_24XX;
2975                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2976                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2977                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2978                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2979                 ha->gid_list_info_size = 8;
2980                 ha->optrom_size = OPTROM_SIZE_24XX;
2981                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2982                 ha->isp_ops = &qla24xx_isp_ops;
2983                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2984                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2985                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2986                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2987         } else if (IS_QLA25XX(ha)) {
2988                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2989                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2990                 req_length = REQUEST_ENTRY_CNT_24XX;
2991                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2992                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2993                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2994                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2995                 ha->gid_list_info_size = 8;
2996                 ha->optrom_size = OPTROM_SIZE_25XX;
2997                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2998                 ha->isp_ops = &qla25xx_isp_ops;
2999                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3000                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3001                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3002                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3003         } else if (IS_QLA81XX(ha)) {
3004                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3005                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3006                 req_length = REQUEST_ENTRY_CNT_24XX;
3007                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3008                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3009                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3010                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3011                 ha->gid_list_info_size = 8;
3012                 ha->optrom_size = OPTROM_SIZE_81XX;
3013                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3014                 ha->isp_ops = &qla81xx_isp_ops;
3015                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3016                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3017                 ha->nvram_conf_off = ~0;
3018                 ha->nvram_data_off = ~0;
3019         } else if (IS_QLA82XX(ha)) {
3020                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3021                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3022                 req_length = REQUEST_ENTRY_CNT_82XX;
3023                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
3024                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3025                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3026                 ha->gid_list_info_size = 8;
3027                 ha->optrom_size = OPTROM_SIZE_82XX;
3028                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3029                 ha->isp_ops = &qla82xx_isp_ops;
3030                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3031                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3032                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3033                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3034         } else if (IS_QLA8044(ha)) {
3035                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3036                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3037                 req_length = REQUEST_ENTRY_CNT_82XX;
3038                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
3039                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3040                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3041                 ha->gid_list_info_size = 8;
3042                 ha->optrom_size = OPTROM_SIZE_83XX;
3043                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3044                 ha->isp_ops = &qla8044_isp_ops;
3045                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3046                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3047                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3048                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3049         } else if (IS_QLA83XX(ha)) {
3050                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3051                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3052                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3053                 req_length = REQUEST_ENTRY_CNT_83XX;
3054                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3055                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3056                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3057                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3058                 ha->gid_list_info_size = 8;
3059                 ha->optrom_size = OPTROM_SIZE_83XX;
3060                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3061                 ha->isp_ops = &qla83xx_isp_ops;
3062                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3063                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3064                 ha->nvram_conf_off = ~0;
3065                 ha->nvram_data_off = ~0;
3066         }  else if (IS_QLAFX00(ha)) {
3067                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3068                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3069                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3070                 req_length = REQUEST_ENTRY_CNT_FX00;
3071                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3072                 ha->isp_ops = &qlafx00_isp_ops;
3073                 ha->port_down_retry_count = 30; /* default value */
3074                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3075                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3076                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3077                 ha->mr.fw_hbt_en = 1;
3078                 ha->mr.host_info_resend = false;
3079                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3080         } else if (IS_QLA27XX(ha)) {
3081                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3082                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3083                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3084                 req_length = REQUEST_ENTRY_CNT_83XX;
3085                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3086                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3087                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3088                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3089                 ha->gid_list_info_size = 8;
3090                 ha->optrom_size = OPTROM_SIZE_83XX;
3091                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3092                 ha->isp_ops = &qla27xx_isp_ops;
3093                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3094                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3095                 ha->nvram_conf_off = ~0;
3096                 ha->nvram_data_off = ~0;
3097         } else if (IS_QLA28XX(ha)) {
3098                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3099                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3100                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3101                 req_length = REQUEST_ENTRY_CNT_83XX;
3102                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3103                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3104                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3105                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3106                 ha->gid_list_info_size = 8;
3107                 ha->optrom_size = OPTROM_SIZE_28XX;
3108                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3109                 ha->isp_ops = &qla27xx_isp_ops;
3110                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3111                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3112                 ha->nvram_conf_off = ~0;
3113                 ha->nvram_data_off = ~0;
3114         }
3115
3116         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3117             "mbx_count=%d, req_length=%d, "
3118             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3119             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3120             "max_fibre_devices=%d.\n",
3121             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3122             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3123             ha->nvram_npiv_size, ha->max_fibre_devices);
3124         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3125             "isp_ops=%p, flash_conf_off=%d, "
3126             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3127             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3128             ha->nvram_conf_off, ha->nvram_data_off);
3129
3130         /* Configure PCI I/O space */
3131         ret = ha->isp_ops->iospace_config(ha);
3132         if (ret)
3133                 goto iospace_config_failed;
3134
3135         ql_log_pci(ql_log_info, pdev, 0x001d,
3136             "Found an ISP%04X irq %d iobase 0x%p.\n",
3137             pdev->device, pdev->irq, ha->iobase);
3138         mutex_init(&ha->vport_lock);
3139         mutex_init(&ha->mq_lock);
3140         init_completion(&ha->mbx_cmd_comp);
3141         complete(&ha->mbx_cmd_comp);
3142         init_completion(&ha->mbx_intr_comp);
3143         init_completion(&ha->dcbx_comp);
3144         init_completion(&ha->lb_portup_comp);
3145
3146         set_bit(0, (unsigned long *) ha->vp_idx_map);
3147
3148         qla2x00_config_dma_addressing(ha);
3149         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3150             "64 Bit addressing is %s.\n",
3151             ha->flags.enable_64bit_addressing ? "enable" :
3152             "disable");
3153         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3154         if (ret) {
3155                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3156                     "Failed to allocate memory for adapter, aborting.\n");
3157
3158                 goto probe_hw_failed;
3159         }
3160
3161         req->max_q_depth = MAX_Q_DEPTH;
3162         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3163                 req->max_q_depth = ql2xmaxqdepth;
3164
3165
3166         base_vha = qla2x00_create_host(sht, ha);
3167         if (!base_vha) {
3168                 ret = -ENOMEM;
3169                 goto probe_hw_failed;
3170         }
3171
3172         pci_set_drvdata(pdev, base_vha);
3173         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3174
3175         host = base_vha->host;
3176         base_vha->req = req;
3177         if (IS_QLA2XXX_MIDTYPE(ha))
3178                 base_vha->mgmt_svr_loop_id =
3179                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3180         else
3181                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3182                                                 base_vha->vp_idx;
3183
3184         /* Setup fcport template structure. */
3185         ha->mr.fcport.vha = base_vha;
3186         ha->mr.fcport.port_type = FCT_UNKNOWN;
3187         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3188         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3189         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3190         ha->mr.fcport.scan_state = 1;
3191
3192         qla2xxx_reset_stats(host, QLA2XX_HW_ERROR | QLA2XX_SHT_LNK_DWN |
3193                             QLA2XX_INT_ERR | QLA2XX_CMD_TIMEOUT |
3194                             QLA2XX_RESET_CMD_ERR | QLA2XX_TGT_SHT_LNK_DOWN);
3195
3196         /* Set the SG table size based on ISP type */
3197         if (!IS_FWI2_CAPABLE(ha)) {
3198                 if (IS_QLA2100(ha))
3199                         host->sg_tablesize = 32;
3200         } else {
3201                 if (!IS_QLA82XX(ha))
3202                         host->sg_tablesize = QLA_SG_ALL;
3203         }
3204         host->max_id = ha->max_fibre_devices;
3205         host->cmd_per_lun = 3;
3206         host->unique_id = host->host_no;
3207         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3208                 host->max_cmd_len = 32;
3209         else
3210                 host->max_cmd_len = MAX_CMDSZ;
3211         host->max_channel = MAX_BUSES - 1;
3212         /* Older HBAs support only 16-bit LUNs */
3213         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3214             ql2xmaxlun > 0xffff)
3215                 host->max_lun = 0xffff;
3216         else
3217                 host->max_lun = ql2xmaxlun;
3218         host->transportt = qla2xxx_transport_template;
3219         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3220
3221         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3222             "max_id=%d this_id=%d "
3223             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3224             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3225             host->this_id, host->cmd_per_lun, host->unique_id,
3226             host->max_cmd_len, host->max_channel, host->max_lun,
3227             host->transportt, sht->vendor_id);
3228
3229         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3230         INIT_WORK(&ha->heartbeat_work, qla_heartbeat_work_fn);
3231
3232         /* Set up the irqs */
3233         ret = qla2x00_request_irqs(ha, rsp);
3234         if (ret)
3235                 goto probe_failed;
3236
3237         /* Alloc arrays of request and response ring ptrs */
3238         ret = qla2x00_alloc_queues(ha, req, rsp);
3239         if (ret) {
3240                 ql_log(ql_log_fatal, base_vha, 0x003d,
3241                     "Failed to allocate memory for queue pointers..."
3242                     "aborting.\n");
3243                 ret = -ENODEV;
3244                 goto probe_failed;
3245         }
3246
3247         if (ha->mqenable) {
3248                 /* number of hardware queues supported by blk/scsi-mq*/
3249                 host->nr_hw_queues = ha->max_qpairs;
3250
3251                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3252                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3253         } else {
3254                 if (ql2xnvmeenable) {
3255                         host->nr_hw_queues = ha->max_qpairs;
3256                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3257                             "FC-NVMe support is enabled, HW queues=%d\n",
3258                             host->nr_hw_queues);
3259                 } else {
3260                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3261                             "blk/scsi-mq disabled.\n");
3262                 }
3263         }
3264
3265         qlt_probe_one_stage1(base_vha, ha);
3266
3267         pci_save_state(pdev);
3268
3269         /* Assign back pointers */
3270         rsp->req = req;
3271         req->rsp = rsp;
3272
3273         if (IS_QLAFX00(ha)) {
3274                 ha->rsp_q_map[0] = rsp;
3275                 ha->req_q_map[0] = req;
3276                 set_bit(0, ha->req_qid_map);
3277                 set_bit(0, ha->rsp_qid_map);
3278         }
3279
3280         /* FWI2-capable only. */
3281         req->req_q_in = &ha->iobase->isp24.req_q_in;
3282         req->req_q_out = &ha->iobase->isp24.req_q_out;
3283         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3284         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3285         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3286             IS_QLA28XX(ha)) {
3287                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3288                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3289                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3290                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3291         }
3292
3293         if (IS_QLAFX00(ha)) {
3294                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3295                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3296                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3297                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3298         }
3299
3300         if (IS_P3P_TYPE(ha)) {
3301                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3302                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3303                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3304         }
3305
3306         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3307             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3308             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3309         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3310             "req->req_q_in=%p req->req_q_out=%p "
3311             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3312             req->req_q_in, req->req_q_out,
3313             rsp->rsp_q_in, rsp->rsp_q_out);
3314         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3315             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3316             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3317         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3318             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3319             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3320
3321         ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3322         if (unlikely(!ha->wq)) {
3323                 ret = -ENOMEM;
3324                 goto probe_failed;
3325         }
3326
3327         if (ha->isp_ops->initialize_adapter(base_vha)) {
3328                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3329                     "Failed to initialize adapter - Adapter flags %x.\n",
3330                     base_vha->device_flags);
3331
3332                 if (IS_QLA82XX(ha)) {
3333                         qla82xx_idc_lock(ha);
3334                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3335                                 QLA8XXX_DEV_FAILED);
3336                         qla82xx_idc_unlock(ha);
3337                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3338                             "HW State: FAILED.\n");
3339                 } else if (IS_QLA8044(ha)) {
3340                         qla8044_idc_lock(ha);
3341                         qla8044_wr_direct(base_vha,
3342                                 QLA8044_CRB_DEV_STATE_INDEX,
3343                                 QLA8XXX_DEV_FAILED);
3344                         qla8044_idc_unlock(ha);
3345                         ql_log(ql_log_fatal, base_vha, 0x0150,
3346                             "HW State: FAILED.\n");
3347                 }
3348
3349                 ret = -ENODEV;
3350                 goto probe_failed;
3351         }
3352
3353         if (IS_QLAFX00(ha))
3354                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3355         else
3356                 host->can_queue = req->num_outstanding_cmds - 10;
3357
3358         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3359             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3360             host->can_queue, base_vha->req,
3361             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3362
3363         if (ha->mqenable) {
3364                 bool startit = false;
3365
3366                 if (QLA_TGT_MODE_ENABLED())
3367                         startit = false;
3368
3369                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3370                         startit = true;
3371
3372                 /* Create start of day qpairs for Block MQ */
3373                 for (i = 0; i < ha->max_qpairs; i++)
3374                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3375         }
3376         qla_init_iocb_limit(base_vha);
3377
3378         if (ha->flags.running_gold_fw)
3379                 goto skip_dpc;
3380
3381         /*
3382          * Startup the kernel thread for this host adapter
3383          */
3384         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3385             "%s_dpc", base_vha->host_str);
3386         if (IS_ERR(ha->dpc_thread)) {
3387                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3388                     "Failed to start DPC thread.\n");
3389                 ret = PTR_ERR(ha->dpc_thread);
3390                 ha->dpc_thread = NULL;
3391                 goto probe_failed;
3392         }
3393         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3394             "DPC thread started successfully.\n");
3395
3396         /*
3397          * If we're not coming up in initiator mode, we might sit for
3398          * a while without waking up the dpc thread, which leads to a
3399          * stuck process warning.  So just kick the dpc once here and
3400          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3401          */
3402         qla2xxx_wake_dpc(base_vha);
3403
3404         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3405
3406         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3407                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3408                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3409                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3410
3411                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3412                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3413                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3414                 INIT_WORK(&ha->idc_state_handler,
3415                     qla83xx_idc_state_handler_work);
3416                 INIT_WORK(&ha->nic_core_unrecoverable,
3417                     qla83xx_nic_core_unrecoverable_work);
3418         }
3419
3420 skip_dpc:
3421         list_add_tail(&base_vha->list, &ha->vp_list);
3422         base_vha->host->irq = ha->pdev->irq;
3423
3424         /* Initialized the timer */
3425         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3426         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3427             "Started qla2x00_timer with "
3428             "interval=%d.\n", WATCH_INTERVAL);
3429         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3430             "Detected hba at address=%p.\n",
3431             ha);
3432
3433         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3434                 if (ha->fw_attributes & BIT_4) {
3435                         int prot = 0, guard;
3436
3437                         base_vha->flags.difdix_supported = 1;
3438                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3439                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3440                         if (ql2xenabledif == 1)
3441                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3442                         if (ql2xprotmask)
3443                                 scsi_host_set_prot(host, ql2xprotmask);
3444                         else
3445                                 scsi_host_set_prot(host,
3446                                     prot | SHOST_DIF_TYPE1_PROTECTION
3447                                     | SHOST_DIF_TYPE2_PROTECTION
3448                                     | SHOST_DIF_TYPE3_PROTECTION
3449                                     | SHOST_DIX_TYPE1_PROTECTION
3450                                     | SHOST_DIX_TYPE2_PROTECTION
3451                                     | SHOST_DIX_TYPE3_PROTECTION);
3452
3453                         guard = SHOST_DIX_GUARD_CRC;
3454
3455                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3456                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3457                                 guard |= SHOST_DIX_GUARD_IP;
3458
3459                         if (ql2xprotguard)
3460                                 scsi_host_set_guard(host, ql2xprotguard);
3461                         else
3462                                 scsi_host_set_guard(host, guard);
3463                 } else
3464                         base_vha->flags.difdix_supported = 0;
3465         }
3466
3467         ha->isp_ops->enable_intrs(ha);
3468
3469         if (IS_QLAFX00(ha)) {
3470                 ret = qlafx00_fx_disc(base_vha,
3471                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3472                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3473                     QLA_SG_ALL : 128;
3474         }
3475
3476         ret = scsi_add_host(host, &pdev->dev);
3477         if (ret)
3478                 goto probe_failed;
3479
3480         base_vha->flags.init_done = 1;
3481         base_vha->flags.online = 1;
3482         ha->prev_minidump_failed = 0;
3483
3484         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3485             "Init done and hba is online.\n");
3486
3487         if (qla_ini_mode_enabled(base_vha) ||
3488                 qla_dual_mode_enabled(base_vha))
3489                 scsi_scan_host(host);
3490         else
3491                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3492                         "skipping scsi_scan_host() for non-initiator port\n");
3493
3494         qla2x00_alloc_sysfs_attr(base_vha);
3495
3496         if (IS_QLAFX00(ha)) {
3497                 ret = qlafx00_fx_disc(base_vha,
3498                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3499
3500                 /* Register system information */
3501                 ret =  qlafx00_fx_disc(base_vha,
3502                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3503         }
3504
3505         qla2x00_init_host_attr(base_vha);
3506
3507         qla2x00_dfs_setup(base_vha);
3508
3509         ql_log(ql_log_info, base_vha, 0x00fb,
3510             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3511         ql_log(ql_log_info, base_vha, 0x00fc,
3512             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3513             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3514                                                        sizeof(pci_info)),
3515             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3516             base_vha->host_no,
3517             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3518
3519         qlt_add_target(ha, base_vha);
3520
3521         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3522
3523         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3524                 return -ENODEV;
3525
3526         return 0;
3527
3528 probe_failed:
3529         qla_enode_stop(base_vha);
3530         qla_edb_stop(base_vha);
3531         if (base_vha->gnl.l) {
3532                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3533                                 base_vha->gnl.l, base_vha->gnl.ldma);
3534                 base_vha->gnl.l = NULL;
3535         }
3536
3537         if (base_vha->timer_active)
3538                 qla2x00_stop_timer(base_vha);
3539         base_vha->flags.online = 0;
3540         if (ha->dpc_thread) {
3541                 struct task_struct *t = ha->dpc_thread;
3542
3543                 ha->dpc_thread = NULL;
3544                 kthread_stop(t);
3545         }
3546
3547         qla2x00_free_device(base_vha);
3548         scsi_host_put(base_vha->host);
3549         /*
3550          * Need to NULL out local req/rsp after
3551          * qla2x00_free_device => qla2x00_free_queues frees
3552          * what these are pointing to. Or else we'll
3553          * fall over below in qla2x00_free_req/rsp_que.
3554          */
3555         req = NULL;
3556         rsp = NULL;
3557
3558 probe_hw_failed:
3559         qla2x00_mem_free(ha);
3560         qla2x00_free_req_que(ha, req);
3561         qla2x00_free_rsp_que(ha, rsp);
3562         qla2x00_clear_drv_active(ha);
3563
3564 iospace_config_failed:
3565         if (IS_P3P_TYPE(ha)) {
3566                 if (!ha->nx_pcibase)
3567                         iounmap((device_reg_t *)ha->nx_pcibase);
3568                 if (!ql2xdbwr)
3569                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3570         } else {
3571                 if (ha->iobase)
3572                         iounmap(ha->iobase);
3573                 if (ha->cregbase)
3574                         iounmap(ha->cregbase);
3575         }
3576         pci_release_selected_regions(ha->pdev, ha->bars);
3577         kfree(ha);
3578
3579 disable_device:
3580         pci_disable_device(pdev);
3581         return ret;
3582 }
3583
3584 static void __qla_set_remove_flag(scsi_qla_host_t *base_vha)
3585 {
3586         scsi_qla_host_t *vp;
3587         unsigned long flags;
3588         struct qla_hw_data *ha;
3589
3590         if (!base_vha)
3591                 return;
3592
3593         ha = base_vha->hw;
3594
3595         spin_lock_irqsave(&ha->vport_slock, flags);
3596         list_for_each_entry(vp, &ha->vp_list, list)
3597                 set_bit(PFLG_DRIVER_REMOVING, &vp->pci_flags);
3598
3599         /*
3600          * Indicate device removal to prevent future board_disable
3601          * and wait until any pending board_disable has completed.
3602          */
3603         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3604         spin_unlock_irqrestore(&ha->vport_slock, flags);
3605 }
3606
3607 static void
3608 qla2x00_shutdown(struct pci_dev *pdev)
3609 {
3610         scsi_qla_host_t *vha;
3611         struct qla_hw_data  *ha;
3612
3613         vha = pci_get_drvdata(pdev);
3614         ha = vha->hw;
3615
3616         ql_log(ql_log_info, vha, 0xfffa,
3617                 "Adapter shutdown\n");
3618
3619         /*
3620          * Prevent future board_disable and wait
3621          * until any pending board_disable has completed.
3622          */
3623         __qla_set_remove_flag(vha);
3624         cancel_work_sync(&ha->board_disable);
3625
3626         if (!atomic_read(&pdev->enable_cnt))
3627                 return;
3628
3629         /* Notify ISPFX00 firmware */
3630         if (IS_QLAFX00(ha))
3631                 qlafx00_driver_shutdown(vha, 20);
3632
3633         /* Turn-off FCE trace */
3634         if (ha->flags.fce_enabled) {
3635                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3636                 ha->flags.fce_enabled = 0;
3637         }
3638
3639         /* Turn-off EFT trace */
3640         if (ha->eft)
3641                 qla2x00_disable_eft_trace(vha);
3642
3643         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3644             IS_QLA28XX(ha)) {
3645                 if (ha->flags.fw_started)
3646                         qla2x00_abort_isp_cleanup(vha);
3647         } else {
3648                 /* Stop currently executing firmware. */
3649                 qla2x00_try_to_stop_firmware(vha);
3650         }
3651
3652         /* Disable timer */
3653         if (vha->timer_active)
3654                 qla2x00_stop_timer(vha);
3655
3656         /* Turn adapter off line */
3657         vha->flags.online = 0;
3658
3659         /* turn-off interrupts on the card */
3660         if (ha->interrupts_on) {
3661                 vha->flags.init_done = 0;
3662                 ha->isp_ops->disable_intrs(ha);
3663         }
3664
3665         qla2x00_free_irqs(vha);
3666
3667         qla2x00_free_fw_dump(ha);
3668
3669         pci_disable_device(pdev);
3670         ql_log(ql_log_info, vha, 0xfffe,
3671                 "Adapter shutdown successfully.\n");
3672 }
3673
3674 /* Deletes all the virtual ports for a given ha */
3675 static void
3676 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3677 {
3678         scsi_qla_host_t *vha;
3679         unsigned long flags;
3680
3681         mutex_lock(&ha->vport_lock);
3682         while (ha->cur_vport_count) {
3683                 spin_lock_irqsave(&ha->vport_slock, flags);
3684
3685                 BUG_ON(base_vha->list.next == &ha->vp_list);
3686                 /* This assumes first entry in ha->vp_list is always base vha */
3687                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3688                 scsi_host_get(vha->host);
3689
3690                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3691                 mutex_unlock(&ha->vport_lock);
3692
3693                 qla_nvme_delete(vha);
3694
3695                 fc_vport_terminate(vha->fc_vport);
3696                 scsi_host_put(vha->host);
3697
3698                 mutex_lock(&ha->vport_lock);
3699         }
3700         mutex_unlock(&ha->vport_lock);
3701 }
3702
3703 /* Stops all deferred work threads */
3704 static void
3705 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3706 {
3707         /* Cancel all work and destroy DPC workqueues */
3708         if (ha->dpc_lp_wq) {
3709                 cancel_work_sync(&ha->idc_aen);
3710                 destroy_workqueue(ha->dpc_lp_wq);
3711                 ha->dpc_lp_wq = NULL;
3712         }
3713
3714         if (ha->dpc_hp_wq) {
3715                 cancel_work_sync(&ha->nic_core_reset);
3716                 cancel_work_sync(&ha->idc_state_handler);
3717                 cancel_work_sync(&ha->nic_core_unrecoverable);
3718                 destroy_workqueue(ha->dpc_hp_wq);
3719                 ha->dpc_hp_wq = NULL;
3720         }
3721
3722         /* Kill the kernel thread for this host */
3723         if (ha->dpc_thread) {
3724                 struct task_struct *t = ha->dpc_thread;
3725
3726                 /*
3727                  * qla2xxx_wake_dpc checks for ->dpc_thread
3728                  * so we need to zero it out.
3729                  */
3730                 ha->dpc_thread = NULL;
3731                 kthread_stop(t);
3732         }
3733 }
3734
3735 static void
3736 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3737 {
3738         if (IS_QLA82XX(ha)) {
3739
3740                 iounmap((device_reg_t *)ha->nx_pcibase);
3741                 if (!ql2xdbwr)
3742                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3743         } else {
3744                 if (ha->iobase)
3745                         iounmap(ha->iobase);
3746
3747                 if (ha->cregbase)
3748                         iounmap(ha->cregbase);
3749
3750                 if (ha->mqiobase)
3751                         iounmap(ha->mqiobase);
3752
3753                 if (ha->msixbase)
3754                         iounmap(ha->msixbase);
3755         }
3756 }
3757
3758 static void
3759 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3760 {
3761         if (IS_QLA8044(ha)) {
3762                 qla8044_idc_lock(ha);
3763                 qla8044_clear_drv_active(ha);
3764                 qla8044_idc_unlock(ha);
3765         } else if (IS_QLA82XX(ha)) {
3766                 qla82xx_idc_lock(ha);
3767                 qla82xx_clear_drv_active(ha);
3768                 qla82xx_idc_unlock(ha);
3769         }
3770 }
3771
3772 static void
3773 qla2x00_remove_one(struct pci_dev *pdev)
3774 {
3775         scsi_qla_host_t *base_vha;
3776         struct qla_hw_data  *ha;
3777
3778         base_vha = pci_get_drvdata(pdev);
3779         ha = base_vha->hw;
3780         ql_log(ql_log_info, base_vha, 0xb079,
3781             "Removing driver\n");
3782         __qla_set_remove_flag(base_vha);
3783         cancel_work_sync(&ha->board_disable);
3784
3785         /*
3786          * If the PCI device is disabled then there was a PCI-disconnect and
3787          * qla2x00_disable_board_on_pci_error has taken care of most of the
3788          * resources.
3789          */
3790         if (!atomic_read(&pdev->enable_cnt)) {
3791                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3792                     base_vha->gnl.l, base_vha->gnl.ldma);
3793                 base_vha->gnl.l = NULL;
3794                 scsi_host_put(base_vha->host);
3795                 kfree(ha);
3796                 pci_set_drvdata(pdev, NULL);
3797                 return;
3798         }
3799         qla2x00_wait_for_hba_ready(base_vha);
3800
3801         /*
3802          * if UNLOADING flag is already set, then continue unload,
3803          * where it was set first.
3804          */
3805         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3806                 return;
3807
3808         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3809             IS_QLA28XX(ha)) {
3810                 if (ha->flags.fw_started)
3811                         qla2x00_abort_isp_cleanup(base_vha);
3812         } else if (!IS_QLAFX00(ha)) {
3813                 if (IS_QLA8031(ha)) {
3814                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3815                             "Clearing fcoe driver presence.\n");
3816                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3817                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3818                                     "Error while clearing DRV-Presence.\n");
3819                 }
3820
3821                 qla2x00_try_to_stop_firmware(base_vha);
3822         }
3823
3824         qla2x00_wait_for_sess_deletion(base_vha);
3825
3826         qla_nvme_delete(base_vha);
3827
3828         dma_free_coherent(&ha->pdev->dev,
3829                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3830
3831         base_vha->gnl.l = NULL;
3832         qla_enode_stop(base_vha);
3833         qla_edb_stop(base_vha);
3834
3835         vfree(base_vha->scan.l);
3836
3837         if (IS_QLAFX00(ha))
3838                 qlafx00_driver_shutdown(base_vha, 20);
3839
3840         qla2x00_delete_all_vps(ha, base_vha);
3841
3842         qla2x00_dfs_remove(base_vha);
3843
3844         qla84xx_put_chip(base_vha);
3845
3846         /* Disable timer */
3847         if (base_vha->timer_active)
3848                 qla2x00_stop_timer(base_vha);
3849
3850         base_vha->flags.online = 0;
3851
3852         /* free DMA memory */
3853         if (ha->exlogin_buf)
3854                 qla2x00_free_exlogin_buffer(ha);
3855
3856         /* free DMA memory */
3857         if (ha->exchoffld_buf)
3858                 qla2x00_free_exchoffld_buffer(ha);
3859
3860         qla2x00_destroy_deferred_work(ha);
3861
3862         qlt_remove_target(ha, base_vha);
3863
3864         qla2x00_free_sysfs_attr(base_vha, true);
3865
3866         fc_remove_host(base_vha->host);
3867
3868         scsi_remove_host(base_vha->host);
3869
3870         qla2x00_free_device(base_vha);
3871
3872         qla2x00_clear_drv_active(ha);
3873
3874         scsi_host_put(base_vha->host);
3875
3876         qla2x00_unmap_iobases(ha);
3877
3878         pci_release_selected_regions(ha->pdev, ha->bars);
3879         kfree(ha);
3880
3881         pci_disable_pcie_error_reporting(pdev);
3882
3883         pci_disable_device(pdev);
3884 }
3885
3886 static inline void
3887 qla24xx_free_purex_list(struct purex_list *list)
3888 {
3889         struct purex_item *item, *next;
3890         ulong flags;
3891
3892         spin_lock_irqsave(&list->lock, flags);
3893         list_for_each_entry_safe(item, next, &list->head, list) {
3894                 list_del(&item->list);
3895                 if (item == &item->vha->default_item)
3896                         continue;
3897                 kfree(item);
3898         }
3899         spin_unlock_irqrestore(&list->lock, flags);
3900 }
3901
3902 static void
3903 qla2x00_free_device(scsi_qla_host_t *vha)
3904 {
3905         struct qla_hw_data *ha = vha->hw;
3906
3907         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3908
3909         /* Disable timer */
3910         if (vha->timer_active)
3911                 qla2x00_stop_timer(vha);
3912
3913         qla25xx_delete_queues(vha);
3914         vha->flags.online = 0;
3915
3916         /* turn-off interrupts on the card */
3917         if (ha->interrupts_on) {
3918                 vha->flags.init_done = 0;
3919                 ha->isp_ops->disable_intrs(ha);
3920         }
3921
3922         qla2x00_free_fcports(vha);
3923
3924         qla2x00_free_irqs(vha);
3925
3926         /* Flush the work queue and remove it */
3927         if (ha->wq) {
3928                 flush_workqueue(ha->wq);
3929                 destroy_workqueue(ha->wq);
3930                 ha->wq = NULL;
3931         }
3932
3933
3934         qla24xx_free_purex_list(&vha->purex_list);
3935
3936         qla2x00_mem_free(ha);
3937
3938         qla82xx_md_free(vha);
3939
3940         qla_edif_sadb_release_free_pool(ha);
3941         qla_edif_sadb_release(ha);
3942
3943         qla2x00_free_queues(ha);
3944 }
3945
3946 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3947 {
3948         fc_port_t *fcport, *tfcport;
3949
3950         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3951                 qla2x00_free_fcport(fcport);
3952 }
3953
3954 static inline void
3955 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport)
3956 {
3957         int now;
3958
3959         if (!fcport->rport)
3960                 return;
3961
3962         if (fcport->rport) {
3963                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3964                     "%s %8phN. rport %p roles %x\n",
3965                     __func__, fcport->port_name, fcport->rport,
3966                     fcport->rport->roles);
3967                 fc_remote_port_delete(fcport->rport);
3968         }
3969         qlt_do_generation_tick(vha, &now);
3970 }
3971
3972 /*
3973  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3974  *
3975  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3976  *
3977  * Return: None.
3978  *
3979  * Context:
3980  */
3981 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3982     int do_login)
3983 {
3984         if (IS_QLAFX00(vha->hw)) {
3985                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3986                 qla2x00_schedule_rport_del(vha, fcport);
3987                 return;
3988         }
3989
3990         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3991             vha->vp_idx == fcport->vha->vp_idx) {
3992                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3993                 qla2x00_schedule_rport_del(vha, fcport);
3994         }
3995
3996         /*
3997          * We may need to retry the login, so don't change the state of the
3998          * port but do the retries.
3999          */
4000         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
4001                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
4002
4003         if (!do_login)
4004                 return;
4005
4006         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4007 }
4008
4009 void
4010 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha)
4011 {
4012         fc_port_t *fcport;
4013
4014         ql_dbg(ql_dbg_disc, vha, 0x20f1,
4015             "Mark all dev lost\n");
4016
4017         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4018                 if (fcport->loop_id != FC_NO_LOOP_ID &&
4019                     (fcport->flags & FCF_FCP2_DEVICE) &&
4020                     fcport->port_type == FCT_TARGET &&
4021                     !qla2x00_reset_active(vha)) {
4022                         ql_dbg(ql_dbg_disc, vha, 0x211a,
4023                                "Delaying session delete for FCP2 flags 0x%x port_type = 0x%x port_id=%06x %phC",
4024                                fcport->flags, fcport->port_type,
4025                                fcport->d_id.b24, fcport->port_name);
4026                         continue;
4027                 }
4028                 fcport->scan_state = 0;
4029                 qlt_schedule_sess_for_deletion(fcport);
4030         }
4031 }
4032
4033 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
4034 {
4035         int i;
4036
4037         if (IS_FWI2_CAPABLE(ha))
4038                 return;
4039
4040         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
4041                 set_bit(i, ha->loop_id_map);
4042         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
4043         set_bit(BROADCAST, ha->loop_id_map);
4044 }
4045
4046 /*
4047 * qla2x00_mem_alloc
4048 *      Allocates adapter memory.
4049 *
4050 * Returns:
4051 *      0  = success.
4052 *      !0  = failure.
4053 */
4054 static int
4055 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
4056         struct req_que **req, struct rsp_que **rsp)
4057 {
4058         char    name[16];
4059         int rc;
4060
4061         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
4062                 &ha->init_cb_dma, GFP_KERNEL);
4063         if (!ha->init_cb)
4064                 goto fail;
4065
4066         rc = btree_init32(&ha->host_map);
4067         if (rc)
4068                 goto fail_free_init_cb;
4069
4070         if (qlt_mem_alloc(ha) < 0)
4071                 goto fail_free_btree;
4072
4073         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
4074                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
4075         if (!ha->gid_list)
4076                 goto fail_free_tgt_mem;
4077
4078         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
4079         if (!ha->srb_mempool)
4080                 goto fail_free_gid_list;
4081
4082         if (IS_P3P_TYPE(ha) || IS_QLA27XX(ha) || (ql2xsecenable && IS_QLA28XX(ha))) {
4083                 /* Allocate cache for CT6 Ctx. */
4084                 if (!ctx_cachep) {
4085                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4086                                 sizeof(struct ct6_dsd), 0,
4087                                 SLAB_HWCACHE_ALIGN, NULL);
4088                         if (!ctx_cachep)
4089                                 goto fail_free_srb_mempool;
4090                 }
4091                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4092                         ctx_cachep);
4093                 if (!ha->ctx_mempool)
4094                         goto fail_free_srb_mempool;
4095                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4096                     "ctx_cachep=%p ctx_mempool=%p.\n",
4097                     ctx_cachep, ha->ctx_mempool);
4098         }
4099
4100         /* Get memory for cached NVRAM */
4101         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4102         if (!ha->nvram)
4103                 goto fail_free_ctx_mempool;
4104
4105         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4106                 ha->pdev->device);
4107         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4108                 DMA_POOL_SIZE, 8, 0);
4109         if (!ha->s_dma_pool)
4110                 goto fail_free_nvram;
4111
4112         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4113             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4114             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4115
4116         if (IS_P3P_TYPE(ha) || ql2xenabledif || (IS_QLA28XX(ha) && ql2xsecenable)) {
4117                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4118                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4119                 if (!ha->dl_dma_pool) {
4120                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4121                             "Failed to allocate memory for dl_dma_pool.\n");
4122                         goto fail_s_dma_pool;
4123                 }
4124
4125                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4126                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4127                 if (!ha->fcp_cmnd_dma_pool) {
4128                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4129                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4130                         goto fail_dl_dma_pool;
4131                 }
4132
4133                 if (ql2xenabledif) {
4134                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4135                         struct dsd_dma *dsd, *nxt;
4136                         uint i;
4137                         /* Creata a DMA pool of buffers for DIF bundling */
4138                         ha->dif_bundl_pool = dma_pool_create(name,
4139                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4140                         if (!ha->dif_bundl_pool) {
4141                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4142                                     "%s: failed create dif_bundl_pool\n",
4143                                     __func__);
4144                                 goto fail_dif_bundl_dma_pool;
4145                         }
4146
4147                         INIT_LIST_HEAD(&ha->pool.good.head);
4148                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4149                         ha->pool.good.count = 0;
4150                         ha->pool.unusable.count = 0;
4151                         for (i = 0; i < 128; i++) {
4152                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4153                                 if (!dsd) {
4154                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4155                                             0xe0ee, "%s: failed alloc dsd\n",
4156                                             __func__);
4157                                         return -ENOMEM;
4158                                 }
4159                                 ha->dif_bundle_kallocs++;
4160
4161                                 dsd->dsd_addr = dma_pool_alloc(
4162                                     ha->dif_bundl_pool, GFP_ATOMIC,
4163                                     &dsd->dsd_list_dma);
4164                                 if (!dsd->dsd_addr) {
4165                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4166                                             0xe0ee,
4167                                             "%s: failed alloc ->dsd_addr\n",
4168                                             __func__);
4169                                         kfree(dsd);
4170                                         ha->dif_bundle_kallocs--;
4171                                         continue;
4172                                 }
4173                                 ha->dif_bundle_dma_allocs++;
4174
4175                                 /*
4176                                  * if DMA buffer crosses 4G boundary,
4177                                  * put it on bad list
4178                                  */
4179                                 if (MSD(dsd->dsd_list_dma) ^
4180                                     MSD(dsd->dsd_list_dma + bufsize)) {
4181                                         list_add_tail(&dsd->list,
4182                                             &ha->pool.unusable.head);
4183                                         ha->pool.unusable.count++;
4184                                 } else {
4185                                         list_add_tail(&dsd->list,
4186                                             &ha->pool.good.head);
4187                                         ha->pool.good.count++;
4188                                 }
4189                         }
4190
4191                         /* return the good ones back to the pool */
4192                         list_for_each_entry_safe(dsd, nxt,
4193                             &ha->pool.good.head, list) {
4194                                 list_del(&dsd->list);
4195                                 dma_pool_free(ha->dif_bundl_pool,
4196                                     dsd->dsd_addr, dsd->dsd_list_dma);
4197                                 ha->dif_bundle_dma_allocs--;
4198                                 kfree(dsd);
4199                                 ha->dif_bundle_kallocs--;
4200                         }
4201
4202                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4203                             "%s: dif dma pool (good=%u unusable=%u)\n",
4204                             __func__, ha->pool.good.count,
4205                             ha->pool.unusable.count);
4206                 }
4207
4208                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4209                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4210                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4211                     ha->dif_bundl_pool);
4212         }
4213
4214         /* Allocate memory for SNS commands */
4215         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4216         /* Get consistent memory allocated for SNS commands */
4217                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4218                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4219                 if (!ha->sns_cmd)
4220                         goto fail_dma_pool;
4221                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4222                     "sns_cmd: %p.\n", ha->sns_cmd);
4223         } else {
4224         /* Get consistent memory allocated for MS IOCB */
4225                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4226                         &ha->ms_iocb_dma);
4227                 if (!ha->ms_iocb)
4228                         goto fail_dma_pool;
4229         /* Get consistent memory allocated for CT SNS commands */
4230                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4231                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4232                 if (!ha->ct_sns)
4233                         goto fail_free_ms_iocb;
4234                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4235                     "ms_iocb=%p ct_sns=%p.\n",
4236                     ha->ms_iocb, ha->ct_sns);
4237         }
4238
4239         /* Allocate memory for request ring */
4240         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4241         if (!*req) {
4242                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4243                     "Failed to allocate memory for req.\n");
4244                 goto fail_req;
4245         }
4246         (*req)->length = req_len;
4247         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4248                 ((*req)->length + 1) * sizeof(request_t),
4249                 &(*req)->dma, GFP_KERNEL);
4250         if (!(*req)->ring) {
4251                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4252                     "Failed to allocate memory for req_ring.\n");
4253                 goto fail_req_ring;
4254         }
4255         /* Allocate memory for response ring */
4256         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4257         if (!*rsp) {
4258                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4259                     "Failed to allocate memory for rsp.\n");
4260                 goto fail_rsp;
4261         }
4262         (*rsp)->hw = ha;
4263         (*rsp)->length = rsp_len;
4264         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4265                 ((*rsp)->length + 1) * sizeof(response_t),
4266                 &(*rsp)->dma, GFP_KERNEL);
4267         if (!(*rsp)->ring) {
4268                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4269                     "Failed to allocate memory for rsp_ring.\n");
4270                 goto fail_rsp_ring;
4271         }
4272         (*req)->rsp = *rsp;
4273         (*rsp)->req = *req;
4274         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4275             "req=%p req->length=%d req->ring=%p rsp=%p "
4276             "rsp->length=%d rsp->ring=%p.\n",
4277             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4278             (*rsp)->ring);
4279         /* Allocate memory for NVRAM data for vports */
4280         if (ha->nvram_npiv_size) {
4281                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4282                                         sizeof(struct qla_npiv_entry),
4283                                         GFP_KERNEL);
4284                 if (!ha->npiv_info) {
4285                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4286                             "Failed to allocate memory for npiv_info.\n");
4287                         goto fail_npiv_info;
4288                 }
4289         } else
4290                 ha->npiv_info = NULL;
4291
4292         /* Get consistent memory allocated for EX-INIT-CB. */
4293         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4294             IS_QLA28XX(ha)) {
4295                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4296                     &ha->ex_init_cb_dma);
4297                 if (!ha->ex_init_cb)
4298                         goto fail_ex_init_cb;
4299                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4300                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4301         }
4302
4303         /* Get consistent memory allocated for Special Features-CB. */
4304         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4305                 ha->sf_init_cb = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL,
4306                                                 &ha->sf_init_cb_dma);
4307                 if (!ha->sf_init_cb)
4308                         goto fail_sf_init_cb;
4309                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199,
4310                            "sf_init_cb=%p.\n", ha->sf_init_cb);
4311         }
4312
4313         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4314
4315         /* Get consistent memory allocated for Async Port-Database. */
4316         if (!IS_FWI2_CAPABLE(ha)) {
4317                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4318                         &ha->async_pd_dma);
4319                 if (!ha->async_pd)
4320                         goto fail_async_pd;
4321                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4322                     "async_pd=%p.\n", ha->async_pd);
4323         }
4324
4325         INIT_LIST_HEAD(&ha->vp_list);
4326
4327         /* Allocate memory for our loop_id bitmap */
4328         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4329                                   sizeof(long),
4330                                   GFP_KERNEL);
4331         if (!ha->loop_id_map)
4332                 goto fail_loop_id_map;
4333         else {
4334                 qla2x00_set_reserved_loop_ids(ha);
4335                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4336                     "loop_id_map=%p.\n", ha->loop_id_map);
4337         }
4338
4339         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4340             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4341         if (!ha->sfp_data) {
4342                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4343                     "Unable to allocate memory for SFP read-data.\n");
4344                 goto fail_sfp_data;
4345         }
4346
4347         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4348             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4349             GFP_KERNEL);
4350         if (!ha->flt) {
4351                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4352                     "Unable to allocate memory for FLT.\n");
4353                 goto fail_flt_buffer;
4354         }
4355
4356         /* allocate the purex dma pool */
4357         ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4358             ELS_MAX_PAYLOAD, 8, 0);
4359
4360         if (!ha->purex_dma_pool) {
4361                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4362                     "Unable to allocate purex_dma_pool.\n");
4363                 goto fail_flt;
4364         }
4365
4366         ha->elsrej.size = sizeof(struct fc_els_ls_rjt) + 16;
4367         ha->elsrej.c = dma_alloc_coherent(&ha->pdev->dev,
4368             ha->elsrej.size, &ha->elsrej.cdma, GFP_KERNEL);
4369
4370         if (!ha->elsrej.c) {
4371                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0xffff,
4372                     "Alloc failed for els reject cmd.\n");
4373                 goto fail_elsrej;
4374         }
4375         ha->elsrej.c->er_cmd = ELS_LS_RJT;
4376         ha->elsrej.c->er_reason = ELS_RJT_LOGIC;
4377         ha->elsrej.c->er_explan = ELS_EXPL_UNAB_DATA;
4378         return 0;
4379
4380 fail_elsrej:
4381         dma_pool_destroy(ha->purex_dma_pool);
4382 fail_flt:
4383         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4384             ha->flt, ha->flt_dma);
4385
4386 fail_flt_buffer:
4387         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4388             ha->sfp_data, ha->sfp_data_dma);
4389 fail_sfp_data:
4390         kfree(ha->loop_id_map);
4391 fail_loop_id_map:
4392         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4393 fail_async_pd:
4394         dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma);
4395 fail_sf_init_cb:
4396         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4397 fail_ex_init_cb:
4398         kfree(ha->npiv_info);
4399 fail_npiv_info:
4400         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4401                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4402         (*rsp)->ring = NULL;
4403         (*rsp)->dma = 0;
4404 fail_rsp_ring:
4405         kfree(*rsp);
4406         *rsp = NULL;
4407 fail_rsp:
4408         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4409                 sizeof(request_t), (*req)->ring, (*req)->dma);
4410         (*req)->ring = NULL;
4411         (*req)->dma = 0;
4412 fail_req_ring:
4413         kfree(*req);
4414         *req = NULL;
4415 fail_req:
4416         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4417                 ha->ct_sns, ha->ct_sns_dma);
4418         ha->ct_sns = NULL;
4419         ha->ct_sns_dma = 0;
4420 fail_free_ms_iocb:
4421         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4422         ha->ms_iocb = NULL;
4423         ha->ms_iocb_dma = 0;
4424
4425         if (ha->sns_cmd)
4426                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4427                     ha->sns_cmd, ha->sns_cmd_dma);
4428 fail_dma_pool:
4429         if (ql2xenabledif) {
4430                 struct dsd_dma *dsd, *nxt;
4431
4432                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4433                     list) {
4434                         list_del(&dsd->list);
4435                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4436                             dsd->dsd_list_dma);
4437                         ha->dif_bundle_dma_allocs--;
4438                         kfree(dsd);
4439                         ha->dif_bundle_kallocs--;
4440                         ha->pool.unusable.count--;
4441                 }
4442                 dma_pool_destroy(ha->dif_bundl_pool);
4443                 ha->dif_bundl_pool = NULL;
4444         }
4445
4446 fail_dif_bundl_dma_pool:
4447         if (IS_QLA82XX(ha) || ql2xenabledif) {
4448                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4449                 ha->fcp_cmnd_dma_pool = NULL;
4450         }
4451 fail_dl_dma_pool:
4452         if (IS_QLA82XX(ha) || ql2xenabledif) {
4453                 dma_pool_destroy(ha->dl_dma_pool);
4454                 ha->dl_dma_pool = NULL;
4455         }
4456 fail_s_dma_pool:
4457         dma_pool_destroy(ha->s_dma_pool);
4458         ha->s_dma_pool = NULL;
4459 fail_free_nvram:
4460         kfree(ha->nvram);
4461         ha->nvram = NULL;
4462 fail_free_ctx_mempool:
4463         mempool_destroy(ha->ctx_mempool);
4464         ha->ctx_mempool = NULL;
4465 fail_free_srb_mempool:
4466         mempool_destroy(ha->srb_mempool);
4467         ha->srb_mempool = NULL;
4468 fail_free_gid_list:
4469         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4470         ha->gid_list,
4471         ha->gid_list_dma);
4472         ha->gid_list = NULL;
4473         ha->gid_list_dma = 0;
4474 fail_free_tgt_mem:
4475         qlt_mem_free(ha);
4476 fail_free_btree:
4477         btree_destroy32(&ha->host_map);
4478 fail_free_init_cb:
4479         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4480         ha->init_cb_dma);
4481         ha->init_cb = NULL;
4482         ha->init_cb_dma = 0;
4483 fail:
4484         ql_log(ql_log_fatal, NULL, 0x0030,
4485             "Memory allocation failure.\n");
4486         return -ENOMEM;
4487 }
4488
4489 int
4490 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4491 {
4492         int rval;
4493         uint16_t        size, max_cnt;
4494         uint32_t temp;
4495         struct qla_hw_data *ha = vha->hw;
4496
4497         /* Return if we don't need to alloacate any extended logins */
4498         if (ql2xexlogins <= MAX_FIBRE_DEVICES_2400)
4499                 return QLA_SUCCESS;
4500
4501         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4502                 return QLA_SUCCESS;
4503
4504         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4505         max_cnt = 0;
4506         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4507         if (rval != QLA_SUCCESS) {
4508                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4509                     "Failed to get exlogin status.\n");
4510                 return rval;
4511         }
4512
4513         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4514         temp *= size;
4515
4516         if (temp != ha->exlogin_size) {
4517                 qla2x00_free_exlogin_buffer(ha);
4518                 ha->exlogin_size = temp;
4519
4520                 ql_log(ql_log_info, vha, 0xd024,
4521                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4522                     max_cnt, size, temp);
4523
4524                 ql_log(ql_log_info, vha, 0xd025,
4525                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4526
4527                 /* Get consistent memory for extended logins */
4528                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4529                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4530                 if (!ha->exlogin_buf) {
4531                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4532                     "Failed to allocate memory for exlogin_buf_dma.\n");
4533                         return -ENOMEM;
4534                 }
4535         }
4536
4537         /* Now configure the dma buffer */
4538         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4539         if (rval) {
4540                 ql_log(ql_log_fatal, vha, 0xd033,
4541                     "Setup extended login buffer  ****FAILED****.\n");
4542                 qla2x00_free_exlogin_buffer(ha);
4543         }
4544
4545         return rval;
4546 }
4547
4548 /*
4549 * qla2x00_free_exlogin_buffer
4550 *
4551 * Input:
4552 *       ha = adapter block pointer
4553 */
4554 void
4555 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4556 {
4557         if (ha->exlogin_buf) {
4558                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4559                     ha->exlogin_buf, ha->exlogin_buf_dma);
4560                 ha->exlogin_buf = NULL;
4561                 ha->exlogin_size = 0;
4562         }
4563 }
4564
4565 static void
4566 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4567 {
4568         u32 temp;
4569         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4570         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4571
4572         if (max_cnt > vha->hw->max_exchg)
4573                 max_cnt = vha->hw->max_exchg;
4574
4575         if (qla_ini_mode_enabled(vha)) {
4576                 if (vha->ql2xiniexchg > max_cnt)
4577                         vha->ql2xiniexchg = max_cnt;
4578
4579                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4580                         *ret_cnt = vha->ql2xiniexchg;
4581
4582         } else if (qla_tgt_mode_enabled(vha)) {
4583                 if (vha->ql2xexchoffld > max_cnt) {
4584                         vha->ql2xexchoffld = max_cnt;
4585                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4586                 }
4587
4588                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4589                         *ret_cnt = vha->ql2xexchoffld;
4590         } else if (qla_dual_mode_enabled(vha)) {
4591                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4592                 if (temp > max_cnt) {
4593                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4594                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4595                         temp = max_cnt;
4596                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4597                 }
4598
4599                 if (temp > FW_DEF_EXCHANGES_CNT)
4600                         *ret_cnt = temp;
4601         }
4602 }
4603
4604 int
4605 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4606 {
4607         int rval;
4608         u16     size, max_cnt;
4609         u32 actual_cnt, totsz;
4610         struct qla_hw_data *ha = vha->hw;
4611
4612         if (!ha->flags.exchoffld_enabled)
4613                 return QLA_SUCCESS;
4614
4615         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4616                 return QLA_SUCCESS;
4617
4618         max_cnt = 0;
4619         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4620         if (rval != QLA_SUCCESS) {
4621                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4622                     "Failed to get exlogin status.\n");
4623                 return rval;
4624         }
4625
4626         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4627         ql_log(ql_log_info, vha, 0xd014,
4628             "Actual exchange offload count: %d.\n", actual_cnt);
4629
4630         totsz = actual_cnt * size;
4631
4632         if (totsz != ha->exchoffld_size) {
4633                 qla2x00_free_exchoffld_buffer(ha);
4634                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4635                         ha->exchoffld_size = 0;
4636                         ha->flags.exchoffld_enabled = 0;
4637                         return QLA_SUCCESS;
4638                 }
4639
4640                 ha->exchoffld_size = totsz;
4641
4642                 ql_log(ql_log_info, vha, 0xd016,
4643                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4644                     max_cnt, actual_cnt, size, totsz);
4645
4646                 ql_log(ql_log_info, vha, 0xd017,
4647                     "Exchange Buffers requested size = 0x%x\n",
4648                     ha->exchoffld_size);
4649
4650                 /* Get consistent memory for extended logins */
4651                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4652                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4653                 if (!ha->exchoffld_buf) {
4654                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4655                         "Failed to allocate memory for Exchange Offload.\n");
4656
4657                         if (ha->max_exchg >
4658                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4659                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4660                         } else if (ha->max_exchg >
4661                             (FW_DEF_EXCHANGES_CNT + 512)) {
4662                                 ha->max_exchg -= 512;
4663                         } else {
4664                                 ha->flags.exchoffld_enabled = 0;
4665                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4666                                     "Disabling Exchange offload due to lack of memory\n");
4667                         }
4668                         ha->exchoffld_size = 0;
4669
4670                         return -ENOMEM;
4671                 }
4672         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4673                 /* pathological case */
4674                 qla2x00_free_exchoffld_buffer(ha);
4675                 ha->exchoffld_size = 0;
4676                 ha->flags.exchoffld_enabled = 0;
4677                 ql_log(ql_log_info, vha, 0xd016,
4678                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4679                     ha->exchoffld_size, actual_cnt, size, totsz);
4680                 return 0;
4681         }
4682
4683         /* Now configure the dma buffer */
4684         rval = qla_set_exchoffld_mem_cfg(vha);
4685         if (rval) {
4686                 ql_log(ql_log_fatal, vha, 0xd02e,
4687                     "Setup exchange offload buffer ****FAILED****.\n");
4688                 qla2x00_free_exchoffld_buffer(ha);
4689         } else {
4690                 /* re-adjust number of target exchange */
4691                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4692
4693                 if (qla_ini_mode_enabled(vha))
4694                         icb->exchange_count = 0;
4695                 else
4696                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4697         }
4698
4699         return rval;
4700 }
4701
4702 /*
4703 * qla2x00_free_exchoffld_buffer
4704 *
4705 * Input:
4706 *       ha = adapter block pointer
4707 */
4708 void
4709 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4710 {
4711         if (ha->exchoffld_buf) {
4712                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4713                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4714                 ha->exchoffld_buf = NULL;
4715                 ha->exchoffld_size = 0;
4716         }
4717 }
4718
4719 /*
4720 * qla2x00_free_fw_dump
4721 *       Frees fw dump stuff.
4722 *
4723 * Input:
4724 *       ha = adapter block pointer
4725 */
4726 static void
4727 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4728 {
4729         struct fwdt *fwdt = ha->fwdt;
4730         uint j;
4731
4732         if (ha->fce)
4733                 dma_free_coherent(&ha->pdev->dev,
4734                     FCE_SIZE, ha->fce, ha->fce_dma);
4735
4736         if (ha->eft)
4737                 dma_free_coherent(&ha->pdev->dev,
4738                     EFT_SIZE, ha->eft, ha->eft_dma);
4739
4740         vfree(ha->fw_dump);
4741
4742         ha->fce = NULL;
4743         ha->fce_dma = 0;
4744         ha->flags.fce_enabled = 0;
4745         ha->eft = NULL;
4746         ha->eft_dma = 0;
4747         ha->fw_dumped = false;
4748         ha->fw_dump_cap_flags = 0;
4749         ha->fw_dump_reading = 0;
4750         ha->fw_dump = NULL;
4751         ha->fw_dump_len = 0;
4752
4753         for (j = 0; j < 2; j++, fwdt++) {
4754                 vfree(fwdt->template);
4755                 fwdt->template = NULL;
4756                 fwdt->length = 0;
4757         }
4758 }
4759
4760 /*
4761 * qla2x00_mem_free
4762 *      Frees all adapter allocated memory.
4763 *
4764 * Input:
4765 *      ha = adapter block pointer.
4766 */
4767 static void
4768 qla2x00_mem_free(struct qla_hw_data *ha)
4769 {
4770         qla2x00_free_fw_dump(ha);
4771
4772         if (ha->mctp_dump)
4773                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4774                     ha->mctp_dump_dma);
4775         ha->mctp_dump = NULL;
4776
4777         mempool_destroy(ha->srb_mempool);
4778         ha->srb_mempool = NULL;
4779
4780         if (ha->dcbx_tlv)
4781                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4782                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4783         ha->dcbx_tlv = NULL;
4784
4785         if (ha->xgmac_data)
4786                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4787                     ha->xgmac_data, ha->xgmac_data_dma);
4788         ha->xgmac_data = NULL;
4789
4790         if (ha->sns_cmd)
4791                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4792                 ha->sns_cmd, ha->sns_cmd_dma);
4793         ha->sns_cmd = NULL;
4794         ha->sns_cmd_dma = 0;
4795
4796         if (ha->ct_sns)
4797                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4798                 ha->ct_sns, ha->ct_sns_dma);
4799         ha->ct_sns = NULL;
4800         ha->ct_sns_dma = 0;
4801
4802         if (ha->sfp_data)
4803                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4804                     ha->sfp_data_dma);
4805         ha->sfp_data = NULL;
4806
4807         if (ha->flt)
4808                 dma_free_coherent(&ha->pdev->dev,
4809                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4810                     ha->flt, ha->flt_dma);
4811         ha->flt = NULL;
4812         ha->flt_dma = 0;
4813
4814         if (ha->ms_iocb)
4815                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4816         ha->ms_iocb = NULL;
4817         ha->ms_iocb_dma = 0;
4818
4819         if (ha->sf_init_cb)
4820                 dma_pool_free(ha->s_dma_pool,
4821                               ha->sf_init_cb, ha->sf_init_cb_dma);
4822
4823         if (ha->ex_init_cb)
4824                 dma_pool_free(ha->s_dma_pool,
4825                         ha->ex_init_cb, ha->ex_init_cb_dma);
4826         ha->ex_init_cb = NULL;
4827         ha->ex_init_cb_dma = 0;
4828
4829         if (ha->async_pd)
4830                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4831         ha->async_pd = NULL;
4832         ha->async_pd_dma = 0;
4833
4834         dma_pool_destroy(ha->s_dma_pool);
4835         ha->s_dma_pool = NULL;
4836
4837         if (ha->gid_list)
4838                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4839                 ha->gid_list, ha->gid_list_dma);
4840         ha->gid_list = NULL;
4841         ha->gid_list_dma = 0;
4842
4843         if (IS_QLA82XX(ha)) {
4844                 if (!list_empty(&ha->gbl_dsd_list)) {
4845                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4846
4847                         /* clean up allocated prev pool */
4848                         list_for_each_entry_safe(dsd_ptr,
4849                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4850                                 dma_pool_free(ha->dl_dma_pool,
4851                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4852                                 list_del(&dsd_ptr->list);
4853                                 kfree(dsd_ptr);
4854                         }
4855                 }
4856         }
4857
4858         dma_pool_destroy(ha->dl_dma_pool);
4859         ha->dl_dma_pool = NULL;
4860
4861         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4862         ha->fcp_cmnd_dma_pool = NULL;
4863
4864         mempool_destroy(ha->ctx_mempool);
4865         ha->ctx_mempool = NULL;
4866
4867         if (ql2xenabledif && ha->dif_bundl_pool) {
4868                 struct dsd_dma *dsd, *nxt;
4869
4870                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4871                                          list) {
4872                         list_del(&dsd->list);
4873                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4874                                       dsd->dsd_list_dma);
4875                         ha->dif_bundle_dma_allocs--;
4876                         kfree(dsd);
4877                         ha->dif_bundle_kallocs--;
4878                         ha->pool.unusable.count--;
4879                 }
4880                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4881                         list_del(&dsd->list);
4882                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4883                                       dsd->dsd_list_dma);
4884                         ha->dif_bundle_dma_allocs--;
4885                         kfree(dsd);
4886                         ha->dif_bundle_kallocs--;
4887                 }
4888         }
4889
4890         dma_pool_destroy(ha->dif_bundl_pool);
4891         ha->dif_bundl_pool = NULL;
4892
4893         qlt_mem_free(ha);
4894         qla_remove_hostmap(ha);
4895
4896         if (ha->init_cb)
4897                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4898                         ha->init_cb, ha->init_cb_dma);
4899
4900         dma_pool_destroy(ha->purex_dma_pool);
4901         ha->purex_dma_pool = NULL;
4902
4903         if (ha->elsrej.c) {
4904                 dma_free_coherent(&ha->pdev->dev, ha->elsrej.size,
4905                     ha->elsrej.c, ha->elsrej.cdma);
4906                 ha->elsrej.c = NULL;
4907         }
4908
4909         ha->init_cb = NULL;
4910         ha->init_cb_dma = 0;
4911
4912         vfree(ha->optrom_buffer);
4913         ha->optrom_buffer = NULL;
4914         kfree(ha->nvram);
4915         ha->nvram = NULL;
4916         kfree(ha->npiv_info);
4917         ha->npiv_info = NULL;
4918         kfree(ha->swl);
4919         ha->swl = NULL;
4920         kfree(ha->loop_id_map);
4921         ha->sf_init_cb = NULL;
4922         ha->sf_init_cb_dma = 0;
4923         ha->loop_id_map = NULL;
4924 }
4925
4926 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4927                                                 struct qla_hw_data *ha)
4928 {
4929         struct Scsi_Host *host;
4930         struct scsi_qla_host *vha = NULL;
4931
4932         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4933         if (!host) {
4934                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4935                     "Failed to allocate host from the scsi layer, aborting.\n");
4936                 return NULL;
4937         }
4938
4939         /* Clear our data area */
4940         vha = shost_priv(host);
4941         memset(vha, 0, sizeof(scsi_qla_host_t));
4942
4943         vha->host = host;
4944         vha->host_no = host->host_no;
4945         vha->hw = ha;
4946
4947         vha->qlini_mode = ql2x_ini_mode;
4948         vha->ql2xexchoffld = ql2xexchoffld;
4949         vha->ql2xiniexchg = ql2xiniexchg;
4950
4951         INIT_LIST_HEAD(&vha->vp_fcports);
4952         INIT_LIST_HEAD(&vha->work_list);
4953         INIT_LIST_HEAD(&vha->list);
4954         INIT_LIST_HEAD(&vha->qla_cmd_list);
4955         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4956         INIT_LIST_HEAD(&vha->logo_list);
4957         INIT_LIST_HEAD(&vha->plogi_ack_list);
4958         INIT_LIST_HEAD(&vha->qp_list);
4959         INIT_LIST_HEAD(&vha->gnl.fcports);
4960         INIT_LIST_HEAD(&vha->gpnid_list);
4961         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4962
4963         INIT_LIST_HEAD(&vha->purex_list.head);
4964         spin_lock_init(&vha->purex_list.lock);
4965
4966         spin_lock_init(&vha->work_lock);
4967         spin_lock_init(&vha->cmd_list_lock);
4968         init_waitqueue_head(&vha->fcport_waitQ);
4969         init_waitqueue_head(&vha->vref_waitq);
4970         qla_enode_init(vha);
4971         qla_edb_init(vha);
4972
4973
4974         vha->gnl.size = sizeof(struct get_name_list_extended) *
4975                         (ha->max_loop_id + 1);
4976         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4977             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4978         if (!vha->gnl.l) {
4979                 ql_log(ql_log_fatal, vha, 0xd04a,
4980                     "Alloc failed for name list.\n");
4981                 scsi_host_put(vha->host);
4982                 return NULL;
4983         }
4984
4985         /* todo: what about ext login? */
4986         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4987         vha->scan.l = vmalloc(vha->scan.size);
4988         if (!vha->scan.l) {
4989                 ql_log(ql_log_fatal, vha, 0xd04a,
4990                     "Alloc failed for scan database.\n");
4991                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4992                     vha->gnl.l, vha->gnl.ldma);
4993                 vha->gnl.l = NULL;
4994                 scsi_host_put(vha->host);
4995                 return NULL;
4996         }
4997         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4998
4999         sprintf(vha->host_str, "%s_%lu", QLA2XXX_DRIVER_NAME, vha->host_no);
5000         ql_dbg(ql_dbg_init, vha, 0x0041,
5001             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
5002             vha->host, vha->hw, vha,
5003             dev_name(&(ha->pdev->dev)));
5004
5005         return vha;
5006 }
5007
5008 struct qla_work_evt *
5009 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
5010 {
5011         struct qla_work_evt *e;
5012         uint8_t bail;
5013
5014         if (test_bit(UNLOADING, &vha->dpc_flags))
5015                 return NULL;
5016
5017         QLA_VHA_MARK_BUSY(vha, bail);
5018         if (bail)
5019                 return NULL;
5020
5021         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
5022         if (!e) {
5023                 QLA_VHA_MARK_NOT_BUSY(vha);
5024                 return NULL;
5025         }
5026
5027         INIT_LIST_HEAD(&e->list);
5028         e->type = type;
5029         e->flags = QLA_EVT_FLAG_FREE;
5030         return e;
5031 }
5032
5033 int
5034 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
5035 {
5036         unsigned long flags;
5037         bool q = false;
5038
5039         spin_lock_irqsave(&vha->work_lock, flags);
5040         list_add_tail(&e->list, &vha->work_list);
5041
5042         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
5043                 q = true;
5044
5045         spin_unlock_irqrestore(&vha->work_lock, flags);
5046
5047         if (q)
5048                 queue_work(vha->hw->wq, &vha->iocb_work);
5049
5050         return QLA_SUCCESS;
5051 }
5052
5053 int
5054 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
5055     u32 data)
5056 {
5057         struct qla_work_evt *e;
5058
5059         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
5060         if (!e)
5061                 return QLA_FUNCTION_FAILED;
5062
5063         e->u.aen.code = code;
5064         e->u.aen.data = data;
5065         return qla2x00_post_work(vha, e);
5066 }
5067
5068 int
5069 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
5070 {
5071         struct qla_work_evt *e;
5072
5073         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
5074         if (!e)
5075                 return QLA_FUNCTION_FAILED;
5076
5077         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
5078         return qla2x00_post_work(vha, e);
5079 }
5080
5081 #define qla2x00_post_async_work(name, type)     \
5082 int qla2x00_post_async_##name##_work(           \
5083     struct scsi_qla_host *vha,                  \
5084     fc_port_t *fcport, uint16_t *data)          \
5085 {                                               \
5086         struct qla_work_evt *e;                 \
5087                                                 \
5088         e = qla2x00_alloc_work(vha, type);      \
5089         if (!e)                                 \
5090                 return QLA_FUNCTION_FAILED;     \
5091                                                 \
5092         e->u.logio.fcport = fcport;             \
5093         if (data) {                             \
5094                 e->u.logio.data[0] = data[0];   \
5095                 e->u.logio.data[1] = data[1];   \
5096         }                                       \
5097         fcport->flags |= FCF_ASYNC_ACTIVE;      \
5098         return qla2x00_post_work(vha, e);       \
5099 }
5100
5101 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
5102 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
5103 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
5104 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
5105 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
5106
5107 int
5108 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
5109 {
5110         struct qla_work_evt *e;
5111
5112         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
5113         if (!e)
5114                 return QLA_FUNCTION_FAILED;
5115
5116         e->u.uevent.code = code;
5117         return qla2x00_post_work(vha, e);
5118 }
5119
5120 static void
5121 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
5122 {
5123         char event_string[40];
5124         char *envp[] = { event_string, NULL };
5125
5126         switch (code) {
5127         case QLA_UEVENT_CODE_FW_DUMP:
5128                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%lu",
5129                     vha->host_no);
5130                 break;
5131         default:
5132                 /* do nothing */
5133                 break;
5134         }
5135         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
5136 }
5137
5138 int
5139 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5140                         uint32_t *data, int cnt)
5141 {
5142         struct qla_work_evt *e;
5143
5144         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5145         if (!e)
5146                 return QLA_FUNCTION_FAILED;
5147
5148         e->u.aenfx.evtcode = evtcode;
5149         e->u.aenfx.count = cnt;
5150         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5151         return qla2x00_post_work(vha, e);
5152 }
5153
5154 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5155 {
5156         unsigned long flags;
5157
5158         if (IS_SW_RESV_ADDR(fcport->d_id))
5159                 return;
5160
5161         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5162         if (fcport->disc_state == DSC_UPD_FCPORT) {
5163                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5164                 return;
5165         }
5166         fcport->jiffies_at_registration = jiffies;
5167         fcport->sec_since_registration = 0;
5168         fcport->next_disc_state = DSC_DELETED;
5169         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5170         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5171
5172         queue_work(system_unbound_wq, &fcport->reg_work);
5173 }
5174
5175 static
5176 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5177 {
5178         unsigned long flags;
5179         fc_port_t *fcport =  NULL, *tfcp;
5180         struct qlt_plogi_ack_t *pla =
5181             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5182         uint8_t free_fcport = 0;
5183
5184         ql_dbg(ql_dbg_disc, vha, 0xffff,
5185             "%s %d %8phC enter\n",
5186             __func__, __LINE__, e->u.new_sess.port_name);
5187
5188         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5189         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5190         if (fcport) {
5191                 fcport->d_id = e->u.new_sess.id;
5192                 if (pla) {
5193                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5194                         memcpy(fcport->node_name,
5195                             pla->iocb.u.isp24.u.plogi.node_name,
5196                             WWN_SIZE);
5197                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5198                         /* we took an extra ref_count to prevent PLOGI ACK when
5199                          * fcport/sess has not been created.
5200                          */
5201                         pla->ref_count--;
5202                 }
5203         } else {
5204                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5205                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5206                 if (fcport) {
5207                         fcport->d_id = e->u.new_sess.id;
5208                         fcport->flags |= FCF_FABRIC_DEVICE;
5209                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5210                         fcport->tgt_short_link_down_cnt = 0;
5211
5212                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5213                             WWN_SIZE);
5214
5215                         fcport->fc4_type = e->u.new_sess.fc4_type;
5216                         if (NVME_PRIORITY(vha->hw, fcport))
5217                                 fcport->do_prli_nvme = 1;
5218                         else
5219                                 fcport->do_prli_nvme = 0;
5220
5221                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5222                                 fcport->dm_login_expire = jiffies +
5223                                         QLA_N2N_WAIT_TIME * HZ;
5224                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5225                                 fcport->n2n_flag = 1;
5226                                 if (vha->flags.nvme_enabled)
5227                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5228                         }
5229
5230                 } else {
5231                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5232                                    "%s %8phC mem alloc fail.\n",
5233                                    __func__, e->u.new_sess.port_name);
5234
5235                         if (pla) {
5236                                 list_del(&pla->list);
5237                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5238                         }
5239                         return;
5240                 }
5241
5242                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5243                 /* search again to make sure no one else got ahead */
5244                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5245                     e->u.new_sess.port_name, 1);
5246                 if (tfcp) {
5247                         /* should rarily happen */
5248                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5249                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5250                             __func__, tfcp->port_name, tfcp->disc_state,
5251                             tfcp->fw_login_state);
5252
5253                         free_fcport = 1;
5254                 } else {
5255                         list_add_tail(&fcport->list, &vha->vp_fcports);
5256
5257                 }
5258                 if (pla) {
5259                         qlt_plogi_ack_link(vha, pla, fcport,
5260                             QLT_PLOGI_LINK_SAME_WWN);
5261                         pla->ref_count--;
5262                 }
5263         }
5264         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5265
5266         if (fcport) {
5267                 fcport->id_changed = 1;
5268                 fcport->scan_state = QLA_FCPORT_FOUND;
5269                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5270                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5271
5272                 if (pla) {
5273                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5274                                 u16 wd3_lo;
5275
5276                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5277                                 fcport->local = 0;
5278                                 fcport->loop_id =
5279                                         le16_to_cpu(
5280                                             pla->iocb.u.isp24.nport_handle);
5281                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5282                                 wd3_lo =
5283                                     le16_to_cpu(
5284                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5285
5286                                 if (wd3_lo & BIT_7)
5287                                         fcport->conf_compl_supported = 1;
5288
5289                                 if ((wd3_lo & BIT_4) == 0)
5290                                         fcport->port_type = FCT_INITIATOR;
5291                                 else
5292                                         fcport->port_type = FCT_TARGET;
5293                         }
5294                         qlt_plogi_ack_unref(vha, pla);
5295                 } else {
5296                         fc_port_t *dfcp = NULL;
5297
5298                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5299                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5300                             &e->u.new_sess.id, 1);
5301                         if (tfcp && (tfcp != fcport)) {
5302                                 /*
5303                                  * We have a conflict fcport with same NportID.
5304                                  */
5305                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5306                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5307                                     __func__, tfcp->port_name, tfcp->disc_state,
5308                                     tfcp->fw_login_state);
5309
5310                                 switch (tfcp->disc_state) {
5311                                 case DSC_DELETED:
5312                                         break;
5313                                 case DSC_DELETE_PEND:
5314                                         fcport->login_pause = 1;
5315                                         tfcp->conflict = fcport;
5316                                         break;
5317                                 default:
5318                                         fcport->login_pause = 1;
5319                                         tfcp->conflict = fcport;
5320                                         dfcp = tfcp;
5321                                         break;
5322                                 }
5323                         }
5324                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5325                         if (dfcp)
5326                                 qlt_schedule_sess_for_deletion(tfcp);
5327
5328                         if (N2N_TOPO(vha->hw)) {
5329                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5330                                 fcport->keep_nport_handle = 1;
5331                                 if (vha->flags.nvme_enabled) {
5332                                         fcport->fc4_type =
5333                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5334                                         fcport->n2n_flag = 1;
5335                                 }
5336                                 fcport->fw_login_state = 0;
5337
5338                                 schedule_delayed_work(&vha->scan.scan_work, 5);
5339                         } else {
5340                                 qla24xx_fcport_handle_login(vha, fcport);
5341                         }
5342                 }
5343         }
5344
5345         if (free_fcport) {
5346                 qla2x00_free_fcport(fcport);
5347                 if (pla) {
5348                         list_del(&pla->list);
5349                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5350                 }
5351         }
5352 }
5353
5354 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5355 {
5356         struct srb *sp = e->u.iosb.sp;
5357         int rval;
5358
5359         rval = qla2x00_start_sp(sp);
5360         if (rval != QLA_SUCCESS) {
5361                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5362                     "%s: %s: Re-issue IOCB failed (%d).\n",
5363                     __func__, sp->name, rval);
5364                 qla24xx_sp_unmap(vha, sp);
5365         }
5366 }
5367
5368 void
5369 qla2x00_do_work(struct scsi_qla_host *vha)
5370 {
5371         struct qla_work_evt *e, *tmp;
5372         unsigned long flags;
5373         LIST_HEAD(work);
5374         int rc;
5375
5376         spin_lock_irqsave(&vha->work_lock, flags);
5377         list_splice_init(&vha->work_list, &work);
5378         spin_unlock_irqrestore(&vha->work_lock, flags);
5379
5380         list_for_each_entry_safe(e, tmp, &work, list) {
5381                 rc = QLA_SUCCESS;
5382                 switch (e->type) {
5383                 case QLA_EVT_AEN:
5384                         fc_host_post_event(vha->host, fc_get_event_number(),
5385                             e->u.aen.code, e->u.aen.data);
5386                         break;
5387                 case QLA_EVT_IDC_ACK:
5388                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5389                         break;
5390                 case QLA_EVT_ASYNC_LOGIN:
5391                         qla2x00_async_login(vha, e->u.logio.fcport,
5392                             e->u.logio.data);
5393                         break;
5394                 case QLA_EVT_ASYNC_LOGOUT:
5395                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5396                         break;
5397                 case QLA_EVT_ASYNC_ADISC:
5398                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5399                             e->u.logio.data);
5400                         break;
5401                 case QLA_EVT_UEVENT:
5402                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5403                         break;
5404                 case QLA_EVT_AENFX:
5405                         qlafx00_process_aen(vha, e);
5406                         break;
5407                 case QLA_EVT_GPNID:
5408                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5409                         break;
5410                 case QLA_EVT_UNMAP:
5411                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5412                         break;
5413                 case QLA_EVT_RELOGIN:
5414                         qla2x00_relogin(vha);
5415                         break;
5416                 case QLA_EVT_NEW_SESS:
5417                         qla24xx_create_new_sess(vha, e);
5418                         break;
5419                 case QLA_EVT_GPDB:
5420                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5421                             e->u.fcport.opt);
5422                         break;
5423                 case QLA_EVT_PRLI:
5424                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5425                         break;
5426                 case QLA_EVT_GPSC:
5427                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5428                         break;
5429                 case QLA_EVT_GNL:
5430                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5431                         break;
5432                 case QLA_EVT_NACK:
5433                         qla24xx_do_nack_work(vha, e);
5434                         break;
5435                 case QLA_EVT_ASYNC_PRLO:
5436                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5437                         break;
5438                 case QLA_EVT_ASYNC_PRLO_DONE:
5439                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5440                             e->u.logio.data);
5441                         break;
5442                 case QLA_EVT_GPNFT:
5443                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5444                             e->u.gpnft.sp);
5445                         break;
5446                 case QLA_EVT_GPNFT_DONE:
5447                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5448                         break;
5449                 case QLA_EVT_GNNFT_DONE:
5450                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5451                         break;
5452                 case QLA_EVT_GNNID:
5453                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5454                         break;
5455                 case QLA_EVT_GFPNID:
5456                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5457                         break;
5458                 case QLA_EVT_SP_RETRY:
5459                         qla_sp_retry(vha, e);
5460                         break;
5461                 case QLA_EVT_IIDMA:
5462                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5463                         break;
5464                 case QLA_EVT_ELS_PLOGI:
5465                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5466                             e->u.fcport.fcport, false);
5467                         break;
5468                 case QLA_EVT_SA_REPLACE:
5469                         qla24xx_issue_sa_replace_iocb(vha, e);
5470                         break;
5471                 }
5472
5473                 if (rc == EAGAIN) {
5474                         /* put 'work' at head of 'vha->work_list' */
5475                         spin_lock_irqsave(&vha->work_lock, flags);
5476                         list_splice(&work, &vha->work_list);
5477                         spin_unlock_irqrestore(&vha->work_lock, flags);
5478                         break;
5479                 }
5480                 list_del_init(&e->list);
5481                 if (e->flags & QLA_EVT_FLAG_FREE)
5482                         kfree(e);
5483
5484                 /* For each work completed decrement vha ref count */
5485                 QLA_VHA_MARK_NOT_BUSY(vha);
5486         }
5487 }
5488
5489 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5490 {
5491         struct qla_work_evt *e;
5492
5493         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5494
5495         if (!e) {
5496                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5497                 return QLA_FUNCTION_FAILED;
5498         }
5499
5500         return qla2x00_post_work(vha, e);
5501 }
5502
5503 /* Relogins all the fcports of a vport
5504  * Context: dpc thread
5505  */
5506 void qla2x00_relogin(struct scsi_qla_host *vha)
5507 {
5508         fc_port_t       *fcport;
5509         int status, relogin_needed = 0;
5510         struct event_arg ea;
5511
5512         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5513                 /*
5514                  * If the port is not ONLINE then try to login
5515                  * to it if we haven't run out of retries.
5516                  */
5517                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5518                     fcport->login_retry) {
5519                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5520                             fcport->disc_state == DSC_LOGIN_AUTH_PEND ||
5521                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5522                                 continue;
5523
5524                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5525                                 fcport->disc_state == DSC_DELETE_PEND) {
5526                                 relogin_needed = 1;
5527                         } else {
5528                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5529                                         memset(&ea, 0, sizeof(ea));
5530                                         ea.fcport = fcport;
5531                                         qla24xx_handle_relogin_event(vha, &ea);
5532                                 } else if (vha->hw->current_topology ==
5533                                          ISP_CFG_NL &&
5534                                         IS_QLA2XXX_MIDTYPE(vha->hw)) {
5535                                         (void)qla24xx_fcport_handle_login(vha,
5536                                                                         fcport);
5537                                 } else if (vha->hw->current_topology ==
5538                                     ISP_CFG_NL) {
5539                                         fcport->login_retry--;
5540                                         status =
5541                                             qla2x00_local_device_login(vha,
5542                                                 fcport);
5543                                         if (status == QLA_SUCCESS) {
5544                                                 fcport->old_loop_id =
5545                                                     fcport->loop_id;
5546                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5547                                                     "Port login OK: logged in ID 0x%x.\n",
5548                                                     fcport->loop_id);
5549                                                 qla2x00_update_fcport
5550                                                         (vha, fcport);
5551                                         } else if (status == 1) {
5552                                                 set_bit(RELOGIN_NEEDED,
5553                                                     &vha->dpc_flags);
5554                                                 /* retry the login again */
5555                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5556                                                     "Retrying %d login again loop_id 0x%x.\n",
5557                                                     fcport->login_retry,
5558                                                     fcport->loop_id);
5559                                         } else {
5560                                                 fcport->login_retry = 0;
5561                                         }
5562
5563                                         if (fcport->login_retry == 0 &&
5564                                             status != QLA_SUCCESS)
5565                                                 qla2x00_clear_loop_id(fcport);
5566                                 }
5567                         }
5568                 }
5569                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5570                         break;
5571         }
5572
5573         if (relogin_needed)
5574                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5575
5576         ql_dbg(ql_dbg_disc, vha, 0x400e,
5577             "Relogin end.\n");
5578 }
5579
5580 /* Schedule work on any of the dpc-workqueues */
5581 void
5582 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5583 {
5584         struct qla_hw_data *ha = base_vha->hw;
5585
5586         switch (work_code) {
5587         case MBA_IDC_AEN: /* 0x8200 */
5588                 if (ha->dpc_lp_wq)
5589                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5590                 break;
5591
5592         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5593                 if (!ha->flags.nic_core_reset_hdlr_active) {
5594                         if (ha->dpc_hp_wq)
5595                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5596                 } else
5597                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5598                             "NIC Core reset is already active. Skip "
5599                             "scheduling it again.\n");
5600                 break;
5601         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5602                 if (ha->dpc_hp_wq)
5603                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5604                 break;
5605         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5606                 if (ha->dpc_hp_wq)
5607                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5608                 break;
5609         default:
5610                 ql_log(ql_log_warn, base_vha, 0xb05f,
5611                     "Unknown work-code=0x%x.\n", work_code);
5612         }
5613
5614         return;
5615 }
5616
5617 /* Work: Perform NIC Core Unrecoverable state handling */
5618 void
5619 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5620 {
5621         struct qla_hw_data *ha =
5622                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5623         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5624         uint32_t dev_state = 0;
5625
5626         qla83xx_idc_lock(base_vha, 0);
5627         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5628         qla83xx_reset_ownership(base_vha);
5629         if (ha->flags.nic_core_reset_owner) {
5630                 ha->flags.nic_core_reset_owner = 0;
5631                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5632                     QLA8XXX_DEV_FAILED);
5633                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5634                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5635         }
5636         qla83xx_idc_unlock(base_vha, 0);
5637 }
5638
5639 /* Work: Execute IDC state handler */
5640 void
5641 qla83xx_idc_state_handler_work(struct work_struct *work)
5642 {
5643         struct qla_hw_data *ha =
5644                 container_of(work, struct qla_hw_data, idc_state_handler);
5645         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5646         uint32_t dev_state = 0;
5647
5648         qla83xx_idc_lock(base_vha, 0);
5649         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5650         if (dev_state == QLA8XXX_DEV_FAILED ||
5651                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5652                 qla83xx_idc_state_handler(base_vha);
5653         qla83xx_idc_unlock(base_vha, 0);
5654 }
5655
5656 static int
5657 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5658 {
5659         int rval = QLA_SUCCESS;
5660         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5661         uint32_t heart_beat_counter1, heart_beat_counter2;
5662
5663         do {
5664                 if (time_after(jiffies, heart_beat_wait)) {
5665                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5666                             "Nic Core f/w is not alive.\n");
5667                         rval = QLA_FUNCTION_FAILED;
5668                         break;
5669                 }
5670
5671                 qla83xx_idc_lock(base_vha, 0);
5672                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5673                     &heart_beat_counter1);
5674                 qla83xx_idc_unlock(base_vha, 0);
5675                 msleep(100);
5676                 qla83xx_idc_lock(base_vha, 0);
5677                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5678                     &heart_beat_counter2);
5679                 qla83xx_idc_unlock(base_vha, 0);
5680         } while (heart_beat_counter1 == heart_beat_counter2);
5681
5682         return rval;
5683 }
5684
5685 /* Work: Perform NIC Core Reset handling */
5686 void
5687 qla83xx_nic_core_reset_work(struct work_struct *work)
5688 {
5689         struct qla_hw_data *ha =
5690                 container_of(work, struct qla_hw_data, nic_core_reset);
5691         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5692         uint32_t dev_state = 0;
5693
5694         if (IS_QLA2031(ha)) {
5695                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5696                         ql_log(ql_log_warn, base_vha, 0xb081,
5697                             "Failed to dump mctp\n");
5698                 return;
5699         }
5700
5701         if (!ha->flags.nic_core_reset_hdlr_active) {
5702                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5703                         qla83xx_idc_lock(base_vha, 0);
5704                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5705                             &dev_state);
5706                         qla83xx_idc_unlock(base_vha, 0);
5707                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5708                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5709                                     "Nic Core f/w is alive.\n");
5710                                 return;
5711                         }
5712                 }
5713
5714                 ha->flags.nic_core_reset_hdlr_active = 1;
5715                 if (qla83xx_nic_core_reset(base_vha)) {
5716                         /* NIC Core reset failed. */
5717                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5718                             "NIC Core reset failed.\n");
5719                 }
5720                 ha->flags.nic_core_reset_hdlr_active = 0;
5721         }
5722 }
5723
5724 /* Work: Handle 8200 IDC aens */
5725 void
5726 qla83xx_service_idc_aen(struct work_struct *work)
5727 {
5728         struct qla_hw_data *ha =
5729                 container_of(work, struct qla_hw_data, idc_aen);
5730         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5731         uint32_t dev_state, idc_control;
5732
5733         qla83xx_idc_lock(base_vha, 0);
5734         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5735         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5736         qla83xx_idc_unlock(base_vha, 0);
5737         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5738                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5739                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5740                             "Application requested NIC Core Reset.\n");
5741                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5742                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5743                     QLA_SUCCESS) {
5744                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5745                             "Other protocol driver requested NIC Core Reset.\n");
5746                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5747                 }
5748         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5749                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5750                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5751         }
5752 }
5753
5754 /*
5755  * Control the frequency of IDC lock retries
5756  */
5757 #define QLA83XX_WAIT_LOGIC_MS   100
5758
5759 static int
5760 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5761 {
5762         int rval;
5763         uint32_t data;
5764         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5765         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5766         struct qla_hw_data *ha = base_vha->hw;
5767
5768         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5769             "Trying force recovery of the IDC lock.\n");
5770
5771         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5772         if (rval)
5773                 return rval;
5774
5775         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5776                 return QLA_SUCCESS;
5777         } else {
5778                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5779                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5780                     data);
5781                 if (rval)
5782                         return rval;
5783
5784                 msleep(200);
5785
5786                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5787                     &data);
5788                 if (rval)
5789                         return rval;
5790
5791                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5792                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5793                                         ~(idc_lck_rcvry_stage_mask));
5794                         rval = qla83xx_wr_reg(base_vha,
5795                             QLA83XX_IDC_LOCK_RECOVERY, data);
5796                         if (rval)
5797                                 return rval;
5798
5799                         /* Forcefully perform IDC UnLock */
5800                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5801                             &data);
5802                         if (rval)
5803                                 return rval;
5804                         /* Clear lock-id by setting 0xff */
5805                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5806                             0xff);
5807                         if (rval)
5808                                 return rval;
5809                         /* Clear lock-recovery by setting 0x0 */
5810                         rval = qla83xx_wr_reg(base_vha,
5811                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5812                         if (rval)
5813                                 return rval;
5814                 } else
5815                         return QLA_SUCCESS;
5816         }
5817
5818         return rval;
5819 }
5820
5821 static int
5822 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5823 {
5824         int rval = QLA_SUCCESS;
5825         uint32_t o_drv_lockid, n_drv_lockid;
5826         unsigned long lock_recovery_timeout;
5827
5828         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5829 retry_lockid:
5830         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5831         if (rval)
5832                 goto exit;
5833
5834         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5835         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5836                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5837                         return QLA_SUCCESS;
5838                 else
5839                         return QLA_FUNCTION_FAILED;
5840         }
5841
5842         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5843         if (rval)
5844                 goto exit;
5845
5846         if (o_drv_lockid == n_drv_lockid) {
5847                 msleep(QLA83XX_WAIT_LOGIC_MS);
5848                 goto retry_lockid;
5849         } else
5850                 return QLA_SUCCESS;
5851
5852 exit:
5853         return rval;
5854 }
5855
5856 /*
5857  * Context: task, can sleep
5858  */
5859 void
5860 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5861 {
5862         uint32_t data;
5863         uint32_t lock_owner;
5864         struct qla_hw_data *ha = base_vha->hw;
5865
5866         might_sleep();
5867
5868         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5869 retry_lock:
5870         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5871             == QLA_SUCCESS) {
5872                 if (data) {
5873                         /* Setting lock-id to our function-number */
5874                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5875                             ha->portnum);
5876                 } else {
5877                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5878                             &lock_owner);
5879                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5880                             "Failed to acquire IDC lock, acquired by %d, "
5881                             "retrying...\n", lock_owner);
5882
5883                         /* Retry/Perform IDC-Lock recovery */
5884                         if (qla83xx_idc_lock_recovery(base_vha)
5885                             == QLA_SUCCESS) {
5886                                 msleep(QLA83XX_WAIT_LOGIC_MS);
5887                                 goto retry_lock;
5888                         } else
5889                                 ql_log(ql_log_warn, base_vha, 0xb075,
5890                                     "IDC Lock recovery FAILED.\n");
5891                 }
5892
5893         }
5894
5895         return;
5896 }
5897
5898 static bool
5899 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host *vha,
5900         struct purex_entry_24xx *purex)
5901 {
5902         char fwstr[16];
5903         u32 sid = purex->s_id[2] << 16 | purex->s_id[1] << 8 | purex->s_id[0];
5904         struct port_database_24xx *pdb;
5905
5906         /* Domain Controller is always logged-out. */
5907         /* if RDP request is not from Domain Controller: */
5908         if (sid != 0xfffc01)
5909                 return false;
5910
5911         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: s_id=%#x\n", __func__, sid);
5912
5913         pdb = kzalloc(sizeof(*pdb), GFP_KERNEL);
5914         if (!pdb) {
5915                 ql_dbg(ql_dbg_init, vha, 0x0181,
5916                     "%s: Failed allocate pdb\n", __func__);
5917         } else if (qla24xx_get_port_database(vha,
5918                                 le16_to_cpu(purex->nport_handle), pdb)) {
5919                 ql_dbg(ql_dbg_init, vha, 0x0181,
5920                     "%s: Failed get pdb sid=%x\n", __func__, sid);
5921         } else if (pdb->current_login_state != PDS_PLOGI_COMPLETE &&
5922             pdb->current_login_state != PDS_PRLI_COMPLETE) {
5923                 ql_dbg(ql_dbg_init, vha, 0x0181,
5924                     "%s: Port not logged in sid=%#x\n", __func__, sid);
5925         } else {
5926                 /* RDP request is from logged in port */
5927                 kfree(pdb);
5928                 return false;
5929         }
5930         kfree(pdb);
5931
5932         vha->hw->isp_ops->fw_version_str(vha, fwstr, sizeof(fwstr));
5933         fwstr[strcspn(fwstr, " ")] = 0;
5934         /* if FW version allows RDP response length upto 2048 bytes: */
5935         if (strcmp(fwstr, "8.09.00") > 0 || strcmp(fwstr, "8.05.65") == 0)
5936                 return false;
5937
5938         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: fw=%s\n", __func__, fwstr);
5939
5940         /* RDP response length is to be reduced to maximum 256 bytes */
5941         return true;
5942 }
5943
5944 /*
5945  * Function Name: qla24xx_process_purex_iocb
5946  *
5947  * Description:
5948  * Prepare a RDP response and send to Fabric switch
5949  *
5950  * PARAMETERS:
5951  * vha: SCSI qla host
5952  * purex: RDP request received by HBA
5953  */
5954 void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
5955                                struct purex_item *item)
5956 {
5957         struct qla_hw_data *ha = vha->hw;
5958         struct purex_entry_24xx *purex =
5959             (struct purex_entry_24xx *)&item->iocb;
5960         dma_addr_t rsp_els_dma;
5961         dma_addr_t rsp_payload_dma;
5962         dma_addr_t stat_dma;
5963         dma_addr_t sfp_dma;
5964         struct els_entry_24xx *rsp_els = NULL;
5965         struct rdp_rsp_payload *rsp_payload = NULL;
5966         struct link_statistics *stat = NULL;
5967         uint8_t *sfp = NULL;
5968         uint16_t sfp_flags = 0;
5969         uint rsp_payload_length = sizeof(*rsp_payload);
5970         int rval;
5971
5972         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0180,
5973             "%s: Enter\n", __func__);
5974
5975         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0181,
5976             "-------- ELS REQ -------\n");
5977         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0182,
5978             purex, sizeof(*purex));
5979
5980         if (qla25xx_rdp_rsp_reduce_size(vha, purex)) {
5981                 rsp_payload_length =
5982                     offsetof(typeof(*rsp_payload), optical_elmt_desc);
5983                 ql_dbg(ql_dbg_init, vha, 0x0181,
5984                     "Reducing RSP payload length to %u bytes...\n",
5985                     rsp_payload_length);
5986         }
5987
5988         rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els),
5989             &rsp_els_dma, GFP_KERNEL);
5990         if (!rsp_els) {
5991                 ql_log(ql_log_warn, vha, 0x0183,
5992                     "Failed allocate dma buffer ELS RSP.\n");
5993                 goto dealloc;
5994         }
5995
5996         rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
5997             &rsp_payload_dma, GFP_KERNEL);
5998         if (!rsp_payload) {
5999                 ql_log(ql_log_warn, vha, 0x0184,
6000                     "Failed allocate dma buffer ELS RSP payload.\n");
6001                 goto dealloc;
6002         }
6003
6004         sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6005             &sfp_dma, GFP_KERNEL);
6006
6007         stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat),
6008             &stat_dma, GFP_KERNEL);
6009
6010         /* Prepare Response IOCB */
6011         rsp_els->entry_type = ELS_IOCB_TYPE;
6012         rsp_els->entry_count = 1;
6013         rsp_els->sys_define = 0;
6014         rsp_els->entry_status = 0;
6015         rsp_els->handle = 0;
6016         rsp_els->nport_handle = purex->nport_handle;
6017         rsp_els->tx_dsd_count = cpu_to_le16(1);
6018         rsp_els->vp_index = purex->vp_idx;
6019         rsp_els->sof_type = EST_SOFI3;
6020         rsp_els->rx_xchg_address = purex->rx_xchg_addr;
6021         rsp_els->rx_dsd_count = 0;
6022         rsp_els->opcode = purex->els_frame_payload[0];
6023
6024         rsp_els->d_id[0] = purex->s_id[0];
6025         rsp_els->d_id[1] = purex->s_id[1];
6026         rsp_els->d_id[2] = purex->s_id[2];
6027
6028         rsp_els->control_flags = cpu_to_le16(EPD_ELS_ACC);
6029         rsp_els->rx_byte_count = 0;
6030         rsp_els->tx_byte_count = cpu_to_le32(rsp_payload_length);
6031
6032         put_unaligned_le64(rsp_payload_dma, &rsp_els->tx_address);
6033         rsp_els->tx_len = rsp_els->tx_byte_count;
6034
6035         rsp_els->rx_address = 0;
6036         rsp_els->rx_len = 0;
6037
6038         /* Prepare Response Payload */
6039         rsp_payload->hdr.cmd = cpu_to_be32(0x2 << 24); /* LS_ACC */
6040         rsp_payload->hdr.len = cpu_to_be32(le32_to_cpu(rsp_els->tx_byte_count) -
6041                                            sizeof(rsp_payload->hdr));
6042
6043         /* Link service Request Info Descriptor */
6044         rsp_payload->ls_req_info_desc.desc_tag = cpu_to_be32(0x1);
6045         rsp_payload->ls_req_info_desc.desc_len =
6046             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc));
6047         rsp_payload->ls_req_info_desc.req_payload_word_0 =
6048             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6049
6050         /* Link service Request Info Descriptor 2 */
6051         rsp_payload->ls_req_info_desc2.desc_tag = cpu_to_be32(0x1);
6052         rsp_payload->ls_req_info_desc2.desc_len =
6053             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc2));
6054         rsp_payload->ls_req_info_desc2.req_payload_word_0 =
6055             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6056
6057
6058         rsp_payload->sfp_diag_desc.desc_tag = cpu_to_be32(0x10000);
6059         rsp_payload->sfp_diag_desc.desc_len =
6060                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->sfp_diag_desc));
6061
6062         if (sfp) {
6063                 /* SFP Flags */
6064                 memset(sfp, 0, SFP_RTDI_LEN);
6065                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x7, 2, 0);
6066                 if (!rval) {
6067                         /* SFP Flags bits 3-0: Port Tx Laser Type */
6068                         if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
6069                                 sfp_flags |= BIT_0; /* short wave */
6070                         else if (sfp[0] & BIT_1)
6071                                 sfp_flags |= BIT_1; /* long wave 1310nm */
6072                         else if (sfp[1] & BIT_4)
6073                                 sfp_flags |= BIT_1|BIT_0; /* long wave 1550nm */
6074                 }
6075
6076                 /* SFP Type */
6077                 memset(sfp, 0, SFP_RTDI_LEN);
6078                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x0, 1, 0);
6079                 if (!rval) {
6080                         sfp_flags |= BIT_4; /* optical */
6081                         if (sfp[0] == 0x3)
6082                                 sfp_flags |= BIT_6; /* sfp+ */
6083                 }
6084
6085                 rsp_payload->sfp_diag_desc.sfp_flags = cpu_to_be16(sfp_flags);
6086
6087                 /* SFP Diagnostics */
6088                 memset(sfp, 0, SFP_RTDI_LEN);
6089                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0x60, 10, 0);
6090                 if (!rval) {
6091                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6092                         rsp_payload->sfp_diag_desc.temperature = trx[0];
6093                         rsp_payload->sfp_diag_desc.vcc = trx[1];
6094                         rsp_payload->sfp_diag_desc.tx_bias = trx[2];
6095                         rsp_payload->sfp_diag_desc.tx_power = trx[3];
6096                         rsp_payload->sfp_diag_desc.rx_power = trx[4];
6097                 }
6098         }
6099
6100         /* Port Speed Descriptor */
6101         rsp_payload->port_speed_desc.desc_tag = cpu_to_be32(0x10001);
6102         rsp_payload->port_speed_desc.desc_len =
6103             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_speed_desc));
6104         rsp_payload->port_speed_desc.speed_capab = cpu_to_be16(
6105             qla25xx_fdmi_port_speed_capability(ha));
6106         rsp_payload->port_speed_desc.operating_speed = cpu_to_be16(
6107             qla25xx_fdmi_port_speed_currently(ha));
6108
6109         /* Link Error Status Descriptor */
6110         rsp_payload->ls_err_desc.desc_tag = cpu_to_be32(0x10002);
6111         rsp_payload->ls_err_desc.desc_len =
6112                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_err_desc));
6113
6114         if (stat) {
6115                 rval = qla24xx_get_isp_stats(vha, stat, stat_dma, 0);
6116                 if (!rval) {
6117                         rsp_payload->ls_err_desc.link_fail_cnt =
6118                             cpu_to_be32(le32_to_cpu(stat->link_fail_cnt));
6119                         rsp_payload->ls_err_desc.loss_sync_cnt =
6120                             cpu_to_be32(le32_to_cpu(stat->loss_sync_cnt));
6121                         rsp_payload->ls_err_desc.loss_sig_cnt =
6122                             cpu_to_be32(le32_to_cpu(stat->loss_sig_cnt));
6123                         rsp_payload->ls_err_desc.prim_seq_err_cnt =
6124                             cpu_to_be32(le32_to_cpu(stat->prim_seq_err_cnt));
6125                         rsp_payload->ls_err_desc.inval_xmit_word_cnt =
6126                             cpu_to_be32(le32_to_cpu(stat->inval_xmit_word_cnt));
6127                         rsp_payload->ls_err_desc.inval_crc_cnt =
6128                             cpu_to_be32(le32_to_cpu(stat->inval_crc_cnt));
6129                         rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6;
6130                 }
6131         }
6132
6133         /* Portname Descriptor */
6134         rsp_payload->port_name_diag_desc.desc_tag = cpu_to_be32(0x10003);
6135         rsp_payload->port_name_diag_desc.desc_len =
6136             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_diag_desc));
6137         memcpy(rsp_payload->port_name_diag_desc.WWNN,
6138             vha->node_name,
6139             sizeof(rsp_payload->port_name_diag_desc.WWNN));
6140         memcpy(rsp_payload->port_name_diag_desc.WWPN,
6141             vha->port_name,
6142             sizeof(rsp_payload->port_name_diag_desc.WWPN));
6143
6144         /* F-Port Portname Descriptor */
6145         rsp_payload->port_name_direct_desc.desc_tag = cpu_to_be32(0x10003);
6146         rsp_payload->port_name_direct_desc.desc_len =
6147             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_direct_desc));
6148         memcpy(rsp_payload->port_name_direct_desc.WWNN,
6149             vha->fabric_node_name,
6150             sizeof(rsp_payload->port_name_direct_desc.WWNN));
6151         memcpy(rsp_payload->port_name_direct_desc.WWPN,
6152             vha->fabric_port_name,
6153             sizeof(rsp_payload->port_name_direct_desc.WWPN));
6154
6155         /* Bufer Credit Descriptor */
6156         rsp_payload->buffer_credit_desc.desc_tag = cpu_to_be32(0x10006);
6157         rsp_payload->buffer_credit_desc.desc_len =
6158                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->buffer_credit_desc));
6159         rsp_payload->buffer_credit_desc.fcport_b2b = 0;
6160         rsp_payload->buffer_credit_desc.attached_fcport_b2b = cpu_to_be32(0);
6161         rsp_payload->buffer_credit_desc.fcport_rtt = cpu_to_be32(0);
6162
6163         if (ha->flags.plogi_template_valid) {
6164                 uint32_t tmp =
6165                 be16_to_cpu(ha->plogi_els_payld.fl_csp.sp_bb_cred);
6166                 rsp_payload->buffer_credit_desc.fcport_b2b = cpu_to_be32(tmp);
6167         }
6168
6169         if (rsp_payload_length < sizeof(*rsp_payload))
6170                 goto send;
6171
6172         /* Optical Element Descriptor, Temperature */
6173         rsp_payload->optical_elmt_desc[0].desc_tag = cpu_to_be32(0x10007);
6174         rsp_payload->optical_elmt_desc[0].desc_len =
6175                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6176         /* Optical Element Descriptor, Voltage */
6177         rsp_payload->optical_elmt_desc[1].desc_tag = cpu_to_be32(0x10007);
6178         rsp_payload->optical_elmt_desc[1].desc_len =
6179                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6180         /* Optical Element Descriptor, Tx Bias Current */
6181         rsp_payload->optical_elmt_desc[2].desc_tag = cpu_to_be32(0x10007);
6182         rsp_payload->optical_elmt_desc[2].desc_len =
6183                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6184         /* Optical Element Descriptor, Tx Power */
6185         rsp_payload->optical_elmt_desc[3].desc_tag = cpu_to_be32(0x10007);
6186         rsp_payload->optical_elmt_desc[3].desc_len =
6187                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6188         /* Optical Element Descriptor, Rx Power */
6189         rsp_payload->optical_elmt_desc[4].desc_tag = cpu_to_be32(0x10007);
6190         rsp_payload->optical_elmt_desc[4].desc_len =
6191                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6192
6193         if (sfp) {
6194                 memset(sfp, 0, SFP_RTDI_LEN);
6195                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0, 64, 0);
6196                 if (!rval) {
6197                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6198
6199                         /* Optical Element Descriptor, Temperature */
6200                         rsp_payload->optical_elmt_desc[0].high_alarm = trx[0];
6201                         rsp_payload->optical_elmt_desc[0].low_alarm = trx[1];
6202                         rsp_payload->optical_elmt_desc[0].high_warn = trx[2];
6203                         rsp_payload->optical_elmt_desc[0].low_warn = trx[3];
6204                         rsp_payload->optical_elmt_desc[0].element_flags =
6205                             cpu_to_be32(1 << 28);
6206
6207                         /* Optical Element Descriptor, Voltage */
6208                         rsp_payload->optical_elmt_desc[1].high_alarm = trx[4];
6209                         rsp_payload->optical_elmt_desc[1].low_alarm = trx[5];
6210                         rsp_payload->optical_elmt_desc[1].high_warn = trx[6];
6211                         rsp_payload->optical_elmt_desc[1].low_warn = trx[7];
6212                         rsp_payload->optical_elmt_desc[1].element_flags =
6213                             cpu_to_be32(2 << 28);
6214
6215                         /* Optical Element Descriptor, Tx Bias Current */
6216                         rsp_payload->optical_elmt_desc[2].high_alarm = trx[8];
6217                         rsp_payload->optical_elmt_desc[2].low_alarm = trx[9];
6218                         rsp_payload->optical_elmt_desc[2].high_warn = trx[10];
6219                         rsp_payload->optical_elmt_desc[2].low_warn = trx[11];
6220                         rsp_payload->optical_elmt_desc[2].element_flags =
6221                             cpu_to_be32(3 << 28);
6222
6223                         /* Optical Element Descriptor, Tx Power */
6224                         rsp_payload->optical_elmt_desc[3].high_alarm = trx[12];
6225                         rsp_payload->optical_elmt_desc[3].low_alarm = trx[13];
6226                         rsp_payload->optical_elmt_desc[3].high_warn = trx[14];
6227                         rsp_payload->optical_elmt_desc[3].low_warn = trx[15];
6228                         rsp_payload->optical_elmt_desc[3].element_flags =
6229                             cpu_to_be32(4 << 28);
6230
6231                         /* Optical Element Descriptor, Rx Power */
6232                         rsp_payload->optical_elmt_desc[4].high_alarm = trx[16];
6233                         rsp_payload->optical_elmt_desc[4].low_alarm = trx[17];
6234                         rsp_payload->optical_elmt_desc[4].high_warn = trx[18];
6235                         rsp_payload->optical_elmt_desc[4].low_warn = trx[19];
6236                         rsp_payload->optical_elmt_desc[4].element_flags =
6237                             cpu_to_be32(5 << 28);
6238                 }
6239
6240                 memset(sfp, 0, SFP_RTDI_LEN);
6241                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 112, 64, 0);
6242                 if (!rval) {
6243                         /* Temperature high/low alarm/warning */
6244                         rsp_payload->optical_elmt_desc[0].element_flags |=
6245                             cpu_to_be32(
6246                                 (sfp[0] >> 7 & 1) << 3 |
6247                                 (sfp[0] >> 6 & 1) << 2 |
6248                                 (sfp[4] >> 7 & 1) << 1 |
6249                                 (sfp[4] >> 6 & 1) << 0);
6250
6251                         /* Voltage high/low alarm/warning */
6252                         rsp_payload->optical_elmt_desc[1].element_flags |=
6253                             cpu_to_be32(
6254                                 (sfp[0] >> 5 & 1) << 3 |
6255                                 (sfp[0] >> 4 & 1) << 2 |
6256                                 (sfp[4] >> 5 & 1) << 1 |
6257                                 (sfp[4] >> 4 & 1) << 0);
6258
6259                         /* Tx Bias Current high/low alarm/warning */
6260                         rsp_payload->optical_elmt_desc[2].element_flags |=
6261                             cpu_to_be32(
6262                                 (sfp[0] >> 3 & 1) << 3 |
6263                                 (sfp[0] >> 2 & 1) << 2 |
6264                                 (sfp[4] >> 3 & 1) << 1 |
6265                                 (sfp[4] >> 2 & 1) << 0);
6266
6267                         /* Tx Power high/low alarm/warning */
6268                         rsp_payload->optical_elmt_desc[3].element_flags |=
6269                             cpu_to_be32(
6270                                 (sfp[0] >> 1 & 1) << 3 |
6271                                 (sfp[0] >> 0 & 1) << 2 |
6272                                 (sfp[4] >> 1 & 1) << 1 |
6273                                 (sfp[4] >> 0 & 1) << 0);
6274
6275                         /* Rx Power high/low alarm/warning */
6276                         rsp_payload->optical_elmt_desc[4].element_flags |=
6277                             cpu_to_be32(
6278                                 (sfp[1] >> 7 & 1) << 3 |
6279                                 (sfp[1] >> 6 & 1) << 2 |
6280                                 (sfp[5] >> 7 & 1) << 1 |
6281                                 (sfp[5] >> 6 & 1) << 0);
6282                 }
6283         }
6284
6285         /* Optical Product Data Descriptor */
6286         rsp_payload->optical_prod_desc.desc_tag = cpu_to_be32(0x10008);
6287         rsp_payload->optical_prod_desc.desc_len =
6288                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->optical_prod_desc));
6289
6290         if (sfp) {
6291                 memset(sfp, 0, SFP_RTDI_LEN);
6292                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 20, 64, 0);
6293                 if (!rval) {
6294                         memcpy(rsp_payload->optical_prod_desc.vendor_name,
6295                             sfp + 0,
6296                             sizeof(rsp_payload->optical_prod_desc.vendor_name));
6297                         memcpy(rsp_payload->optical_prod_desc.part_number,
6298                             sfp + 20,
6299                             sizeof(rsp_payload->optical_prod_desc.part_number));
6300                         memcpy(rsp_payload->optical_prod_desc.revision,
6301                             sfp + 36,
6302                             sizeof(rsp_payload->optical_prod_desc.revision));
6303                         memcpy(rsp_payload->optical_prod_desc.serial_number,
6304                             sfp + 48,
6305                             sizeof(rsp_payload->optical_prod_desc.serial_number));
6306                 }
6307
6308                 memset(sfp, 0, SFP_RTDI_LEN);
6309                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 84, 8, 0);
6310                 if (!rval) {
6311                         memcpy(rsp_payload->optical_prod_desc.date,
6312                             sfp + 0,
6313                             sizeof(rsp_payload->optical_prod_desc.date));
6314                 }
6315         }
6316
6317 send:
6318         ql_dbg(ql_dbg_init, vha, 0x0183,
6319             "Sending ELS Response to RDP Request...\n");
6320         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0184,
6321             "-------- ELS RSP -------\n");
6322         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0185,
6323             rsp_els, sizeof(*rsp_els));
6324         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0186,
6325             "-------- ELS RSP PAYLOAD -------\n");
6326         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0187,
6327             rsp_payload, rsp_payload_length);
6328
6329         rval = qla2x00_issue_iocb(vha, rsp_els, rsp_els_dma, 0);
6330
6331         if (rval) {
6332                 ql_log(ql_log_warn, vha, 0x0188,
6333                     "%s: iocb failed to execute -> %x\n", __func__, rval);
6334         } else if (rsp_els->comp_status) {
6335                 ql_log(ql_log_warn, vha, 0x0189,
6336                     "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6337                     __func__, rsp_els->comp_status,
6338                     rsp_els->error_subcode_1, rsp_els->error_subcode_2);
6339         } else {
6340                 ql_dbg(ql_dbg_init, vha, 0x018a, "%s: done.\n", __func__);
6341         }
6342
6343 dealloc:
6344         if (stat)
6345                 dma_free_coherent(&ha->pdev->dev, sizeof(*stat),
6346                     stat, stat_dma);
6347         if (sfp)
6348                 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6349                     sfp, sfp_dma);
6350         if (rsp_payload)
6351                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6352                     rsp_payload, rsp_payload_dma);
6353         if (rsp_els)
6354                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6355                     rsp_els, rsp_els_dma);
6356 }
6357
6358 void
6359 qla24xx_free_purex_item(struct purex_item *item)
6360 {
6361         if (item == &item->vha->default_item)
6362                 memset(&item->vha->default_item, 0, sizeof(struct purex_item));
6363         else
6364                 kfree(item);
6365 }
6366
6367 void qla24xx_process_purex_list(struct purex_list *list)
6368 {
6369         struct list_head head = LIST_HEAD_INIT(head);
6370         struct purex_item *item, *next;
6371         ulong flags;
6372
6373         spin_lock_irqsave(&list->lock, flags);
6374         list_splice_init(&list->head, &head);
6375         spin_unlock_irqrestore(&list->lock, flags);
6376
6377         list_for_each_entry_safe(item, next, &head, list) {
6378                 list_del(&item->list);
6379                 item->process_item(item->vha, item);
6380                 qla24xx_free_purex_item(item);
6381         }
6382 }
6383
6384 /*
6385  * Context: task, can sleep
6386  */
6387 void
6388 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
6389 {
6390 #if 0
6391         uint16_t options = (requester_id << 15) | BIT_7;
6392 #endif
6393         uint16_t retry;
6394         uint32_t data;
6395         struct qla_hw_data *ha = base_vha->hw;
6396
6397         might_sleep();
6398
6399         /* IDC-unlock implementation using driver-unlock/lock-id
6400          * remote registers
6401          */
6402         retry = 0;
6403 retry_unlock:
6404         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
6405             == QLA_SUCCESS) {
6406                 if (data == ha->portnum) {
6407                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
6408                         /* Clearing lock-id by setting 0xff */
6409                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
6410                 } else if (retry < 10) {
6411                         /* SV: XXX: IDC unlock retrying needed here? */
6412
6413                         /* Retry for IDC-unlock */
6414                         msleep(QLA83XX_WAIT_LOGIC_MS);
6415                         retry++;
6416                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
6417                             "Failed to release IDC lock, retrying=%d\n", retry);
6418                         goto retry_unlock;
6419                 }
6420         } else if (retry < 10) {
6421                 /* Retry for IDC-unlock */
6422                 msleep(QLA83XX_WAIT_LOGIC_MS);
6423                 retry++;
6424                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
6425                     "Failed to read drv-lockid, retrying=%d\n", retry);
6426                 goto retry_unlock;
6427         }
6428
6429         return;
6430
6431 #if 0
6432         /* XXX: IDC-unlock implementation using access-control mbx */
6433         retry = 0;
6434 retry_unlock2:
6435         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
6436                 if (retry < 10) {
6437                         /* Retry for IDC-unlock */
6438                         msleep(QLA83XX_WAIT_LOGIC_MS);
6439                         retry++;
6440                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
6441                             "Failed to release IDC lock, retrying=%d\n", retry);
6442                         goto retry_unlock2;
6443                 }
6444         }
6445
6446         return;
6447 #endif
6448 }
6449
6450 int
6451 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6452 {
6453         int rval = QLA_SUCCESS;
6454         struct qla_hw_data *ha = vha->hw;
6455         uint32_t drv_presence;
6456
6457         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6458         if (rval == QLA_SUCCESS) {
6459                 drv_presence |= (1 << ha->portnum);
6460                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6461                     drv_presence);
6462         }
6463
6464         return rval;
6465 }
6466
6467 int
6468 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6469 {
6470         int rval = QLA_SUCCESS;
6471
6472         qla83xx_idc_lock(vha, 0);
6473         rval = __qla83xx_set_drv_presence(vha);
6474         qla83xx_idc_unlock(vha, 0);
6475
6476         return rval;
6477 }
6478
6479 int
6480 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6481 {
6482         int rval = QLA_SUCCESS;
6483         struct qla_hw_data *ha = vha->hw;
6484         uint32_t drv_presence;
6485
6486         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6487         if (rval == QLA_SUCCESS) {
6488                 drv_presence &= ~(1 << ha->portnum);
6489                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6490                     drv_presence);
6491         }
6492
6493         return rval;
6494 }
6495
6496 int
6497 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6498 {
6499         int rval = QLA_SUCCESS;
6500
6501         qla83xx_idc_lock(vha, 0);
6502         rval = __qla83xx_clear_drv_presence(vha);
6503         qla83xx_idc_unlock(vha, 0);
6504
6505         return rval;
6506 }
6507
6508 static void
6509 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
6510 {
6511         struct qla_hw_data *ha = vha->hw;
6512         uint32_t drv_ack, drv_presence;
6513         unsigned long ack_timeout;
6514
6515         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6516         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
6517         while (1) {
6518                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6519                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6520                 if ((drv_ack & drv_presence) == drv_presence)
6521                         break;
6522
6523                 if (time_after_eq(jiffies, ack_timeout)) {
6524                         ql_log(ql_log_warn, vha, 0xb067,
6525                             "RESET ACK TIMEOUT! drv_presence=0x%x "
6526                             "drv_ack=0x%x\n", drv_presence, drv_ack);
6527                         /*
6528                          * The function(s) which did not ack in time are forced
6529                          * to withdraw any further participation in the IDC
6530                          * reset.
6531                          */
6532                         if (drv_ack != drv_presence)
6533                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6534                                     drv_ack);
6535                         break;
6536                 }
6537
6538                 qla83xx_idc_unlock(vha, 0);
6539                 msleep(1000);
6540                 qla83xx_idc_lock(vha, 0);
6541         }
6542
6543         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
6544         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
6545 }
6546
6547 static int
6548 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
6549 {
6550         int rval = QLA_SUCCESS;
6551         uint32_t idc_control;
6552
6553         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
6554         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
6555
6556         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6557         __qla83xx_get_idc_control(vha, &idc_control);
6558         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
6559         __qla83xx_set_idc_control(vha, 0);
6560
6561         qla83xx_idc_unlock(vha, 0);
6562         rval = qla83xx_restart_nic_firmware(vha);
6563         qla83xx_idc_lock(vha, 0);
6564
6565         if (rval != QLA_SUCCESS) {
6566                 ql_log(ql_log_fatal, vha, 0xb06a,
6567                     "Failed to restart NIC f/w.\n");
6568                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
6569                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
6570         } else {
6571                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
6572                     "Success in restarting nic f/w.\n");
6573                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
6574                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
6575         }
6576
6577         return rval;
6578 }
6579
6580 /* Assumes idc_lock always held on entry */
6581 int
6582 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
6583 {
6584         struct qla_hw_data *ha = base_vha->hw;
6585         int rval = QLA_SUCCESS;
6586         unsigned long dev_init_timeout;
6587         uint32_t dev_state;
6588
6589         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6590         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
6591
6592         while (1) {
6593
6594                 if (time_after_eq(jiffies, dev_init_timeout)) {
6595                         ql_log(ql_log_warn, base_vha, 0xb06e,
6596                             "Initialization TIMEOUT!\n");
6597                         /* Init timeout. Disable further NIC Core
6598                          * communication.
6599                          */
6600                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
6601                                 QLA8XXX_DEV_FAILED);
6602                         ql_log(ql_log_info, base_vha, 0xb06f,
6603                             "HW State: FAILED.\n");
6604                 }
6605
6606                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6607                 switch (dev_state) {
6608                 case QLA8XXX_DEV_READY:
6609                         if (ha->flags.nic_core_reset_owner)
6610                                 qla83xx_idc_audit(base_vha,
6611                                     IDC_AUDIT_COMPLETION);
6612                         ha->flags.nic_core_reset_owner = 0;
6613                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
6614                             "Reset_owner reset by 0x%x.\n",
6615                             ha->portnum);
6616                         goto exit;
6617                 case QLA8XXX_DEV_COLD:
6618                         if (ha->flags.nic_core_reset_owner)
6619                                 rval = qla83xx_device_bootstrap(base_vha);
6620                         else {
6621                         /* Wait for AEN to change device-state */
6622                                 qla83xx_idc_unlock(base_vha, 0);
6623                                 msleep(1000);
6624                                 qla83xx_idc_lock(base_vha, 0);
6625                         }
6626                         break;
6627                 case QLA8XXX_DEV_INITIALIZING:
6628                         /* Wait for AEN to change device-state */
6629                         qla83xx_idc_unlock(base_vha, 0);
6630                         msleep(1000);
6631                         qla83xx_idc_lock(base_vha, 0);
6632                         break;
6633                 case QLA8XXX_DEV_NEED_RESET:
6634                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6635                                 qla83xx_need_reset_handler(base_vha);
6636                         else {
6637                                 /* Wait for AEN to change device-state */
6638                                 qla83xx_idc_unlock(base_vha, 0);
6639                                 msleep(1000);
6640                                 qla83xx_idc_lock(base_vha, 0);
6641                         }
6642                         /* reset timeout value after need reset handler */
6643                         dev_init_timeout = jiffies +
6644                             (ha->fcoe_dev_init_timeout * HZ);
6645                         break;
6646                 case QLA8XXX_DEV_NEED_QUIESCENT:
6647                         /* XXX: DEBUG for now */
6648                         qla83xx_idc_unlock(base_vha, 0);
6649                         msleep(1000);
6650                         qla83xx_idc_lock(base_vha, 0);
6651                         break;
6652                 case QLA8XXX_DEV_QUIESCENT:
6653                         /* XXX: DEBUG for now */
6654                         if (ha->flags.quiesce_owner)
6655                                 goto exit;
6656
6657                         qla83xx_idc_unlock(base_vha, 0);
6658                         msleep(1000);
6659                         qla83xx_idc_lock(base_vha, 0);
6660                         dev_init_timeout = jiffies +
6661                             (ha->fcoe_dev_init_timeout * HZ);
6662                         break;
6663                 case QLA8XXX_DEV_FAILED:
6664                         if (ha->flags.nic_core_reset_owner)
6665                                 qla83xx_idc_audit(base_vha,
6666                                     IDC_AUDIT_COMPLETION);
6667                         ha->flags.nic_core_reset_owner = 0;
6668                         __qla83xx_clear_drv_presence(base_vha);
6669                         qla83xx_idc_unlock(base_vha, 0);
6670                         qla8xxx_dev_failed_handler(base_vha);
6671                         rval = QLA_FUNCTION_FAILED;
6672                         qla83xx_idc_lock(base_vha, 0);
6673                         goto exit;
6674                 case QLA8XXX_BAD_VALUE:
6675                         qla83xx_idc_unlock(base_vha, 0);
6676                         msleep(1000);
6677                         qla83xx_idc_lock(base_vha, 0);
6678                         break;
6679                 default:
6680                         ql_log(ql_log_warn, base_vha, 0xb071,
6681                             "Unknown Device State: %x.\n", dev_state);
6682                         qla83xx_idc_unlock(base_vha, 0);
6683                         qla8xxx_dev_failed_handler(base_vha);
6684                         rval = QLA_FUNCTION_FAILED;
6685                         qla83xx_idc_lock(base_vha, 0);
6686                         goto exit;
6687                 }
6688         }
6689
6690 exit:
6691         return rval;
6692 }
6693
6694 void
6695 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6696 {
6697         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6698             board_disable);
6699         struct pci_dev *pdev = ha->pdev;
6700         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6701
6702         ql_log(ql_log_warn, base_vha, 0x015b,
6703             "Disabling adapter.\n");
6704
6705         if (!atomic_read(&pdev->enable_cnt)) {
6706                 ql_log(ql_log_info, base_vha, 0xfffc,
6707                     "PCI device disabled, no action req for PCI error=%lx\n",
6708                     base_vha->pci_flags);
6709                 return;
6710         }
6711
6712         /*
6713          * if UNLOADING flag is already set, then continue unload,
6714          * where it was set first.
6715          */
6716         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6717                 return;
6718
6719         qla2x00_wait_for_sess_deletion(base_vha);
6720
6721         qla2x00_delete_all_vps(ha, base_vha);
6722
6723         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6724
6725         qla2x00_dfs_remove(base_vha);
6726
6727         qla84xx_put_chip(base_vha);
6728
6729         if (base_vha->timer_active)
6730                 qla2x00_stop_timer(base_vha);
6731
6732         base_vha->flags.online = 0;
6733
6734         qla2x00_destroy_deferred_work(ha);
6735
6736         /*
6737          * Do not try to stop beacon blink as it will issue a mailbox
6738          * command.
6739          */
6740         qla2x00_free_sysfs_attr(base_vha, false);
6741
6742         fc_remove_host(base_vha->host);
6743
6744         scsi_remove_host(base_vha->host);
6745
6746         base_vha->flags.init_done = 0;
6747         qla25xx_delete_queues(base_vha);
6748         qla2x00_free_fcports(base_vha);
6749         qla2x00_free_irqs(base_vha);
6750         qla2x00_mem_free(ha);
6751         qla82xx_md_free(base_vha);
6752         qla2x00_free_queues(ha);
6753
6754         qla2x00_unmap_iobases(ha);
6755
6756         pci_release_selected_regions(ha->pdev, ha->bars);
6757         pci_disable_pcie_error_reporting(pdev);
6758         pci_disable_device(pdev);
6759
6760         /*
6761          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6762          */
6763 }
6764
6765 /**************************************************************************
6766 * qla2x00_do_dpc
6767 *   This kernel thread is a task that is schedule by the interrupt handler
6768 *   to perform the background processing for interrupts.
6769 *
6770 * Notes:
6771 * This task always run in the context of a kernel thread.  It
6772 * is kick-off by the driver's detect code and starts up
6773 * up one per adapter. It immediately goes to sleep and waits for
6774 * some fibre event.  When either the interrupt handler or
6775 * the timer routine detects a event it will one of the task
6776 * bits then wake us up.
6777 **************************************************************************/
6778 static int
6779 qla2x00_do_dpc(void *data)
6780 {
6781         scsi_qla_host_t *base_vha;
6782         struct qla_hw_data *ha;
6783         uint32_t online;
6784         struct qla_qpair *qpair;
6785
6786         ha = (struct qla_hw_data *)data;
6787         base_vha = pci_get_drvdata(ha->pdev);
6788
6789         set_user_nice(current, MIN_NICE);
6790
6791         set_current_state(TASK_INTERRUPTIBLE);
6792         while (!kthread_should_stop()) {
6793                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6794                     "DPC handler sleeping.\n");
6795
6796                 schedule();
6797
6798                 if (test_and_clear_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags))
6799                         qla_pci_set_eeh_busy(base_vha);
6800
6801                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6802                         goto end_loop;
6803
6804                 if (ha->flags.eeh_busy) {
6805                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6806                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6807                         goto end_loop;
6808                 }
6809
6810                 ha->dpc_active = 1;
6811
6812                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6813                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6814                     base_vha->dpc_flags);
6815
6816                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6817                         break;
6818
6819                 if (IS_P3P_TYPE(ha)) {
6820                         if (IS_QLA8044(ha)) {
6821                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6822                                         &base_vha->dpc_flags)) {
6823                                         qla8044_idc_lock(ha);
6824                                         qla8044_wr_direct(base_vha,
6825                                                 QLA8044_CRB_DEV_STATE_INDEX,
6826                                                 QLA8XXX_DEV_FAILED);
6827                                         qla8044_idc_unlock(ha);
6828                                         ql_log(ql_log_info, base_vha, 0x4004,
6829                                                 "HW State: FAILED.\n");
6830                                         qla8044_device_state_handler(base_vha);
6831                                         continue;
6832                                 }
6833
6834                         } else {
6835                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6836                                         &base_vha->dpc_flags)) {
6837                                         qla82xx_idc_lock(ha);
6838                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6839                                                 QLA8XXX_DEV_FAILED);
6840                                         qla82xx_idc_unlock(ha);
6841                                         ql_log(ql_log_info, base_vha, 0x0151,
6842                                                 "HW State: FAILED.\n");
6843                                         qla82xx_device_state_handler(base_vha);
6844                                         continue;
6845                                 }
6846                         }
6847
6848                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6849                                 &base_vha->dpc_flags)) {
6850
6851                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6852                                     "FCoE context reset scheduled.\n");
6853                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6854                                         &base_vha->dpc_flags))) {
6855                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6856                                                 /* FCoE-ctx reset failed.
6857                                                  * Escalate to chip-reset
6858                                                  */
6859                                                 set_bit(ISP_ABORT_NEEDED,
6860                                                         &base_vha->dpc_flags);
6861                                         }
6862                                         clear_bit(ABORT_ISP_ACTIVE,
6863                                                 &base_vha->dpc_flags);
6864                                 }
6865
6866                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6867                                     "FCoE context reset end.\n");
6868                         }
6869                 } else if (IS_QLAFX00(ha)) {
6870                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6871                                 &base_vha->dpc_flags)) {
6872                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6873                                     "Firmware Reset Recovery\n");
6874                                 if (qlafx00_reset_initialize(base_vha)) {
6875                                         /* Failed. Abort isp later. */
6876                                         if (!test_bit(UNLOADING,
6877                                             &base_vha->dpc_flags)) {
6878                                                 set_bit(ISP_UNRECOVERABLE,
6879                                                     &base_vha->dpc_flags);
6880                                                 ql_dbg(ql_dbg_dpc, base_vha,
6881                                                     0x4021,
6882                                                     "Reset Recovery Failed\n");
6883                                         }
6884                                 }
6885                         }
6886
6887                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6888                                 &base_vha->dpc_flags)) {
6889                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6890                                     "ISPFx00 Target Scan scheduled\n");
6891                                 if (qlafx00_rescan_isp(base_vha)) {
6892                                         if (!test_bit(UNLOADING,
6893                                             &base_vha->dpc_flags))
6894                                                 set_bit(ISP_UNRECOVERABLE,
6895                                                     &base_vha->dpc_flags);
6896                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6897                                             "ISPFx00 Target Scan Failed\n");
6898                                 }
6899                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6900                                     "ISPFx00 Target Scan End\n");
6901                         }
6902                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6903                                 &base_vha->dpc_flags)) {
6904                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6905                                     "ISPFx00 Host Info resend scheduled\n");
6906                                 qlafx00_fx_disc(base_vha,
6907                                     &base_vha->hw->mr.fcport,
6908                                     FXDISC_REG_HOST_INFO);
6909                         }
6910                 }
6911
6912                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6913                     &base_vha->dpc_flags)) {
6914                         /* Semantic:
6915                          *  - NO-OP -- await next ISP-ABORT. Preferred method
6916                          *             to minimize disruptions that will occur
6917                          *             when a forced chip-reset occurs.
6918                          *  - Force -- ISP-ABORT scheduled.
6919                          */
6920                         /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
6921                 }
6922
6923                 if (test_and_clear_bit
6924                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6925                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6926                         bool do_reset = true;
6927
6928                         switch (base_vha->qlini_mode) {
6929                         case QLA2XXX_INI_MODE_ENABLED:
6930                                 break;
6931                         case QLA2XXX_INI_MODE_DISABLED:
6932                                 if (!qla_tgt_mode_enabled(base_vha) &&
6933                                     !ha->flags.fw_started)
6934                                         do_reset = false;
6935                                 break;
6936                         case QLA2XXX_INI_MODE_DUAL:
6937                                 if (!qla_dual_mode_enabled(base_vha) &&
6938                                     !ha->flags.fw_started)
6939                                         do_reset = false;
6940                                 break;
6941                         default:
6942                                 break;
6943                         }
6944
6945                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6946                             &base_vha->dpc_flags))) {
6947                                 base_vha->flags.online = 1;
6948                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6949                                     "ISP abort scheduled.\n");
6950                                 if (ha->isp_ops->abort_isp(base_vha)) {
6951                                         /* failed. retry later */
6952                                         set_bit(ISP_ABORT_NEEDED,
6953                                             &base_vha->dpc_flags);
6954                                 }
6955                                 clear_bit(ABORT_ISP_ACTIVE,
6956                                                 &base_vha->dpc_flags);
6957                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6958                                     "ISP abort end.\n");
6959                         }
6960                 }
6961
6962                 if (test_bit(PROCESS_PUREX_IOCB, &base_vha->dpc_flags)) {
6963                         if (atomic_read(&base_vha->loop_state) == LOOP_READY) {
6964                                 qla24xx_process_purex_list
6965                                         (&base_vha->purex_list);
6966                                 clear_bit(PROCESS_PUREX_IOCB,
6967                                     &base_vha->dpc_flags);
6968                         }
6969                 }
6970
6971                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6972                     &base_vha->dpc_flags)) {
6973                         qla2x00_update_fcports(base_vha);
6974                 }
6975
6976                 if (IS_QLAFX00(ha))
6977                         goto loop_resync_check;
6978
6979                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6980                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6981                             "Quiescence mode scheduled.\n");
6982                         if (IS_P3P_TYPE(ha)) {
6983                                 if (IS_QLA82XX(ha))
6984                                         qla82xx_device_state_handler(base_vha);
6985                                 if (IS_QLA8044(ha))
6986                                         qla8044_device_state_handler(base_vha);
6987                                 clear_bit(ISP_QUIESCE_NEEDED,
6988                                     &base_vha->dpc_flags);
6989                                 if (!ha->flags.quiesce_owner) {
6990                                         qla2x00_perform_loop_resync(base_vha);
6991                                         if (IS_QLA82XX(ha)) {
6992                                                 qla82xx_idc_lock(ha);
6993                                                 qla82xx_clear_qsnt_ready(
6994                                                     base_vha);
6995                                                 qla82xx_idc_unlock(ha);
6996                                         } else if (IS_QLA8044(ha)) {
6997                                                 qla8044_idc_lock(ha);
6998                                                 qla8044_clear_qsnt_ready(
6999                                                     base_vha);
7000                                                 qla8044_idc_unlock(ha);
7001                                         }
7002                                 }
7003                         } else {
7004                                 clear_bit(ISP_QUIESCE_NEEDED,
7005                                     &base_vha->dpc_flags);
7006                                 qla2x00_quiesce_io(base_vha);
7007                         }
7008                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
7009                             "Quiescence mode end.\n");
7010                 }
7011
7012                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
7013                                 &base_vha->dpc_flags) &&
7014                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
7015
7016                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
7017                             "Reset marker scheduled.\n");
7018                         qla2x00_rst_aen(base_vha);
7019                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
7020                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
7021                             "Reset marker end.\n");
7022                 }
7023
7024                 /* Retry each device up to login retry count */
7025                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
7026                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
7027                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
7028
7029                         if (!base_vha->relogin_jif ||
7030                             time_after_eq(jiffies, base_vha->relogin_jif)) {
7031                                 base_vha->relogin_jif = jiffies + HZ;
7032                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
7033
7034                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
7035                                     "Relogin scheduled.\n");
7036                                 qla24xx_post_relogin_work(base_vha);
7037                         }
7038                 }
7039 loop_resync_check:
7040                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
7041                     &base_vha->dpc_flags)) {
7042
7043                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
7044                             "Loop resync scheduled.\n");
7045
7046                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
7047                             &base_vha->dpc_flags))) {
7048
7049                                 qla2x00_loop_resync(base_vha);
7050
7051                                 clear_bit(LOOP_RESYNC_ACTIVE,
7052                                                 &base_vha->dpc_flags);
7053                         }
7054
7055                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
7056                             "Loop resync end.\n");
7057                 }
7058
7059                 if (IS_QLAFX00(ha))
7060                         goto intr_on_check;
7061
7062                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
7063                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
7064                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
7065                         qla2xxx_flash_npiv_conf(base_vha);
7066                 }
7067
7068 intr_on_check:
7069                 if (!ha->interrupts_on)
7070                         ha->isp_ops->enable_intrs(ha);
7071
7072                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
7073                                         &base_vha->dpc_flags)) {
7074                         if (ha->beacon_blink_led == 1)
7075                                 ha->isp_ops->beacon_blink(base_vha);
7076                 }
7077
7078                 /* qpair online check */
7079                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
7080                     &base_vha->dpc_flags)) {
7081                         if (ha->flags.eeh_busy ||
7082                             ha->flags.pci_channel_io_perm_failure)
7083                                 online = 0;
7084                         else
7085                                 online = 1;
7086
7087                         mutex_lock(&ha->mq_lock);
7088                         list_for_each_entry(qpair, &base_vha->qp_list,
7089                             qp_list_elem)
7090                         qpair->online = online;
7091                         mutex_unlock(&ha->mq_lock);
7092                 }
7093
7094                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
7095                                        &base_vha->dpc_flags)) {
7096                         u16 threshold = ha->nvme_last_rptd_aen + ha->last_zio_threshold;
7097
7098                         if (threshold > ha->orig_fw_xcb_count)
7099                                 threshold = ha->orig_fw_xcb_count;
7100
7101                         ql_log(ql_log_info, base_vha, 0xffffff,
7102                                "SET ZIO Activity exchange threshold to %d.\n",
7103                                threshold);
7104                         if (qla27xx_set_zio_threshold(base_vha, threshold)) {
7105                                 ql_log(ql_log_info, base_vha, 0xffffff,
7106                                        "Unable to SET ZIO Activity exchange threshold to %d.\n",
7107                                        threshold);
7108                         }
7109                 }
7110
7111                 if (!IS_QLAFX00(ha))
7112                         qla2x00_do_dpc_all_vps(base_vha);
7113
7114                 if (test_and_clear_bit(N2N_LINK_RESET,
7115                         &base_vha->dpc_flags)) {
7116                         qla2x00_lip_reset(base_vha);
7117                 }
7118
7119                 ha->dpc_active = 0;
7120 end_loop:
7121                 set_current_state(TASK_INTERRUPTIBLE);
7122         } /* End of while(1) */
7123         __set_current_state(TASK_RUNNING);
7124
7125         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
7126             "DPC handler exiting.\n");
7127
7128         /*
7129          * Make sure that nobody tries to wake us up again.
7130          */
7131         ha->dpc_active = 0;
7132
7133         /* Cleanup any residual CTX SRBs. */
7134         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
7135
7136         return 0;
7137 }
7138
7139 void
7140 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
7141 {
7142         struct qla_hw_data *ha = vha->hw;
7143         struct task_struct *t = ha->dpc_thread;
7144
7145         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
7146                 wake_up_process(t);
7147 }
7148
7149 /*
7150 *  qla2x00_rst_aen
7151 *      Processes asynchronous reset.
7152 *
7153 * Input:
7154 *      ha  = adapter block pointer.
7155 */
7156 static void
7157 qla2x00_rst_aen(scsi_qla_host_t *vha)
7158 {
7159         if (vha->flags.online && !vha->flags.reset_active &&
7160             !atomic_read(&vha->loop_down_timer) &&
7161             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
7162                 do {
7163                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7164
7165                         /*
7166                          * Issue marker command only when we are going to start
7167                          * the I/O.
7168                          */
7169                         vha->marker_needed = 1;
7170                 } while (!atomic_read(&vha->loop_down_timer) &&
7171                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
7172         }
7173 }
7174
7175 static bool qla_do_heartbeat(struct scsi_qla_host *vha)
7176 {
7177         struct qla_hw_data *ha = vha->hw;
7178         u32 cmpl_cnt;
7179         u16 i;
7180         bool do_heartbeat = false;
7181
7182         /*
7183          * Allow do_heartbeat only if we don’t have any active interrupts,
7184          * but there are still IOs outstanding with firmware.
7185          */
7186         cmpl_cnt = ha->base_qpair->cmd_completion_cnt;
7187         if (cmpl_cnt == ha->base_qpair->prev_completion_cnt &&
7188             cmpl_cnt != ha->base_qpair->cmd_cnt) {
7189                 do_heartbeat = true;
7190                 goto skip;
7191         }
7192         ha->base_qpair->prev_completion_cnt = cmpl_cnt;
7193
7194         for (i = 0; i < ha->max_qpairs; i++) {
7195                 if (ha->queue_pair_map[i]) {
7196                         cmpl_cnt = ha->queue_pair_map[i]->cmd_completion_cnt;
7197                         if (cmpl_cnt == ha->queue_pair_map[i]->prev_completion_cnt &&
7198                             cmpl_cnt != ha->queue_pair_map[i]->cmd_cnt) {
7199                                 do_heartbeat = true;
7200                                 break;
7201                         }
7202                         ha->queue_pair_map[i]->prev_completion_cnt = cmpl_cnt;
7203                 }
7204         }
7205
7206 skip:
7207         return do_heartbeat;
7208 }
7209
7210 static void qla_heart_beat(struct scsi_qla_host *vha, u16 dpc_started)
7211 {
7212         struct qla_hw_data *ha = vha->hw;
7213
7214         if (vha->vp_idx)
7215                 return;
7216
7217         if (vha->hw->flags.eeh_busy || qla2x00_chip_is_down(vha))
7218                 return;
7219
7220         /*
7221          * dpc thread cannot run if heartbeat is running at the same time.
7222          * We also do not want to starve heartbeat task. Therefore, do
7223          * heartbeat task at least once every 5 seconds.
7224          */
7225         if (dpc_started &&
7226             time_before(jiffies, ha->last_heartbeat_run_jiffies + 5 * HZ))
7227                 return;
7228
7229         if (qla_do_heartbeat(vha)) {
7230                 ha->last_heartbeat_run_jiffies = jiffies;
7231                 queue_work(ha->wq, &ha->heartbeat_work);
7232         }
7233 }
7234
7235 /**************************************************************************
7236 *   qla2x00_timer
7237 *
7238 * Description:
7239 *   One second timer
7240 *
7241 * Context: Interrupt
7242 ***************************************************************************/
7243 void
7244 qla2x00_timer(struct timer_list *t)
7245 {
7246         scsi_qla_host_t *vha = from_timer(vha, t, timer);
7247         unsigned long   cpu_flags = 0;
7248         int             start_dpc = 0;
7249         int             index;
7250         srb_t           *sp;
7251         uint16_t        w;
7252         struct qla_hw_data *ha = vha->hw;
7253         struct req_que *req;
7254         unsigned long flags;
7255         fc_port_t *fcport = NULL;
7256
7257         if (ha->flags.eeh_busy) {
7258                 ql_dbg(ql_dbg_timer, vha, 0x6000,
7259                     "EEH = %d, restarting timer.\n",
7260                     ha->flags.eeh_busy);
7261                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
7262                 return;
7263         }
7264
7265         /*
7266          * Hardware read to raise pending EEH errors during mailbox waits. If
7267          * the read returns -1 then disable the board.
7268          */
7269         if (!pci_channel_offline(ha->pdev)) {
7270                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
7271                 qla2x00_check_reg16_for_disconnect(vha, w);
7272         }
7273
7274         /* Make sure qla82xx_watchdog is run only for physical port */
7275         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
7276                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
7277                         start_dpc++;
7278                 if (IS_QLA82XX(ha))
7279                         qla82xx_watchdog(vha);
7280                 else if (IS_QLA8044(ha))
7281                         qla8044_watchdog(vha);
7282         }
7283
7284         if (!vha->vp_idx && IS_QLAFX00(ha))
7285                 qlafx00_timer_routine(vha);
7286
7287         if (vha->link_down_time < QLA2XX_MAX_LINK_DOWN_TIME)
7288                 vha->link_down_time++;
7289
7290         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
7291         list_for_each_entry(fcport, &vha->vp_fcports, list) {
7292                 if (fcport->tgt_link_down_time < QLA2XX_MAX_LINK_DOWN_TIME)
7293                         fcport->tgt_link_down_time++;
7294         }
7295         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
7296
7297         /* Loop down handler. */
7298         if (atomic_read(&vha->loop_down_timer) > 0 &&
7299             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
7300             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
7301                 && vha->flags.online) {
7302
7303                 if (atomic_read(&vha->loop_down_timer) ==
7304                     vha->loop_down_abort_time) {
7305
7306                         ql_log(ql_log_info, vha, 0x6008,
7307                             "Loop down - aborting the queues before time expires.\n");
7308
7309                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
7310                                 atomic_set(&vha->loop_state, LOOP_DEAD);
7311
7312                         /*
7313                          * Schedule an ISP abort to return any FCP2-device
7314                          * commands.
7315                          */
7316                         /* NPIV - scan physical port only */
7317                         if (!vha->vp_idx) {
7318                                 spin_lock_irqsave(&ha->hardware_lock,
7319                                     cpu_flags);
7320                                 req = ha->req_q_map[0];
7321                                 for (index = 1;
7322                                     index < req->num_outstanding_cmds;
7323                                     index++) {
7324                                         fc_port_t *sfcp;
7325
7326                                         sp = req->outstanding_cmds[index];
7327                                         if (!sp)
7328                                                 continue;
7329                                         if (sp->cmd_type != TYPE_SRB)
7330                                                 continue;
7331                                         if (sp->type != SRB_SCSI_CMD)
7332                                                 continue;
7333                                         sfcp = sp->fcport;
7334                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
7335                                                 continue;
7336
7337                                         if (IS_QLA82XX(ha))
7338                                                 set_bit(FCOE_CTX_RESET_NEEDED,
7339                                                         &vha->dpc_flags);
7340                                         else
7341                                                 set_bit(ISP_ABORT_NEEDED,
7342                                                         &vha->dpc_flags);
7343                                         break;
7344                                 }
7345                                 spin_unlock_irqrestore(&ha->hardware_lock,
7346                                                                 cpu_flags);
7347                         }
7348                         start_dpc++;
7349                 }
7350
7351                 /* if the loop has been down for 4 minutes, reinit adapter */
7352                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
7353                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
7354                                 ql_log(ql_log_warn, vha, 0x6009,
7355                                     "Loop down - aborting ISP.\n");
7356
7357                                 if (IS_QLA82XX(ha))
7358                                         set_bit(FCOE_CTX_RESET_NEEDED,
7359                                                 &vha->dpc_flags);
7360                                 else
7361                                         set_bit(ISP_ABORT_NEEDED,
7362                                                 &vha->dpc_flags);
7363                         }
7364                 }
7365                 ql_dbg(ql_dbg_timer, vha, 0x600a,
7366                     "Loop down - seconds remaining %d.\n",
7367                     atomic_read(&vha->loop_down_timer));
7368         }
7369         /* Check if beacon LED needs to be blinked for physical host only */
7370         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
7371                 /* There is no beacon_blink function for ISP82xx */
7372                 if (!IS_P3P_TYPE(ha)) {
7373                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
7374                         start_dpc++;
7375                 }
7376         }
7377
7378         /* check if edif running */
7379         if (vha->hw->flags.edif_enabled)
7380                 qla_edif_timer(vha);
7381
7382         /* Process any deferred work. */
7383         if (!list_empty(&vha->work_list)) {
7384                 unsigned long flags;
7385                 bool q = false;
7386
7387                 spin_lock_irqsave(&vha->work_lock, flags);
7388                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
7389                         q = true;
7390                 spin_unlock_irqrestore(&vha->work_lock, flags);
7391                 if (q)
7392                         queue_work(vha->hw->wq, &vha->iocb_work);
7393         }
7394
7395         /*
7396          * FC-NVME
7397          * see if the active AEN count has changed from what was last reported.
7398          */
7399         index = atomic_read(&ha->nvme_active_aen_cnt);
7400         if (!vha->vp_idx &&
7401             (index != ha->nvme_last_rptd_aen) &&
7402             ha->zio_mode == QLA_ZIO_MODE_6 &&
7403             !ha->flags.host_shutting_down) {
7404                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
7405                 ql_log(ql_log_info, vha, 0x3002,
7406                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7407                     ha->nvme_last_rptd_aen);
7408                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7409                 start_dpc++;
7410         }
7411
7412         if (!vha->vp_idx &&
7413             atomic_read(&ha->zio_threshold) != ha->last_zio_threshold &&
7414             IS_ZIO_THRESHOLD_CAPABLE(ha)) {
7415                 ql_log(ql_log_info, vha, 0x3002,
7416                     "Sched: Set ZIO exchange threshold to %d.\n",
7417                     ha->last_zio_threshold);
7418                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
7419                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7420                 start_dpc++;
7421         }
7422
7423         /* borrowing w to signify dpc will run */
7424         w = 0;
7425         /* Schedule the DPC routine if needed */
7426         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
7427             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
7428             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
7429             start_dpc ||
7430             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
7431             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
7432             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
7433             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
7434             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
7435             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
7436             test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) {
7437                 ql_dbg(ql_dbg_timer, vha, 0x600b,
7438                     "isp_abort_needed=%d loop_resync_needed=%d "
7439                     "fcport_update_needed=%d start_dpc=%d "
7440                     "reset_marker_needed=%d",
7441                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
7442                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
7443                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
7444                     start_dpc,
7445                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
7446                 ql_dbg(ql_dbg_timer, vha, 0x600c,
7447                     "beacon_blink_needed=%d isp_unrecoverable=%d "
7448                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7449                     "relogin_needed=%d, Process_purex_iocb=%d.\n",
7450                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
7451                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
7452                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
7453                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
7454                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
7455                     test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags));
7456                 qla2xxx_wake_dpc(vha);
7457                 w = 1;
7458         }
7459
7460         qla_heart_beat(vha, w);
7461
7462         qla2x00_restart_timer(vha, WATCH_INTERVAL);
7463 }
7464
7465 /* Firmware interface routines. */
7466
7467 #define FW_ISP21XX      0
7468 #define FW_ISP22XX      1
7469 #define FW_ISP2300      2
7470 #define FW_ISP2322      3
7471 #define FW_ISP24XX      4
7472 #define FW_ISP25XX      5
7473 #define FW_ISP81XX      6
7474 #define FW_ISP82XX      7
7475 #define FW_ISP2031      8
7476 #define FW_ISP8031      9
7477 #define FW_ISP27XX      10
7478 #define FW_ISP28XX      11
7479
7480 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
7481 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
7482 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
7483 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
7484 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
7485 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
7486 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
7487 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
7488 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
7489 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
7490 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
7491 #define FW_FILE_ISP28XX "/*(DEBLOBBED)*/"
7492
7493
7494 static DEFINE_MUTEX(qla_fw_lock);
7495
7496 static struct fw_blob qla_fw_blobs[] = {
7497         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
7498         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
7499         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
7500         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
7501         { .name = FW_FILE_ISP24XX, },
7502         { .name = FW_FILE_ISP25XX, },
7503         { .name = FW_FILE_ISP81XX, },
7504         { .name = FW_FILE_ISP82XX, },
7505         { .name = FW_FILE_ISP2031, },
7506         { .name = FW_FILE_ISP8031, },
7507         { .name = FW_FILE_ISP27XX, },
7508         { .name = FW_FILE_ISP28XX, },
7509         { .name = NULL, },
7510 };
7511
7512 struct fw_blob *
7513 qla2x00_request_firmware(scsi_qla_host_t *vha)
7514 {
7515         struct qla_hw_data *ha = vha->hw;
7516         struct fw_blob *blob;
7517
7518         if (IS_QLA2100(ha)) {
7519                 blob = &qla_fw_blobs[FW_ISP21XX];
7520         } else if (IS_QLA2200(ha)) {
7521                 blob = &qla_fw_blobs[FW_ISP22XX];
7522         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
7523                 blob = &qla_fw_blobs[FW_ISP2300];
7524         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
7525                 blob = &qla_fw_blobs[FW_ISP2322];
7526         } else if (IS_QLA24XX_TYPE(ha)) {
7527                 blob = &qla_fw_blobs[FW_ISP24XX];
7528         } else if (IS_QLA25XX(ha)) {
7529                 blob = &qla_fw_blobs[FW_ISP25XX];
7530         } else if (IS_QLA81XX(ha)) {
7531                 blob = &qla_fw_blobs[FW_ISP81XX];
7532         } else if (IS_QLA82XX(ha)) {
7533                 blob = &qla_fw_blobs[FW_ISP82XX];
7534         } else if (IS_QLA2031(ha)) {
7535                 blob = &qla_fw_blobs[FW_ISP2031];
7536         } else if (IS_QLA8031(ha)) {
7537                 blob = &qla_fw_blobs[FW_ISP8031];
7538         } else if (IS_QLA27XX(ha)) {
7539                 blob = &qla_fw_blobs[FW_ISP27XX];
7540         } else if (IS_QLA28XX(ha)) {
7541                 blob = &qla_fw_blobs[FW_ISP28XX];
7542         } else {
7543                 return NULL;
7544         }
7545
7546         if (!blob->name)
7547                 return NULL;
7548
7549         mutex_lock(&qla_fw_lock);
7550         if (blob->fw)
7551                 goto out;
7552
7553         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
7554                 ql_log(ql_log_warn, vha, 0x0063,
7555                     "Failed to load firmware image (%s).\n", blob->name);
7556                 blob->fw = NULL;
7557                 blob = NULL;
7558         }
7559
7560 out:
7561         mutex_unlock(&qla_fw_lock);
7562         return blob;
7563 }
7564
7565 static void
7566 qla2x00_release_firmware(void)
7567 {
7568         struct fw_blob *blob;
7569
7570         mutex_lock(&qla_fw_lock);
7571         for (blob = qla_fw_blobs; blob->name; blob++)
7572                 release_firmware(blob->fw);
7573         mutex_unlock(&qla_fw_lock);
7574 }
7575
7576 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
7577 {
7578         struct qla_hw_data *ha = vha->hw;
7579         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
7580         struct qla_qpair *qpair = NULL;
7581         struct scsi_qla_host *vp, *tvp;
7582         fc_port_t *fcport;
7583         int i;
7584         unsigned long flags;
7585
7586         ql_dbg(ql_dbg_aer, vha, 0x9000,
7587                "%s\n", __func__);
7588         ha->chip_reset++;
7589
7590         ha->base_qpair->chip_reset = ha->chip_reset;
7591         for (i = 0; i < ha->max_qpairs; i++) {
7592                 if (ha->queue_pair_map[i])
7593                         ha->queue_pair_map[i]->chip_reset =
7594                             ha->base_qpair->chip_reset;
7595         }
7596
7597         /*
7598          * purge mailbox might take a while. Slot Reset/chip reset
7599          * will take care of the purge
7600          */
7601
7602         mutex_lock(&ha->mq_lock);
7603         ha->base_qpair->online = 0;
7604         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7605                 qpair->online = 0;
7606         wmb();
7607         mutex_unlock(&ha->mq_lock);
7608
7609         qla2x00_mark_all_devices_lost(vha);
7610
7611         spin_lock_irqsave(&ha->vport_slock, flags);
7612         list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7613                 atomic_inc(&vp->vref_count);
7614                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7615                 qla2x00_mark_all_devices_lost(vp);
7616                 spin_lock_irqsave(&ha->vport_slock, flags);
7617                 atomic_dec(&vp->vref_count);
7618         }
7619         spin_unlock_irqrestore(&ha->vport_slock, flags);
7620
7621         /* Clear all async request states across all VPs. */
7622         list_for_each_entry(fcport, &vha->vp_fcports, list)
7623                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7624
7625         spin_lock_irqsave(&ha->vport_slock, flags);
7626         list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7627                 atomic_inc(&vp->vref_count);
7628                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7629                 list_for_each_entry(fcport, &vp->vp_fcports, list)
7630                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7631                 spin_lock_irqsave(&ha->vport_slock, flags);
7632                 atomic_dec(&vp->vref_count);
7633         }
7634         spin_unlock_irqrestore(&ha->vport_slock, flags);
7635 }
7636
7637
7638 static pci_ers_result_t
7639 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
7640 {
7641         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
7642         struct qla_hw_data *ha = vha->hw;
7643         pci_ers_result_t ret = PCI_ERS_RESULT_NEED_RESET;
7644
7645         ql_log(ql_log_warn, vha, 0x9000,
7646                "PCI error detected, state %x.\n", state);
7647         ha->pci_error_state = QLA_PCI_ERR_DETECTED;
7648
7649         if (!atomic_read(&pdev->enable_cnt)) {
7650                 ql_log(ql_log_info, vha, 0xffff,
7651                         "PCI device is disabled,state %x\n", state);
7652                 ret = PCI_ERS_RESULT_NEED_RESET;
7653                 goto out;
7654         }
7655
7656         switch (state) {
7657         case pci_channel_io_normal:
7658                 qla_pci_set_eeh_busy(vha);
7659                 if (ql2xmqsupport || ql2xnvmeenable) {
7660                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7661                         qla2xxx_wake_dpc(vha);
7662                 }
7663                 ret = PCI_ERS_RESULT_CAN_RECOVER;
7664                 break;
7665         case pci_channel_io_frozen:
7666                 qla_pci_set_eeh_busy(vha);
7667                 ret = PCI_ERS_RESULT_NEED_RESET;
7668                 break;
7669         case pci_channel_io_perm_failure:
7670                 ha->flags.pci_channel_io_perm_failure = 1;
7671                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
7672                 if (ql2xmqsupport || ql2xnvmeenable) {
7673                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7674                         qla2xxx_wake_dpc(vha);
7675                 }
7676                 ret = PCI_ERS_RESULT_DISCONNECT;
7677         }
7678 out:
7679         ql_dbg(ql_dbg_aer, vha, 0x600d,
7680                "PCI error detected returning [%x].\n", ret);
7681         return ret;
7682 }
7683
7684 static pci_ers_result_t
7685 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
7686 {
7687         int risc_paused = 0;
7688         uint32_t stat;
7689         unsigned long flags;
7690         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7691         struct qla_hw_data *ha = base_vha->hw;
7692         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7693         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
7694
7695         ql_log(ql_log_warn, base_vha, 0x9000,
7696                "mmio enabled\n");
7697
7698         ha->pci_error_state = QLA_PCI_MMIO_ENABLED;
7699
7700         if (IS_QLA82XX(ha))
7701                 return PCI_ERS_RESULT_RECOVERED;
7702
7703         if (qla2x00_isp_reg_stat(ha)) {
7704                 ql_log(ql_log_info, base_vha, 0x803f,
7705                     "During mmio enabled, PCI/Register disconnect still detected.\n");
7706                 goto out;
7707         }
7708
7709         spin_lock_irqsave(&ha->hardware_lock, flags);
7710         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
7711                 stat = rd_reg_word(&reg->hccr);
7712                 if (stat & HCCR_RISC_PAUSE)
7713                         risc_paused = 1;
7714         } else if (IS_QLA23XX(ha)) {
7715                 stat = rd_reg_dword(&reg->u.isp2300.host_status);
7716                 if (stat & HSR_RISC_PAUSED)
7717                         risc_paused = 1;
7718         } else if (IS_FWI2_CAPABLE(ha)) {
7719                 stat = rd_reg_dword(&reg24->host_status);
7720                 if (stat & HSRX_RISC_PAUSED)
7721                         risc_paused = 1;
7722         }
7723         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7724
7725         if (risc_paused) {
7726                 ql_log(ql_log_info, base_vha, 0x9003,
7727                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7728                 qla2xxx_dump_fw(base_vha);
7729         }
7730 out:
7731         /* set PCI_ERS_RESULT_NEED_RESET to trigger call to qla2xxx_pci_slot_reset */
7732         ql_dbg(ql_dbg_aer, base_vha, 0x600d,
7733                "mmio enabled returning.\n");
7734         return PCI_ERS_RESULT_NEED_RESET;
7735 }
7736
7737 static pci_ers_result_t
7738 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7739 {
7740         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7741         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7742         struct qla_hw_data *ha = base_vha->hw;
7743         int rc;
7744         struct qla_qpair *qpair = NULL;
7745
7746         ql_log(ql_log_warn, base_vha, 0x9004,
7747                "Slot Reset.\n");
7748
7749         ha->pci_error_state = QLA_PCI_SLOT_RESET;
7750         /* Workaround: qla2xxx driver which access hardware earlier
7751          * needs error state to be pci_channel_io_online.
7752          * Otherwise mailbox command timesout.
7753          */
7754         pdev->error_state = pci_channel_io_normal;
7755
7756         pci_restore_state(pdev);
7757
7758         /* pci_restore_state() clears the saved_state flag of the device
7759          * save restored state which resets saved_state flag
7760          */
7761         pci_save_state(pdev);
7762
7763         if (ha->mem_only)
7764                 rc = pci_enable_device_mem(pdev);
7765         else
7766                 rc = pci_enable_device(pdev);
7767
7768         if (rc) {
7769                 ql_log(ql_log_warn, base_vha, 0x9005,
7770                     "Can't re-enable PCI device after reset.\n");
7771                 goto exit_slot_reset;
7772         }
7773
7774
7775         if (ha->isp_ops->pci_config(base_vha))
7776                 goto exit_slot_reset;
7777
7778         mutex_lock(&ha->mq_lock);
7779         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7780                 qpair->online = 1;
7781         mutex_unlock(&ha->mq_lock);
7782
7783         ha->flags.eeh_busy = 0;
7784         base_vha->flags.online = 1;
7785         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7786         ha->isp_ops->abort_isp(base_vha);
7787         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7788
7789         if (qla2x00_isp_reg_stat(ha)) {
7790                 ha->flags.eeh_busy = 1;
7791                 qla_pci_error_cleanup(base_vha);
7792                 ql_log(ql_log_warn, base_vha, 0x9005,
7793                        "Device unable to recover from PCI error.\n");
7794         } else {
7795                 ret =  PCI_ERS_RESULT_RECOVERED;
7796         }
7797
7798 exit_slot_reset:
7799         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7800             "Slot Reset returning %x.\n", ret);
7801
7802         return ret;
7803 }
7804
7805 static void
7806 qla2xxx_pci_resume(struct pci_dev *pdev)
7807 {
7808         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7809         struct qla_hw_data *ha = base_vha->hw;
7810         int ret;
7811
7812         ql_log(ql_log_warn, base_vha, 0x900f,
7813                "Pci Resume.\n");
7814
7815
7816         ret = qla2x00_wait_for_hba_online(base_vha);
7817         if (ret != QLA_SUCCESS) {
7818                 ql_log(ql_log_fatal, base_vha, 0x9002,
7819                     "The device failed to resume I/O from slot/link_reset.\n");
7820         }
7821         ha->pci_error_state = QLA_PCI_RESUME;
7822         ql_dbg(ql_dbg_aer, base_vha, 0x600d,
7823                "Pci Resume returning.\n");
7824 }
7825
7826 void qla_pci_set_eeh_busy(struct scsi_qla_host *vha)
7827 {
7828         struct qla_hw_data *ha = vha->hw;
7829         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7830         bool do_cleanup = false;
7831         unsigned long flags;
7832
7833         if (ha->flags.eeh_busy)
7834                 return;
7835
7836         spin_lock_irqsave(&base_vha->work_lock, flags);
7837         if (!ha->flags.eeh_busy) {
7838                 ha->flags.eeh_busy = 1;
7839                 do_cleanup = true;
7840         }
7841         spin_unlock_irqrestore(&base_vha->work_lock, flags);
7842
7843         if (do_cleanup)
7844                 qla_pci_error_cleanup(base_vha);
7845 }
7846
7847 /*
7848  * this routine will schedule a task to pause IO from interrupt context
7849  * if caller sees a PCIE error event (register read = 0xf's)
7850  */
7851 void qla_schedule_eeh_work(struct scsi_qla_host *vha)
7852 {
7853         struct qla_hw_data *ha = vha->hw;
7854         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7855
7856         if (ha->flags.eeh_busy)
7857                 return;
7858
7859         set_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags);
7860         qla2xxx_wake_dpc(base_vha);
7861 }
7862
7863 static void
7864 qla_pci_reset_prepare(struct pci_dev *pdev)
7865 {
7866         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7867         struct qla_hw_data *ha = base_vha->hw;
7868         struct qla_qpair *qpair;
7869
7870         ql_log(ql_log_warn, base_vha, 0xffff,
7871             "%s.\n", __func__);
7872
7873         /*
7874          * PCI FLR/function reset is about to reset the
7875          * slot. Stop the chip to stop all DMA access.
7876          * It is assumed that pci_reset_done will be called
7877          * after FLR to resume Chip operation.
7878          */
7879         ha->flags.eeh_busy = 1;
7880         mutex_lock(&ha->mq_lock);
7881         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7882                 qpair->online = 0;
7883         mutex_unlock(&ha->mq_lock);
7884
7885         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7886         qla2x00_abort_isp_cleanup(base_vha);
7887         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7888 }
7889
7890 static void
7891 qla_pci_reset_done(struct pci_dev *pdev)
7892 {
7893         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7894         struct qla_hw_data *ha = base_vha->hw;
7895         struct qla_qpair *qpair;
7896
7897         ql_log(ql_log_warn, base_vha, 0xffff,
7898             "%s.\n", __func__);
7899
7900         /*
7901          * FLR just completed by PCI layer. Resume adapter
7902          */
7903         ha->flags.eeh_busy = 0;
7904         mutex_lock(&ha->mq_lock);
7905         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7906                 qpair->online = 1;
7907         mutex_unlock(&ha->mq_lock);
7908
7909         base_vha->flags.online = 1;
7910         ha->isp_ops->abort_isp(base_vha);
7911         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7912 }
7913
7914 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7915 {
7916         int rc;
7917         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7918         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7919
7920         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7921                 rc = blk_mq_map_queues(qmap);
7922         else
7923                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7924         return rc;
7925 }
7926
7927 struct scsi_host_template qla2xxx_driver_template = {
7928         .module                 = THIS_MODULE,
7929         .name                   = QLA2XXX_DRIVER_NAME,
7930         .queuecommand           = qla2xxx_queuecommand,
7931
7932         .eh_timed_out           = fc_eh_timed_out,
7933         .eh_abort_handler       = qla2xxx_eh_abort,
7934         .eh_should_retry_cmd    = fc_eh_should_retry_cmd,
7935         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7936         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7937         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7938         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7939
7940         .slave_configure        = qla2xxx_slave_configure,
7941
7942         .slave_alloc            = qla2xxx_slave_alloc,
7943         .slave_destroy          = qla2xxx_slave_destroy,
7944         .scan_finished          = qla2xxx_scan_finished,
7945         .scan_start             = qla2xxx_scan_start,
7946         .change_queue_depth     = scsi_change_queue_depth,
7947         .map_queues             = qla2xxx_map_queues,
7948         .this_id                = -1,
7949         .cmd_per_lun            = 3,
7950         .sg_tablesize           = SG_ALL,
7951
7952         .max_sectors            = 0xFFFF,
7953         .shost_attrs            = qla2x00_host_attrs,
7954
7955         .supported_mode         = MODE_INITIATOR,
7956         .track_queue_depth      = 1,
7957         .cmd_size               = sizeof(srb_t),
7958 };
7959
7960 static const struct pci_error_handlers qla2xxx_err_handler = {
7961         .error_detected = qla2xxx_pci_error_detected,
7962         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7963         .slot_reset = qla2xxx_pci_slot_reset,
7964         .resume = qla2xxx_pci_resume,
7965         .reset_prepare = qla_pci_reset_prepare,
7966         .reset_done = qla_pci_reset_done,
7967 };
7968
7969 static struct pci_device_id qla2xxx_pci_tbl[] = {
7970         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7971         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7972         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7973         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7974         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7975         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7976         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7977         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7978         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7979         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7980         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7981         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7982         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7983         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7984         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7985         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7986         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7987         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7988         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7989         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7990         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7991         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7992         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7993         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7994         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7995         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7996         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7997         { 0 },
7998 };
7999 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
8000
8001 static struct pci_driver qla2xxx_pci_driver = {
8002         .name           = QLA2XXX_DRIVER_NAME,
8003         .driver         = {
8004                 .owner          = THIS_MODULE,
8005         },
8006         .id_table       = qla2xxx_pci_tbl,
8007         .probe          = qla2x00_probe_one,
8008         .remove         = qla2x00_remove_one,
8009         .shutdown       = qla2x00_shutdown,
8010         .err_handler    = &qla2xxx_err_handler,
8011 };
8012
8013 static const struct file_operations apidev_fops = {
8014         .owner = THIS_MODULE,
8015         .llseek = noop_llseek,
8016 };
8017
8018 /**
8019  * qla2x00_module_init - Module initialization.
8020  **/
8021 static int __init
8022 qla2x00_module_init(void)
8023 {
8024         int ret = 0;
8025
8026         BUILD_BUG_ON(sizeof(cmd_a64_entry_t) != 64);
8027         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
8028         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
8029         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
8030         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
8031         BUILD_BUG_ON(sizeof(mrk_entry_t) != 64);
8032         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
8033         BUILD_BUG_ON(sizeof(request_t) != 64);
8034         BUILD_BUG_ON(sizeof(struct abort_entry_24xx) != 64);
8035         BUILD_BUG_ON(sizeof(struct abort_iocb_entry_fx00) != 64);
8036         BUILD_BUG_ON(sizeof(struct abts_entry_24xx) != 64);
8037         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
8038         BUILD_BUG_ON(sizeof(struct access_chip_rsp_84xx) != 64);
8039         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
8040         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
8041         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
8042         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
8043         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
8044         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
8045         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
8046         BUILD_BUG_ON(sizeof(struct ct_fdmi1_hba_attributes) != 2604);
8047         BUILD_BUG_ON(sizeof(struct ct_fdmi2_hba_attributes) != 4424);
8048         BUILD_BUG_ON(sizeof(struct ct_fdmi2_port_attributes) != 4164);
8049         BUILD_BUG_ON(sizeof(struct ct_fdmi_hba_attr) != 260);
8050         BUILD_BUG_ON(sizeof(struct ct_fdmi_port_attr) != 260);
8051         BUILD_BUG_ON(sizeof(struct ct_rsp_hdr) != 16);
8052         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
8053         BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256);
8054         BUILD_BUG_ON(sizeof(struct device_reg_25xxmq) != 24);
8055         BUILD_BUG_ON(sizeof(struct device_reg_2xxx) != 256);
8056         BUILD_BUG_ON(sizeof(struct device_reg_82xx) != 1288);
8057         BUILD_BUG_ON(sizeof(struct device_reg_fx00) != 216);
8058         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
8059         BUILD_BUG_ON(sizeof(struct els_sts_entry_24xx) != 64);
8060         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
8061         BUILD_BUG_ON(sizeof(struct imm_ntfy_from_isp) != 64);
8062         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
8063         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
8064         BUILD_BUG_ON(sizeof(struct logio_entry_24xx) != 64);
8065         BUILD_BUG_ON(sizeof(struct mbx_entry) != 64);
8066         BUILD_BUG_ON(sizeof(struct mid_init_cb_24xx) != 5252);
8067         BUILD_BUG_ON(sizeof(struct mrk_entry_24xx) != 64);
8068         BUILD_BUG_ON(sizeof(struct nvram_24xx) != 512);
8069         BUILD_BUG_ON(sizeof(struct nvram_81xx) != 512);
8070         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
8071         BUILD_BUG_ON(sizeof(struct pt_ls4_rx_unsol) != 64);
8072         BUILD_BUG_ON(sizeof(struct purex_entry_24xx) != 64);
8073         BUILD_BUG_ON(sizeof(struct qla2100_fw_dump) != 123634);
8074         BUILD_BUG_ON(sizeof(struct qla2300_fw_dump) != 136100);
8075         BUILD_BUG_ON(sizeof(struct qla24xx_fw_dump) != 37976);
8076         BUILD_BUG_ON(sizeof(struct qla25xx_fw_dump) != 39228);
8077         BUILD_BUG_ON(sizeof(struct qla2xxx_fce_chain) != 52);
8078         BUILD_BUG_ON(sizeof(struct qla2xxx_fw_dump) != 136172);
8079         BUILD_BUG_ON(sizeof(struct qla2xxx_mq_chain) != 524);
8080         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_chain) != 8);
8081         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_header) != 12);
8082         BUILD_BUG_ON(sizeof(struct qla2xxx_offld_chain) != 24);
8083         BUILD_BUG_ON(sizeof(struct qla81xx_fw_dump) != 39420);
8084         BUILD_BUG_ON(sizeof(struct qla82xx_uri_data_desc) != 28);
8085         BUILD_BUG_ON(sizeof(struct qla82xx_uri_table_desc) != 32);
8086         BUILD_BUG_ON(sizeof(struct qla83xx_fw_dump) != 51196);
8087         BUILD_BUG_ON(sizeof(struct qla_fcp_prio_cfg) != FCP_PRIO_CFG_SIZE);
8088         BUILD_BUG_ON(sizeof(struct qla_fdt_layout) != 128);
8089         BUILD_BUG_ON(sizeof(struct qla_flt_header) != 8);
8090         BUILD_BUG_ON(sizeof(struct qla_flt_region) != 16);
8091         BUILD_BUG_ON(sizeof(struct qla_npiv_entry) != 24);
8092         BUILD_BUG_ON(sizeof(struct qla_npiv_header) != 16);
8093         BUILD_BUG_ON(sizeof(struct rdp_rsp_payload) != 336);
8094         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
8095         BUILD_BUG_ON(sizeof(struct sts_entry_24xx) != 64);
8096         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry) != 64);
8097         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry_fx00) != 64);
8098         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
8099         BUILD_BUG_ON(sizeof(struct verify_chip_rsp_84xx) != 52);
8100         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
8101         BUILD_BUG_ON(sizeof(struct vp_config_entry_24xx) != 64);
8102         BUILD_BUG_ON(sizeof(struct vp_ctrl_entry_24xx) != 64);
8103         BUILD_BUG_ON(sizeof(struct vp_rpt_id_entry_24xx) != 64);
8104         BUILD_BUG_ON(sizeof(sts21_entry_t) != 64);
8105         BUILD_BUG_ON(sizeof(sts22_entry_t) != 64);
8106         BUILD_BUG_ON(sizeof(sts_cont_entry_t) != 64);
8107         BUILD_BUG_ON(sizeof(sts_entry_t) != 64);
8108         BUILD_BUG_ON(sizeof(sw_info_t) != 32);
8109         BUILD_BUG_ON(sizeof(target_id_t) != 2);
8110
8111         /* Allocate cache for SRBs. */
8112         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
8113             SLAB_HWCACHE_ALIGN, NULL);
8114         if (srb_cachep == NULL) {
8115                 ql_log(ql_log_fatal, NULL, 0x0001,
8116                     "Unable to allocate SRB cache...Failing load!.\n");
8117                 return -ENOMEM;
8118         }
8119
8120         /* Initialize target kmem_cache and mem_pools */
8121         ret = qlt_init();
8122         if (ret < 0) {
8123                 goto destroy_cache;
8124         } else if (ret > 0) {
8125                 /*
8126                  * If initiator mode is explictly disabled by qlt_init(),
8127                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
8128                  * performing scsi_scan_target() during LOOP UP event.
8129                  */
8130                 qla2xxx_transport_functions.disable_target_scan = 1;
8131                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
8132         }
8133
8134         /* Derive version string. */
8135         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
8136         if (ql2xextended_error_logging)
8137                 strcat(qla2x00_version_str, "-debug");
8138         if (ql2xextended_error_logging == 1)
8139                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
8140
8141         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
8142                 qla_insert_tgt_attrs();
8143
8144         qla2xxx_transport_template =
8145             fc_attach_transport(&qla2xxx_transport_functions);
8146         if (!qla2xxx_transport_template) {
8147                 ql_log(ql_log_fatal, NULL, 0x0002,
8148                     "fc_attach_transport failed...Failing load!.\n");
8149                 ret = -ENODEV;
8150                 goto qlt_exit;
8151         }
8152
8153         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
8154         if (apidev_major < 0) {
8155                 ql_log(ql_log_fatal, NULL, 0x0003,
8156                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
8157         }
8158
8159         qla2xxx_transport_vport_template =
8160             fc_attach_transport(&qla2xxx_transport_vport_functions);
8161         if (!qla2xxx_transport_vport_template) {
8162                 ql_log(ql_log_fatal, NULL, 0x0004,
8163                     "fc_attach_transport vport failed...Failing load!.\n");
8164                 ret = -ENODEV;
8165                 goto unreg_chrdev;
8166         }
8167         ql_log(ql_log_info, NULL, 0x0005,
8168             "QLogic Fibre Channel HBA Driver: %s.\n",
8169             qla2x00_version_str);
8170         ret = pci_register_driver(&qla2xxx_pci_driver);
8171         if (ret) {
8172                 ql_log(ql_log_fatal, NULL, 0x0006,
8173                     "pci_register_driver failed...ret=%d Failing load!.\n",
8174                     ret);
8175                 goto release_vport_transport;
8176         }
8177         return ret;
8178
8179 release_vport_transport:
8180         fc_release_transport(qla2xxx_transport_vport_template);
8181
8182 unreg_chrdev:
8183         if (apidev_major >= 0)
8184                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8185         fc_release_transport(qla2xxx_transport_template);
8186
8187 qlt_exit:
8188         qlt_exit();
8189
8190 destroy_cache:
8191         kmem_cache_destroy(srb_cachep);
8192         return ret;
8193 }
8194
8195 /**
8196  * qla2x00_module_exit - Module cleanup.
8197  **/
8198 static void __exit
8199 qla2x00_module_exit(void)
8200 {
8201         pci_unregister_driver(&qla2xxx_pci_driver);
8202         qla2x00_release_firmware();
8203         kmem_cache_destroy(ctx_cachep);
8204         fc_release_transport(qla2xxx_transport_vport_template);
8205         if (apidev_major >= 0)
8206                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8207         fc_release_transport(qla2xxx_transport_template);
8208         qlt_exit();
8209         kmem_cache_destroy(srb_cachep);
8210 }
8211
8212 module_init(qla2x00_module_init);
8213 module_exit(qla2x00_module_exit);
8214
8215 MODULE_AUTHOR("QLogic Corporation");
8216 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
8217 MODULE_LICENSE("GPL");
8218 /*(DEBLOBBED)*/