drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     64
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 64.");
 122
 123 #if (IS_ENABLED(CONFIG_NVME_FC))
 124 int ql2xenabledif;
 125 #else
 126 int ql2xenabledif = 2;
 127 #endif
 128 module_param(ql2xenabledif, int, S_IRUGO);
 129 MODULE_PARM_DESC(ql2xenabledif,
 130                 " Enable T10-CRC-DIF:\n"
 131                 " Default is 2.\n"
 132                 "  0 -- No DIF Support\n"
 133                 "  1 -- Enable DIF for all types\n"
 134                 "  2 -- Enable DIF for all types, except Type 0.\n");
 135
 136 #if (IS_ENABLED(CONFIG_NVME_FC))
 137 int ql2xnvmeenable = 1;
 138 #else
 139 int ql2xnvmeenable;
 140 #endif
 141 module_param(ql2xnvmeenable, int, 0644);
 142 MODULE_PARM_DESC(ql2xnvmeenable,
 143     "Enables NVME support. "
 144     "0 - no NVMe.  Default is Y");
 145
 146 int ql2xenablehba_err_chk = 2;
 147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 149                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 150                 " Default is 2.\n"
 151                 "  0 -- Error isolation disabled\n"
 152                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 153                 "  2 -- Error isolation enabled for all Types\n");
 154
 155 int ql2xiidmaenable=1;
 156 module_param(ql2xiidmaenable, int, S_IRUGO);
 157 MODULE_PARM_DESC(ql2xiidmaenable,
 158                 "Enables iIDMA settings "
 159                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 160
 161 int ql2xmqsupport = 1;
 162 module_param(ql2xmqsupport, int, S_IRUGO);
 163 MODULE_PARM_DESC(ql2xmqsupport,
 164                 "Enable on demand multiple queue pairs support "
 165                 "Default is 1 for supported. "
 166                 "Set it to 0 to turn off mq qpair support.");
 167
 168 int ql2xfwloadbin;
 169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 171 MODULE_PARM_DESC(ql2xfwloadbin,
 172                 "Option to specify location from which to load ISP firmware:.\n"
 173                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 174                 "      interface.\n"
 175                 " 1 -- load firmware from flash.\n"
 176                 " 0 -- use default semantics.\n");
 177
 178 int ql2xetsenable;
 179 module_param(ql2xetsenable, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xetsenable,
 181                 "Enables firmware ETS burst."
 182                 "Default is 0 - skip ETS enablement.");
 183
 184 int ql2xdbwr = 1;
 185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 186 MODULE_PARM_DESC(ql2xdbwr,
 187                 "Option to specify scheme for request queue posting.\n"
 188                 " 0 -- Regular doorbell.\n"
 189                 " 1 -- CAMRAM doorbell (faster).\n");
 190
 191 int ql2xgffidenable;
 192 module_param(ql2xgffidenable, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xgffidenable,
 194                 "Enables GFF_ID checks of port type. "
 195                 "Default is 0 - Do not use GFF_ID information.");
 196
 197 int ql2xasynctmfenable = 1;
 198 module_param(ql2xasynctmfenable, int, S_IRUGO);
 199 MODULE_PARM_DESC(ql2xasynctmfenable,
 200                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 201                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 202
 203 int ql2xdontresethba;
 204 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 205 MODULE_PARM_DESC(ql2xdontresethba,
 206                 "Option to specify reset behaviour.\n"
 207                 " 0 (Default) -- Reset on failure.\n"
 208                 " 1 -- Do not reset on failure.\n");
 209
 210 uint64_t ql2xmaxlun = MAX_LUNS;
 211 module_param(ql2xmaxlun, ullong, S_IRUGO);
 212 MODULE_PARM_DESC(ql2xmaxlun,
 213                 "Defines the maximum LU number to register with the SCSI "
 214                 "midlayer. Default is 65535.");
 215
 216 int ql2xmdcapmask = 0x1F;
 217 module_param(ql2xmdcapmask, int, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmdcapmask,
 219                 "Set the Minidump driver capture mask level. "
 220                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 221
 222 int ql2xmdenable = 1;
 223 module_param(ql2xmdenable, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xmdenable,
 225                 "Enable/disable MiniDump. "
 226                 "0 - MiniDump disabled. "
 227                 "1 (Default) - MiniDump enabled.");
 228
 229 int ql2xexlogins = 0;
 230 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 231 MODULE_PARM_DESC(ql2xexlogins,
 232                  "Number of extended Logins. "
 233                  "0 (Default)- Disabled.");
 234
 235 int ql2xexchoffld = 1024;
 236 module_param(ql2xexchoffld, uint, 0644);
 237 MODULE_PARM_DESC(ql2xexchoffld,
 238         "Number of target exchanges.");
 239
 240 int ql2xiniexchg = 1024;
 241 module_param(ql2xiniexchg, uint, 0644);
 242 MODULE_PARM_DESC(ql2xiniexchg,
 243         "Number of initiator exchanges.");
 244
 245 int ql2xfwholdabts = 0;
 246 module_param(ql2xfwholdabts, int, S_IRUGO);
 247 MODULE_PARM_DESC(ql2xfwholdabts,
 248                 "Allow FW to hold status IOCB until ABTS rsp received. "
 249                 "0 (Default) Do not set fw option. "
 250                 "1 - Set fw option to hold ABTS.");
 251
 252 int ql2xmvasynctoatio = 1;
 253 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 254 MODULE_PARM_DESC(ql2xmvasynctoatio,
 255                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 256                 "0 (Default). Do not move IOCBs"
 257                 "1 - Move IOCBs.");
 258
 259 int ql2xautodetectsfp = 1;
 260 module_param(ql2xautodetectsfp, int, 0444);
 261 MODULE_PARM_DESC(ql2xautodetectsfp,
 262                  "Detect SFP range and set appropriate distance.\n"
 263                  "1 (Default): Enable\n");
 264
 265 /*
 266  * SCSI host template entry points
 267  */
 268 static int qla2xxx_slave_configure(struct scsi_device * device);
 269 static int qla2xxx_slave_alloc(struct scsi_device *);
 270 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 271 static void qla2xxx_scan_start(struct Scsi_Host *);
 272 static void qla2xxx_slave_destroy(struct scsi_device *);
 273 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 274 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 275 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 276 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 277 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 278 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 279
 280 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 281 static void qla2x00_free_device(scsi_qla_host_t *);
 282 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 283 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 284 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 285
 286 struct scsi_host_template qla2xxx_driver_template = {
 287         .module                 = THIS_MODULE,
 288         .name                   = QLA2XXX_DRIVER_NAME,
 289         .queuecommand           = qla2xxx_queuecommand,
 290
 291         .eh_timed_out           = fc_eh_timed_out,
 292         .eh_abort_handler       = qla2xxx_eh_abort,
 293         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 294         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 295         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 296         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 297
 298         .slave_configure        = qla2xxx_slave_configure,
 299
 300         .slave_alloc            = qla2xxx_slave_alloc,
 301         .slave_destroy          = qla2xxx_slave_destroy,
 302         .scan_finished          = qla2xxx_scan_finished,
 303         .scan_start             = qla2xxx_scan_start,
 304         .change_queue_depth     = scsi_change_queue_depth,
 305         .map_queues             = qla2xxx_map_queues,
 306         .this_id                = -1,
 307         .cmd_per_lun            = 3,
 308         .use_clustering         = ENABLE_CLUSTERING,
 309         .sg_tablesize           = SG_ALL,
 310
 311         .max_sectors            = 0xFFFF,
 312         .shost_attrs            = qla2x00_host_attrs,
 313
 314         .supported_mode         = MODE_INITIATOR,
 315         .track_queue_depth      = 1,
 316 };
 317
 318 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 319 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 320
 321 /* TODO Convert to inlines
 322  *
 323  * Timer routines
 324  */
 325
 326 __inline__ void
 327 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 328 {
 329         init_timer(&vha->timer);
 330         vha->timer.expires = jiffies + interval * HZ;
 331         vha->timer.data = (unsigned long)vha;
 332         vha->timer.function = (void (*)(unsigned long))func;
 333         add_timer(&vha->timer);
 334         vha->timer_active = 1;
 335 }
 336
 337 static inline void
 338 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 339 {
 340         /* Currently used for 82XX only. */
 341         if (vha->device_flags & DFLG_DEV_FAILED) {
 342                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 343                     "Device in a failed state, returning.\n");
 344                 return;
 345         }
 346
 347         mod_timer(&vha->timer, jiffies + interval * HZ);
 348 }
 349
 350 static __inline__ void
 351 qla2x00_stop_timer(scsi_qla_host_t *vha)
 352 {
 353         del_timer_sync(&vha->timer);
 354         vha->timer_active = 0;
 355 }
 356
 357 static int qla2x00_do_dpc(void *data);
 358
 359 static void qla2x00_rst_aen(scsi_qla_host_t *);
 360
 361 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 362         struct req_que **, struct rsp_que **);
 363 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 364 static void qla2x00_mem_free(struct qla_hw_data *);
 365 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 366         struct qla_qpair *qpair);
 367
 368 /* -------------------------------------------------------------------------- */
 369 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 370     struct rsp_que *rsp)
 371 {
 372         struct qla_hw_data *ha = vha->hw;
 373         rsp->qpair = ha->base_qpair;
 374         rsp->req = req;
 375         ha->base_qpair->req = req;
 376         ha->base_qpair->rsp = rsp;
 377         ha->base_qpair->vha = vha;
 378         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 379         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 380         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 381         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 382         INIT_LIST_HEAD(&ha->base_qpair->nvme_done_list);
 383         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 384         /* init qpair to this cpu. Will adjust at run time. */
 385         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 386         ha->base_qpair->pdev = ha->pdev;
 387
 388         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 389                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 390 }
 391
 392 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 393                                 struct rsp_que *rsp)
 394 {
 395         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 396         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 397                                 GFP_KERNEL);
 398         if (!ha->req_q_map) {
 399                 ql_log(ql_log_fatal, vha, 0x003b,
 400                     "Unable to allocate memory for request queue ptrs.\n");
 401                 goto fail_req_map;
 402         }
 403
 404         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 405                                 GFP_KERNEL);
 406         if (!ha->rsp_q_map) {
 407                 ql_log(ql_log_fatal, vha, 0x003c,
 408                     "Unable to allocate memory for response queue ptrs.\n");
 409                 goto fail_rsp_map;
 410         }
 411
 412         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 413         if (ha->base_qpair == NULL) {
 414                 ql_log(ql_log_warn, vha, 0x00e0,
 415                     "Failed to allocate base queue pair memory.\n");
 416                 goto fail_base_qpair;
 417         }
 418
 419         qla_init_base_qpair(vha, req, rsp);
 420
 421         if (ql2xmqsupport && ha->max_qpairs) {
 422                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 423                         GFP_KERNEL);
 424                 if (!ha->queue_pair_map) {
 425                         ql_log(ql_log_fatal, vha, 0x0180,
 426                             "Unable to allocate memory for queue pair ptrs.\n");
 427                         goto fail_qpair_map;
 428                 }
 429         }
 430
 431         /*
 432          * Make sure we record at least the request and response queue zero in
 433          * case we need to free them if part of the probe fails.
 434          */
 435         ha->rsp_q_map[0] = rsp;
 436         ha->req_q_map[0] = req;
 437         set_bit(0, ha->rsp_qid_map);
 438         set_bit(0, ha->req_qid_map);
 439         return 0;
 440
 441 fail_qpair_map:
 442         kfree(ha->base_qpair);
 443         ha->base_qpair = NULL;
 444 fail_base_qpair:
 445         kfree(ha->rsp_q_map);
 446         ha->rsp_q_map = NULL;
 447 fail_rsp_map:
 448         kfree(ha->req_q_map);
 449         ha->req_q_map = NULL;
 450 fail_req_map:
 451         return -ENOMEM;
 452 }
 453
 454 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 455 {
 456         if (IS_QLAFX00(ha)) {
 457                 if (req && req->ring_fx00)
 458                         dma_free_coherent(&ha->pdev->dev,
 459                             (req->length_fx00 + 1) * sizeof(request_t),
 460                             req->ring_fx00, req->dma_fx00);
 461         } else if (req && req->ring)
 462                 dma_free_coherent(&ha->pdev->dev,
 463                 (req->length + 1) * sizeof(request_t),
 464                 req->ring, req->dma);
 465
 466         if (req)
 467                 kfree(req->outstanding_cmds);
 468
 469         kfree(req);
 470 }
 471
 472 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 473 {
 474         if (IS_QLAFX00(ha)) {
 475                 if (rsp && rsp->ring)
 476                         dma_free_coherent(&ha->pdev->dev,
 477                             (rsp->length_fx00 + 1) * sizeof(request_t),
 478                             rsp->ring_fx00, rsp->dma_fx00);
 479         } else if (rsp && rsp->ring) {
 480                 dma_free_coherent(&ha->pdev->dev,
 481                 (rsp->length + 1) * sizeof(response_t),
 482                 rsp->ring, rsp->dma);
 483         }
 484         kfree(rsp);
 485 }
 486
 487 static void qla2x00_free_queues(struct qla_hw_data *ha)
 488 {
 489         struct req_que *req;
 490         struct rsp_que *rsp;
 491         int cnt;
 492         unsigned long flags;
 493
 494         if (ha->queue_pair_map) {
 495                 kfree(ha->queue_pair_map);
 496                 ha->queue_pair_map = NULL;
 497         }
 498         if (ha->base_qpair) {
 499                 kfree(ha->base_qpair);
 500                 ha->base_qpair = NULL;
 501         }
 502
 503         spin_lock_irqsave(&ha->hardware_lock, flags);
 504         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 505                 if (!test_bit(cnt, ha->req_qid_map))
 506                         continue;
 507
 508                 req = ha->req_q_map[cnt];
 509                 clear_bit(cnt, ha->req_qid_map);
 510                 ha->req_q_map[cnt] = NULL;
 511
 512                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 513                 qla2x00_free_req_que(ha, req);
 514                 spin_lock_irqsave(&ha->hardware_lock, flags);
 515         }
 516         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 517
 518         kfree(ha->req_q_map);
 519         ha->req_q_map = NULL;
 520
 521
 522         spin_lock_irqsave(&ha->hardware_lock, flags);
 523         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 524                 if (!test_bit(cnt, ha->rsp_qid_map))
 525                         continue;
 526
 527                 rsp = ha->rsp_q_map[cnt];
 528                 clear_bit(cnt, ha->rsp_qid_map);
 529                 ha->rsp_q_map[cnt] =  NULL;
 530                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 531                 qla2x00_free_rsp_que(ha, rsp);
 532                 spin_lock_irqsave(&ha->hardware_lock, flags);
 533         }
 534         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 535
 536         kfree(ha->rsp_q_map);
 537         ha->rsp_q_map = NULL;
 538 }
 539
 540 static char *
 541 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 542 {
 543         struct qla_hw_data *ha = vha->hw;
 544         static char *pci_bus_modes[] = {
 545                 "33", "66", "100", "133",
 546         };
 547         uint16_t pci_bus;
 548
 549         strcpy(str, "PCI");
 550         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 551         if (pci_bus) {
 552                 strcat(str, "-X (");
 553                 strcat(str, pci_bus_modes[pci_bus]);
 554         } else {
 555                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 556                 strcat(str, " (");
 557                 strcat(str, pci_bus_modes[pci_bus]);
 558         }
 559         strcat(str, " MHz)");
 560
 561         return (str);
 562 }
 563
 564 static char *
 565 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 566 {
 567         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 568         struct qla_hw_data *ha = vha->hw;
 569         uint32_t pci_bus;
 570
 571         if (pci_is_pcie(ha->pdev)) {
 572                 char lwstr[6];
 573                 uint32_t lstat, lspeed, lwidth;
 574
 575                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 576                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 577                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 578
 579                 strcpy(str, "PCIe (");
 580                 switch (lspeed) {
 581                 case 1:
 582                         strcat(str, "2.5GT/s ");
 583                         break;
 584                 case 2:
 585                         strcat(str, "5.0GT/s ");
 586                         break;
 587                 case 3:
 588                         strcat(str, "8.0GT/s ");
 589                         break;
 590                 default:
 591                         strcat(str, "<unknown> ");
 592                         break;
 593                 }
 594                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 595                 strcat(str, lwstr);
 596
 597                 return str;
 598         }
 599
 600         strcpy(str, "PCI");
 601         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 602         if (pci_bus == 0 || pci_bus == 8) {
 603                 strcat(str, " (");
 604                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 605         } else {
 606                 strcat(str, "-X ");
 607                 if (pci_bus & BIT_2)
 608                         strcat(str, "Mode 2");
 609                 else
 610                         strcat(str, "Mode 1");
 611                 strcat(str, " (");
 612                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 613         }
 614         strcat(str, " MHz)");
 615
 616         return str;
 617 }
 618
 619 static char *
 620 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 621 {
 622         char un_str[10];
 623         struct qla_hw_data *ha = vha->hw;
 624
 625         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 626             ha->fw_minor_version, ha->fw_subminor_version);
 627
 628         if (ha->fw_attributes & BIT_9) {
 629                 strcat(str, "FLX");
 630                 return (str);
 631         }
 632
 633         switch (ha->fw_attributes & 0xFF) {
 634         case 0x7:
 635                 strcat(str, "EF");
 636                 break;
 637         case 0x17:
 638                 strcat(str, "TP");
 639                 break;
 640         case 0x37:
 641                 strcat(str, "IP");
 642                 break;
 643         case 0x77:
 644                 strcat(str, "VI");
 645                 break;
 646         default:
 647                 sprintf(un_str, "(%x)", ha->fw_attributes);
 648                 strcat(str, un_str);
 649                 break;
 650         }
 651         if (ha->fw_attributes & 0x100)
 652                 strcat(str, "X");
 653
 654         return (str);
 655 }
 656
 657 static char *
 658 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 659 {
 660         struct qla_hw_data *ha = vha->hw;
 661
 662         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 663             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 664         return str;
 665 }
 666
 667 void
 668 qla2x00_sp_free_dma(void *ptr)
 669 {
 670         srb_t *sp = ptr;
 671         struct qla_hw_data *ha = sp->vha->hw;
 672         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 673         void *ctx = GET_CMD_CTX_SP(sp);
 674
 675         if (sp->flags & SRB_DMA_VALID) {
 676                 scsi_dma_unmap(cmd);
 677                 sp->flags &= ~SRB_DMA_VALID;
 678         }
 679
 680         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 681                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 682                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 683                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 684         }
 685
 686         if (!ctx)
 687                 goto end;
 688
 689         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 690                 /* List assured to be having elements */
 691                 qla2x00_clean_dsd_pool(ha, ctx);
 692                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 693         }
 694
 695         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 696                 struct crc_context *ctx0 = ctx;
 697
 698                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 699                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 700         }
 701
 702         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 703                 struct ct6_dsd *ctx1 = ctx;
 704
 705                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 706                     ctx1->fcp_cmnd_dma);
 707                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 708                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 709                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 710                 mempool_free(ctx1, ha->ctx_mempool);
 711         }
 712
 713 end:
 714         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 715                 CMD_SP(cmd) = NULL;
 716                 qla2x00_rel_sp(sp);
 717         }
 718 }
 719
 720 void
 721 qla2x00_sp_compl(void *ptr, int res)
 722 {
 723         srb_t *sp = ptr;
 724         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 725
 726         cmd->result = res;
 727
 728         if (atomic_read(&sp->ref_count) == 0) {
 729                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 730                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 731                     sp, GET_CMD_SP(sp));
 732                 if (ql2xextended_error_logging & ql_dbg_io)
 733                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 734                 return;
 735         }
 736         if (!atomic_dec_and_test(&sp->ref_count))
 737                 return;
 738
 739         sp->free(sp);
 740         cmd->scsi_done(cmd);
 741 }
 742
 743 void
 744 qla2xxx_qpair_sp_free_dma(void *ptr)
 745 {
 746         srb_t *sp = (srb_t *)ptr;
 747         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 748         struct qla_hw_data *ha = sp->fcport->vha->hw;
 749         void *ctx = GET_CMD_CTX_SP(sp);
 750
 751         if (sp->flags & SRB_DMA_VALID) {
 752                 scsi_dma_unmap(cmd);
 753                 sp->flags &= ~SRB_DMA_VALID;
 754         }
 755
 756         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 757                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 758                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 759                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 760         }
 761
 762         if (!ctx)
 763                 goto end;
 764
 765         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 766                 /* List assured to be having elements */
 767                 qla2x00_clean_dsd_pool(ha, ctx);
 768                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 769         }
 770
 771         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 772                 struct crc_context *ctx0 = ctx;
 773
 774                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 775                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 776         }
 777
 778         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 779                 struct ct6_dsd *ctx1 = ctx;
 780                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 781                     ctx1->fcp_cmnd_dma);
 782                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 783                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 784                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 785                 mempool_free(ctx1, ha->ctx_mempool);
 786         }
 787 end:
 788         CMD_SP(cmd) = NULL;
 789         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 790 }
 791
 792 void
 793 qla2xxx_qpair_sp_compl(void *ptr, int res)
 794 {
 795         srb_t *sp = ptr;
 796         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 797
 798         cmd->result = res;
 799
 800         if (atomic_read(&sp->ref_count) == 0) {
 801                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 802                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 803                     sp, GET_CMD_SP(sp));
 804                 if (ql2xextended_error_logging & ql_dbg_io)
 805                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 806                 return;
 807         }
 808         if (!atomic_dec_and_test(&sp->ref_count))
 809                 return;
 810
 811         sp->free(sp);
 812         cmd->scsi_done(cmd);
 813 }
 814
 815 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 816  * does not have the changes necessary to avoid taking host->host_lock.
 817  */
 818 static int
 819 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 820 {
 821         scsi_qla_host_t *vha = shost_priv(host);
 822         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 823         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 824         struct qla_hw_data *ha = vha->hw;
 825         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 826         srb_t *sp;
 827         int rval;
 828         struct qla_qpair *qpair = NULL;
 829         uint32_t tag;
 830         uint16_t hwq;
 831
 832         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 833                 cmd->result = DID_NO_CONNECT << 16;
 834                 goto qc24_fail_command;
 835         }
 836
 837         if (ha->mqenable) {
 838                 if (shost_use_blk_mq(vha->host)) {
 839                         tag = blk_mq_unique_tag(cmd->request);
 840                         hwq = blk_mq_unique_tag_to_hwq(tag);
 841                         qpair = ha->queue_pair_map[hwq];
 842                 } else if (vha->vp_idx && vha->qpair) {
 843                         qpair = vha->qpair;
 844                 }
 845
 846                 if (qpair)
 847                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 848         }
 849
 850         if (ha->flags.eeh_busy) {
 851                 if (ha->flags.pci_channel_io_perm_failure) {
 852                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 853                             "PCI Channel IO permanent failure, exiting "
 854                             "cmd=%p.\n", cmd);
 855                         cmd->result = DID_NO_CONNECT << 16;
 856                 } else {
 857                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 858                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 859                         cmd->result = DID_REQUEUE << 16;
 860                 }
 861                 goto qc24_fail_command;
 862         }
 863
 864         rval = fc_remote_port_chkready(rport);
 865         if (rval) {
 866                 cmd->result = rval;
 867                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 868                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 869                     cmd, rval);
 870                 goto qc24_fail_command;
 871         }
 872
 873         if (!vha->flags.difdix_supported &&
 874                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 875                         ql_dbg(ql_dbg_io, vha, 0x3004,
 876                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 877                             cmd);
 878                         cmd->result = DID_NO_CONNECT << 16;
 879                         goto qc24_fail_command;
 880         }
 881
 882         if (!fcport) {
 883                 cmd->result = DID_NO_CONNECT << 16;
 884                 goto qc24_fail_command;
 885         }
 886
 887         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 888                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 889                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 890                         ql_dbg(ql_dbg_io, vha, 0x3005,
 891                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 892                             atomic_read(&fcport->state),
 893                             atomic_read(&base_vha->loop_state));
 894                         cmd->result = DID_NO_CONNECT << 16;
 895                         goto qc24_fail_command;
 896                 }
 897                 goto qc24_target_busy;
 898         }
 899
 900         /*
 901          * Return target busy if we've received a non-zero retry_delay_timer
 902          * in a FCP_RSP.
 903          */
 904         if (fcport->retry_delay_timestamp == 0) {
 905                 /* retry delay not set */
 906         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 907                 fcport->retry_delay_timestamp = 0;
 908         else
 909                 goto qc24_target_busy;
 910
 911         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 912         if (!sp)
 913                 goto qc24_host_busy;
 914
 915         sp->u.scmd.cmd = cmd;
 916         sp->type = SRB_SCSI_CMD;
 917         atomic_set(&sp->ref_count, 1);
 918         CMD_SP(cmd) = (void *)sp;
 919         sp->free = qla2x00_sp_free_dma;
 920         sp->done = qla2x00_sp_compl;
 921
 922         rval = ha->isp_ops->start_scsi(sp);
 923         if (rval != QLA_SUCCESS) {
 924                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 925                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 926                 goto qc24_host_busy_free_sp;
 927         }
 928
 929         return 0;
 930
 931 qc24_host_busy_free_sp:
 932         sp->free(sp);
 933
 934 qc24_host_busy:
 935         return SCSI_MLQUEUE_HOST_BUSY;
 936
 937 qc24_target_busy:
 938         return SCSI_MLQUEUE_TARGET_BUSY;
 939
 940 qc24_fail_command:
 941         cmd->scsi_done(cmd);
 942
 943         return 0;
 944 }
 945
 946 /* For MQ supported I/O */
 947 int
 948 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 949     struct qla_qpair *qpair)
 950 {
 951         scsi_qla_host_t *vha = shost_priv(host);
 952         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 953         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 954         struct qla_hw_data *ha = vha->hw;
 955         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 956         srb_t *sp;
 957         int rval;
 958
 959         rval = fc_remote_port_chkready(rport);
 960         if (rval) {
 961                 cmd->result = rval;
 962                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 963                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 964                     cmd, rval);
 965                 goto qc24_fail_command;
 966         }
 967
 968         if (!fcport) {
 969                 cmd->result = DID_NO_CONNECT << 16;
 970                 goto qc24_fail_command;
 971         }
 972
 973         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 974                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 975                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 976                         ql_dbg(ql_dbg_io, vha, 0x3077,
 977                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 978                             atomic_read(&fcport->state),
 979                             atomic_read(&base_vha->loop_state));
 980                         cmd->result = DID_NO_CONNECT << 16;
 981                         goto qc24_fail_command;
 982                 }
 983                 goto qc24_target_busy;
 984         }
 985
 986         /*
 987          * Return target busy if we've received a non-zero retry_delay_timer
 988          * in a FCP_RSP.
 989          */
 990         if (fcport->retry_delay_timestamp == 0) {
 991                 /* retry delay not set */
 992         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 993                 fcport->retry_delay_timestamp = 0;
 994         else
 995                 goto qc24_target_busy;
 996
 997         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
 998         if (!sp)
 999                 goto qc24_host_busy;
1000
1001         sp->u.scmd.cmd = cmd;
1002         sp->type = SRB_SCSI_CMD;
1003         atomic_set(&sp->ref_count, 1);
1004         CMD_SP(cmd) = (void *)sp;
1005         sp->free = qla2xxx_qpair_sp_free_dma;
1006         sp->done = qla2xxx_qpair_sp_compl;
1007         sp->qpair = qpair;
1008
1009         rval = ha->isp_ops->start_scsi_mq(sp);
1010         if (rval != QLA_SUCCESS) {
1011                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1012                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1013                 if (rval == QLA_INTERFACE_ERROR)
1014                         goto qc24_fail_command;
1015                 goto qc24_host_busy_free_sp;
1016         }
1017
1018         return 0;
1019
1020 qc24_host_busy_free_sp:
1021         sp->free(sp);
1022
1023 qc24_host_busy:
1024         return SCSI_MLQUEUE_HOST_BUSY;
1025
1026 qc24_target_busy:
1027         return SCSI_MLQUEUE_TARGET_BUSY;
1028
1029 qc24_fail_command:
1030         cmd->scsi_done(cmd);
1031
1032         return 0;
1033 }
1034
1035 /*
1036  * qla2x00_eh_wait_on_command
1037  *    Waits for the command to be returned by the Firmware for some
1038  *    max time.
1039  *
1040  * Input:
1041  *    cmd = Scsi Command to wait on.
1042  *
1043  * Return:
1044  *    Not Found : 0
1045  *    Found : 1
1046  */
1047 static int
1048 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1049 {
1050 #define ABORT_POLLING_PERIOD    1000
1051 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1052         unsigned long wait_iter = ABORT_WAIT_ITER;
1053         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1054         struct qla_hw_data *ha = vha->hw;
1055         int ret = QLA_SUCCESS;
1056
1057         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1058                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1059                     "Return:eh_wait.\n");
1060                 return ret;
1061         }
1062
1063         while (CMD_SP(cmd) && wait_iter--) {
1064                 msleep(ABORT_POLLING_PERIOD);
1065         }
1066         if (CMD_SP(cmd))
1067                 ret = QLA_FUNCTION_FAILED;
1068
1069         return ret;
1070 }
1071
1072 /*
1073  * qla2x00_wait_for_hba_online
1074  *    Wait till the HBA is online after going through
1075  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1076  *    finally HBA is disabled ie marked offline
1077  *
1078  * Input:
1079  *     ha - pointer to host adapter structure
1080  *
1081  * Note:
1082  *    Does context switching-Release SPIN_LOCK
1083  *    (if any) before calling this routine.
1084  *
1085  * Return:
1086  *    Success (Adapter is online) : 0
1087  *    Failed  (Adapter is offline/disabled) : 1
1088  */
1089 int
1090 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1091 {
1092         int             return_status;
1093         unsigned long   wait_online;
1094         struct qla_hw_data *ha = vha->hw;
1095         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1096
1097         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1098         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1099             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1100             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1101             ha->dpc_active) && time_before(jiffies, wait_online)) {
1102
1103                 msleep(1000);
1104         }
1105         if (base_vha->flags.online)
1106                 return_status = QLA_SUCCESS;
1107         else
1108                 return_status = QLA_FUNCTION_FAILED;
1109
1110         return (return_status);
1111 }
1112
1113 static inline int test_fcport_count(scsi_qla_host_t *vha)
1114 {
1115         struct qla_hw_data *ha = vha->hw;
1116         unsigned long flags;
1117         int res;
1118
1119         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1120         ql_dbg(ql_dbg_init, vha, 0x00ec,
1121             "tgt %p, fcport_count=%d\n",
1122             vha, vha->fcport_count);
1123         res = (vha->fcport_count == 0);
1124         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1125
1126         return res;
1127 }
1128
1129 /*
1130  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1131  * it has dependency on UNLOADING flag to stop device discovery
1132  */
1133 void
1134 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1135 {
1136         qla2x00_mark_all_devices_lost(vha, 0);
1137
1138         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1139 }
1140
1141 /*
1142  * qla2x00_wait_for_hba_ready
1143  * Wait till the HBA is ready before doing driver unload
1144  *
1145  * Input:
1146  *     ha - pointer to host adapter structure
1147  *
1148  * Note:
1149  *    Does context switching-Release SPIN_LOCK
1150  *    (if any) before calling this routine.
1151  *
1152  */
1153 static void
1154 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1155 {
1156         struct qla_hw_data *ha = vha->hw;
1157         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1158
1159         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1160                 ha->flags.mbox_busy) ||
1161                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1162                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1163                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1164                         break;
1165                 msleep(1000);
1166         }
1167 }
1168
1169 int
1170 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1171 {
1172         int             return_status;
1173         unsigned long   wait_reset;
1174         struct qla_hw_data *ha = vha->hw;
1175         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1176
1177         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1178         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1179             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1180             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1181             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1182
1183                 msleep(1000);
1184
1185                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1186                     ha->flags.chip_reset_done)
1187                         break;
1188         }
1189         if (ha->flags.chip_reset_done)
1190                 return_status = QLA_SUCCESS;
1191         else
1192                 return_status = QLA_FUNCTION_FAILED;
1193
1194         return return_status;
1195 }
1196
1197 static void
1198 sp_get(struct srb *sp)
1199 {
1200         atomic_inc(&sp->ref_count);
1201 }
1202
1203 #define ISP_REG_DISCONNECT 0xffffffffU
1204 /**************************************************************************
1205 * qla2x00_isp_reg_stat
1206 *
1207 * Description:
1208 *       Read the host status register of ISP before aborting the command.
1209 *
1210 * Input:
1211 *       ha = pointer to host adapter structure.
1212 *
1213 *
1214 * Returns:
1215 *       Either true or false.
1216 *
1217 * Note: Return true if there is register disconnect.
1218 **************************************************************************/
1219 static inline
1220 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1221 {
1222         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1223         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1224
1225         if (IS_P3P_TYPE(ha))
1226                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1227         else
1228                 return ((RD_REG_DWORD(&reg->host_status)) ==
1229                         ISP_REG_DISCONNECT);
1230 }
1231
1232 /**************************************************************************
1233 * qla2xxx_eh_abort
1234 *
1235 * Description:
1236 *    The abort function will abort the specified command.
1237 *
1238 * Input:
1239 *    cmd = Linux SCSI command packet to be aborted.
1240 *
1241 * Returns:
1242 *    Either SUCCESS or FAILED.
1243 *
1244 * Note:
1245 *    Only return FAILED if command not returned by firmware.
1246 **************************************************************************/
1247 static int
1248 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1249 {
1250         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1251         srb_t *sp;
1252         int ret;
1253         unsigned int id;
1254         uint64_t lun;
1255         unsigned long flags;
1256         int rval, wait = 0;
1257         struct qla_hw_data *ha = vha->hw;
1258
1259         if (qla2x00_isp_reg_stat(ha)) {
1260                 ql_log(ql_log_info, vha, 0x8042,
1261                     "PCI/Register disconnect, exiting.\n");
1262                 return FAILED;
1263         }
1264         if (!CMD_SP(cmd))
1265                 return SUCCESS;
1266
1267         ret = fc_block_scsi_eh(cmd);
1268         if (ret != 0)
1269                 return ret;
1270         ret = SUCCESS;
1271
1272         id = cmd->device->id;
1273         lun = cmd->device->lun;
1274
1275         spin_lock_irqsave(&ha->hardware_lock, flags);
1276         sp = (srb_t *) CMD_SP(cmd);
1277         if (!sp) {
1278                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1279                 return SUCCESS;
1280         }
1281
1282         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1283             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1284             vha->host_no, id, lun, sp, cmd, sp->handle);
1285
1286         /* Get a reference to the sp and drop the lock.*/
1287         sp_get(sp);
1288
1289         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1290         rval = ha->isp_ops->abort_command(sp);
1291         if (rval) {
1292                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1293                         ret = SUCCESS;
1294                 else
1295                         ret = FAILED;
1296
1297                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1298                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1299         } else {
1300                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1301                     "Abort command mbx success cmd=%p.\n", cmd);
1302                 wait = 1;
1303         }
1304
1305         spin_lock_irqsave(&ha->hardware_lock, flags);
1306         sp->done(sp, 0);
1307         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1308
1309         /* Did the command return during mailbox execution? */
1310         if (ret == FAILED && !CMD_SP(cmd))
1311                 ret = SUCCESS;
1312
1313         /* Wait for the command to be returned. */
1314         if (wait) {
1315                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1316                         ql_log(ql_log_warn, vha, 0x8006,
1317                             "Abort handler timed out cmd=%p.\n", cmd);
1318                         ret = FAILED;
1319                 }
1320         }
1321
1322         ql_log(ql_log_info, vha, 0x801c,
1323             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1324             vha->host_no, id, lun, wait, ret);
1325
1326         return ret;
1327 }
1328
1329 int
1330 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1331         uint64_t l, enum nexus_wait_type type)
1332 {
1333         int cnt, match, status;
1334         unsigned long flags;
1335         struct qla_hw_data *ha = vha->hw;
1336         struct req_que *req;
1337         srb_t *sp;
1338         struct scsi_cmnd *cmd;
1339
1340         status = QLA_SUCCESS;
1341
1342         spin_lock_irqsave(&ha->hardware_lock, flags);
1343         req = vha->req;
1344         for (cnt = 1; status == QLA_SUCCESS &&
1345                 cnt < req->num_outstanding_cmds; cnt++) {
1346                 sp = req->outstanding_cmds[cnt];
1347                 if (!sp)
1348                         continue;
1349                 if (sp->type != SRB_SCSI_CMD)
1350                         continue;
1351                 if (vha->vp_idx != sp->vha->vp_idx)
1352                         continue;
1353                 match = 0;
1354                 cmd = GET_CMD_SP(sp);
1355                 switch (type) {
1356                 case WAIT_HOST:
1357                         match = 1;
1358                         break;
1359                 case WAIT_TARGET:
1360                         match = cmd->device->id == t;
1361                         break;
1362                 case WAIT_LUN:
1363                         match = (cmd->device->id == t &&
1364                                 cmd->device->lun == l);
1365                         break;
1366                 }
1367                 if (!match)
1368                         continue;
1369
1370                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1371                 status = qla2x00_eh_wait_on_command(cmd);
1372                 spin_lock_irqsave(&ha->hardware_lock, flags);
1373         }
1374         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1375
1376         return status;
1377 }
1378
1379 static char *reset_errors[] = {
1380         "HBA not online",
1381         "HBA not ready",
1382         "Task management failed",
1383         "Waiting for command completions",
1384 };
1385
1386 static int
1387 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1388     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1389 {
1390         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1391         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1392         int err;
1393
1394         if (!fcport) {
1395                 return FAILED;
1396         }
1397
1398         err = fc_block_scsi_eh(cmd);
1399         if (err != 0)
1400                 return err;
1401
1402         ql_log(ql_log_info, vha, 0x8009,
1403             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1404             cmd->device->id, cmd->device->lun, cmd);
1405
1406         err = 0;
1407         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1408                 ql_log(ql_log_warn, vha, 0x800a,
1409                     "Wait for hba online failed for cmd=%p.\n", cmd);
1410                 goto eh_reset_failed;
1411         }
1412         err = 2;
1413         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1414                 != QLA_SUCCESS) {
1415                 ql_log(ql_log_warn, vha, 0x800c,
1416                     "do_reset failed for cmd=%p.\n", cmd);
1417                 goto eh_reset_failed;
1418         }
1419         err = 3;
1420         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1421             cmd->device->lun, type) != QLA_SUCCESS) {
1422                 ql_log(ql_log_warn, vha, 0x800d,
1423                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1424                 goto eh_reset_failed;
1425         }
1426
1427         ql_log(ql_log_info, vha, 0x800e,
1428             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1429             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1430
1431         return SUCCESS;
1432
1433 eh_reset_failed:
1434         ql_log(ql_log_info, vha, 0x800f,
1435             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1436             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1437             cmd);
1438         return FAILED;
1439 }
1440
1441 static int
1442 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1443 {
1444         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1445         struct qla_hw_data *ha = vha->hw;
1446
1447         if (qla2x00_isp_reg_stat(ha)) {
1448                 ql_log(ql_log_info, vha, 0x803e,
1449                     "PCI/Register disconnect, exiting.\n");
1450                 return FAILED;
1451         }
1452
1453         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1454             ha->isp_ops->lun_reset);
1455 }
1456
1457 static int
1458 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1459 {
1460         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1461         struct qla_hw_data *ha = vha->hw;
1462
1463         if (qla2x00_isp_reg_stat(ha)) {
1464                 ql_log(ql_log_info, vha, 0x803f,
1465                     "PCI/Register disconnect, exiting.\n");
1466                 return FAILED;
1467         }
1468
1469         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1470             ha->isp_ops->target_reset);
1471 }
1472
1473 /**************************************************************************
1474 * qla2xxx_eh_bus_reset
1475 *
1476 * Description:
1477 *    The bus reset function will reset the bus and abort any executing
1478 *    commands.
1479 *
1480 * Input:
1481 *    cmd = Linux SCSI command packet of the command that cause the
1482 *          bus reset.
1483 *
1484 * Returns:
1485 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1486 *
1487 **************************************************************************/
1488 static int
1489 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1490 {
1491         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1492         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1493         int ret = FAILED;
1494         unsigned int id;
1495         uint64_t lun;
1496         struct qla_hw_data *ha = vha->hw;
1497
1498         if (qla2x00_isp_reg_stat(ha)) {
1499                 ql_log(ql_log_info, vha, 0x8040,
1500                     "PCI/Register disconnect, exiting.\n");
1501                 return FAILED;
1502         }
1503
1504         id = cmd->device->id;
1505         lun = cmd->device->lun;
1506
1507         if (!fcport) {
1508                 return ret;
1509         }
1510
1511         ret = fc_block_scsi_eh(cmd);
1512         if (ret != 0)
1513                 return ret;
1514         ret = FAILED;
1515
1516         ql_log(ql_log_info, vha, 0x8012,
1517             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1518
1519         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1520                 ql_log(ql_log_fatal, vha, 0x8013,
1521                     "Wait for hba online failed board disabled.\n");
1522                 goto eh_bus_reset_done;
1523         }
1524
1525         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1526                 ret = SUCCESS;
1527
1528         if (ret == FAILED)
1529                 goto eh_bus_reset_done;
1530
1531         /* Flush outstanding commands. */
1532         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1533             QLA_SUCCESS) {
1534                 ql_log(ql_log_warn, vha, 0x8014,
1535                     "Wait for pending commands failed.\n");
1536                 ret = FAILED;
1537         }
1538
1539 eh_bus_reset_done:
1540         ql_log(ql_log_warn, vha, 0x802b,
1541             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1542             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1543
1544         return ret;
1545 }
1546
1547 /**************************************************************************
1548 * qla2xxx_eh_host_reset
1549 *
1550 * Description:
1551 *    The reset function will reset the Adapter.
1552 *
1553 * Input:
1554 *      cmd = Linux SCSI command packet of the command that cause the
1555 *            adapter reset.
1556 *
1557 * Returns:
1558 *      Either SUCCESS or FAILED.
1559 *
1560 * Note:
1561 **************************************************************************/
1562 static int
1563 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1564 {
1565         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1566         struct qla_hw_data *ha = vha->hw;
1567         int ret = FAILED;
1568         unsigned int id;
1569         uint64_t lun;
1570         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1571
1572         if (qla2x00_isp_reg_stat(ha)) {
1573                 ql_log(ql_log_info, vha, 0x8041,
1574                     "PCI/Register disconnect, exiting.\n");
1575                 schedule_work(&ha->board_disable);
1576                 return SUCCESS;
1577         }
1578
1579         id = cmd->device->id;
1580         lun = cmd->device->lun;
1581
1582         ql_log(ql_log_info, vha, 0x8018,
1583             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1584
1585         /*
1586          * No point in issuing another reset if one is active.  Also do not
1587          * attempt a reset if we are updating flash.
1588          */
1589         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1590                 goto eh_host_reset_lock;
1591
1592         if (vha != base_vha) {
1593                 if (qla2x00_vp_abort_isp(vha))
1594                         goto eh_host_reset_lock;
1595         } else {
1596                 if (IS_P3P_TYPE(vha->hw)) {
1597                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1598                                 /* Ctx reset success */
1599                                 ret = SUCCESS;
1600                                 goto eh_host_reset_lock;
1601                         }
1602                         /* fall thru if ctx reset failed */
1603                 }
1604                 if (ha->wq)
1605                         flush_workqueue(ha->wq);
1606
1607                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1608                 if (ha->isp_ops->abort_isp(base_vha)) {
1609                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1610                         /* failed. schedule dpc to try */
1611                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1612
1613                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1614                                 ql_log(ql_log_warn, vha, 0x802a,
1615                                     "wait for hba online failed.\n");
1616                                 goto eh_host_reset_lock;
1617                         }
1618                 }
1619                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1620         }
1621
1622         /* Waiting for command to be returned to OS.*/
1623         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1624                 QLA_SUCCESS)
1625                 ret = SUCCESS;
1626
1627 eh_host_reset_lock:
1628         ql_log(ql_log_info, vha, 0x8017,
1629             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1630             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1631
1632         return ret;
1633 }
1634
1635 /*
1636 * qla2x00_loop_reset
1637 *      Issue loop reset.
1638 *
1639 * Input:
1640 *      ha = adapter block pointer.
1641 *
1642 * Returns:
1643 *      0 = success
1644 */
1645 int
1646 qla2x00_loop_reset(scsi_qla_host_t *vha)
1647 {
1648         int ret;
1649         struct qla_hw_data *ha = vha->hw;
1650
1651         if (IS_QLAFX00(ha))
1652                 return QLA_SUCCESS;
1653
1654         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1655                 atomic_set(&vha->loop_state, LOOP_DOWN);
1656                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1657                 qla2x00_mark_all_devices_lost(vha, 0);
1658                 ret = qla2x00_full_login_lip(vha);
1659                 if (ret != QLA_SUCCESS) {
1660                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1661                             "full_login_lip=%d.\n", ret);
1662                 }
1663         }
1664
1665         if (ha->flags.enable_lip_reset) {
1666                 ret = qla2x00_lip_reset(vha);
1667                 if (ret != QLA_SUCCESS)
1668                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1669                             "lip_reset failed (%d).\n", ret);
1670         }
1671
1672         /* Issue marker command only when we are going to start the I/O */
1673         vha->marker_needed = 1;
1674
1675         return QLA_SUCCESS;
1676 }
1677
1678 void
1679 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1680 {
1681         int que, cnt, status;
1682         unsigned long flags;
1683         srb_t *sp;
1684         struct qla_hw_data *ha = vha->hw;
1685         struct req_que *req;
1686         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1687         struct qla_tgt_cmd *cmd;
1688         uint8_t trace = 0;
1689
1690         if (!ha->req_q_map)
1691                 return;
1692         spin_lock_irqsave(&ha->hardware_lock, flags);
1693         for (que = 0; que < ha->max_req_queues; que++) {
1694                 req = ha->req_q_map[que];
1695                 if (!req)
1696                         continue;
1697                 if (!req->outstanding_cmds)
1698                         continue;
1699                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1700                         sp = req->outstanding_cmds[cnt];
1701                         if (sp) {
1702                                 req->outstanding_cmds[cnt] = NULL;
1703                                 if (sp->cmd_type == TYPE_SRB) {
1704                                         if (sp->type == SRB_NVME_CMD ||
1705                                             sp->type == SRB_NVME_LS) {
1706                                                 sp_get(sp);
1707                                                 spin_unlock_irqrestore(
1708                                                     &ha->hardware_lock, flags);
1709                                                 qla_nvme_abort(ha, sp);
1710                                                 spin_lock_irqsave(
1711                                                     &ha->hardware_lock, flags);
1712                                         } else if (GET_CMD_SP(sp) &&
1713                                             !ha->flags.eeh_busy &&
1714                                             (!test_bit(ABORT_ISP_ACTIVE,
1715                                                 &vha->dpc_flags)) &&
1716                                             (sp->type == SRB_SCSI_CMD)) {
1717                                                 /*
1718                                                  * Don't abort commands in
1719                                                  * adapter during EEH
1720                                                  * recovery as it's not
1721                                                  * accessible/responding.
1722                                                  *
1723                                                  * Get a reference to the sp
1724                                                  * and drop the lock. The
1725                                                  * reference ensures this
1726                                                  * sp->done() call and not the
1727                                                  * call in qla2xxx_eh_abort()
1728                                                  * ends the SCSI command (with
1729                                                  * result 'res').
1730                                                  */
1731                                                 sp_get(sp);
1732                                                 spin_unlock_irqrestore(
1733                                                     &ha->hardware_lock, flags);
1734                                                 status = qla2xxx_eh_abort(
1735                                                     GET_CMD_SP(sp));
1736                                                 spin_lock_irqsave(
1737                                                     &ha->hardware_lock, flags);
1738                                                 /*
1739                                                  * Get rid of extra reference
1740                                                  * if immediate exit from
1741                                                  * ql2xxx_eh_abort
1742                                                  */
1743                                                 if (status == FAILED &&
1744                                                     (qla2x00_isp_reg_stat(ha)))
1745                                                         atomic_dec(
1746                                                             &sp->ref_count);
1747                                         }
1748                                         sp->done(sp, res);
1749                                 } else {
1750                                         if (!vha->hw->tgt.tgt_ops || !tgt ||
1751                                             qla_ini_mode_enabled(vha)) {
1752                                                 if (!trace)
1753                                                         ql_dbg(ql_dbg_tgt_mgt,
1754                                                             vha, 0xf003,
1755                                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1756                                                             vha->dpc_flags);
1757                                                 continue;
1758                                         }
1759                                         cmd = (struct qla_tgt_cmd *)sp;
1760                                         qlt_abort_cmd_on_host_reset(cmd->vha,
1761                                             cmd);
1762                                 }
1763                         }
1764                 }
1765         }
1766         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1767 }
1768
1769 static int
1770 qla2xxx_slave_alloc(struct scsi_device *sdev)
1771 {
1772         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1773
1774         if (!rport || fc_remote_port_chkready(rport))
1775                 return -ENXIO;
1776
1777         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1778
1779         return 0;
1780 }
1781
1782 static int
1783 qla2xxx_slave_configure(struct scsi_device *sdev)
1784 {
1785         scsi_qla_host_t *vha = shost_priv(sdev->host);
1786         struct req_que *req = vha->req;
1787
1788         if (IS_T10_PI_CAPABLE(vha->hw))
1789                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1790
1791         scsi_change_queue_depth(sdev, req->max_q_depth);
1792         return 0;
1793 }
1794
1795 static void
1796 qla2xxx_slave_destroy(struct scsi_device *sdev)
1797 {
1798         sdev->hostdata = NULL;
1799 }
1800
1801 /**
1802  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1803  * @ha: HA context
1804  *
1805  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1806  * supported addressing method.
1807  */
1808 static void
1809 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1810 {
1811         /* Assume a 32bit DMA mask. */
1812         ha->flags.enable_64bit_addressing = 0;
1813
1814         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1815                 /* Any upper-dword bits set? */
1816                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1817                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1818                         /* Ok, a 64bit DMA mask is applicable. */
1819                         ha->flags.enable_64bit_addressing = 1;
1820                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1821                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1822                         return;
1823                 }
1824         }
1825
1826         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1827         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1828 }
1829
1830 static void
1831 qla2x00_enable_intrs(struct qla_hw_data *ha)
1832 {
1833         unsigned long flags = 0;
1834         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1835
1836         spin_lock_irqsave(&ha->hardware_lock, flags);
1837         ha->interrupts_on = 1;
1838         /* enable risc and host interrupts */
1839         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1840         RD_REG_WORD(&reg->ictrl);
1841         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1842
1843 }
1844
1845 static void
1846 qla2x00_disable_intrs(struct qla_hw_data *ha)
1847 {
1848         unsigned long flags = 0;
1849         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1850
1851         spin_lock_irqsave(&ha->hardware_lock, flags);
1852         ha->interrupts_on = 0;
1853         /* disable risc and host interrupts */
1854         WRT_REG_WORD(&reg->ictrl, 0);
1855         RD_REG_WORD(&reg->ictrl);
1856         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1857 }
1858
1859 static void
1860 qla24xx_enable_intrs(struct qla_hw_data *ha)
1861 {
1862         unsigned long flags = 0;
1863         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1864
1865         spin_lock_irqsave(&ha->hardware_lock, flags);
1866         ha->interrupts_on = 1;
1867         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1868         RD_REG_DWORD(&reg->ictrl);
1869         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1870 }
1871
1872 static void
1873 qla24xx_disable_intrs(struct qla_hw_data *ha)
1874 {
1875         unsigned long flags = 0;
1876         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1877
1878         if (IS_NOPOLLING_TYPE(ha))
1879                 return;
1880         spin_lock_irqsave(&ha->hardware_lock, flags);
1881         ha->interrupts_on = 0;
1882         WRT_REG_DWORD(&reg->ictrl, 0);
1883         RD_REG_DWORD(&reg->ictrl);
1884         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1885 }
1886
1887 static int
1888 qla2x00_iospace_config(struct qla_hw_data *ha)
1889 {
1890         resource_size_t pio;
1891         uint16_t msix;
1892
1893         if (pci_request_selected_regions(ha->pdev, ha->bars,
1894             QLA2XXX_DRIVER_NAME)) {
1895                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1896                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1897                     pci_name(ha->pdev));
1898                 goto iospace_error_exit;
1899         }
1900         if (!(ha->bars & 1))
1901                 goto skip_pio;
1902
1903         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1904         pio = pci_resource_start(ha->pdev, 0);
1905         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1906                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1907                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1908                             "Invalid pci I/O region size (%s).\n",
1909                             pci_name(ha->pdev));
1910                         pio = 0;
1911                 }
1912         } else {
1913                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1914                     "Region #0 no a PIO resource (%s).\n",
1915                     pci_name(ha->pdev));
1916                 pio = 0;
1917         }
1918         ha->pio_address = pio;
1919         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1920             "PIO address=%llu.\n",
1921             (unsigned long long)ha->pio_address);
1922
1923 skip_pio:
1924         /* Use MMIO operations for all accesses. */
1925         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1926                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1927                     "Region #1 not an MMIO resource (%s), aborting.\n",
1928                     pci_name(ha->pdev));
1929                 goto iospace_error_exit;
1930         }
1931         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1932                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1933                     "Invalid PCI mem region size (%s), aborting.\n",
1934                     pci_name(ha->pdev));
1935                 goto iospace_error_exit;
1936         }
1937
1938         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1939         if (!ha->iobase) {
1940                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1941                     "Cannot remap MMIO (%s), aborting.\n",
1942                     pci_name(ha->pdev));
1943                 goto iospace_error_exit;
1944         }
1945
1946         /* Determine queue resources */
1947         ha->max_req_queues = ha->max_rsp_queues = 1;
1948         ha->msix_count = QLA_BASE_VECTORS;
1949         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1950                 goto mqiobase_exit;
1951
1952         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1953                         pci_resource_len(ha->pdev, 3));
1954         if (ha->mqiobase) {
1955                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1956                     "MQIO Base=%p.\n", ha->mqiobase);
1957                 /* Read MSIX vector size of the board */
1958                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1959                 ha->msix_count = msix + 1;
1960                 /* Max queues are bounded by available msix vectors */
1961                 /* MB interrupt uses 1 vector */
1962                 ha->max_req_queues = ha->msix_count - 1;
1963                 ha->max_rsp_queues = ha->max_req_queues;
1964                 /* Queue pairs is the max value minus the base queue pair */
1965                 ha->max_qpairs = ha->max_rsp_queues - 1;
1966                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1967                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1968
1969                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1970                     "MSI-X vector count: %d.\n", ha->msix_count);
1971         } else
1972                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1973                     "BAR 3 not enabled.\n");
1974
1975 mqiobase_exit:
1976         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1977             "MSIX Count: %d.\n", ha->msix_count);
1978         return (0);
1979
1980 iospace_error_exit:
1981         return (-ENOMEM);
1982 }
1983
1984
1985 static int
1986 qla83xx_iospace_config(struct qla_hw_data *ha)
1987 {
1988         uint16_t msix;
1989
1990         if (pci_request_selected_regions(ha->pdev, ha->bars,
1991             QLA2XXX_DRIVER_NAME)) {
1992                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1993                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1994                     pci_name(ha->pdev));
1995
1996                 goto iospace_error_exit;
1997         }
1998
1999         /* Use MMIO operations for all accesses. */
2000         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2001                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2002                     "Invalid pci I/O region size (%s).\n",
2003                     pci_name(ha->pdev));
2004                 goto iospace_error_exit;
2005         }
2006         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2007                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2008                     "Invalid PCI mem region size (%s), aborting\n",
2009                         pci_name(ha->pdev));
2010                 goto iospace_error_exit;
2011         }
2012
2013         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2014         if (!ha->iobase) {
2015                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2016                     "Cannot remap MMIO (%s), aborting.\n",
2017                     pci_name(ha->pdev));
2018                 goto iospace_error_exit;
2019         }
2020
2021         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2022         /* 83XX 26XX always use MQ type access for queues
2023          * - mbar 2, a.k.a region 4 */
2024         ha->max_req_queues = ha->max_rsp_queues = 1;
2025         ha->msix_count = QLA_BASE_VECTORS;
2026         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2027                         pci_resource_len(ha->pdev, 4));
2028
2029         if (!ha->mqiobase) {
2030                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2031                     "BAR2/region4 not enabled\n");
2032                 goto mqiobase_exit;
2033         }
2034
2035         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2036                         pci_resource_len(ha->pdev, 2));
2037         if (ha->msixbase) {
2038                 /* Read MSIX vector size of the board */
2039                 pci_read_config_word(ha->pdev,
2040                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2041                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2042                 /*
2043                  * By default, driver uses at least two msix vectors
2044                  * (default & rspq)
2045                  */
2046                 if (ql2xmqsupport) {
2047                         /* MB interrupt uses 1 vector */
2048                         ha->max_req_queues = ha->msix_count - 1;
2049
2050                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2051                         if (QLA_TGT_MODE_ENABLED())
2052                                 ha->max_req_queues--;
2053
2054                         ha->max_rsp_queues = ha->max_req_queues;
2055
2056                         /* Queue pairs is the max value minus
2057                          * the base queue pair */
2058                         ha->max_qpairs = ha->max_req_queues - 1;
2059                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2060                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2061                 }
2062                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2063                     "MSI-X vector count: %d.\n", ha->msix_count);
2064         } else
2065                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2066                     "BAR 1 not enabled.\n");
2067
2068 mqiobase_exit:
2069         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2070             "MSIX Count: %d.\n", ha->msix_count);
2071         return 0;
2072
2073 iospace_error_exit:
2074         return -ENOMEM;
2075 }
2076
2077 static struct isp_operations qla2100_isp_ops = {
2078         .pci_config             = qla2100_pci_config,
2079         .reset_chip             = qla2x00_reset_chip,
2080         .chip_diag              = qla2x00_chip_diag,
2081         .config_rings           = qla2x00_config_rings,
2082         .reset_adapter          = qla2x00_reset_adapter,
2083         .nvram_config           = qla2x00_nvram_config,
2084         .update_fw_options      = qla2x00_update_fw_options,
2085         .load_risc              = qla2x00_load_risc,
2086         .pci_info_str           = qla2x00_pci_info_str,
2087         .fw_version_str         = qla2x00_fw_version_str,
2088         .intr_handler           = qla2100_intr_handler,
2089         .enable_intrs           = qla2x00_enable_intrs,
2090         .disable_intrs          = qla2x00_disable_intrs,
2091         .abort_command          = qla2x00_abort_command,
2092         .target_reset           = qla2x00_abort_target,
2093         .lun_reset              = qla2x00_lun_reset,
2094         .fabric_login           = qla2x00_login_fabric,
2095         .fabric_logout          = qla2x00_fabric_logout,
2096         .calc_req_entries       = qla2x00_calc_iocbs_32,
2097         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2098         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2099         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2100         .read_nvram             = qla2x00_read_nvram_data,
2101         .write_nvram            = qla2x00_write_nvram_data,
2102         .fw_dump                = qla2100_fw_dump,
2103         .beacon_on              = NULL,
2104         .beacon_off             = NULL,
2105         .beacon_blink           = NULL,
2106         .read_optrom            = qla2x00_read_optrom_data,
2107         .write_optrom           = qla2x00_write_optrom_data,
2108         .get_flash_version      = qla2x00_get_flash_version,
2109         .start_scsi             = qla2x00_start_scsi,
2110         .start_scsi_mq          = NULL,
2111         .abort_isp              = qla2x00_abort_isp,
2112         .iospace_config         = qla2x00_iospace_config,
2113         .initialize_adapter     = qla2x00_initialize_adapter,
2114 };
2115
2116 static struct isp_operations qla2300_isp_ops = {
2117         .pci_config             = qla2300_pci_config,
2118         .reset_chip             = qla2x00_reset_chip,
2119         .chip_diag              = qla2x00_chip_diag,
2120         .config_rings           = qla2x00_config_rings,
2121         .reset_adapter          = qla2x00_reset_adapter,
2122         .nvram_config           = qla2x00_nvram_config,
2123         .update_fw_options      = qla2x00_update_fw_options,
2124         .load_risc              = qla2x00_load_risc,
2125         .pci_info_str           = qla2x00_pci_info_str,
2126         .fw_version_str         = qla2x00_fw_version_str,
2127         .intr_handler           = qla2300_intr_handler,
2128         .enable_intrs           = qla2x00_enable_intrs,
2129         .disable_intrs          = qla2x00_disable_intrs,
2130         .abort_command          = qla2x00_abort_command,
2131         .target_reset           = qla2x00_abort_target,
2132         .lun_reset              = qla2x00_lun_reset,
2133         .fabric_login           = qla2x00_login_fabric,
2134         .fabric_logout          = qla2x00_fabric_logout,
2135         .calc_req_entries       = qla2x00_calc_iocbs_32,
2136         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2137         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2138         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2139         .read_nvram             = qla2x00_read_nvram_data,
2140         .write_nvram            = qla2x00_write_nvram_data,
2141         .fw_dump                = qla2300_fw_dump,
2142         .beacon_on              = qla2x00_beacon_on,
2143         .beacon_off             = qla2x00_beacon_off,
2144         .beacon_blink           = qla2x00_beacon_blink,
2145         .read_optrom            = qla2x00_read_optrom_data,
2146         .write_optrom           = qla2x00_write_optrom_data,
2147         .get_flash_version      = qla2x00_get_flash_version,
2148         .start_scsi             = qla2x00_start_scsi,
2149         .start_scsi_mq          = NULL,
2150         .abort_isp              = qla2x00_abort_isp,
2151         .iospace_config         = qla2x00_iospace_config,
2152         .initialize_adapter     = qla2x00_initialize_adapter,
2153 };
2154
2155 static struct isp_operations qla24xx_isp_ops = {
2156         .pci_config             = qla24xx_pci_config,
2157         .reset_chip             = qla24xx_reset_chip,
2158         .chip_diag              = qla24xx_chip_diag,
2159         .config_rings           = qla24xx_config_rings,
2160         .reset_adapter          = qla24xx_reset_adapter,
2161         .nvram_config           = qla24xx_nvram_config,
2162         .update_fw_options      = qla24xx_update_fw_options,
2163         .load_risc              = qla24xx_load_risc,
2164         .pci_info_str           = qla24xx_pci_info_str,
2165         .fw_version_str         = qla24xx_fw_version_str,
2166         .intr_handler           = qla24xx_intr_handler,
2167         .enable_intrs           = qla24xx_enable_intrs,
2168         .disable_intrs          = qla24xx_disable_intrs,
2169         .abort_command          = qla24xx_abort_command,
2170         .target_reset           = qla24xx_abort_target,
2171         .lun_reset              = qla24xx_lun_reset,
2172         .fabric_login           = qla24xx_login_fabric,
2173         .fabric_logout          = qla24xx_fabric_logout,
2174         .calc_req_entries       = NULL,
2175         .build_iocbs            = NULL,
2176         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2177         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2178         .read_nvram             = qla24xx_read_nvram_data,
2179         .write_nvram            = qla24xx_write_nvram_data,
2180         .fw_dump                = qla24xx_fw_dump,
2181         .beacon_on              = qla24xx_beacon_on,
2182         .beacon_off             = qla24xx_beacon_off,
2183         .beacon_blink           = qla24xx_beacon_blink,
2184         .read_optrom            = qla24xx_read_optrom_data,
2185         .write_optrom           = qla24xx_write_optrom_data,
2186         .get_flash_version      = qla24xx_get_flash_version,
2187         .start_scsi             = qla24xx_start_scsi,
2188         .start_scsi_mq          = NULL,
2189         .abort_isp              = qla2x00_abort_isp,
2190         .iospace_config         = qla2x00_iospace_config,
2191         .initialize_adapter     = qla2x00_initialize_adapter,
2192 };
2193
2194 static struct isp_operations qla25xx_isp_ops = {
2195         .pci_config             = qla25xx_pci_config,
2196         .reset_chip             = qla24xx_reset_chip,
2197         .chip_diag              = qla24xx_chip_diag,
2198         .config_rings           = qla24xx_config_rings,
2199         .reset_adapter          = qla24xx_reset_adapter,
2200         .nvram_config           = qla24xx_nvram_config,
2201         .update_fw_options      = qla24xx_update_fw_options,
2202         .load_risc              = qla24xx_load_risc,
2203         .pci_info_str           = qla24xx_pci_info_str,
2204         .fw_version_str         = qla24xx_fw_version_str,
2205         .intr_handler           = qla24xx_intr_handler,
2206         .enable_intrs           = qla24xx_enable_intrs,
2207         .disable_intrs          = qla24xx_disable_intrs,
2208         .abort_command          = qla24xx_abort_command,
2209         .target_reset           = qla24xx_abort_target,
2210         .lun_reset              = qla24xx_lun_reset,
2211         .fabric_login           = qla24xx_login_fabric,
2212         .fabric_logout          = qla24xx_fabric_logout,
2213         .calc_req_entries       = NULL,
2214         .build_iocbs            = NULL,
2215         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2216         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2217         .read_nvram             = qla25xx_read_nvram_data,
2218         .write_nvram            = qla25xx_write_nvram_data,
2219         .fw_dump                = qla25xx_fw_dump,
2220         .beacon_on              = qla24xx_beacon_on,
2221         .beacon_off             = qla24xx_beacon_off,
2222         .beacon_blink           = qla24xx_beacon_blink,
2223         .read_optrom            = qla25xx_read_optrom_data,
2224         .write_optrom           = qla24xx_write_optrom_data,
2225         .get_flash_version      = qla24xx_get_flash_version,
2226         .start_scsi             = qla24xx_dif_start_scsi,
2227         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2228         .abort_isp              = qla2x00_abort_isp,
2229         .iospace_config         = qla2x00_iospace_config,
2230         .initialize_adapter     = qla2x00_initialize_adapter,
2231 };
2232
2233 static struct isp_operations qla81xx_isp_ops = {
2234         .pci_config             = qla25xx_pci_config,
2235         .reset_chip             = qla24xx_reset_chip,
2236         .chip_diag              = qla24xx_chip_diag,
2237         .config_rings           = qla24xx_config_rings,
2238         .reset_adapter          = qla24xx_reset_adapter,
2239         .nvram_config           = qla81xx_nvram_config,
2240         .update_fw_options      = qla81xx_update_fw_options,
2241         .load_risc              = qla81xx_load_risc,
2242         .pci_info_str           = qla24xx_pci_info_str,
2243         .fw_version_str         = qla24xx_fw_version_str,
2244         .intr_handler           = qla24xx_intr_handler,
2245         .enable_intrs           = qla24xx_enable_intrs,
2246         .disable_intrs          = qla24xx_disable_intrs,
2247         .abort_command          = qla24xx_abort_command,
2248         .target_reset           = qla24xx_abort_target,
2249         .lun_reset              = qla24xx_lun_reset,
2250         .fabric_login           = qla24xx_login_fabric,
2251         .fabric_logout          = qla24xx_fabric_logout,
2252         .calc_req_entries       = NULL,
2253         .build_iocbs            = NULL,
2254         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2255         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2256         .read_nvram             = NULL,
2257         .write_nvram            = NULL,
2258         .fw_dump                = qla81xx_fw_dump,
2259         .beacon_on              = qla24xx_beacon_on,
2260         .beacon_off             = qla24xx_beacon_off,
2261         .beacon_blink           = qla83xx_beacon_blink,
2262         .read_optrom            = qla25xx_read_optrom_data,
2263         .write_optrom           = qla24xx_write_optrom_data,
2264         .get_flash_version      = qla24xx_get_flash_version,
2265         .start_scsi             = qla24xx_dif_start_scsi,
2266         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2267         .abort_isp              = qla2x00_abort_isp,
2268         .iospace_config         = qla2x00_iospace_config,
2269         .initialize_adapter     = qla2x00_initialize_adapter,
2270 };
2271
2272 static struct isp_operations qla82xx_isp_ops = {
2273         .pci_config             = qla82xx_pci_config,
2274         .reset_chip             = qla82xx_reset_chip,
2275         .chip_diag              = qla24xx_chip_diag,
2276         .config_rings           = qla82xx_config_rings,
2277         .reset_adapter          = qla24xx_reset_adapter,
2278         .nvram_config           = qla81xx_nvram_config,
2279         .update_fw_options      = qla24xx_update_fw_options,
2280         .load_risc              = qla82xx_load_risc,
2281         .pci_info_str           = qla24xx_pci_info_str,
2282         .fw_version_str         = qla24xx_fw_version_str,
2283         .intr_handler           = qla82xx_intr_handler,
2284         .enable_intrs           = qla82xx_enable_intrs,
2285         .disable_intrs          = qla82xx_disable_intrs,
2286         .abort_command          = qla24xx_abort_command,
2287         .target_reset           = qla24xx_abort_target,
2288         .lun_reset              = qla24xx_lun_reset,
2289         .fabric_login           = qla24xx_login_fabric,
2290         .fabric_logout          = qla24xx_fabric_logout,
2291         .calc_req_entries       = NULL,
2292         .build_iocbs            = NULL,
2293         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2294         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2295         .read_nvram             = qla24xx_read_nvram_data,
2296         .write_nvram            = qla24xx_write_nvram_data,
2297         .fw_dump                = qla82xx_fw_dump,
2298         .beacon_on              = qla82xx_beacon_on,
2299         .beacon_off             = qla82xx_beacon_off,
2300         .beacon_blink           = NULL,
2301         .read_optrom            = qla82xx_read_optrom_data,
2302         .write_optrom           = qla82xx_write_optrom_data,
2303         .get_flash_version      = qla82xx_get_flash_version,
2304         .start_scsi             = qla82xx_start_scsi,
2305         .start_scsi_mq          = NULL,
2306         .abort_isp              = qla82xx_abort_isp,
2307         .iospace_config         = qla82xx_iospace_config,
2308         .initialize_adapter     = qla2x00_initialize_adapter,
2309 };
2310
2311 static struct isp_operations qla8044_isp_ops = {
2312         .pci_config             = qla82xx_pci_config,
2313         .reset_chip             = qla82xx_reset_chip,
2314         .chip_diag              = qla24xx_chip_diag,
2315         .config_rings           = qla82xx_config_rings,
2316         .reset_adapter          = qla24xx_reset_adapter,
2317         .nvram_config           = qla81xx_nvram_config,
2318         .update_fw_options      = qla24xx_update_fw_options,
2319         .load_risc              = qla82xx_load_risc,
2320         .pci_info_str           = qla24xx_pci_info_str,
2321         .fw_version_str         = qla24xx_fw_version_str,
2322         .intr_handler           = qla8044_intr_handler,
2323         .enable_intrs           = qla82xx_enable_intrs,
2324         .disable_intrs          = qla82xx_disable_intrs,
2325         .abort_command          = qla24xx_abort_command,
2326         .target_reset           = qla24xx_abort_target,
2327         .lun_reset              = qla24xx_lun_reset,
2328         .fabric_login           = qla24xx_login_fabric,
2329         .fabric_logout          = qla24xx_fabric_logout,
2330         .calc_req_entries       = NULL,
2331         .build_iocbs            = NULL,
2332         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2333         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2334         .read_nvram             = NULL,
2335         .write_nvram            = NULL,
2336         .fw_dump                = qla8044_fw_dump,
2337         .beacon_on              = qla82xx_beacon_on,
2338         .beacon_off             = qla82xx_beacon_off,
2339         .beacon_blink           = NULL,
2340         .read_optrom            = qla8044_read_optrom_data,
2341         .write_optrom           = qla8044_write_optrom_data,
2342         .get_flash_version      = qla82xx_get_flash_version,
2343         .start_scsi             = qla82xx_start_scsi,
2344         .start_scsi_mq          = NULL,
2345         .abort_isp              = qla8044_abort_isp,
2346         .iospace_config         = qla82xx_iospace_config,
2347         .initialize_adapter     = qla2x00_initialize_adapter,
2348 };
2349
2350 static struct isp_operations qla83xx_isp_ops = {
2351         .pci_config             = qla25xx_pci_config,
2352         .reset_chip             = qla24xx_reset_chip,
2353         .chip_diag              = qla24xx_chip_diag,
2354         .config_rings           = qla24xx_config_rings,
2355         .reset_adapter          = qla24xx_reset_adapter,
2356         .nvram_config           = qla81xx_nvram_config,
2357         .update_fw_options      = qla81xx_update_fw_options,
2358         .load_risc              = qla81xx_load_risc,
2359         .pci_info_str           = qla24xx_pci_info_str,
2360         .fw_version_str         = qla24xx_fw_version_str,
2361         .intr_handler           = qla24xx_intr_handler,
2362         .enable_intrs           = qla24xx_enable_intrs,
2363         .disable_intrs          = qla24xx_disable_intrs,
2364         .abort_command          = qla24xx_abort_command,
2365         .target_reset           = qla24xx_abort_target,
2366         .lun_reset              = qla24xx_lun_reset,
2367         .fabric_login           = qla24xx_login_fabric,
2368         .fabric_logout          = qla24xx_fabric_logout,
2369         .calc_req_entries       = NULL,
2370         .build_iocbs            = NULL,
2371         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2372         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2373         .read_nvram             = NULL,
2374         .write_nvram            = NULL,
2375         .fw_dump                = qla83xx_fw_dump,
2376         .beacon_on              = qla24xx_beacon_on,
2377         .beacon_off             = qla24xx_beacon_off,
2378         .beacon_blink           = qla83xx_beacon_blink,
2379         .read_optrom            = qla25xx_read_optrom_data,
2380         .write_optrom           = qla24xx_write_optrom_data,
2381         .get_flash_version      = qla24xx_get_flash_version,
2382         .start_scsi             = qla24xx_dif_start_scsi,
2383         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2384         .abort_isp              = qla2x00_abort_isp,
2385         .iospace_config         = qla83xx_iospace_config,
2386         .initialize_adapter     = qla2x00_initialize_adapter,
2387 };
2388
2389 static struct isp_operations qlafx00_isp_ops = {
2390         .pci_config             = qlafx00_pci_config,
2391         .reset_chip             = qlafx00_soft_reset,
2392         .chip_diag              = qlafx00_chip_diag,
2393         .config_rings           = qlafx00_config_rings,
2394         .reset_adapter          = qlafx00_soft_reset,
2395         .nvram_config           = NULL,
2396         .update_fw_options      = NULL,
2397         .load_risc              = NULL,
2398         .pci_info_str           = qlafx00_pci_info_str,
2399         .fw_version_str         = qlafx00_fw_version_str,
2400         .intr_handler           = qlafx00_intr_handler,
2401         .enable_intrs           = qlafx00_enable_intrs,
2402         .disable_intrs          = qlafx00_disable_intrs,
2403         .abort_command          = qla24xx_async_abort_command,
2404         .target_reset           = qlafx00_abort_target,
2405         .lun_reset              = qlafx00_lun_reset,
2406         .fabric_login           = NULL,
2407         .fabric_logout          = NULL,
2408         .calc_req_entries       = NULL,
2409         .build_iocbs            = NULL,
2410         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2411         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2412         .read_nvram             = qla24xx_read_nvram_data,
2413         .write_nvram            = qla24xx_write_nvram_data,
2414         .fw_dump                = NULL,
2415         .beacon_on              = qla24xx_beacon_on,
2416         .beacon_off             = qla24xx_beacon_off,
2417         .beacon_blink           = NULL,
2418         .read_optrom            = qla24xx_read_optrom_data,
2419         .write_optrom           = qla24xx_write_optrom_data,
2420         .get_flash_version      = qla24xx_get_flash_version,
2421         .start_scsi             = qlafx00_start_scsi,
2422         .start_scsi_mq          = NULL,
2423         .abort_isp              = qlafx00_abort_isp,
2424         .iospace_config         = qlafx00_iospace_config,
2425         .initialize_adapter     = qlafx00_initialize_adapter,
2426 };
2427
2428 static struct isp_operations qla27xx_isp_ops = {
2429         .pci_config             = qla25xx_pci_config,
2430         .reset_chip             = qla24xx_reset_chip,
2431         .chip_diag              = qla24xx_chip_diag,
2432         .config_rings           = qla24xx_config_rings,
2433         .reset_adapter          = qla24xx_reset_adapter,
2434         .nvram_config           = qla81xx_nvram_config,
2435         .update_fw_options      = qla81xx_update_fw_options,
2436         .load_risc              = qla81xx_load_risc,
2437         .pci_info_str           = qla24xx_pci_info_str,
2438         .fw_version_str         = qla24xx_fw_version_str,
2439         .intr_handler           = qla24xx_intr_handler,
2440         .enable_intrs           = qla24xx_enable_intrs,
2441         .disable_intrs          = qla24xx_disable_intrs,
2442         .abort_command          = qla24xx_abort_command,
2443         .target_reset           = qla24xx_abort_target,
2444         .lun_reset              = qla24xx_lun_reset,
2445         .fabric_login           = qla24xx_login_fabric,
2446         .fabric_logout          = qla24xx_fabric_logout,
2447         .calc_req_entries       = NULL,
2448         .build_iocbs            = NULL,
2449         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2450         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2451         .read_nvram             = NULL,
2452         .write_nvram            = NULL,
2453         .fw_dump                = qla27xx_fwdump,
2454         .beacon_on              = qla24xx_beacon_on,
2455         .beacon_off             = qla24xx_beacon_off,
2456         .beacon_blink           = qla83xx_beacon_blink,
2457         .read_optrom            = qla25xx_read_optrom_data,
2458         .write_optrom           = qla24xx_write_optrom_data,
2459         .get_flash_version      = qla24xx_get_flash_version,
2460         .start_scsi             = qla24xx_dif_start_scsi,
2461         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2462         .abort_isp              = qla2x00_abort_isp,
2463         .iospace_config         = qla83xx_iospace_config,
2464         .initialize_adapter     = qla2x00_initialize_adapter,
2465 };
2466
2467 static inline void
2468 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2469 {
2470         ha->device_type = DT_EXTENDED_IDS;
2471         switch (ha->pdev->device) {
2472         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2473                 ha->isp_type |= DT_ISP2100;
2474                 ha->device_type &= ~DT_EXTENDED_IDS;
2475                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2476                 break;
2477         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2478                 ha->isp_type |= DT_ISP2200;
2479                 ha->device_type &= ~DT_EXTENDED_IDS;
2480                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2481                 break;
2482         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2483                 ha->isp_type |= DT_ISP2300;
2484                 ha->device_type |= DT_ZIO_SUPPORTED;
2485                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2486                 break;
2487         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2488                 ha->isp_type |= DT_ISP2312;
2489                 ha->device_type |= DT_ZIO_SUPPORTED;
2490                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2491                 break;
2492         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2493                 ha->isp_type |= DT_ISP2322;
2494                 ha->device_type |= DT_ZIO_SUPPORTED;
2495                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2496                     ha->pdev->subsystem_device == 0x0170)
2497                         ha->device_type |= DT_OEM_001;
2498                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2499                 break;
2500         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2501                 ha->isp_type |= DT_ISP6312;
2502                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2503                 break;
2504         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2505                 ha->isp_type |= DT_ISP6322;
2506                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2507                 break;
2508         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2509                 ha->isp_type |= DT_ISP2422;
2510                 ha->device_type |= DT_ZIO_SUPPORTED;
2511                 ha->device_type |= DT_FWI2;
2512                 ha->device_type |= DT_IIDMA;
2513                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2514                 break;
2515         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2516                 ha->isp_type |= DT_ISP2432;
2517                 ha->device_type |= DT_ZIO_SUPPORTED;
2518                 ha->device_type |= DT_FWI2;
2519                 ha->device_type |= DT_IIDMA;
2520                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2521                 break;
2522         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2523                 ha->isp_type |= DT_ISP8432;
2524                 ha->device_type |= DT_ZIO_SUPPORTED;
2525                 ha->device_type |= DT_FWI2;
2526                 ha->device_type |= DT_IIDMA;
2527                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2528                 break;
2529         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2530                 ha->isp_type |= DT_ISP5422;
2531                 ha->device_type |= DT_FWI2;
2532                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2533                 break;
2534         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2535                 ha->isp_type |= DT_ISP5432;
2536                 ha->device_type |= DT_FWI2;
2537                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2538                 break;
2539         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2540                 ha->isp_type |= DT_ISP2532;
2541                 ha->device_type |= DT_ZIO_SUPPORTED;
2542                 ha->device_type |= DT_FWI2;
2543                 ha->device_type |= DT_IIDMA;
2544                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2545                 break;
2546         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2547                 ha->isp_type |= DT_ISP8001;
2548                 ha->device_type |= DT_ZIO_SUPPORTED;
2549                 ha->device_type |= DT_FWI2;
2550                 ha->device_type |= DT_IIDMA;
2551                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2552                 break;
2553         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2554                 ha->isp_type |= DT_ISP8021;
2555                 ha->device_type |= DT_ZIO_SUPPORTED;
2556                 ha->device_type |= DT_FWI2;
2557                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2558                 /* Initialize 82XX ISP flags */
2559                 qla82xx_init_flags(ha);
2560                 break;
2561          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2562                 ha->isp_type |= DT_ISP8044;
2563                 ha->device_type |= DT_ZIO_SUPPORTED;
2564                 ha->device_type |= DT_FWI2;
2565                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2566                 /* Initialize 82XX ISP flags */
2567                 qla82xx_init_flags(ha);
2568                 break;
2569         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2570                 ha->isp_type |= DT_ISP2031;
2571                 ha->device_type |= DT_ZIO_SUPPORTED;
2572                 ha->device_type |= DT_FWI2;
2573                 ha->device_type |= DT_IIDMA;
2574                 ha->device_type |= DT_T10_PI;
2575                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2576                 break;
2577         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2578                 ha->isp_type |= DT_ISP8031;
2579                 ha->device_type |= DT_ZIO_SUPPORTED;
2580                 ha->device_type |= DT_FWI2;
2581                 ha->device_type |= DT_IIDMA;
2582                 ha->device_type |= DT_T10_PI;
2583                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2584                 break;
2585         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2586                 ha->isp_type |= DT_ISPFX00;
2587                 break;
2588         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2589                 ha->isp_type |= DT_ISP2071;
2590                 ha->device_type |= DT_ZIO_SUPPORTED;
2591                 ha->device_type |= DT_FWI2;
2592                 ha->device_type |= DT_IIDMA;
2593                 ha->device_type |= DT_T10_PI;
2594                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2595                 break;
2596         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2597                 ha->isp_type |= DT_ISP2271;
2598                 ha->device_type |= DT_ZIO_SUPPORTED;
2599                 ha->device_type |= DT_FWI2;
2600                 ha->device_type |= DT_IIDMA;
2601                 ha->device_type |= DT_T10_PI;
2602                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2603                 break;
2604         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2605                 ha->isp_type |= DT_ISP2261;
2606                 ha->device_type |= DT_ZIO_SUPPORTED;
2607                 ha->device_type |= DT_FWI2;
2608                 ha->device_type |= DT_IIDMA;
2609                 ha->device_type |= DT_T10_PI;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611                 break;
2612         }
2613
2614         if (IS_QLA82XX(ha))
2615                 ha->port_no = ha->portnum & 1;
2616         else {
2617                 /* Get adapter physical port no from interrupt pin register. */
2618                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2619                 if (IS_QLA27XX(ha))
2620                         ha->port_no--;
2621                 else
2622                         ha->port_no = !(ha->port_no & 1);
2623         }
2624
2625         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2626             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2627             ha->device_type, ha->port_no, ha->fw_srisc_address);
2628 }
2629
2630 static void
2631 qla2xxx_scan_start(struct Scsi_Host *shost)
2632 {
2633         scsi_qla_host_t *vha = shost_priv(shost);
2634
2635         if (vha->hw->flags.running_gold_fw)
2636                 return;
2637
2638         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2639         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2640         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2641         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2642 }
2643
2644 static int
2645 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2646 {
2647         scsi_qla_host_t *vha = shost_priv(shost);
2648
2649         if (test_bit(UNLOADING, &vha->dpc_flags))
2650                 return 1;
2651         if (!vha->host)
2652                 return 1;
2653         if (time > vha->hw->loop_reset_delay * HZ)
2654                 return 1;
2655
2656         return atomic_read(&vha->loop_state) == LOOP_READY;
2657 }
2658
2659 static void qla2x00_iocb_work_fn(struct work_struct *work)
2660 {
2661         struct scsi_qla_host *vha = container_of(work,
2662                 struct scsi_qla_host, iocb_work);
2663         int cnt = 0;
2664
2665         while (!list_empty(&vha->work_list)) {
2666                 qla2x00_do_work(vha);
2667                 cnt++;
2668                 if (cnt > 10)
2669                         break;
2670         }
2671 }
2672
2673 /*
2674  * PCI driver interface
2675  */
2676 static int
2677 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2678 {
2679         int     ret = -ENODEV;
2680         struct Scsi_Host *host;
2681         scsi_qla_host_t *base_vha = NULL;
2682         struct qla_hw_data *ha;
2683         char pci_info[30];
2684         char fw_str[30], wq_name[30];
2685         struct scsi_host_template *sht;
2686         int bars, mem_only = 0;
2687         uint16_t req_length = 0, rsp_length = 0;
2688         struct req_que *req = NULL;
2689         struct rsp_que *rsp = NULL;
2690         int i;
2691
2692         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2693         sht = &qla2xxx_driver_template;
2694         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2695             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2696             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2697             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2698             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2699             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2700             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2701             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2702             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2703             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2704             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2705             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2706             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2707             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2708             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2709                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2710                 mem_only = 1;
2711                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2712                     "Mem only adapter.\n");
2713         }
2714         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2715             "Bars=%d.\n", bars);
2716
2717         if (mem_only) {
2718                 if (pci_enable_device_mem(pdev))
2719                         return ret;
2720         } else {
2721                 if (pci_enable_device(pdev))
2722                         return ret;
2723         }
2724
2725         /* This may fail but that's ok */
2726         pci_enable_pcie_error_reporting(pdev);
2727
2728         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2729         if (!ha) {
2730                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2731                     "Unable to allocate memory for ha.\n");
2732                 goto disable_device;
2733         }
2734         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2735             "Memory allocated for ha=%p.\n", ha);
2736         ha->pdev = pdev;
2737         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2738         spin_lock_init(&ha->tgt.q_full_lock);
2739         spin_lock_init(&ha->tgt.sess_lock);
2740         spin_lock_init(&ha->tgt.atio_lock);
2741
2742         atomic_set(&ha->nvme_active_aen_cnt, 0);
2743
2744         /* Clear our data area */
2745         ha->bars = bars;
2746         ha->mem_only = mem_only;
2747         spin_lock_init(&ha->hardware_lock);
2748         spin_lock_init(&ha->vport_slock);
2749         mutex_init(&ha->selflogin_lock);
2750         mutex_init(&ha->optrom_mutex);
2751
2752         /* Set ISP-type information. */
2753         qla2x00_set_isp_flags(ha);
2754
2755         /* Set EEH reset type to fundamental if required by hba */
2756         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2757             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2758                 pdev->needs_freset = 1;
2759
2760         ha->prev_topology = 0;
2761         ha->init_cb_size = sizeof(init_cb_t);
2762         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2763         ha->optrom_size = OPTROM_SIZE_2300;
2764
2765         /* Assign ISP specific operations. */
2766         if (IS_QLA2100(ha)) {
2767                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2768                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2769                 req_length = REQUEST_ENTRY_CNT_2100;
2770                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2771                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2772                 ha->gid_list_info_size = 4;
2773                 ha->flash_conf_off = ~0;
2774                 ha->flash_data_off = ~0;
2775                 ha->nvram_conf_off = ~0;
2776                 ha->nvram_data_off = ~0;
2777                 ha->isp_ops = &qla2100_isp_ops;
2778         } else if (IS_QLA2200(ha)) {
2779                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2780                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2781                 req_length = REQUEST_ENTRY_CNT_2200;
2782                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2783                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2784                 ha->gid_list_info_size = 4;
2785                 ha->flash_conf_off = ~0;
2786                 ha->flash_data_off = ~0;
2787                 ha->nvram_conf_off = ~0;
2788                 ha->nvram_data_off = ~0;
2789                 ha->isp_ops = &qla2100_isp_ops;
2790         } else if (IS_QLA23XX(ha)) {
2791                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2792                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2793                 req_length = REQUEST_ENTRY_CNT_2200;
2794                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2795                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2796                 ha->gid_list_info_size = 6;
2797                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2798                         ha->optrom_size = OPTROM_SIZE_2322;
2799                 ha->flash_conf_off = ~0;
2800                 ha->flash_data_off = ~0;
2801                 ha->nvram_conf_off = ~0;
2802                 ha->nvram_data_off = ~0;
2803                 ha->isp_ops = &qla2300_isp_ops;
2804         } else if (IS_QLA24XX_TYPE(ha)) {
2805                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2806                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2807                 req_length = REQUEST_ENTRY_CNT_24XX;
2808                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2809                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2810                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2811                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2812                 ha->gid_list_info_size = 8;
2813                 ha->optrom_size = OPTROM_SIZE_24XX;
2814                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2815                 ha->isp_ops = &qla24xx_isp_ops;
2816                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2817                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2818                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2819                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2820         } else if (IS_QLA25XX(ha)) {
2821                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2822                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2823                 req_length = REQUEST_ENTRY_CNT_24XX;
2824                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2825                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2826                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2827                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2828                 ha->gid_list_info_size = 8;
2829                 ha->optrom_size = OPTROM_SIZE_25XX;
2830                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2831                 ha->isp_ops = &qla25xx_isp_ops;
2832                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2833                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2834                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2835                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2836         } else if (IS_QLA81XX(ha)) {
2837                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2838                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2839                 req_length = REQUEST_ENTRY_CNT_24XX;
2840                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2841                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2842                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2843                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2844                 ha->gid_list_info_size = 8;
2845                 ha->optrom_size = OPTROM_SIZE_81XX;
2846                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2847                 ha->isp_ops = &qla81xx_isp_ops;
2848                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2849                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2850                 ha->nvram_conf_off = ~0;
2851                 ha->nvram_data_off = ~0;
2852         } else if (IS_QLA82XX(ha)) {
2853                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2854                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2855                 req_length = REQUEST_ENTRY_CNT_82XX;
2856                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2857                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2858                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2859                 ha->gid_list_info_size = 8;
2860                 ha->optrom_size = OPTROM_SIZE_82XX;
2861                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2862                 ha->isp_ops = &qla82xx_isp_ops;
2863                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2864                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2865                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2866                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2867         } else if (IS_QLA8044(ha)) {
2868                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2869                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2870                 req_length = REQUEST_ENTRY_CNT_82XX;
2871                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2872                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2873                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2874                 ha->gid_list_info_size = 8;
2875                 ha->optrom_size = OPTROM_SIZE_83XX;
2876                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2877                 ha->isp_ops = &qla8044_isp_ops;
2878                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2879                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2880                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2881                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2882         } else if (IS_QLA83XX(ha)) {
2883                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2884                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2885                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2886                 req_length = REQUEST_ENTRY_CNT_83XX;
2887                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2888                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2889                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2890                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2891                 ha->gid_list_info_size = 8;
2892                 ha->optrom_size = OPTROM_SIZE_83XX;
2893                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2894                 ha->isp_ops = &qla83xx_isp_ops;
2895                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2896                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2897                 ha->nvram_conf_off = ~0;
2898                 ha->nvram_data_off = ~0;
2899         }  else if (IS_QLAFX00(ha)) {
2900                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2901                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2902                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2903                 req_length = REQUEST_ENTRY_CNT_FX00;
2904                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2905                 ha->isp_ops = &qlafx00_isp_ops;
2906                 ha->port_down_retry_count = 30; /* default value */
2907                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2908                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2909                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2910                 ha->mr.fw_hbt_en = 1;
2911                 ha->mr.host_info_resend = false;
2912                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2913         } else if (IS_QLA27XX(ha)) {
2914                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2915                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2916                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2917                 req_length = REQUEST_ENTRY_CNT_83XX;
2918                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2919                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2920                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2921                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2922                 ha->gid_list_info_size = 8;
2923                 ha->optrom_size = OPTROM_SIZE_83XX;
2924                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2925                 ha->isp_ops = &qla27xx_isp_ops;
2926                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2927                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2928                 ha->nvram_conf_off = ~0;
2929                 ha->nvram_data_off = ~0;
2930         }
2931
2932         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2933             "mbx_count=%d, req_length=%d, "
2934             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2935             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2936             "max_fibre_devices=%d.\n",
2937             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2938             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2939             ha->nvram_npiv_size, ha->max_fibre_devices);
2940         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2941             "isp_ops=%p, flash_conf_off=%d, "
2942             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2943             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2944             ha->nvram_conf_off, ha->nvram_data_off);
2945
2946         /* Configure PCI I/O space */
2947         ret = ha->isp_ops->iospace_config(ha);
2948         if (ret)
2949                 goto iospace_config_failed;
2950
2951         ql_log_pci(ql_log_info, pdev, 0x001d,
2952             "Found an ISP%04X irq %d iobase 0x%p.\n",
2953             pdev->device, pdev->irq, ha->iobase);
2954         mutex_init(&ha->vport_lock);
2955         mutex_init(&ha->mq_lock);
2956         init_completion(&ha->mbx_cmd_comp);
2957         complete(&ha->mbx_cmd_comp);
2958         init_completion(&ha->mbx_intr_comp);
2959         init_completion(&ha->dcbx_comp);
2960         init_completion(&ha->lb_portup_comp);
2961
2962         set_bit(0, (unsigned long *) ha->vp_idx_map);
2963
2964         qla2x00_config_dma_addressing(ha);
2965         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2966             "64 Bit addressing is %s.\n",
2967             ha->flags.enable_64bit_addressing ? "enable" :
2968             "disable");
2969         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2970         if (ret) {
2971                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2972                     "Failed to allocate memory for adapter, aborting.\n");
2973
2974                 goto probe_hw_failed;
2975         }
2976
2977         req->max_q_depth = MAX_Q_DEPTH;
2978         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2979                 req->max_q_depth = ql2xmaxqdepth;
2980
2981
2982         base_vha = qla2x00_create_host(sht, ha);
2983         if (!base_vha) {
2984                 ret = -ENOMEM;
2985                 goto probe_hw_failed;
2986         }
2987
2988         pci_set_drvdata(pdev, base_vha);
2989         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2990
2991         host = base_vha->host;
2992         base_vha->req = req;
2993         if (IS_QLA2XXX_MIDTYPE(ha))
2994                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2995         else
2996                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2997                                                 base_vha->vp_idx;
2998
2999         /* Setup fcport template structure. */
3000         ha->mr.fcport.vha = base_vha;
3001         ha->mr.fcport.port_type = FCT_UNKNOWN;
3002         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3003         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3004         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3005         ha->mr.fcport.scan_state = 1;
3006
3007         /* Set the SG table size based on ISP type */
3008         if (!IS_FWI2_CAPABLE(ha)) {
3009                 if (IS_QLA2100(ha))
3010                         host->sg_tablesize = 32;
3011         } else {
3012                 if (!IS_QLA82XX(ha))
3013                         host->sg_tablesize = QLA_SG_ALL;
3014         }
3015         host->max_id = ha->max_fibre_devices;
3016         host->cmd_per_lun = 3;
3017         host->unique_id = host->host_no;
3018         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3019                 host->max_cmd_len = 32;
3020         else
3021                 host->max_cmd_len = MAX_CMDSZ;
3022         host->max_channel = MAX_BUSES - 1;
3023         /* Older HBAs support only 16-bit LUNs */
3024         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3025             ql2xmaxlun > 0xffff)
3026                 host->max_lun = 0xffff;
3027         else
3028                 host->max_lun = ql2xmaxlun;
3029         host->transportt = qla2xxx_transport_template;
3030         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3031
3032         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3033             "max_id=%d this_id=%d "
3034             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3035             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3036             host->this_id, host->cmd_per_lun, host->unique_id,
3037             host->max_cmd_len, host->max_channel, host->max_lun,
3038             host->transportt, sht->vendor_id);
3039
3040         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3041
3042         /* Set up the irqs */
3043         ret = qla2x00_request_irqs(ha, rsp);
3044         if (ret)
3045                 goto probe_failed;
3046
3047         /* Alloc arrays of request and response ring ptrs */
3048         ret = qla2x00_alloc_queues(ha, req, rsp);
3049         if (ret) {
3050                 ql_log(ql_log_fatal, base_vha, 0x003d,
3051                     "Failed to allocate memory for queue pointers..."
3052                     "aborting.\n");
3053                 goto probe_failed;
3054         }
3055
3056         if (ha->mqenable && shost_use_blk_mq(host)) {
3057                 /* number of hardware queues supported by blk/scsi-mq*/
3058                 host->nr_hw_queues = ha->max_qpairs;
3059
3060                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3061                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3062         } else
3063                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3064                         "blk/scsi-mq disabled.\n");
3065
3066         qlt_probe_one_stage1(base_vha, ha);
3067
3068         pci_save_state(pdev);
3069
3070         /* Assign back pointers */
3071         rsp->req = req;
3072         req->rsp = rsp;
3073
3074         if (IS_QLAFX00(ha)) {
3075                 ha->rsp_q_map[0] = rsp;
3076                 ha->req_q_map[0] = req;
3077                 set_bit(0, ha->req_qid_map);
3078                 set_bit(0, ha->rsp_qid_map);
3079         }
3080
3081         /* FWI2-capable only. */
3082         req->req_q_in = &ha->iobase->isp24.req_q_in;
3083         req->req_q_out = &ha->iobase->isp24.req_q_out;
3084         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3085         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3086         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3087                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3088                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3089                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3090                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3091         }
3092
3093         if (IS_QLAFX00(ha)) {
3094                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3095                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3096                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3097                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3098         }
3099
3100         if (IS_P3P_TYPE(ha)) {
3101                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3102                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3103                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3104         }
3105
3106         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3107             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3108             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3109         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3110             "req->req_q_in=%p req->req_q_out=%p "
3111             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3112             req->req_q_in, req->req_q_out,
3113             rsp->rsp_q_in, rsp->rsp_q_out);
3114         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3115             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3116             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3117         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3118             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3119             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3120
3121         if (ha->isp_ops->initialize_adapter(base_vha)) {
3122                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3123                     "Failed to initialize adapter - Adapter flags %x.\n",
3124                     base_vha->device_flags);
3125
3126                 if (IS_QLA82XX(ha)) {
3127                         qla82xx_idc_lock(ha);
3128                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3129                                 QLA8XXX_DEV_FAILED);
3130                         qla82xx_idc_unlock(ha);
3131                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3132                             "HW State: FAILED.\n");
3133                 } else if (IS_QLA8044(ha)) {
3134                         qla8044_idc_lock(ha);
3135                         qla8044_wr_direct(base_vha,
3136                                 QLA8044_CRB_DEV_STATE_INDEX,
3137                                 QLA8XXX_DEV_FAILED);
3138                         qla8044_idc_unlock(ha);
3139                         ql_log(ql_log_fatal, base_vha, 0x0150,
3140                             "HW State: FAILED.\n");
3141                 }
3142
3143                 ret = -ENODEV;
3144                 goto probe_failed;
3145         }
3146
3147         if (IS_QLAFX00(ha))
3148                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3149         else
3150                 host->can_queue = req->num_outstanding_cmds - 10;
3151
3152         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3153             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3154             host->can_queue, base_vha->req,
3155             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3156
3157         ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3158         if (unlikely(!ha->wq)) {
3159                 ret = -ENOMEM;
3160                 goto probe_failed;
3161         }
3162
3163         if (ha->mqenable) {
3164                 bool mq = false;
3165                 bool startit = false;
3166
3167                 if (QLA_TGT_MODE_ENABLED()) {
3168                         mq = true;
3169                         startit = false;
3170                 }
3171
3172                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3173                     shost_use_blk_mq(host)) {
3174                         mq = true;
3175                         startit = true;
3176                 }
3177
3178                 if (mq) {
3179                         /* Create start of day qpairs for Block MQ */
3180                         for (i = 0; i < ha->max_qpairs; i++)
3181                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3182                 }
3183         }
3184
3185         if (ha->flags.running_gold_fw)
3186                 goto skip_dpc;
3187
3188         /*
3189          * Startup the kernel thread for this host adapter
3190          */
3191         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3192             "%s_dpc", base_vha->host_str);
3193         if (IS_ERR(ha->dpc_thread)) {
3194                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3195                     "Failed to start DPC thread.\n");
3196                 ret = PTR_ERR(ha->dpc_thread);
3197                 ha->dpc_thread = NULL;
3198                 goto probe_failed;
3199         }
3200         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3201             "DPC thread started successfully.\n");
3202
3203         /*
3204          * If we're not coming up in initiator mode, we might sit for
3205          * a while without waking up the dpc thread, which leads to a
3206          * stuck process warning.  So just kick the dpc once here and
3207          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3208          */
3209         qla2xxx_wake_dpc(base_vha);
3210
3211         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3212
3213         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3214                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3215                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3216                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3217
3218                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3219                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3220                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3221                 INIT_WORK(&ha->idc_state_handler,
3222                     qla83xx_idc_state_handler_work);
3223                 INIT_WORK(&ha->nic_core_unrecoverable,
3224                     qla83xx_nic_core_unrecoverable_work);
3225         }
3226
3227 skip_dpc:
3228         list_add_tail(&base_vha->list, &ha->vp_list);
3229         base_vha->host->irq = ha->pdev->irq;
3230
3231         /* Initialized the timer */
3232         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3233         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3234             "Started qla2x00_timer with "
3235             "interval=%d.\n", WATCH_INTERVAL);
3236         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3237             "Detected hba at address=%p.\n",
3238             ha);
3239
3240         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3241                 if (ha->fw_attributes & BIT_4) {
3242                         int prot = 0, guard;
3243                         base_vha->flags.difdix_supported = 1;
3244                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3245                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3246                         if (ql2xenabledif == 1)
3247                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3248                         scsi_host_set_prot(host,
3249                             prot | SHOST_DIF_TYPE1_PROTECTION
3250                             | SHOST_DIF_TYPE2_PROTECTION
3251                             | SHOST_DIF_TYPE3_PROTECTION
3252                             | SHOST_DIX_TYPE1_PROTECTION
3253                             | SHOST_DIX_TYPE2_PROTECTION
3254                             | SHOST_DIX_TYPE3_PROTECTION);
3255
3256                         guard = SHOST_DIX_GUARD_CRC;
3257
3258                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3259                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3260                                 guard |= SHOST_DIX_GUARD_IP;
3261
3262                         scsi_host_set_guard(host, guard);
3263                 } else
3264                         base_vha->flags.difdix_supported = 0;
3265         }
3266
3267         ha->isp_ops->enable_intrs(ha);
3268
3269         if (IS_QLAFX00(ha)) {
3270                 ret = qlafx00_fx_disc(base_vha,
3271                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3272                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3273                     QLA_SG_ALL : 128;
3274         }
3275
3276         ret = scsi_add_host(host, &pdev->dev);
3277         if (ret)
3278                 goto probe_failed;
3279
3280         base_vha->flags.init_done = 1;
3281         base_vha->flags.online = 1;
3282         ha->prev_minidump_failed = 0;
3283
3284         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3285             "Init done and hba is online.\n");
3286
3287         if (qla_ini_mode_enabled(base_vha) ||
3288                 qla_dual_mode_enabled(base_vha))
3289                 scsi_scan_host(host);
3290         else
3291                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3292                         "skipping scsi_scan_host() for non-initiator port\n");
3293
3294         qla2x00_alloc_sysfs_attr(base_vha);
3295
3296         if (IS_QLAFX00(ha)) {
3297                 ret = qlafx00_fx_disc(base_vha,
3298                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3299
3300                 /* Register system information */
3301                 ret =  qlafx00_fx_disc(base_vha,
3302                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3303         }
3304
3305         qla2x00_init_host_attr(base_vha);
3306
3307         qla2x00_dfs_setup(base_vha);
3308
3309         ql_log(ql_log_info, base_vha, 0x00fb,
3310             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3311         ql_log(ql_log_info, base_vha, 0x00fc,
3312             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3313             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3314             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3315             base_vha->host_no,
3316             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3317
3318         qlt_add_target(ha, base_vha);
3319
3320         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3321
3322         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3323                 return -ENODEV;
3324
3325         if (ha->flags.detected_lr_sfp) {
3326                 ql_log(ql_log_info, base_vha, 0xffff,
3327                     "Reset chip to pick up LR SFP setting\n");
3328                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3329                 qla2xxx_wake_dpc(base_vha);
3330         }
3331
3332         return 0;
3333
3334 probe_failed:
3335         if (base_vha->timer_active)
3336                 qla2x00_stop_timer(base_vha);
3337         base_vha->flags.online = 0;
3338         if (ha->dpc_thread) {
3339                 struct task_struct *t = ha->dpc_thread;
3340
3341                 ha->dpc_thread = NULL;
3342                 kthread_stop(t);
3343         }
3344
3345         qla2x00_free_device(base_vha);
3346         scsi_host_put(base_vha->host);
3347         /*
3348          * Need to NULL out local req/rsp after
3349          * qla2x00_free_device => qla2x00_free_queues frees
3350          * what these are pointing to. Or else we'll
3351          * fall over below in qla2x00_free_req/rsp_que.
3352          */
3353         req = NULL;
3354         rsp = NULL;
3355
3356 probe_hw_failed:
3357         qla2x00_mem_free(ha);
3358         qla2x00_free_req_que(ha, req);
3359         qla2x00_free_rsp_que(ha, rsp);
3360         qla2x00_clear_drv_active(ha);
3361
3362 iospace_config_failed:
3363         if (IS_P3P_TYPE(ha)) {
3364                 if (!ha->nx_pcibase)
3365                         iounmap((device_reg_t *)ha->nx_pcibase);
3366                 if (!ql2xdbwr)
3367                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3368         } else {
3369                 if (ha->iobase)
3370                         iounmap(ha->iobase);
3371                 if (ha->cregbase)
3372                         iounmap(ha->cregbase);
3373         }
3374         pci_release_selected_regions(ha->pdev, ha->bars);
3375         kfree(ha);
3376
3377 disable_device:
3378         pci_disable_device(pdev);
3379         return ret;
3380 }
3381
3382 static void
3383 qla2x00_shutdown(struct pci_dev *pdev)
3384 {
3385         scsi_qla_host_t *vha;
3386         struct qla_hw_data  *ha;
3387
3388         vha = pci_get_drvdata(pdev);
3389         ha = vha->hw;
3390
3391         ql_log(ql_log_info, vha, 0xfffa,
3392                 "Adapter shutdown\n");
3393
3394         /*
3395          * Prevent future board_disable and wait
3396          * until any pending board_disable has completed.
3397          */
3398         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3399         cancel_work_sync(&ha->board_disable);
3400
3401         if (!atomic_read(&pdev->enable_cnt))
3402                 return;
3403
3404         /* Notify ISPFX00 firmware */
3405         if (IS_QLAFX00(ha))
3406                 qlafx00_driver_shutdown(vha, 20);
3407
3408         /* Turn-off FCE trace */
3409         if (ha->flags.fce_enabled) {
3410                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3411                 ha->flags.fce_enabled = 0;
3412         }
3413
3414         /* Turn-off EFT trace */
3415         if (ha->eft)
3416                 qla2x00_disable_eft_trace(vha);
3417
3418         /* Stop currently executing firmware. */
3419         qla2x00_try_to_stop_firmware(vha);
3420
3421         /* Disable timer */
3422         if (vha->timer_active)
3423                 qla2x00_stop_timer(vha);
3424
3425         /* Turn adapter off line */
3426         vha->flags.online = 0;
3427
3428         /* turn-off interrupts on the card */
3429         if (ha->interrupts_on) {
3430                 vha->flags.init_done = 0;
3431                 ha->isp_ops->disable_intrs(ha);
3432         }
3433
3434         qla2x00_free_irqs(vha);
3435
3436         qla2x00_free_fw_dump(ha);
3437
3438         pci_disable_device(pdev);
3439         ql_log(ql_log_info, vha, 0xfffe,
3440                 "Adapter shutdown successfully.\n");
3441 }
3442
3443 /* Deletes all the virtual ports for a given ha */
3444 static void
3445 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3446 {
3447         scsi_qla_host_t *vha;
3448         unsigned long flags;
3449
3450         mutex_lock(&ha->vport_lock);
3451         while (ha->cur_vport_count) {
3452                 spin_lock_irqsave(&ha->vport_slock, flags);
3453
3454                 BUG_ON(base_vha->list.next == &ha->vp_list);
3455                 /* This assumes first entry in ha->vp_list is always base vha */
3456                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3457                 scsi_host_get(vha->host);
3458
3459                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3460                 mutex_unlock(&ha->vport_lock);
3461
3462                 fc_vport_terminate(vha->fc_vport);
3463                 scsi_host_put(vha->host);
3464
3465                 mutex_lock(&ha->vport_lock);
3466         }
3467         mutex_unlock(&ha->vport_lock);
3468 }
3469
3470 /* Stops all deferred work threads */
3471 static void
3472 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3473 {
3474         /* Cancel all work and destroy DPC workqueues */
3475         if (ha->dpc_lp_wq) {
3476                 cancel_work_sync(&ha->idc_aen);
3477                 destroy_workqueue(ha->dpc_lp_wq);
3478                 ha->dpc_lp_wq = NULL;
3479         }
3480
3481         if (ha->dpc_hp_wq) {
3482                 cancel_work_sync(&ha->nic_core_reset);
3483                 cancel_work_sync(&ha->idc_state_handler);
3484                 cancel_work_sync(&ha->nic_core_unrecoverable);
3485                 destroy_workqueue(ha->dpc_hp_wq);
3486                 ha->dpc_hp_wq = NULL;
3487         }
3488
3489         /* Kill the kernel thread for this host */
3490         if (ha->dpc_thread) {
3491                 struct task_struct *t = ha->dpc_thread;
3492
3493                 /*
3494                  * qla2xxx_wake_dpc checks for ->dpc_thread
3495                  * so we need to zero it out.
3496                  */
3497                 ha->dpc_thread = NULL;
3498                 kthread_stop(t);
3499         }
3500 }
3501
3502 static void
3503 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3504 {
3505         if (IS_QLA82XX(ha)) {
3506
3507                 iounmap((device_reg_t *)ha->nx_pcibase);
3508                 if (!ql2xdbwr)
3509                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3510         } else {
3511                 if (ha->iobase)
3512                         iounmap(ha->iobase);
3513
3514                 if (ha->cregbase)
3515                         iounmap(ha->cregbase);
3516
3517                 if (ha->mqiobase)
3518                         iounmap(ha->mqiobase);
3519
3520                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3521                         iounmap(ha->msixbase);
3522         }
3523 }
3524
3525 static void
3526 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3527 {
3528         if (IS_QLA8044(ha)) {
3529                 qla8044_idc_lock(ha);
3530                 qla8044_clear_drv_active(ha);
3531                 qla8044_idc_unlock(ha);
3532         } else if (IS_QLA82XX(ha)) {
3533                 qla82xx_idc_lock(ha);
3534                 qla82xx_clear_drv_active(ha);
3535                 qla82xx_idc_unlock(ha);
3536         }
3537 }
3538
3539 static void
3540 qla2x00_remove_one(struct pci_dev *pdev)
3541 {
3542         scsi_qla_host_t *base_vha;
3543         struct qla_hw_data  *ha;
3544
3545         base_vha = pci_get_drvdata(pdev);
3546         ha = base_vha->hw;
3547
3548         /* Indicate device removal to prevent future board_disable and wait
3549          * until any pending board_disable has completed. */
3550         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3551         cancel_work_sync(&ha->board_disable);
3552
3553         /*
3554          * If the PCI device is disabled then there was a PCI-disconnect and
3555          * qla2x00_disable_board_on_pci_error has taken care of most of the
3556          * resources.
3557          */
3558         if (!atomic_read(&pdev->enable_cnt)) {
3559                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3560                     base_vha->gnl.l, base_vha->gnl.ldma);
3561
3562                 scsi_host_put(base_vha->host);
3563                 kfree(ha);
3564                 pci_set_drvdata(pdev, NULL);
3565                 return;
3566         }
3567         qla2x00_wait_for_hba_ready(base_vha);
3568
3569         qla2x00_wait_for_sess_deletion(base_vha);
3570
3571         /*
3572          * if UNLOAD flag is already set, then continue unload,
3573          * where it was set first.
3574          */
3575         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3576                 return;
3577
3578         set_bit(UNLOADING, &base_vha->dpc_flags);
3579
3580         qla_nvme_delete(base_vha);
3581
3582         dma_free_coherent(&ha->pdev->dev,
3583                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3584
3585         if (IS_QLAFX00(ha))
3586                 qlafx00_driver_shutdown(base_vha, 20);
3587
3588         qla2x00_delete_all_vps(ha, base_vha);
3589
3590         if (IS_QLA8031(ha)) {
3591                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3592                     "Clearing fcoe driver presence.\n");
3593                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3594                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3595                             "Error while clearing DRV-Presence.\n");
3596         }
3597
3598         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3599
3600         qla2x00_dfs_remove(base_vha);
3601
3602         qla84xx_put_chip(base_vha);
3603
3604         /* Laser should be disabled only for ISP2031 */
3605         if (IS_QLA2031(ha))
3606                 qla83xx_disable_laser(base_vha);
3607
3608         /* Disable timer */
3609         if (base_vha->timer_active)
3610                 qla2x00_stop_timer(base_vha);
3611
3612         base_vha->flags.online = 0;
3613
3614         /* free DMA memory */
3615         if (ha->exlogin_buf)
3616                 qla2x00_free_exlogin_buffer(ha);
3617
3618         /* free DMA memory */
3619         if (ha->exchoffld_buf)
3620                 qla2x00_free_exchoffld_buffer(ha);
3621
3622         qla2x00_destroy_deferred_work(ha);
3623
3624         qlt_remove_target(ha, base_vha);
3625
3626         qla2x00_free_sysfs_attr(base_vha, true);
3627
3628         fc_remove_host(base_vha->host);
3629         qlt_remove_target_resources(ha);
3630
3631         scsi_remove_host(base_vha->host);
3632
3633         qla2x00_free_device(base_vha);
3634
3635         qla2x00_clear_drv_active(ha);
3636
3637         scsi_host_put(base_vha->host);
3638
3639         qla2x00_unmap_iobases(ha);
3640
3641         pci_release_selected_regions(ha->pdev, ha->bars);
3642         kfree(ha);
3643
3644         pci_disable_pcie_error_reporting(pdev);
3645
3646         pci_disable_device(pdev);
3647 }
3648
3649 static void
3650 qla2x00_free_device(scsi_qla_host_t *vha)
3651 {
3652         struct qla_hw_data *ha = vha->hw;
3653
3654         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3655
3656         /* Disable timer */
3657         if (vha->timer_active)
3658                 qla2x00_stop_timer(vha);
3659
3660         qla25xx_delete_queues(vha);
3661
3662         if (ha->flags.fce_enabled)
3663                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3664
3665         if (ha->eft)
3666                 qla2x00_disable_eft_trace(vha);
3667
3668         /* Stop currently executing firmware. */
3669         qla2x00_try_to_stop_firmware(vha);
3670
3671         vha->flags.online = 0;
3672
3673         /* turn-off interrupts on the card */
3674         if (ha->interrupts_on) {
3675                 vha->flags.init_done = 0;
3676                 ha->isp_ops->disable_intrs(ha);
3677         }
3678
3679         qla2x00_free_fcports(vha);
3680
3681         qla2x00_free_irqs(vha);
3682
3683         /* Flush the work queue and remove it */
3684         if (ha->wq) {
3685                 flush_workqueue(ha->wq);
3686                 destroy_workqueue(ha->wq);
3687                 ha->wq = NULL;
3688         }
3689
3690
3691         qla2x00_mem_free(ha);
3692
3693         qla82xx_md_free(vha);
3694
3695         qla2x00_free_queues(ha);
3696 }
3697
3698 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3699 {
3700         fc_port_t *fcport, *tfcport;
3701
3702         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3703                 list_del(&fcport->list);
3704                 qla2x00_clear_loop_id(fcport);
3705                 kfree(fcport);
3706         }
3707 }
3708
3709 static inline void
3710 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3711     int defer)
3712 {
3713         struct fc_rport *rport;
3714         scsi_qla_host_t *base_vha;
3715         unsigned long flags;
3716
3717         if (!fcport->rport)
3718                 return;
3719
3720         rport = fcport->rport;
3721         if (defer) {
3722                 base_vha = pci_get_drvdata(vha->hw->pdev);
3723                 spin_lock_irqsave(vha->host->host_lock, flags);
3724                 fcport->drport = rport;
3725                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3726                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3727                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3728                 qla2xxx_wake_dpc(base_vha);
3729         } else {
3730                 int now;
3731                 if (rport) {
3732                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3733                             "%s %8phN. rport %p roles %x\n",
3734                             __func__, fcport->port_name, rport,
3735                             rport->roles);
3736                         fc_remote_port_delete(rport);
3737                 }
3738                 qlt_do_generation_tick(vha, &now);
3739         }
3740 }
3741
3742 /*
3743  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3744  *
3745  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3746  *
3747  * Return: None.
3748  *
3749  * Context:
3750  */
3751 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3752     int do_login, int defer)
3753 {
3754         if (IS_QLAFX00(vha->hw)) {
3755                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3756                 qla2x00_schedule_rport_del(vha, fcport, defer);
3757                 return;
3758         }
3759
3760         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3761             vha->vp_idx == fcport->vha->vp_idx) {
3762                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3763                 qla2x00_schedule_rport_del(vha, fcport, defer);
3764         }
3765         /*
3766          * We may need to retry the login, so don't change the state of the
3767          * port but do the retries.
3768          */
3769         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3770                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3771
3772         if (!do_login)
3773                 return;
3774
3775         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3776
3777         if (fcport->login_retry == 0) {
3778                 fcport->login_retry = vha->hw->login_retry_count;
3779
3780                 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3781                     "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3782                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3783         }
3784 }
3785
3786 /*
3787  * qla2x00_mark_all_devices_lost
3788  *      Updates fcport state when device goes offline.
3789  *
3790  * Input:
3791  *      ha = adapter block pointer.
3792  *      fcport = port structure pointer.
3793  *
3794  * Return:
3795  *      None.
3796  *
3797  * Context:
3798  */
3799 void
3800 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3801 {
3802         fc_port_t *fcport;
3803
3804         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3805             "Mark all dev lost\n");
3806
3807         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3808                 fcport->scan_state = 0;
3809                 qlt_schedule_sess_for_deletion_lock(fcport);
3810
3811                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3812                         continue;
3813
3814                 /*
3815                  * No point in marking the device as lost, if the device is
3816                  * already DEAD.
3817                  */
3818                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3819                         continue;
3820                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3821                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3822                         if (defer)
3823                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3824                         else if (vha->vp_idx == fcport->vha->vp_idx)
3825                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3826                 }
3827         }
3828 }
3829
3830 /*
3831 * qla2x00_mem_alloc
3832 *      Allocates adapter memory.
3833 *
3834 * Returns:
3835 *      0  = success.
3836 *      !0  = failure.
3837 */
3838 static int
3839 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3840         struct req_que **req, struct rsp_que **rsp)
3841 {
3842         char    name[16];
3843
3844         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3845                 &ha->init_cb_dma, GFP_KERNEL);
3846         if (!ha->init_cb)
3847                 goto fail;
3848
3849         if (qlt_mem_alloc(ha) < 0)
3850                 goto fail_free_init_cb;
3851
3852         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3853                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3854         if (!ha->gid_list)
3855                 goto fail_free_tgt_mem;
3856
3857         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3858         if (!ha->srb_mempool)
3859                 goto fail_free_gid_list;
3860
3861         if (IS_P3P_TYPE(ha)) {
3862                 /* Allocate cache for CT6 Ctx. */
3863                 if (!ctx_cachep) {
3864                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3865                                 sizeof(struct ct6_dsd), 0,
3866                                 SLAB_HWCACHE_ALIGN, NULL);
3867                         if (!ctx_cachep)
3868                                 goto fail_free_srb_mempool;
3869                 }
3870                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3871                         ctx_cachep);
3872                 if (!ha->ctx_mempool)
3873                         goto fail_free_srb_mempool;
3874                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3875                     "ctx_cachep=%p ctx_mempool=%p.\n",
3876                     ctx_cachep, ha->ctx_mempool);
3877         }
3878
3879         /* Get memory for cached NVRAM */
3880         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3881         if (!ha->nvram)
3882                 goto fail_free_ctx_mempool;
3883
3884         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3885                 ha->pdev->device);
3886         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3887                 DMA_POOL_SIZE, 8, 0);
3888         if (!ha->s_dma_pool)
3889                 goto fail_free_nvram;
3890
3891         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3892             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3893             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3894
3895         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3896                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3897                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3898                 if (!ha->dl_dma_pool) {
3899                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3900                             "Failed to allocate memory for dl_dma_pool.\n");
3901                         goto fail_s_dma_pool;
3902                 }
3903
3904                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3905                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3906                 if (!ha->fcp_cmnd_dma_pool) {
3907                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3908                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3909                         goto fail_dl_dma_pool;
3910                 }
3911                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3912                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3913                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3914         }
3915
3916         /* Allocate memory for SNS commands */
3917         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3918         /* Get consistent memory allocated for SNS commands */
3919                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3920                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3921                 if (!ha->sns_cmd)
3922                         goto fail_dma_pool;
3923                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3924                     "sns_cmd: %p.\n", ha->sns_cmd);
3925         } else {
3926         /* Get consistent memory allocated for MS IOCB */
3927                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3928                         &ha->ms_iocb_dma);
3929                 if (!ha->ms_iocb)
3930                         goto fail_dma_pool;
3931         /* Get consistent memory allocated for CT SNS commands */
3932                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3933                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3934                 if (!ha->ct_sns)
3935                         goto fail_free_ms_iocb;
3936                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3937                     "ms_iocb=%p ct_sns=%p.\n",
3938                     ha->ms_iocb, ha->ct_sns);
3939         }
3940
3941         /* Allocate memory for request ring */
3942         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3943         if (!*req) {
3944                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3945                     "Failed to allocate memory for req.\n");
3946                 goto fail_req;
3947         }
3948         (*req)->length = req_len;
3949         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3950                 ((*req)->length + 1) * sizeof(request_t),
3951                 &(*req)->dma, GFP_KERNEL);
3952         if (!(*req)->ring) {
3953                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3954                     "Failed to allocate memory for req_ring.\n");
3955                 goto fail_req_ring;
3956         }
3957         /* Allocate memory for response ring */
3958         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3959         if (!*rsp) {
3960                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3961                     "Failed to allocate memory for rsp.\n");
3962                 goto fail_rsp;
3963         }
3964         (*rsp)->hw = ha;
3965         (*rsp)->length = rsp_len;
3966         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3967                 ((*rsp)->length + 1) * sizeof(response_t),
3968                 &(*rsp)->dma, GFP_KERNEL);
3969         if (!(*rsp)->ring) {
3970                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3971                     "Failed to allocate memory for rsp_ring.\n");
3972                 goto fail_rsp_ring;
3973         }
3974         (*req)->rsp = *rsp;
3975         (*rsp)->req = *req;
3976         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3977             "req=%p req->length=%d req->ring=%p rsp=%p "
3978             "rsp->length=%d rsp->ring=%p.\n",
3979             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3980             (*rsp)->ring);
3981         /* Allocate memory for NVRAM data for vports */
3982         if (ha->nvram_npiv_size) {
3983                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3984                     ha->nvram_npiv_size, GFP_KERNEL);
3985                 if (!ha->npiv_info) {
3986                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3987                             "Failed to allocate memory for npiv_info.\n");
3988                         goto fail_npiv_info;
3989                 }
3990         } else
3991                 ha->npiv_info = NULL;
3992
3993         /* Get consistent memory allocated for EX-INIT-CB. */
3994         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3995                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3996                     &ha->ex_init_cb_dma);
3997                 if (!ha->ex_init_cb)
3998                         goto fail_ex_init_cb;
3999                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4000                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4001         }
4002
4003         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4004
4005         /* Get consistent memory allocated for Async Port-Database. */
4006         if (!IS_FWI2_CAPABLE(ha)) {
4007                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4008                         &ha->async_pd_dma);
4009                 if (!ha->async_pd)
4010                         goto fail_async_pd;
4011                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4012                     "async_pd=%p.\n", ha->async_pd);
4013         }
4014
4015         INIT_LIST_HEAD(&ha->vp_list);
4016
4017         /* Allocate memory for our loop_id bitmap */
4018         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
4019             GFP_KERNEL);
4020         if (!ha->loop_id_map)
4021                 goto fail_loop_id_map;
4022         else {
4023                 qla2x00_set_reserved_loop_ids(ha);
4024                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4025                     "loop_id_map=%p.\n", ha->loop_id_map);
4026         }
4027
4028         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4029             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4030         if (!ha->sfp_data) {
4031                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4032                     "Unable to allocate memory for SFP read-data.\n");
4033                 goto fail_sfp_data;
4034         }
4035
4036         return 0;
4037
4038 fail_sfp_data:
4039         kfree(ha->loop_id_map);
4040 fail_loop_id_map:
4041         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4042 fail_async_pd:
4043         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4044 fail_ex_init_cb:
4045         kfree(ha->npiv_info);
4046 fail_npiv_info:
4047         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4048                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4049         (*rsp)->ring = NULL;
4050         (*rsp)->dma = 0;
4051 fail_rsp_ring:
4052         kfree(*rsp);
4053         *rsp = NULL;
4054 fail_rsp:
4055         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4056                 sizeof(request_t), (*req)->ring, (*req)->dma);
4057         (*req)->ring = NULL;
4058         (*req)->dma = 0;
4059 fail_req_ring:
4060         kfree(*req);
4061         *req = NULL;
4062 fail_req:
4063         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4064                 ha->ct_sns, ha->ct_sns_dma);
4065         ha->ct_sns = NULL;
4066         ha->ct_sns_dma = 0;
4067 fail_free_ms_iocb:
4068         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4069         ha->ms_iocb = NULL;
4070         ha->ms_iocb_dma = 0;
4071
4072         if (ha->sns_cmd)
4073                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4074                     ha->sns_cmd, ha->sns_cmd_dma);
4075 fail_dma_pool:
4076         if (IS_QLA82XX(ha) || ql2xenabledif) {
4077                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4078                 ha->fcp_cmnd_dma_pool = NULL;
4079         }
4080 fail_dl_dma_pool:
4081         if (IS_QLA82XX(ha) || ql2xenabledif) {
4082                 dma_pool_destroy(ha->dl_dma_pool);
4083                 ha->dl_dma_pool = NULL;
4084         }
4085 fail_s_dma_pool:
4086         dma_pool_destroy(ha->s_dma_pool);
4087         ha->s_dma_pool = NULL;
4088 fail_free_nvram:
4089         kfree(ha->nvram);
4090         ha->nvram = NULL;
4091 fail_free_ctx_mempool:
4092         if (ha->ctx_mempool)
4093                 mempool_destroy(ha->ctx_mempool);
4094         ha->ctx_mempool = NULL;
4095 fail_free_srb_mempool:
4096         if (ha->srb_mempool)
4097                 mempool_destroy(ha->srb_mempool);
4098         ha->srb_mempool = NULL;
4099 fail_free_gid_list:
4100         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4101         ha->gid_list,
4102         ha->gid_list_dma);
4103         ha->gid_list = NULL;
4104         ha->gid_list_dma = 0;
4105 fail_free_tgt_mem:
4106         qlt_mem_free(ha);
4107 fail_free_init_cb:
4108         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4109         ha->init_cb_dma);
4110         ha->init_cb = NULL;
4111         ha->init_cb_dma = 0;
4112 fail:
4113         ql_log(ql_log_fatal, NULL, 0x0030,
4114             "Memory allocation failure.\n");
4115         return -ENOMEM;
4116 }
4117
4118 int
4119 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4120 {
4121         int rval;
4122         uint16_t        size, max_cnt, temp;
4123         struct qla_hw_data *ha = vha->hw;
4124
4125         /* Return if we don't need to alloacate any extended logins */
4126         if (!ql2xexlogins)
4127                 return QLA_SUCCESS;
4128
4129         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4130                 return QLA_SUCCESS;
4131
4132         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4133         max_cnt = 0;
4134         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4135         if (rval != QLA_SUCCESS) {
4136                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4137                     "Failed to get exlogin status.\n");
4138                 return rval;
4139         }
4140
4141         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4142         temp *= size;
4143
4144         if (temp != ha->exlogin_size) {
4145                 qla2x00_free_exlogin_buffer(ha);
4146                 ha->exlogin_size = temp;
4147
4148                 ql_log(ql_log_info, vha, 0xd024,
4149                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4150                     max_cnt, size, temp);
4151
4152                 ql_log(ql_log_info, vha, 0xd025,
4153                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4154
4155                 /* Get consistent memory for extended logins */
4156                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4157                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4158                 if (!ha->exlogin_buf) {
4159                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4160                     "Failed to allocate memory for exlogin_buf_dma.\n");
4161                         return -ENOMEM;
4162                 }
4163         }
4164
4165         /* Now configure the dma buffer */
4166         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4167         if (rval) {
4168                 ql_log(ql_log_fatal, vha, 0xd033,
4169                     "Setup extended login buffer  ****FAILED****.\n");
4170                 qla2x00_free_exlogin_buffer(ha);
4171         }
4172
4173         return rval;
4174 }
4175
4176 /*
4177 * qla2x00_free_exlogin_buffer
4178 *
4179 * Input:
4180 *       ha = adapter block pointer
4181 */
4182 void
4183 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4184 {
4185         if (ha->exlogin_buf) {
4186                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4187                     ha->exlogin_buf, ha->exlogin_buf_dma);
4188                 ha->exlogin_buf = NULL;
4189                 ha->exlogin_size = 0;
4190         }
4191 }
4192
4193 static void
4194 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4195 {
4196         u32 temp;
4197         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4198
4199         if (qla_ini_mode_enabled(vha)) {
4200                 if (ql2xiniexchg > max_cnt)
4201                         ql2xiniexchg = max_cnt;
4202
4203                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4204                         *ret_cnt = ql2xiniexchg;
4205         } else if (qla_tgt_mode_enabled(vha)) {
4206                 if (ql2xexchoffld > max_cnt)
4207                         ql2xexchoffld = max_cnt;
4208
4209                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4210                         *ret_cnt = ql2xexchoffld;
4211         } else if (qla_dual_mode_enabled(vha)) {
4212                 temp = ql2xiniexchg + ql2xexchoffld;
4213                 if (temp > max_cnt) {
4214                         ql2xiniexchg -= (temp - max_cnt)/2;
4215                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4216                         temp = max_cnt;
4217                 }
4218
4219                 if (temp > FW_DEF_EXCHANGES_CNT)
4220                         *ret_cnt = temp;
4221         }
4222 }
4223
4224 int
4225 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4226 {
4227         int rval;
4228         u16 size, max_cnt;
4229         u32 temp;
4230         struct qla_hw_data *ha = vha->hw;
4231
4232         if (!ha->flags.exchoffld_enabled)
4233                 return QLA_SUCCESS;
4234
4235         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4236                 return QLA_SUCCESS;
4237
4238         max_cnt = 0;
4239         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4240         if (rval != QLA_SUCCESS) {
4241                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4242                     "Failed to get exlogin status.\n");
4243                 return rval;
4244         }
4245
4246         qla2x00_number_of_exch(vha, &temp, max_cnt);
4247         temp *= size;
4248
4249         if (temp != ha->exchoffld_size) {
4250                 qla2x00_free_exchoffld_buffer(ha);
4251                 ha->exchoffld_size = temp;
4252
4253                 ql_log(ql_log_info, vha, 0xd016,
4254                     "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4255                     max_cnt, size, temp);
4256
4257                 ql_log(ql_log_info, vha, 0xd017,
4258                     "Exchange Buffers requested size = 0x%x\n",
4259                     ha->exchoffld_size);
4260
4261                 /* Get consistent memory for extended logins */
4262                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4263                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4264                 if (!ha->exchoffld_buf) {
4265                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4266                         "Failed to allocate memory for exchoffld_buf_dma.\n");
4267                         return -ENOMEM;
4268                 }
4269         }
4270
4271         /* Now configure the dma buffer */
4272         rval = qla_set_exchoffld_mem_cfg(vha);
4273         if (rval) {
4274                 ql_log(ql_log_fatal, vha, 0xd02e,
4275                     "Setup exchange offload buffer ****FAILED****.\n");
4276                 qla2x00_free_exchoffld_buffer(ha);
4277         } else {
4278                 /* re-adjust number of target exchange */
4279                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4280
4281                 if (qla_ini_mode_enabled(vha))
4282                         icb->exchange_count = 0;
4283                 else
4284                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4285         }
4286
4287         return rval;
4288 }
4289
4290 /*
4291 * qla2x00_free_exchoffld_buffer
4292 *
4293 * Input:
4294 *       ha = adapter block pointer
4295 */
4296 void
4297 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4298 {
4299         if (ha->exchoffld_buf) {
4300                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4301                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4302                 ha->exchoffld_buf = NULL;
4303                 ha->exchoffld_size = 0;
4304         }
4305 }
4306
4307 /*
4308 * qla2x00_free_fw_dump
4309 *       Frees fw dump stuff.
4310 *
4311 * Input:
4312 *       ha = adapter block pointer
4313 */
4314 static void
4315 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4316 {
4317         if (ha->fce)
4318                 dma_free_coherent(&ha->pdev->dev,
4319                     FCE_SIZE, ha->fce, ha->fce_dma);
4320
4321         if (ha->eft)
4322                 dma_free_coherent(&ha->pdev->dev,
4323                     EFT_SIZE, ha->eft, ha->eft_dma);
4324
4325         if (ha->fw_dump)
4326                 vfree(ha->fw_dump);
4327         if (ha->fw_dump_template)
4328                 vfree(ha->fw_dump_template);
4329
4330         ha->fce = NULL;
4331         ha->fce_dma = 0;
4332         ha->eft = NULL;
4333         ha->eft_dma = 0;
4334         ha->fw_dumped = 0;
4335         ha->fw_dump_cap_flags = 0;
4336         ha->fw_dump_reading = 0;
4337         ha->fw_dump = NULL;
4338         ha->fw_dump_len = 0;
4339         ha->fw_dump_template = NULL;
4340         ha->fw_dump_template_len = 0;
4341 }
4342
4343 /*
4344 * qla2x00_mem_free
4345 *      Frees all adapter allocated memory.
4346 *
4347 * Input:
4348 *      ha = adapter block pointer.
4349 */
4350 static void
4351 qla2x00_mem_free(struct qla_hw_data *ha)
4352 {
4353         qla2x00_free_fw_dump(ha);
4354
4355         if (ha->mctp_dump)
4356                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4357                     ha->mctp_dump_dma);
4358
4359         if (ha->srb_mempool)
4360                 mempool_destroy(ha->srb_mempool);
4361
4362         if (ha->dcbx_tlv)
4363                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4364                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4365
4366         if (ha->xgmac_data)
4367                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4368                     ha->xgmac_data, ha->xgmac_data_dma);
4369
4370         if (ha->sns_cmd)
4371                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4372                 ha->sns_cmd, ha->sns_cmd_dma);
4373
4374         if (ha->ct_sns)
4375                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4376                 ha->ct_sns, ha->ct_sns_dma);
4377
4378         if (ha->sfp_data)
4379                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4380                     ha->sfp_data_dma);
4381
4382         if (ha->ms_iocb)
4383                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4384
4385         if (ha->ex_init_cb)
4386                 dma_pool_free(ha->s_dma_pool,
4387                         ha->ex_init_cb, ha->ex_init_cb_dma);
4388
4389         if (ha->async_pd)
4390                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4391
4392         if (ha->s_dma_pool)
4393                 dma_pool_destroy(ha->s_dma_pool);
4394
4395         if (ha->gid_list)
4396                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4397                 ha->gid_list, ha->gid_list_dma);
4398
4399         if (IS_QLA82XX(ha)) {
4400                 if (!list_empty(&ha->gbl_dsd_list)) {
4401                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4402
4403                         /* clean up allocated prev pool */
4404                         list_for_each_entry_safe(dsd_ptr,
4405                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4406                                 dma_pool_free(ha->dl_dma_pool,
4407                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4408                                 list_del(&dsd_ptr->list);
4409                                 kfree(dsd_ptr);
4410                         }
4411                 }
4412         }
4413
4414         if (ha->dl_dma_pool)
4415                 dma_pool_destroy(ha->dl_dma_pool);
4416
4417         if (ha->fcp_cmnd_dma_pool)
4418                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4419
4420         if (ha->ctx_mempool)
4421                 mempool_destroy(ha->ctx_mempool);
4422
4423         qlt_mem_free(ha);
4424
4425         if (ha->init_cb)
4426                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4427                         ha->init_cb, ha->init_cb_dma);
4428
4429         vfree(ha->optrom_buffer);
4430         kfree(ha->nvram);
4431         kfree(ha->npiv_info);
4432         kfree(ha->swl);
4433         kfree(ha->loop_id_map);
4434
4435         ha->srb_mempool = NULL;
4436         ha->ctx_mempool = NULL;
4437         ha->sns_cmd = NULL;
4438         ha->sns_cmd_dma = 0;
4439         ha->ct_sns = NULL;
4440         ha->ct_sns_dma = 0;
4441         ha->ms_iocb = NULL;
4442         ha->ms_iocb_dma = 0;
4443         ha->init_cb = NULL;
4444         ha->init_cb_dma = 0;
4445         ha->ex_init_cb = NULL;
4446         ha->ex_init_cb_dma = 0;
4447         ha->async_pd = NULL;
4448         ha->async_pd_dma = 0;
4449         ha->loop_id_map = NULL;
4450         ha->npiv_info = NULL;
4451         ha->optrom_buffer = NULL;
4452         ha->swl = NULL;
4453         ha->nvram = NULL;
4454         ha->mctp_dump = NULL;
4455         ha->dcbx_tlv = NULL;
4456         ha->xgmac_data = NULL;
4457         ha->sfp_data = NULL;
4458
4459         ha->s_dma_pool = NULL;
4460         ha->dl_dma_pool = NULL;
4461         ha->fcp_cmnd_dma_pool = NULL;
4462
4463         ha->gid_list = NULL;
4464         ha->gid_list_dma = 0;
4465
4466         ha->tgt.atio_ring = NULL;
4467         ha->tgt.atio_dma = 0;
4468         ha->tgt.tgt_vp_map = NULL;
4469 }
4470
4471 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4472                                                 struct qla_hw_data *ha)
4473 {
4474         struct Scsi_Host *host;
4475         struct scsi_qla_host *vha = NULL;
4476
4477         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4478         if (!host) {
4479                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4480                     "Failed to allocate host from the scsi layer, aborting.\n");
4481                 return NULL;
4482         }
4483
4484         /* Clear our data area */
4485         vha = shost_priv(host);
4486         memset(vha, 0, sizeof(scsi_qla_host_t));
4487
4488         vha->host = host;
4489         vha->host_no = host->host_no;
4490         vha->hw = ha;
4491
4492         INIT_LIST_HEAD(&vha->vp_fcports);
4493         INIT_LIST_HEAD(&vha->work_list);
4494         INIT_LIST_HEAD(&vha->list);
4495         INIT_LIST_HEAD(&vha->qla_cmd_list);
4496         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4497         INIT_LIST_HEAD(&vha->logo_list);
4498         INIT_LIST_HEAD(&vha->plogi_ack_list);
4499         INIT_LIST_HEAD(&vha->qp_list);
4500         INIT_LIST_HEAD(&vha->gnl.fcports);
4501         INIT_LIST_HEAD(&vha->nvme_rport_list);
4502         INIT_LIST_HEAD(&vha->gpnid_list);
4503
4504         spin_lock_init(&vha->work_lock);
4505         spin_lock_init(&vha->cmd_list_lock);
4506         init_waitqueue_head(&vha->fcport_waitQ);
4507         init_waitqueue_head(&vha->vref_waitq);
4508
4509         vha->gnl.size = sizeof(struct get_name_list_extended) *
4510                         (ha->max_loop_id + 1);
4511         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4512             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4513         if (!vha->gnl.l) {
4514                 ql_log(ql_log_fatal, vha, 0xd04a,
4515                     "Alloc failed for name list.\n");
4516                 scsi_remove_host(vha->host);
4517                 return NULL;
4518         }
4519
4520         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4521         ql_dbg(ql_dbg_init, vha, 0x0041,
4522             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4523             vha->host, vha->hw, vha,
4524             dev_name(&(ha->pdev->dev)));
4525
4526         return vha;
4527 }
4528
4529 struct qla_work_evt *
4530 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4531 {
4532         struct qla_work_evt *e;
4533         uint8_t bail;
4534
4535         QLA_VHA_MARK_BUSY(vha, bail);
4536         if (bail)
4537                 return NULL;
4538
4539         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4540         if (!e) {
4541                 QLA_VHA_MARK_NOT_BUSY(vha);
4542                 return NULL;
4543         }
4544
4545         INIT_LIST_HEAD(&e->list);
4546         e->type = type;
4547         e->flags = QLA_EVT_FLAG_FREE;
4548         return e;
4549 }
4550
4551 int
4552 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4553 {
4554         unsigned long flags;
4555
4556         spin_lock_irqsave(&vha->work_lock, flags);
4557         list_add_tail(&e->list, &vha->work_list);
4558         spin_unlock_irqrestore(&vha->work_lock, flags);
4559
4560         if (QLA_EARLY_LINKUP(vha->hw))
4561                 schedule_work(&vha->iocb_work);
4562         else
4563                 qla2xxx_wake_dpc(vha);
4564
4565         return QLA_SUCCESS;
4566 }
4567
4568 int
4569 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4570     u32 data)
4571 {
4572         struct qla_work_evt *e;
4573
4574         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4575         if (!e)
4576                 return QLA_FUNCTION_FAILED;
4577
4578         e->u.aen.code = code;
4579         e->u.aen.data = data;
4580         return qla2x00_post_work(vha, e);
4581 }
4582
4583 int
4584 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4585 {
4586         struct qla_work_evt *e;
4587
4588         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4589         if (!e)
4590                 return QLA_FUNCTION_FAILED;
4591
4592         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4593         return qla2x00_post_work(vha, e);
4594 }
4595
4596 #define qla2x00_post_async_work(name, type)     \
4597 int qla2x00_post_async_##name##_work(           \
4598     struct scsi_qla_host *vha,                  \
4599     fc_port_t *fcport, uint16_t *data)          \
4600 {                                               \
4601         struct qla_work_evt *e;                 \
4602                                                 \
4603         e = qla2x00_alloc_work(vha, type);      \
4604         if (!e)                                 \
4605                 return QLA_FUNCTION_FAILED;     \
4606                                                 \
4607         e->u.logio.fcport = fcport;             \
4608         if (data) {                             \
4609                 e->u.logio.data[0] = data[0];   \
4610                 e->u.logio.data[1] = data[1];   \
4611         }                                       \
4612         return qla2x00_post_work(vha, e);       \
4613 }
4614
4615 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4616 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4617 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4618 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4619 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4620
4621 int
4622 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4623 {
4624         struct qla_work_evt *e;
4625
4626         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4627         if (!e)
4628                 return QLA_FUNCTION_FAILED;
4629
4630         e->u.uevent.code = code;
4631         return qla2x00_post_work(vha, e);
4632 }
4633
4634 static void
4635 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4636 {
4637         char event_string[40];
4638         char *envp[] = { event_string, NULL };
4639
4640         switch (code) {
4641         case QLA_UEVENT_CODE_FW_DUMP:
4642                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4643                     vha->host_no);
4644                 break;
4645         default:
4646                 /* do nothing */
4647                 break;
4648         }
4649         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4650 }
4651
4652 int
4653 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4654                         uint32_t *data, int cnt)
4655 {
4656         struct qla_work_evt *e;
4657
4658         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4659         if (!e)
4660                 return QLA_FUNCTION_FAILED;
4661
4662         e->u.aenfx.evtcode = evtcode;
4663         e->u.aenfx.count = cnt;
4664         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4665         return qla2x00_post_work(vha, e);
4666 }
4667
4668 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4669 {
4670         struct qla_work_evt *e;
4671
4672         e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4673         if (!e)
4674                 return QLA_FUNCTION_FAILED;
4675
4676         e->u.fcport.fcport = fcport;
4677         return qla2x00_post_work(vha, e);
4678 }
4679
4680 static
4681 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4682 {
4683         unsigned long flags;
4684         fc_port_t *fcport =  NULL, *tfcp;
4685         struct qlt_plogi_ack_t *pla =
4686             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4687         uint8_t free_fcport = 0;
4688
4689         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4690         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4691         if (fcport) {
4692                 fcport->d_id = e->u.new_sess.id;
4693                 if (pla) {
4694                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4695                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4696                         /* we took an extra ref_count to prevent PLOGI ACK when
4697                          * fcport/sess has not been created.
4698                          */
4699                         pla->ref_count--;
4700                 }
4701         } else {
4702                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4703                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4704                 if (fcport) {
4705                         fcport->d_id = e->u.new_sess.id;
4706                         fcport->scan_state = QLA_FCPORT_FOUND;
4707                         fcport->flags |= FCF_FABRIC_DEVICE;
4708                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4709
4710                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4711                             WWN_SIZE);
4712                 } else {
4713                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4714                                    "%s %8phC mem alloc fail.\n",
4715                                    __func__, e->u.new_sess.port_name);
4716
4717                         if (pla)
4718                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4719                         return;
4720                 }
4721
4722                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4723                 /* search again to make sure one else got ahead */
4724                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4725                     e->u.new_sess.port_name, 1);
4726                 if (tfcp) {
4727                         /* should rarily happen */
4728                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4729                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4730                             __func__, tfcp->port_name, tfcp->disc_state,
4731                             tfcp->fw_login_state);
4732
4733                         free_fcport = 1;
4734                 } else {
4735                         list_add_tail(&fcport->list, &vha->vp_fcports);
4736
4737                 }
4738                 if (pla) {
4739                         qlt_plogi_ack_link(vha, pla, fcport,
4740                             QLT_PLOGI_LINK_SAME_WWN);
4741                         pla->ref_count--;
4742                 }
4743         }
4744         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4745
4746         if (fcport) {
4747                 if (pla)
4748                         qlt_plogi_ack_unref(vha, pla);
4749                 else
4750                         qla24xx_async_gnl(vha, fcport);
4751         }
4752
4753         if (free_fcport) {
4754                 qla2x00_free_fcport(fcport);
4755                 if (pla)
4756                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
4757         }
4758 }
4759
4760 void
4761 qla2x00_do_work(struct scsi_qla_host *vha)
4762 {
4763         struct qla_work_evt *e, *tmp;
4764         unsigned long flags;
4765         LIST_HEAD(work);
4766
4767         spin_lock_irqsave(&vha->work_lock, flags);
4768         list_splice_init(&vha->work_list, &work);
4769         spin_unlock_irqrestore(&vha->work_lock, flags);
4770
4771         list_for_each_entry_safe(e, tmp, &work, list) {
4772                 list_del_init(&e->list);
4773
4774                 switch (e->type) {
4775                 case QLA_EVT_AEN:
4776                         fc_host_post_event(vha->host, fc_get_event_number(),
4777                             e->u.aen.code, e->u.aen.data);
4778                         break;
4779                 case QLA_EVT_IDC_ACK:
4780                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4781                         break;
4782                 case QLA_EVT_ASYNC_LOGIN:
4783                         qla2x00_async_login(vha, e->u.logio.fcport,
4784                             e->u.logio.data);
4785                         break;
4786                 case QLA_EVT_ASYNC_LOGOUT:
4787                         qla2x00_async_logout(vha, e->u.logio.fcport);
4788                         break;
4789                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4790                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4791                             e->u.logio.data);
4792                         break;
4793                 case QLA_EVT_ASYNC_ADISC:
4794                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4795                             e->u.logio.data);
4796                         break;
4797                 case QLA_EVT_ASYNC_ADISC_DONE:
4798                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4799                             e->u.logio.data);
4800                         break;
4801                 case QLA_EVT_UEVENT:
4802                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4803                         break;
4804                 case QLA_EVT_AENFX:
4805                         qlafx00_process_aen(vha, e);
4806                         break;
4807                 case QLA_EVT_GIDPN:
4808                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4809                         break;
4810                 case QLA_EVT_GPNID:
4811                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4812                         break;
4813                 case QLA_EVT_GPNID_DONE:
4814                         qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4815                         break;
4816                 case QLA_EVT_NEW_SESS:
4817                         qla24xx_create_new_sess(vha, e);
4818                         break;
4819                 case QLA_EVT_GPDB:
4820                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4821                             e->u.fcport.opt);
4822                         break;
4823                 case QLA_EVT_PRLI:
4824                         qla24xx_async_prli(vha, e->u.fcport.fcport);
4825                         break;
4826                 case QLA_EVT_GPSC:
4827                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4828                         break;
4829                 case QLA_EVT_UPD_FCPORT:
4830                         qla2x00_update_fcport(vha, e->u.fcport.fcport);
4831                         break;
4832                 case QLA_EVT_GNL:
4833                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
4834                         break;
4835                 case QLA_EVT_NACK:
4836                         qla24xx_do_nack_work(vha, e);
4837                         break;
4838                 }
4839                 if (e->flags & QLA_EVT_FLAG_FREE)
4840                         kfree(e);
4841
4842                 /* For each work completed decrement vha ref count */
4843                 QLA_VHA_MARK_NOT_BUSY(vha);
4844         }
4845 }
4846
4847 /* Relogins all the fcports of a vport
4848  * Context: dpc thread
4849  */
4850 void qla2x00_relogin(struct scsi_qla_host *vha)
4851 {
4852         fc_port_t       *fcport;
4853         int status;
4854         struct event_arg ea;
4855
4856         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4857         /*
4858          * If the port is not ONLINE then try to login
4859          * to it if we haven't run out of retries.
4860          */
4861                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4862                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4863
4864                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4865                                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
4866                                     "%s %8phC DS %d LS %d\n", __func__,
4867                                     fcport->port_name, fcport->disc_state,
4868                                     fcport->fw_login_state);
4869                                 memset(&ea, 0, sizeof(ea));
4870                                 ea.event = FCME_RELOGIN;
4871                                 ea.fcport = fcport;
4872                                 qla2x00_fcport_event_handler(vha, &ea);
4873                         } else {
4874                                 fcport->login_retry--;
4875                                 status = qla2x00_local_device_login(vha,
4876                                                                 fcport);
4877                                 if (status == QLA_SUCCESS) {
4878                                         fcport->old_loop_id = fcport->loop_id;
4879                                         ql_dbg(ql_dbg_disc, vha, 0x2003,
4880                                             "Port login OK: logged in ID 0x%x.\n",
4881                                             fcport->loop_id);
4882                                         qla2x00_update_fcport(vha, fcport);
4883                                 } else if (status == 1) {
4884                                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4885                                         /* retry the login again */
4886                                         ql_dbg(ql_dbg_disc, vha, 0x2007,
4887                                             "Retrying %d login again loop_id 0x%x.\n",
4888                                             fcport->login_retry,
4889                                             fcport->loop_id);
4890                                 } else {
4891                                         fcport->login_retry = 0;
4892                                 }
4893
4894                                 if (fcport->login_retry == 0 &&
4895                                     status != QLA_SUCCESS)
4896                                         qla2x00_clear_loop_id(fcport);
4897                         }
4898                 }
4899                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4900                         break;
4901         }
4902 }
4903
4904 /* Schedule work on any of the dpc-workqueues */
4905 void
4906 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4907 {
4908         struct qla_hw_data *ha = base_vha->hw;
4909
4910         switch (work_code) {
4911         case MBA_IDC_AEN: /* 0x8200 */
4912                 if (ha->dpc_lp_wq)
4913                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4914                 break;
4915
4916         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4917                 if (!ha->flags.nic_core_reset_hdlr_active) {
4918                         if (ha->dpc_hp_wq)
4919                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4920                 } else
4921                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4922                             "NIC Core reset is already active. Skip "
4923                             "scheduling it again.\n");
4924                 break;
4925         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4926                 if (ha->dpc_hp_wq)
4927                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4928                 break;
4929         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4930                 if (ha->dpc_hp_wq)
4931                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4932                 break;
4933         default:
4934                 ql_log(ql_log_warn, base_vha, 0xb05f,
4935                     "Unknown work-code=0x%x.\n", work_code);
4936         }
4937
4938         return;
4939 }
4940
4941 /* Work: Perform NIC Core Unrecoverable state handling */
4942 void
4943 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4944 {
4945         struct qla_hw_data *ha =
4946                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4947         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4948         uint32_t dev_state = 0;
4949
4950         qla83xx_idc_lock(base_vha, 0);
4951         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4952         qla83xx_reset_ownership(base_vha);
4953         if (ha->flags.nic_core_reset_owner) {
4954                 ha->flags.nic_core_reset_owner = 0;
4955                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4956                     QLA8XXX_DEV_FAILED);
4957                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4958                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4959         }
4960         qla83xx_idc_unlock(base_vha, 0);
4961 }
4962
4963 /* Work: Execute IDC state handler */
4964 void
4965 qla83xx_idc_state_handler_work(struct work_struct *work)
4966 {
4967         struct qla_hw_data *ha =
4968                 container_of(work, struct qla_hw_data, idc_state_handler);
4969         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4970         uint32_t dev_state = 0;
4971
4972         qla83xx_idc_lock(base_vha, 0);
4973         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4974         if (dev_state == QLA8XXX_DEV_FAILED ||
4975                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4976                 qla83xx_idc_state_handler(base_vha);
4977         qla83xx_idc_unlock(base_vha, 0);
4978 }
4979
4980 static int
4981 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4982 {
4983         int rval = QLA_SUCCESS;
4984         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4985         uint32_t heart_beat_counter1, heart_beat_counter2;
4986
4987         do {
4988                 if (time_after(jiffies, heart_beat_wait)) {
4989                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4990                             "Nic Core f/w is not alive.\n");
4991                         rval = QLA_FUNCTION_FAILED;
4992                         break;
4993                 }
4994
4995                 qla83xx_idc_lock(base_vha, 0);
4996                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4997                     &heart_beat_counter1);
4998                 qla83xx_idc_unlock(base_vha, 0);
4999                 msleep(100);
5000                 qla83xx_idc_lock(base_vha, 0);
5001                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5002                     &heart_beat_counter2);
5003                 qla83xx_idc_unlock(base_vha, 0);
5004         } while (heart_beat_counter1 == heart_beat_counter2);
5005
5006         return rval;
5007 }
5008
5009 /* Work: Perform NIC Core Reset handling */
5010 void
5011 qla83xx_nic_core_reset_work(struct work_struct *work)
5012 {
5013         struct qla_hw_data *ha =
5014                 container_of(work, struct qla_hw_data, nic_core_reset);
5015         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5016         uint32_t dev_state = 0;
5017
5018         if (IS_QLA2031(ha)) {
5019                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5020                         ql_log(ql_log_warn, base_vha, 0xb081,
5021                             "Failed to dump mctp\n");
5022                 return;
5023         }
5024
5025         if (!ha->flags.nic_core_reset_hdlr_active) {
5026                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5027                         qla83xx_idc_lock(base_vha, 0);
5028                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5029                             &dev_state);
5030                         qla83xx_idc_unlock(base_vha, 0);
5031                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5032                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5033                                     "Nic Core f/w is alive.\n");
5034                                 return;
5035                         }
5036                 }
5037
5038                 ha->flags.nic_core_reset_hdlr_active = 1;
5039                 if (qla83xx_nic_core_reset(base_vha)) {
5040                         /* NIC Core reset failed. */
5041                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5042                             "NIC Core reset failed.\n");
5043                 }
5044                 ha->flags.nic_core_reset_hdlr_active = 0;
5045         }
5046 }
5047
5048 /* Work: Handle 8200 IDC aens */
5049 void
5050 qla83xx_service_idc_aen(struct work_struct *work)
5051 {
5052         struct qla_hw_data *ha =
5053                 container_of(work, struct qla_hw_data, idc_aen);
5054         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5055         uint32_t dev_state, idc_control;
5056
5057         qla83xx_idc_lock(base_vha, 0);
5058         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5059         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5060         qla83xx_idc_unlock(base_vha, 0);
5061         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5062                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5063                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5064                             "Application requested NIC Core Reset.\n");
5065                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5066                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5067                     QLA_SUCCESS) {
5068                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5069                             "Other protocol driver requested NIC Core Reset.\n");
5070                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5071                 }
5072         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5073                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5074                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5075         }
5076 }
5077
5078 static void
5079 qla83xx_wait_logic(void)
5080 {
5081         int i;
5082
5083         /* Yield CPU */
5084         if (!in_interrupt()) {
5085                 /*
5086                  * Wait about 200ms before retrying again.
5087                  * This controls the number of retries for single
5088                  * lock operation.
5089                  */
5090                 msleep(100);
5091                 schedule();
5092         } else {
5093                 for (i = 0; i < 20; i++)
5094                         cpu_relax(); /* This a nop instr on i386 */
5095         }
5096 }
5097
5098 static int
5099 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5100 {
5101         int rval;
5102         uint32_t data;
5103         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5104         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5105         struct qla_hw_data *ha = base_vha->hw;
5106         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5107             "Trying force recovery of the IDC lock.\n");
5108
5109         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5110         if (rval)
5111                 return rval;
5112
5113         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5114                 return QLA_SUCCESS;
5115         } else {
5116                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5117                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5118                     data);
5119                 if (rval)
5120                         return rval;
5121
5122                 msleep(200);
5123
5124                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5125                     &data);
5126                 if (rval)
5127                         return rval;
5128
5129                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5130                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5131                                         ~(idc_lck_rcvry_stage_mask));
5132                         rval = qla83xx_wr_reg(base_vha,
5133                             QLA83XX_IDC_LOCK_RECOVERY, data);
5134                         if (rval)
5135                                 return rval;
5136
5137                         /* Forcefully perform IDC UnLock */
5138                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5139                             &data);
5140                         if (rval)
5141                                 return rval;
5142                         /* Clear lock-id by setting 0xff */
5143                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5144                             0xff);
5145                         if (rval)
5146                                 return rval;
5147                         /* Clear lock-recovery by setting 0x0 */
5148                         rval = qla83xx_wr_reg(base_vha,
5149                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5150                         if (rval)
5151                                 return rval;
5152                 } else
5153                         return QLA_SUCCESS;
5154         }
5155
5156         return rval;
5157 }
5158
5159 static int
5160 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5161 {
5162         int rval = QLA_SUCCESS;
5163         uint32_t o_drv_lockid, n_drv_lockid;
5164         unsigned long lock_recovery_timeout;
5165
5166         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5167 retry_lockid:
5168         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5169         if (rval)
5170                 goto exit;
5171
5172         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5173         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5174                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5175                         return QLA_SUCCESS;
5176                 else
5177                         return QLA_FUNCTION_FAILED;
5178         }
5179
5180         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5181         if (rval)
5182                 goto exit;
5183
5184         if (o_drv_lockid == n_drv_lockid) {
5185                 qla83xx_wait_logic();
5186                 goto retry_lockid;
5187         } else
5188                 return QLA_SUCCESS;
5189
5190 exit:
5191         return rval;
5192 }
5193
5194 void
5195 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5196 {
5197         uint16_t options = (requester_id << 15) | BIT_6;
5198         uint32_t data;
5199         uint32_t lock_owner;
5200         struct qla_hw_data *ha = base_vha->hw;
5201
5202         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5203 retry_lock:
5204         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5205             == QLA_SUCCESS) {
5206                 if (data) {
5207                         /* Setting lock-id to our function-number */
5208                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5209                             ha->portnum);
5210                 } else {
5211                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5212                             &lock_owner);
5213                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5214                             "Failed to acquire IDC lock, acquired by %d, "
5215                             "retrying...\n", lock_owner);
5216
5217                         /* Retry/Perform IDC-Lock recovery */
5218                         if (qla83xx_idc_lock_recovery(base_vha)
5219                             == QLA_SUCCESS) {
5220                                 qla83xx_wait_logic();
5221                                 goto retry_lock;
5222                         } else
5223                                 ql_log(ql_log_warn, base_vha, 0xb075,
5224                                     "IDC Lock recovery FAILED.\n");
5225                 }
5226
5227         }
5228
5229         return;
5230
5231         /* XXX: IDC-lock implementation using access-control mbx */
5232 retry_lock2:
5233         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5234                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5235                     "Failed to acquire IDC lock. retrying...\n");
5236                 /* Retry/Perform IDC-Lock recovery */
5237                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5238                         qla83xx_wait_logic();
5239                         goto retry_lock2;
5240                 } else
5241                         ql_log(ql_log_warn, base_vha, 0xb076,
5242                             "IDC Lock recovery FAILED.\n");
5243         }
5244
5245         return;
5246 }
5247
5248 void
5249 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5250 {
5251 #if 0
5252         uint16_t options = (requester_id << 15) | BIT_7;
5253 #endif
5254         uint16_t retry;
5255         uint32_t data;
5256         struct qla_hw_data *ha = base_vha->hw;
5257
5258         /* IDC-unlock implementation using driver-unlock/lock-id
5259          * remote registers
5260          */
5261         retry = 0;
5262 retry_unlock:
5263         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5264             == QLA_SUCCESS) {
5265                 if (data == ha->portnum) {
5266                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5267                         /* Clearing lock-id by setting 0xff */
5268                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5269                 } else if (retry < 10) {
5270                         /* SV: XXX: IDC unlock retrying needed here? */
5271
5272                         /* Retry for IDC-unlock */
5273                         qla83xx_wait_logic();
5274                         retry++;
5275                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5276                             "Failed to release IDC lock, retrying=%d\n", retry);
5277                         goto retry_unlock;
5278                 }
5279         } else if (retry < 10) {
5280                 /* Retry for IDC-unlock */
5281                 qla83xx_wait_logic();
5282                 retry++;
5283                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5284                     "Failed to read drv-lockid, retrying=%d\n", retry);
5285                 goto retry_unlock;
5286         }
5287
5288         return;
5289
5290 #if 0
5291         /* XXX: IDC-unlock implementation using access-control mbx */
5292         retry = 0;
5293 retry_unlock2:
5294         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5295                 if (retry < 10) {
5296                         /* Retry for IDC-unlock */
5297                         qla83xx_wait_logic();
5298                         retry++;
5299                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5300                             "Failed to release IDC lock, retrying=%d\n", retry);
5301                         goto retry_unlock2;
5302                 }
5303         }
5304
5305         return;
5306 #endif
5307 }
5308
5309 int
5310 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5311 {
5312         int rval = QLA_SUCCESS;
5313         struct qla_hw_data *ha = vha->hw;
5314         uint32_t drv_presence;
5315
5316         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5317         if (rval == QLA_SUCCESS) {
5318                 drv_presence |= (1 << ha->portnum);
5319                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5320                     drv_presence);
5321         }
5322
5323         return rval;
5324 }
5325
5326 int
5327 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5328 {
5329         int rval = QLA_SUCCESS;
5330
5331         qla83xx_idc_lock(vha, 0);
5332         rval = __qla83xx_set_drv_presence(vha);
5333         qla83xx_idc_unlock(vha, 0);
5334
5335         return rval;
5336 }
5337
5338 int
5339 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5340 {
5341         int rval = QLA_SUCCESS;
5342         struct qla_hw_data *ha = vha->hw;
5343         uint32_t drv_presence;
5344
5345         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5346         if (rval == QLA_SUCCESS) {
5347                 drv_presence &= ~(1 << ha->portnum);
5348                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5349                     drv_presence);
5350         }
5351
5352         return rval;
5353 }
5354
5355 int
5356 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5357 {
5358         int rval = QLA_SUCCESS;
5359
5360         qla83xx_idc_lock(vha, 0);
5361         rval = __qla83xx_clear_drv_presence(vha);
5362         qla83xx_idc_unlock(vha, 0);
5363
5364         return rval;
5365 }
5366
5367 static void
5368 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5369 {
5370         struct qla_hw_data *ha = vha->hw;
5371         uint32_t drv_ack, drv_presence;
5372         unsigned long ack_timeout;
5373
5374         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5375         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5376         while (1) {
5377                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5378                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5379                 if ((drv_ack & drv_presence) == drv_presence)
5380                         break;
5381
5382                 if (time_after_eq(jiffies, ack_timeout)) {
5383                         ql_log(ql_log_warn, vha, 0xb067,
5384                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5385                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5386                         /*
5387                          * The function(s) which did not ack in time are forced
5388                          * to withdraw any further participation in the IDC
5389                          * reset.
5390                          */
5391                         if (drv_ack != drv_presence)
5392                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5393                                     drv_ack);
5394                         break;
5395                 }
5396
5397                 qla83xx_idc_unlock(vha, 0);
5398                 msleep(1000);
5399                 qla83xx_idc_lock(vha, 0);
5400         }
5401
5402         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5403         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5404 }
5405
5406 static int
5407 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5408 {
5409         int rval = QLA_SUCCESS;
5410         uint32_t idc_control;
5411
5412         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5413         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5414
5415         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5416         __qla83xx_get_idc_control(vha, &idc_control);
5417         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5418         __qla83xx_set_idc_control(vha, 0);
5419
5420         qla83xx_idc_unlock(vha, 0);
5421         rval = qla83xx_restart_nic_firmware(vha);
5422         qla83xx_idc_lock(vha, 0);
5423
5424         if (rval != QLA_SUCCESS) {
5425                 ql_log(ql_log_fatal, vha, 0xb06a,
5426                     "Failed to restart NIC f/w.\n");
5427                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5428                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5429         } else {
5430                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5431                     "Success in restarting nic f/w.\n");
5432                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5433                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5434         }
5435
5436         return rval;
5437 }
5438
5439 /* Assumes idc_lock always held on entry */
5440 int
5441 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5442 {
5443         struct qla_hw_data *ha = base_vha->hw;
5444         int rval = QLA_SUCCESS;
5445         unsigned long dev_init_timeout;
5446         uint32_t dev_state;
5447
5448         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5449         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5450
5451         while (1) {
5452
5453                 if (time_after_eq(jiffies, dev_init_timeout)) {
5454                         ql_log(ql_log_warn, base_vha, 0xb06e,
5455                             "Initialization TIMEOUT!\n");
5456                         /* Init timeout. Disable further NIC Core
5457                          * communication.
5458                          */
5459                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5460                                 QLA8XXX_DEV_FAILED);
5461                         ql_log(ql_log_info, base_vha, 0xb06f,
5462                             "HW State: FAILED.\n");
5463                 }
5464
5465                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5466                 switch (dev_state) {
5467                 case QLA8XXX_DEV_READY:
5468                         if (ha->flags.nic_core_reset_owner)
5469                                 qla83xx_idc_audit(base_vha,
5470                                     IDC_AUDIT_COMPLETION);
5471                         ha->flags.nic_core_reset_owner = 0;
5472                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5473                             "Reset_owner reset by 0x%x.\n",
5474                             ha->portnum);
5475                         goto exit;
5476                 case QLA8XXX_DEV_COLD:
5477                         if (ha->flags.nic_core_reset_owner)
5478                                 rval = qla83xx_device_bootstrap(base_vha);
5479                         else {
5480                         /* Wait for AEN to change device-state */
5481                                 qla83xx_idc_unlock(base_vha, 0);
5482                                 msleep(1000);
5483                                 qla83xx_idc_lock(base_vha, 0);
5484                         }
5485                         break;
5486                 case QLA8XXX_DEV_INITIALIZING:
5487                         /* Wait for AEN to change device-state */
5488                         qla83xx_idc_unlock(base_vha, 0);
5489                         msleep(1000);
5490                         qla83xx_idc_lock(base_vha, 0);
5491                         break;
5492                 case QLA8XXX_DEV_NEED_RESET:
5493                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5494                                 qla83xx_need_reset_handler(base_vha);
5495                         else {
5496                                 /* Wait for AEN to change device-state */
5497                                 qla83xx_idc_unlock(base_vha, 0);
5498                                 msleep(1000);
5499                                 qla83xx_idc_lock(base_vha, 0);
5500                         }
5501                         /* reset timeout value after need reset handler */
5502                         dev_init_timeout = jiffies +
5503                             (ha->fcoe_dev_init_timeout * HZ);
5504                         break;
5505                 case QLA8XXX_DEV_NEED_QUIESCENT:
5506                         /* XXX: DEBUG for now */
5507                         qla83xx_idc_unlock(base_vha, 0);
5508                         msleep(1000);
5509                         qla83xx_idc_lock(base_vha, 0);
5510                         break;
5511                 case QLA8XXX_DEV_QUIESCENT:
5512                         /* XXX: DEBUG for now */
5513                         if (ha->flags.quiesce_owner)
5514                                 goto exit;
5515
5516                         qla83xx_idc_unlock(base_vha, 0);
5517                         msleep(1000);
5518                         qla83xx_idc_lock(base_vha, 0);
5519                         dev_init_timeout = jiffies +
5520                             (ha->fcoe_dev_init_timeout * HZ);
5521                         break;
5522                 case QLA8XXX_DEV_FAILED:
5523                         if (ha->flags.nic_core_reset_owner)
5524                                 qla83xx_idc_audit(base_vha,
5525                                     IDC_AUDIT_COMPLETION);
5526                         ha->flags.nic_core_reset_owner = 0;
5527                         __qla83xx_clear_drv_presence(base_vha);
5528                         qla83xx_idc_unlock(base_vha, 0);
5529                         qla8xxx_dev_failed_handler(base_vha);
5530                         rval = QLA_FUNCTION_FAILED;
5531                         qla83xx_idc_lock(base_vha, 0);
5532                         goto exit;
5533                 case QLA8XXX_BAD_VALUE:
5534                         qla83xx_idc_unlock(base_vha, 0);
5535                         msleep(1000);
5536                         qla83xx_idc_lock(base_vha, 0);
5537                         break;
5538                 default:
5539                         ql_log(ql_log_warn, base_vha, 0xb071,
5540                             "Unknown Device State: %x.\n", dev_state);
5541                         qla83xx_idc_unlock(base_vha, 0);
5542                         qla8xxx_dev_failed_handler(base_vha);
5543                         rval = QLA_FUNCTION_FAILED;
5544                         qla83xx_idc_lock(base_vha, 0);
5545                         goto exit;
5546                 }
5547         }
5548
5549 exit:
5550         return rval;
5551 }
5552
5553 void
5554 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5555 {
5556         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5557             board_disable);
5558         struct pci_dev *pdev = ha->pdev;
5559         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5560
5561         /*
5562          * if UNLOAD flag is already set, then continue unload,
5563          * where it was set first.
5564          */
5565         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5566                 return;
5567
5568         ql_log(ql_log_warn, base_vha, 0x015b,
5569             "Disabling adapter.\n");
5570
5571         if (!atomic_read(&pdev->enable_cnt)) {
5572                 ql_log(ql_log_info, base_vha, 0xfffc,
5573                     "PCI device disabled, no action req for PCI error=%lx\n",
5574                     base_vha->pci_flags);
5575                 return;
5576         }
5577
5578         qla2x00_wait_for_sess_deletion(base_vha);
5579
5580         set_bit(UNLOADING, &base_vha->dpc_flags);
5581
5582         qla2x00_delete_all_vps(ha, base_vha);
5583
5584         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5585
5586         qla2x00_dfs_remove(base_vha);
5587
5588         qla84xx_put_chip(base_vha);
5589
5590         if (base_vha->timer_active)
5591                 qla2x00_stop_timer(base_vha);
5592
5593         base_vha->flags.online = 0;
5594
5595         qla2x00_destroy_deferred_work(ha);
5596
5597         /*
5598          * Do not try to stop beacon blink as it will issue a mailbox
5599          * command.
5600          */
5601         qla2x00_free_sysfs_attr(base_vha, false);
5602
5603         fc_remove_host(base_vha->host);
5604
5605         scsi_remove_host(base_vha->host);
5606
5607         base_vha->flags.init_done = 0;
5608         qla25xx_delete_queues(base_vha);
5609         qla2x00_free_fcports(base_vha);
5610         qla2x00_free_irqs(base_vha);
5611         qla2x00_mem_free(ha);
5612         qla82xx_md_free(base_vha);
5613         qla2x00_free_queues(ha);
5614
5615         qla2x00_unmap_iobases(ha);
5616
5617         pci_release_selected_regions(ha->pdev, ha->bars);
5618         pci_disable_pcie_error_reporting(pdev);
5619         pci_disable_device(pdev);
5620
5621         /*
5622          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5623          */
5624 }
5625
5626 /**************************************************************************
5627 * qla2x00_do_dpc
5628 *   This kernel thread is a task that is schedule by the interrupt handler
5629 *   to perform the background processing for interrupts.
5630 *
5631 * Notes:
5632 * This task always run in the context of a kernel thread.  It
5633 * is kick-off by the driver's detect code and starts up
5634 * up one per adapter. It immediately goes to sleep and waits for
5635 * some fibre event.  When either the interrupt handler or
5636 * the timer routine detects a event it will one of the task
5637 * bits then wake us up.
5638 **************************************************************************/
5639 static int
5640 qla2x00_do_dpc(void *data)
5641 {
5642         scsi_qla_host_t *base_vha;
5643         struct qla_hw_data *ha;
5644         uint32_t online;
5645         struct qla_qpair *qpair;
5646
5647         ha = (struct qla_hw_data *)data;
5648         base_vha = pci_get_drvdata(ha->pdev);
5649
5650         set_user_nice(current, MIN_NICE);
5651
5652         set_current_state(TASK_INTERRUPTIBLE);
5653         while (!kthread_should_stop()) {
5654                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5655                     "DPC handler sleeping.\n");
5656
5657                 schedule();
5658
5659                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5660                         goto end_loop;
5661
5662                 if (ha->flags.eeh_busy) {
5663                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5664                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5665                         goto end_loop;
5666                 }
5667
5668                 ha->dpc_active = 1;
5669
5670                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5671                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5672                     base_vha->dpc_flags);
5673
5674                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5675                         break;
5676
5677                 qla2x00_do_work(base_vha);
5678
5679                 if (IS_P3P_TYPE(ha)) {
5680                         if (IS_QLA8044(ha)) {
5681                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5682                                         &base_vha->dpc_flags)) {
5683                                         qla8044_idc_lock(ha);
5684                                         qla8044_wr_direct(base_vha,
5685                                                 QLA8044_CRB_DEV_STATE_INDEX,
5686                                                 QLA8XXX_DEV_FAILED);
5687                                         qla8044_idc_unlock(ha);
5688                                         ql_log(ql_log_info, base_vha, 0x4004,
5689                                                 "HW State: FAILED.\n");
5690                                         qla8044_device_state_handler(base_vha);
5691                                         continue;
5692                                 }
5693
5694                         } else {
5695                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5696                                         &base_vha->dpc_flags)) {
5697                                         qla82xx_idc_lock(ha);
5698                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5699                                                 QLA8XXX_DEV_FAILED);
5700                                         qla82xx_idc_unlock(ha);
5701                                         ql_log(ql_log_info, base_vha, 0x0151,
5702                                                 "HW State: FAILED.\n");
5703                                         qla82xx_device_state_handler(base_vha);
5704                                         continue;
5705                                 }
5706                         }
5707
5708                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5709                                 &base_vha->dpc_flags)) {
5710
5711                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5712                                     "FCoE context reset scheduled.\n");
5713                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5714                                         &base_vha->dpc_flags))) {
5715                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5716                                                 /* FCoE-ctx reset failed.
5717                                                  * Escalate to chip-reset
5718                                                  */
5719                                                 set_bit(ISP_ABORT_NEEDED,
5720                                                         &base_vha->dpc_flags);
5721                                         }
5722                                         clear_bit(ABORT_ISP_ACTIVE,
5723                                                 &base_vha->dpc_flags);
5724                                 }
5725
5726                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5727                                     "FCoE context reset end.\n");
5728                         }
5729                 } else if (IS_QLAFX00(ha)) {
5730                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5731                                 &base_vha->dpc_flags)) {
5732                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5733                                     "Firmware Reset Recovery\n");
5734                                 if (qlafx00_reset_initialize(base_vha)) {
5735                                         /* Failed. Abort isp later. */
5736                                         if (!test_bit(UNLOADING,
5737                                             &base_vha->dpc_flags)) {
5738                                                 set_bit(ISP_UNRECOVERABLE,
5739                                                     &base_vha->dpc_flags);
5740                                                 ql_dbg(ql_dbg_dpc, base_vha,
5741                                                     0x4021,
5742                                                     "Reset Recovery Failed\n");
5743                                         }
5744                                 }
5745                         }
5746
5747                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5748                                 &base_vha->dpc_flags)) {
5749                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5750                                     "ISPFx00 Target Scan scheduled\n");
5751                                 if (qlafx00_rescan_isp(base_vha)) {
5752                                         if (!test_bit(UNLOADING,
5753                                             &base_vha->dpc_flags))
5754                                                 set_bit(ISP_UNRECOVERABLE,
5755                                                     &base_vha->dpc_flags);
5756                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5757                                             "ISPFx00 Target Scan Failed\n");
5758                                 }
5759                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5760                                     "ISPFx00 Target Scan End\n");
5761                         }
5762                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5763                                 &base_vha->dpc_flags)) {
5764                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5765                                     "ISPFx00 Host Info resend scheduled\n");
5766                                 qlafx00_fx_disc(base_vha,
5767                                     &base_vha->hw->mr.fcport,
5768                                     FXDISC_REG_HOST_INFO);
5769                         }
5770                 }
5771
5772                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
5773                         &base_vha->dpc_flags) &&
5774                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
5775                         qla24xx_detect_sfp(base_vha);
5776
5777                         if (ha->flags.detected_lr_sfp !=
5778                             ha->flags.using_lr_setting)
5779                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
5780                 }
5781
5782                 if (test_and_clear_bit
5783                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
5784                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
5785                         bool do_reset = true;
5786
5787                         switch (ql2x_ini_mode) {
5788                         case QLA2XXX_INI_MODE_ENABLED:
5789                                 break;
5790                         case QLA2XXX_INI_MODE_DISABLED:
5791                                 if (!qla_tgt_mode_enabled(base_vha))
5792                                         do_reset = false;
5793                                 break;
5794                         case QLA2XXX_INI_MODE_DUAL:
5795                                 if (!qla_dual_mode_enabled(base_vha))
5796                                         do_reset = false;
5797                                 break;
5798                         default:
5799                                 break;
5800                         }
5801
5802                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
5803                             &base_vha->dpc_flags))) {
5804                                 base_vha->flags.online = 1;
5805                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5806                                     "ISP abort scheduled.\n");
5807                                 if (ha->isp_ops->abort_isp(base_vha)) {
5808                                         /* failed. retry later */
5809                                         set_bit(ISP_ABORT_NEEDED,
5810                                             &base_vha->dpc_flags);
5811                                 }
5812                                 clear_bit(ABORT_ISP_ACTIVE,
5813                                                 &base_vha->dpc_flags);
5814                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5815                                     "ISP abort end.\n");
5816                         }
5817                 }
5818
5819                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5820                     &base_vha->dpc_flags)) {
5821                         qla2x00_update_fcports(base_vha);
5822                 }
5823
5824                 if (IS_QLAFX00(ha))
5825                         goto loop_resync_check;
5826
5827                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5828                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5829                             "Quiescence mode scheduled.\n");
5830                         if (IS_P3P_TYPE(ha)) {
5831                                 if (IS_QLA82XX(ha))
5832                                         qla82xx_device_state_handler(base_vha);
5833                                 if (IS_QLA8044(ha))
5834                                         qla8044_device_state_handler(base_vha);
5835                                 clear_bit(ISP_QUIESCE_NEEDED,
5836                                     &base_vha->dpc_flags);
5837                                 if (!ha->flags.quiesce_owner) {
5838                                         qla2x00_perform_loop_resync(base_vha);
5839                                         if (IS_QLA82XX(ha)) {
5840                                                 qla82xx_idc_lock(ha);
5841                                                 qla82xx_clear_qsnt_ready(
5842                                                     base_vha);
5843                                                 qla82xx_idc_unlock(ha);
5844                                         } else if (IS_QLA8044(ha)) {
5845                                                 qla8044_idc_lock(ha);
5846                                                 qla8044_clear_qsnt_ready(
5847                                                     base_vha);
5848                                                 qla8044_idc_unlock(ha);
5849                                         }
5850                                 }
5851                         } else {
5852                                 clear_bit(ISP_QUIESCE_NEEDED,
5853                                     &base_vha->dpc_flags);
5854                                 qla2x00_quiesce_io(base_vha);
5855                         }
5856                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5857                             "Quiescence mode end.\n");
5858                 }
5859
5860                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5861                                 &base_vha->dpc_flags) &&
5862                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5863
5864                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5865                             "Reset marker scheduled.\n");
5866                         qla2x00_rst_aen(base_vha);
5867                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5868                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5869                             "Reset marker end.\n");
5870                 }
5871
5872                 /* Retry each device up to login retry count */
5873                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
5874                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5875                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5876
5877                         if (!base_vha->relogin_jif ||
5878                             time_after_eq(jiffies, base_vha->relogin_jif)) {
5879                                 base_vha->relogin_jif = jiffies + HZ;
5880                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
5881
5882                                 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5883                                     "Relogin scheduled.\n");
5884                                 qla2x00_relogin(base_vha);
5885                                 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5886                                     "Relogin end.\n");
5887                         }
5888                 }
5889 loop_resync_check:
5890                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5891                     &base_vha->dpc_flags)) {
5892
5893                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5894                             "Loop resync scheduled.\n");
5895
5896                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5897                             &base_vha->dpc_flags))) {
5898
5899                                 qla2x00_loop_resync(base_vha);
5900
5901                                 clear_bit(LOOP_RESYNC_ACTIVE,
5902                                                 &base_vha->dpc_flags);
5903                         }
5904
5905                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5906                             "Loop resync end.\n");
5907                 }
5908
5909                 if (IS_QLAFX00(ha))
5910                         goto intr_on_check;
5911
5912                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5913                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5914                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5915                         qla2xxx_flash_npiv_conf(base_vha);
5916                 }
5917
5918 intr_on_check:
5919                 if (!ha->interrupts_on)
5920                         ha->isp_ops->enable_intrs(ha);
5921
5922                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5923                                         &base_vha->dpc_flags)) {
5924                         if (ha->beacon_blink_led == 1)
5925                                 ha->isp_ops->beacon_blink(base_vha);
5926                 }
5927
5928                 /* qpair online check */
5929                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5930                     &base_vha->dpc_flags)) {
5931                         if (ha->flags.eeh_busy ||
5932                             ha->flags.pci_channel_io_perm_failure)
5933                                 online = 0;
5934                         else
5935                                 online = 1;
5936
5937                         mutex_lock(&ha->mq_lock);
5938                         list_for_each_entry(qpair, &base_vha->qp_list,
5939                             qp_list_elem)
5940                         qpair->online = online;
5941                         mutex_unlock(&ha->mq_lock);
5942                 }
5943
5944                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
5945                         ql_log(ql_log_info, base_vha, 0xffffff,
5946                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
5947                                                 ha->nvme_last_rptd_aen);
5948                         if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
5949                                 ql_log(ql_log_info, base_vha, 0xffffff,
5950                                         "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
5951                                                 ha->nvme_last_rptd_aen);
5952                         }
5953                 }
5954
5955                 if (!IS_QLAFX00(ha))
5956                         qla2x00_do_dpc_all_vps(base_vha);
5957
5958                 ha->dpc_active = 0;
5959 end_loop:
5960                 set_current_state(TASK_INTERRUPTIBLE);
5961         } /* End of while(1) */
5962         __set_current_state(TASK_RUNNING);
5963
5964         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5965             "DPC handler exiting.\n");
5966
5967         /*
5968          * Make sure that nobody tries to wake us up again.
5969          */
5970         ha->dpc_active = 0;
5971
5972         /* Cleanup any residual CTX SRBs. */
5973         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5974
5975         return 0;
5976 }
5977
5978 void
5979 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5980 {
5981         struct qla_hw_data *ha = vha->hw;
5982         struct task_struct *t = ha->dpc_thread;
5983
5984         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5985                 wake_up_process(t);
5986 }
5987
5988 /*
5989 *  qla2x00_rst_aen
5990 *      Processes asynchronous reset.
5991 *
5992 * Input:
5993 *      ha  = adapter block pointer.
5994 */
5995 static void
5996 qla2x00_rst_aen(scsi_qla_host_t *vha)
5997 {
5998         if (vha->flags.online && !vha->flags.reset_active &&
5999             !atomic_read(&vha->loop_down_timer) &&
6000             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6001                 do {
6002                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6003
6004                         /*
6005                          * Issue marker command only when we are going to start
6006                          * the I/O.
6007                          */
6008                         vha->marker_needed = 1;
6009                 } while (!atomic_read(&vha->loop_down_timer) &&
6010                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6011         }
6012 }
6013
6014 /**************************************************************************
6015 *   qla2x00_timer
6016 *
6017 * Description:
6018 *   One second timer
6019 *
6020 * Context: Interrupt
6021 ***************************************************************************/
6022 void
6023 qla2x00_timer(scsi_qla_host_t *vha)
6024 {
6025         unsigned long   cpu_flags = 0;
6026         int             start_dpc = 0;
6027         int             index;
6028         srb_t           *sp;
6029         uint16_t        w;
6030         struct qla_hw_data *ha = vha->hw;
6031         struct req_que *req;
6032
6033         if (ha->flags.eeh_busy) {
6034                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6035                     "EEH = %d, restarting timer.\n",
6036                     ha->flags.eeh_busy);
6037                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6038                 return;
6039         }
6040
6041         /*
6042          * Hardware read to raise pending EEH errors during mailbox waits. If
6043          * the read returns -1 then disable the board.
6044          */
6045         if (!pci_channel_offline(ha->pdev)) {
6046                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6047                 qla2x00_check_reg16_for_disconnect(vha, w);
6048         }
6049
6050         /* Make sure qla82xx_watchdog is run only for physical port */
6051         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6052                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6053                         start_dpc++;
6054                 if (IS_QLA82XX(ha))
6055                         qla82xx_watchdog(vha);
6056                 else if (IS_QLA8044(ha))
6057                         qla8044_watchdog(vha);
6058         }
6059
6060         if (!vha->vp_idx && IS_QLAFX00(ha))
6061                 qlafx00_timer_routine(vha);
6062
6063         /* Loop down handler. */
6064         if (atomic_read(&vha->loop_down_timer) > 0 &&
6065             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6066             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6067                 && vha->flags.online) {
6068
6069                 if (atomic_read(&vha->loop_down_timer) ==
6070                     vha->loop_down_abort_time) {
6071
6072                         ql_log(ql_log_info, vha, 0x6008,
6073                             "Loop down - aborting the queues before time expires.\n");
6074
6075                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6076                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6077
6078                         /*
6079                          * Schedule an ISP abort to return any FCP2-device
6080                          * commands.
6081                          */
6082                         /* NPIV - scan physical port only */
6083                         if (!vha->vp_idx) {
6084                                 spin_lock_irqsave(&ha->hardware_lock,
6085                                     cpu_flags);
6086                                 req = ha->req_q_map[0];
6087                                 for (index = 1;
6088                                     index < req->num_outstanding_cmds;
6089                                     index++) {
6090                                         fc_port_t *sfcp;
6091
6092                                         sp = req->outstanding_cmds[index];
6093                                         if (!sp)
6094                                                 continue;
6095                                         if (sp->cmd_type != TYPE_SRB)
6096                                                 continue;
6097                                         if (sp->type != SRB_SCSI_CMD)
6098                                                 continue;
6099                                         sfcp = sp->fcport;
6100                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6101                                                 continue;
6102
6103                                         if (IS_QLA82XX(ha))
6104                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6105                                                         &vha->dpc_flags);
6106                                         else
6107                                                 set_bit(ISP_ABORT_NEEDED,
6108                                                         &vha->dpc_flags);
6109                                         break;
6110                                 }
6111                                 spin_unlock_irqrestore(&ha->hardware_lock,
6112                                                                 cpu_flags);
6113                         }
6114                         start_dpc++;
6115                 }
6116
6117                 /* if the loop has been down for 4 minutes, reinit adapter */
6118                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6119                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6120                                 ql_log(ql_log_warn, vha, 0x6009,
6121                                     "Loop down - aborting ISP.\n");
6122
6123                                 if (IS_QLA82XX(ha))
6124                                         set_bit(FCOE_CTX_RESET_NEEDED,
6125                                                 &vha->dpc_flags);
6126                                 else
6127                                         set_bit(ISP_ABORT_NEEDED,
6128                                                 &vha->dpc_flags);
6129                         }
6130                 }
6131                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6132                     "Loop down - seconds remaining %d.\n",
6133                     atomic_read(&vha->loop_down_timer));
6134         }
6135         /* Check if beacon LED needs to be blinked for physical host only */
6136         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6137                 /* There is no beacon_blink function for ISP82xx */
6138                 if (!IS_P3P_TYPE(ha)) {
6139                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6140                         start_dpc++;
6141                 }
6142         }
6143
6144         /* Process any deferred work. */
6145         if (!list_empty(&vha->work_list))
6146                 start_dpc++;
6147
6148         /*
6149          * FC-NVME
6150          * see if the active AEN count has changed from what was last reported.
6151          */
6152         if (!vha->vp_idx &&
6153                 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6154                 ha->zio_mode == QLA_ZIO_MODE_6) {
6155                 ql_log(ql_log_info, vha, 0x3002,
6156                         "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6157                         ha->nvme_last_rptd_aen);
6158                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6159                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6160                 start_dpc++;
6161         }
6162
6163         /* Schedule the DPC routine if needed */
6164         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6165             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6166             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6167             start_dpc ||
6168             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6169             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6170             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6171             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6172             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6173             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6174                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6175                     "isp_abort_needed=%d loop_resync_needed=%d "
6176                     "fcport_update_needed=%d start_dpc=%d "
6177                     "reset_marker_needed=%d",
6178                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6179                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6180                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6181                     start_dpc,
6182                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6183                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6184                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6185                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6186                     "relogin_needed=%d.\n",
6187                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6188                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6189                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6190                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6191                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6192                 qla2xxx_wake_dpc(vha);
6193         }
6194
6195         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6196 }
6197
6198 /* Firmware interface routines. */
6199
6200 #define FW_BLOBS        11
6201 #define FW_ISP21XX      0
6202 #define FW_ISP22XX      1
6203 #define FW_ISP2300      2
6204 #define FW_ISP2322      3
6205 #define FW_ISP24XX      4
6206 #define FW_ISP25XX      5
6207 #define FW_ISP81XX      6
6208 #define FW_ISP82XX      7
6209 #define FW_ISP2031      8
6210 #define FW_ISP8031      9
6211 #define FW_ISP27XX      10
6212
6213 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
6214 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
6215 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
6216 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
6217 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
6218 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
6219 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
6220 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
6221 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
6222 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
6223 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
6224
6225
6226 static DEFINE_MUTEX(qla_fw_lock);
6227
6228 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6229         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6230         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6231         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6232         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6233         { .name = FW_FILE_ISP24XX, },
6234         { .name = FW_FILE_ISP25XX, },
6235         { .name = FW_FILE_ISP81XX, },
6236         { .name = FW_FILE_ISP82XX, },
6237         { .name = FW_FILE_ISP2031, },
6238         { .name = FW_FILE_ISP8031, },
6239         { .name = FW_FILE_ISP27XX, },
6240 };
6241
6242 struct fw_blob *
6243 qla2x00_request_firmware(scsi_qla_host_t *vha)
6244 {
6245         struct qla_hw_data *ha = vha->hw;
6246         struct fw_blob *blob;
6247
6248         if (IS_QLA2100(ha)) {
6249                 blob = &qla_fw_blobs[FW_ISP21XX];
6250         } else if (IS_QLA2200(ha)) {
6251                 blob = &qla_fw_blobs[FW_ISP22XX];
6252         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6253                 blob = &qla_fw_blobs[FW_ISP2300];
6254         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6255                 blob = &qla_fw_blobs[FW_ISP2322];
6256         } else if (IS_QLA24XX_TYPE(ha)) {
6257                 blob = &qla_fw_blobs[FW_ISP24XX];
6258         } else if (IS_QLA25XX(ha)) {
6259                 blob = &qla_fw_blobs[FW_ISP25XX];
6260         } else if (IS_QLA81XX(ha)) {
6261                 blob = &qla_fw_blobs[FW_ISP81XX];
6262         } else if (IS_QLA82XX(ha)) {
6263                 blob = &qla_fw_blobs[FW_ISP82XX];
6264         } else if (IS_QLA2031(ha)) {
6265                 blob = &qla_fw_blobs[FW_ISP2031];
6266         } else if (IS_QLA8031(ha)) {
6267                 blob = &qla_fw_blobs[FW_ISP8031];
6268         } else if (IS_QLA27XX(ha)) {
6269                 blob = &qla_fw_blobs[FW_ISP27XX];
6270         } else {
6271                 return NULL;
6272         }
6273
6274         mutex_lock(&qla_fw_lock);
6275         if (blob->fw)
6276                 goto out;
6277
6278         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6279                 ql_log(ql_log_warn, vha, 0x0063,
6280                     "Failed to load firmware image (%s).\n", blob->name);
6281                 blob->fw = NULL;
6282                 blob = NULL;
6283                 goto out;
6284         }
6285
6286 out:
6287         mutex_unlock(&qla_fw_lock);
6288         return blob;
6289 }
6290
6291 static void
6292 qla2x00_release_firmware(void)
6293 {
6294         int idx;
6295
6296         mutex_lock(&qla_fw_lock);
6297         for (idx = 0; idx < FW_BLOBS; idx++)
6298                 release_firmware(qla_fw_blobs[idx].fw);
6299         mutex_unlock(&qla_fw_lock);
6300 }
6301
6302 static pci_ers_result_t
6303 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6304 {
6305         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6306         struct qla_hw_data *ha = vha->hw;
6307
6308         ql_dbg(ql_dbg_aer, vha, 0x9000,
6309             "PCI error detected, state %x.\n", state);
6310
6311         if (!atomic_read(&pdev->enable_cnt)) {
6312                 ql_log(ql_log_info, vha, 0xffff,
6313                         "PCI device is disabled,state %x\n", state);
6314                 return PCI_ERS_RESULT_NEED_RESET;
6315         }
6316
6317         switch (state) {
6318         case pci_channel_io_normal:
6319                 ha->flags.eeh_busy = 0;
6320                 if (ql2xmqsupport) {
6321                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6322                         qla2xxx_wake_dpc(vha);
6323                 }
6324                 return PCI_ERS_RESULT_CAN_RECOVER;
6325         case pci_channel_io_frozen:
6326                 ha->flags.eeh_busy = 1;
6327                 /* For ISP82XX complete any pending mailbox cmd */
6328                 if (IS_QLA82XX(ha)) {
6329                         ha->flags.isp82xx_fw_hung = 1;
6330                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6331                         qla82xx_clear_pending_mbx(vha);
6332                 }
6333                 qla2x00_free_irqs(vha);
6334                 pci_disable_device(pdev);
6335                 /* Return back all IOs */
6336                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6337                 if (ql2xmqsupport) {
6338                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6339                         qla2xxx_wake_dpc(vha);
6340                 }
6341                 return PCI_ERS_RESULT_NEED_RESET;
6342         case pci_channel_io_perm_failure:
6343                 ha->flags.pci_channel_io_perm_failure = 1;
6344                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6345                 if (ql2xmqsupport) {
6346                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6347                         qla2xxx_wake_dpc(vha);
6348                 }
6349                 return PCI_ERS_RESULT_DISCONNECT;
6350         }
6351         return PCI_ERS_RESULT_NEED_RESET;
6352 }
6353
6354 static pci_ers_result_t
6355 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6356 {
6357         int risc_paused = 0;
6358         uint32_t stat;
6359         unsigned long flags;
6360         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6361         struct qla_hw_data *ha = base_vha->hw;
6362         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6363         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6364
6365         if (IS_QLA82XX(ha))
6366                 return PCI_ERS_RESULT_RECOVERED;
6367
6368         spin_lock_irqsave(&ha->hardware_lock, flags);
6369         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6370                 stat = RD_REG_DWORD(&reg->hccr);
6371                 if (stat & HCCR_RISC_PAUSE)
6372                         risc_paused = 1;
6373         } else if (IS_QLA23XX(ha)) {
6374                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6375                 if (stat & HSR_RISC_PAUSED)
6376                         risc_paused = 1;
6377         } else if (IS_FWI2_CAPABLE(ha)) {
6378                 stat = RD_REG_DWORD(&reg24->host_status);
6379                 if (stat & HSRX_RISC_PAUSED)
6380                         risc_paused = 1;
6381         }
6382         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6383
6384         if (risc_paused) {
6385                 ql_log(ql_log_info, base_vha, 0x9003,
6386                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6387                 ha->isp_ops->fw_dump(base_vha, 0);
6388
6389                 return PCI_ERS_RESULT_NEED_RESET;
6390         } else
6391                 return PCI_ERS_RESULT_RECOVERED;
6392 }
6393
6394 static uint32_t
6395 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6396 {
6397         uint32_t rval = QLA_FUNCTION_FAILED;
6398         uint32_t drv_active = 0;
6399         struct qla_hw_data *ha = base_vha->hw;
6400         int fn;
6401         struct pci_dev *other_pdev = NULL;
6402
6403         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6404             "Entered %s.\n", __func__);
6405
6406         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6407
6408         if (base_vha->flags.online) {
6409                 /* Abort all outstanding commands,
6410                  * so as to be requeued later */
6411                 qla2x00_abort_isp_cleanup(base_vha);
6412         }
6413
6414
6415         fn = PCI_FUNC(ha->pdev->devfn);
6416         while (fn > 0) {
6417                 fn--;
6418                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6419                     "Finding pci device at function = 0x%x.\n", fn);
6420                 other_pdev =
6421                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6422                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6423                     fn));
6424
6425                 if (!other_pdev)
6426                         continue;
6427                 if (atomic_read(&other_pdev->enable_cnt)) {
6428                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6429                             "Found PCI func available and enable at 0x%x.\n",
6430                             fn);
6431                         pci_dev_put(other_pdev);
6432                         break;
6433                 }
6434                 pci_dev_put(other_pdev);
6435         }
6436
6437         if (!fn) {
6438                 /* Reset owner */
6439                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6440                     "This devfn is reset owner = 0x%x.\n",
6441                     ha->pdev->devfn);
6442                 qla82xx_idc_lock(ha);
6443
6444                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6445                     QLA8XXX_DEV_INITIALIZING);
6446
6447                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6448                     QLA82XX_IDC_VERSION);
6449
6450                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6451                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6452                     "drv_active = 0x%x.\n", drv_active);
6453
6454                 qla82xx_idc_unlock(ha);
6455                 /* Reset if device is not already reset
6456                  * drv_active would be 0 if a reset has already been done
6457                  */
6458                 if (drv_active)
6459                         rval = qla82xx_start_firmware(base_vha);
6460                 else
6461                         rval = QLA_SUCCESS;
6462                 qla82xx_idc_lock(ha);
6463
6464                 if (rval != QLA_SUCCESS) {
6465                         ql_log(ql_log_info, base_vha, 0x900b,
6466                             "HW State: FAILED.\n");
6467                         qla82xx_clear_drv_active(ha);
6468                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6469                             QLA8XXX_DEV_FAILED);
6470                 } else {
6471                         ql_log(ql_log_info, base_vha, 0x900c,
6472                             "HW State: READY.\n");
6473                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6474                             QLA8XXX_DEV_READY);
6475                         qla82xx_idc_unlock(ha);
6476                         ha->flags.isp82xx_fw_hung = 0;
6477                         rval = qla82xx_restart_isp(base_vha);
6478                         qla82xx_idc_lock(ha);
6479                         /* Clear driver state register */
6480                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6481                         qla82xx_set_drv_active(base_vha);
6482                 }
6483                 qla82xx_idc_unlock(ha);
6484         } else {
6485                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6486                     "This devfn is not reset owner = 0x%x.\n",
6487                     ha->pdev->devfn);
6488                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6489                     QLA8XXX_DEV_READY)) {
6490                         ha->flags.isp82xx_fw_hung = 0;
6491                         rval = qla82xx_restart_isp(base_vha);
6492                         qla82xx_idc_lock(ha);
6493                         qla82xx_set_drv_active(base_vha);
6494                         qla82xx_idc_unlock(ha);
6495                 }
6496         }
6497         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6498
6499         return rval;
6500 }
6501
6502 static pci_ers_result_t
6503 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6504 {
6505         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6506         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6507         struct qla_hw_data *ha = base_vha->hw;
6508         struct rsp_que *rsp;
6509         int rc, retries = 10;
6510
6511         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6512             "Slot Reset.\n");
6513
6514         /* Workaround: qla2xxx driver which access hardware earlier
6515          * needs error state to be pci_channel_io_online.
6516          * Otherwise mailbox command timesout.
6517          */
6518         pdev->error_state = pci_channel_io_normal;
6519
6520         pci_restore_state(pdev);
6521
6522         /* pci_restore_state() clears the saved_state flag of the device
6523          * save restored state which resets saved_state flag
6524          */
6525         pci_save_state(pdev);
6526
6527         if (ha->mem_only)
6528                 rc = pci_enable_device_mem(pdev);
6529         else
6530                 rc = pci_enable_device(pdev);
6531
6532         if (rc) {
6533                 ql_log(ql_log_warn, base_vha, 0x9005,
6534                     "Can't re-enable PCI device after reset.\n");
6535                 goto exit_slot_reset;
6536         }
6537
6538         rsp = ha->rsp_q_map[0];
6539         if (qla2x00_request_irqs(ha, rsp))
6540                 goto exit_slot_reset;
6541
6542         if (ha->isp_ops->pci_config(base_vha))
6543                 goto exit_slot_reset;
6544
6545         if (IS_QLA82XX(ha)) {
6546                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6547                         ret = PCI_ERS_RESULT_RECOVERED;
6548                         goto exit_slot_reset;
6549                 } else
6550                         goto exit_slot_reset;
6551         }
6552
6553         while (ha->flags.mbox_busy && retries--)
6554                 msleep(1000);
6555
6556         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6557         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6558                 ret =  PCI_ERS_RESULT_RECOVERED;
6559         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6560
6561
6562 exit_slot_reset:
6563         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6564             "slot_reset return %x.\n", ret);
6565
6566         return ret;
6567 }
6568
6569 static void
6570 qla2xxx_pci_resume(struct pci_dev *pdev)
6571 {
6572         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6573         struct qla_hw_data *ha = base_vha->hw;
6574         int ret;
6575
6576         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6577             "pci_resume.\n");
6578
6579         ret = qla2x00_wait_for_hba_online(base_vha);
6580         if (ret != QLA_SUCCESS) {
6581                 ql_log(ql_log_fatal, base_vha, 0x9002,
6582                     "The device failed to resume I/O from slot/link_reset.\n");
6583         }
6584
6585         pci_cleanup_aer_uncorrect_error_status(pdev);
6586
6587         ha->flags.eeh_busy = 0;
6588 }
6589
6590 static void
6591 qla83xx_disable_laser(scsi_qla_host_t *vha)
6592 {
6593         uint32_t reg, data, fn;
6594         struct qla_hw_data *ha = vha->hw;
6595         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6596
6597         /* pci func #/port # */
6598         ql_dbg(ql_dbg_init, vha, 0x004b,
6599             "Disabling Laser for hba: %p\n", vha);
6600
6601         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6602                 (BIT_15|BIT_14|BIT_13|BIT_12));
6603
6604         fn = (fn >> 12);
6605
6606         if (fn & 1)
6607                 reg = PORT_1_2031;
6608         else
6609                 reg = PORT_0_2031;
6610
6611         data = LASER_OFF_2031;
6612
6613         qla83xx_wr_reg(vha, reg, data);
6614 }
6615
6616 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6617 {
6618         int rc;
6619         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6620
6621         if (USER_CTRL_IRQ(vha->hw))
6622                 rc = blk_mq_map_queues(&shost->tag_set);
6623         else
6624                 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6625         return rc;
6626 }
6627
6628 static const struct pci_error_handlers qla2xxx_err_handler = {
6629         .error_detected = qla2xxx_pci_error_detected,
6630         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6631         .slot_reset = qla2xxx_pci_slot_reset,
6632         .resume = qla2xxx_pci_resume,
6633 };
6634
6635 static struct pci_device_id qla2xxx_pci_tbl[] = {
6636         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6637         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6638         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6639         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6640         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6641         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6642         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6643         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6644         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6645         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6646         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6647         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6648         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6649         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6650         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6651         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6652         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6653         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6654         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6655         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6656         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6657         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6658         { 0 },
6659 };
6660 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6661
6662 static struct pci_driver qla2xxx_pci_driver = {
6663         .name           = QLA2XXX_DRIVER_NAME,
6664         .driver         = {
6665                 .owner          = THIS_MODULE,
6666         },
6667         .id_table       = qla2xxx_pci_tbl,
6668         .probe          = qla2x00_probe_one,
6669         .remove         = qla2x00_remove_one,
6670         .shutdown       = qla2x00_shutdown,
6671         .err_handler    = &qla2xxx_err_handler,
6672 };
6673
6674 static const struct file_operations apidev_fops = {
6675         .owner = THIS_MODULE,
6676         .llseek = noop_llseek,
6677 };
6678
6679 /**
6680  * qla2x00_module_init - Module initialization.
6681  **/
6682 static int __init
6683 qla2x00_module_init(void)
6684 {
6685         int ret = 0;
6686
6687         /* Allocate cache for SRBs. */
6688         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6689             SLAB_HWCACHE_ALIGN, NULL);
6690         if (srb_cachep == NULL) {
6691                 ql_log(ql_log_fatal, NULL, 0x0001,
6692                     "Unable to allocate SRB cache...Failing load!.\n");
6693                 return -ENOMEM;
6694         }
6695
6696         /* Initialize target kmem_cache and mem_pools */
6697         ret = qlt_init();
6698         if (ret < 0) {
6699                 goto destroy_cache;
6700         } else if (ret > 0) {
6701                 /*
6702                  * If initiator mode is explictly disabled by qlt_init(),
6703                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6704                  * performing scsi_scan_target() during LOOP UP event.
6705                  */
6706                 qla2xxx_transport_functions.disable_target_scan = 1;
6707                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6708         }
6709
6710         /* Derive version string. */
6711         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6712         if (ql2xextended_error_logging)
6713                 strcat(qla2x00_version_str, "-debug");
6714         if (ql2xextended_error_logging == 1)
6715                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6716
6717         qla2xxx_transport_template =
6718             fc_attach_transport(&qla2xxx_transport_functions);
6719         if (!qla2xxx_transport_template) {
6720                 ql_log(ql_log_fatal, NULL, 0x0002,
6721                     "fc_attach_transport failed...Failing load!.\n");
6722                 ret = -ENODEV;
6723                 goto qlt_exit;
6724         }
6725
6726         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6727         if (apidev_major < 0) {
6728                 ql_log(ql_log_fatal, NULL, 0x0003,
6729                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6730         }
6731
6732         qla2xxx_transport_vport_template =
6733             fc_attach_transport(&qla2xxx_transport_vport_functions);
6734         if (!qla2xxx_transport_vport_template) {
6735                 ql_log(ql_log_fatal, NULL, 0x0004,
6736                     "fc_attach_transport vport failed...Failing load!.\n");
6737                 ret = -ENODEV;
6738                 goto unreg_chrdev;
6739         }
6740         ql_log(ql_log_info, NULL, 0x0005,
6741             "QLogic Fibre Channel HBA Driver: %s.\n",
6742             qla2x00_version_str);
6743         ret = pci_register_driver(&qla2xxx_pci_driver);
6744         if (ret) {
6745                 ql_log(ql_log_fatal, NULL, 0x0006,
6746                     "pci_register_driver failed...ret=%d Failing load!.\n",
6747                     ret);
6748                 goto release_vport_transport;
6749         }
6750         return ret;
6751
6752 release_vport_transport:
6753         fc_release_transport(qla2xxx_transport_vport_template);
6754
6755 unreg_chrdev:
6756         if (apidev_major >= 0)
6757                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6758         fc_release_transport(qla2xxx_transport_template);
6759
6760 qlt_exit:
6761         qlt_exit();
6762
6763 destroy_cache:
6764         kmem_cache_destroy(srb_cachep);
6765         return ret;
6766 }
6767
6768 /**
6769  * qla2x00_module_exit - Module cleanup.
6770  **/
6771 static void __exit
6772 qla2x00_module_exit(void)
6773 {
6774         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6775         pci_unregister_driver(&qla2xxx_pci_driver);
6776         qla2x00_release_firmware();
6777         kmem_cache_destroy(srb_cachep);
6778         qlt_exit();
6779         if (ctx_cachep)
6780                 kmem_cache_destroy(ctx_cachep);
6781         fc_release_transport(qla2xxx_transport_template);
6782         fc_release_transport(qla2xxx_transport_vport_template);
6783 }
6784
6785 module_init(qla2x00_module_init);
6786 module_exit(qla2x00_module_exit);
6787
6788 MODULE_AUTHOR("QLogic Corporation");
6789 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6790 MODULE_LICENSE("GPL");
6791 MODULE_VERSION(QLA2XXX_VERSION);
6792 /*(DEBLOBBED)*/