drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint64_t ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, ullong, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 240 static void qla2x00_free_device(scsi_qla_host_t *);
 241 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = scsi_change_queue_depth,
 261         .this_id                = -1,
 262         .cmd_per_lun            = 3,
 263         .use_clustering         = ENABLE_CLUSTERING,
 264         .sg_tablesize           = SG_ALL,
 265
 266         .max_sectors            = 0xFFFF,
 267         .shost_attrs            = qla2x00_host_attrs,
 268
 269         .supported_mode         = MODE_INITIATOR,
 270         .track_queue_depth      = 1,
 271 };
 272
 273 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 274 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 275
 276 /* TODO Convert to inlines
 277  *
 278  * Timer routines
 279  */
 280
 281 __inline__ void
 282 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 283 {
 284         init_timer(&vha->timer);
 285         vha->timer.expires = jiffies + interval * HZ;
 286         vha->timer.data = (unsigned long)vha;
 287         vha->timer.function = (void (*)(unsigned long))func;
 288         add_timer(&vha->timer);
 289         vha->timer_active = 1;
 290 }
 291
 292 static inline void
 293 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 294 {
 295         /* Currently used for 82XX only. */
 296         if (vha->device_flags & DFLG_DEV_FAILED) {
 297                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 298                     "Device in a failed state, returning.\n");
 299                 return;
 300         }
 301
 302         mod_timer(&vha->timer, jiffies + interval * HZ);
 303 }
 304
 305 static __inline__ void
 306 qla2x00_stop_timer(scsi_qla_host_t *vha)
 307 {
 308         del_timer_sync(&vha->timer);
 309         vha->timer_active = 0;
 310 }
 311
 312 static int qla2x00_do_dpc(void *data);
 313
 314 static void qla2x00_rst_aen(scsi_qla_host_t *);
 315
 316 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 317         struct req_que **, struct rsp_que **);
 318 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 319 static void qla2x00_mem_free(struct qla_hw_data *);
 320
 321 /* -------------------------------------------------------------------------- */
 322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 323                                 struct rsp_que *rsp)
 324 {
 325         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 326         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 327                                 GFP_KERNEL);
 328         if (!ha->req_q_map) {
 329                 ql_log(ql_log_fatal, vha, 0x003b,
 330                     "Unable to allocate memory for request queue ptrs.\n");
 331                 goto fail_req_map;
 332         }
 333
 334         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 335                                 GFP_KERNEL);
 336         if (!ha->rsp_q_map) {
 337                 ql_log(ql_log_fatal, vha, 0x003c,
 338                     "Unable to allocate memory for response queue ptrs.\n");
 339                 goto fail_rsp_map;
 340         }
 341         /*
 342          * Make sure we record at least the request and response queue zero in
 343          * case we need to free them if part of the probe fails.
 344          */
 345         ha->rsp_q_map[0] = rsp;
 346         ha->req_q_map[0] = req;
 347         set_bit(0, ha->rsp_qid_map);
 348         set_bit(0, ha->req_qid_map);
 349         return 1;
 350
 351 fail_rsp_map:
 352         kfree(ha->req_q_map);
 353         ha->req_q_map = NULL;
 354 fail_req_map:
 355         return -ENOMEM;
 356 }
 357
 358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 359 {
 360         if (IS_QLAFX00(ha)) {
 361                 if (req && req->ring_fx00)
 362                         dma_free_coherent(&ha->pdev->dev,
 363                             (req->length_fx00 + 1) * sizeof(request_t),
 364                             req->ring_fx00, req->dma_fx00);
 365         } else if (req && req->ring)
 366                 dma_free_coherent(&ha->pdev->dev,
 367                 (req->length + 1) * sizeof(request_t),
 368                 req->ring, req->dma);
 369
 370         if (req)
 371                 kfree(req->outstanding_cmds);
 372
 373         kfree(req);
 374         req = NULL;
 375 }
 376
 377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 378 {
 379         if (IS_QLAFX00(ha)) {
 380                 if (rsp && rsp->ring)
 381                         dma_free_coherent(&ha->pdev->dev,
 382                             (rsp->length_fx00 + 1) * sizeof(request_t),
 383                             rsp->ring_fx00, rsp->dma_fx00);
 384         } else if (rsp && rsp->ring) {
 385                 dma_free_coherent(&ha->pdev->dev,
 386                 (rsp->length + 1) * sizeof(response_t),
 387                 rsp->ring, rsp->dma);
 388         }
 389         kfree(rsp);
 390         rsp = NULL;
 391 }
 392
 393 static void qla2x00_free_queues(struct qla_hw_data *ha)
 394 {
 395         struct req_que *req;
 396         struct rsp_que *rsp;
 397         int cnt;
 398
 399         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 400                 if (!test_bit(cnt, ha->req_qid_map))
 401                         continue;
 402
 403                 req = ha->req_q_map[cnt];
 404                 qla2x00_free_req_que(ha, req);
 405         }
 406         kfree(ha->req_q_map);
 407         ha->req_q_map = NULL;
 408
 409         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 410                 if (!test_bit(cnt, ha->rsp_qid_map))
 411                         continue;
 412
 413                 rsp = ha->rsp_q_map[cnt];
 414                 qla2x00_free_rsp_que(ha, rsp);
 415         }
 416         kfree(ha->rsp_q_map);
 417         ha->rsp_q_map = NULL;
 418 }
 419
 420 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 421 {
 422         uint16_t options = 0;
 423         int ques, req, ret;
 424         struct qla_hw_data *ha = vha->hw;
 425
 426         if (!(ha->fw_attributes & BIT_6)) {
 427                 ql_log(ql_log_warn, vha, 0x00d8,
 428                     "Firmware is not multi-queue capable.\n");
 429                 goto fail;
 430         }
 431         if (ql2xmultique_tag) {
 432                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 433                 if (unlikely(!ha->wq)) {
 434                         ql_log(ql_log_warn, vha, 0x01e0,
 435                             "Failed to alloc workqueue.\n");
 436                         goto fail;
 437                 }
 438                 /* create a request queue for IO */
 439                 options |= BIT_7;
 440                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 441                         QLA_DEFAULT_QUE_QOS);
 442                 if (!req) {
 443                         ql_log(ql_log_warn, vha, 0x00e0,
 444                             "Failed to create request queue.\n");
 445                         goto fail2;
 446                 }
 447                 vha->req = ha->req_q_map[req];
 448                 options |= BIT_1;
 449                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 450                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 451                         if (!ret) {
 452                                 ql_log(ql_log_warn, vha, 0x00e8,
 453                                     "Failed to create response queue.\n");
 454                                 goto fail3;
 455                         }
 456                 }
 457                 ha->flags.cpu_affinity_enabled = 1;
 458                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 459                     "CPU affinity mode enabled, "
 460                     "no. of response queues:%d no. of request queues:%d.\n",
 461                     ha->max_rsp_queues, ha->max_req_queues);
 462                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 463                     "CPU affinity mode enabled, "
 464                     "no. of response queues:%d no. of request queues:%d.\n",
 465                     ha->max_rsp_queues, ha->max_req_queues);
 466         }
 467         return 0;
 468
 469 fail3:
 470         qla25xx_delete_queues(vha);
 471         vha->req = ha->req_q_map[0];
 472 fail2:
 473         destroy_workqueue(ha->wq);
 474         ha->wq = NULL;
 475 fail:
 476         ha->mqenable = 0;
 477         kfree(ha->req_q_map);
 478         kfree(ha->rsp_q_map);
 479         ha->max_req_queues = ha->max_rsp_queues = 1;
 480         return 1;
 481 }
 482
 483 static char *
 484 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 485 {
 486         struct qla_hw_data *ha = vha->hw;
 487         static char *pci_bus_modes[] = {
 488                 "33", "66", "100", "133",
 489         };
 490         uint16_t pci_bus;
 491
 492         strcpy(str, "PCI");
 493         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 494         if (pci_bus) {
 495                 strcat(str, "-X (");
 496                 strcat(str, pci_bus_modes[pci_bus]);
 497         } else {
 498                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 499                 strcat(str, " (");
 500                 strcat(str, pci_bus_modes[pci_bus]);
 501         }
 502         strcat(str, " MHz)");
 503
 504         return (str);
 505 }
 506
 507 static char *
 508 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 509 {
 510         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 511         struct qla_hw_data *ha = vha->hw;
 512         uint32_t pci_bus;
 513
 514         if (pci_is_pcie(ha->pdev)) {
 515                 char lwstr[6];
 516                 uint32_t lstat, lspeed, lwidth;
 517
 518                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 519                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 520                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 521
 522                 strcpy(str, "PCIe (");
 523                 switch (lspeed) {
 524                 case 1:
 525                         strcat(str, "2.5GT/s ");
 526                         break;
 527                 case 2:
 528                         strcat(str, "5.0GT/s ");
 529                         break;
 530                 case 3:
 531                         strcat(str, "8.0GT/s ");
 532                         break;
 533                 default:
 534                         strcat(str, "<unknown> ");
 535                         break;
 536                 }
 537                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 538                 strcat(str, lwstr);
 539
 540                 return str;
 541         }
 542
 543         strcpy(str, "PCI");
 544         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 545         if (pci_bus == 0 || pci_bus == 8) {
 546                 strcat(str, " (");
 547                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 548         } else {
 549                 strcat(str, "-X ");
 550                 if (pci_bus & BIT_2)
 551                         strcat(str, "Mode 2");
 552                 else
 553                         strcat(str, "Mode 1");
 554                 strcat(str, " (");
 555                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 556         }
 557         strcat(str, " MHz)");
 558
 559         return str;
 560 }
 561
 562 static char *
 563 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 564 {
 565         char un_str[10];
 566         struct qla_hw_data *ha = vha->hw;
 567
 568         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 569             ha->fw_minor_version, ha->fw_subminor_version);
 570
 571         if (ha->fw_attributes & BIT_9) {
 572                 strcat(str, "FLX");
 573                 return (str);
 574         }
 575
 576         switch (ha->fw_attributes & 0xFF) {
 577         case 0x7:
 578                 strcat(str, "EF");
 579                 break;
 580         case 0x17:
 581                 strcat(str, "TP");
 582                 break;
 583         case 0x37:
 584                 strcat(str, "IP");
 585                 break;
 586         case 0x77:
 587                 strcat(str, "VI");
 588                 break;
 589         default:
 590                 sprintf(un_str, "(%x)", ha->fw_attributes);
 591                 strcat(str, un_str);
 592                 break;
 593         }
 594         if (ha->fw_attributes & 0x100)
 595                 strcat(str, "X");
 596
 597         return (str);
 598 }
 599
 600 static char *
 601 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 602 {
 603         struct qla_hw_data *ha = vha->hw;
 604
 605         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 606             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 607         return str;
 608 }
 609
 610 void
 611 qla2x00_sp_free_dma(void *vha, void *ptr)
 612 {
 613         srb_t *sp = (srb_t *)ptr;
 614         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 615         struct qla_hw_data *ha = sp->fcport->vha->hw;
 616         void *ctx = GET_CMD_CTX_SP(sp);
 617
 618         if (sp->flags & SRB_DMA_VALID) {
 619                 scsi_dma_unmap(cmd);
 620                 sp->flags &= ~SRB_DMA_VALID;
 621         }
 622
 623         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 624                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 625                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 626                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 627         }
 628
 629         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 630                 /* List assured to be having elements */
 631                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 632                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 633         }
 634
 635         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 636                 dma_pool_free(ha->dl_dma_pool, ctx,
 637                     ((struct crc_context *)ctx)->crc_ctx_dma);
 638                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 639         }
 640
 641         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 642                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 643
 644                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 645                         ctx1->fcp_cmnd_dma);
 646                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 647                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 648                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 649                 mempool_free(ctx1, ha->ctx_mempool);
 650                 ctx1 = NULL;
 651         }
 652
 653         CMD_SP(cmd) = NULL;
 654         qla2x00_rel_sp(sp->fcport->vha, sp);
 655 }
 656
 657 static void
 658 qla2x00_sp_compl(void *data, void *ptr, int res)
 659 {
 660         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 661         srb_t *sp = (srb_t *)ptr;
 662         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 663
 664         cmd->result = res;
 665
 666         if (atomic_read(&sp->ref_count) == 0) {
 667                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 668                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 669                     sp, GET_CMD_SP(sp));
 670                 if (ql2xextended_error_logging & ql_dbg_io)
 671                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 672                 return;
 673         }
 674         if (!atomic_dec_and_test(&sp->ref_count))
 675                 return;
 676
 677         qla2x00_sp_free_dma(ha, sp);
 678         cmd->scsi_done(cmd);
 679 }
 680
 681 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 682  * does not have the changes necessary to avoid taking host->host_lock.
 683  */
 684 static int
 685 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 686 {
 687         scsi_qla_host_t *vha = shost_priv(host);
 688         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 689         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 690         struct qla_hw_data *ha = vha->hw;
 691         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 692         srb_t *sp;
 693         int rval;
 694
 695         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 696                 cmd->result = DID_NO_CONNECT << 16;
 697                 goto qc24_fail_command;
 698         }
 699
 700         if (ha->flags.eeh_busy) {
 701                 if (ha->flags.pci_channel_io_perm_failure) {
 702                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 703                             "PCI Channel IO permanent failure, exiting "
 704                             "cmd=%p.\n", cmd);
 705                         cmd->result = DID_NO_CONNECT << 16;
 706                 } else {
 707                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 708                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 709                         cmd->result = DID_REQUEUE << 16;
 710                 }
 711                 goto qc24_fail_command;
 712         }
 713
 714         rval = fc_remote_port_chkready(rport);
 715         if (rval) {
 716                 cmd->result = rval;
 717                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 718                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 719                     cmd, rval);
 720                 goto qc24_fail_command;
 721         }
 722
 723         if (!vha->flags.difdix_supported &&
 724                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 725                         ql_dbg(ql_dbg_io, vha, 0x3004,
 726                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 727                             cmd);
 728                         cmd->result = DID_NO_CONNECT << 16;
 729                         goto qc24_fail_command;
 730         }
 731
 732         if (!fcport) {
 733                 cmd->result = DID_NO_CONNECT << 16;
 734                 goto qc24_fail_command;
 735         }
 736
 737         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 738                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 739                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 740                         ql_dbg(ql_dbg_io, vha, 0x3005,
 741                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 742                             atomic_read(&fcport->state),
 743                             atomic_read(&base_vha->loop_state));
 744                         cmd->result = DID_NO_CONNECT << 16;
 745                         goto qc24_fail_command;
 746                 }
 747                 goto qc24_target_busy;
 748         }
 749
 750         /*
 751          * Return target busy if we've received a non-zero retry_delay_timer
 752          * in a FCP_RSP.
 753          */
 754         if (fcport->retry_delay_timestamp == 0) {
 755                 /* retry delay not set */
 756         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 757                 fcport->retry_delay_timestamp = 0;
 758         else
 759                 goto qc24_target_busy;
 760
 761         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 762         if (!sp)
 763                 goto qc24_host_busy;
 764
 765         sp->u.scmd.cmd = cmd;
 766         sp->type = SRB_SCSI_CMD;
 767         atomic_set(&sp->ref_count, 1);
 768         CMD_SP(cmd) = (void *)sp;
 769         sp->free = qla2x00_sp_free_dma;
 770         sp->done = qla2x00_sp_compl;
 771
 772         rval = ha->isp_ops->start_scsi(sp);
 773         if (rval != QLA_SUCCESS) {
 774                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 775                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 776                 goto qc24_host_busy_free_sp;
 777         }
 778
 779         return 0;
 780
 781 qc24_host_busy_free_sp:
 782         qla2x00_sp_free_dma(ha, sp);
 783
 784 qc24_host_busy:
 785         return SCSI_MLQUEUE_HOST_BUSY;
 786
 787 qc24_target_busy:
 788         return SCSI_MLQUEUE_TARGET_BUSY;
 789
 790 qc24_fail_command:
 791         cmd->scsi_done(cmd);
 792
 793         return 0;
 794 }
 795
 796 /*
 797  * qla2x00_eh_wait_on_command
 798  *    Waits for the command to be returned by the Firmware for some
 799  *    max time.
 800  *
 801  * Input:
 802  *    cmd = Scsi Command to wait on.
 803  *
 804  * Return:
 805  *    Not Found : 0
 806  *    Found : 1
 807  */
 808 static int
 809 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 810 {
 811 #define ABORT_POLLING_PERIOD    1000
 812 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 813         unsigned long wait_iter = ABORT_WAIT_ITER;
 814         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 815         struct qla_hw_data *ha = vha->hw;
 816         int ret = QLA_SUCCESS;
 817
 818         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 819                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 820                     "Return:eh_wait.\n");
 821                 return ret;
 822         }
 823
 824         while (CMD_SP(cmd) && wait_iter--) {
 825                 msleep(ABORT_POLLING_PERIOD);
 826         }
 827         if (CMD_SP(cmd))
 828                 ret = QLA_FUNCTION_FAILED;
 829
 830         return ret;
 831 }
 832
 833 /*
 834  * qla2x00_wait_for_hba_online
 835  *    Wait till the HBA is online after going through
 836  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 837  *    finally HBA is disabled ie marked offline
 838  *
 839  * Input:
 840  *     ha - pointer to host adapter structure
 841  *
 842  * Note:
 843  *    Does context switching-Release SPIN_LOCK
 844  *    (if any) before calling this routine.
 845  *
 846  * Return:
 847  *    Success (Adapter is online) : 0
 848  *    Failed  (Adapter is offline/disabled) : 1
 849  */
 850 int
 851 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 852 {
 853         int             return_status;
 854         unsigned long   wait_online;
 855         struct qla_hw_data *ha = vha->hw;
 856         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 857
 858         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 859         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 860             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 861             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 862             ha->dpc_active) && time_before(jiffies, wait_online)) {
 863
 864                 msleep(1000);
 865         }
 866         if (base_vha->flags.online)
 867                 return_status = QLA_SUCCESS;
 868         else
 869                 return_status = QLA_FUNCTION_FAILED;
 870
 871         return (return_status);
 872 }
 873
 874 /*
 875  * qla2x00_wait_for_hba_ready
 876  * Wait till the HBA is ready before doing driver unload
 877  *
 878  * Input:
 879  *     ha - pointer to host adapter structure
 880  *
 881  * Note:
 882  *    Does context switching-Release SPIN_LOCK
 883  *    (if any) before calling this routine.
 884  *
 885  */
 886 static void
 887 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 888 {
 889         struct qla_hw_data *ha = vha->hw;
 890
 891         while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
 892             ha->flags.mbox_busy) ||
 893                 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 894                 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
 895                 msleep(1000);
 896 }
 897
 898 int
 899 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 900 {
 901         int             return_status;
 902         unsigned long   wait_reset;
 903         struct qla_hw_data *ha = vha->hw;
 904         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 905
 906         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 907         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 908             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 909             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 910             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 911
 912                 msleep(1000);
 913
 914                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 915                     ha->flags.chip_reset_done)
 916                         break;
 917         }
 918         if (ha->flags.chip_reset_done)
 919                 return_status = QLA_SUCCESS;
 920         else
 921                 return_status = QLA_FUNCTION_FAILED;
 922
 923         return return_status;
 924 }
 925
 926 static void
 927 sp_get(struct srb *sp)
 928 {
 929         atomic_inc(&sp->ref_count);
 930 }
 931
 932 /**************************************************************************
 933 * qla2xxx_eh_abort
 934 *
 935 * Description:
 936 *    The abort function will abort the specified command.
 937 *
 938 * Input:
 939 *    cmd = Linux SCSI command packet to be aborted.
 940 *
 941 * Returns:
 942 *    Either SUCCESS or FAILED.
 943 *
 944 * Note:
 945 *    Only return FAILED if command not returned by firmware.
 946 **************************************************************************/
 947 static int
 948 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 949 {
 950         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 951         srb_t *sp;
 952         int ret;
 953         unsigned int id;
 954         uint64_t lun;
 955         unsigned long flags;
 956         int rval, wait = 0;
 957         struct qla_hw_data *ha = vha->hw;
 958
 959         if (!CMD_SP(cmd))
 960                 return SUCCESS;
 961
 962         ret = fc_block_scsi_eh(cmd);
 963         if (ret != 0)
 964                 return ret;
 965         ret = SUCCESS;
 966
 967         id = cmd->device->id;
 968         lun = cmd->device->lun;
 969
 970         spin_lock_irqsave(&ha->hardware_lock, flags);
 971         sp = (srb_t *) CMD_SP(cmd);
 972         if (!sp) {
 973                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 974                 return SUCCESS;
 975         }
 976
 977         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 978             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
 979             vha->host_no, id, lun, sp, cmd, sp->handle);
 980
 981         /* Get a reference to the sp and drop the lock.*/
 982         sp_get(sp);
 983
 984         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 985         rval = ha->isp_ops->abort_command(sp);
 986         if (rval) {
 987                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
 988                         ret = SUCCESS;
 989                 else
 990                         ret = FAILED;
 991
 992                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 993                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
 994         } else {
 995                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 996                     "Abort command mbx success cmd=%p.\n", cmd);
 997                 wait = 1;
 998         }
 999
1000         spin_lock_irqsave(&ha->hardware_lock, flags);
1001         sp->done(ha, sp, 0);
1002         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1003
1004         /* Did the command return during mailbox execution? */
1005         if (ret == FAILED && !CMD_SP(cmd))
1006                 ret = SUCCESS;
1007
1008         /* Wait for the command to be returned. */
1009         if (wait) {
1010                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1011                         ql_log(ql_log_warn, vha, 0x8006,
1012                             "Abort handler timed out cmd=%p.\n", cmd);
1013                         ret = FAILED;
1014                 }
1015         }
1016
1017         ql_log(ql_log_info, vha, 0x801c,
1018             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1019             vha->host_no, id, lun, wait, ret);
1020
1021         return ret;
1022 }
1023
1024 int
1025 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1026         uint64_t l, enum nexus_wait_type type)
1027 {
1028         int cnt, match, status;
1029         unsigned long flags;
1030         struct qla_hw_data *ha = vha->hw;
1031         struct req_que *req;
1032         srb_t *sp;
1033         struct scsi_cmnd *cmd;
1034
1035         status = QLA_SUCCESS;
1036
1037         spin_lock_irqsave(&ha->hardware_lock, flags);
1038         req = vha->req;
1039         for (cnt = 1; status == QLA_SUCCESS &&
1040                 cnt < req->num_outstanding_cmds; cnt++) {
1041                 sp = req->outstanding_cmds[cnt];
1042                 if (!sp)
1043                         continue;
1044                 if (sp->type != SRB_SCSI_CMD)
1045                         continue;
1046                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1047                         continue;
1048                 match = 0;
1049                 cmd = GET_CMD_SP(sp);
1050                 switch (type) {
1051                 case WAIT_HOST:
1052                         match = 1;
1053                         break;
1054                 case WAIT_TARGET:
1055                         match = cmd->device->id == t;
1056                         break;
1057                 case WAIT_LUN:
1058                         match = (cmd->device->id == t &&
1059                                 cmd->device->lun == l);
1060                         break;
1061                 }
1062                 if (!match)
1063                         continue;
1064
1065                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1066                 status = qla2x00_eh_wait_on_command(cmd);
1067                 spin_lock_irqsave(&ha->hardware_lock, flags);
1068         }
1069         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1070
1071         return status;
1072 }
1073
1074 static char *reset_errors[] = {
1075         "HBA not online",
1076         "HBA not ready",
1077         "Task management failed",
1078         "Waiting for command completions",
1079 };
1080
1081 static int
1082 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1083     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1084 {
1085         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1086         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1087         int err;
1088
1089         if (!fcport) {
1090                 return FAILED;
1091         }
1092
1093         err = fc_block_scsi_eh(cmd);
1094         if (err != 0)
1095                 return err;
1096
1097         ql_log(ql_log_info, vha, 0x8009,
1098             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1099             cmd->device->id, cmd->device->lun, cmd);
1100
1101         err = 0;
1102         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1103                 ql_log(ql_log_warn, vha, 0x800a,
1104                     "Wait for hba online failed for cmd=%p.\n", cmd);
1105                 goto eh_reset_failed;
1106         }
1107         err = 2;
1108         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1109                 != QLA_SUCCESS) {
1110                 ql_log(ql_log_warn, vha, 0x800c,
1111                     "do_reset failed for cmd=%p.\n", cmd);
1112                 goto eh_reset_failed;
1113         }
1114         err = 3;
1115         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1116             cmd->device->lun, type) != QLA_SUCCESS) {
1117                 ql_log(ql_log_warn, vha, 0x800d,
1118                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1119                 goto eh_reset_failed;
1120         }
1121
1122         ql_log(ql_log_info, vha, 0x800e,
1123             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1124             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1125
1126         return SUCCESS;
1127
1128 eh_reset_failed:
1129         ql_log(ql_log_info, vha, 0x800f,
1130             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1131             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1132             cmd);
1133         return FAILED;
1134 }
1135
1136 static int
1137 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1138 {
1139         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1140         struct qla_hw_data *ha = vha->hw;
1141
1142         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1143             ha->isp_ops->lun_reset);
1144 }
1145
1146 static int
1147 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1148 {
1149         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1150         struct qla_hw_data *ha = vha->hw;
1151
1152         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1153             ha->isp_ops->target_reset);
1154 }
1155
1156 /**************************************************************************
1157 * qla2xxx_eh_bus_reset
1158 *
1159 * Description:
1160 *    The bus reset function will reset the bus and abort any executing
1161 *    commands.
1162 *
1163 * Input:
1164 *    cmd = Linux SCSI command packet of the command that cause the
1165 *          bus reset.
1166 *
1167 * Returns:
1168 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1169 *
1170 **************************************************************************/
1171 static int
1172 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1173 {
1174         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1175         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1176         int ret = FAILED;
1177         unsigned int id;
1178         uint64_t lun;
1179
1180         id = cmd->device->id;
1181         lun = cmd->device->lun;
1182
1183         if (!fcport) {
1184                 return ret;
1185         }
1186
1187         ret = fc_block_scsi_eh(cmd);
1188         if (ret != 0)
1189                 return ret;
1190         ret = FAILED;
1191
1192         ql_log(ql_log_info, vha, 0x8012,
1193             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1194
1195         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1196                 ql_log(ql_log_fatal, vha, 0x8013,
1197                     "Wait for hba online failed board disabled.\n");
1198                 goto eh_bus_reset_done;
1199         }
1200
1201         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1202                 ret = SUCCESS;
1203
1204         if (ret == FAILED)
1205                 goto eh_bus_reset_done;
1206
1207         /* Flush outstanding commands. */
1208         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1209             QLA_SUCCESS) {
1210                 ql_log(ql_log_warn, vha, 0x8014,
1211                     "Wait for pending commands failed.\n");
1212                 ret = FAILED;
1213         }
1214
1215 eh_bus_reset_done:
1216         ql_log(ql_log_warn, vha, 0x802b,
1217             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1218             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1219
1220         return ret;
1221 }
1222
1223 /**************************************************************************
1224 * qla2xxx_eh_host_reset
1225 *
1226 * Description:
1227 *    The reset function will reset the Adapter.
1228 *
1229 * Input:
1230 *      cmd = Linux SCSI command packet of the command that cause the
1231 *            adapter reset.
1232 *
1233 * Returns:
1234 *      Either SUCCESS or FAILED.
1235 *
1236 * Note:
1237 **************************************************************************/
1238 static int
1239 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1240 {
1241         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1242         struct qla_hw_data *ha = vha->hw;
1243         int ret = FAILED;
1244         unsigned int id;
1245         uint64_t lun;
1246         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1247
1248         id = cmd->device->id;
1249         lun = cmd->device->lun;
1250
1251         ql_log(ql_log_info, vha, 0x8018,
1252             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1253
1254         /*
1255          * No point in issuing another reset if one is active.  Also do not
1256          * attempt a reset if we are updating flash.
1257          */
1258         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1259                 goto eh_host_reset_lock;
1260
1261         if (vha != base_vha) {
1262                 if (qla2x00_vp_abort_isp(vha))
1263                         goto eh_host_reset_lock;
1264         } else {
1265                 if (IS_P3P_TYPE(vha->hw)) {
1266                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1267                                 /* Ctx reset success */
1268                                 ret = SUCCESS;
1269                                 goto eh_host_reset_lock;
1270                         }
1271                         /* fall thru if ctx reset failed */
1272                 }
1273                 if (ha->wq)
1274                         flush_workqueue(ha->wq);
1275
1276                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1277                 if (ha->isp_ops->abort_isp(base_vha)) {
1278                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1279                         /* failed. schedule dpc to try */
1280                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1281
1282                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1283                                 ql_log(ql_log_warn, vha, 0x802a,
1284                                     "wait for hba online failed.\n");
1285                                 goto eh_host_reset_lock;
1286                         }
1287                 }
1288                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1289         }
1290
1291         /* Waiting for command to be returned to OS.*/
1292         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1293                 QLA_SUCCESS)
1294                 ret = SUCCESS;
1295
1296 eh_host_reset_lock:
1297         ql_log(ql_log_info, vha, 0x8017,
1298             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1299             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1300
1301         return ret;
1302 }
1303
1304 /*
1305 * qla2x00_loop_reset
1306 *      Issue loop reset.
1307 *
1308 * Input:
1309 *      ha = adapter block pointer.
1310 *
1311 * Returns:
1312 *      0 = success
1313 */
1314 int
1315 qla2x00_loop_reset(scsi_qla_host_t *vha)
1316 {
1317         int ret;
1318         struct fc_port *fcport;
1319         struct qla_hw_data *ha = vha->hw;
1320
1321         if (IS_QLAFX00(ha)) {
1322                 return qlafx00_loop_reset(vha);
1323         }
1324
1325         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1326                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1327                         if (fcport->port_type != FCT_TARGET)
1328                                 continue;
1329
1330                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1331                         if (ret != QLA_SUCCESS) {
1332                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1333                                     "Bus Reset failed: Reset=%d "
1334                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1335                         }
1336                 }
1337         }
1338
1339
1340         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1341                 atomic_set(&vha->loop_state, LOOP_DOWN);
1342                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1343                 qla2x00_mark_all_devices_lost(vha, 0);
1344                 ret = qla2x00_full_login_lip(vha);
1345                 if (ret != QLA_SUCCESS) {
1346                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1347                             "full_login_lip=%d.\n", ret);
1348                 }
1349         }
1350
1351         if (ha->flags.enable_lip_reset) {
1352                 ret = qla2x00_lip_reset(vha);
1353                 if (ret != QLA_SUCCESS)
1354                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1355                             "lip_reset failed (%d).\n", ret);
1356         }
1357
1358         /* Issue marker command only when we are going to start the I/O */
1359         vha->marker_needed = 1;
1360
1361         return QLA_SUCCESS;
1362 }
1363
1364 void
1365 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1366 {
1367         int que, cnt;
1368         unsigned long flags;
1369         srb_t *sp;
1370         struct qla_hw_data *ha = vha->hw;
1371         struct req_que *req;
1372
1373         qlt_host_reset_handler(ha);
1374
1375         spin_lock_irqsave(&ha->hardware_lock, flags);
1376         for (que = 0; que < ha->max_req_queues; que++) {
1377                 req = ha->req_q_map[que];
1378                 if (!req)
1379                         continue;
1380                 if (!req->outstanding_cmds)
1381                         continue;
1382                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1383                         sp = req->outstanding_cmds[cnt];
1384                         if (sp) {
1385                                 req->outstanding_cmds[cnt] = NULL;
1386                                 sp->done(vha, sp, res);
1387                         }
1388                 }
1389         }
1390         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1391 }
1392
1393 static int
1394 qla2xxx_slave_alloc(struct scsi_device *sdev)
1395 {
1396         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1397
1398         if (!rport || fc_remote_port_chkready(rport))
1399                 return -ENXIO;
1400
1401         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1402
1403         return 0;
1404 }
1405
1406 static int
1407 qla2xxx_slave_configure(struct scsi_device *sdev)
1408 {
1409         scsi_qla_host_t *vha = shost_priv(sdev->host);
1410         struct req_que *req = vha->req;
1411
1412         if (IS_T10_PI_CAPABLE(vha->hw))
1413                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1414
1415         scsi_change_queue_depth(sdev, req->max_q_depth);
1416         return 0;
1417 }
1418
1419 static void
1420 qla2xxx_slave_destroy(struct scsi_device *sdev)
1421 {
1422         sdev->hostdata = NULL;
1423 }
1424
1425 /**
1426  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1427  * @ha: HA context
1428  *
1429  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1430  * supported addressing method.
1431  */
1432 static void
1433 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1434 {
1435         /* Assume a 32bit DMA mask. */
1436         ha->flags.enable_64bit_addressing = 0;
1437
1438         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1439                 /* Any upper-dword bits set? */
1440                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1441                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1442                         /* Ok, a 64bit DMA mask is applicable. */
1443                         ha->flags.enable_64bit_addressing = 1;
1444                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1445                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1446                         return;
1447                 }
1448         }
1449
1450         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1451         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1452 }
1453
1454 static void
1455 qla2x00_enable_intrs(struct qla_hw_data *ha)
1456 {
1457         unsigned long flags = 0;
1458         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1459
1460         spin_lock_irqsave(&ha->hardware_lock, flags);
1461         ha->interrupts_on = 1;
1462         /* enable risc and host interrupts */
1463         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1464         RD_REG_WORD(&reg->ictrl);
1465         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1466
1467 }
1468
1469 static void
1470 qla2x00_disable_intrs(struct qla_hw_data *ha)
1471 {
1472         unsigned long flags = 0;
1473         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1474
1475         spin_lock_irqsave(&ha->hardware_lock, flags);
1476         ha->interrupts_on = 0;
1477         /* disable risc and host interrupts */
1478         WRT_REG_WORD(&reg->ictrl, 0);
1479         RD_REG_WORD(&reg->ictrl);
1480         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1481 }
1482
1483 static void
1484 qla24xx_enable_intrs(struct qla_hw_data *ha)
1485 {
1486         unsigned long flags = 0;
1487         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1488
1489         spin_lock_irqsave(&ha->hardware_lock, flags);
1490         ha->interrupts_on = 1;
1491         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1492         RD_REG_DWORD(&reg->ictrl);
1493         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1494 }
1495
1496 static void
1497 qla24xx_disable_intrs(struct qla_hw_data *ha)
1498 {
1499         unsigned long flags = 0;
1500         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1501
1502         if (IS_NOPOLLING_TYPE(ha))
1503                 return;
1504         spin_lock_irqsave(&ha->hardware_lock, flags);
1505         ha->interrupts_on = 0;
1506         WRT_REG_DWORD(&reg->ictrl, 0);
1507         RD_REG_DWORD(&reg->ictrl);
1508         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1509 }
1510
1511 static int
1512 qla2x00_iospace_config(struct qla_hw_data *ha)
1513 {
1514         resource_size_t pio;
1515         uint16_t msix;
1516         int cpus;
1517
1518         if (pci_request_selected_regions(ha->pdev, ha->bars,
1519             QLA2XXX_DRIVER_NAME)) {
1520                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1521                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1522                     pci_name(ha->pdev));
1523                 goto iospace_error_exit;
1524         }
1525         if (!(ha->bars & 1))
1526                 goto skip_pio;
1527
1528         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1529         pio = pci_resource_start(ha->pdev, 0);
1530         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1531                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1532                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1533                             "Invalid pci I/O region size (%s).\n",
1534                             pci_name(ha->pdev));
1535                         pio = 0;
1536                 }
1537         } else {
1538                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1539                     "Region #0 no a PIO resource (%s).\n",
1540                     pci_name(ha->pdev));
1541                 pio = 0;
1542         }
1543         ha->pio_address = pio;
1544         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1545             "PIO address=%llu.\n",
1546             (unsigned long long)ha->pio_address);
1547
1548 skip_pio:
1549         /* Use MMIO operations for all accesses. */
1550         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1551                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1552                     "Region #1 not an MMIO resource (%s), aborting.\n",
1553                     pci_name(ha->pdev));
1554                 goto iospace_error_exit;
1555         }
1556         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1557                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1558                     "Invalid PCI mem region size (%s), aborting.\n",
1559                     pci_name(ha->pdev));
1560                 goto iospace_error_exit;
1561         }
1562
1563         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1564         if (!ha->iobase) {
1565                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1566                     "Cannot remap MMIO (%s), aborting.\n",
1567                     pci_name(ha->pdev));
1568                 goto iospace_error_exit;
1569         }
1570
1571         /* Determine queue resources */
1572         ha->max_req_queues = ha->max_rsp_queues = 1;
1573         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1574                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1575                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1576                 goto mqiobase_exit;
1577
1578         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1579                         pci_resource_len(ha->pdev, 3));
1580         if (ha->mqiobase) {
1581                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1582                     "MQIO Base=%p.\n", ha->mqiobase);
1583                 /* Read MSIX vector size of the board */
1584                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1585                 ha->msix_count = msix;
1586                 /* Max queues are bounded by available msix vectors */
1587                 /* queue 0 uses two msix vectors */
1588                 if (ql2xmultique_tag) {
1589                         cpus = num_online_cpus();
1590                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1591                                 (cpus + 1) : (ha->msix_count - 1);
1592                         ha->max_req_queues = 2;
1593                 } else if (ql2xmaxqueues > 1) {
1594                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1595                             QLA_MQ_SIZE : ql2xmaxqueues;
1596                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1597                             "QoS mode set, max no of request queues:%d.\n",
1598                             ha->max_req_queues);
1599                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1600                             "QoS mode set, max no of request queues:%d.\n",
1601                             ha->max_req_queues);
1602                 }
1603                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1604                     "MSI-X vector count: %d.\n", msix);
1605         } else
1606                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1607                     "BAR 3 not enabled.\n");
1608
1609 mqiobase_exit:
1610         ha->msix_count = ha->max_rsp_queues + 1;
1611         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1612             "MSIX Count:%d.\n", ha->msix_count);
1613         return (0);
1614
1615 iospace_error_exit:
1616         return (-ENOMEM);
1617 }
1618
1619
1620 static int
1621 qla83xx_iospace_config(struct qla_hw_data *ha)
1622 {
1623         uint16_t msix;
1624         int cpus;
1625
1626         if (pci_request_selected_regions(ha->pdev, ha->bars,
1627             QLA2XXX_DRIVER_NAME)) {
1628                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1629                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1630                     pci_name(ha->pdev));
1631
1632                 goto iospace_error_exit;
1633         }
1634
1635         /* Use MMIO operations for all accesses. */
1636         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1637                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1638                     "Invalid pci I/O region size (%s).\n",
1639                     pci_name(ha->pdev));
1640                 goto iospace_error_exit;
1641         }
1642         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1643                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1644                     "Invalid PCI mem region size (%s), aborting\n",
1645                         pci_name(ha->pdev));
1646                 goto iospace_error_exit;
1647         }
1648
1649         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1650         if (!ha->iobase) {
1651                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1652                     "Cannot remap MMIO (%s), aborting.\n",
1653                     pci_name(ha->pdev));
1654                 goto iospace_error_exit;
1655         }
1656
1657         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1658         /* 83XX 26XX always use MQ type access for queues
1659          * - mbar 2, a.k.a region 4 */
1660         ha->max_req_queues = ha->max_rsp_queues = 1;
1661         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1662                         pci_resource_len(ha->pdev, 4));
1663
1664         if (!ha->mqiobase) {
1665                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1666                     "BAR2/region4 not enabled\n");
1667                 goto mqiobase_exit;
1668         }
1669
1670         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1671                         pci_resource_len(ha->pdev, 2));
1672         if (ha->msixbase) {
1673                 /* Read MSIX vector size of the board */
1674                 pci_read_config_word(ha->pdev,
1675                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1676                 ha->msix_count = msix;
1677                 /* Max queues are bounded by available msix vectors */
1678                 /* queue 0 uses two msix vectors */
1679                 if (ql2xmultique_tag) {
1680                         cpus = num_online_cpus();
1681                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1682                                 (cpus + 1) : (ha->msix_count - 1);
1683                         ha->max_req_queues = 2;
1684                 } else if (ql2xmaxqueues > 1) {
1685                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1686                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1687                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1688                             "QoS mode set, max no of request queues:%d.\n",
1689                             ha->max_req_queues);
1690                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1691                             "QoS mode set, max no of request queues:%d.\n",
1692                             ha->max_req_queues);
1693                 }
1694                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1695                     "MSI-X vector count: %d.\n", msix);
1696         } else
1697                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1698                     "BAR 1 not enabled.\n");
1699
1700 mqiobase_exit:
1701         ha->msix_count = ha->max_rsp_queues + 1;
1702
1703         qlt_83xx_iospace_config(ha);
1704
1705         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1706             "MSIX Count:%d.\n", ha->msix_count);
1707         return 0;
1708
1709 iospace_error_exit:
1710         return -ENOMEM;
1711 }
1712
1713 static struct isp_operations qla2100_isp_ops = {
1714         .pci_config             = qla2100_pci_config,
1715         .reset_chip             = qla2x00_reset_chip,
1716         .chip_diag              = qla2x00_chip_diag,
1717         .config_rings           = qla2x00_config_rings,
1718         .reset_adapter          = qla2x00_reset_adapter,
1719         .nvram_config           = qla2x00_nvram_config,
1720         .update_fw_options      = qla2x00_update_fw_options,
1721         .load_risc              = qla2x00_load_risc,
1722         .pci_info_str           = qla2x00_pci_info_str,
1723         .fw_version_str         = qla2x00_fw_version_str,
1724         .intr_handler           = qla2100_intr_handler,
1725         .enable_intrs           = qla2x00_enable_intrs,
1726         .disable_intrs          = qla2x00_disable_intrs,
1727         .abort_command          = qla2x00_abort_command,
1728         .target_reset           = qla2x00_abort_target,
1729         .lun_reset              = qla2x00_lun_reset,
1730         .fabric_login           = qla2x00_login_fabric,
1731         .fabric_logout          = qla2x00_fabric_logout,
1732         .calc_req_entries       = qla2x00_calc_iocbs_32,
1733         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1734         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1735         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1736         .read_nvram             = qla2x00_read_nvram_data,
1737         .write_nvram            = qla2x00_write_nvram_data,
1738         .fw_dump                = qla2100_fw_dump,
1739         .beacon_on              = NULL,
1740         .beacon_off             = NULL,
1741         .beacon_blink           = NULL,
1742         .read_optrom            = qla2x00_read_optrom_data,
1743         .write_optrom           = qla2x00_write_optrom_data,
1744         .get_flash_version      = qla2x00_get_flash_version,
1745         .start_scsi             = qla2x00_start_scsi,
1746         .abort_isp              = qla2x00_abort_isp,
1747         .iospace_config         = qla2x00_iospace_config,
1748         .initialize_adapter     = qla2x00_initialize_adapter,
1749 };
1750
1751 static struct isp_operations qla2300_isp_ops = {
1752         .pci_config             = qla2300_pci_config,
1753         .reset_chip             = qla2x00_reset_chip,
1754         .chip_diag              = qla2x00_chip_diag,
1755         .config_rings           = qla2x00_config_rings,
1756         .reset_adapter          = qla2x00_reset_adapter,
1757         .nvram_config           = qla2x00_nvram_config,
1758         .update_fw_options      = qla2x00_update_fw_options,
1759         .load_risc              = qla2x00_load_risc,
1760         .pci_info_str           = qla2x00_pci_info_str,
1761         .fw_version_str         = qla2x00_fw_version_str,
1762         .intr_handler           = qla2300_intr_handler,
1763         .enable_intrs           = qla2x00_enable_intrs,
1764         .disable_intrs          = qla2x00_disable_intrs,
1765         .abort_command          = qla2x00_abort_command,
1766         .target_reset           = qla2x00_abort_target,
1767         .lun_reset              = qla2x00_lun_reset,
1768         .fabric_login           = qla2x00_login_fabric,
1769         .fabric_logout          = qla2x00_fabric_logout,
1770         .calc_req_entries       = qla2x00_calc_iocbs_32,
1771         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1772         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1773         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1774         .read_nvram             = qla2x00_read_nvram_data,
1775         .write_nvram            = qla2x00_write_nvram_data,
1776         .fw_dump                = qla2300_fw_dump,
1777         .beacon_on              = qla2x00_beacon_on,
1778         .beacon_off             = qla2x00_beacon_off,
1779         .beacon_blink           = qla2x00_beacon_blink,
1780         .read_optrom            = qla2x00_read_optrom_data,
1781         .write_optrom           = qla2x00_write_optrom_data,
1782         .get_flash_version      = qla2x00_get_flash_version,
1783         .start_scsi             = qla2x00_start_scsi,
1784         .abort_isp              = qla2x00_abort_isp,
1785         .iospace_config         = qla2x00_iospace_config,
1786         .initialize_adapter     = qla2x00_initialize_adapter,
1787 };
1788
1789 static struct isp_operations qla24xx_isp_ops = {
1790         .pci_config             = qla24xx_pci_config,
1791         .reset_chip             = qla24xx_reset_chip,
1792         .chip_diag              = qla24xx_chip_diag,
1793         .config_rings           = qla24xx_config_rings,
1794         .reset_adapter          = qla24xx_reset_adapter,
1795         .nvram_config           = qla24xx_nvram_config,
1796         .update_fw_options      = qla24xx_update_fw_options,
1797         .load_risc              = qla24xx_load_risc,
1798         .pci_info_str           = qla24xx_pci_info_str,
1799         .fw_version_str         = qla24xx_fw_version_str,
1800         .intr_handler           = qla24xx_intr_handler,
1801         .enable_intrs           = qla24xx_enable_intrs,
1802         .disable_intrs          = qla24xx_disable_intrs,
1803         .abort_command          = qla24xx_abort_command,
1804         .target_reset           = qla24xx_abort_target,
1805         .lun_reset              = qla24xx_lun_reset,
1806         .fabric_login           = qla24xx_login_fabric,
1807         .fabric_logout          = qla24xx_fabric_logout,
1808         .calc_req_entries       = NULL,
1809         .build_iocbs            = NULL,
1810         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1811         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1812         .read_nvram             = qla24xx_read_nvram_data,
1813         .write_nvram            = qla24xx_write_nvram_data,
1814         .fw_dump                = qla24xx_fw_dump,
1815         .beacon_on              = qla24xx_beacon_on,
1816         .beacon_off             = qla24xx_beacon_off,
1817         .beacon_blink           = qla24xx_beacon_blink,
1818         .read_optrom            = qla24xx_read_optrom_data,
1819         .write_optrom           = qla24xx_write_optrom_data,
1820         .get_flash_version      = qla24xx_get_flash_version,
1821         .start_scsi             = qla24xx_start_scsi,
1822         .abort_isp              = qla2x00_abort_isp,
1823         .iospace_config         = qla2x00_iospace_config,
1824         .initialize_adapter     = qla2x00_initialize_adapter,
1825 };
1826
1827 static struct isp_operations qla25xx_isp_ops = {
1828         .pci_config             = qla25xx_pci_config,
1829         .reset_chip             = qla24xx_reset_chip,
1830         .chip_diag              = qla24xx_chip_diag,
1831         .config_rings           = qla24xx_config_rings,
1832         .reset_adapter          = qla24xx_reset_adapter,
1833         .nvram_config           = qla24xx_nvram_config,
1834         .update_fw_options      = qla24xx_update_fw_options,
1835         .load_risc              = qla24xx_load_risc,
1836         .pci_info_str           = qla24xx_pci_info_str,
1837         .fw_version_str         = qla24xx_fw_version_str,
1838         .intr_handler           = qla24xx_intr_handler,
1839         .enable_intrs           = qla24xx_enable_intrs,
1840         .disable_intrs          = qla24xx_disable_intrs,
1841         .abort_command          = qla24xx_abort_command,
1842         .target_reset           = qla24xx_abort_target,
1843         .lun_reset              = qla24xx_lun_reset,
1844         .fabric_login           = qla24xx_login_fabric,
1845         .fabric_logout          = qla24xx_fabric_logout,
1846         .calc_req_entries       = NULL,
1847         .build_iocbs            = NULL,
1848         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1849         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1850         .read_nvram             = qla25xx_read_nvram_data,
1851         .write_nvram            = qla25xx_write_nvram_data,
1852         .fw_dump                = qla25xx_fw_dump,
1853         .beacon_on              = qla24xx_beacon_on,
1854         .beacon_off             = qla24xx_beacon_off,
1855         .beacon_blink           = qla24xx_beacon_blink,
1856         .read_optrom            = qla25xx_read_optrom_data,
1857         .write_optrom           = qla24xx_write_optrom_data,
1858         .get_flash_version      = qla24xx_get_flash_version,
1859         .start_scsi             = qla24xx_dif_start_scsi,
1860         .abort_isp              = qla2x00_abort_isp,
1861         .iospace_config         = qla2x00_iospace_config,
1862         .initialize_adapter     = qla2x00_initialize_adapter,
1863 };
1864
1865 static struct isp_operations qla81xx_isp_ops = {
1866         .pci_config             = qla25xx_pci_config,
1867         .reset_chip             = qla24xx_reset_chip,
1868         .chip_diag              = qla24xx_chip_diag,
1869         .config_rings           = qla24xx_config_rings,
1870         .reset_adapter          = qla24xx_reset_adapter,
1871         .nvram_config           = qla81xx_nvram_config,
1872         .update_fw_options      = qla81xx_update_fw_options,
1873         .load_risc              = qla81xx_load_risc,
1874         .pci_info_str           = qla24xx_pci_info_str,
1875         .fw_version_str         = qla24xx_fw_version_str,
1876         .intr_handler           = qla24xx_intr_handler,
1877         .enable_intrs           = qla24xx_enable_intrs,
1878         .disable_intrs          = qla24xx_disable_intrs,
1879         .abort_command          = qla24xx_abort_command,
1880         .target_reset           = qla24xx_abort_target,
1881         .lun_reset              = qla24xx_lun_reset,
1882         .fabric_login           = qla24xx_login_fabric,
1883         .fabric_logout          = qla24xx_fabric_logout,
1884         .calc_req_entries       = NULL,
1885         .build_iocbs            = NULL,
1886         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1887         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1888         .read_nvram             = NULL,
1889         .write_nvram            = NULL,
1890         .fw_dump                = qla81xx_fw_dump,
1891         .beacon_on              = qla24xx_beacon_on,
1892         .beacon_off             = qla24xx_beacon_off,
1893         .beacon_blink           = qla83xx_beacon_blink,
1894         .read_optrom            = qla25xx_read_optrom_data,
1895         .write_optrom           = qla24xx_write_optrom_data,
1896         .get_flash_version      = qla24xx_get_flash_version,
1897         .start_scsi             = qla24xx_dif_start_scsi,
1898         .abort_isp              = qla2x00_abort_isp,
1899         .iospace_config         = qla2x00_iospace_config,
1900         .initialize_adapter     = qla2x00_initialize_adapter,
1901 };
1902
1903 static struct isp_operations qla82xx_isp_ops = {
1904         .pci_config             = qla82xx_pci_config,
1905         .reset_chip             = qla82xx_reset_chip,
1906         .chip_diag              = qla24xx_chip_diag,
1907         .config_rings           = qla82xx_config_rings,
1908         .reset_adapter          = qla24xx_reset_adapter,
1909         .nvram_config           = qla81xx_nvram_config,
1910         .update_fw_options      = qla24xx_update_fw_options,
1911         .load_risc              = qla82xx_load_risc,
1912         .pci_info_str           = qla24xx_pci_info_str,
1913         .fw_version_str         = qla24xx_fw_version_str,
1914         .intr_handler           = qla82xx_intr_handler,
1915         .enable_intrs           = qla82xx_enable_intrs,
1916         .disable_intrs          = qla82xx_disable_intrs,
1917         .abort_command          = qla24xx_abort_command,
1918         .target_reset           = qla24xx_abort_target,
1919         .lun_reset              = qla24xx_lun_reset,
1920         .fabric_login           = qla24xx_login_fabric,
1921         .fabric_logout          = qla24xx_fabric_logout,
1922         .calc_req_entries       = NULL,
1923         .build_iocbs            = NULL,
1924         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1925         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1926         .read_nvram             = qla24xx_read_nvram_data,
1927         .write_nvram            = qla24xx_write_nvram_data,
1928         .fw_dump                = qla82xx_fw_dump,
1929         .beacon_on              = qla82xx_beacon_on,
1930         .beacon_off             = qla82xx_beacon_off,
1931         .beacon_blink           = NULL,
1932         .read_optrom            = qla82xx_read_optrom_data,
1933         .write_optrom           = qla82xx_write_optrom_data,
1934         .get_flash_version      = qla82xx_get_flash_version,
1935         .start_scsi             = qla82xx_start_scsi,
1936         .abort_isp              = qla82xx_abort_isp,
1937         .iospace_config         = qla82xx_iospace_config,
1938         .initialize_adapter     = qla2x00_initialize_adapter,
1939 };
1940
1941 static struct isp_operations qla8044_isp_ops = {
1942         .pci_config             = qla82xx_pci_config,
1943         .reset_chip             = qla82xx_reset_chip,
1944         .chip_diag              = qla24xx_chip_diag,
1945         .config_rings           = qla82xx_config_rings,
1946         .reset_adapter          = qla24xx_reset_adapter,
1947         .nvram_config           = qla81xx_nvram_config,
1948         .update_fw_options      = qla24xx_update_fw_options,
1949         .load_risc              = qla82xx_load_risc,
1950         .pci_info_str           = qla24xx_pci_info_str,
1951         .fw_version_str         = qla24xx_fw_version_str,
1952         .intr_handler           = qla8044_intr_handler,
1953         .enable_intrs           = qla82xx_enable_intrs,
1954         .disable_intrs          = qla82xx_disable_intrs,
1955         .abort_command          = qla24xx_abort_command,
1956         .target_reset           = qla24xx_abort_target,
1957         .lun_reset              = qla24xx_lun_reset,
1958         .fabric_login           = qla24xx_login_fabric,
1959         .fabric_logout          = qla24xx_fabric_logout,
1960         .calc_req_entries       = NULL,
1961         .build_iocbs            = NULL,
1962         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1963         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1964         .read_nvram             = NULL,
1965         .write_nvram            = NULL,
1966         .fw_dump                = qla8044_fw_dump,
1967         .beacon_on              = qla82xx_beacon_on,
1968         .beacon_off             = qla82xx_beacon_off,
1969         .beacon_blink           = NULL,
1970         .read_optrom            = qla8044_read_optrom_data,
1971         .write_optrom           = qla8044_write_optrom_data,
1972         .get_flash_version      = qla82xx_get_flash_version,
1973         .start_scsi             = qla82xx_start_scsi,
1974         .abort_isp              = qla8044_abort_isp,
1975         .iospace_config         = qla82xx_iospace_config,
1976         .initialize_adapter     = qla2x00_initialize_adapter,
1977 };
1978
1979 static struct isp_operations qla83xx_isp_ops = {
1980         .pci_config             = qla25xx_pci_config,
1981         .reset_chip             = qla24xx_reset_chip,
1982         .chip_diag              = qla24xx_chip_diag,
1983         .config_rings           = qla24xx_config_rings,
1984         .reset_adapter          = qla24xx_reset_adapter,
1985         .nvram_config           = qla81xx_nvram_config,
1986         .update_fw_options      = qla81xx_update_fw_options,
1987         .load_risc              = qla81xx_load_risc,
1988         .pci_info_str           = qla24xx_pci_info_str,
1989         .fw_version_str         = qla24xx_fw_version_str,
1990         .intr_handler           = qla24xx_intr_handler,
1991         .enable_intrs           = qla24xx_enable_intrs,
1992         .disable_intrs          = qla24xx_disable_intrs,
1993         .abort_command          = qla24xx_abort_command,
1994         .target_reset           = qla24xx_abort_target,
1995         .lun_reset              = qla24xx_lun_reset,
1996         .fabric_login           = qla24xx_login_fabric,
1997         .fabric_logout          = qla24xx_fabric_logout,
1998         .calc_req_entries       = NULL,
1999         .build_iocbs            = NULL,
2000         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2001         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2002         .read_nvram             = NULL,
2003         .write_nvram            = NULL,
2004         .fw_dump                = qla83xx_fw_dump,
2005         .beacon_on              = qla24xx_beacon_on,
2006         .beacon_off             = qla24xx_beacon_off,
2007         .beacon_blink           = qla83xx_beacon_blink,
2008         .read_optrom            = qla25xx_read_optrom_data,
2009         .write_optrom           = qla24xx_write_optrom_data,
2010         .get_flash_version      = qla24xx_get_flash_version,
2011         .start_scsi             = qla24xx_dif_start_scsi,
2012         .abort_isp              = qla2x00_abort_isp,
2013         .iospace_config         = qla83xx_iospace_config,
2014         .initialize_adapter     = qla2x00_initialize_adapter,
2015 };
2016
2017 static struct isp_operations qlafx00_isp_ops = {
2018         .pci_config             = qlafx00_pci_config,
2019         .reset_chip             = qlafx00_soft_reset,
2020         .chip_diag              = qlafx00_chip_diag,
2021         .config_rings           = qlafx00_config_rings,
2022         .reset_adapter          = qlafx00_soft_reset,
2023         .nvram_config           = NULL,
2024         .update_fw_options      = NULL,
2025         .load_risc              = NULL,
2026         .pci_info_str           = qlafx00_pci_info_str,
2027         .fw_version_str         = qlafx00_fw_version_str,
2028         .intr_handler           = qlafx00_intr_handler,
2029         .enable_intrs           = qlafx00_enable_intrs,
2030         .disable_intrs          = qlafx00_disable_intrs,
2031         .abort_command          = qla24xx_async_abort_command,
2032         .target_reset           = qlafx00_abort_target,
2033         .lun_reset              = qlafx00_lun_reset,
2034         .fabric_login           = NULL,
2035         .fabric_logout          = NULL,
2036         .calc_req_entries       = NULL,
2037         .build_iocbs            = NULL,
2038         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2039         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2040         .read_nvram             = qla24xx_read_nvram_data,
2041         .write_nvram            = qla24xx_write_nvram_data,
2042         .fw_dump                = NULL,
2043         .beacon_on              = qla24xx_beacon_on,
2044         .beacon_off             = qla24xx_beacon_off,
2045         .beacon_blink           = NULL,
2046         .read_optrom            = qla24xx_read_optrom_data,
2047         .write_optrom           = qla24xx_write_optrom_data,
2048         .get_flash_version      = qla24xx_get_flash_version,
2049         .start_scsi             = qlafx00_start_scsi,
2050         .abort_isp              = qlafx00_abort_isp,
2051         .iospace_config         = qlafx00_iospace_config,
2052         .initialize_adapter     = qlafx00_initialize_adapter,
2053 };
2054
2055 static struct isp_operations qla27xx_isp_ops = {
2056         .pci_config             = qla25xx_pci_config,
2057         .reset_chip             = qla24xx_reset_chip,
2058         .chip_diag              = qla24xx_chip_diag,
2059         .config_rings           = qla24xx_config_rings,
2060         .reset_adapter          = qla24xx_reset_adapter,
2061         .nvram_config           = qla81xx_nvram_config,
2062         .update_fw_options      = qla81xx_update_fw_options,
2063         .load_risc              = qla81xx_load_risc,
2064         .pci_info_str           = qla24xx_pci_info_str,
2065         .fw_version_str         = qla24xx_fw_version_str,
2066         .intr_handler           = qla24xx_intr_handler,
2067         .enable_intrs           = qla24xx_enable_intrs,
2068         .disable_intrs          = qla24xx_disable_intrs,
2069         .abort_command          = qla24xx_abort_command,
2070         .target_reset           = qla24xx_abort_target,
2071         .lun_reset              = qla24xx_lun_reset,
2072         .fabric_login           = qla24xx_login_fabric,
2073         .fabric_logout          = qla24xx_fabric_logout,
2074         .calc_req_entries       = NULL,
2075         .build_iocbs            = NULL,
2076         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2077         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2078         .read_nvram             = NULL,
2079         .write_nvram            = NULL,
2080         .fw_dump                = qla27xx_fwdump,
2081         .beacon_on              = qla24xx_beacon_on,
2082         .beacon_off             = qla24xx_beacon_off,
2083         .beacon_blink           = qla83xx_beacon_blink,
2084         .read_optrom            = qla25xx_read_optrom_data,
2085         .write_optrom           = qla24xx_write_optrom_data,
2086         .get_flash_version      = qla24xx_get_flash_version,
2087         .start_scsi             = qla24xx_dif_start_scsi,
2088         .abort_isp              = qla2x00_abort_isp,
2089         .iospace_config         = qla83xx_iospace_config,
2090         .initialize_adapter     = qla2x00_initialize_adapter,
2091 };
2092
2093 static inline void
2094 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2095 {
2096         ha->device_type = DT_EXTENDED_IDS;
2097         switch (ha->pdev->device) {
2098         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2099                 ha->device_type |= DT_ISP2100;
2100                 ha->device_type &= ~DT_EXTENDED_IDS;
2101                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2102                 break;
2103         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2104                 ha->device_type |= DT_ISP2200;
2105                 ha->device_type &= ~DT_EXTENDED_IDS;
2106                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2107                 break;
2108         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2109                 ha->device_type |= DT_ISP2300;
2110                 ha->device_type |= DT_ZIO_SUPPORTED;
2111                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2112                 break;
2113         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2114                 ha->device_type |= DT_ISP2312;
2115                 ha->device_type |= DT_ZIO_SUPPORTED;
2116                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2117                 break;
2118         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2119                 ha->device_type |= DT_ISP2322;
2120                 ha->device_type |= DT_ZIO_SUPPORTED;
2121                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2122                     ha->pdev->subsystem_device == 0x0170)
2123                         ha->device_type |= DT_OEM_001;
2124                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2125                 break;
2126         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2127                 ha->device_type |= DT_ISP6312;
2128                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2129                 break;
2130         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2131                 ha->device_type |= DT_ISP6322;
2132                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2133                 break;
2134         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2135                 ha->device_type |= DT_ISP2422;
2136                 ha->device_type |= DT_ZIO_SUPPORTED;
2137                 ha->device_type |= DT_FWI2;
2138                 ha->device_type |= DT_IIDMA;
2139                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2140                 break;
2141         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2142                 ha->device_type |= DT_ISP2432;
2143                 ha->device_type |= DT_ZIO_SUPPORTED;
2144                 ha->device_type |= DT_FWI2;
2145                 ha->device_type |= DT_IIDMA;
2146                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2147                 break;
2148         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2149                 ha->device_type |= DT_ISP8432;
2150                 ha->device_type |= DT_ZIO_SUPPORTED;
2151                 ha->device_type |= DT_FWI2;
2152                 ha->device_type |= DT_IIDMA;
2153                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2154                 break;
2155         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2156                 ha->device_type |= DT_ISP5422;
2157                 ha->device_type |= DT_FWI2;
2158                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2159                 break;
2160         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2161                 ha->device_type |= DT_ISP5432;
2162                 ha->device_type |= DT_FWI2;
2163                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2164                 break;
2165         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2166                 ha->device_type |= DT_ISP2532;
2167                 ha->device_type |= DT_ZIO_SUPPORTED;
2168                 ha->device_type |= DT_FWI2;
2169                 ha->device_type |= DT_IIDMA;
2170                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2171                 break;
2172         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2173                 ha->device_type |= DT_ISP8001;
2174                 ha->device_type |= DT_ZIO_SUPPORTED;
2175                 ha->device_type |= DT_FWI2;
2176                 ha->device_type |= DT_IIDMA;
2177                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2178                 break;
2179         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2180                 ha->device_type |= DT_ISP8021;
2181                 ha->device_type |= DT_ZIO_SUPPORTED;
2182                 ha->device_type |= DT_FWI2;
2183                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2184                 /* Initialize 82XX ISP flags */
2185                 qla82xx_init_flags(ha);
2186                 break;
2187          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2188                 ha->device_type |= DT_ISP8044;
2189                 ha->device_type |= DT_ZIO_SUPPORTED;
2190                 ha->device_type |= DT_FWI2;
2191                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2192                 /* Initialize 82XX ISP flags */
2193                 qla82xx_init_flags(ha);
2194                 break;
2195         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2196                 ha->device_type |= DT_ISP2031;
2197                 ha->device_type |= DT_ZIO_SUPPORTED;
2198                 ha->device_type |= DT_FWI2;
2199                 ha->device_type |= DT_IIDMA;
2200                 ha->device_type |= DT_T10_PI;
2201                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2202                 break;
2203         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2204                 ha->device_type |= DT_ISP8031;
2205                 ha->device_type |= DT_ZIO_SUPPORTED;
2206                 ha->device_type |= DT_FWI2;
2207                 ha->device_type |= DT_IIDMA;
2208                 ha->device_type |= DT_T10_PI;
2209                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2210                 break;
2211         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2212                 ha->device_type |= DT_ISPFX00;
2213                 break;
2214         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2215                 ha->device_type |= DT_ISP2071;
2216                 ha->device_type |= DT_ZIO_SUPPORTED;
2217                 ha->device_type |= DT_FWI2;
2218                 ha->device_type |= DT_IIDMA;
2219                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2220                 break;
2221         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2222                 ha->device_type |= DT_ISP2271;
2223                 ha->device_type |= DT_ZIO_SUPPORTED;
2224                 ha->device_type |= DT_FWI2;
2225                 ha->device_type |= DT_IIDMA;
2226                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2227                 break;
2228         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2229                 ha->device_type |= DT_ISP2261;
2230                 ha->device_type |= DT_ZIO_SUPPORTED;
2231                 ha->device_type |= DT_FWI2;
2232                 ha->device_type |= DT_IIDMA;
2233                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2234                 break;
2235         }
2236
2237         if (IS_QLA82XX(ha))
2238                 ha->port_no = ha->portnum & 1;
2239         else {
2240                 /* Get adapter physical port no from interrupt pin register. */
2241                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2242                 if (IS_QLA27XX(ha))
2243                         ha->port_no--;
2244                 else
2245                         ha->port_no = !(ha->port_no & 1);
2246         }
2247
2248         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2249             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2250             ha->device_type, ha->port_no, ha->fw_srisc_address);
2251 }
2252
2253 static void
2254 qla2xxx_scan_start(struct Scsi_Host *shost)
2255 {
2256         scsi_qla_host_t *vha = shost_priv(shost);
2257
2258         if (vha->hw->flags.running_gold_fw)
2259                 return;
2260
2261         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2262         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2263         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2264         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2265 }
2266
2267 static int
2268 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2269 {
2270         scsi_qla_host_t *vha = shost_priv(shost);
2271
2272         if (test_bit(UNLOADING, &vha->dpc_flags))
2273                 return 1;
2274         if (!vha->host)
2275                 return 1;
2276         if (time > vha->hw->loop_reset_delay * HZ)
2277                 return 1;
2278
2279         return atomic_read(&vha->loop_state) == LOOP_READY;
2280 }
2281
2282 /*
2283  * PCI driver interface
2284  */
2285 static int
2286 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2287 {
2288         int     ret = -ENODEV;
2289         struct Scsi_Host *host;
2290         scsi_qla_host_t *base_vha = NULL;
2291         struct qla_hw_data *ha;
2292         char pci_info[30];
2293         char fw_str[30], wq_name[30];
2294         struct scsi_host_template *sht;
2295         int bars, mem_only = 0;
2296         uint16_t req_length = 0, rsp_length = 0;
2297         struct req_que *req = NULL;
2298         struct rsp_que *rsp = NULL;
2299         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2300         sht = &qla2xxx_driver_template;
2301         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2302             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2303             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2304             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2305             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2306             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2307             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2308             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2309             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2310             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2311             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2312             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2313             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2314             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2315             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2316                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2317                 mem_only = 1;
2318                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2319                     "Mem only adapter.\n");
2320         }
2321         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2322             "Bars=%d.\n", bars);
2323
2324         if (mem_only) {
2325                 if (pci_enable_device_mem(pdev))
2326                         return ret;
2327         } else {
2328                 if (pci_enable_device(pdev))
2329                         return ret;
2330         }
2331
2332         /* This may fail but that's ok */
2333         pci_enable_pcie_error_reporting(pdev);
2334
2335         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2336         if (!ha) {
2337                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2338                     "Unable to allocate memory for ha.\n");
2339                 goto disable_device;
2340         }
2341         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2342             "Memory allocated for ha=%p.\n", ha);
2343         ha->pdev = pdev;
2344         ha->tgt.enable_class_2 = ql2xenableclass2;
2345         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2346         spin_lock_init(&ha->tgt.q_full_lock);
2347
2348         /* Clear our data area */
2349         ha->bars = bars;
2350         ha->mem_only = mem_only;
2351         spin_lock_init(&ha->hardware_lock);
2352         spin_lock_init(&ha->vport_slock);
2353         mutex_init(&ha->selflogin_lock);
2354         mutex_init(&ha->optrom_mutex);
2355
2356         /* Set ISP-type information. */
2357         qla2x00_set_isp_flags(ha);
2358
2359         /* Set EEH reset type to fundamental if required by hba */
2360         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2361             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2362                 pdev->needs_freset = 1;
2363
2364         ha->prev_topology = 0;
2365         ha->init_cb_size = sizeof(init_cb_t);
2366         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2367         ha->optrom_size = OPTROM_SIZE_2300;
2368
2369         /* Assign ISP specific operations. */
2370         if (IS_QLA2100(ha)) {
2371                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2372                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2373                 req_length = REQUEST_ENTRY_CNT_2100;
2374                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2375                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2376                 ha->gid_list_info_size = 4;
2377                 ha->flash_conf_off = ~0;
2378                 ha->flash_data_off = ~0;
2379                 ha->nvram_conf_off = ~0;
2380                 ha->nvram_data_off = ~0;
2381                 ha->isp_ops = &qla2100_isp_ops;
2382         } else if (IS_QLA2200(ha)) {
2383                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2384                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2385                 req_length = REQUEST_ENTRY_CNT_2200;
2386                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2387                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2388                 ha->gid_list_info_size = 4;
2389                 ha->flash_conf_off = ~0;
2390                 ha->flash_data_off = ~0;
2391                 ha->nvram_conf_off = ~0;
2392                 ha->nvram_data_off = ~0;
2393                 ha->isp_ops = &qla2100_isp_ops;
2394         } else if (IS_QLA23XX(ha)) {
2395                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2396                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2397                 req_length = REQUEST_ENTRY_CNT_2200;
2398                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2399                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2400                 ha->gid_list_info_size = 6;
2401                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2402                         ha->optrom_size = OPTROM_SIZE_2322;
2403                 ha->flash_conf_off = ~0;
2404                 ha->flash_data_off = ~0;
2405                 ha->nvram_conf_off = ~0;
2406                 ha->nvram_data_off = ~0;
2407                 ha->isp_ops = &qla2300_isp_ops;
2408         } else if (IS_QLA24XX_TYPE(ha)) {
2409                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2410                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2411                 req_length = REQUEST_ENTRY_CNT_24XX;
2412                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2413                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2414                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2415                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2416                 ha->gid_list_info_size = 8;
2417                 ha->optrom_size = OPTROM_SIZE_24XX;
2418                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2419                 ha->isp_ops = &qla24xx_isp_ops;
2420                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2421                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2422                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2423                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2424         } else if (IS_QLA25XX(ha)) {
2425                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2426                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2427                 req_length = REQUEST_ENTRY_CNT_24XX;
2428                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2429                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2430                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2431                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2432                 ha->gid_list_info_size = 8;
2433                 ha->optrom_size = OPTROM_SIZE_25XX;
2434                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2435                 ha->isp_ops = &qla25xx_isp_ops;
2436                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2437                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2438                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2439                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2440         } else if (IS_QLA81XX(ha)) {
2441                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2442                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2443                 req_length = REQUEST_ENTRY_CNT_24XX;
2444                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2445                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2446                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2447                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2448                 ha->gid_list_info_size = 8;
2449                 ha->optrom_size = OPTROM_SIZE_81XX;
2450                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2451                 ha->isp_ops = &qla81xx_isp_ops;
2452                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2453                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2454                 ha->nvram_conf_off = ~0;
2455                 ha->nvram_data_off = ~0;
2456         } else if (IS_QLA82XX(ha)) {
2457                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2458                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2459                 req_length = REQUEST_ENTRY_CNT_82XX;
2460                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2461                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2462                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2463                 ha->gid_list_info_size = 8;
2464                 ha->optrom_size = OPTROM_SIZE_82XX;
2465                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2466                 ha->isp_ops = &qla82xx_isp_ops;
2467                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2468                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2469                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2470                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2471         } else if (IS_QLA8044(ha)) {
2472                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2473                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2474                 req_length = REQUEST_ENTRY_CNT_82XX;
2475                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2476                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2477                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2478                 ha->gid_list_info_size = 8;
2479                 ha->optrom_size = OPTROM_SIZE_83XX;
2480                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2481                 ha->isp_ops = &qla8044_isp_ops;
2482                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2483                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2484                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2485                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2486         } else if (IS_QLA83XX(ha)) {
2487                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2488                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2489                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2490                 req_length = REQUEST_ENTRY_CNT_83XX;
2491                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2492                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2493                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2494                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2495                 ha->gid_list_info_size = 8;
2496                 ha->optrom_size = OPTROM_SIZE_83XX;
2497                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2498                 ha->isp_ops = &qla83xx_isp_ops;
2499                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2500                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2501                 ha->nvram_conf_off = ~0;
2502                 ha->nvram_data_off = ~0;
2503         }  else if (IS_QLAFX00(ha)) {
2504                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2505                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2506                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2507                 req_length = REQUEST_ENTRY_CNT_FX00;
2508                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2509                 ha->isp_ops = &qlafx00_isp_ops;
2510                 ha->port_down_retry_count = 30; /* default value */
2511                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2512                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2513                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2514                 ha->mr.fw_hbt_en = 1;
2515                 ha->mr.host_info_resend = false;
2516                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2517         } else if (IS_QLA27XX(ha)) {
2518                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2519                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2520                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2521                 req_length = REQUEST_ENTRY_CNT_24XX;
2522                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2523                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2524                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2525                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2526                 ha->gid_list_info_size = 8;
2527                 ha->optrom_size = OPTROM_SIZE_83XX;
2528                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2529                 ha->isp_ops = &qla27xx_isp_ops;
2530                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2531                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2532                 ha->nvram_conf_off = ~0;
2533                 ha->nvram_data_off = ~0;
2534         }
2535
2536         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2537             "mbx_count=%d, req_length=%d, "
2538             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2539             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2540             "max_fibre_devices=%d.\n",
2541             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2542             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2543             ha->nvram_npiv_size, ha->max_fibre_devices);
2544         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2545             "isp_ops=%p, flash_conf_off=%d, "
2546             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2547             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2548             ha->nvram_conf_off, ha->nvram_data_off);
2549
2550         /* Configure PCI I/O space */
2551         ret = ha->isp_ops->iospace_config(ha);
2552         if (ret)
2553                 goto iospace_config_failed;
2554
2555         ql_log_pci(ql_log_info, pdev, 0x001d,
2556             "Found an ISP%04X irq %d iobase 0x%p.\n",
2557             pdev->device, pdev->irq, ha->iobase);
2558         mutex_init(&ha->vport_lock);
2559         init_completion(&ha->mbx_cmd_comp);
2560         complete(&ha->mbx_cmd_comp);
2561         init_completion(&ha->mbx_intr_comp);
2562         init_completion(&ha->dcbx_comp);
2563         init_completion(&ha->lb_portup_comp);
2564
2565         set_bit(0, (unsigned long *) ha->vp_idx_map);
2566
2567         qla2x00_config_dma_addressing(ha);
2568         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2569             "64 Bit addressing is %s.\n",
2570             ha->flags.enable_64bit_addressing ? "enable" :
2571             "disable");
2572         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2573         if (ret) {
2574                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2575                     "Failed to allocate memory for adapter, aborting.\n");
2576
2577                 goto probe_hw_failed;
2578         }
2579
2580         req->max_q_depth = MAX_Q_DEPTH;
2581         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2582                 req->max_q_depth = ql2xmaxqdepth;
2583
2584
2585         base_vha = qla2x00_create_host(sht, ha);
2586         if (!base_vha) {
2587                 ret = -ENOMEM;
2588                 qla2x00_mem_free(ha);
2589                 qla2x00_free_req_que(ha, req);
2590                 qla2x00_free_rsp_que(ha, rsp);
2591                 goto probe_hw_failed;
2592         }
2593
2594         pci_set_drvdata(pdev, base_vha);
2595         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2596
2597         host = base_vha->host;
2598         base_vha->req = req;
2599         if (IS_QLA2XXX_MIDTYPE(ha))
2600                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2601         else
2602                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2603                                                 base_vha->vp_idx;
2604
2605         /* Setup fcport template structure. */
2606         ha->mr.fcport.vha = base_vha;
2607         ha->mr.fcport.port_type = FCT_UNKNOWN;
2608         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2609         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2610         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2611         ha->mr.fcport.scan_state = 1;
2612
2613         /* Set the SG table size based on ISP type */
2614         if (!IS_FWI2_CAPABLE(ha)) {
2615                 if (IS_QLA2100(ha))
2616                         host->sg_tablesize = 32;
2617         } else {
2618                 if (!IS_QLA82XX(ha))
2619                         host->sg_tablesize = QLA_SG_ALL;
2620         }
2621         host->max_id = ha->max_fibre_devices;
2622         host->cmd_per_lun = 3;
2623         host->unique_id = host->host_no;
2624         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2625                 host->max_cmd_len = 32;
2626         else
2627                 host->max_cmd_len = MAX_CMDSZ;
2628         host->max_channel = MAX_BUSES - 1;
2629         /* Older HBAs support only 16-bit LUNs */
2630         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2631             ql2xmaxlun > 0xffff)
2632                 host->max_lun = 0xffff;
2633         else
2634                 host->max_lun = ql2xmaxlun;
2635         host->transportt = qla2xxx_transport_template;
2636         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2637
2638         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2639             "max_id=%d this_id=%d "
2640             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2641             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2642             host->this_id, host->cmd_per_lun, host->unique_id,
2643             host->max_cmd_len, host->max_channel, host->max_lun,
2644             host->transportt, sht->vendor_id);
2645
2646 que_init:
2647         /* Alloc arrays of request and response ring ptrs */
2648         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2649                 ql_log(ql_log_fatal, base_vha, 0x003d,
2650                     "Failed to allocate memory for queue pointers..."
2651                     "aborting.\n");
2652                 goto probe_init_failed;
2653         }
2654
2655         qlt_probe_one_stage1(base_vha, ha);
2656
2657         /* Set up the irqs */
2658         ret = qla2x00_request_irqs(ha, rsp);
2659         if (ret)
2660                 goto probe_init_failed;
2661
2662         pci_save_state(pdev);
2663
2664         /* Assign back pointers */
2665         rsp->req = req;
2666         req->rsp = rsp;
2667
2668         if (IS_QLAFX00(ha)) {
2669                 ha->rsp_q_map[0] = rsp;
2670                 ha->req_q_map[0] = req;
2671                 set_bit(0, ha->req_qid_map);
2672                 set_bit(0, ha->rsp_qid_map);
2673         }
2674
2675         /* FWI2-capable only. */
2676         req->req_q_in = &ha->iobase->isp24.req_q_in;
2677         req->req_q_out = &ha->iobase->isp24.req_q_out;
2678         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2679         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2680         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2681                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2682                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2683                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2684                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2685         }
2686
2687         if (IS_QLAFX00(ha)) {
2688                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2689                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2690                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2691                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2692         }
2693
2694         if (IS_P3P_TYPE(ha)) {
2695                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2696                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2697                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2698         }
2699
2700         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2701             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2702             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2703         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2704             "req->req_q_in=%p req->req_q_out=%p "
2705             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2706             req->req_q_in, req->req_q_out,
2707             rsp->rsp_q_in, rsp->rsp_q_out);
2708         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2709             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2710             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2711         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2712             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2713             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2714
2715         if (ha->isp_ops->initialize_adapter(base_vha)) {
2716                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2717                     "Failed to initialize adapter - Adapter flags %x.\n",
2718                     base_vha->device_flags);
2719
2720                 if (IS_QLA82XX(ha)) {
2721                         qla82xx_idc_lock(ha);
2722                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2723                                 QLA8XXX_DEV_FAILED);
2724                         qla82xx_idc_unlock(ha);
2725                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2726                             "HW State: FAILED.\n");
2727                 } else if (IS_QLA8044(ha)) {
2728                         qla8044_idc_lock(ha);
2729                         qla8044_wr_direct(base_vha,
2730                                 QLA8044_CRB_DEV_STATE_INDEX,
2731                                 QLA8XXX_DEV_FAILED);
2732                         qla8044_idc_unlock(ha);
2733                         ql_log(ql_log_fatal, base_vha, 0x0150,
2734                             "HW State: FAILED.\n");
2735                 }
2736
2737                 ret = -ENODEV;
2738                 goto probe_failed;
2739         }
2740
2741         if (IS_QLAFX00(ha))
2742                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2743         else
2744                 host->can_queue = req->num_outstanding_cmds - 10;
2745
2746         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2747             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2748             host->can_queue, base_vha->req,
2749             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2750
2751         if (ha->mqenable) {
2752                 if (qla25xx_setup_mode(base_vha)) {
2753                         ql_log(ql_log_warn, base_vha, 0x00ec,
2754                             "Failed to create queues, falling back to single queue mode.\n");
2755                         goto que_init;
2756                 }
2757         }
2758
2759         if (ha->flags.running_gold_fw)
2760                 goto skip_dpc;
2761
2762         /*
2763          * Startup the kernel thread for this host adapter
2764          */
2765         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2766             "%s_dpc", base_vha->host_str);
2767         if (IS_ERR(ha->dpc_thread)) {
2768                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2769                     "Failed to start DPC thread.\n");
2770                 ret = PTR_ERR(ha->dpc_thread);
2771                 goto probe_failed;
2772         }
2773         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2774             "DPC thread started successfully.\n");
2775
2776         /*
2777          * If we're not coming up in initiator mode, we might sit for
2778          * a while without waking up the dpc thread, which leads to a
2779          * stuck process warning.  So just kick the dpc once here and
2780          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2781          */
2782         qla2xxx_wake_dpc(base_vha);
2783
2784         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2785
2786         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2787                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2788                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2789                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2790
2791                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2792                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2793                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2794                 INIT_WORK(&ha->idc_state_handler,
2795                     qla83xx_idc_state_handler_work);
2796                 INIT_WORK(&ha->nic_core_unrecoverable,
2797                     qla83xx_nic_core_unrecoverable_work);
2798         }
2799
2800 skip_dpc:
2801         list_add_tail(&base_vha->list, &ha->vp_list);
2802         base_vha->host->irq = ha->pdev->irq;
2803
2804         /* Initialized the timer */
2805         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2806         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2807             "Started qla2x00_timer with "
2808             "interval=%d.\n", WATCH_INTERVAL);
2809         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2810             "Detected hba at address=%p.\n",
2811             ha);
2812
2813         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2814                 if (ha->fw_attributes & BIT_4) {
2815                         int prot = 0, guard;
2816                         base_vha->flags.difdix_supported = 1;
2817                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2818                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2819                         if (ql2xenabledif == 1)
2820                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2821                         scsi_host_set_prot(host,
2822                             prot | SHOST_DIF_TYPE1_PROTECTION
2823                             | SHOST_DIF_TYPE2_PROTECTION
2824                             | SHOST_DIF_TYPE3_PROTECTION
2825                             | SHOST_DIX_TYPE1_PROTECTION
2826                             | SHOST_DIX_TYPE2_PROTECTION
2827                             | SHOST_DIX_TYPE3_PROTECTION);
2828
2829                         guard = SHOST_DIX_GUARD_CRC;
2830
2831                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2832                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2833                                 guard |= SHOST_DIX_GUARD_IP;
2834
2835                         scsi_host_set_guard(host, guard);
2836                 } else
2837                         base_vha->flags.difdix_supported = 0;
2838         }
2839
2840         ha->isp_ops->enable_intrs(ha);
2841
2842         if (IS_QLAFX00(ha)) {
2843                 ret = qlafx00_fx_disc(base_vha,
2844                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2845                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2846                     QLA_SG_ALL : 128;
2847         }
2848
2849         ret = scsi_add_host(host, &pdev->dev);
2850         if (ret)
2851                 goto probe_failed;
2852
2853         base_vha->flags.init_done = 1;
2854         base_vha->flags.online = 1;
2855         ha->prev_minidump_failed = 0;
2856
2857         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2858             "Init done and hba is online.\n");
2859
2860         if (qla_ini_mode_enabled(base_vha))
2861                 scsi_scan_host(host);
2862         else
2863                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2864                         "skipping scsi_scan_host() for non-initiator port\n");
2865
2866         qla2x00_alloc_sysfs_attr(base_vha);
2867
2868         if (IS_QLAFX00(ha)) {
2869                 ret = qlafx00_fx_disc(base_vha,
2870                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2871
2872                 /* Register system information */
2873                 ret =  qlafx00_fx_disc(base_vha,
2874                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2875         }
2876
2877         qla2x00_init_host_attr(base_vha);
2878
2879         qla2x00_dfs_setup(base_vha);
2880
2881         ql_log(ql_log_info, base_vha, 0x00fb,
2882             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2883         ql_log(ql_log_info, base_vha, 0x00fc,
2884             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2885             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2886             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2887             base_vha->host_no,
2888             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2889
2890         qlt_add_target(ha, base_vha);
2891
2892         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2893         return 0;
2894
2895 probe_init_failed:
2896         qla2x00_free_req_que(ha, req);
2897         ha->req_q_map[0] = NULL;
2898         clear_bit(0, ha->req_qid_map);
2899         qla2x00_free_rsp_que(ha, rsp);
2900         ha->rsp_q_map[0] = NULL;
2901         clear_bit(0, ha->rsp_qid_map);
2902         ha->max_req_queues = ha->max_rsp_queues = 0;
2903
2904 probe_failed:
2905         if (base_vha->timer_active)
2906                 qla2x00_stop_timer(base_vha);
2907         base_vha->flags.online = 0;
2908         if (ha->dpc_thread) {
2909                 struct task_struct *t = ha->dpc_thread;
2910
2911                 ha->dpc_thread = NULL;
2912                 kthread_stop(t);
2913         }
2914
2915         qla2x00_free_device(base_vha);
2916
2917         scsi_host_put(base_vha->host);
2918
2919 probe_hw_failed:
2920         qla2x00_clear_drv_active(ha);
2921
2922 iospace_config_failed:
2923         if (IS_P3P_TYPE(ha)) {
2924                 if (!ha->nx_pcibase)
2925                         iounmap((device_reg_t *)ha->nx_pcibase);
2926                 if (!ql2xdbwr)
2927                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2928         } else {
2929                 if (ha->iobase)
2930                         iounmap(ha->iobase);
2931                 if (ha->cregbase)
2932                         iounmap(ha->cregbase);
2933         }
2934         pci_release_selected_regions(ha->pdev, ha->bars);
2935         kfree(ha);
2936         ha = NULL;
2937
2938 disable_device:
2939         pci_disable_device(pdev);
2940         return ret;
2941 }
2942
2943 static void
2944 qla2x00_shutdown(struct pci_dev *pdev)
2945 {
2946         scsi_qla_host_t *vha;
2947         struct qla_hw_data  *ha;
2948
2949         if (!atomic_read(&pdev->enable_cnt))
2950                 return;
2951
2952         vha = pci_get_drvdata(pdev);
2953         ha = vha->hw;
2954
2955         /* Notify ISPFX00 firmware */
2956         if (IS_QLAFX00(ha))
2957                 qlafx00_driver_shutdown(vha, 20);
2958
2959         /* Turn-off FCE trace */
2960         if (ha->flags.fce_enabled) {
2961                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2962                 ha->flags.fce_enabled = 0;
2963         }
2964
2965         /* Turn-off EFT trace */
2966         if (ha->eft)
2967                 qla2x00_disable_eft_trace(vha);
2968
2969         /* Stop currently executing firmware. */
2970         qla2x00_try_to_stop_firmware(vha);
2971
2972         /* Disable timer */
2973         if (vha->timer_active)
2974                 qla2x00_stop_timer(vha);
2975
2976         /* Turn adapter off line */
2977         vha->flags.online = 0;
2978
2979         /* turn-off interrupts on the card */
2980         if (ha->interrupts_on) {
2981                 vha->flags.init_done = 0;
2982                 ha->isp_ops->disable_intrs(ha);
2983         }
2984
2985         qla2x00_free_irqs(vha);
2986
2987         qla2x00_free_fw_dump(ha);
2988
2989         pci_disable_pcie_error_reporting(pdev);
2990         pci_disable_device(pdev);
2991 }
2992
2993 /* Deletes all the virtual ports for a given ha */
2994 static void
2995 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
2996 {
2997         scsi_qla_host_t *vha;
2998         unsigned long flags;
2999
3000         mutex_lock(&ha->vport_lock);
3001         while (ha->cur_vport_count) {
3002                 spin_lock_irqsave(&ha->vport_slock, flags);
3003
3004                 BUG_ON(base_vha->list.next == &ha->vp_list);
3005                 /* This assumes first entry in ha->vp_list is always base vha */
3006                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3007                 scsi_host_get(vha->host);
3008
3009                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3010                 mutex_unlock(&ha->vport_lock);
3011
3012                 fc_vport_terminate(vha->fc_vport);
3013                 scsi_host_put(vha->host);
3014
3015                 mutex_lock(&ha->vport_lock);
3016         }
3017         mutex_unlock(&ha->vport_lock);
3018 }
3019
3020 /* Stops all deferred work threads */
3021 static void
3022 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3023 {
3024         /* Flush the work queue and remove it */
3025         if (ha->wq) {
3026                 flush_workqueue(ha->wq);
3027                 destroy_workqueue(ha->wq);
3028                 ha->wq = NULL;
3029         }
3030
3031         /* Cancel all work and destroy DPC workqueues */
3032         if (ha->dpc_lp_wq) {
3033                 cancel_work_sync(&ha->idc_aen);
3034                 destroy_workqueue(ha->dpc_lp_wq);
3035                 ha->dpc_lp_wq = NULL;
3036         }
3037
3038         if (ha->dpc_hp_wq) {
3039                 cancel_work_sync(&ha->nic_core_reset);
3040                 cancel_work_sync(&ha->idc_state_handler);
3041                 cancel_work_sync(&ha->nic_core_unrecoverable);
3042                 destroy_workqueue(ha->dpc_hp_wq);
3043                 ha->dpc_hp_wq = NULL;
3044         }
3045
3046         /* Kill the kernel thread for this host */
3047         if (ha->dpc_thread) {
3048                 struct task_struct *t = ha->dpc_thread;
3049
3050                 /*
3051                  * qla2xxx_wake_dpc checks for ->dpc_thread
3052                  * so we need to zero it out.
3053                  */
3054                 ha->dpc_thread = NULL;
3055                 kthread_stop(t);
3056         }
3057 }
3058
3059 static void
3060 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3061 {
3062         if (IS_QLA82XX(ha)) {
3063
3064                 iounmap((device_reg_t *)ha->nx_pcibase);
3065                 if (!ql2xdbwr)
3066                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3067         } else {
3068                 if (ha->iobase)
3069                         iounmap(ha->iobase);
3070
3071                 if (ha->cregbase)
3072                         iounmap(ha->cregbase);
3073
3074                 if (ha->mqiobase)
3075                         iounmap(ha->mqiobase);
3076
3077                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3078                         iounmap(ha->msixbase);
3079         }
3080 }
3081
3082 static void
3083 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3084 {
3085         if (IS_QLA8044(ha)) {
3086                 qla8044_idc_lock(ha);
3087                 qla8044_clear_drv_active(ha);
3088                 qla8044_idc_unlock(ha);
3089         } else if (IS_QLA82XX(ha)) {
3090                 qla82xx_idc_lock(ha);
3091                 qla82xx_clear_drv_active(ha);
3092                 qla82xx_idc_unlock(ha);
3093         }
3094 }
3095
3096 static void
3097 qla2x00_remove_one(struct pci_dev *pdev)
3098 {
3099         scsi_qla_host_t *base_vha;
3100         struct qla_hw_data  *ha;
3101
3102         base_vha = pci_get_drvdata(pdev);
3103         ha = base_vha->hw;
3104
3105         /* Indicate device removal to prevent future board_disable and wait
3106          * until any pending board_disable has completed. */
3107         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3108         cancel_work_sync(&ha->board_disable);
3109
3110         /*
3111          * If the PCI device is disabled then there was a PCI-disconnect and
3112          * qla2x00_disable_board_on_pci_error has taken care of most of the
3113          * resources.
3114          */
3115         if (!atomic_read(&pdev->enable_cnt)) {
3116                 scsi_host_put(base_vha->host);
3117                 kfree(ha);
3118                 pci_set_drvdata(pdev, NULL);
3119                 return;
3120         }
3121
3122         qla2x00_wait_for_hba_ready(base_vha);
3123
3124         set_bit(UNLOADING, &base_vha->dpc_flags);
3125
3126         if (IS_QLAFX00(ha))
3127                 qlafx00_driver_shutdown(base_vha, 20);
3128
3129         qla2x00_delete_all_vps(ha, base_vha);
3130
3131         if (IS_QLA8031(ha)) {
3132                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3133                     "Clearing fcoe driver presence.\n");
3134                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3135                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3136                             "Error while clearing DRV-Presence.\n");
3137         }
3138
3139         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3140
3141         qla2x00_dfs_remove(base_vha);
3142
3143         qla84xx_put_chip(base_vha);
3144
3145         /* Laser should be disabled only for ISP2031 */
3146         if (IS_QLA2031(ha))
3147                 qla83xx_disable_laser(base_vha);
3148
3149         /* Disable timer */
3150         if (base_vha->timer_active)
3151                 qla2x00_stop_timer(base_vha);
3152
3153         base_vha->flags.online = 0;
3154
3155         qla2x00_destroy_deferred_work(ha);
3156
3157         qlt_remove_target(ha, base_vha);
3158
3159         qla2x00_free_sysfs_attr(base_vha, true);
3160
3161         fc_remove_host(base_vha->host);
3162
3163         scsi_remove_host(base_vha->host);
3164
3165         qla2x00_free_device(base_vha);
3166
3167         qla2x00_clear_drv_active(ha);
3168
3169         scsi_host_put(base_vha->host);
3170
3171         qla2x00_unmap_iobases(ha);
3172
3173         pci_release_selected_regions(ha->pdev, ha->bars);
3174         kfree(ha);
3175         ha = NULL;
3176
3177         pci_disable_pcie_error_reporting(pdev);
3178
3179         pci_disable_device(pdev);
3180 }
3181
3182 static void
3183 qla2x00_free_device(scsi_qla_host_t *vha)
3184 {
3185         struct qla_hw_data *ha = vha->hw;
3186
3187         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3188
3189         /* Disable timer */
3190         if (vha->timer_active)
3191                 qla2x00_stop_timer(vha);
3192
3193         qla25xx_delete_queues(vha);
3194
3195         if (ha->flags.fce_enabled)
3196                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3197
3198         if (ha->eft)
3199                 qla2x00_disable_eft_trace(vha);
3200
3201         /* Stop currently executing firmware. */
3202         qla2x00_try_to_stop_firmware(vha);
3203
3204         vha->flags.online = 0;
3205
3206         /* turn-off interrupts on the card */
3207         if (ha->interrupts_on) {
3208                 vha->flags.init_done = 0;
3209                 ha->isp_ops->disable_intrs(ha);
3210         }
3211
3212         qla2x00_free_irqs(vha);
3213
3214         qla2x00_free_fcports(vha);
3215
3216         qla2x00_mem_free(ha);
3217
3218         qla82xx_md_free(vha);
3219
3220         qla2x00_free_queues(ha);
3221 }
3222
3223 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3224 {
3225         fc_port_t *fcport, *tfcport;
3226
3227         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3228                 list_del(&fcport->list);
3229                 qla2x00_clear_loop_id(fcport);
3230                 kfree(fcport);
3231                 fcport = NULL;
3232         }
3233 }
3234
3235 static inline void
3236 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3237     int defer)
3238 {
3239         struct fc_rport *rport;
3240         scsi_qla_host_t *base_vha;
3241         unsigned long flags;
3242
3243         if (!fcport->rport)
3244                 return;
3245
3246         rport = fcport->rport;
3247         if (defer) {
3248                 base_vha = pci_get_drvdata(vha->hw->pdev);
3249                 spin_lock_irqsave(vha->host->host_lock, flags);
3250                 fcport->drport = rport;
3251                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3252                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3253                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3254                 qla2xxx_wake_dpc(base_vha);
3255         } else {
3256                 int now;
3257                 if (rport)
3258                         fc_remote_port_delete(rport);
3259                 qlt_do_generation_tick(vha, &now);
3260                 qlt_fc_port_deleted(vha, fcport, now);
3261         }
3262 }
3263
3264 /*
3265  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3266  *
3267  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3268  *
3269  * Return: None.
3270  *
3271  * Context:
3272  */
3273 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3274     int do_login, int defer)
3275 {
3276         if (IS_QLAFX00(vha->hw)) {
3277                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3278                 qla2x00_schedule_rport_del(vha, fcport, defer);
3279                 return;
3280         }
3281
3282         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3283             vha->vp_idx == fcport->vha->vp_idx) {
3284                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3285                 qla2x00_schedule_rport_del(vha, fcport, defer);
3286         }
3287         /*
3288          * We may need to retry the login, so don't change the state of the
3289          * port but do the retries.
3290          */
3291         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3292                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3293
3294         if (!do_login)
3295                 return;
3296
3297         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3298
3299         if (fcport->login_retry == 0) {
3300                 fcport->login_retry = vha->hw->login_retry_count;
3301
3302                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3303                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3304                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3305         }
3306 }
3307
3308 /*
3309  * qla2x00_mark_all_devices_lost
3310  *      Updates fcport state when device goes offline.
3311  *
3312  * Input:
3313  *      ha = adapter block pointer.
3314  *      fcport = port structure pointer.
3315  *
3316  * Return:
3317  *      None.
3318  *
3319  * Context:
3320  */
3321 void
3322 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3323 {
3324         fc_port_t *fcport;
3325
3326         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3327                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3328                         continue;
3329
3330                 /*
3331                  * No point in marking the device as lost, if the device is
3332                  * already DEAD.
3333                  */
3334                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3335                         continue;
3336                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3337                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3338                         if (defer)
3339                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3340                         else if (vha->vp_idx == fcport->vha->vp_idx)
3341                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3342                 }
3343         }
3344 }
3345
3346 /*
3347 * qla2x00_mem_alloc
3348 *      Allocates adapter memory.
3349 *
3350 * Returns:
3351 *      0  = success.
3352 *      !0  = failure.
3353 */
3354 static int
3355 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3356         struct req_que **req, struct rsp_que **rsp)
3357 {
3358         char    name[16];
3359
3360         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3361                 &ha->init_cb_dma, GFP_KERNEL);
3362         if (!ha->init_cb)
3363                 goto fail;
3364
3365         if (qlt_mem_alloc(ha) < 0)
3366                 goto fail_free_init_cb;
3367
3368         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3369                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3370         if (!ha->gid_list)
3371                 goto fail_free_tgt_mem;
3372
3373         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3374         if (!ha->srb_mempool)
3375                 goto fail_free_gid_list;
3376
3377         if (IS_P3P_TYPE(ha)) {
3378                 /* Allocate cache for CT6 Ctx. */
3379                 if (!ctx_cachep) {
3380                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3381                                 sizeof(struct ct6_dsd), 0,
3382                                 SLAB_HWCACHE_ALIGN, NULL);
3383                         if (!ctx_cachep)
3384                                 goto fail_free_srb_mempool;
3385                 }
3386                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3387                         ctx_cachep);
3388                 if (!ha->ctx_mempool)
3389                         goto fail_free_srb_mempool;
3390                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3391                     "ctx_cachep=%p ctx_mempool=%p.\n",
3392                     ctx_cachep, ha->ctx_mempool);
3393         }
3394
3395         /* Get memory for cached NVRAM */
3396         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3397         if (!ha->nvram)
3398                 goto fail_free_ctx_mempool;
3399
3400         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3401                 ha->pdev->device);
3402         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3403                 DMA_POOL_SIZE, 8, 0);
3404         if (!ha->s_dma_pool)
3405                 goto fail_free_nvram;
3406
3407         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3408             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3409             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3410
3411         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3412                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3413                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3414                 if (!ha->dl_dma_pool) {
3415                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3416                             "Failed to allocate memory for dl_dma_pool.\n");
3417                         goto fail_s_dma_pool;
3418                 }
3419
3420                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3421                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3422                 if (!ha->fcp_cmnd_dma_pool) {
3423                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3424                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3425                         goto fail_dl_dma_pool;
3426                 }
3427                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3428                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3429                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3430         }
3431
3432         /* Allocate memory for SNS commands */
3433         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3434         /* Get consistent memory allocated for SNS commands */
3435                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3436                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3437                 if (!ha->sns_cmd)
3438                         goto fail_dma_pool;
3439                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3440                     "sns_cmd: %p.\n", ha->sns_cmd);
3441         } else {
3442         /* Get consistent memory allocated for MS IOCB */
3443                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3444                         &ha->ms_iocb_dma);
3445                 if (!ha->ms_iocb)
3446                         goto fail_dma_pool;
3447         /* Get consistent memory allocated for CT SNS commands */
3448                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3449                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3450                 if (!ha->ct_sns)
3451                         goto fail_free_ms_iocb;
3452                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3453                     "ms_iocb=%p ct_sns=%p.\n",
3454                     ha->ms_iocb, ha->ct_sns);
3455         }
3456
3457         /* Allocate memory for request ring */
3458         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3459         if (!*req) {
3460                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3461                     "Failed to allocate memory for req.\n");
3462                 goto fail_req;
3463         }
3464         (*req)->length = req_len;
3465         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3466                 ((*req)->length + 1) * sizeof(request_t),
3467                 &(*req)->dma, GFP_KERNEL);
3468         if (!(*req)->ring) {
3469                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3470                     "Failed to allocate memory for req_ring.\n");
3471                 goto fail_req_ring;
3472         }
3473         /* Allocate memory for response ring */
3474         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3475         if (!*rsp) {
3476                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3477                     "Failed to allocate memory for rsp.\n");
3478                 goto fail_rsp;
3479         }
3480         (*rsp)->hw = ha;
3481         (*rsp)->length = rsp_len;
3482         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3483                 ((*rsp)->length + 1) * sizeof(response_t),
3484                 &(*rsp)->dma, GFP_KERNEL);
3485         if (!(*rsp)->ring) {
3486                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3487                     "Failed to allocate memory for rsp_ring.\n");
3488                 goto fail_rsp_ring;
3489         }
3490         (*req)->rsp = *rsp;
3491         (*rsp)->req = *req;
3492         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3493             "req=%p req->length=%d req->ring=%p rsp=%p "
3494             "rsp->length=%d rsp->ring=%p.\n",
3495             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3496             (*rsp)->ring);
3497         /* Allocate memory for NVRAM data for vports */
3498         if (ha->nvram_npiv_size) {
3499                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3500                     ha->nvram_npiv_size, GFP_KERNEL);
3501                 if (!ha->npiv_info) {
3502                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3503                             "Failed to allocate memory for npiv_info.\n");
3504                         goto fail_npiv_info;
3505                 }
3506         } else
3507                 ha->npiv_info = NULL;
3508
3509         /* Get consistent memory allocated for EX-INIT-CB. */
3510         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3511                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3512                     &ha->ex_init_cb_dma);
3513                 if (!ha->ex_init_cb)
3514                         goto fail_ex_init_cb;
3515                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3516                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3517         }
3518
3519         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3520
3521         /* Get consistent memory allocated for Async Port-Database. */
3522         if (!IS_FWI2_CAPABLE(ha)) {
3523                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3524                         &ha->async_pd_dma);
3525                 if (!ha->async_pd)
3526                         goto fail_async_pd;
3527                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3528                     "async_pd=%p.\n", ha->async_pd);
3529         }
3530
3531         INIT_LIST_HEAD(&ha->vp_list);
3532
3533         /* Allocate memory for our loop_id bitmap */
3534         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3535             GFP_KERNEL);
3536         if (!ha->loop_id_map)
3537                 goto fail_loop_id_map;
3538         else {
3539                 qla2x00_set_reserved_loop_ids(ha);
3540                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3541                     "loop_id_map=%p.\n", ha->loop_id_map);
3542         }
3543
3544         return 0;
3545
3546 fail_loop_id_map:
3547         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3548 fail_async_pd:
3549         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3550 fail_ex_init_cb:
3551         kfree(ha->npiv_info);
3552 fail_npiv_info:
3553         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3554                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3555         (*rsp)->ring = NULL;
3556         (*rsp)->dma = 0;
3557 fail_rsp_ring:
3558         kfree(*rsp);
3559 fail_rsp:
3560         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3561                 sizeof(request_t), (*req)->ring, (*req)->dma);
3562         (*req)->ring = NULL;
3563         (*req)->dma = 0;
3564 fail_req_ring:
3565         kfree(*req);
3566 fail_req:
3567         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3568                 ha->ct_sns, ha->ct_sns_dma);
3569         ha->ct_sns = NULL;
3570         ha->ct_sns_dma = 0;
3571 fail_free_ms_iocb:
3572         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3573         ha->ms_iocb = NULL;
3574         ha->ms_iocb_dma = 0;
3575
3576         if (ha->sns_cmd)
3577                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3578                     ha->sns_cmd, ha->sns_cmd_dma);
3579 fail_dma_pool:
3580         if (IS_QLA82XX(ha) || ql2xenabledif) {
3581                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3582                 ha->fcp_cmnd_dma_pool = NULL;
3583         }
3584 fail_dl_dma_pool:
3585         if (IS_QLA82XX(ha) || ql2xenabledif) {
3586                 dma_pool_destroy(ha->dl_dma_pool);
3587                 ha->dl_dma_pool = NULL;
3588         }
3589 fail_s_dma_pool:
3590         dma_pool_destroy(ha->s_dma_pool);
3591         ha->s_dma_pool = NULL;
3592 fail_free_nvram:
3593         kfree(ha->nvram);
3594         ha->nvram = NULL;
3595 fail_free_ctx_mempool:
3596         if (ha->ctx_mempool)
3597                 mempool_destroy(ha->ctx_mempool);
3598         ha->ctx_mempool = NULL;
3599 fail_free_srb_mempool:
3600         if (ha->srb_mempool)
3601                 mempool_destroy(ha->srb_mempool);
3602         ha->srb_mempool = NULL;
3603 fail_free_gid_list:
3604         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3605         ha->gid_list,
3606         ha->gid_list_dma);
3607         ha->gid_list = NULL;
3608         ha->gid_list_dma = 0;
3609 fail_free_tgt_mem:
3610         qlt_mem_free(ha);
3611 fail_free_init_cb:
3612         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3613         ha->init_cb_dma);
3614         ha->init_cb = NULL;
3615         ha->init_cb_dma = 0;
3616 fail:
3617         ql_log(ql_log_fatal, NULL, 0x0030,
3618             "Memory allocation failure.\n");
3619         return -ENOMEM;
3620 }
3621
3622 /*
3623 * qla2x00_free_fw_dump
3624 *       Frees fw dump stuff.
3625 *
3626 * Input:
3627 *       ha = adapter block pointer
3628 */
3629 static void
3630 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3631 {
3632         if (ha->fce)
3633                 dma_free_coherent(&ha->pdev->dev,
3634                     FCE_SIZE, ha->fce, ha->fce_dma);
3635
3636         if (ha->eft)
3637                 dma_free_coherent(&ha->pdev->dev,
3638                     EFT_SIZE, ha->eft, ha->eft_dma);
3639
3640         if (ha->fw_dump)
3641                 vfree(ha->fw_dump);
3642         if (ha->fw_dump_template)
3643                 vfree(ha->fw_dump_template);
3644
3645         ha->fce = NULL;
3646         ha->fce_dma = 0;
3647         ha->eft = NULL;
3648         ha->eft_dma = 0;
3649         ha->fw_dumped = 0;
3650         ha->fw_dump_cap_flags = 0;
3651         ha->fw_dump_reading = 0;
3652         ha->fw_dump = NULL;
3653         ha->fw_dump_len = 0;
3654         ha->fw_dump_template = NULL;
3655         ha->fw_dump_template_len = 0;
3656 }
3657
3658 /*
3659 * qla2x00_mem_free
3660 *      Frees all adapter allocated memory.
3661 *
3662 * Input:
3663 *      ha = adapter block pointer.
3664 */
3665 static void
3666 qla2x00_mem_free(struct qla_hw_data *ha)
3667 {
3668         qla2x00_free_fw_dump(ha);
3669
3670         if (ha->mctp_dump)
3671                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3672                     ha->mctp_dump_dma);
3673
3674         if (ha->srb_mempool)
3675                 mempool_destroy(ha->srb_mempool);
3676
3677         if (ha->dcbx_tlv)
3678                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3679                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3680
3681         if (ha->xgmac_data)
3682                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3683                     ha->xgmac_data, ha->xgmac_data_dma);
3684
3685         if (ha->sns_cmd)
3686                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3687                 ha->sns_cmd, ha->sns_cmd_dma);
3688
3689         if (ha->ct_sns)
3690                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3691                 ha->ct_sns, ha->ct_sns_dma);
3692
3693         if (ha->sfp_data)
3694                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3695
3696         if (ha->ms_iocb)
3697                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3698
3699         if (ha->ex_init_cb)
3700                 dma_pool_free(ha->s_dma_pool,
3701                         ha->ex_init_cb, ha->ex_init_cb_dma);
3702
3703         if (ha->async_pd)
3704                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3705
3706         if (ha->s_dma_pool)
3707                 dma_pool_destroy(ha->s_dma_pool);
3708
3709         if (ha->gid_list)
3710                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3711                 ha->gid_list, ha->gid_list_dma);
3712
3713         if (IS_QLA82XX(ha)) {
3714                 if (!list_empty(&ha->gbl_dsd_list)) {
3715                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3716
3717                         /* clean up allocated prev pool */
3718                         list_for_each_entry_safe(dsd_ptr,
3719                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3720                                 dma_pool_free(ha->dl_dma_pool,
3721                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3722                                 list_del(&dsd_ptr->list);
3723                                 kfree(dsd_ptr);
3724                         }
3725                 }
3726         }
3727
3728         if (ha->dl_dma_pool)
3729                 dma_pool_destroy(ha->dl_dma_pool);
3730
3731         if (ha->fcp_cmnd_dma_pool)
3732                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3733
3734         if (ha->ctx_mempool)
3735                 mempool_destroy(ha->ctx_mempool);
3736
3737         qlt_mem_free(ha);
3738
3739         if (ha->init_cb)
3740                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3741                         ha->init_cb, ha->init_cb_dma);
3742         vfree(ha->optrom_buffer);
3743         kfree(ha->nvram);
3744         kfree(ha->npiv_info);
3745         kfree(ha->swl);
3746         kfree(ha->loop_id_map);
3747
3748         ha->srb_mempool = NULL;
3749         ha->ctx_mempool = NULL;
3750         ha->sns_cmd = NULL;
3751         ha->sns_cmd_dma = 0;
3752         ha->ct_sns = NULL;
3753         ha->ct_sns_dma = 0;
3754         ha->ms_iocb = NULL;
3755         ha->ms_iocb_dma = 0;
3756         ha->init_cb = NULL;
3757         ha->init_cb_dma = 0;
3758         ha->ex_init_cb = NULL;
3759         ha->ex_init_cb_dma = 0;
3760         ha->async_pd = NULL;
3761         ha->async_pd_dma = 0;
3762
3763         ha->s_dma_pool = NULL;
3764         ha->dl_dma_pool = NULL;
3765         ha->fcp_cmnd_dma_pool = NULL;
3766
3767         ha->gid_list = NULL;
3768         ha->gid_list_dma = 0;
3769
3770         ha->tgt.atio_ring = NULL;
3771         ha->tgt.atio_dma = 0;
3772         ha->tgt.tgt_vp_map = NULL;
3773 }
3774
3775 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3776                                                 struct qla_hw_data *ha)
3777 {
3778         struct Scsi_Host *host;
3779         struct scsi_qla_host *vha = NULL;
3780
3781         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3782         if (host == NULL) {
3783                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3784                     "Failed to allocate host from the scsi layer, aborting.\n");
3785                 goto fail;
3786         }
3787
3788         /* Clear our data area */
3789         vha = shost_priv(host);
3790         memset(vha, 0, sizeof(scsi_qla_host_t));
3791
3792         vha->host = host;
3793         vha->host_no = host->host_no;
3794         vha->hw = ha;
3795
3796         INIT_LIST_HEAD(&vha->vp_fcports);
3797         INIT_LIST_HEAD(&vha->work_list);
3798         INIT_LIST_HEAD(&vha->list);
3799         INIT_LIST_HEAD(&vha->qla_cmd_list);
3800         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
3801
3802         spin_lock_init(&vha->work_lock);
3803         spin_lock_init(&vha->cmd_list_lock);
3804
3805         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3806         ql_dbg(ql_dbg_init, vha, 0x0041,
3807             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3808             vha->host, vha->hw, vha,
3809             dev_name(&(ha->pdev->dev)));
3810
3811         return vha;
3812
3813 fail:
3814         return vha;
3815 }
3816
3817 static struct qla_work_evt *
3818 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3819 {
3820         struct qla_work_evt *e;
3821         uint8_t bail;
3822
3823         QLA_VHA_MARK_BUSY(vha, bail);
3824         if (bail)
3825                 return NULL;
3826
3827         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3828         if (!e) {
3829                 QLA_VHA_MARK_NOT_BUSY(vha);
3830                 return NULL;
3831         }
3832
3833         INIT_LIST_HEAD(&e->list);
3834         e->type = type;
3835         e->flags = QLA_EVT_FLAG_FREE;
3836         return e;
3837 }
3838
3839 static int
3840 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3841 {
3842         unsigned long flags;
3843
3844         spin_lock_irqsave(&vha->work_lock, flags);
3845         list_add_tail(&e->list, &vha->work_list);
3846         spin_unlock_irqrestore(&vha->work_lock, flags);
3847         qla2xxx_wake_dpc(vha);
3848
3849         return QLA_SUCCESS;
3850 }
3851
3852 int
3853 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3854     u32 data)
3855 {
3856         struct qla_work_evt *e;
3857
3858         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3859         if (!e)
3860                 return QLA_FUNCTION_FAILED;
3861
3862         e->u.aen.code = code;
3863         e->u.aen.data = data;
3864         return qla2x00_post_work(vha, e);
3865 }
3866
3867 int
3868 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3869 {
3870         struct qla_work_evt *e;
3871
3872         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3873         if (!e)
3874                 return QLA_FUNCTION_FAILED;
3875
3876         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3877         return qla2x00_post_work(vha, e);
3878 }
3879
3880 #define qla2x00_post_async_work(name, type)     \
3881 int qla2x00_post_async_##name##_work(           \
3882     struct scsi_qla_host *vha,                  \
3883     fc_port_t *fcport, uint16_t *data)          \
3884 {                                               \
3885         struct qla_work_evt *e;                 \
3886                                                 \
3887         e = qla2x00_alloc_work(vha, type);      \
3888         if (!e)                                 \
3889                 return QLA_FUNCTION_FAILED;     \
3890                                                 \
3891         e->u.logio.fcport = fcport;             \
3892         if (data) {                             \
3893                 e->u.logio.data[0] = data[0];   \
3894                 e->u.logio.data[1] = data[1];   \
3895         }                                       \
3896         return qla2x00_post_work(vha, e);       \
3897 }
3898
3899 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3900 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3901 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3902 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3903 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3904 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3905
3906 int
3907 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3908 {
3909         struct qla_work_evt *e;
3910
3911         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3912         if (!e)
3913                 return QLA_FUNCTION_FAILED;
3914
3915         e->u.uevent.code = code;
3916         return qla2x00_post_work(vha, e);
3917 }
3918
3919 static void
3920 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3921 {
3922         char event_string[40];
3923         char *envp[] = { event_string, NULL };
3924
3925         switch (code) {
3926         case QLA_UEVENT_CODE_FW_DUMP:
3927                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3928                     vha->host_no);
3929                 break;
3930         default:
3931                 /* do nothing */
3932                 break;
3933         }
3934         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3935 }
3936
3937 int
3938 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3939                         uint32_t *data, int cnt)
3940 {
3941         struct qla_work_evt *e;
3942
3943         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3944         if (!e)
3945                 return QLA_FUNCTION_FAILED;
3946
3947         e->u.aenfx.evtcode = evtcode;
3948         e->u.aenfx.count = cnt;
3949         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3950         return qla2x00_post_work(vha, e);
3951 }
3952
3953 void
3954 qla2x00_do_work(struct scsi_qla_host *vha)
3955 {
3956         struct qla_work_evt *e, *tmp;
3957         unsigned long flags;
3958         LIST_HEAD(work);
3959
3960         spin_lock_irqsave(&vha->work_lock, flags);
3961         list_splice_init(&vha->work_list, &work);
3962         spin_unlock_irqrestore(&vha->work_lock, flags);
3963
3964         list_for_each_entry_safe(e, tmp, &work, list) {
3965                 list_del_init(&e->list);
3966
3967                 switch (e->type) {
3968                 case QLA_EVT_AEN:
3969                         fc_host_post_event(vha->host, fc_get_event_number(),
3970                             e->u.aen.code, e->u.aen.data);
3971                         break;
3972                 case QLA_EVT_IDC_ACK:
3973                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3974                         break;
3975                 case QLA_EVT_ASYNC_LOGIN:
3976                         qla2x00_async_login(vha, e->u.logio.fcport,
3977                             e->u.logio.data);
3978                         break;
3979                 case QLA_EVT_ASYNC_LOGIN_DONE:
3980                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3981                             e->u.logio.data);
3982                         break;
3983                 case QLA_EVT_ASYNC_LOGOUT:
3984                         qla2x00_async_logout(vha, e->u.logio.fcport);
3985                         break;
3986                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3987                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3988                             e->u.logio.data);
3989                         break;
3990                 case QLA_EVT_ASYNC_ADISC:
3991                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3992                             e->u.logio.data);
3993                         break;
3994                 case QLA_EVT_ASYNC_ADISC_DONE:
3995                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3996                             e->u.logio.data);
3997                         break;
3998                 case QLA_EVT_UEVENT:
3999                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4000                         break;
4001                 case QLA_EVT_AENFX:
4002                         qlafx00_process_aen(vha, e);
4003                         break;
4004                 }
4005                 if (e->flags & QLA_EVT_FLAG_FREE)
4006                         kfree(e);
4007
4008                 /* For each work completed decrement vha ref count */
4009                 QLA_VHA_MARK_NOT_BUSY(vha);
4010         }
4011 }
4012
4013 /* Relogins all the fcports of a vport
4014  * Context: dpc thread
4015  */
4016 void qla2x00_relogin(struct scsi_qla_host *vha)
4017 {
4018         fc_port_t       *fcport;
4019         int status;
4020         uint16_t        next_loopid = 0;
4021         struct qla_hw_data *ha = vha->hw;
4022         uint16_t data[2];
4023
4024         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4025         /*
4026          * If the port is not ONLINE then try to login
4027          * to it if we haven't run out of retries.
4028          */
4029                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4030                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4031                         fcport->login_retry--;
4032                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4033                                 if (fcport->flags & FCF_FCP2_DEVICE)
4034                                         ha->isp_ops->fabric_logout(vha,
4035                                                         fcport->loop_id,
4036                                                         fcport->d_id.b.domain,
4037                                                         fcport->d_id.b.area,
4038                                                         fcport->d_id.b.al_pa);
4039
4040                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4041                                         fcport->loop_id = next_loopid =
4042                                             ha->min_external_loopid;
4043                                         status = qla2x00_find_new_loop_id(
4044                                             vha, fcport);
4045                                         if (status != QLA_SUCCESS) {
4046                                                 /* Ran out of IDs to use */
4047                                                 break;
4048                                         }
4049                                 }
4050
4051                                 if (IS_ALOGIO_CAPABLE(ha)) {
4052                                         fcport->flags |= FCF_ASYNC_SENT;
4053                                         data[0] = 0;
4054                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4055                                         status = qla2x00_post_async_login_work(
4056                                             vha, fcport, data);
4057                                         if (status == QLA_SUCCESS)
4058                                                 continue;
4059                                         /* Attempt a retry. */
4060                                         status = 1;
4061                                 } else {
4062                                         status = qla2x00_fabric_login(vha,
4063                                             fcport, &next_loopid);
4064                                         if (status ==  QLA_SUCCESS) {
4065                                                 int status2;
4066                                                 uint8_t opts;
4067
4068                                                 opts = 0;
4069                                                 if (fcport->flags &
4070                                                     FCF_FCP2_DEVICE)
4071                                                         opts |= BIT_1;
4072                                                 status2 =
4073                                                     qla2x00_get_port_database(
4074                                                         vha, fcport, opts);
4075                                                 if (status2 != QLA_SUCCESS)
4076                                                         status = 1;
4077                                         }
4078                                 }
4079                         } else
4080                                 status = qla2x00_local_device_login(vha,
4081                                                                 fcport);
4082
4083                         if (status == QLA_SUCCESS) {
4084                                 fcport->old_loop_id = fcport->loop_id;
4085
4086                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4087                                     "Port login OK: logged in ID 0x%x.\n",
4088                                     fcport->loop_id);
4089
4090                                 qla2x00_update_fcport(vha, fcport);
4091
4092                         } else if (status == 1) {
4093                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4094                                 /* retry the login again */
4095                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4096                                     "Retrying %d login again loop_id 0x%x.\n",
4097                                     fcport->login_retry, fcport->loop_id);
4098                         } else {
4099                                 fcport->login_retry = 0;
4100                         }
4101
4102                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4103                                 qla2x00_clear_loop_id(fcport);
4104                 }
4105                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4106                         break;
4107         }
4108 }
4109
4110 /* Schedule work on any of the dpc-workqueues */
4111 void
4112 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4113 {
4114         struct qla_hw_data *ha = base_vha->hw;
4115
4116         switch (work_code) {
4117         case MBA_IDC_AEN: /* 0x8200 */
4118                 if (ha->dpc_lp_wq)
4119                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4120                 break;
4121
4122         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4123                 if (!ha->flags.nic_core_reset_hdlr_active) {
4124                         if (ha->dpc_hp_wq)
4125                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4126                 } else
4127                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4128                             "NIC Core reset is already active. Skip "
4129                             "scheduling it again.\n");
4130                 break;
4131         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4132                 if (ha->dpc_hp_wq)
4133                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4134                 break;
4135         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4136                 if (ha->dpc_hp_wq)
4137                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4138                 break;
4139         default:
4140                 ql_log(ql_log_warn, base_vha, 0xb05f,
4141                     "Unknown work-code=0x%x.\n", work_code);
4142         }
4143
4144         return;
4145 }
4146
4147 /* Work: Perform NIC Core Unrecoverable state handling */
4148 void
4149 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4150 {
4151         struct qla_hw_data *ha =
4152                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4153         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4154         uint32_t dev_state = 0;
4155
4156         qla83xx_idc_lock(base_vha, 0);
4157         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4158         qla83xx_reset_ownership(base_vha);
4159         if (ha->flags.nic_core_reset_owner) {
4160                 ha->flags.nic_core_reset_owner = 0;
4161                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4162                     QLA8XXX_DEV_FAILED);
4163                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4164                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4165         }
4166         qla83xx_idc_unlock(base_vha, 0);
4167 }
4168
4169 /* Work: Execute IDC state handler */
4170 void
4171 qla83xx_idc_state_handler_work(struct work_struct *work)
4172 {
4173         struct qla_hw_data *ha =
4174                 container_of(work, struct qla_hw_data, idc_state_handler);
4175         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4176         uint32_t dev_state = 0;
4177
4178         qla83xx_idc_lock(base_vha, 0);
4179         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4180         if (dev_state == QLA8XXX_DEV_FAILED ||
4181                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4182                 qla83xx_idc_state_handler(base_vha);
4183         qla83xx_idc_unlock(base_vha, 0);
4184 }
4185
4186 static int
4187 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4188 {
4189         int rval = QLA_SUCCESS;
4190         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4191         uint32_t heart_beat_counter1, heart_beat_counter2;
4192
4193         do {
4194                 if (time_after(jiffies, heart_beat_wait)) {
4195                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4196                             "Nic Core f/w is not alive.\n");
4197                         rval = QLA_FUNCTION_FAILED;
4198                         break;
4199                 }
4200
4201                 qla83xx_idc_lock(base_vha, 0);
4202                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4203                     &heart_beat_counter1);
4204                 qla83xx_idc_unlock(base_vha, 0);
4205                 msleep(100);
4206                 qla83xx_idc_lock(base_vha, 0);
4207                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4208                     &heart_beat_counter2);
4209                 qla83xx_idc_unlock(base_vha, 0);
4210         } while (heart_beat_counter1 == heart_beat_counter2);
4211
4212         return rval;
4213 }
4214
4215 /* Work: Perform NIC Core Reset handling */
4216 void
4217 qla83xx_nic_core_reset_work(struct work_struct *work)
4218 {
4219         struct qla_hw_data *ha =
4220                 container_of(work, struct qla_hw_data, nic_core_reset);
4221         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4222         uint32_t dev_state = 0;
4223
4224         if (IS_QLA2031(ha)) {
4225                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4226                         ql_log(ql_log_warn, base_vha, 0xb081,
4227                             "Failed to dump mctp\n");
4228                 return;
4229         }
4230
4231         if (!ha->flags.nic_core_reset_hdlr_active) {
4232                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4233                         qla83xx_idc_lock(base_vha, 0);
4234                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4235                             &dev_state);
4236                         qla83xx_idc_unlock(base_vha, 0);
4237                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4238                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4239                                     "Nic Core f/w is alive.\n");
4240                                 return;
4241                         }
4242                 }
4243
4244                 ha->flags.nic_core_reset_hdlr_active = 1;
4245                 if (qla83xx_nic_core_reset(base_vha)) {
4246                         /* NIC Core reset failed. */
4247                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4248                             "NIC Core reset failed.\n");
4249                 }
4250                 ha->flags.nic_core_reset_hdlr_active = 0;
4251         }
4252 }
4253
4254 /* Work: Handle 8200 IDC aens */
4255 void
4256 qla83xx_service_idc_aen(struct work_struct *work)
4257 {
4258         struct qla_hw_data *ha =
4259                 container_of(work, struct qla_hw_data, idc_aen);
4260         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4261         uint32_t dev_state, idc_control;
4262
4263         qla83xx_idc_lock(base_vha, 0);
4264         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4265         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4266         qla83xx_idc_unlock(base_vha, 0);
4267         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4268                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4269                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4270                             "Application requested NIC Core Reset.\n");
4271                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4272                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4273                     QLA_SUCCESS) {
4274                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4275                             "Other protocol driver requested NIC Core Reset.\n");
4276                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4277                 }
4278         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4279                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4280                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4281         }
4282 }
4283
4284 static void
4285 qla83xx_wait_logic(void)
4286 {
4287         int i;
4288
4289         /* Yield CPU */
4290         if (!in_interrupt()) {
4291                 /*
4292                  * Wait about 200ms before retrying again.
4293                  * This controls the number of retries for single
4294                  * lock operation.
4295                  */
4296                 msleep(100);
4297                 schedule();
4298         } else {
4299                 for (i = 0; i < 20; i++)
4300                         cpu_relax(); /* This a nop instr on i386 */
4301         }
4302 }
4303
4304 static int
4305 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4306 {
4307         int rval;
4308         uint32_t data;
4309         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4310         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4311         struct qla_hw_data *ha = base_vha->hw;
4312         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4313             "Trying force recovery of the IDC lock.\n");
4314
4315         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4316         if (rval)
4317                 return rval;
4318
4319         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4320                 return QLA_SUCCESS;
4321         } else {
4322                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4323                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4324                     data);
4325                 if (rval)
4326                         return rval;
4327
4328                 msleep(200);
4329
4330                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4331                     &data);
4332                 if (rval)
4333                         return rval;
4334
4335                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4336                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4337                                         ~(idc_lck_rcvry_stage_mask));
4338                         rval = qla83xx_wr_reg(base_vha,
4339                             QLA83XX_IDC_LOCK_RECOVERY, data);
4340                         if (rval)
4341                                 return rval;
4342
4343                         /* Forcefully perform IDC UnLock */
4344                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4345                             &data);
4346                         if (rval)
4347                                 return rval;
4348                         /* Clear lock-id by setting 0xff */
4349                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4350                             0xff);
4351                         if (rval)
4352                                 return rval;
4353                         /* Clear lock-recovery by setting 0x0 */
4354                         rval = qla83xx_wr_reg(base_vha,
4355                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4356                         if (rval)
4357                                 return rval;
4358                 } else
4359                         return QLA_SUCCESS;
4360         }
4361
4362         return rval;
4363 }
4364
4365 static int
4366 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4367 {
4368         int rval = QLA_SUCCESS;
4369         uint32_t o_drv_lockid, n_drv_lockid;
4370         unsigned long lock_recovery_timeout;
4371
4372         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4373 retry_lockid:
4374         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4375         if (rval)
4376                 goto exit;
4377
4378         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4379         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4380                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4381                         return QLA_SUCCESS;
4382                 else
4383                         return QLA_FUNCTION_FAILED;
4384         }
4385
4386         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4387         if (rval)
4388                 goto exit;
4389
4390         if (o_drv_lockid == n_drv_lockid) {
4391                 qla83xx_wait_logic();
4392                 goto retry_lockid;
4393         } else
4394                 return QLA_SUCCESS;
4395
4396 exit:
4397         return rval;
4398 }
4399
4400 void
4401 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4402 {
4403         uint16_t options = (requester_id << 15) | BIT_6;
4404         uint32_t data;
4405         uint32_t lock_owner;
4406         struct qla_hw_data *ha = base_vha->hw;
4407
4408         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4409 retry_lock:
4410         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4411             == QLA_SUCCESS) {
4412                 if (data) {
4413                         /* Setting lock-id to our function-number */
4414                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4415                             ha->portnum);
4416                 } else {
4417                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4418                             &lock_owner);
4419                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4420                             "Failed to acquire IDC lock, acquired by %d, "
4421                             "retrying...\n", lock_owner);
4422
4423                         /* Retry/Perform IDC-Lock recovery */
4424                         if (qla83xx_idc_lock_recovery(base_vha)
4425                             == QLA_SUCCESS) {
4426                                 qla83xx_wait_logic();
4427                                 goto retry_lock;
4428                         } else
4429                                 ql_log(ql_log_warn, base_vha, 0xb075,
4430                                     "IDC Lock recovery FAILED.\n");
4431                 }
4432
4433         }
4434
4435         return;
4436
4437         /* XXX: IDC-lock implementation using access-control mbx */
4438 retry_lock2:
4439         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4440                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4441                     "Failed to acquire IDC lock. retrying...\n");
4442                 /* Retry/Perform IDC-Lock recovery */
4443                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4444                         qla83xx_wait_logic();
4445                         goto retry_lock2;
4446                 } else
4447                         ql_log(ql_log_warn, base_vha, 0xb076,
4448                             "IDC Lock recovery FAILED.\n");
4449         }
4450
4451         return;
4452 }
4453
4454 void
4455 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4456 {
4457 #if 0
4458         uint16_t options = (requester_id << 15) | BIT_7;
4459 #endif
4460         uint16_t retry;
4461         uint32_t data;
4462         struct qla_hw_data *ha = base_vha->hw;
4463
4464         /* IDC-unlock implementation using driver-unlock/lock-id
4465          * remote registers
4466          */
4467         retry = 0;
4468 retry_unlock:
4469         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4470             == QLA_SUCCESS) {
4471                 if (data == ha->portnum) {
4472                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4473                         /* Clearing lock-id by setting 0xff */
4474                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4475                 } else if (retry < 10) {
4476                         /* SV: XXX: IDC unlock retrying needed here? */
4477
4478                         /* Retry for IDC-unlock */
4479                         qla83xx_wait_logic();
4480                         retry++;
4481                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4482                             "Failed to release IDC lock, retyring=%d\n", retry);
4483                         goto retry_unlock;
4484                 }
4485         } else if (retry < 10) {
4486                 /* Retry for IDC-unlock */
4487                 qla83xx_wait_logic();
4488                 retry++;
4489                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4490                     "Failed to read drv-lockid, retyring=%d\n", retry);
4491                 goto retry_unlock;
4492         }
4493
4494         return;
4495
4496 #if 0
4497         /* XXX: IDC-unlock implementation using access-control mbx */
4498         retry = 0;
4499 retry_unlock2:
4500         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4501                 if (retry < 10) {
4502                         /* Retry for IDC-unlock */
4503                         qla83xx_wait_logic();
4504                         retry++;
4505                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4506                             "Failed to release IDC lock, retyring=%d\n", retry);
4507                         goto retry_unlock2;
4508                 }
4509         }
4510
4511         return;
4512 #endif
4513 }
4514
4515 int
4516 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4517 {
4518         int rval = QLA_SUCCESS;
4519         struct qla_hw_data *ha = vha->hw;
4520         uint32_t drv_presence;
4521
4522         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4523         if (rval == QLA_SUCCESS) {
4524                 drv_presence |= (1 << ha->portnum);
4525                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4526                     drv_presence);
4527         }
4528
4529         return rval;
4530 }
4531
4532 int
4533 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4534 {
4535         int rval = QLA_SUCCESS;
4536
4537         qla83xx_idc_lock(vha, 0);
4538         rval = __qla83xx_set_drv_presence(vha);
4539         qla83xx_idc_unlock(vha, 0);
4540
4541         return rval;
4542 }
4543
4544 int
4545 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4546 {
4547         int rval = QLA_SUCCESS;
4548         struct qla_hw_data *ha = vha->hw;
4549         uint32_t drv_presence;
4550
4551         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4552         if (rval == QLA_SUCCESS) {
4553                 drv_presence &= ~(1 << ha->portnum);
4554                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4555                     drv_presence);
4556         }
4557
4558         return rval;
4559 }
4560
4561 int
4562 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4563 {
4564         int rval = QLA_SUCCESS;
4565
4566         qla83xx_idc_lock(vha, 0);
4567         rval = __qla83xx_clear_drv_presence(vha);
4568         qla83xx_idc_unlock(vha, 0);
4569
4570         return rval;
4571 }
4572
4573 static void
4574 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4575 {
4576         struct qla_hw_data *ha = vha->hw;
4577         uint32_t drv_ack, drv_presence;
4578         unsigned long ack_timeout;
4579
4580         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4581         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4582         while (1) {
4583                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4584                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4585                 if ((drv_ack & drv_presence) == drv_presence)
4586                         break;
4587
4588                 if (time_after_eq(jiffies, ack_timeout)) {
4589                         ql_log(ql_log_warn, vha, 0xb067,
4590                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4591                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4592                         /*
4593                          * The function(s) which did not ack in time are forced
4594                          * to withdraw any further participation in the IDC
4595                          * reset.
4596                          */
4597                         if (drv_ack != drv_presence)
4598                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4599                                     drv_ack);
4600                         break;
4601                 }
4602
4603                 qla83xx_idc_unlock(vha, 0);
4604                 msleep(1000);
4605                 qla83xx_idc_lock(vha, 0);
4606         }
4607
4608         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4609         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4610 }
4611
4612 static int
4613 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4614 {
4615         int rval = QLA_SUCCESS;
4616         uint32_t idc_control;
4617
4618         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4619         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4620
4621         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4622         __qla83xx_get_idc_control(vha, &idc_control);
4623         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4624         __qla83xx_set_idc_control(vha, 0);
4625
4626         qla83xx_idc_unlock(vha, 0);
4627         rval = qla83xx_restart_nic_firmware(vha);
4628         qla83xx_idc_lock(vha, 0);
4629
4630         if (rval != QLA_SUCCESS) {
4631                 ql_log(ql_log_fatal, vha, 0xb06a,
4632                     "Failed to restart NIC f/w.\n");
4633                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4634                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4635         } else {
4636                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4637                     "Success in restarting nic f/w.\n");
4638                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4639                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4640         }
4641
4642         return rval;
4643 }
4644
4645 /* Assumes idc_lock always held on entry */
4646 int
4647 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4648 {
4649         struct qla_hw_data *ha = base_vha->hw;
4650         int rval = QLA_SUCCESS;
4651         unsigned long dev_init_timeout;
4652         uint32_t dev_state;
4653
4654         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4655         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4656
4657         while (1) {
4658
4659                 if (time_after_eq(jiffies, dev_init_timeout)) {
4660                         ql_log(ql_log_warn, base_vha, 0xb06e,
4661                             "Initialization TIMEOUT!\n");
4662                         /* Init timeout. Disable further NIC Core
4663                          * communication.
4664                          */
4665                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4666                                 QLA8XXX_DEV_FAILED);
4667                         ql_log(ql_log_info, base_vha, 0xb06f,
4668                             "HW State: FAILED.\n");
4669                 }
4670
4671                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4672                 switch (dev_state) {
4673                 case QLA8XXX_DEV_READY:
4674                         if (ha->flags.nic_core_reset_owner)
4675                                 qla83xx_idc_audit(base_vha,
4676                                     IDC_AUDIT_COMPLETION);
4677                         ha->flags.nic_core_reset_owner = 0;
4678                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4679                             "Reset_owner reset by 0x%x.\n",
4680                             ha->portnum);
4681                         goto exit;
4682                 case QLA8XXX_DEV_COLD:
4683                         if (ha->flags.nic_core_reset_owner)
4684                                 rval = qla83xx_device_bootstrap(base_vha);
4685                         else {
4686                         /* Wait for AEN to change device-state */
4687                                 qla83xx_idc_unlock(base_vha, 0);
4688                                 msleep(1000);
4689                                 qla83xx_idc_lock(base_vha, 0);
4690                         }
4691                         break;
4692                 case QLA8XXX_DEV_INITIALIZING:
4693                         /* Wait for AEN to change device-state */
4694                         qla83xx_idc_unlock(base_vha, 0);
4695                         msleep(1000);
4696                         qla83xx_idc_lock(base_vha, 0);
4697                         break;
4698                 case QLA8XXX_DEV_NEED_RESET:
4699                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4700                                 qla83xx_need_reset_handler(base_vha);
4701                         else {
4702                                 /* Wait for AEN to change device-state */
4703                                 qla83xx_idc_unlock(base_vha, 0);
4704                                 msleep(1000);
4705                                 qla83xx_idc_lock(base_vha, 0);
4706                         }
4707                         /* reset timeout value after need reset handler */
4708                         dev_init_timeout = jiffies +
4709                             (ha->fcoe_dev_init_timeout * HZ);
4710                         break;
4711                 case QLA8XXX_DEV_NEED_QUIESCENT:
4712                         /* XXX: DEBUG for now */
4713                         qla83xx_idc_unlock(base_vha, 0);
4714                         msleep(1000);
4715                         qla83xx_idc_lock(base_vha, 0);
4716                         break;
4717                 case QLA8XXX_DEV_QUIESCENT:
4718                         /* XXX: DEBUG for now */
4719                         if (ha->flags.quiesce_owner)
4720                                 goto exit;
4721
4722                         qla83xx_idc_unlock(base_vha, 0);
4723                         msleep(1000);
4724                         qla83xx_idc_lock(base_vha, 0);
4725                         dev_init_timeout = jiffies +
4726                             (ha->fcoe_dev_init_timeout * HZ);
4727                         break;
4728                 case QLA8XXX_DEV_FAILED:
4729                         if (ha->flags.nic_core_reset_owner)
4730                                 qla83xx_idc_audit(base_vha,
4731                                     IDC_AUDIT_COMPLETION);
4732                         ha->flags.nic_core_reset_owner = 0;
4733                         __qla83xx_clear_drv_presence(base_vha);
4734                         qla83xx_idc_unlock(base_vha, 0);
4735                         qla8xxx_dev_failed_handler(base_vha);
4736                         rval = QLA_FUNCTION_FAILED;
4737                         qla83xx_idc_lock(base_vha, 0);
4738                         goto exit;
4739                 case QLA8XXX_BAD_VALUE:
4740                         qla83xx_idc_unlock(base_vha, 0);
4741                         msleep(1000);
4742                         qla83xx_idc_lock(base_vha, 0);
4743                         break;
4744                 default:
4745                         ql_log(ql_log_warn, base_vha, 0xb071,
4746                             "Unknown Device State: %x.\n", dev_state);
4747                         qla83xx_idc_unlock(base_vha, 0);
4748                         qla8xxx_dev_failed_handler(base_vha);
4749                         rval = QLA_FUNCTION_FAILED;
4750                         qla83xx_idc_lock(base_vha, 0);
4751                         goto exit;
4752                 }
4753         }
4754
4755 exit:
4756         return rval;
4757 }
4758
4759 void
4760 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4761 {
4762         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4763             board_disable);
4764         struct pci_dev *pdev = ha->pdev;
4765         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4766
4767         ql_log(ql_log_warn, base_vha, 0x015b,
4768             "Disabling adapter.\n");
4769
4770         set_bit(UNLOADING, &base_vha->dpc_flags);
4771
4772         qla2x00_delete_all_vps(ha, base_vha);
4773
4774         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4775
4776         qla2x00_dfs_remove(base_vha);
4777
4778         qla84xx_put_chip(base_vha);
4779
4780         if (base_vha->timer_active)
4781                 qla2x00_stop_timer(base_vha);
4782
4783         base_vha->flags.online = 0;
4784
4785         qla2x00_destroy_deferred_work(ha);
4786
4787         /*
4788          * Do not try to stop beacon blink as it will issue a mailbox
4789          * command.
4790          */
4791         qla2x00_free_sysfs_attr(base_vha, false);
4792
4793         fc_remove_host(base_vha->host);
4794
4795         scsi_remove_host(base_vha->host);
4796
4797         base_vha->flags.init_done = 0;
4798         qla25xx_delete_queues(base_vha);
4799         qla2x00_free_irqs(base_vha);
4800         qla2x00_free_fcports(base_vha);
4801         qla2x00_mem_free(ha);
4802         qla82xx_md_free(base_vha);
4803         qla2x00_free_queues(ha);
4804
4805         qla2x00_unmap_iobases(ha);
4806
4807         pci_release_selected_regions(ha->pdev, ha->bars);
4808         pci_disable_pcie_error_reporting(pdev);
4809         pci_disable_device(pdev);
4810
4811         /*
4812          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
4813          */
4814 }
4815
4816 /**************************************************************************
4817 * qla2x00_do_dpc
4818 *   This kernel thread is a task that is schedule by the interrupt handler
4819 *   to perform the background processing for interrupts.
4820 *
4821 * Notes:
4822 * This task always run in the context of a kernel thread.  It
4823 * is kick-off by the driver's detect code and starts up
4824 * up one per adapter. It immediately goes to sleep and waits for
4825 * some fibre event.  When either the interrupt handler or
4826 * the timer routine detects a event it will one of the task
4827 * bits then wake us up.
4828 **************************************************************************/
4829 static int
4830 qla2x00_do_dpc(void *data)
4831 {
4832         scsi_qla_host_t *base_vha;
4833         struct qla_hw_data *ha;
4834
4835         ha = (struct qla_hw_data *)data;
4836         base_vha = pci_get_drvdata(ha->pdev);
4837
4838         set_user_nice(current, MIN_NICE);
4839
4840         set_current_state(TASK_INTERRUPTIBLE);
4841         while (!kthread_should_stop()) {
4842                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4843                     "DPC handler sleeping.\n");
4844
4845                 schedule();
4846
4847                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4848                         goto end_loop;
4849
4850                 if (ha->flags.eeh_busy) {
4851                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4852                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4853                         goto end_loop;
4854                 }
4855
4856                 ha->dpc_active = 1;
4857
4858                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4859                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4860                     base_vha->dpc_flags);
4861
4862                 qla2x00_do_work(base_vha);
4863
4864                 if (IS_P3P_TYPE(ha)) {
4865                         if (IS_QLA8044(ha)) {
4866                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4867                                         &base_vha->dpc_flags)) {
4868                                         qla8044_idc_lock(ha);
4869                                         qla8044_wr_direct(base_vha,
4870                                                 QLA8044_CRB_DEV_STATE_INDEX,
4871                                                 QLA8XXX_DEV_FAILED);
4872                                         qla8044_idc_unlock(ha);
4873                                         ql_log(ql_log_info, base_vha, 0x4004,
4874                                                 "HW State: FAILED.\n");
4875                                         qla8044_device_state_handler(base_vha);
4876                                         continue;
4877                                 }
4878
4879                         } else {
4880                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4881                                         &base_vha->dpc_flags)) {
4882                                         qla82xx_idc_lock(ha);
4883                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4884                                                 QLA8XXX_DEV_FAILED);
4885                                         qla82xx_idc_unlock(ha);
4886                                         ql_log(ql_log_info, base_vha, 0x0151,
4887                                                 "HW State: FAILED.\n");
4888                                         qla82xx_device_state_handler(base_vha);
4889                                         continue;
4890                                 }
4891                         }
4892
4893                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4894                                 &base_vha->dpc_flags)) {
4895
4896                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4897                                     "FCoE context reset scheduled.\n");
4898                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4899                                         &base_vha->dpc_flags))) {
4900                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4901                                                 /* FCoE-ctx reset failed.
4902                                                  * Escalate to chip-reset
4903                                                  */
4904                                                 set_bit(ISP_ABORT_NEEDED,
4905                                                         &base_vha->dpc_flags);
4906                                         }
4907                                         clear_bit(ABORT_ISP_ACTIVE,
4908                                                 &base_vha->dpc_flags);
4909                                 }
4910
4911                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4912                                     "FCoE context reset end.\n");
4913                         }
4914                 } else if (IS_QLAFX00(ha)) {
4915                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4916                                 &base_vha->dpc_flags)) {
4917                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4918                                     "Firmware Reset Recovery\n");
4919                                 if (qlafx00_reset_initialize(base_vha)) {
4920                                         /* Failed. Abort isp later. */
4921                                         if (!test_bit(UNLOADING,
4922                                             &base_vha->dpc_flags)) {
4923                                                 set_bit(ISP_UNRECOVERABLE,
4924                                                     &base_vha->dpc_flags);
4925                                                 ql_dbg(ql_dbg_dpc, base_vha,
4926                                                     0x4021,
4927                                                     "Reset Recovery Failed\n");
4928                                         }
4929                                 }
4930                         }
4931
4932                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4933                                 &base_vha->dpc_flags)) {
4934                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4935                                     "ISPFx00 Target Scan scheduled\n");
4936                                 if (qlafx00_rescan_isp(base_vha)) {
4937                                         if (!test_bit(UNLOADING,
4938                                             &base_vha->dpc_flags))
4939                                                 set_bit(ISP_UNRECOVERABLE,
4940                                                     &base_vha->dpc_flags);
4941                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4942                                             "ISPFx00 Target Scan Failed\n");
4943                                 }
4944                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4945                                     "ISPFx00 Target Scan End\n");
4946                         }
4947                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4948                                 &base_vha->dpc_flags)) {
4949                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4950                                     "ISPFx00 Host Info resend scheduled\n");
4951                                 qlafx00_fx_disc(base_vha,
4952                                     &base_vha->hw->mr.fcport,
4953                                     FXDISC_REG_HOST_INFO);
4954                         }
4955                 }
4956
4957                 if (test_and_clear_bit
4958                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
4959                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
4960
4961                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4962                             "ISP abort scheduled.\n");
4963                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4964                             &base_vha->dpc_flags))) {
4965
4966                                 if (ha->isp_ops->abort_isp(base_vha)) {
4967                                         /* failed. retry later */
4968                                         set_bit(ISP_ABORT_NEEDED,
4969                                             &base_vha->dpc_flags);
4970                                 }
4971                                 clear_bit(ABORT_ISP_ACTIVE,
4972                                                 &base_vha->dpc_flags);
4973                         }
4974
4975                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4976                             "ISP abort end.\n");
4977                 }
4978
4979                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4980                     &base_vha->dpc_flags)) {
4981                         qla2x00_update_fcports(base_vha);
4982                 }
4983
4984                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4985                         int ret;
4986                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4987                         if (ret != QLA_SUCCESS)
4988                                 ql_log(ql_log_warn, base_vha, 0x121,
4989                                     "Failed to enable receiving of RSCN "
4990                                     "requests: 0x%x.\n", ret);
4991                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4992                 }
4993
4994                 if (IS_QLAFX00(ha))
4995                         goto loop_resync_check;
4996
4997                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4998                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4999                             "Quiescence mode scheduled.\n");
5000                         if (IS_P3P_TYPE(ha)) {
5001                                 if (IS_QLA82XX(ha))
5002                                         qla82xx_device_state_handler(base_vha);
5003                                 if (IS_QLA8044(ha))
5004                                         qla8044_device_state_handler(base_vha);
5005                                 clear_bit(ISP_QUIESCE_NEEDED,
5006                                     &base_vha->dpc_flags);
5007                                 if (!ha->flags.quiesce_owner) {
5008                                         qla2x00_perform_loop_resync(base_vha);
5009                                         if (IS_QLA82XX(ha)) {
5010                                                 qla82xx_idc_lock(ha);
5011                                                 qla82xx_clear_qsnt_ready(
5012                                                     base_vha);
5013                                                 qla82xx_idc_unlock(ha);
5014                                         } else if (IS_QLA8044(ha)) {
5015                                                 qla8044_idc_lock(ha);
5016                                                 qla8044_clear_qsnt_ready(
5017                                                     base_vha);
5018                                                 qla8044_idc_unlock(ha);
5019                                         }
5020                                 }
5021                         } else {
5022                                 clear_bit(ISP_QUIESCE_NEEDED,
5023                                     &base_vha->dpc_flags);
5024                                 qla2x00_quiesce_io(base_vha);
5025                         }
5026                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5027                             "Quiescence mode end.\n");
5028                 }
5029
5030                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5031                                 &base_vha->dpc_flags) &&
5032                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5033
5034                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5035                             "Reset marker scheduled.\n");
5036                         qla2x00_rst_aen(base_vha);
5037                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5038                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5039                             "Reset marker end.\n");
5040                 }
5041
5042                 /* Retry each device up to login retry count */
5043                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5044                                                 &base_vha->dpc_flags)) &&
5045                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5046                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5047
5048                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5049                             "Relogin scheduled.\n");
5050                         qla2x00_relogin(base_vha);
5051                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5052                             "Relogin end.\n");
5053                 }
5054 loop_resync_check:
5055                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5056                     &base_vha->dpc_flags)) {
5057
5058                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5059                             "Loop resync scheduled.\n");
5060
5061                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5062                             &base_vha->dpc_flags))) {
5063
5064                                 qla2x00_loop_resync(base_vha);
5065
5066                                 clear_bit(LOOP_RESYNC_ACTIVE,
5067                                                 &base_vha->dpc_flags);
5068                         }
5069
5070                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5071                             "Loop resync end.\n");
5072                 }
5073
5074                 if (IS_QLAFX00(ha))
5075                         goto intr_on_check;
5076
5077                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5078                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5079                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5080                         qla2xxx_flash_npiv_conf(base_vha);
5081                 }
5082
5083 intr_on_check:
5084                 if (!ha->interrupts_on)
5085                         ha->isp_ops->enable_intrs(ha);
5086
5087                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5088                                         &base_vha->dpc_flags)) {
5089                         if (ha->beacon_blink_led == 1)
5090                                 ha->isp_ops->beacon_blink(base_vha);
5091                 }
5092
5093                 if (!IS_QLAFX00(ha))
5094                         qla2x00_do_dpc_all_vps(base_vha);
5095
5096                 ha->dpc_active = 0;
5097 end_loop:
5098                 set_current_state(TASK_INTERRUPTIBLE);
5099         } /* End of while(1) */
5100         __set_current_state(TASK_RUNNING);
5101
5102         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5103             "DPC handler exiting.\n");
5104
5105         /*
5106          * Make sure that nobody tries to wake us up again.
5107          */
5108         ha->dpc_active = 0;
5109
5110         /* Cleanup any residual CTX SRBs. */
5111         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5112
5113         return 0;
5114 }
5115
5116 void
5117 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5118 {
5119         struct qla_hw_data *ha = vha->hw;
5120         struct task_struct *t = ha->dpc_thread;
5121
5122         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5123                 wake_up_process(t);
5124 }
5125
5126 /*
5127 *  qla2x00_rst_aen
5128 *      Processes asynchronous reset.
5129 *
5130 * Input:
5131 *      ha  = adapter block pointer.
5132 */
5133 static void
5134 qla2x00_rst_aen(scsi_qla_host_t *vha)
5135 {
5136         if (vha->flags.online && !vha->flags.reset_active &&
5137             !atomic_read(&vha->loop_down_timer) &&
5138             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5139                 do {
5140                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5141
5142                         /*
5143                          * Issue marker command only when we are going to start
5144                          * the I/O.
5145                          */
5146                         vha->marker_needed = 1;
5147                 } while (!atomic_read(&vha->loop_down_timer) &&
5148                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5149         }
5150 }
5151
5152 /**************************************************************************
5153 *   qla2x00_timer
5154 *
5155 * Description:
5156 *   One second timer
5157 *
5158 * Context: Interrupt
5159 ***************************************************************************/
5160 void
5161 qla2x00_timer(scsi_qla_host_t *vha)
5162 {
5163         unsigned long   cpu_flags = 0;
5164         int             start_dpc = 0;
5165         int             index;
5166         srb_t           *sp;
5167         uint16_t        w;
5168         struct qla_hw_data *ha = vha->hw;
5169         struct req_que *req;
5170
5171         if (ha->flags.eeh_busy) {
5172                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5173                     "EEH = %d, restarting timer.\n",
5174                     ha->flags.eeh_busy);
5175                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5176                 return;
5177         }
5178
5179         /*
5180          * Hardware read to raise pending EEH errors during mailbox waits. If
5181          * the read returns -1 then disable the board.
5182          */
5183         if (!pci_channel_offline(ha->pdev)) {
5184                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5185                 qla2x00_check_reg16_for_disconnect(vha, w);
5186         }
5187
5188         /* Make sure qla82xx_watchdog is run only for physical port */
5189         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5190                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5191                         start_dpc++;
5192                 if (IS_QLA82XX(ha))
5193                         qla82xx_watchdog(vha);
5194                 else if (IS_QLA8044(ha))
5195                         qla8044_watchdog(vha);
5196         }
5197
5198         if (!vha->vp_idx && IS_QLAFX00(ha))
5199                 qlafx00_timer_routine(vha);
5200
5201         /* Loop down handler. */
5202         if (atomic_read(&vha->loop_down_timer) > 0 &&
5203             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5204             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5205                 && vha->flags.online) {
5206
5207                 if (atomic_read(&vha->loop_down_timer) ==
5208                     vha->loop_down_abort_time) {
5209
5210                         ql_log(ql_log_info, vha, 0x6008,
5211                             "Loop down - aborting the queues before time expires.\n");
5212
5213                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5214                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5215
5216                         /*
5217                          * Schedule an ISP abort to return any FCP2-device
5218                          * commands.
5219                          */
5220                         /* NPIV - scan physical port only */
5221                         if (!vha->vp_idx) {
5222                                 spin_lock_irqsave(&ha->hardware_lock,
5223                                     cpu_flags);
5224                                 req = ha->req_q_map[0];
5225                                 for (index = 1;
5226                                     index < req->num_outstanding_cmds;
5227                                     index++) {
5228                                         fc_port_t *sfcp;
5229
5230                                         sp = req->outstanding_cmds[index];
5231                                         if (!sp)
5232                                                 continue;
5233                                         if (sp->type != SRB_SCSI_CMD)
5234                                                 continue;
5235                                         sfcp = sp->fcport;
5236                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5237                                                 continue;
5238
5239                                         if (IS_QLA82XX(ha))
5240                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5241                                                         &vha->dpc_flags);
5242                                         else
5243                                                 set_bit(ISP_ABORT_NEEDED,
5244                                                         &vha->dpc_flags);
5245                                         break;
5246                                 }
5247                                 spin_unlock_irqrestore(&ha->hardware_lock,
5248                                                                 cpu_flags);
5249                         }
5250                         start_dpc++;
5251                 }
5252
5253                 /* if the loop has been down for 4 minutes, reinit adapter */
5254                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5255                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5256                                 ql_log(ql_log_warn, vha, 0x6009,
5257                                     "Loop down - aborting ISP.\n");
5258
5259                                 if (IS_QLA82XX(ha))
5260                                         set_bit(FCOE_CTX_RESET_NEEDED,
5261                                                 &vha->dpc_flags);
5262                                 else
5263                                         set_bit(ISP_ABORT_NEEDED,
5264                                                 &vha->dpc_flags);
5265                         }
5266                 }
5267                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5268                     "Loop down - seconds remaining %d.\n",
5269                     atomic_read(&vha->loop_down_timer));
5270         }
5271         /* Check if beacon LED needs to be blinked for physical host only */
5272         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5273                 /* There is no beacon_blink function for ISP82xx */
5274                 if (!IS_P3P_TYPE(ha)) {
5275                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5276                         start_dpc++;
5277                 }
5278         }
5279
5280         /* Process any deferred work. */
5281         if (!list_empty(&vha->work_list))
5282                 start_dpc++;
5283
5284         /* Schedule the DPC routine if needed */
5285         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5286             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5287             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5288             start_dpc ||
5289             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5290             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5291             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5292             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5293             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5294             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5295                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5296                     "isp_abort_needed=%d loop_resync_needed=%d "
5297                     "fcport_update_needed=%d start_dpc=%d "
5298                     "reset_marker_needed=%d",
5299                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5300                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5301                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5302                     start_dpc,
5303                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5304                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5305                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5306                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5307                     "relogin_needed=%d.\n",
5308                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5309                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5310                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5311                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5312                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5313                 qla2xxx_wake_dpc(vha);
5314         }
5315
5316         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5317 }
5318
5319 /* Firmware interface routines. */
5320
5321 #define FW_BLOBS        11
5322 #define FW_ISP21XX      0
5323 #define FW_ISP22XX      1
5324 #define FW_ISP2300      2
5325 #define FW_ISP2322      3
5326 #define FW_ISP24XX      4
5327 #define FW_ISP25XX      5
5328 #define FW_ISP81XX      6
5329 #define FW_ISP82XX      7
5330 #define FW_ISP2031      8
5331 #define FW_ISP8031      9
5332 #define FW_ISP27XX      10
5333
5334 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
5335 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
5336 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
5337 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
5338 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
5339 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
5340 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
5341 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
5342 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
5343 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
5344 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
5345
5346
5347 static DEFINE_MUTEX(qla_fw_lock);
5348
5349 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5350         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5351         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5352         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5353         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5354         { .name = FW_FILE_ISP24XX, },
5355         { .name = FW_FILE_ISP25XX, },
5356         { .name = FW_FILE_ISP81XX, },
5357         { .name = FW_FILE_ISP82XX, },
5358         { .name = FW_FILE_ISP2031, },
5359         { .name = FW_FILE_ISP8031, },
5360         { .name = FW_FILE_ISP27XX, },
5361 };
5362
5363 struct fw_blob *
5364 qla2x00_request_firmware(scsi_qla_host_t *vha)
5365 {
5366         struct qla_hw_data *ha = vha->hw;
5367         struct fw_blob *blob;
5368
5369         if (IS_QLA2100(ha)) {
5370                 blob = &qla_fw_blobs[FW_ISP21XX];
5371         } else if (IS_QLA2200(ha)) {
5372                 blob = &qla_fw_blobs[FW_ISP22XX];
5373         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5374                 blob = &qla_fw_blobs[FW_ISP2300];
5375         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5376                 blob = &qla_fw_blobs[FW_ISP2322];
5377         } else if (IS_QLA24XX_TYPE(ha)) {
5378                 blob = &qla_fw_blobs[FW_ISP24XX];
5379         } else if (IS_QLA25XX(ha)) {
5380                 blob = &qla_fw_blobs[FW_ISP25XX];
5381         } else if (IS_QLA81XX(ha)) {
5382                 blob = &qla_fw_blobs[FW_ISP81XX];
5383         } else if (IS_QLA82XX(ha)) {
5384                 blob = &qla_fw_blobs[FW_ISP82XX];
5385         } else if (IS_QLA2031(ha)) {
5386                 blob = &qla_fw_blobs[FW_ISP2031];
5387         } else if (IS_QLA8031(ha)) {
5388                 blob = &qla_fw_blobs[FW_ISP8031];
5389         } else if (IS_QLA27XX(ha)) {
5390                 blob = &qla_fw_blobs[FW_ISP27XX];
5391         } else {
5392                 return NULL;
5393         }
5394
5395         mutex_lock(&qla_fw_lock);
5396         if (blob->fw)
5397                 goto out;
5398
5399         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5400                 ql_log(ql_log_warn, vha, 0x0063,
5401                     "Failed to load firmware image (%s).\n", blob->name);
5402                 blob->fw = NULL;
5403                 blob = NULL;
5404                 goto out;
5405         }
5406
5407 out:
5408         mutex_unlock(&qla_fw_lock);
5409         return blob;
5410 }
5411
5412 static void
5413 qla2x00_release_firmware(void)
5414 {
5415         int idx;
5416
5417         mutex_lock(&qla_fw_lock);
5418         for (idx = 0; idx < FW_BLOBS; idx++)
5419                 release_firmware(qla_fw_blobs[idx].fw);
5420         mutex_unlock(&qla_fw_lock);
5421 }
5422
5423 static pci_ers_result_t
5424 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5425 {
5426         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5427         struct qla_hw_data *ha = vha->hw;
5428
5429         ql_dbg(ql_dbg_aer, vha, 0x9000,
5430             "PCI error detected, state %x.\n", state);
5431
5432         switch (state) {
5433         case pci_channel_io_normal:
5434                 ha->flags.eeh_busy = 0;
5435                 return PCI_ERS_RESULT_CAN_RECOVER;
5436         case pci_channel_io_frozen:
5437                 ha->flags.eeh_busy = 1;
5438                 /* For ISP82XX complete any pending mailbox cmd */
5439                 if (IS_QLA82XX(ha)) {
5440                         ha->flags.isp82xx_fw_hung = 1;
5441                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5442                         qla82xx_clear_pending_mbx(vha);
5443                 }
5444                 qla2x00_free_irqs(vha);
5445                 pci_disable_device(pdev);
5446                 /* Return back all IOs */
5447                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5448                 return PCI_ERS_RESULT_NEED_RESET;
5449         case pci_channel_io_perm_failure:
5450                 ha->flags.pci_channel_io_perm_failure = 1;
5451                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5452                 return PCI_ERS_RESULT_DISCONNECT;
5453         }
5454         return PCI_ERS_RESULT_NEED_RESET;
5455 }
5456
5457 static pci_ers_result_t
5458 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5459 {
5460         int risc_paused = 0;
5461         uint32_t stat;
5462         unsigned long flags;
5463         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5464         struct qla_hw_data *ha = base_vha->hw;
5465         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5466         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5467
5468         if (IS_QLA82XX(ha))
5469                 return PCI_ERS_RESULT_RECOVERED;
5470
5471         spin_lock_irqsave(&ha->hardware_lock, flags);
5472         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5473                 stat = RD_REG_DWORD(&reg->hccr);
5474                 if (stat & HCCR_RISC_PAUSE)
5475                         risc_paused = 1;
5476         } else if (IS_QLA23XX(ha)) {
5477                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5478                 if (stat & HSR_RISC_PAUSED)
5479                         risc_paused = 1;
5480         } else if (IS_FWI2_CAPABLE(ha)) {
5481                 stat = RD_REG_DWORD(&reg24->host_status);
5482                 if (stat & HSRX_RISC_PAUSED)
5483                         risc_paused = 1;
5484         }
5485         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5486
5487         if (risc_paused) {
5488                 ql_log(ql_log_info, base_vha, 0x9003,
5489                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5490                 ha->isp_ops->fw_dump(base_vha, 0);
5491
5492                 return PCI_ERS_RESULT_NEED_RESET;
5493         } else
5494                 return PCI_ERS_RESULT_RECOVERED;
5495 }
5496
5497 static uint32_t
5498 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5499 {
5500         uint32_t rval = QLA_FUNCTION_FAILED;
5501         uint32_t drv_active = 0;
5502         struct qla_hw_data *ha = base_vha->hw;
5503         int fn;
5504         struct pci_dev *other_pdev = NULL;
5505
5506         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5507             "Entered %s.\n", __func__);
5508
5509         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5510
5511         if (base_vha->flags.online) {
5512                 /* Abort all outstanding commands,
5513                  * so as to be requeued later */
5514                 qla2x00_abort_isp_cleanup(base_vha);
5515         }
5516
5517
5518         fn = PCI_FUNC(ha->pdev->devfn);
5519         while (fn > 0) {
5520                 fn--;
5521                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5522                     "Finding pci device at function = 0x%x.\n", fn);
5523                 other_pdev =
5524                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5525                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5526                     fn));
5527
5528                 if (!other_pdev)
5529                         continue;
5530                 if (atomic_read(&other_pdev->enable_cnt)) {
5531                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5532                             "Found PCI func available and enable at 0x%x.\n",
5533                             fn);
5534                         pci_dev_put(other_pdev);
5535                         break;
5536                 }
5537                 pci_dev_put(other_pdev);
5538         }
5539
5540         if (!fn) {
5541                 /* Reset owner */
5542                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5543                     "This devfn is reset owner = 0x%x.\n",
5544                     ha->pdev->devfn);
5545                 qla82xx_idc_lock(ha);
5546
5547                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5548                     QLA8XXX_DEV_INITIALIZING);
5549
5550                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5551                     QLA82XX_IDC_VERSION);
5552
5553                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5554                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5555                     "drv_active = 0x%x.\n", drv_active);
5556
5557                 qla82xx_idc_unlock(ha);
5558                 /* Reset if device is not already reset
5559                  * drv_active would be 0 if a reset has already been done
5560                  */
5561                 if (drv_active)
5562                         rval = qla82xx_start_firmware(base_vha);
5563                 else
5564                         rval = QLA_SUCCESS;
5565                 qla82xx_idc_lock(ha);
5566
5567                 if (rval != QLA_SUCCESS) {
5568                         ql_log(ql_log_info, base_vha, 0x900b,
5569                             "HW State: FAILED.\n");
5570                         qla82xx_clear_drv_active(ha);
5571                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5572                             QLA8XXX_DEV_FAILED);
5573                 } else {
5574                         ql_log(ql_log_info, base_vha, 0x900c,
5575                             "HW State: READY.\n");
5576                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5577                             QLA8XXX_DEV_READY);
5578                         qla82xx_idc_unlock(ha);
5579                         ha->flags.isp82xx_fw_hung = 0;
5580                         rval = qla82xx_restart_isp(base_vha);
5581                         qla82xx_idc_lock(ha);
5582                         /* Clear driver state register */
5583                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5584                         qla82xx_set_drv_active(base_vha);
5585                 }
5586                 qla82xx_idc_unlock(ha);
5587         } else {
5588                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5589                     "This devfn is not reset owner = 0x%x.\n",
5590                     ha->pdev->devfn);
5591                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5592                     QLA8XXX_DEV_READY)) {
5593                         ha->flags.isp82xx_fw_hung = 0;
5594                         rval = qla82xx_restart_isp(base_vha);
5595                         qla82xx_idc_lock(ha);
5596                         qla82xx_set_drv_active(base_vha);
5597                         qla82xx_idc_unlock(ha);
5598                 }
5599         }
5600         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5601
5602         return rval;
5603 }
5604
5605 static pci_ers_result_t
5606 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5607 {
5608         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5609         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5610         struct qla_hw_data *ha = base_vha->hw;
5611         struct rsp_que *rsp;
5612         int rc, retries = 10;
5613
5614         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5615             "Slot Reset.\n");
5616
5617         /* Workaround: qla2xxx driver which access hardware earlier
5618          * needs error state to be pci_channel_io_online.
5619          * Otherwise mailbox command timesout.
5620          */
5621         pdev->error_state = pci_channel_io_normal;
5622
5623         pci_restore_state(pdev);
5624
5625         /* pci_restore_state() clears the saved_state flag of the device
5626          * save restored state which resets saved_state flag
5627          */
5628         pci_save_state(pdev);
5629
5630         if (ha->mem_only)
5631                 rc = pci_enable_device_mem(pdev);
5632         else
5633                 rc = pci_enable_device(pdev);
5634
5635         if (rc) {
5636                 ql_log(ql_log_warn, base_vha, 0x9005,
5637                     "Can't re-enable PCI device after reset.\n");
5638                 goto exit_slot_reset;
5639         }
5640
5641         rsp = ha->rsp_q_map[0];
5642         if (qla2x00_request_irqs(ha, rsp))
5643                 goto exit_slot_reset;
5644
5645         if (ha->isp_ops->pci_config(base_vha))
5646                 goto exit_slot_reset;
5647
5648         if (IS_QLA82XX(ha)) {
5649                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5650                         ret = PCI_ERS_RESULT_RECOVERED;
5651                         goto exit_slot_reset;
5652                 } else
5653                         goto exit_slot_reset;
5654         }
5655
5656         while (ha->flags.mbox_busy && retries--)
5657                 msleep(1000);
5658
5659         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5660         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5661                 ret =  PCI_ERS_RESULT_RECOVERED;
5662         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5663
5664
5665 exit_slot_reset:
5666         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5667             "slot_reset return %x.\n", ret);
5668
5669         return ret;
5670 }
5671
5672 static void
5673 qla2xxx_pci_resume(struct pci_dev *pdev)
5674 {
5675         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5676         struct qla_hw_data *ha = base_vha->hw;
5677         int ret;
5678
5679         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5680             "pci_resume.\n");
5681
5682         ret = qla2x00_wait_for_hba_online(base_vha);
5683         if (ret != QLA_SUCCESS) {
5684                 ql_log(ql_log_fatal, base_vha, 0x9002,
5685                     "The device failed to resume I/O from slot/link_reset.\n");
5686         }
5687
5688         pci_cleanup_aer_uncorrect_error_status(pdev);
5689
5690         ha->flags.eeh_busy = 0;
5691 }
5692
5693 static void
5694 qla83xx_disable_laser(scsi_qla_host_t *vha)
5695 {
5696         uint32_t reg, data, fn;
5697         struct qla_hw_data *ha = vha->hw;
5698         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5699
5700         /* pci func #/port # */
5701         ql_dbg(ql_dbg_init, vha, 0x004b,
5702             "Disabling Laser for hba: %p\n", vha);
5703
5704         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5705                 (BIT_15|BIT_14|BIT_13|BIT_12));
5706
5707         fn = (fn >> 12);
5708
5709         if (fn & 1)
5710                 reg = PORT_1_2031;
5711         else
5712                 reg = PORT_0_2031;
5713
5714         data = LASER_OFF_2031;
5715
5716         qla83xx_wr_reg(vha, reg, data);
5717 }
5718
5719 static const struct pci_error_handlers qla2xxx_err_handler = {
5720         .error_detected = qla2xxx_pci_error_detected,
5721         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5722         .slot_reset = qla2xxx_pci_slot_reset,
5723         .resume = qla2xxx_pci_resume,
5724 };
5725
5726 static struct pci_device_id qla2xxx_pci_tbl[] = {
5727         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5728         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5729         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5730         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5731         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5732         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5733         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5734         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5735         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5736         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5737         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5738         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5739         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5740         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5741         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5742         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5743         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5744         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5745         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5746         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5747         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5748         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
5749         { 0 },
5750 };
5751 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5752
5753 static struct pci_driver qla2xxx_pci_driver = {
5754         .name           = QLA2XXX_DRIVER_NAME,
5755         .driver         = {
5756                 .owner          = THIS_MODULE,
5757         },
5758         .id_table       = qla2xxx_pci_tbl,
5759         .probe          = qla2x00_probe_one,
5760         .remove         = qla2x00_remove_one,
5761         .shutdown       = qla2x00_shutdown,
5762         .err_handler    = &qla2xxx_err_handler,
5763 };
5764
5765 static const struct file_operations apidev_fops = {
5766         .owner = THIS_MODULE,
5767         .llseek = noop_llseek,
5768 };
5769
5770 /**
5771  * qla2x00_module_init - Module initialization.
5772  **/
5773 static int __init
5774 qla2x00_module_init(void)
5775 {
5776         int ret = 0;
5777
5778         /* Allocate cache for SRBs. */
5779         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5780             SLAB_HWCACHE_ALIGN, NULL);
5781         if (srb_cachep == NULL) {
5782                 ql_log(ql_log_fatal, NULL, 0x0001,
5783                     "Unable to allocate SRB cache...Failing load!.\n");
5784                 return -ENOMEM;
5785         }
5786
5787         /* Initialize target kmem_cache and mem_pools */
5788         ret = qlt_init();
5789         if (ret < 0) {
5790                 goto destroy_cache;
5791         } else if (ret > 0) {
5792                 /*
5793                  * If initiator mode is explictly disabled by qlt_init(),
5794                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5795                  * performing scsi_scan_target() during LOOP UP event.
5796                  */
5797                 qla2xxx_transport_functions.disable_target_scan = 1;
5798                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5799         }
5800
5801         /* Derive version string. */
5802         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5803         if (ql2xextended_error_logging)
5804                 strcat(qla2x00_version_str, "-debug");
5805
5806         qla2xxx_transport_template =
5807             fc_attach_transport(&qla2xxx_transport_functions);
5808         if (!qla2xxx_transport_template) {
5809                 ql_log(ql_log_fatal, NULL, 0x0002,
5810                     "fc_attach_transport failed...Failing load!.\n");
5811                 ret = -ENODEV;
5812                 goto qlt_exit;
5813         }
5814
5815         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5816         if (apidev_major < 0) {
5817                 ql_log(ql_log_fatal, NULL, 0x0003,
5818                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5819         }
5820
5821         qla2xxx_transport_vport_template =
5822             fc_attach_transport(&qla2xxx_transport_vport_functions);
5823         if (!qla2xxx_transport_vport_template) {
5824                 ql_log(ql_log_fatal, NULL, 0x0004,
5825                     "fc_attach_transport vport failed...Failing load!.\n");
5826                 ret = -ENODEV;
5827                 goto unreg_chrdev;
5828         }
5829         ql_log(ql_log_info, NULL, 0x0005,
5830             "QLogic Fibre Channel HBA Driver: %s.\n",
5831             qla2x00_version_str);
5832         ret = pci_register_driver(&qla2xxx_pci_driver);
5833         if (ret) {
5834                 ql_log(ql_log_fatal, NULL, 0x0006,
5835                     "pci_register_driver failed...ret=%d Failing load!.\n",
5836                     ret);
5837                 goto release_vport_transport;
5838         }
5839         return ret;
5840
5841 release_vport_transport:
5842         fc_release_transport(qla2xxx_transport_vport_template);
5843
5844 unreg_chrdev:
5845         if (apidev_major >= 0)
5846                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5847         fc_release_transport(qla2xxx_transport_template);
5848
5849 qlt_exit:
5850         qlt_exit();
5851
5852 destroy_cache:
5853         kmem_cache_destroy(srb_cachep);
5854         return ret;
5855 }
5856
5857 /**
5858  * qla2x00_module_exit - Module cleanup.
5859  **/
5860 static void __exit
5861 qla2x00_module_exit(void)
5862 {
5863         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5864         pci_unregister_driver(&qla2xxx_pci_driver);
5865         qla2x00_release_firmware();
5866         kmem_cache_destroy(srb_cachep);
5867         qlt_exit();
5868         if (ctx_cachep)
5869                 kmem_cache_destroy(ctx_cachep);
5870         fc_release_transport(qla2xxx_transport_template);
5871         fc_release_transport(qla2xxx_transport_vport_template);
5872 }
5873
5874 module_init(qla2x00_module_init);
5875 module_exit(qla2x00_module_exit);
5876
5877 MODULE_AUTHOR("QLogic Corporation");
5878 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5879 MODULE_LICENSE("GPL");
5880 MODULE_VERSION(QLA2XXX_VERSION);
5881 /*(DEBLOBBED)*/