drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18 #include <linux/crash_dump.h>
  19
  20 #include <scsi/scsi_tcq.h>
  21 #include <scsi/scsicam.h>
  22 #include <scsi/scsi_transport.h>
  23 #include <scsi/scsi_transport_fc.h>
  24
  25 #include "qla_target.h"
  26
  27 /*
  28  * Driver version
  29  */
  30 char qla2x00_version_str[40];
  31
  32 static int apidev_major;
  33
  34 /*
  35  * SRB allocation cache
  36  */
  37 struct kmem_cache *srb_cachep;
  38
  39 /*
  40  * CT6 CTX allocation cache
  41  */
  42 static struct kmem_cache *ctx_cachep;
  43 /*
  44  * error level for logging
  45  */
  46 uint ql_errlev = 0x8001;
  47
  48 static int ql2xenableclass2;
  49 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  50 MODULE_PARM_DESC(ql2xenableclass2,
  51                 "Specify if Class 2 operations are supported from the very "
  52                 "beginning. Default is 0 - class 2 not supported.");
  53
  54
  55 int ql2xlogintimeout = 20;
  56 module_param(ql2xlogintimeout, int, S_IRUGO);
  57 MODULE_PARM_DESC(ql2xlogintimeout,
  58                 "Login timeout value in seconds.");
  59
  60 int qlport_down_retry;
  61 module_param(qlport_down_retry, int, S_IRUGO);
  62 MODULE_PARM_DESC(qlport_down_retry,
  63                 "Maximum number of command retries to a port that returns "
  64                 "a PORT-DOWN status.");
  65
  66 int ql2xplogiabsentdevice;
  67 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  68 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  69                 "Option to enable PLOGI to devices that are not present after "
  70                 "a Fabric scan.  This is needed for several broken switches. "
  71                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  72
  73 int ql2xloginretrycount;
  74 module_param(ql2xloginretrycount, int, S_IRUGO);
  75 MODULE_PARM_DESC(ql2xloginretrycount,
  76                 "Specify an alternate value for the NVRAM login retry count.");
  77
  78 int ql2xallocfwdump = 1;
  79 module_param(ql2xallocfwdump, int, S_IRUGO);
  80 MODULE_PARM_DESC(ql2xallocfwdump,
  81                 "Option to enable allocation of memory for a firmware dump "
  82                 "during HBA initialization.  Memory allocation requirements "
  83                 "vary by ISP type.  Default is 1 - allocate memory.");
  84
  85 int ql2xextended_error_logging;
  86 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  88 MODULE_PARM_DESC(ql2xextended_error_logging,
  89                 "Option to enable extended error logging,\n"
  90                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  91                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  92                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  93                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  94                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  95                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  96                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  97                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  98                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  99                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 100                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 101                 "\t\t0x1e400000 - Preferred value for capturing essential "
 102                 "debug information (equivalent to old "
 103                 "ql2xextended_error_logging=1).\n"
 104                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 105
 106 int ql2xshiftctondsd = 6;
 107 module_param(ql2xshiftctondsd, int, S_IRUGO);
 108 MODULE_PARM_DESC(ql2xshiftctondsd,
 109                 "Set to control shifting of command type processing "
 110                 "based on total number of SG elements.");
 111
 112 int ql2xfdmienable = 1;
 113 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 115 MODULE_PARM_DESC(ql2xfdmienable,
 116                 "Enables FDMI registrations. "
 117                 "0 - no FDMI. Default is 1 - perform FDMI.");
 118
 119 #define MAX_Q_DEPTH     64
 120 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 121 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 122 MODULE_PARM_DESC(ql2xmaxqdepth,
 123                 "Maximum queue depth to set for each LUN. "
 124                 "Default is 64.");
 125
 126 #if (IS_ENABLED(CONFIG_NVME_FC))
 127 int ql2xenabledif;
 128 #else
 129 int ql2xenabledif = 2;
 130 #endif
 131 module_param(ql2xenabledif, int, S_IRUGO);
 132 MODULE_PARM_DESC(ql2xenabledif,
 133                 " Enable T10-CRC-DIF:\n"
 134                 " Default is 2.\n"
 135                 "  0 -- No DIF Support\n"
 136                 "  1 -- Enable DIF for all types\n"
 137                 "  2 -- Enable DIF for all types, except Type 0.\n");
 138
 139 #if (IS_ENABLED(CONFIG_NVME_FC))
 140 int ql2xnvmeenable = 1;
 141 #else
 142 int ql2xnvmeenable;
 143 #endif
 144 module_param(ql2xnvmeenable, int, 0644);
 145 MODULE_PARM_DESC(ql2xnvmeenable,
 146     "Enables NVME support. "
 147     "0 - no NVMe.  Default is Y");
 148
 149 int ql2xenablehba_err_chk = 2;
 150 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 151 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 152                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 153                 " Default is 2.\n"
 154                 "  0 -- Error isolation disabled\n"
 155                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 156                 "  2 -- Error isolation enabled for all Types\n");
 157
 158 int ql2xiidmaenable = 1;
 159 module_param(ql2xiidmaenable, int, S_IRUGO);
 160 MODULE_PARM_DESC(ql2xiidmaenable,
 161                 "Enables iIDMA settings "
 162                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 163
 164 int ql2xmqsupport = 1;
 165 module_param(ql2xmqsupport, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xmqsupport,
 167                 "Enable on demand multiple queue pairs support "
 168                 "Default is 1 for supported. "
 169                 "Set it to 0 to turn off mq qpair support.");
 170
 171 int ql2xfwloadbin;
 172 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 174 MODULE_PARM_DESC(ql2xfwloadbin,
 175                 "Option to specify location from which to load ISP firmware:.\n"
 176                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 177                 "      interface.\n"
 178                 " 1 -- load firmware from flash.\n"
 179                 " 0 -- use default semantics.\n");
 180
 181 int ql2xetsenable;
 182 module_param(ql2xetsenable, int, S_IRUGO);
 183 MODULE_PARM_DESC(ql2xetsenable,
 184                 "Enables firmware ETS burst."
 185                 "Default is 0 - skip ETS enablement.");
 186
 187 int ql2xdbwr = 1;
 188 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 189 MODULE_PARM_DESC(ql2xdbwr,
 190                 "Option to specify scheme for request queue posting.\n"
 191                 " 0 -- Regular doorbell.\n"
 192                 " 1 -- CAMRAM doorbell (faster).\n");
 193
 194 int ql2xgffidenable;
 195 module_param(ql2xgffidenable, int, S_IRUGO);
 196 MODULE_PARM_DESC(ql2xgffidenable,
 197                 "Enables GFF_ID checks of port type. "
 198                 "Default is 0 - Do not use GFF_ID information.");
 199
 200 int ql2xasynctmfenable = 1;
 201 module_param(ql2xasynctmfenable, int, S_IRUGO);
 202 MODULE_PARM_DESC(ql2xasynctmfenable,
 203                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 204                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 205
 206 int ql2xdontresethba;
 207 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 208 MODULE_PARM_DESC(ql2xdontresethba,
 209                 "Option to specify reset behaviour.\n"
 210                 " 0 (Default) -- Reset on failure.\n"
 211                 " 1 -- Do not reset on failure.\n");
 212
 213 uint64_t ql2xmaxlun = MAX_LUNS;
 214 module_param(ql2xmaxlun, ullong, S_IRUGO);
 215 MODULE_PARM_DESC(ql2xmaxlun,
 216                 "Defines the maximum LU number to register with the SCSI "
 217                 "midlayer. Default is 65535.");
 218
 219 int ql2xmdcapmask = 0x1F;
 220 module_param(ql2xmdcapmask, int, S_IRUGO);
 221 MODULE_PARM_DESC(ql2xmdcapmask,
 222                 "Set the Minidump driver capture mask level. "
 223                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 224
 225 int ql2xmdenable = 1;
 226 module_param(ql2xmdenable, int, S_IRUGO);
 227 MODULE_PARM_DESC(ql2xmdenable,
 228                 "Enable/disable MiniDump. "
 229                 "0 - MiniDump disabled. "
 230                 "1 (Default) - MiniDump enabled.");
 231
 232 int ql2xexlogins;
 233 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 234 MODULE_PARM_DESC(ql2xexlogins,
 235                  "Number of extended Logins. "
 236                  "0 (Default)- Disabled.");
 237
 238 int ql2xexchoffld = 1024;
 239 module_param(ql2xexchoffld, uint, 0644);
 240 MODULE_PARM_DESC(ql2xexchoffld,
 241         "Number of target exchanges.");
 242
 243 int ql2xiniexchg = 1024;
 244 module_param(ql2xiniexchg, uint, 0644);
 245 MODULE_PARM_DESC(ql2xiniexchg,
 246         "Number of initiator exchanges.");
 247
 248 int ql2xfwholdabts;
 249 module_param(ql2xfwholdabts, int, S_IRUGO);
 250 MODULE_PARM_DESC(ql2xfwholdabts,
 251                 "Allow FW to hold status IOCB until ABTS rsp received. "
 252                 "0 (Default) Do not set fw option. "
 253                 "1 - Set fw option to hold ABTS.");
 254
 255 int ql2xmvasynctoatio = 1;
 256 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 257 MODULE_PARM_DESC(ql2xmvasynctoatio,
 258                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 259                 "0 (Default). Do not move IOCBs"
 260                 "1 - Move IOCBs.");
 261
 262 int ql2xautodetectsfp = 1;
 263 module_param(ql2xautodetectsfp, int, 0444);
 264 MODULE_PARM_DESC(ql2xautodetectsfp,
 265                  "Detect SFP range and set appropriate distance.\n"
 266                  "1 (Default): Enable\n");
 267
 268 int ql2xenablemsix = 1;
 269 module_param(ql2xenablemsix, int, 0444);
 270 MODULE_PARM_DESC(ql2xenablemsix,
 271                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 272                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 273                  " 0 -- enable traditional pin-based mechanism.\n"
 274                  " 1 -- enable MSI-X interrupt mechanism.\n"
 275                  " 2 -- enable MSI interrupt mechanism.\n");
 276
 277 int qla2xuseresexchforels;
 278 module_param(qla2xuseresexchforels, int, 0444);
 279 MODULE_PARM_DESC(qla2xuseresexchforels,
 280                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 281                  " 0 (default): disabled");
 282
 283 static int ql2xprotmask;
 284 module_param(ql2xprotmask, int, 0644);
 285 MODULE_PARM_DESC(ql2xprotmask,
 286                  "Override DIF/DIX protection capabilities mask\n"
 287                  "Default is 0 which sets protection mask based on "
 288                  "capabilities reported by HBA firmware.\n");
 289
 290 static int ql2xprotguard;
 291 module_param(ql2xprotguard, int, 0644);
 292 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 293                  "  0 -- Let HBA firmware decide\n"
 294                  "  1 -- Force T10 CRC\n"
 295                  "  2 -- Force IP checksum\n");
 296
 297 int ql2xdifbundlinginternalbuffers;
 298 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 299 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 300     "Force using internal buffers for DIF information\n"
 301     "0 (Default). Based on check.\n"
 302     "1 Force using internal buffers\n");
 303
 304 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 305 static void qla2x00_free_device(scsi_qla_host_t *);
 306 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 307 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 308
 309
 310 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 311 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 312
 313 /* TODO Convert to inlines
 314  *
 315  * Timer routines
 316  */
 317
 318 __inline__ void
 319 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 320 {
 321         timer_setup(&vha->timer, qla2x00_timer, 0);
 322         vha->timer.expires = jiffies + interval * HZ;
 323         add_timer(&vha->timer);
 324         vha->timer_active = 1;
 325 }
 326
 327 static inline void
 328 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 329 {
 330         /* Currently used for 82XX only. */
 331         if (vha->device_flags & DFLG_DEV_FAILED) {
 332                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 333                     "Device in a failed state, returning.\n");
 334                 return;
 335         }
 336
 337         mod_timer(&vha->timer, jiffies + interval * HZ);
 338 }
 339
 340 static __inline__ void
 341 qla2x00_stop_timer(scsi_qla_host_t *vha)
 342 {
 343         del_timer_sync(&vha->timer);
 344         vha->timer_active = 0;
 345 }
 346
 347 static int qla2x00_do_dpc(void *data);
 348
 349 static void qla2x00_rst_aen(scsi_qla_host_t *);
 350
 351 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 352         struct req_que **, struct rsp_que **);
 353 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 354 static void qla2x00_mem_free(struct qla_hw_data *);
 355 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 356         struct qla_qpair *qpair);
 357
 358 /* -------------------------------------------------------------------------- */
 359 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 360     struct rsp_que *rsp)
 361 {
 362         struct qla_hw_data *ha = vha->hw;
 363
 364         rsp->qpair = ha->base_qpair;
 365         rsp->req = req;
 366         ha->base_qpair->hw = ha;
 367         ha->base_qpair->req = req;
 368         ha->base_qpair->rsp = rsp;
 369         ha->base_qpair->vha = vha;
 370         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 371         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 372         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 373         ha->base_qpair->srb_mempool = ha->srb_mempool;
 374         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 375         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 376         /* init qpair to this cpu. Will adjust at run time. */
 377         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 378         ha->base_qpair->pdev = ha->pdev;
 379
 380         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 381                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 382 }
 383
 384 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 385                                 struct rsp_que *rsp)
 386 {
 387         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 388
 389         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 390                                 GFP_KERNEL);
 391         if (!ha->req_q_map) {
 392                 ql_log(ql_log_fatal, vha, 0x003b,
 393                     "Unable to allocate memory for request queue ptrs.\n");
 394                 goto fail_req_map;
 395         }
 396
 397         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 398                                 GFP_KERNEL);
 399         if (!ha->rsp_q_map) {
 400                 ql_log(ql_log_fatal, vha, 0x003c,
 401                     "Unable to allocate memory for response queue ptrs.\n");
 402                 goto fail_rsp_map;
 403         }
 404
 405         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 406         if (ha->base_qpair == NULL) {
 407                 ql_log(ql_log_warn, vha, 0x00e0,
 408                     "Failed to allocate base queue pair memory.\n");
 409                 goto fail_base_qpair;
 410         }
 411
 412         qla_init_base_qpair(vha, req, rsp);
 413
 414         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 415                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 416                         GFP_KERNEL);
 417                 if (!ha->queue_pair_map) {
 418                         ql_log(ql_log_fatal, vha, 0x0180,
 419                             "Unable to allocate memory for queue pair ptrs.\n");
 420                         goto fail_qpair_map;
 421                 }
 422         }
 423
 424         /*
 425          * Make sure we record at least the request and response queue zero in
 426          * case we need to free them if part of the probe fails.
 427          */
 428         ha->rsp_q_map[0] = rsp;
 429         ha->req_q_map[0] = req;
 430         set_bit(0, ha->rsp_qid_map);
 431         set_bit(0, ha->req_qid_map);
 432         return 0;
 433
 434 fail_qpair_map:
 435         kfree(ha->base_qpair);
 436         ha->base_qpair = NULL;
 437 fail_base_qpair:
 438         kfree(ha->rsp_q_map);
 439         ha->rsp_q_map = NULL;
 440 fail_rsp_map:
 441         kfree(ha->req_q_map);
 442         ha->req_q_map = NULL;
 443 fail_req_map:
 444         return -ENOMEM;
 445 }
 446
 447 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 448 {
 449         if (IS_QLAFX00(ha)) {
 450                 if (req && req->ring_fx00)
 451                         dma_free_coherent(&ha->pdev->dev,
 452                             (req->length_fx00 + 1) * sizeof(request_t),
 453                             req->ring_fx00, req->dma_fx00);
 454         } else if (req && req->ring)
 455                 dma_free_coherent(&ha->pdev->dev,
 456                 (req->length + 1) * sizeof(request_t),
 457                 req->ring, req->dma);
 458
 459         if (req)
 460                 kfree(req->outstanding_cmds);
 461
 462         kfree(req);
 463 }
 464
 465 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 466 {
 467         if (IS_QLAFX00(ha)) {
 468                 if (rsp && rsp->ring_fx00)
 469                         dma_free_coherent(&ha->pdev->dev,
 470                             (rsp->length_fx00 + 1) * sizeof(request_t),
 471                             rsp->ring_fx00, rsp->dma_fx00);
 472         } else if (rsp && rsp->ring) {
 473                 dma_free_coherent(&ha->pdev->dev,
 474                 (rsp->length + 1) * sizeof(response_t),
 475                 rsp->ring, rsp->dma);
 476         }
 477         kfree(rsp);
 478 }
 479
 480 static void qla2x00_free_queues(struct qla_hw_data *ha)
 481 {
 482         struct req_que *req;
 483         struct rsp_que *rsp;
 484         int cnt;
 485         unsigned long flags;
 486
 487         if (ha->queue_pair_map) {
 488                 kfree(ha->queue_pair_map);
 489                 ha->queue_pair_map = NULL;
 490         }
 491         if (ha->base_qpair) {
 492                 kfree(ha->base_qpair);
 493                 ha->base_qpair = NULL;
 494         }
 495
 496         spin_lock_irqsave(&ha->hardware_lock, flags);
 497         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 498                 if (!test_bit(cnt, ha->req_qid_map))
 499                         continue;
 500
 501                 req = ha->req_q_map[cnt];
 502                 clear_bit(cnt, ha->req_qid_map);
 503                 ha->req_q_map[cnt] = NULL;
 504
 505                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 506                 qla2x00_free_req_que(ha, req);
 507                 spin_lock_irqsave(&ha->hardware_lock, flags);
 508         }
 509         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 510
 511         kfree(ha->req_q_map);
 512         ha->req_q_map = NULL;
 513
 514
 515         spin_lock_irqsave(&ha->hardware_lock, flags);
 516         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 517                 if (!test_bit(cnt, ha->rsp_qid_map))
 518                         continue;
 519
 520                 rsp = ha->rsp_q_map[cnt];
 521                 clear_bit(cnt, ha->rsp_qid_map);
 522                 ha->rsp_q_map[cnt] =  NULL;
 523                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 524                 qla2x00_free_rsp_que(ha, rsp);
 525                 spin_lock_irqsave(&ha->hardware_lock, flags);
 526         }
 527         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 528
 529         kfree(ha->rsp_q_map);
 530         ha->rsp_q_map = NULL;
 531 }
 532
 533 static char *
 534 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 535 {
 536         struct qla_hw_data *ha = vha->hw;
 537         static const char *const pci_bus_modes[] = {
 538                 "33", "66", "100", "133",
 539         };
 540         uint16_t pci_bus;
 541
 542         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 543         if (pci_bus) {
 544                 snprintf(str, str_len, "PCI-X (%s MHz)",
 545                          pci_bus_modes[pci_bus]);
 546         } else {
 547                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 548                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 549         }
 550
 551         return str;
 552 }
 553
 554 static char *
 555 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 556 {
 557         static const char *const pci_bus_modes[] = {
 558                 "33", "66", "100", "133",
 559         };
 560         struct qla_hw_data *ha = vha->hw;
 561         uint32_t pci_bus;
 562
 563         if (pci_is_pcie(ha->pdev)) {
 564                 uint32_t lstat, lspeed, lwidth;
 565                 const char *speed_str;
 566
 567                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 568                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 569                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 570
 571                 switch (lspeed) {
 572                 case 1:
 573                         speed_str = "2.5GT/s";
 574                         break;
 575                 case 2:
 576                         speed_str = "5.0GT/s";
 577                         break;
 578                 case 3:
 579                         speed_str = "8.0GT/s";
 580                         break;
 581                 default:
 582                         speed_str = "<unknown>";
 583                         break;
 584                 }
 585                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 586
 587                 return str;
 588         }
 589
 590         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 591         if (pci_bus == 0 || pci_bus == 8)
 592                 snprintf(str, str_len, "PCI (%s MHz)",
 593                          pci_bus_modes[pci_bus >> 3]);
 594         else
 595                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 596                          pci_bus & 4 ? 2 : 1,
 597                          pci_bus_modes[pci_bus & 3]);
 598
 599         return str;
 600 }
 601
 602 static char *
 603 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 604 {
 605         char un_str[10];
 606         struct qla_hw_data *ha = vha->hw;
 607
 608         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 609             ha->fw_minor_version, ha->fw_subminor_version);
 610
 611         if (ha->fw_attributes & BIT_9) {
 612                 strcat(str, "FLX");
 613                 return (str);
 614         }
 615
 616         switch (ha->fw_attributes & 0xFF) {
 617         case 0x7:
 618                 strcat(str, "EF");
 619                 break;
 620         case 0x17:
 621                 strcat(str, "TP");
 622                 break;
 623         case 0x37:
 624                 strcat(str, "IP");
 625                 break;
 626         case 0x77:
 627                 strcat(str, "VI");
 628                 break;
 629         default:
 630                 sprintf(un_str, "(%x)", ha->fw_attributes);
 631                 strcat(str, un_str);
 632                 break;
 633         }
 634         if (ha->fw_attributes & 0x100)
 635                 strcat(str, "X");
 636
 637         return (str);
 638 }
 639
 640 static char *
 641 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 642 {
 643         struct qla_hw_data *ha = vha->hw;
 644
 645         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 646             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 647         return str;
 648 }
 649
 650 void qla2x00_sp_free_dma(srb_t *sp)
 651 {
 652         struct qla_hw_data *ha = sp->vha->hw;
 653         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 654
 655         if (sp->flags & SRB_DMA_VALID) {
 656                 scsi_dma_unmap(cmd);
 657                 sp->flags &= ~SRB_DMA_VALID;
 658         }
 659
 660         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 661                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 662                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 663                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 664         }
 665
 666         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 667                 /* List assured to be having elements */
 668                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 669                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 670         }
 671
 672         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 673                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 674
 675                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 676                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 677         }
 678
 679         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 680                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 681
 682                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 683                     ctx1->fcp_cmnd_dma);
 684                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 685                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 686                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 687                 mempool_free(ctx1, ha->ctx_mempool);
 688         }
 689 }
 690
 691 void qla2x00_sp_compl(srb_t *sp, int res)
 692 {
 693         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 694         struct completion *comp = sp->comp;
 695
 696         sp->free(sp);
 697         cmd->result = res;
 698         CMD_SP(cmd) = NULL;
 699         cmd->scsi_done(cmd);
 700         if (comp)
 701                 complete(comp);
 702 }
 703
 704 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 705 {
 706         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 707         struct qla_hw_data *ha = sp->fcport->vha->hw;
 708
 709         if (sp->flags & SRB_DMA_VALID) {
 710                 scsi_dma_unmap(cmd);
 711                 sp->flags &= ~SRB_DMA_VALID;
 712         }
 713
 714         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 715                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 716                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 717                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 718         }
 719
 720         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 721                 /* List assured to be having elements */
 722                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 723                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 724         }
 725
 726         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 727                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 728                 struct dsd_dma *dif_dsd, *nxt_dsd;
 729
 730                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 731                     &difctx->ldif_dma_hndl_list, list) {
 732                         list_del(&dif_dsd->list);
 733                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 734                             dif_dsd->dsd_list_dma);
 735                         kfree(dif_dsd);
 736                         difctx->no_dif_bundl--;
 737                 }
 738
 739                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 740                     &difctx->ldif_dsd_list, list) {
 741                         list_del(&dif_dsd->list);
 742                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 743                             dif_dsd->dsd_list_dma);
 744                         kfree(dif_dsd);
 745                         difctx->no_ldif_dsd--;
 746                 }
 747
 748                 if (difctx->no_ldif_dsd) {
 749                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 750                             "%s: difctx->no_ldif_dsd=%x\n",
 751                             __func__, difctx->no_ldif_dsd);
 752                 }
 753
 754                 if (difctx->no_dif_bundl) {
 755                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 756                             "%s: difctx->no_dif_bundl=%x\n",
 757                             __func__, difctx->no_dif_bundl);
 758                 }
 759                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 760         }
 761
 762         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 763                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 764
 765                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 766                     ctx1->fcp_cmnd_dma);
 767                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 768                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 769                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 770                 mempool_free(ctx1, ha->ctx_mempool);
 771                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 772         }
 773
 774         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 775                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 776
 777                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 778                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 779         }
 780 }
 781
 782 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 783 {
 784         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 785         struct completion *comp = sp->comp;
 786
 787         sp->free(sp);
 788         cmd->result = res;
 789         CMD_SP(cmd) = NULL;
 790         cmd->scsi_done(cmd);
 791         if (comp)
 792                 complete(comp);
 793 }
 794
 795 static int
 796 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 797 {
 798         scsi_qla_host_t *vha = shost_priv(host);
 799         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 800         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 801         struct qla_hw_data *ha = vha->hw;
 802         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 803         srb_t *sp;
 804         int rval;
 805
 806         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 807             WARN_ON_ONCE(!rport)) {
 808                 cmd->result = DID_NO_CONNECT << 16;
 809                 goto qc24_fail_command;
 810         }
 811
 812         if (ha->mqenable) {
 813                 uint32_t tag;
 814                 uint16_t hwq;
 815                 struct qla_qpair *qpair = NULL;
 816
 817                 tag = blk_mq_unique_tag(cmd->request);
 818                 hwq = blk_mq_unique_tag_to_hwq(tag);
 819                 qpair = ha->queue_pair_map[hwq];
 820
 821                 if (qpair)
 822                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 823         }
 824
 825         if (ha->flags.eeh_busy) {
 826                 if (ha->flags.pci_channel_io_perm_failure) {
 827                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 828                             "PCI Channel IO permanent failure, exiting "
 829                             "cmd=%p.\n", cmd);
 830                         cmd->result = DID_NO_CONNECT << 16;
 831                 } else {
 832                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 833                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 834                         cmd->result = DID_REQUEUE << 16;
 835                 }
 836                 goto qc24_fail_command;
 837         }
 838
 839         rval = fc_remote_port_chkready(rport);
 840         if (rval) {
 841                 cmd->result = rval;
 842                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 843                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 844                     cmd, rval);
 845                 goto qc24_fail_command;
 846         }
 847
 848         if (!vha->flags.difdix_supported &&
 849                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 850                         ql_dbg(ql_dbg_io, vha, 0x3004,
 851                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 852                             cmd);
 853                         cmd->result = DID_NO_CONNECT << 16;
 854                         goto qc24_fail_command;
 855         }
 856
 857         if (!fcport) {
 858                 cmd->result = DID_NO_CONNECT << 16;
 859                 goto qc24_fail_command;
 860         }
 861
 862         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 863                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 864                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 865                         ql_dbg(ql_dbg_io, vha, 0x3005,
 866                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 867                             atomic_read(&fcport->state),
 868                             atomic_read(&base_vha->loop_state));
 869                         cmd->result = DID_NO_CONNECT << 16;
 870                         goto qc24_fail_command;
 871                 }
 872                 goto qc24_target_busy;
 873         }
 874
 875         /*
 876          * Return target busy if we've received a non-zero retry_delay_timer
 877          * in a FCP_RSP.
 878          */
 879         if (fcport->retry_delay_timestamp == 0) {
 880                 /* retry delay not set */
 881         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 882                 fcport->retry_delay_timestamp = 0;
 883         else
 884                 goto qc24_target_busy;
 885
 886         sp = scsi_cmd_priv(cmd);
 887         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 888
 889         sp->u.scmd.cmd = cmd;
 890         sp->type = SRB_SCSI_CMD;
 891
 892         CMD_SP(cmd) = (void *)sp;
 893         sp->free = qla2x00_sp_free_dma;
 894         sp->done = qla2x00_sp_compl;
 895
 896         rval = ha->isp_ops->start_scsi(sp);
 897         if (rval != QLA_SUCCESS) {
 898                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 899                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 900                 goto qc24_host_busy_free_sp;
 901         }
 902
 903         return 0;
 904
 905 qc24_host_busy_free_sp:
 906         sp->free(sp);
 907
 908 qc24_target_busy:
 909         return SCSI_MLQUEUE_TARGET_BUSY;
 910
 911 qc24_fail_command:
 912         cmd->scsi_done(cmd);
 913
 914         return 0;
 915 }
 916
 917 /* For MQ supported I/O */
 918 int
 919 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 920     struct qla_qpair *qpair)
 921 {
 922         scsi_qla_host_t *vha = shost_priv(host);
 923         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 924         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 925         struct qla_hw_data *ha = vha->hw;
 926         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 927         srb_t *sp;
 928         int rval;
 929
 930         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 931         if (rval) {
 932                 cmd->result = rval;
 933                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 934                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 935                     cmd, rval);
 936                 goto qc24_fail_command;
 937         }
 938
 939         if (!fcport) {
 940                 cmd->result = DID_NO_CONNECT << 16;
 941                 goto qc24_fail_command;
 942         }
 943
 944         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 945                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 946                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 947                         ql_dbg(ql_dbg_io, vha, 0x3077,
 948                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 949                             atomic_read(&fcport->state),
 950                             atomic_read(&base_vha->loop_state));
 951                         cmd->result = DID_NO_CONNECT << 16;
 952                         goto qc24_fail_command;
 953                 }
 954                 goto qc24_target_busy;
 955         }
 956
 957         /*
 958          * Return target busy if we've received a non-zero retry_delay_timer
 959          * in a FCP_RSP.
 960          */
 961         if (fcport->retry_delay_timestamp == 0) {
 962                 /* retry delay not set */
 963         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 964                 fcport->retry_delay_timestamp = 0;
 965         else
 966                 goto qc24_target_busy;
 967
 968         sp = scsi_cmd_priv(cmd);
 969         qla2xxx_init_sp(sp, vha, qpair, fcport);
 970
 971         sp->u.scmd.cmd = cmd;
 972         sp->type = SRB_SCSI_CMD;
 973         CMD_SP(cmd) = (void *)sp;
 974         sp->free = qla2xxx_qpair_sp_free_dma;
 975         sp->done = qla2xxx_qpair_sp_compl;
 976
 977         rval = ha->isp_ops->start_scsi_mq(sp);
 978         if (rval != QLA_SUCCESS) {
 979                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
 980                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 981                 goto qc24_host_busy_free_sp;
 982         }
 983
 984         return 0;
 985
 986 qc24_host_busy_free_sp:
 987         sp->free(sp);
 988
 989 qc24_target_busy:
 990         return SCSI_MLQUEUE_TARGET_BUSY;
 991
 992 qc24_fail_command:
 993         cmd->scsi_done(cmd);
 994
 995         return 0;
 996 }
 997
 998 /*
 999  * qla2x00_eh_wait_on_command
1000  *    Waits for the command to be returned by the Firmware for some
1001  *    max time.
1002  *
1003  * Input:
1004  *    cmd = Scsi Command to wait on.
1005  *
1006  * Return:
1007  *    Completed in time : QLA_SUCCESS
1008  *    Did not complete in time : QLA_FUNCTION_FAILED
1009  */
1010 static int
1011 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1012 {
1013 #define ABORT_POLLING_PERIOD    1000
1014 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1015         unsigned long wait_iter = ABORT_WAIT_ITER;
1016         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1017         struct qla_hw_data *ha = vha->hw;
1018         int ret = QLA_SUCCESS;
1019
1020         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1021                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1022                     "Return:eh_wait.\n");
1023                 return ret;
1024         }
1025
1026         while (CMD_SP(cmd) && wait_iter--) {
1027                 msleep(ABORT_POLLING_PERIOD);
1028         }
1029         if (CMD_SP(cmd))
1030                 ret = QLA_FUNCTION_FAILED;
1031
1032         return ret;
1033 }
1034
1035 /*
1036  * qla2x00_wait_for_hba_online
1037  *    Wait till the HBA is online after going through
1038  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1039  *    finally HBA is disabled ie marked offline
1040  *
1041  * Input:
1042  *     ha - pointer to host adapter structure
1043  *
1044  * Note:
1045  *    Does context switching-Release SPIN_LOCK
1046  *    (if any) before calling this routine.
1047  *
1048  * Return:
1049  *    Success (Adapter is online) : 0
1050  *    Failed  (Adapter is offline/disabled) : 1
1051  */
1052 int
1053 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1054 {
1055         int             return_status;
1056         unsigned long   wait_online;
1057         struct qla_hw_data *ha = vha->hw;
1058         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1059
1060         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1061         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1062             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1063             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1064             ha->dpc_active) && time_before(jiffies, wait_online)) {
1065
1066                 msleep(1000);
1067         }
1068         if (base_vha->flags.online)
1069                 return_status = QLA_SUCCESS;
1070         else
1071                 return_status = QLA_FUNCTION_FAILED;
1072
1073         return (return_status);
1074 }
1075
1076 static inline int test_fcport_count(scsi_qla_host_t *vha)
1077 {
1078         struct qla_hw_data *ha = vha->hw;
1079         unsigned long flags;
1080         int res;
1081
1082         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1083         ql_dbg(ql_dbg_init, vha, 0x00ec,
1084             "tgt %p, fcport_count=%d\n",
1085             vha, vha->fcport_count);
1086         res = (vha->fcport_count == 0);
1087         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1088
1089         return res;
1090 }
1091
1092 /*
1093  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1094  * it has dependency on UNLOADING flag to stop device discovery
1095  */
1096 void
1097 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1098 {
1099         u8 i;
1100
1101         qla2x00_mark_all_devices_lost(vha, 0);
1102
1103         for (i = 0; i < 10; i++) {
1104                 if (wait_event_timeout(vha->fcport_waitQ,
1105                     test_fcport_count(vha), HZ) > 0)
1106                         break;
1107         }
1108
1109         flush_workqueue(vha->hw->wq);
1110 }
1111
1112 /*
1113  * qla2x00_wait_for_hba_ready
1114  * Wait till the HBA is ready before doing driver unload
1115  *
1116  * Input:
1117  *     ha - pointer to host adapter structure
1118  *
1119  * Note:
1120  *    Does context switching-Release SPIN_LOCK
1121  *    (if any) before calling this routine.
1122  *
1123  */
1124 static void
1125 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1126 {
1127         struct qla_hw_data *ha = vha->hw;
1128         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1129
1130         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1131                 ha->flags.mbox_busy) ||
1132                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1133                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1134                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1135                         break;
1136                 msleep(1000);
1137         }
1138 }
1139
1140 int
1141 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1142 {
1143         int             return_status;
1144         unsigned long   wait_reset;
1145         struct qla_hw_data *ha = vha->hw;
1146         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1147
1148         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1149         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1150             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1151             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1152             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1153
1154                 msleep(1000);
1155
1156                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1157                     ha->flags.chip_reset_done)
1158                         break;
1159         }
1160         if (ha->flags.chip_reset_done)
1161                 return_status = QLA_SUCCESS;
1162         else
1163                 return_status = QLA_FUNCTION_FAILED;
1164
1165         return return_status;
1166 }
1167
1168 #define ISP_REG_DISCONNECT 0xffffffffU
1169 /**************************************************************************
1170 * qla2x00_isp_reg_stat
1171 *
1172 * Description:
1173 *       Read the host status register of ISP before aborting the command.
1174 *
1175 * Input:
1176 *       ha = pointer to host adapter structure.
1177 *
1178 *
1179 * Returns:
1180 *       Either true or false.
1181 *
1182 * Note: Return true if there is register disconnect.
1183 **************************************************************************/
1184 static inline
1185 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1186 {
1187         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1188         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1189
1190         if (IS_P3P_TYPE(ha))
1191                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1192         else
1193                 return ((RD_REG_DWORD(&reg->host_status)) ==
1194                         ISP_REG_DISCONNECT);
1195 }
1196
1197 /**************************************************************************
1198 * qla2xxx_eh_abort
1199 *
1200 * Description:
1201 *    The abort function will abort the specified command.
1202 *
1203 * Input:
1204 *    cmd = Linux SCSI command packet to be aborted.
1205 *
1206 * Returns:
1207 *    Either SUCCESS or FAILED.
1208 *
1209 * Note:
1210 *    Only return FAILED if command not returned by firmware.
1211 **************************************************************************/
1212 static int
1213 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1214 {
1215         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1216         DECLARE_COMPLETION_ONSTACK(comp);
1217         srb_t *sp;
1218         int ret;
1219         unsigned int id;
1220         uint64_t lun;
1221         int rval;
1222         struct qla_hw_data *ha = vha->hw;
1223         uint32_t ratov_j;
1224         struct qla_qpair *qpair;
1225         unsigned long flags;
1226         int fast_fail_status = SUCCESS;
1227
1228         if (qla2x00_isp_reg_stat(ha)) {
1229                 ql_log(ql_log_info, vha, 0x8042,
1230                     "PCI/Register disconnect, exiting.\n");
1231                 return FAILED;
1232         }
1233
1234         /* Save any FAST_IO_FAIL value to return later if abort succeeds */
1235         ret = fc_block_scsi_eh(cmd);
1236         if (ret != 0)
1237                 fast_fail_status = ret;
1238
1239         sp = scsi_cmd_priv(cmd);
1240         qpair = sp->qpair;
1241
1242         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1243                 return fast_fail_status != SUCCESS ? fast_fail_status : FAILED;
1244
1245         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1246         if (sp->completed) {
1247                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1248                 return SUCCESS;
1249         }
1250
1251         if (sp->abort || sp->aborted) {
1252                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1253                 return FAILED;
1254         }
1255
1256         sp->abort = 1;
1257         sp->comp = &comp;
1258         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1259
1260
1261         id = cmd->device->id;
1262         lun = cmd->device->lun;
1263
1264         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1265             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1266             vha->host_no, id, lun, sp, cmd, sp->handle);
1267
1268         /*
1269          * Abort will release the original Command/sp from FW. Let the
1270          * original command call scsi_done. In return, he will wakeup
1271          * this sleeping thread.
1272          */
1273         rval = ha->isp_ops->abort_command(sp);
1274
1275         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1276                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1277
1278         /* Wait for the command completion. */
1279         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1280         ratov_j = msecs_to_jiffies(ratov_j);
1281         switch (rval) {
1282         case QLA_SUCCESS:
1283                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1284                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1285                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1286                             __func__, ha->r_a_tov/10);
1287                         ret = FAILED;
1288                 } else {
1289                         ret = fast_fail_status;
1290                 }
1291                 break;
1292         default:
1293                 ret = FAILED;
1294                 break;
1295         }
1296
1297         sp->comp = NULL;
1298
1299         ql_log(ql_log_info, vha, 0x801c,
1300             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1301             vha->host_no, id, lun, ret);
1302
1303         return ret;
1304 }
1305
1306 /*
1307  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1308  */
1309 int
1310 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1311         uint64_t l, enum nexus_wait_type type)
1312 {
1313         int cnt, match, status;
1314         unsigned long flags;
1315         struct qla_hw_data *ha = vha->hw;
1316         struct req_que *req;
1317         srb_t *sp;
1318         struct scsi_cmnd *cmd;
1319
1320         status = QLA_SUCCESS;
1321
1322         spin_lock_irqsave(&ha->hardware_lock, flags);
1323         req = vha->req;
1324         for (cnt = 1; status == QLA_SUCCESS &&
1325                 cnt < req->num_outstanding_cmds; cnt++) {
1326                 sp = req->outstanding_cmds[cnt];
1327                 if (!sp)
1328                         continue;
1329                 if (sp->type != SRB_SCSI_CMD)
1330                         continue;
1331                 if (vha->vp_idx != sp->vha->vp_idx)
1332                         continue;
1333                 match = 0;
1334                 cmd = GET_CMD_SP(sp);
1335                 switch (type) {
1336                 case WAIT_HOST:
1337                         match = 1;
1338                         break;
1339                 case WAIT_TARGET:
1340                         match = cmd->device->id == t;
1341                         break;
1342                 case WAIT_LUN:
1343                         match = (cmd->device->id == t &&
1344                                 cmd->device->lun == l);
1345                         break;
1346                 }
1347                 if (!match)
1348                         continue;
1349
1350                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1351                 status = qla2x00_eh_wait_on_command(cmd);
1352                 spin_lock_irqsave(&ha->hardware_lock, flags);
1353         }
1354         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1355
1356         return status;
1357 }
1358
1359 static char *reset_errors[] = {
1360         "HBA not online",
1361         "HBA not ready",
1362         "Task management failed",
1363         "Waiting for command completions",
1364 };
1365
1366 static int
1367 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1368     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1369 {
1370         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1371         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1372         int err;
1373
1374         if (!fcport) {
1375                 return FAILED;
1376         }
1377
1378         err = fc_block_scsi_eh(cmd);
1379         if (err != 0)
1380                 return err;
1381
1382         if (fcport->deleted)
1383                 return SUCCESS;
1384
1385         ql_log(ql_log_info, vha, 0x8009,
1386             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1387             cmd->device->id, cmd->device->lun, cmd);
1388
1389         err = 0;
1390         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1391                 ql_log(ql_log_warn, vha, 0x800a,
1392                     "Wait for hba online failed for cmd=%p.\n", cmd);
1393                 goto eh_reset_failed;
1394         }
1395         err = 2;
1396         if (do_reset(fcport, cmd->device->lun, 1)
1397                 != QLA_SUCCESS) {
1398                 ql_log(ql_log_warn, vha, 0x800c,
1399                     "do_reset failed for cmd=%p.\n", cmd);
1400                 goto eh_reset_failed;
1401         }
1402         err = 3;
1403         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1404             cmd->device->lun, type) != QLA_SUCCESS) {
1405                 ql_log(ql_log_warn, vha, 0x800d,
1406                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1407                 goto eh_reset_failed;
1408         }
1409
1410         ql_log(ql_log_info, vha, 0x800e,
1411             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1412             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1413
1414         return SUCCESS;
1415
1416 eh_reset_failed:
1417         ql_log(ql_log_info, vha, 0x800f,
1418             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1419             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1420             cmd);
1421         return FAILED;
1422 }
1423
1424 static int
1425 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1426 {
1427         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1428         struct qla_hw_data *ha = vha->hw;
1429
1430         if (qla2x00_isp_reg_stat(ha)) {
1431                 ql_log(ql_log_info, vha, 0x803e,
1432                     "PCI/Register disconnect, exiting.\n");
1433                 return FAILED;
1434         }
1435
1436         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1437             ha->isp_ops->lun_reset);
1438 }
1439
1440 static int
1441 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1442 {
1443         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1444         struct qla_hw_data *ha = vha->hw;
1445
1446         if (qla2x00_isp_reg_stat(ha)) {
1447                 ql_log(ql_log_info, vha, 0x803f,
1448                     "PCI/Register disconnect, exiting.\n");
1449                 return FAILED;
1450         }
1451
1452         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1453             ha->isp_ops->target_reset);
1454 }
1455
1456 /**************************************************************************
1457 * qla2xxx_eh_bus_reset
1458 *
1459 * Description:
1460 *    The bus reset function will reset the bus and abort any executing
1461 *    commands.
1462 *
1463 * Input:
1464 *    cmd = Linux SCSI command packet of the command that cause the
1465 *          bus reset.
1466 *
1467 * Returns:
1468 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1469 *
1470 **************************************************************************/
1471 static int
1472 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1473 {
1474         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1475         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1476         int ret = FAILED;
1477         unsigned int id;
1478         uint64_t lun;
1479         struct qla_hw_data *ha = vha->hw;
1480
1481         if (qla2x00_isp_reg_stat(ha)) {
1482                 ql_log(ql_log_info, vha, 0x8040,
1483                     "PCI/Register disconnect, exiting.\n");
1484                 return FAILED;
1485         }
1486
1487         id = cmd->device->id;
1488         lun = cmd->device->lun;
1489
1490         if (!fcport) {
1491                 return ret;
1492         }
1493
1494         ret = fc_block_scsi_eh(cmd);
1495         if (ret != 0)
1496                 return ret;
1497         ret = FAILED;
1498
1499         if (qla2x00_chip_is_down(vha))
1500                 return ret;
1501
1502         ql_log(ql_log_info, vha, 0x8012,
1503             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1504
1505         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1506                 ql_log(ql_log_fatal, vha, 0x8013,
1507                     "Wait for hba online failed board disabled.\n");
1508                 goto eh_bus_reset_done;
1509         }
1510
1511         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1512                 ret = SUCCESS;
1513
1514         if (ret == FAILED)
1515                 goto eh_bus_reset_done;
1516
1517         /* Flush outstanding commands. */
1518         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1519             QLA_SUCCESS) {
1520                 ql_log(ql_log_warn, vha, 0x8014,
1521                     "Wait for pending commands failed.\n");
1522                 ret = FAILED;
1523         }
1524
1525 eh_bus_reset_done:
1526         ql_log(ql_log_warn, vha, 0x802b,
1527             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1528             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1529
1530         return ret;
1531 }
1532
1533 /**************************************************************************
1534 * qla2xxx_eh_host_reset
1535 *
1536 * Description:
1537 *    The reset function will reset the Adapter.
1538 *
1539 * Input:
1540 *      cmd = Linux SCSI command packet of the command that cause the
1541 *            adapter reset.
1542 *
1543 * Returns:
1544 *      Either SUCCESS or FAILED.
1545 *
1546 * Note:
1547 **************************************************************************/
1548 static int
1549 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1550 {
1551         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1552         struct qla_hw_data *ha = vha->hw;
1553         int ret = FAILED;
1554         unsigned int id;
1555         uint64_t lun;
1556         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1557
1558         if (qla2x00_isp_reg_stat(ha)) {
1559                 ql_log(ql_log_info, vha, 0x8041,
1560                     "PCI/Register disconnect, exiting.\n");
1561                 schedule_work(&ha->board_disable);
1562                 return SUCCESS;
1563         }
1564
1565         id = cmd->device->id;
1566         lun = cmd->device->lun;
1567
1568         ql_log(ql_log_info, vha, 0x8018,
1569             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1570
1571         /*
1572          * No point in issuing another reset if one is active.  Also do not
1573          * attempt a reset if we are updating flash.
1574          */
1575         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1576                 goto eh_host_reset_lock;
1577
1578         if (vha != base_vha) {
1579                 if (qla2x00_vp_abort_isp(vha))
1580                         goto eh_host_reset_lock;
1581         } else {
1582                 if (IS_P3P_TYPE(vha->hw)) {
1583                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1584                                 /* Ctx reset success */
1585                                 ret = SUCCESS;
1586                                 goto eh_host_reset_lock;
1587                         }
1588                         /* fall thru if ctx reset failed */
1589                 }
1590                 if (ha->wq)
1591                         flush_workqueue(ha->wq);
1592
1593                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1594                 if (ha->isp_ops->abort_isp(base_vha)) {
1595                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1596                         /* failed. schedule dpc to try */
1597                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1598
1599                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1600                                 ql_log(ql_log_warn, vha, 0x802a,
1601                                     "wait for hba online failed.\n");
1602                                 goto eh_host_reset_lock;
1603                         }
1604                 }
1605                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1606         }
1607
1608         /* Waiting for command to be returned to OS.*/
1609         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1610                 QLA_SUCCESS)
1611                 ret = SUCCESS;
1612
1613 eh_host_reset_lock:
1614         ql_log(ql_log_info, vha, 0x8017,
1615             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1616             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1617
1618         return ret;
1619 }
1620
1621 /*
1622 * qla2x00_loop_reset
1623 *      Issue loop reset.
1624 *
1625 * Input:
1626 *      ha = adapter block pointer.
1627 *
1628 * Returns:
1629 *      0 = success
1630 */
1631 int
1632 qla2x00_loop_reset(scsi_qla_host_t *vha)
1633 {
1634         int ret;
1635         struct qla_hw_data *ha = vha->hw;
1636
1637         if (IS_QLAFX00(ha))
1638                 return QLA_SUCCESS;
1639
1640         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1641                 atomic_set(&vha->loop_state, LOOP_DOWN);
1642                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1643                 qla2x00_mark_all_devices_lost(vha, 0);
1644                 ret = qla2x00_full_login_lip(vha);
1645                 if (ret != QLA_SUCCESS) {
1646                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1647                             "full_login_lip=%d.\n", ret);
1648                 }
1649         }
1650
1651         if (ha->flags.enable_lip_reset) {
1652                 ret = qla2x00_lip_reset(vha);
1653                 if (ret != QLA_SUCCESS)
1654                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1655                             "lip_reset failed (%d).\n", ret);
1656         }
1657
1658         /* Issue marker command only when we are going to start the I/O */
1659         vha->marker_needed = 1;
1660
1661         return QLA_SUCCESS;
1662 }
1663
1664 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1665                               unsigned long *flags)
1666         __releases(qp->qp_lock_ptr)
1667         __acquires(qp->qp_lock_ptr)
1668 {
1669         DECLARE_COMPLETION_ONSTACK(comp);
1670         scsi_qla_host_t *vha = qp->vha;
1671         struct qla_hw_data *ha = vha->hw;
1672         int rval;
1673         bool ret_cmd;
1674         uint32_t ratov_j;
1675
1676         if (qla2x00_chip_is_down(vha)) {
1677                 sp->done(sp, res);
1678                 return;
1679         }
1680
1681         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1682             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1683              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1684              !qla2x00_isp_reg_stat(ha))) {
1685                 if (sp->comp) {
1686                         sp->done(sp, res);
1687                         return;
1688                 }
1689
1690                 sp->comp = &comp;
1691                 sp->abort =  1;
1692                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1693
1694                 rval = ha->isp_ops->abort_command(sp);
1695                 /* Wait for command completion. */
1696                 ret_cmd = false;
1697                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1698                 ratov_j = msecs_to_jiffies(ratov_j);
1699                 switch (rval) {
1700                 case QLA_SUCCESS:
1701                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1702                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1703                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1704                                     __func__, ha->r_a_tov/10);
1705                                 ret_cmd = true;
1706                         }
1707                         /* else FW return SP to driver */
1708                         break;
1709                 default:
1710                         ret_cmd = true;
1711                         break;
1712                 }
1713
1714                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1715                 if (ret_cmd && (!sp->completed || !sp->aborted))
1716                         sp->done(sp, res);
1717         } else {
1718                 sp->done(sp, res);
1719         }
1720 }
1721
1722 static void
1723 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1724 {
1725         int cnt;
1726         unsigned long flags;
1727         srb_t *sp;
1728         scsi_qla_host_t *vha = qp->vha;
1729         struct qla_hw_data *ha = vha->hw;
1730         struct req_que *req;
1731         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1732         struct qla_tgt_cmd *cmd;
1733
1734         if (!ha->req_q_map)
1735                 return;
1736         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1737         req = qp->req;
1738         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1739                 sp = req->outstanding_cmds[cnt];
1740                 if (sp) {
1741                         switch (sp->cmd_type) {
1742                         case TYPE_SRB:
1743                                 qla2x00_abort_srb(qp, sp, res, &flags);
1744                                 break;
1745                         case TYPE_TGT_CMD:
1746                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1747                                     qla_ini_mode_enabled(vha)) {
1748                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1749                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1750                                             vha->dpc_flags);
1751                                         continue;
1752                                 }
1753                                 cmd = (struct qla_tgt_cmd *)sp;
1754                                 cmd->aborted = 1;
1755                                 break;
1756                         case TYPE_TGT_TMCMD:
1757                                 /* Skip task management functions. */
1758                                 break;
1759                         default:
1760                                 break;
1761                         }
1762                         req->outstanding_cmds[cnt] = NULL;
1763                 }
1764         }
1765         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1766 }
1767
1768 void
1769 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1770 {
1771         int que;
1772         struct qla_hw_data *ha = vha->hw;
1773
1774         /* Continue only if initialization complete. */
1775         if (!ha->base_qpair)
1776                 return;
1777         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1778
1779         if (!ha->queue_pair_map)
1780                 return;
1781         for (que = 0; que < ha->max_qpairs; que++) {
1782                 if (!ha->queue_pair_map[que])
1783                         continue;
1784
1785                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1786         }
1787 }
1788
1789 static int
1790 qla2xxx_slave_alloc(struct scsi_device *sdev)
1791 {
1792         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1793
1794         if (!rport || fc_remote_port_chkready(rport))
1795                 return -ENXIO;
1796
1797         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1798
1799         return 0;
1800 }
1801
1802 static int
1803 qla2xxx_slave_configure(struct scsi_device *sdev)
1804 {
1805         scsi_qla_host_t *vha = shost_priv(sdev->host);
1806         struct req_que *req = vha->req;
1807
1808         if (IS_T10_PI_CAPABLE(vha->hw))
1809                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1810
1811         scsi_change_queue_depth(sdev, req->max_q_depth);
1812         return 0;
1813 }
1814
1815 static void
1816 qla2xxx_slave_destroy(struct scsi_device *sdev)
1817 {
1818         sdev->hostdata = NULL;
1819 }
1820
1821 /**
1822  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1823  * @ha: HA context
1824  *
1825  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1826  * supported addressing method.
1827  */
1828 static void
1829 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1830 {
1831         /* Assume a 32bit DMA mask. */
1832         ha->flags.enable_64bit_addressing = 0;
1833
1834         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1835                 /* Any upper-dword bits set? */
1836                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1837                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1838                         /* Ok, a 64bit DMA mask is applicable. */
1839                         ha->flags.enable_64bit_addressing = 1;
1840                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1841                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1842                         return;
1843                 }
1844         }
1845
1846         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1847         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1848 }
1849
1850 static void
1851 qla2x00_enable_intrs(struct qla_hw_data *ha)
1852 {
1853         unsigned long flags = 0;
1854         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1855
1856         spin_lock_irqsave(&ha->hardware_lock, flags);
1857         ha->interrupts_on = 1;
1858         /* enable risc and host interrupts */
1859         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1860         RD_REG_WORD(&reg->ictrl);
1861         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1862
1863 }
1864
1865 static void
1866 qla2x00_disable_intrs(struct qla_hw_data *ha)
1867 {
1868         unsigned long flags = 0;
1869         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1870
1871         spin_lock_irqsave(&ha->hardware_lock, flags);
1872         ha->interrupts_on = 0;
1873         /* disable risc and host interrupts */
1874         WRT_REG_WORD(&reg->ictrl, 0);
1875         RD_REG_WORD(&reg->ictrl);
1876         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1877 }
1878
1879 static void
1880 qla24xx_enable_intrs(struct qla_hw_data *ha)
1881 {
1882         unsigned long flags = 0;
1883         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1884
1885         spin_lock_irqsave(&ha->hardware_lock, flags);
1886         ha->interrupts_on = 1;
1887         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1888         RD_REG_DWORD(&reg->ictrl);
1889         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1890 }
1891
1892 static void
1893 qla24xx_disable_intrs(struct qla_hw_data *ha)
1894 {
1895         unsigned long flags = 0;
1896         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1897
1898         if (IS_NOPOLLING_TYPE(ha))
1899                 return;
1900         spin_lock_irqsave(&ha->hardware_lock, flags);
1901         ha->interrupts_on = 0;
1902         WRT_REG_DWORD(&reg->ictrl, 0);
1903         RD_REG_DWORD(&reg->ictrl);
1904         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1905 }
1906
1907 static int
1908 qla2x00_iospace_config(struct qla_hw_data *ha)
1909 {
1910         resource_size_t pio;
1911         uint16_t msix;
1912
1913         if (pci_request_selected_regions(ha->pdev, ha->bars,
1914             QLA2XXX_DRIVER_NAME)) {
1915                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1916                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1917                     pci_name(ha->pdev));
1918                 goto iospace_error_exit;
1919         }
1920         if (!(ha->bars & 1))
1921                 goto skip_pio;
1922
1923         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1924         pio = pci_resource_start(ha->pdev, 0);
1925         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1926                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1927                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1928                             "Invalid pci I/O region size (%s).\n",
1929                             pci_name(ha->pdev));
1930                         pio = 0;
1931                 }
1932         } else {
1933                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1934                     "Region #0 no a PIO resource (%s).\n",
1935                     pci_name(ha->pdev));
1936                 pio = 0;
1937         }
1938         ha->pio_address = pio;
1939         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1940             "PIO address=%llu.\n",
1941             (unsigned long long)ha->pio_address);
1942
1943 skip_pio:
1944         /* Use MMIO operations for all accesses. */
1945         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1946                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1947                     "Region #1 not an MMIO resource (%s), aborting.\n",
1948                     pci_name(ha->pdev));
1949                 goto iospace_error_exit;
1950         }
1951         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1952                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1953                     "Invalid PCI mem region size (%s), aborting.\n",
1954                     pci_name(ha->pdev));
1955                 goto iospace_error_exit;
1956         }
1957
1958         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1959         if (!ha->iobase) {
1960                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1961                     "Cannot remap MMIO (%s), aborting.\n",
1962                     pci_name(ha->pdev));
1963                 goto iospace_error_exit;
1964         }
1965
1966         /* Determine queue resources */
1967         ha->max_req_queues = ha->max_rsp_queues = 1;
1968         ha->msix_count = QLA_BASE_VECTORS;
1969
1970         /* Check if FW supports MQ or not */
1971         if (!(ha->fw_attributes & BIT_6))
1972                 goto mqiobase_exit;
1973
1974         if (!ql2xmqsupport || !ql2xnvmeenable ||
1975             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1976                 goto mqiobase_exit;
1977
1978         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1979                         pci_resource_len(ha->pdev, 3));
1980         if (ha->mqiobase) {
1981                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1982                     "MQIO Base=%p.\n", ha->mqiobase);
1983                 /* Read MSIX vector size of the board */
1984                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1985                 ha->msix_count = msix + 1;
1986                 /* Max queues are bounded by available msix vectors */
1987                 /* MB interrupt uses 1 vector */
1988                 ha->max_req_queues = ha->msix_count - 1;
1989                 ha->max_rsp_queues = ha->max_req_queues;
1990                 /* Queue pairs is the max value minus the base queue pair */
1991                 ha->max_qpairs = ha->max_rsp_queues - 1;
1992                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1993                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1994
1995                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1996                     "MSI-X vector count: %d.\n", ha->msix_count);
1997         } else
1998                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1999                     "BAR 3 not enabled.\n");
2000
2001 mqiobase_exit:
2002         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2003             "MSIX Count: %d.\n", ha->msix_count);
2004         return (0);
2005
2006 iospace_error_exit:
2007         return (-ENOMEM);
2008 }
2009
2010
2011 static int
2012 qla83xx_iospace_config(struct qla_hw_data *ha)
2013 {
2014         uint16_t msix;
2015
2016         if (pci_request_selected_regions(ha->pdev, ha->bars,
2017             QLA2XXX_DRIVER_NAME)) {
2018                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2019                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2020                     pci_name(ha->pdev));
2021
2022                 goto iospace_error_exit;
2023         }
2024
2025         /* Use MMIO operations for all accesses. */
2026         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2027                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2028                     "Invalid pci I/O region size (%s).\n",
2029                     pci_name(ha->pdev));
2030                 goto iospace_error_exit;
2031         }
2032         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2033                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2034                     "Invalid PCI mem region size (%s), aborting\n",
2035                         pci_name(ha->pdev));
2036                 goto iospace_error_exit;
2037         }
2038
2039         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2040         if (!ha->iobase) {
2041                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2042                     "Cannot remap MMIO (%s), aborting.\n",
2043                     pci_name(ha->pdev));
2044                 goto iospace_error_exit;
2045         }
2046
2047         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2048         /* 83XX 26XX always use MQ type access for queues
2049          * - mbar 2, a.k.a region 4 */
2050         ha->max_req_queues = ha->max_rsp_queues = 1;
2051         ha->msix_count = QLA_BASE_VECTORS;
2052         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2053                         pci_resource_len(ha->pdev, 4));
2054
2055         if (!ha->mqiobase) {
2056                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2057                     "BAR2/region4 not enabled\n");
2058                 goto mqiobase_exit;
2059         }
2060
2061         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2062                         pci_resource_len(ha->pdev, 2));
2063         if (ha->msixbase) {
2064                 /* Read MSIX vector size of the board */
2065                 pci_read_config_word(ha->pdev,
2066                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2067                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2068                 /*
2069                  * By default, driver uses at least two msix vectors
2070                  * (default & rspq)
2071                  */
2072                 if (ql2xmqsupport || ql2xnvmeenable) {
2073                         /* MB interrupt uses 1 vector */
2074                         ha->max_req_queues = ha->msix_count - 1;
2075
2076                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2077                         if (QLA_TGT_MODE_ENABLED())
2078                                 ha->max_req_queues--;
2079
2080                         ha->max_rsp_queues = ha->max_req_queues;
2081
2082                         /* Queue pairs is the max value minus
2083                          * the base queue pair */
2084                         ha->max_qpairs = ha->max_req_queues - 1;
2085                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2086                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2087                 }
2088                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2089                     "MSI-X vector count: %d.\n", ha->msix_count);
2090         } else
2091                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2092                     "BAR 1 not enabled.\n");
2093
2094 mqiobase_exit:
2095         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2096             "MSIX Count: %d.\n", ha->msix_count);
2097         return 0;
2098
2099 iospace_error_exit:
2100         return -ENOMEM;
2101 }
2102
2103 static struct isp_operations qla2100_isp_ops = {
2104         .pci_config             = qla2100_pci_config,
2105         .reset_chip             = qla2x00_reset_chip,
2106         .chip_diag              = qla2x00_chip_diag,
2107         .config_rings           = qla2x00_config_rings,
2108         .reset_adapter          = qla2x00_reset_adapter,
2109         .nvram_config           = qla2x00_nvram_config,
2110         .update_fw_options      = qla2x00_update_fw_options,
2111         .load_risc              = qla2x00_load_risc,
2112         .pci_info_str           = qla2x00_pci_info_str,
2113         .fw_version_str         = qla2x00_fw_version_str,
2114         .intr_handler           = qla2100_intr_handler,
2115         .enable_intrs           = qla2x00_enable_intrs,
2116         .disable_intrs          = qla2x00_disable_intrs,
2117         .abort_command          = qla2x00_abort_command,
2118         .target_reset           = qla2x00_abort_target,
2119         .lun_reset              = qla2x00_lun_reset,
2120         .fabric_login           = qla2x00_login_fabric,
2121         .fabric_logout          = qla2x00_fabric_logout,
2122         .calc_req_entries       = qla2x00_calc_iocbs_32,
2123         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2124         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2125         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2126         .read_nvram             = qla2x00_read_nvram_data,
2127         .write_nvram            = qla2x00_write_nvram_data,
2128         .fw_dump                = qla2100_fw_dump,
2129         .beacon_on              = NULL,
2130         .beacon_off             = NULL,
2131         .beacon_blink           = NULL,
2132         .read_optrom            = qla2x00_read_optrom_data,
2133         .write_optrom           = qla2x00_write_optrom_data,
2134         .get_flash_version      = qla2x00_get_flash_version,
2135         .start_scsi             = qla2x00_start_scsi,
2136         .start_scsi_mq          = NULL,
2137         .abort_isp              = qla2x00_abort_isp,
2138         .iospace_config         = qla2x00_iospace_config,
2139         .initialize_adapter     = qla2x00_initialize_adapter,
2140 };
2141
2142 static struct isp_operations qla2300_isp_ops = {
2143         .pci_config             = qla2300_pci_config,
2144         .reset_chip             = qla2x00_reset_chip,
2145         .chip_diag              = qla2x00_chip_diag,
2146         .config_rings           = qla2x00_config_rings,
2147         .reset_adapter          = qla2x00_reset_adapter,
2148         .nvram_config           = qla2x00_nvram_config,
2149         .update_fw_options      = qla2x00_update_fw_options,
2150         .load_risc              = qla2x00_load_risc,
2151         .pci_info_str           = qla2x00_pci_info_str,
2152         .fw_version_str         = qla2x00_fw_version_str,
2153         .intr_handler           = qla2300_intr_handler,
2154         .enable_intrs           = qla2x00_enable_intrs,
2155         .disable_intrs          = qla2x00_disable_intrs,
2156         .abort_command          = qla2x00_abort_command,
2157         .target_reset           = qla2x00_abort_target,
2158         .lun_reset              = qla2x00_lun_reset,
2159         .fabric_login           = qla2x00_login_fabric,
2160         .fabric_logout          = qla2x00_fabric_logout,
2161         .calc_req_entries       = qla2x00_calc_iocbs_32,
2162         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2163         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2164         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2165         .read_nvram             = qla2x00_read_nvram_data,
2166         .write_nvram            = qla2x00_write_nvram_data,
2167         .fw_dump                = qla2300_fw_dump,
2168         .beacon_on              = qla2x00_beacon_on,
2169         .beacon_off             = qla2x00_beacon_off,
2170         .beacon_blink           = qla2x00_beacon_blink,
2171         .read_optrom            = qla2x00_read_optrom_data,
2172         .write_optrom           = qla2x00_write_optrom_data,
2173         .get_flash_version      = qla2x00_get_flash_version,
2174         .start_scsi             = qla2x00_start_scsi,
2175         .start_scsi_mq          = NULL,
2176         .abort_isp              = qla2x00_abort_isp,
2177         .iospace_config         = qla2x00_iospace_config,
2178         .initialize_adapter     = qla2x00_initialize_adapter,
2179 };
2180
2181 static struct isp_operations qla24xx_isp_ops = {
2182         .pci_config             = qla24xx_pci_config,
2183         .reset_chip             = qla24xx_reset_chip,
2184         .chip_diag              = qla24xx_chip_diag,
2185         .config_rings           = qla24xx_config_rings,
2186         .reset_adapter          = qla24xx_reset_adapter,
2187         .nvram_config           = qla24xx_nvram_config,
2188         .update_fw_options      = qla24xx_update_fw_options,
2189         .load_risc              = qla24xx_load_risc,
2190         .pci_info_str           = qla24xx_pci_info_str,
2191         .fw_version_str         = qla24xx_fw_version_str,
2192         .intr_handler           = qla24xx_intr_handler,
2193         .enable_intrs           = qla24xx_enable_intrs,
2194         .disable_intrs          = qla24xx_disable_intrs,
2195         .abort_command          = qla24xx_abort_command,
2196         .target_reset           = qla24xx_abort_target,
2197         .lun_reset              = qla24xx_lun_reset,
2198         .fabric_login           = qla24xx_login_fabric,
2199         .fabric_logout          = qla24xx_fabric_logout,
2200         .calc_req_entries       = NULL,
2201         .build_iocbs            = NULL,
2202         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2203         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2204         .read_nvram             = qla24xx_read_nvram_data,
2205         .write_nvram            = qla24xx_write_nvram_data,
2206         .fw_dump                = qla24xx_fw_dump,
2207         .beacon_on              = qla24xx_beacon_on,
2208         .beacon_off             = qla24xx_beacon_off,
2209         .beacon_blink           = qla24xx_beacon_blink,
2210         .read_optrom            = qla24xx_read_optrom_data,
2211         .write_optrom           = qla24xx_write_optrom_data,
2212         .get_flash_version      = qla24xx_get_flash_version,
2213         .start_scsi             = qla24xx_start_scsi,
2214         .start_scsi_mq          = NULL,
2215         .abort_isp              = qla2x00_abort_isp,
2216         .iospace_config         = qla2x00_iospace_config,
2217         .initialize_adapter     = qla2x00_initialize_adapter,
2218 };
2219
2220 static struct isp_operations qla25xx_isp_ops = {
2221         .pci_config             = qla25xx_pci_config,
2222         .reset_chip             = qla24xx_reset_chip,
2223         .chip_diag              = qla24xx_chip_diag,
2224         .config_rings           = qla24xx_config_rings,
2225         .reset_adapter          = qla24xx_reset_adapter,
2226         .nvram_config           = qla24xx_nvram_config,
2227         .update_fw_options      = qla24xx_update_fw_options,
2228         .load_risc              = qla24xx_load_risc,
2229         .pci_info_str           = qla24xx_pci_info_str,
2230         .fw_version_str         = qla24xx_fw_version_str,
2231         .intr_handler           = qla24xx_intr_handler,
2232         .enable_intrs           = qla24xx_enable_intrs,
2233         .disable_intrs          = qla24xx_disable_intrs,
2234         .abort_command          = qla24xx_abort_command,
2235         .target_reset           = qla24xx_abort_target,
2236         .lun_reset              = qla24xx_lun_reset,
2237         .fabric_login           = qla24xx_login_fabric,
2238         .fabric_logout          = qla24xx_fabric_logout,
2239         .calc_req_entries       = NULL,
2240         .build_iocbs            = NULL,
2241         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2242         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2243         .read_nvram             = qla25xx_read_nvram_data,
2244         .write_nvram            = qla25xx_write_nvram_data,
2245         .fw_dump                = qla25xx_fw_dump,
2246         .beacon_on              = qla24xx_beacon_on,
2247         .beacon_off             = qla24xx_beacon_off,
2248         .beacon_blink           = qla24xx_beacon_blink,
2249         .read_optrom            = qla25xx_read_optrom_data,
2250         .write_optrom           = qla24xx_write_optrom_data,
2251         .get_flash_version      = qla24xx_get_flash_version,
2252         .start_scsi             = qla24xx_dif_start_scsi,
2253         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2254         .abort_isp              = qla2x00_abort_isp,
2255         .iospace_config         = qla2x00_iospace_config,
2256         .initialize_adapter     = qla2x00_initialize_adapter,
2257 };
2258
2259 static struct isp_operations qla81xx_isp_ops = {
2260         .pci_config             = qla25xx_pci_config,
2261         .reset_chip             = qla24xx_reset_chip,
2262         .chip_diag              = qla24xx_chip_diag,
2263         .config_rings           = qla24xx_config_rings,
2264         .reset_adapter          = qla24xx_reset_adapter,
2265         .nvram_config           = qla81xx_nvram_config,
2266         .update_fw_options      = qla81xx_update_fw_options,
2267         .load_risc              = qla81xx_load_risc,
2268         .pci_info_str           = qla24xx_pci_info_str,
2269         .fw_version_str         = qla24xx_fw_version_str,
2270         .intr_handler           = qla24xx_intr_handler,
2271         .enable_intrs           = qla24xx_enable_intrs,
2272         .disable_intrs          = qla24xx_disable_intrs,
2273         .abort_command          = qla24xx_abort_command,
2274         .target_reset           = qla24xx_abort_target,
2275         .lun_reset              = qla24xx_lun_reset,
2276         .fabric_login           = qla24xx_login_fabric,
2277         .fabric_logout          = qla24xx_fabric_logout,
2278         .calc_req_entries       = NULL,
2279         .build_iocbs            = NULL,
2280         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2281         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2282         .read_nvram             = NULL,
2283         .write_nvram            = NULL,
2284         .fw_dump                = qla81xx_fw_dump,
2285         .beacon_on              = qla24xx_beacon_on,
2286         .beacon_off             = qla24xx_beacon_off,
2287         .beacon_blink           = qla83xx_beacon_blink,
2288         .read_optrom            = qla25xx_read_optrom_data,
2289         .write_optrom           = qla24xx_write_optrom_data,
2290         .get_flash_version      = qla24xx_get_flash_version,
2291         .start_scsi             = qla24xx_dif_start_scsi,
2292         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2293         .abort_isp              = qla2x00_abort_isp,
2294         .iospace_config         = qla2x00_iospace_config,
2295         .initialize_adapter     = qla2x00_initialize_adapter,
2296 };
2297
2298 static struct isp_operations qla82xx_isp_ops = {
2299         .pci_config             = qla82xx_pci_config,
2300         .reset_chip             = qla82xx_reset_chip,
2301         .chip_diag              = qla24xx_chip_diag,
2302         .config_rings           = qla82xx_config_rings,
2303         .reset_adapter          = qla24xx_reset_adapter,
2304         .nvram_config           = qla81xx_nvram_config,
2305         .update_fw_options      = qla24xx_update_fw_options,
2306         .load_risc              = qla82xx_load_risc,
2307         .pci_info_str           = qla24xx_pci_info_str,
2308         .fw_version_str         = qla24xx_fw_version_str,
2309         .intr_handler           = qla82xx_intr_handler,
2310         .enable_intrs           = qla82xx_enable_intrs,
2311         .disable_intrs          = qla82xx_disable_intrs,
2312         .abort_command          = qla24xx_abort_command,
2313         .target_reset           = qla24xx_abort_target,
2314         .lun_reset              = qla24xx_lun_reset,
2315         .fabric_login           = qla24xx_login_fabric,
2316         .fabric_logout          = qla24xx_fabric_logout,
2317         .calc_req_entries       = NULL,
2318         .build_iocbs            = NULL,
2319         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2320         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2321         .read_nvram             = qla24xx_read_nvram_data,
2322         .write_nvram            = qla24xx_write_nvram_data,
2323         .fw_dump                = qla82xx_fw_dump,
2324         .beacon_on              = qla82xx_beacon_on,
2325         .beacon_off             = qla82xx_beacon_off,
2326         .beacon_blink           = NULL,
2327         .read_optrom            = qla82xx_read_optrom_data,
2328         .write_optrom           = qla82xx_write_optrom_data,
2329         .get_flash_version      = qla82xx_get_flash_version,
2330         .start_scsi             = qla82xx_start_scsi,
2331         .start_scsi_mq          = NULL,
2332         .abort_isp              = qla82xx_abort_isp,
2333         .iospace_config         = qla82xx_iospace_config,
2334         .initialize_adapter     = qla2x00_initialize_adapter,
2335 };
2336
2337 static struct isp_operations qla8044_isp_ops = {
2338         .pci_config             = qla82xx_pci_config,
2339         .reset_chip             = qla82xx_reset_chip,
2340         .chip_diag              = qla24xx_chip_diag,
2341         .config_rings           = qla82xx_config_rings,
2342         .reset_adapter          = qla24xx_reset_adapter,
2343         .nvram_config           = qla81xx_nvram_config,
2344         .update_fw_options      = qla24xx_update_fw_options,
2345         .load_risc              = qla82xx_load_risc,
2346         .pci_info_str           = qla24xx_pci_info_str,
2347         .fw_version_str         = qla24xx_fw_version_str,
2348         .intr_handler           = qla8044_intr_handler,
2349         .enable_intrs           = qla82xx_enable_intrs,
2350         .disable_intrs          = qla82xx_disable_intrs,
2351         .abort_command          = qla24xx_abort_command,
2352         .target_reset           = qla24xx_abort_target,
2353         .lun_reset              = qla24xx_lun_reset,
2354         .fabric_login           = qla24xx_login_fabric,
2355         .fabric_logout          = qla24xx_fabric_logout,
2356         .calc_req_entries       = NULL,
2357         .build_iocbs            = NULL,
2358         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2359         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2360         .read_nvram             = NULL,
2361         .write_nvram            = NULL,
2362         .fw_dump                = qla8044_fw_dump,
2363         .beacon_on              = qla82xx_beacon_on,
2364         .beacon_off             = qla82xx_beacon_off,
2365         .beacon_blink           = NULL,
2366         .read_optrom            = qla8044_read_optrom_data,
2367         .write_optrom           = qla8044_write_optrom_data,
2368         .get_flash_version      = qla82xx_get_flash_version,
2369         .start_scsi             = qla82xx_start_scsi,
2370         .start_scsi_mq          = NULL,
2371         .abort_isp              = qla8044_abort_isp,
2372         .iospace_config         = qla82xx_iospace_config,
2373         .initialize_adapter     = qla2x00_initialize_adapter,
2374 };
2375
2376 static struct isp_operations qla83xx_isp_ops = {
2377         .pci_config             = qla25xx_pci_config,
2378         .reset_chip             = qla24xx_reset_chip,
2379         .chip_diag              = qla24xx_chip_diag,
2380         .config_rings           = qla24xx_config_rings,
2381         .reset_adapter          = qla24xx_reset_adapter,
2382         .nvram_config           = qla81xx_nvram_config,
2383         .update_fw_options      = qla81xx_update_fw_options,
2384         .load_risc              = qla81xx_load_risc,
2385         .pci_info_str           = qla24xx_pci_info_str,
2386         .fw_version_str         = qla24xx_fw_version_str,
2387         .intr_handler           = qla24xx_intr_handler,
2388         .enable_intrs           = qla24xx_enable_intrs,
2389         .disable_intrs          = qla24xx_disable_intrs,
2390         .abort_command          = qla24xx_abort_command,
2391         .target_reset           = qla24xx_abort_target,
2392         .lun_reset              = qla24xx_lun_reset,
2393         .fabric_login           = qla24xx_login_fabric,
2394         .fabric_logout          = qla24xx_fabric_logout,
2395         .calc_req_entries       = NULL,
2396         .build_iocbs            = NULL,
2397         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2398         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2399         .read_nvram             = NULL,
2400         .write_nvram            = NULL,
2401         .fw_dump                = qla83xx_fw_dump,
2402         .beacon_on              = qla24xx_beacon_on,
2403         .beacon_off             = qla24xx_beacon_off,
2404         .beacon_blink           = qla83xx_beacon_blink,
2405         .read_optrom            = qla25xx_read_optrom_data,
2406         .write_optrom           = qla24xx_write_optrom_data,
2407         .get_flash_version      = qla24xx_get_flash_version,
2408         .start_scsi             = qla24xx_dif_start_scsi,
2409         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2410         .abort_isp              = qla2x00_abort_isp,
2411         .iospace_config         = qla83xx_iospace_config,
2412         .initialize_adapter     = qla2x00_initialize_adapter,
2413 };
2414
2415 static struct isp_operations qlafx00_isp_ops = {
2416         .pci_config             = qlafx00_pci_config,
2417         .reset_chip             = qlafx00_soft_reset,
2418         .chip_diag              = qlafx00_chip_diag,
2419         .config_rings           = qlafx00_config_rings,
2420         .reset_adapter          = qlafx00_soft_reset,
2421         .nvram_config           = NULL,
2422         .update_fw_options      = NULL,
2423         .load_risc              = NULL,
2424         .pci_info_str           = qlafx00_pci_info_str,
2425         .fw_version_str         = qlafx00_fw_version_str,
2426         .intr_handler           = qlafx00_intr_handler,
2427         .enable_intrs           = qlafx00_enable_intrs,
2428         .disable_intrs          = qlafx00_disable_intrs,
2429         .abort_command          = qla24xx_async_abort_command,
2430         .target_reset           = qlafx00_abort_target,
2431         .lun_reset              = qlafx00_lun_reset,
2432         .fabric_login           = NULL,
2433         .fabric_logout          = NULL,
2434         .calc_req_entries       = NULL,
2435         .build_iocbs            = NULL,
2436         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2437         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2438         .read_nvram             = qla24xx_read_nvram_data,
2439         .write_nvram            = qla24xx_write_nvram_data,
2440         .fw_dump                = NULL,
2441         .beacon_on              = qla24xx_beacon_on,
2442         .beacon_off             = qla24xx_beacon_off,
2443         .beacon_blink           = NULL,
2444         .read_optrom            = qla24xx_read_optrom_data,
2445         .write_optrom           = qla24xx_write_optrom_data,
2446         .get_flash_version      = qla24xx_get_flash_version,
2447         .start_scsi             = qlafx00_start_scsi,
2448         .start_scsi_mq          = NULL,
2449         .abort_isp              = qlafx00_abort_isp,
2450         .iospace_config         = qlafx00_iospace_config,
2451         .initialize_adapter     = qlafx00_initialize_adapter,
2452 };
2453
2454 static struct isp_operations qla27xx_isp_ops = {
2455         .pci_config             = qla25xx_pci_config,
2456         .reset_chip             = qla24xx_reset_chip,
2457         .chip_diag              = qla24xx_chip_diag,
2458         .config_rings           = qla24xx_config_rings,
2459         .reset_adapter          = qla24xx_reset_adapter,
2460         .nvram_config           = qla81xx_nvram_config,
2461         .update_fw_options      = qla24xx_update_fw_options,
2462         .load_risc              = qla81xx_load_risc,
2463         .pci_info_str           = qla24xx_pci_info_str,
2464         .fw_version_str         = qla24xx_fw_version_str,
2465         .intr_handler           = qla24xx_intr_handler,
2466         .enable_intrs           = qla24xx_enable_intrs,
2467         .disable_intrs          = qla24xx_disable_intrs,
2468         .abort_command          = qla24xx_abort_command,
2469         .target_reset           = qla24xx_abort_target,
2470         .lun_reset              = qla24xx_lun_reset,
2471         .fabric_login           = qla24xx_login_fabric,
2472         .fabric_logout          = qla24xx_fabric_logout,
2473         .calc_req_entries       = NULL,
2474         .build_iocbs            = NULL,
2475         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2476         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2477         .read_nvram             = NULL,
2478         .write_nvram            = NULL,
2479         .fw_dump                = qla27xx_fwdump,
2480         .beacon_on              = qla24xx_beacon_on,
2481         .beacon_off             = qla24xx_beacon_off,
2482         .beacon_blink           = qla83xx_beacon_blink,
2483         .read_optrom            = qla25xx_read_optrom_data,
2484         .write_optrom           = qla24xx_write_optrom_data,
2485         .get_flash_version      = qla24xx_get_flash_version,
2486         .start_scsi             = qla24xx_dif_start_scsi,
2487         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2488         .abort_isp              = qla2x00_abort_isp,
2489         .iospace_config         = qla83xx_iospace_config,
2490         .initialize_adapter     = qla2x00_initialize_adapter,
2491 };
2492
2493 static inline void
2494 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2495 {
2496         ha->device_type = DT_EXTENDED_IDS;
2497         switch (ha->pdev->device) {
2498         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2499                 ha->isp_type |= DT_ISP2100;
2500                 ha->device_type &= ~DT_EXTENDED_IDS;
2501                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2502                 break;
2503         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2504                 ha->isp_type |= DT_ISP2200;
2505                 ha->device_type &= ~DT_EXTENDED_IDS;
2506                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2507                 break;
2508         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2509                 ha->isp_type |= DT_ISP2300;
2510                 ha->device_type |= DT_ZIO_SUPPORTED;
2511                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2512                 break;
2513         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2514                 ha->isp_type |= DT_ISP2312;
2515                 ha->device_type |= DT_ZIO_SUPPORTED;
2516                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2517                 break;
2518         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2519                 ha->isp_type |= DT_ISP2322;
2520                 ha->device_type |= DT_ZIO_SUPPORTED;
2521                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2522                     ha->pdev->subsystem_device == 0x0170)
2523                         ha->device_type |= DT_OEM_001;
2524                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2525                 break;
2526         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2527                 ha->isp_type |= DT_ISP6312;
2528                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2529                 break;
2530         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2531                 ha->isp_type |= DT_ISP6322;
2532                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2533                 break;
2534         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2535                 ha->isp_type |= DT_ISP2422;
2536                 ha->device_type |= DT_ZIO_SUPPORTED;
2537                 ha->device_type |= DT_FWI2;
2538                 ha->device_type |= DT_IIDMA;
2539                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2540                 break;
2541         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2542                 ha->isp_type |= DT_ISP2432;
2543                 ha->device_type |= DT_ZIO_SUPPORTED;
2544                 ha->device_type |= DT_FWI2;
2545                 ha->device_type |= DT_IIDMA;
2546                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2547                 break;
2548         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2549                 ha->isp_type |= DT_ISP8432;
2550                 ha->device_type |= DT_ZIO_SUPPORTED;
2551                 ha->device_type |= DT_FWI2;
2552                 ha->device_type |= DT_IIDMA;
2553                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2554                 break;
2555         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2556                 ha->isp_type |= DT_ISP5422;
2557                 ha->device_type |= DT_FWI2;
2558                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2559                 break;
2560         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2561                 ha->isp_type |= DT_ISP5432;
2562                 ha->device_type |= DT_FWI2;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2566                 ha->isp_type |= DT_ISP2532;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 ha->device_type |= DT_FWI2;
2569                 ha->device_type |= DT_IIDMA;
2570                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2571                 break;
2572         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2573                 ha->isp_type |= DT_ISP8001;
2574                 ha->device_type |= DT_ZIO_SUPPORTED;
2575                 ha->device_type |= DT_FWI2;
2576                 ha->device_type |= DT_IIDMA;
2577                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2578                 break;
2579         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2580                 ha->isp_type |= DT_ISP8021;
2581                 ha->device_type |= DT_ZIO_SUPPORTED;
2582                 ha->device_type |= DT_FWI2;
2583                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2584                 /* Initialize 82XX ISP flags */
2585                 qla82xx_init_flags(ha);
2586                 break;
2587          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2588                 ha->isp_type |= DT_ISP8044;
2589                 ha->device_type |= DT_ZIO_SUPPORTED;
2590                 ha->device_type |= DT_FWI2;
2591                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2592                 /* Initialize 82XX ISP flags */
2593                 qla82xx_init_flags(ha);
2594                 break;
2595         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2596                 ha->isp_type |= DT_ISP2031;
2597                 ha->device_type |= DT_ZIO_SUPPORTED;
2598                 ha->device_type |= DT_FWI2;
2599                 ha->device_type |= DT_IIDMA;
2600                 ha->device_type |= DT_T10_PI;
2601                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2602                 break;
2603         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2604                 ha->isp_type |= DT_ISP8031;
2605                 ha->device_type |= DT_ZIO_SUPPORTED;
2606                 ha->device_type |= DT_FWI2;
2607                 ha->device_type |= DT_IIDMA;
2608                 ha->device_type |= DT_T10_PI;
2609                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2610                 break;
2611         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2612                 ha->isp_type |= DT_ISPFX00;
2613                 break;
2614         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2615                 ha->isp_type |= DT_ISP2071;
2616                 ha->device_type |= DT_ZIO_SUPPORTED;
2617                 ha->device_type |= DT_FWI2;
2618                 ha->device_type |= DT_IIDMA;
2619                 ha->device_type |= DT_T10_PI;
2620                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2621                 break;
2622         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2623                 ha->isp_type |= DT_ISP2271;
2624                 ha->device_type |= DT_ZIO_SUPPORTED;
2625                 ha->device_type |= DT_FWI2;
2626                 ha->device_type |= DT_IIDMA;
2627                 ha->device_type |= DT_T10_PI;
2628                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2629                 break;
2630         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2631                 ha->isp_type |= DT_ISP2261;
2632                 ha->device_type |= DT_ZIO_SUPPORTED;
2633                 ha->device_type |= DT_FWI2;
2634                 ha->device_type |= DT_IIDMA;
2635                 ha->device_type |= DT_T10_PI;
2636                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2637                 break;
2638         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2639         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2640                 ha->isp_type |= DT_ISP2081;
2641                 ha->device_type |= DT_ZIO_SUPPORTED;
2642                 ha->device_type |= DT_FWI2;
2643                 ha->device_type |= DT_IIDMA;
2644                 ha->device_type |= DT_T10_PI;
2645                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2646                 break;
2647         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2648         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2649                 ha->isp_type |= DT_ISP2281;
2650                 ha->device_type |= DT_ZIO_SUPPORTED;
2651                 ha->device_type |= DT_FWI2;
2652                 ha->device_type |= DT_IIDMA;
2653                 ha->device_type |= DT_T10_PI;
2654                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2655                 break;
2656         }
2657
2658         if (IS_QLA82XX(ha))
2659                 ha->port_no = ha->portnum & 1;
2660         else {
2661                 /* Get adapter physical port no from interrupt pin register. */
2662                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2663                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2664                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2665                         ha->port_no--;
2666                 else
2667                         ha->port_no = !(ha->port_no & 1);
2668         }
2669
2670         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2671             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2672             ha->device_type, ha->port_no, ha->fw_srisc_address);
2673 }
2674
2675 static void
2676 qla2xxx_scan_start(struct Scsi_Host *shost)
2677 {
2678         scsi_qla_host_t *vha = shost_priv(shost);
2679
2680         if (vha->hw->flags.running_gold_fw)
2681                 return;
2682
2683         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2684         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2685         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2686         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2687 }
2688
2689 static int
2690 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2691 {
2692         scsi_qla_host_t *vha = shost_priv(shost);
2693
2694         if (test_bit(UNLOADING, &vha->dpc_flags))
2695                 return 1;
2696         if (!vha->host)
2697                 return 1;
2698         if (time > vha->hw->loop_reset_delay * HZ)
2699                 return 1;
2700
2701         return atomic_read(&vha->loop_state) == LOOP_READY;
2702 }
2703
2704 static void qla2x00_iocb_work_fn(struct work_struct *work)
2705 {
2706         struct scsi_qla_host *vha = container_of(work,
2707                 struct scsi_qla_host, iocb_work);
2708         struct qla_hw_data *ha = vha->hw;
2709         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2710         int i = 2;
2711         unsigned long flags;
2712
2713         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2714                 return;
2715
2716         while (!list_empty(&vha->work_list) && i > 0) {
2717                 qla2x00_do_work(vha);
2718                 i--;
2719         }
2720
2721         spin_lock_irqsave(&vha->work_lock, flags);
2722         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2723         spin_unlock_irqrestore(&vha->work_lock, flags);
2724 }
2725
2726 /*
2727  * PCI driver interface
2728  */
2729 static int
2730 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2731 {
2732         int     ret = -ENODEV;
2733         struct Scsi_Host *host;
2734         scsi_qla_host_t *base_vha = NULL;
2735         struct qla_hw_data *ha;
2736         char pci_info[30];
2737         char fw_str[30], wq_name[30];
2738         struct scsi_host_template *sht;
2739         int bars, mem_only = 0;
2740         uint16_t req_length = 0, rsp_length = 0;
2741         struct req_que *req = NULL;
2742         struct rsp_que *rsp = NULL;
2743         int i;
2744
2745         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2746         sht = &qla2xxx_driver_template;
2747         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2748             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2749             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2750             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2751             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2752             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2753             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2754             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2755             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2756             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2757             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2758             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2759             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2760             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2761             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2762             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2763             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2764             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2765             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2766                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2767                 mem_only = 1;
2768                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2769                     "Mem only adapter.\n");
2770         }
2771         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2772             "Bars=%d.\n", bars);
2773
2774         if (mem_only) {
2775                 if (pci_enable_device_mem(pdev))
2776                         return ret;
2777         } else {
2778                 if (pci_enable_device(pdev))
2779                         return ret;
2780         }
2781
2782         if (is_kdump_kernel()) {
2783                 ql2xmqsupport = 0;
2784                 ql2xallocfwdump = 0;
2785         }
2786
2787         /* This may fail but that's ok */
2788         pci_enable_pcie_error_reporting(pdev);
2789
2790         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2791         if (!ha) {
2792                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2793                     "Unable to allocate memory for ha.\n");
2794                 goto disable_device;
2795         }
2796         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2797             "Memory allocated for ha=%p.\n", ha);
2798         ha->pdev = pdev;
2799         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2800         spin_lock_init(&ha->tgt.q_full_lock);
2801         spin_lock_init(&ha->tgt.sess_lock);
2802         spin_lock_init(&ha->tgt.atio_lock);
2803
2804         atomic_set(&ha->nvme_active_aen_cnt, 0);
2805
2806         /* Clear our data area */
2807         ha->bars = bars;
2808         ha->mem_only = mem_only;
2809         spin_lock_init(&ha->hardware_lock);
2810         spin_lock_init(&ha->vport_slock);
2811         mutex_init(&ha->selflogin_lock);
2812         mutex_init(&ha->optrom_mutex);
2813
2814         /* Set ISP-type information. */
2815         qla2x00_set_isp_flags(ha);
2816
2817         /* Set EEH reset type to fundamental if required by hba */
2818         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2819             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2820                 pdev->needs_freset = 1;
2821
2822         ha->prev_topology = 0;
2823         ha->init_cb_size = sizeof(init_cb_t);
2824         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2825         ha->optrom_size = OPTROM_SIZE_2300;
2826         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2827         atomic_set(&ha->num_pend_mbx_stage1, 0);
2828         atomic_set(&ha->num_pend_mbx_stage2, 0);
2829         atomic_set(&ha->num_pend_mbx_stage3, 0);
2830         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2831         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2832
2833         /* Assign ISP specific operations. */
2834         if (IS_QLA2100(ha)) {
2835                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2836                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2837                 req_length = REQUEST_ENTRY_CNT_2100;
2838                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2839                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2840                 ha->gid_list_info_size = 4;
2841                 ha->flash_conf_off = ~0;
2842                 ha->flash_data_off = ~0;
2843                 ha->nvram_conf_off = ~0;
2844                 ha->nvram_data_off = ~0;
2845                 ha->isp_ops = &qla2100_isp_ops;
2846         } else if (IS_QLA2200(ha)) {
2847                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2848                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2849                 req_length = REQUEST_ENTRY_CNT_2200;
2850                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2851                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2852                 ha->gid_list_info_size = 4;
2853                 ha->flash_conf_off = ~0;
2854                 ha->flash_data_off = ~0;
2855                 ha->nvram_conf_off = ~0;
2856                 ha->nvram_data_off = ~0;
2857                 ha->isp_ops = &qla2100_isp_ops;
2858         } else if (IS_QLA23XX(ha)) {
2859                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2860                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2861                 req_length = REQUEST_ENTRY_CNT_2200;
2862                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2863                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2864                 ha->gid_list_info_size = 6;
2865                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2866                         ha->optrom_size = OPTROM_SIZE_2322;
2867                 ha->flash_conf_off = ~0;
2868                 ha->flash_data_off = ~0;
2869                 ha->nvram_conf_off = ~0;
2870                 ha->nvram_data_off = ~0;
2871                 ha->isp_ops = &qla2300_isp_ops;
2872         } else if (IS_QLA24XX_TYPE(ha)) {
2873                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2874                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2875                 req_length = REQUEST_ENTRY_CNT_24XX;
2876                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2877                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2878                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2879                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2880                 ha->gid_list_info_size = 8;
2881                 ha->optrom_size = OPTROM_SIZE_24XX;
2882                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2883                 ha->isp_ops = &qla24xx_isp_ops;
2884                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2885                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2886                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2887                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2888         } else if (IS_QLA25XX(ha)) {
2889                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2890                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2891                 req_length = REQUEST_ENTRY_CNT_24XX;
2892                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2893                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2894                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2895                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2896                 ha->gid_list_info_size = 8;
2897                 ha->optrom_size = OPTROM_SIZE_25XX;
2898                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2899                 ha->isp_ops = &qla25xx_isp_ops;
2900                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2901                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2902                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2903                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2904         } else if (IS_QLA81XX(ha)) {
2905                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2906                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2907                 req_length = REQUEST_ENTRY_CNT_24XX;
2908                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2909                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2910                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2911                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2912                 ha->gid_list_info_size = 8;
2913                 ha->optrom_size = OPTROM_SIZE_81XX;
2914                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2915                 ha->isp_ops = &qla81xx_isp_ops;
2916                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2917                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2918                 ha->nvram_conf_off = ~0;
2919                 ha->nvram_data_off = ~0;
2920         } else if (IS_QLA82XX(ha)) {
2921                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2922                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2923                 req_length = REQUEST_ENTRY_CNT_82XX;
2924                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2925                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2926                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2927                 ha->gid_list_info_size = 8;
2928                 ha->optrom_size = OPTROM_SIZE_82XX;
2929                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2930                 ha->isp_ops = &qla82xx_isp_ops;
2931                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2932                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2933                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2934                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2935         } else if (IS_QLA8044(ha)) {
2936                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2937                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2938                 req_length = REQUEST_ENTRY_CNT_82XX;
2939                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2940                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2941                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2942                 ha->gid_list_info_size = 8;
2943                 ha->optrom_size = OPTROM_SIZE_83XX;
2944                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2945                 ha->isp_ops = &qla8044_isp_ops;
2946                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2947                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2948                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2949                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2950         } else if (IS_QLA83XX(ha)) {
2951                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2952                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2953                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2954                 req_length = REQUEST_ENTRY_CNT_83XX;
2955                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2956                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2957                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2958                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2959                 ha->gid_list_info_size = 8;
2960                 ha->optrom_size = OPTROM_SIZE_83XX;
2961                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2962                 ha->isp_ops = &qla83xx_isp_ops;
2963                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2964                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2965                 ha->nvram_conf_off = ~0;
2966                 ha->nvram_data_off = ~0;
2967         }  else if (IS_QLAFX00(ha)) {
2968                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2969                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2970                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2971                 req_length = REQUEST_ENTRY_CNT_FX00;
2972                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2973                 ha->isp_ops = &qlafx00_isp_ops;
2974                 ha->port_down_retry_count = 30; /* default value */
2975                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2976                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2977                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2978                 ha->mr.fw_hbt_en = 1;
2979                 ha->mr.host_info_resend = false;
2980                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2981         } else if (IS_QLA27XX(ha)) {
2982                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2983                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2984                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2985                 req_length = REQUEST_ENTRY_CNT_83XX;
2986                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2987                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2988                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2989                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2990                 ha->gid_list_info_size = 8;
2991                 ha->optrom_size = OPTROM_SIZE_83XX;
2992                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2993                 ha->isp_ops = &qla27xx_isp_ops;
2994                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2995                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2996                 ha->nvram_conf_off = ~0;
2997                 ha->nvram_data_off = ~0;
2998         } else if (IS_QLA28XX(ha)) {
2999                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3000                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3001                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3002                 req_length = REQUEST_ENTRY_CNT_24XX;
3003                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3004                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3005                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3006                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3007                 ha->gid_list_info_size = 8;
3008                 ha->optrom_size = OPTROM_SIZE_28XX;
3009                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3010                 ha->isp_ops = &qla27xx_isp_ops;
3011                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3012                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3013                 ha->nvram_conf_off = ~0;
3014                 ha->nvram_data_off = ~0;
3015         }
3016
3017         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3018             "mbx_count=%d, req_length=%d, "
3019             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3020             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3021             "max_fibre_devices=%d.\n",
3022             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3023             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3024             ha->nvram_npiv_size, ha->max_fibre_devices);
3025         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3026             "isp_ops=%p, flash_conf_off=%d, "
3027             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3028             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3029             ha->nvram_conf_off, ha->nvram_data_off);
3030
3031         /* Configure PCI I/O space */
3032         ret = ha->isp_ops->iospace_config(ha);
3033         if (ret)
3034                 goto iospace_config_failed;
3035
3036         ql_log_pci(ql_log_info, pdev, 0x001d,
3037             "Found an ISP%04X irq %d iobase 0x%p.\n",
3038             pdev->device, pdev->irq, ha->iobase);
3039         mutex_init(&ha->vport_lock);
3040         mutex_init(&ha->mq_lock);
3041         init_completion(&ha->mbx_cmd_comp);
3042         complete(&ha->mbx_cmd_comp);
3043         init_completion(&ha->mbx_intr_comp);
3044         init_completion(&ha->dcbx_comp);
3045         init_completion(&ha->lb_portup_comp);
3046
3047         set_bit(0, (unsigned long *) ha->vp_idx_map);
3048
3049         qla2x00_config_dma_addressing(ha);
3050         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3051             "64 Bit addressing is %s.\n",
3052             ha->flags.enable_64bit_addressing ? "enable" :
3053             "disable");
3054         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3055         if (ret) {
3056                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3057                     "Failed to allocate memory for adapter, aborting.\n");
3058
3059                 goto probe_hw_failed;
3060         }
3061
3062         req->max_q_depth = MAX_Q_DEPTH;
3063         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3064                 req->max_q_depth = ql2xmaxqdepth;
3065
3066
3067         base_vha = qla2x00_create_host(sht, ha);
3068         if (!base_vha) {
3069                 ret = -ENOMEM;
3070                 goto probe_hw_failed;
3071         }
3072
3073         pci_set_drvdata(pdev, base_vha);
3074         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3075
3076         host = base_vha->host;
3077         base_vha->req = req;
3078         if (IS_QLA2XXX_MIDTYPE(ha))
3079                 base_vha->mgmt_svr_loop_id =
3080                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3081         else
3082                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3083                                                 base_vha->vp_idx;
3084
3085         /* Setup fcport template structure. */
3086         ha->mr.fcport.vha = base_vha;
3087         ha->mr.fcport.port_type = FCT_UNKNOWN;
3088         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3089         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3090         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3091         ha->mr.fcport.scan_state = 1;
3092
3093         /* Set the SG table size based on ISP type */
3094         if (!IS_FWI2_CAPABLE(ha)) {
3095                 if (IS_QLA2100(ha))
3096                         host->sg_tablesize = 32;
3097         } else {
3098                 if (!IS_QLA82XX(ha))
3099                         host->sg_tablesize = QLA_SG_ALL;
3100         }
3101         host->max_id = ha->max_fibre_devices;
3102         host->cmd_per_lun = 3;
3103         host->unique_id = host->host_no;
3104         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3105                 host->max_cmd_len = 32;
3106         else
3107                 host->max_cmd_len = MAX_CMDSZ;
3108         host->max_channel = MAX_BUSES - 1;
3109         /* Older HBAs support only 16-bit LUNs */
3110         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3111             ql2xmaxlun > 0xffff)
3112                 host->max_lun = 0xffff;
3113         else
3114                 host->max_lun = ql2xmaxlun;
3115         host->transportt = qla2xxx_transport_template;
3116         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3117
3118         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3119             "max_id=%d this_id=%d "
3120             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3121             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3122             host->this_id, host->cmd_per_lun, host->unique_id,
3123             host->max_cmd_len, host->max_channel, host->max_lun,
3124             host->transportt, sht->vendor_id);
3125
3126         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3127
3128         /* Set up the irqs */
3129         ret = qla2x00_request_irqs(ha, rsp);
3130         if (ret)
3131                 goto probe_failed;
3132
3133         /* Alloc arrays of request and response ring ptrs */
3134         ret = qla2x00_alloc_queues(ha, req, rsp);
3135         if (ret) {
3136                 ql_log(ql_log_fatal, base_vha, 0x003d,
3137                     "Failed to allocate memory for queue pointers..."
3138                     "aborting.\n");
3139                 ret = -ENODEV;
3140                 goto probe_failed;
3141         }
3142
3143         if (ha->mqenable) {
3144                 /* number of hardware queues supported by blk/scsi-mq*/
3145                 host->nr_hw_queues = ha->max_qpairs;
3146
3147                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3148                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3149         } else {
3150                 if (ql2xnvmeenable) {
3151                         host->nr_hw_queues = ha->max_qpairs;
3152                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3153                             "FC-NVMe support is enabled, HW queues=%d\n",
3154                             host->nr_hw_queues);
3155                 } else {
3156                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3157                             "blk/scsi-mq disabled.\n");
3158                 }
3159         }
3160
3161         qlt_probe_one_stage1(base_vha, ha);
3162
3163         pci_save_state(pdev);
3164
3165         /* Assign back pointers */
3166         rsp->req = req;
3167         req->rsp = rsp;
3168
3169         if (IS_QLAFX00(ha)) {
3170                 ha->rsp_q_map[0] = rsp;
3171                 ha->req_q_map[0] = req;
3172                 set_bit(0, ha->req_qid_map);
3173                 set_bit(0, ha->rsp_qid_map);
3174         }
3175
3176         /* FWI2-capable only. */
3177         req->req_q_in = &ha->iobase->isp24.req_q_in;
3178         req->req_q_out = &ha->iobase->isp24.req_q_out;
3179         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3180         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3181         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3182             IS_QLA28XX(ha)) {
3183                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3184                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3185                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3186                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3187         }
3188
3189         if (IS_QLAFX00(ha)) {
3190                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3191                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3192                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3193                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3194         }
3195
3196         if (IS_P3P_TYPE(ha)) {
3197                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3198                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3199                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3200         }
3201
3202         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3203             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3204             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3205         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3206             "req->req_q_in=%p req->req_q_out=%p "
3207             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3208             req->req_q_in, req->req_q_out,
3209             rsp->rsp_q_in, rsp->rsp_q_out);
3210         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3211             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3212             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3213         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3214             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3215             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3216
3217         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3218         if (unlikely(!ha->wq)) {
3219                 ret = -ENOMEM;
3220                 goto probe_failed;
3221         }
3222
3223         if (ha->isp_ops->initialize_adapter(base_vha)) {
3224                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3225                     "Failed to initialize adapter - Adapter flags %x.\n",
3226                     base_vha->device_flags);
3227
3228                 if (IS_QLA82XX(ha)) {
3229                         qla82xx_idc_lock(ha);
3230                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3231                                 QLA8XXX_DEV_FAILED);
3232                         qla82xx_idc_unlock(ha);
3233                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3234                             "HW State: FAILED.\n");
3235                 } else if (IS_QLA8044(ha)) {
3236                         qla8044_idc_lock(ha);
3237                         qla8044_wr_direct(base_vha,
3238                                 QLA8044_CRB_DEV_STATE_INDEX,
3239                                 QLA8XXX_DEV_FAILED);
3240                         qla8044_idc_unlock(ha);
3241                         ql_log(ql_log_fatal, base_vha, 0x0150,
3242                             "HW State: FAILED.\n");
3243                 }
3244
3245                 ret = -ENODEV;
3246                 goto probe_failed;
3247         }
3248
3249         if (IS_QLAFX00(ha))
3250                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3251         else
3252                 host->can_queue = req->num_outstanding_cmds - 10;
3253
3254         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3255             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3256             host->can_queue, base_vha->req,
3257             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3258
3259         if (ha->mqenable) {
3260                 bool startit = false;
3261
3262                 if (QLA_TGT_MODE_ENABLED())
3263                         startit = false;
3264
3265                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3266                         startit = true;
3267
3268                 /* Create start of day qpairs for Block MQ */
3269                 for (i = 0; i < ha->max_qpairs; i++)
3270                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3271         }
3272
3273         if (ha->flags.running_gold_fw)
3274                 goto skip_dpc;
3275
3276         /*
3277          * Startup the kernel thread for this host adapter
3278          */
3279         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3280             "%s_dpc", base_vha->host_str);
3281         if (IS_ERR(ha->dpc_thread)) {
3282                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3283                     "Failed to start DPC thread.\n");
3284                 ret = PTR_ERR(ha->dpc_thread);
3285                 ha->dpc_thread = NULL;
3286                 goto probe_failed;
3287         }
3288         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3289             "DPC thread started successfully.\n");
3290
3291         /*
3292          * If we're not coming up in initiator mode, we might sit for
3293          * a while without waking up the dpc thread, which leads to a
3294          * stuck process warning.  So just kick the dpc once here and
3295          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3296          */
3297         qla2xxx_wake_dpc(base_vha);
3298
3299         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3300
3301         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3302                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3303                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3304                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3305
3306                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3307                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3308                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3309                 INIT_WORK(&ha->idc_state_handler,
3310                     qla83xx_idc_state_handler_work);
3311                 INIT_WORK(&ha->nic_core_unrecoverable,
3312                     qla83xx_nic_core_unrecoverable_work);
3313         }
3314
3315 skip_dpc:
3316         list_add_tail(&base_vha->list, &ha->vp_list);
3317         base_vha->host->irq = ha->pdev->irq;
3318
3319         /* Initialized the timer */
3320         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3321         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3322             "Started qla2x00_timer with "
3323             "interval=%d.\n", WATCH_INTERVAL);
3324         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3325             "Detected hba at address=%p.\n",
3326             ha);
3327
3328         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3329                 if (ha->fw_attributes & BIT_4) {
3330                         int prot = 0, guard;
3331
3332                         base_vha->flags.difdix_supported = 1;
3333                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3334                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3335                         if (ql2xenabledif == 1)
3336                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3337                         if (ql2xprotmask)
3338                                 scsi_host_set_prot(host, ql2xprotmask);
3339                         else
3340                                 scsi_host_set_prot(host,
3341                                     prot | SHOST_DIF_TYPE1_PROTECTION
3342                                     | SHOST_DIF_TYPE2_PROTECTION
3343                                     | SHOST_DIF_TYPE3_PROTECTION
3344                                     | SHOST_DIX_TYPE1_PROTECTION
3345                                     | SHOST_DIX_TYPE2_PROTECTION
3346                                     | SHOST_DIX_TYPE3_PROTECTION);
3347
3348                         guard = SHOST_DIX_GUARD_CRC;
3349
3350                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3351                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3352                                 guard |= SHOST_DIX_GUARD_IP;
3353
3354                         if (ql2xprotguard)
3355                                 scsi_host_set_guard(host, ql2xprotguard);
3356                         else
3357                                 scsi_host_set_guard(host, guard);
3358                 } else
3359                         base_vha->flags.difdix_supported = 0;
3360         }
3361
3362         ha->isp_ops->enable_intrs(ha);
3363
3364         if (IS_QLAFX00(ha)) {
3365                 ret = qlafx00_fx_disc(base_vha,
3366                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3367                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3368                     QLA_SG_ALL : 128;
3369         }
3370
3371         ret = scsi_add_host(host, &pdev->dev);
3372         if (ret)
3373                 goto probe_failed;
3374
3375         base_vha->flags.init_done = 1;
3376         base_vha->flags.online = 1;
3377         ha->prev_minidump_failed = 0;
3378
3379         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3380             "Init done and hba is online.\n");
3381
3382         if (qla_ini_mode_enabled(base_vha) ||
3383                 qla_dual_mode_enabled(base_vha))
3384                 scsi_scan_host(host);
3385         else
3386                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3387                         "skipping scsi_scan_host() for non-initiator port\n");
3388
3389         qla2x00_alloc_sysfs_attr(base_vha);
3390
3391         if (IS_QLAFX00(ha)) {
3392                 ret = qlafx00_fx_disc(base_vha,
3393                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3394
3395                 /* Register system information */
3396                 ret =  qlafx00_fx_disc(base_vha,
3397                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3398         }
3399
3400         qla2x00_init_host_attr(base_vha);
3401
3402         qla2x00_dfs_setup(base_vha);
3403
3404         ql_log(ql_log_info, base_vha, 0x00fb,
3405             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3406         ql_log(ql_log_info, base_vha, 0x00fc,
3407             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3408             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3409                                                        sizeof(pci_info)),
3410             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3411             base_vha->host_no,
3412             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3413
3414         qlt_add_target(ha, base_vha);
3415
3416         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3417
3418         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3419                 return -ENODEV;
3420
3421         if (ha->flags.detected_lr_sfp) {
3422                 ql_log(ql_log_info, base_vha, 0xffff,
3423                     "Reset chip to pick up LR SFP setting\n");
3424                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3425                 qla2xxx_wake_dpc(base_vha);
3426         }
3427
3428         return 0;
3429
3430 probe_failed:
3431         if (base_vha->gnl.l) {
3432                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3433                                 base_vha->gnl.l, base_vha->gnl.ldma);
3434                 base_vha->gnl.l = NULL;
3435         }
3436
3437         if (base_vha->timer_active)
3438                 qla2x00_stop_timer(base_vha);
3439         base_vha->flags.online = 0;
3440         if (ha->dpc_thread) {
3441                 struct task_struct *t = ha->dpc_thread;
3442
3443                 ha->dpc_thread = NULL;
3444                 kthread_stop(t);
3445         }
3446
3447         qla2x00_free_device(base_vha);
3448         scsi_host_put(base_vha->host);
3449         /*
3450          * Need to NULL out local req/rsp after
3451          * qla2x00_free_device => qla2x00_free_queues frees
3452          * what these are pointing to. Or else we'll
3453          * fall over below in qla2x00_free_req/rsp_que.
3454          */
3455         req = NULL;
3456         rsp = NULL;
3457
3458 probe_hw_failed:
3459         qla2x00_mem_free(ha);
3460         qla2x00_free_req_que(ha, req);
3461         qla2x00_free_rsp_que(ha, rsp);
3462         qla2x00_clear_drv_active(ha);
3463
3464 iospace_config_failed:
3465         if (IS_P3P_TYPE(ha)) {
3466                 if (!ha->nx_pcibase)
3467                         iounmap((device_reg_t *)ha->nx_pcibase);
3468                 if (!ql2xdbwr)
3469                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3470         } else {
3471                 if (ha->iobase)
3472                         iounmap(ha->iobase);
3473                 if (ha->cregbase)
3474                         iounmap(ha->cregbase);
3475         }
3476         pci_release_selected_regions(ha->pdev, ha->bars);
3477         kfree(ha);
3478
3479 disable_device:
3480         pci_disable_device(pdev);
3481         return ret;
3482 }
3483
3484 static void
3485 qla2x00_shutdown(struct pci_dev *pdev)
3486 {
3487         scsi_qla_host_t *vha;
3488         struct qla_hw_data  *ha;
3489
3490         vha = pci_get_drvdata(pdev);
3491         ha = vha->hw;
3492
3493         ql_log(ql_log_info, vha, 0xfffa,
3494                 "Adapter shutdown\n");
3495
3496         /*
3497          * Prevent future board_disable and wait
3498          * until any pending board_disable has completed.
3499          */
3500         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3501         cancel_work_sync(&ha->board_disable);
3502
3503         if (!atomic_read(&pdev->enable_cnt))
3504                 return;
3505
3506         /* Notify ISPFX00 firmware */
3507         if (IS_QLAFX00(ha))
3508                 qlafx00_driver_shutdown(vha, 20);
3509
3510         /* Turn-off FCE trace */
3511         if (ha->flags.fce_enabled) {
3512                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3513                 ha->flags.fce_enabled = 0;
3514         }
3515
3516         /* Turn-off EFT trace */
3517         if (ha->eft)
3518                 qla2x00_disable_eft_trace(vha);
3519
3520         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3521             IS_QLA28XX(ha)) {
3522                 if (ha->flags.fw_started)
3523                         qla2x00_abort_isp_cleanup(vha);
3524         } else {
3525                 /* Stop currently executing firmware. */
3526                 qla2x00_try_to_stop_firmware(vha);
3527         }
3528
3529         /* Disable timer */
3530         if (vha->timer_active)
3531                 qla2x00_stop_timer(vha);
3532
3533         /* Turn adapter off line */
3534         vha->flags.online = 0;
3535
3536         /* turn-off interrupts on the card */
3537         if (ha->interrupts_on) {
3538                 vha->flags.init_done = 0;
3539                 ha->isp_ops->disable_intrs(ha);
3540         }
3541
3542         qla2x00_free_irqs(vha);
3543
3544         qla2x00_free_fw_dump(ha);
3545
3546         pci_disable_device(pdev);
3547         ql_log(ql_log_info, vha, 0xfffe,
3548                 "Adapter shutdown successfully.\n");
3549 }
3550
3551 /* Deletes all the virtual ports for a given ha */
3552 static void
3553 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3554 {
3555         scsi_qla_host_t *vha;
3556         unsigned long flags;
3557
3558         mutex_lock(&ha->vport_lock);
3559         while (ha->cur_vport_count) {
3560                 spin_lock_irqsave(&ha->vport_slock, flags);
3561
3562                 BUG_ON(base_vha->list.next == &ha->vp_list);
3563                 /* This assumes first entry in ha->vp_list is always base vha */
3564                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3565                 scsi_host_get(vha->host);
3566
3567                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3568                 mutex_unlock(&ha->vport_lock);
3569
3570                 qla_nvme_delete(vha);
3571
3572                 fc_vport_terminate(vha->fc_vport);
3573                 scsi_host_put(vha->host);
3574
3575                 mutex_lock(&ha->vport_lock);
3576         }
3577         mutex_unlock(&ha->vport_lock);
3578 }
3579
3580 /* Stops all deferred work threads */
3581 static void
3582 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3583 {
3584         /* Cancel all work and destroy DPC workqueues */
3585         if (ha->dpc_lp_wq) {
3586                 cancel_work_sync(&ha->idc_aen);
3587                 destroy_workqueue(ha->dpc_lp_wq);
3588                 ha->dpc_lp_wq = NULL;
3589         }
3590
3591         if (ha->dpc_hp_wq) {
3592                 cancel_work_sync(&ha->nic_core_reset);
3593                 cancel_work_sync(&ha->idc_state_handler);
3594                 cancel_work_sync(&ha->nic_core_unrecoverable);
3595                 destroy_workqueue(ha->dpc_hp_wq);
3596                 ha->dpc_hp_wq = NULL;
3597         }
3598
3599         /* Kill the kernel thread for this host */
3600         if (ha->dpc_thread) {
3601                 struct task_struct *t = ha->dpc_thread;
3602
3603                 /*
3604                  * qla2xxx_wake_dpc checks for ->dpc_thread
3605                  * so we need to zero it out.
3606                  */
3607                 ha->dpc_thread = NULL;
3608                 kthread_stop(t);
3609         }
3610 }
3611
3612 static void
3613 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3614 {
3615         if (IS_QLA82XX(ha)) {
3616
3617                 iounmap((device_reg_t *)ha->nx_pcibase);
3618                 if (!ql2xdbwr)
3619                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3620         } else {
3621                 if (ha->iobase)
3622                         iounmap(ha->iobase);
3623
3624                 if (ha->cregbase)
3625                         iounmap(ha->cregbase);
3626
3627                 if (ha->mqiobase)
3628                         iounmap(ha->mqiobase);
3629
3630                 if (ha->msixbase)
3631                         iounmap(ha->msixbase);
3632         }
3633 }
3634
3635 static void
3636 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3637 {
3638         if (IS_QLA8044(ha)) {
3639                 qla8044_idc_lock(ha);
3640                 qla8044_clear_drv_active(ha);
3641                 qla8044_idc_unlock(ha);
3642         } else if (IS_QLA82XX(ha)) {
3643                 qla82xx_idc_lock(ha);
3644                 qla82xx_clear_drv_active(ha);
3645                 qla82xx_idc_unlock(ha);
3646         }
3647 }
3648
3649 static void
3650 qla2x00_remove_one(struct pci_dev *pdev)
3651 {
3652         scsi_qla_host_t *base_vha;
3653         struct qla_hw_data  *ha;
3654
3655         base_vha = pci_get_drvdata(pdev);
3656         ha = base_vha->hw;
3657         ql_log(ql_log_info, base_vha, 0xb079,
3658             "Removing driver\n");
3659
3660         /* Indicate device removal to prevent future board_disable and wait
3661          * until any pending board_disable has completed. */
3662         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3663         cancel_work_sync(&ha->board_disable);
3664
3665         /*
3666          * If the PCI device is disabled then there was a PCI-disconnect and
3667          * qla2x00_disable_board_on_pci_error has taken care of most of the
3668          * resources.
3669          */
3670         if (!atomic_read(&pdev->enable_cnt)) {
3671                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3672                     base_vha->gnl.l, base_vha->gnl.ldma);
3673                 base_vha->gnl.l = NULL;
3674                 scsi_host_put(base_vha->host);
3675                 kfree(ha);
3676                 pci_set_drvdata(pdev, NULL);
3677                 return;
3678         }
3679         qla2x00_wait_for_hba_ready(base_vha);
3680
3681         /*
3682          * if UNLOADING flag is already set, then continue unload,
3683          * where it was set first.
3684          */
3685         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3686                 return;
3687
3688         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3689             IS_QLA28XX(ha)) {
3690                 if (ha->flags.fw_started)
3691                         qla2x00_abort_isp_cleanup(base_vha);
3692         } else if (!IS_QLAFX00(ha)) {
3693                 if (IS_QLA8031(ha)) {
3694                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3695                             "Clearing fcoe driver presence.\n");
3696                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3697                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3698                                     "Error while clearing DRV-Presence.\n");
3699                 }
3700
3701                 qla2x00_try_to_stop_firmware(base_vha);
3702         }
3703
3704         qla2x00_wait_for_sess_deletion(base_vha);
3705
3706         qla_nvme_delete(base_vha);
3707
3708         dma_free_coherent(&ha->pdev->dev,
3709                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3710
3711         base_vha->gnl.l = NULL;
3712
3713         vfree(base_vha->scan.l);
3714
3715         if (IS_QLAFX00(ha))
3716                 qlafx00_driver_shutdown(base_vha, 20);
3717
3718         qla2x00_delete_all_vps(ha, base_vha);
3719
3720         qla2x00_dfs_remove(base_vha);
3721
3722         qla84xx_put_chip(base_vha);
3723
3724         /* Disable timer */
3725         if (base_vha->timer_active)
3726                 qla2x00_stop_timer(base_vha);
3727
3728         base_vha->flags.online = 0;
3729
3730         /* free DMA memory */
3731         if (ha->exlogin_buf)
3732                 qla2x00_free_exlogin_buffer(ha);
3733
3734         /* free DMA memory */
3735         if (ha->exchoffld_buf)
3736                 qla2x00_free_exchoffld_buffer(ha);
3737
3738         qla2x00_destroy_deferred_work(ha);
3739
3740         qlt_remove_target(ha, base_vha);
3741
3742         qla2x00_free_sysfs_attr(base_vha, true);
3743
3744         fc_remove_host(base_vha->host);
3745         qlt_remove_target_resources(ha);
3746
3747         scsi_remove_host(base_vha->host);
3748
3749         qla2x00_free_device(base_vha);
3750
3751         qla2x00_clear_drv_active(ha);
3752
3753         scsi_host_put(base_vha->host);
3754
3755         qla2x00_unmap_iobases(ha);
3756
3757         pci_release_selected_regions(ha->pdev, ha->bars);
3758         kfree(ha);
3759
3760         pci_disable_pcie_error_reporting(pdev);
3761
3762         pci_disable_device(pdev);
3763 }
3764
3765 static void
3766 qla2x00_free_device(scsi_qla_host_t *vha)
3767 {
3768         struct qla_hw_data *ha = vha->hw;
3769
3770         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3771
3772         /* Disable timer */
3773         if (vha->timer_active)
3774                 qla2x00_stop_timer(vha);
3775
3776         qla25xx_delete_queues(vha);
3777         vha->flags.online = 0;
3778
3779         /* turn-off interrupts on the card */
3780         if (ha->interrupts_on) {
3781                 vha->flags.init_done = 0;
3782                 ha->isp_ops->disable_intrs(ha);
3783         }
3784
3785         qla2x00_free_fcports(vha);
3786
3787         qla2x00_free_irqs(vha);
3788
3789         /* Flush the work queue and remove it */
3790         if (ha->wq) {
3791                 flush_workqueue(ha->wq);
3792                 destroy_workqueue(ha->wq);
3793                 ha->wq = NULL;
3794         }
3795
3796
3797         qla2x00_mem_free(ha);
3798
3799         qla82xx_md_free(vha);
3800
3801         qla2x00_free_queues(ha);
3802 }
3803
3804 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3805 {
3806         fc_port_t *fcport, *tfcport;
3807
3808         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3809                 qla2x00_free_fcport(fcport);
3810 }
3811
3812 static inline void
3813 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3814     int defer)
3815 {
3816         struct fc_rport *rport;
3817         scsi_qla_host_t *base_vha;
3818         unsigned long flags;
3819
3820         if (!fcport->rport)
3821                 return;
3822
3823         rport = fcport->rport;
3824         if (defer) {
3825                 base_vha = pci_get_drvdata(vha->hw->pdev);
3826                 spin_lock_irqsave(vha->host->host_lock, flags);
3827                 fcport->drport = rport;
3828                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3829                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3830                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3831                 qla2xxx_wake_dpc(base_vha);
3832         } else {
3833                 int now;
3834
3835                 if (rport) {
3836                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3837                             "%s %8phN. rport %p roles %x\n",
3838                             __func__, fcport->port_name, rport,
3839                             rport->roles);
3840                         fc_remote_port_delete(rport);
3841                 }
3842                 qlt_do_generation_tick(vha, &now);
3843         }
3844 }
3845
3846 /*
3847  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3848  *
3849  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3850  *
3851  * Return: None.
3852  *
3853  * Context:
3854  */
3855 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3856     int do_login, int defer)
3857 {
3858         if (IS_QLAFX00(vha->hw)) {
3859                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3860                 qla2x00_schedule_rport_del(vha, fcport, defer);
3861                 return;
3862         }
3863
3864         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3865             vha->vp_idx == fcport->vha->vp_idx) {
3866                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3867                 qla2x00_schedule_rport_del(vha, fcport, defer);
3868         }
3869         /*
3870          * We may need to retry the login, so don't change the state of the
3871          * port but do the retries.
3872          */
3873         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3874                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3875
3876         if (!do_login)
3877                 return;
3878
3879         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3880 }
3881
3882 /*
3883  * qla2x00_mark_all_devices_lost
3884  *      Updates fcport state when device goes offline.
3885  *
3886  * Input:
3887  *      ha = adapter block pointer.
3888  *      fcport = port structure pointer.
3889  *
3890  * Return:
3891  *      None.
3892  *
3893  * Context:
3894  */
3895 void
3896 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3897 {
3898         fc_port_t *fcport;
3899
3900         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3901             "Mark all dev lost\n");
3902
3903         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3904                 fcport->scan_state = 0;
3905                 qlt_schedule_sess_for_deletion(fcport);
3906
3907                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3908                         continue;
3909
3910                 /*
3911                  * No point in marking the device as lost, if the device is
3912                  * already DEAD.
3913                  */
3914                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3915                         continue;
3916                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3917                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3918                         if (defer)
3919                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3920                         else if (vha->vp_idx == fcport->vha->vp_idx)
3921                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3922                 }
3923         }
3924 }
3925
3926 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3927 {
3928         int i;
3929
3930         if (IS_FWI2_CAPABLE(ha))
3931                 return;
3932
3933         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3934                 set_bit(i, ha->loop_id_map);
3935         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3936         set_bit(BROADCAST, ha->loop_id_map);
3937 }
3938
3939 /*
3940 * qla2x00_mem_alloc
3941 *      Allocates adapter memory.
3942 *
3943 * Returns:
3944 *      0  = success.
3945 *      !0  = failure.
3946 */
3947 static int
3948 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3949         struct req_que **req, struct rsp_que **rsp)
3950 {
3951         char    name[16];
3952
3953         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3954                 &ha->init_cb_dma, GFP_KERNEL);
3955         if (!ha->init_cb)
3956                 goto fail;
3957
3958         if (qlt_mem_alloc(ha) < 0)
3959                 goto fail_free_init_cb;
3960
3961         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3962                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3963         if (!ha->gid_list)
3964                 goto fail_free_tgt_mem;
3965
3966         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3967         if (!ha->srb_mempool)
3968                 goto fail_free_gid_list;
3969
3970         if (IS_P3P_TYPE(ha)) {
3971                 /* Allocate cache for CT6 Ctx. */
3972                 if (!ctx_cachep) {
3973                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3974                                 sizeof(struct ct6_dsd), 0,
3975                                 SLAB_HWCACHE_ALIGN, NULL);
3976                         if (!ctx_cachep)
3977                                 goto fail_free_srb_mempool;
3978                 }
3979                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3980                         ctx_cachep);
3981                 if (!ha->ctx_mempool)
3982                         goto fail_free_srb_mempool;
3983                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3984                     "ctx_cachep=%p ctx_mempool=%p.\n",
3985                     ctx_cachep, ha->ctx_mempool);
3986         }
3987
3988         /* Get memory for cached NVRAM */
3989         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3990         if (!ha->nvram)
3991                 goto fail_free_ctx_mempool;
3992
3993         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3994                 ha->pdev->device);
3995         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3996                 DMA_POOL_SIZE, 8, 0);
3997         if (!ha->s_dma_pool)
3998                 goto fail_free_nvram;
3999
4000         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4001             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4002             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4003
4004         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4005                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4006                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4007                 if (!ha->dl_dma_pool) {
4008                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4009                             "Failed to allocate memory for dl_dma_pool.\n");
4010                         goto fail_s_dma_pool;
4011                 }
4012
4013                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4014                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4015                 if (!ha->fcp_cmnd_dma_pool) {
4016                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4017                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4018                         goto fail_dl_dma_pool;
4019                 }
4020
4021                 if (ql2xenabledif) {
4022                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4023                         struct dsd_dma *dsd, *nxt;
4024                         uint i;
4025                         /* Creata a DMA pool of buffers for DIF bundling */
4026                         ha->dif_bundl_pool = dma_pool_create(name,
4027                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4028                         if (!ha->dif_bundl_pool) {
4029                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4030                                     "%s: failed create dif_bundl_pool\n",
4031                                     __func__);
4032                                 goto fail_dif_bundl_dma_pool;
4033                         }
4034
4035                         INIT_LIST_HEAD(&ha->pool.good.head);
4036                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4037                         ha->pool.good.count = 0;
4038                         ha->pool.unusable.count = 0;
4039                         for (i = 0; i < 128; i++) {
4040                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4041                                 if (!dsd) {
4042                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4043                                             0xe0ee, "%s: failed alloc dsd\n",
4044                                             __func__);
4045                                         return -ENOMEM;
4046                                 }
4047                                 ha->dif_bundle_kallocs++;
4048
4049                                 dsd->dsd_addr = dma_pool_alloc(
4050                                     ha->dif_bundl_pool, GFP_ATOMIC,
4051                                     &dsd->dsd_list_dma);
4052                                 if (!dsd->dsd_addr) {
4053                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4054                                             0xe0ee,
4055                                             "%s: failed alloc ->dsd_addr\n",
4056                                             __func__);
4057                                         kfree(dsd);
4058                                         ha->dif_bundle_kallocs--;
4059                                         continue;
4060                                 }
4061                                 ha->dif_bundle_dma_allocs++;
4062
4063                                 /*
4064                                  * if DMA buffer crosses 4G boundary,
4065                                  * put it on bad list
4066                                  */
4067                                 if (MSD(dsd->dsd_list_dma) ^
4068                                     MSD(dsd->dsd_list_dma + bufsize)) {
4069                                         list_add_tail(&dsd->list,
4070                                             &ha->pool.unusable.head);
4071                                         ha->pool.unusable.count++;
4072                                 } else {
4073                                         list_add_tail(&dsd->list,
4074                                             &ha->pool.good.head);
4075                                         ha->pool.good.count++;
4076                                 }
4077                         }
4078
4079                         /* return the good ones back to the pool */
4080                         list_for_each_entry_safe(dsd, nxt,
4081                             &ha->pool.good.head, list) {
4082                                 list_del(&dsd->list);
4083                                 dma_pool_free(ha->dif_bundl_pool,
4084                                     dsd->dsd_addr, dsd->dsd_list_dma);
4085                                 ha->dif_bundle_dma_allocs--;
4086                                 kfree(dsd);
4087                                 ha->dif_bundle_kallocs--;
4088                         }
4089
4090                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4091                             "%s: dif dma pool (good=%u unusable=%u)\n",
4092                             __func__, ha->pool.good.count,
4093                             ha->pool.unusable.count);
4094                 }
4095
4096                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4097                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4098                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4099                     ha->dif_bundl_pool);
4100         }
4101
4102         /* Allocate memory for SNS commands */
4103         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4104         /* Get consistent memory allocated for SNS commands */
4105                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4106                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4107                 if (!ha->sns_cmd)
4108                         goto fail_dma_pool;
4109                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4110                     "sns_cmd: %p.\n", ha->sns_cmd);
4111         } else {
4112         /* Get consistent memory allocated for MS IOCB */
4113                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4114                         &ha->ms_iocb_dma);
4115                 if (!ha->ms_iocb)
4116                         goto fail_dma_pool;
4117         /* Get consistent memory allocated for CT SNS commands */
4118                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4119                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4120                 if (!ha->ct_sns)
4121                         goto fail_free_ms_iocb;
4122                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4123                     "ms_iocb=%p ct_sns=%p.\n",
4124                     ha->ms_iocb, ha->ct_sns);
4125         }
4126
4127         /* Allocate memory for request ring */
4128         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4129         if (!*req) {
4130                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4131                     "Failed to allocate memory for req.\n");
4132                 goto fail_req;
4133         }
4134         (*req)->length = req_len;
4135         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4136                 ((*req)->length + 1) * sizeof(request_t),
4137                 &(*req)->dma, GFP_KERNEL);
4138         if (!(*req)->ring) {
4139                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4140                     "Failed to allocate memory for req_ring.\n");
4141                 goto fail_req_ring;
4142         }
4143         /* Allocate memory for response ring */
4144         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4145         if (!*rsp) {
4146                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4147                     "Failed to allocate memory for rsp.\n");
4148                 goto fail_rsp;
4149         }
4150         (*rsp)->hw = ha;
4151         (*rsp)->length = rsp_len;
4152         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4153                 ((*rsp)->length + 1) * sizeof(response_t),
4154                 &(*rsp)->dma, GFP_KERNEL);
4155         if (!(*rsp)->ring) {
4156                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4157                     "Failed to allocate memory for rsp_ring.\n");
4158                 goto fail_rsp_ring;
4159         }
4160         (*req)->rsp = *rsp;
4161         (*rsp)->req = *req;
4162         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4163             "req=%p req->length=%d req->ring=%p rsp=%p "
4164             "rsp->length=%d rsp->ring=%p.\n",
4165             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4166             (*rsp)->ring);
4167         /* Allocate memory for NVRAM data for vports */
4168         if (ha->nvram_npiv_size) {
4169                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4170                                         sizeof(struct qla_npiv_entry),
4171                                         GFP_KERNEL);
4172                 if (!ha->npiv_info) {
4173                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4174                             "Failed to allocate memory for npiv_info.\n");
4175                         goto fail_npiv_info;
4176                 }
4177         } else
4178                 ha->npiv_info = NULL;
4179
4180         /* Get consistent memory allocated for EX-INIT-CB. */
4181         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4182             IS_QLA28XX(ha)) {
4183                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4184                     &ha->ex_init_cb_dma);
4185                 if (!ha->ex_init_cb)
4186                         goto fail_ex_init_cb;
4187                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4188                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4189         }
4190
4191         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4192
4193         /* Get consistent memory allocated for Async Port-Database. */
4194         if (!IS_FWI2_CAPABLE(ha)) {
4195                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4196                         &ha->async_pd_dma);
4197                 if (!ha->async_pd)
4198                         goto fail_async_pd;
4199                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4200                     "async_pd=%p.\n", ha->async_pd);
4201         }
4202
4203         INIT_LIST_HEAD(&ha->vp_list);
4204
4205         /* Allocate memory for our loop_id bitmap */
4206         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4207                                   sizeof(long),
4208                                   GFP_KERNEL);
4209         if (!ha->loop_id_map)
4210                 goto fail_loop_id_map;
4211         else {
4212                 qla2x00_set_reserved_loop_ids(ha);
4213                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4214                     "loop_id_map=%p.\n", ha->loop_id_map);
4215         }
4216
4217         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4218             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4219         if (!ha->sfp_data) {
4220                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4221                     "Unable to allocate memory for SFP read-data.\n");
4222                 goto fail_sfp_data;
4223         }
4224
4225         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4226             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4227             GFP_KERNEL);
4228         if (!ha->flt) {
4229                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4230                     "Unable to allocate memory for FLT.\n");
4231                 goto fail_flt_buffer;
4232         }
4233
4234         return 0;
4235
4236 fail_flt_buffer:
4237         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4238             ha->sfp_data, ha->sfp_data_dma);
4239 fail_sfp_data:
4240         kfree(ha->loop_id_map);
4241 fail_loop_id_map:
4242         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4243 fail_async_pd:
4244         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4245 fail_ex_init_cb:
4246         kfree(ha->npiv_info);
4247 fail_npiv_info:
4248         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4249                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4250         (*rsp)->ring = NULL;
4251         (*rsp)->dma = 0;
4252 fail_rsp_ring:
4253         kfree(*rsp);
4254         *rsp = NULL;
4255 fail_rsp:
4256         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4257                 sizeof(request_t), (*req)->ring, (*req)->dma);
4258         (*req)->ring = NULL;
4259         (*req)->dma = 0;
4260 fail_req_ring:
4261         kfree(*req);
4262         *req = NULL;
4263 fail_req:
4264         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4265                 ha->ct_sns, ha->ct_sns_dma);
4266         ha->ct_sns = NULL;
4267         ha->ct_sns_dma = 0;
4268 fail_free_ms_iocb:
4269         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4270         ha->ms_iocb = NULL;
4271         ha->ms_iocb_dma = 0;
4272
4273         if (ha->sns_cmd)
4274                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4275                     ha->sns_cmd, ha->sns_cmd_dma);
4276 fail_dma_pool:
4277         if (ql2xenabledif) {
4278                 struct dsd_dma *dsd, *nxt;
4279
4280                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4281                     list) {
4282                         list_del(&dsd->list);
4283                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4284                             dsd->dsd_list_dma);
4285                         ha->dif_bundle_dma_allocs--;
4286                         kfree(dsd);
4287                         ha->dif_bundle_kallocs--;
4288                         ha->pool.unusable.count--;
4289                 }
4290                 dma_pool_destroy(ha->dif_bundl_pool);
4291                 ha->dif_bundl_pool = NULL;
4292         }
4293
4294 fail_dif_bundl_dma_pool:
4295         if (IS_QLA82XX(ha) || ql2xenabledif) {
4296                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4297                 ha->fcp_cmnd_dma_pool = NULL;
4298         }
4299 fail_dl_dma_pool:
4300         if (IS_QLA82XX(ha) || ql2xenabledif) {
4301                 dma_pool_destroy(ha->dl_dma_pool);
4302                 ha->dl_dma_pool = NULL;
4303         }
4304 fail_s_dma_pool:
4305         dma_pool_destroy(ha->s_dma_pool);
4306         ha->s_dma_pool = NULL;
4307 fail_free_nvram:
4308         kfree(ha->nvram);
4309         ha->nvram = NULL;
4310 fail_free_ctx_mempool:
4311         mempool_destroy(ha->ctx_mempool);
4312         ha->ctx_mempool = NULL;
4313 fail_free_srb_mempool:
4314         mempool_destroy(ha->srb_mempool);
4315         ha->srb_mempool = NULL;
4316 fail_free_gid_list:
4317         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4318         ha->gid_list,
4319         ha->gid_list_dma);
4320         ha->gid_list = NULL;
4321         ha->gid_list_dma = 0;
4322 fail_free_tgt_mem:
4323         qlt_mem_free(ha);
4324 fail_free_init_cb:
4325         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4326         ha->init_cb_dma);
4327         ha->init_cb = NULL;
4328         ha->init_cb_dma = 0;
4329 fail:
4330         ql_log(ql_log_fatal, NULL, 0x0030,
4331             "Memory allocation failure.\n");
4332         return -ENOMEM;
4333 }
4334
4335 int
4336 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4337 {
4338         int rval;
4339         uint16_t        size, max_cnt, temp;
4340         struct qla_hw_data *ha = vha->hw;
4341
4342         /* Return if we don't need to alloacate any extended logins */
4343         if (!ql2xexlogins)
4344                 return QLA_SUCCESS;
4345
4346         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4347                 return QLA_SUCCESS;
4348
4349         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4350         max_cnt = 0;
4351         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4352         if (rval != QLA_SUCCESS) {
4353                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4354                     "Failed to get exlogin status.\n");
4355                 return rval;
4356         }
4357
4358         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4359         temp *= size;
4360
4361         if (temp != ha->exlogin_size) {
4362                 qla2x00_free_exlogin_buffer(ha);
4363                 ha->exlogin_size = temp;
4364
4365                 ql_log(ql_log_info, vha, 0xd024,
4366                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4367                     max_cnt, size, temp);
4368
4369                 ql_log(ql_log_info, vha, 0xd025,
4370                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4371
4372                 /* Get consistent memory for extended logins */
4373                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4374                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4375                 if (!ha->exlogin_buf) {
4376                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4377                     "Failed to allocate memory for exlogin_buf_dma.\n");
4378                         return -ENOMEM;
4379                 }
4380         }
4381
4382         /* Now configure the dma buffer */
4383         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4384         if (rval) {
4385                 ql_log(ql_log_fatal, vha, 0xd033,
4386                     "Setup extended login buffer  ****FAILED****.\n");
4387                 qla2x00_free_exlogin_buffer(ha);
4388         }
4389
4390         return rval;
4391 }
4392
4393 /*
4394 * qla2x00_free_exlogin_buffer
4395 *
4396 * Input:
4397 *       ha = adapter block pointer
4398 */
4399 void
4400 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4401 {
4402         if (ha->exlogin_buf) {
4403                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4404                     ha->exlogin_buf, ha->exlogin_buf_dma);
4405                 ha->exlogin_buf = NULL;
4406                 ha->exlogin_size = 0;
4407         }
4408 }
4409
4410 static void
4411 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4412 {
4413         u32 temp;
4414         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4415         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4416
4417         if (max_cnt > vha->hw->max_exchg)
4418                 max_cnt = vha->hw->max_exchg;
4419
4420         if (qla_ini_mode_enabled(vha)) {
4421                 if (vha->ql2xiniexchg > max_cnt)
4422                         vha->ql2xiniexchg = max_cnt;
4423
4424                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4425                         *ret_cnt = vha->ql2xiniexchg;
4426
4427         } else if (qla_tgt_mode_enabled(vha)) {
4428                 if (vha->ql2xexchoffld > max_cnt) {
4429                         vha->ql2xexchoffld = max_cnt;
4430                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4431                 }
4432
4433                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4434                         *ret_cnt = vha->ql2xexchoffld;
4435         } else if (qla_dual_mode_enabled(vha)) {
4436                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4437                 if (temp > max_cnt) {
4438                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4439                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4440                         temp = max_cnt;
4441                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4442                 }
4443
4444                 if (temp > FW_DEF_EXCHANGES_CNT)
4445                         *ret_cnt = temp;
4446         }
4447 }
4448
4449 int
4450 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4451 {
4452         int rval;
4453         u16     size, max_cnt;
4454         u32 actual_cnt, totsz;
4455         struct qla_hw_data *ha = vha->hw;
4456
4457         if (!ha->flags.exchoffld_enabled)
4458                 return QLA_SUCCESS;
4459
4460         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4461                 return QLA_SUCCESS;
4462
4463         max_cnt = 0;
4464         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4465         if (rval != QLA_SUCCESS) {
4466                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4467                     "Failed to get exlogin status.\n");
4468                 return rval;
4469         }
4470
4471         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4472         ql_log(ql_log_info, vha, 0xd014,
4473             "Actual exchange offload count: %d.\n", actual_cnt);
4474
4475         totsz = actual_cnt * size;
4476
4477         if (totsz != ha->exchoffld_size) {
4478                 qla2x00_free_exchoffld_buffer(ha);
4479                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4480                         ha->exchoffld_size = 0;
4481                         ha->flags.exchoffld_enabled = 0;
4482                         return QLA_SUCCESS;
4483                 }
4484
4485                 ha->exchoffld_size = totsz;
4486
4487                 ql_log(ql_log_info, vha, 0xd016,
4488                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4489                     max_cnt, actual_cnt, size, totsz);
4490
4491                 ql_log(ql_log_info, vha, 0xd017,
4492                     "Exchange Buffers requested size = 0x%x\n",
4493                     ha->exchoffld_size);
4494
4495                 /* Get consistent memory for extended logins */
4496                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4497                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4498                 if (!ha->exchoffld_buf) {
4499                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4500                         "Failed to allocate memory for Exchange Offload.\n");
4501
4502                         if (ha->max_exchg >
4503                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4504                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4505                         } else if (ha->max_exchg >
4506                             (FW_DEF_EXCHANGES_CNT + 512)) {
4507                                 ha->max_exchg -= 512;
4508                         } else {
4509                                 ha->flags.exchoffld_enabled = 0;
4510                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4511                                     "Disabling Exchange offload due to lack of memory\n");
4512                         }
4513                         ha->exchoffld_size = 0;
4514
4515                         return -ENOMEM;
4516                 }
4517         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4518                 /* pathological case */
4519                 qla2x00_free_exchoffld_buffer(ha);
4520                 ha->exchoffld_size = 0;
4521                 ha->flags.exchoffld_enabled = 0;
4522                 ql_log(ql_log_info, vha, 0xd016,
4523                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4524                     ha->exchoffld_size, actual_cnt, size, totsz);
4525                 return 0;
4526         }
4527
4528         /* Now configure the dma buffer */
4529         rval = qla_set_exchoffld_mem_cfg(vha);
4530         if (rval) {
4531                 ql_log(ql_log_fatal, vha, 0xd02e,
4532                     "Setup exchange offload buffer ****FAILED****.\n");
4533                 qla2x00_free_exchoffld_buffer(ha);
4534         } else {
4535                 /* re-adjust number of target exchange */
4536                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4537
4538                 if (qla_ini_mode_enabled(vha))
4539                         icb->exchange_count = 0;
4540                 else
4541                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4542         }
4543
4544         return rval;
4545 }
4546
4547 /*
4548 * qla2x00_free_exchoffld_buffer
4549 *
4550 * Input:
4551 *       ha = adapter block pointer
4552 */
4553 void
4554 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4555 {
4556         if (ha->exchoffld_buf) {
4557                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4558                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4559                 ha->exchoffld_buf = NULL;
4560                 ha->exchoffld_size = 0;
4561         }
4562 }
4563
4564 /*
4565 * qla2x00_free_fw_dump
4566 *       Frees fw dump stuff.
4567 *
4568 * Input:
4569 *       ha = adapter block pointer
4570 */
4571 static void
4572 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4573 {
4574         struct fwdt *fwdt = ha->fwdt;
4575         uint j;
4576
4577         if (ha->fce)
4578                 dma_free_coherent(&ha->pdev->dev,
4579                     FCE_SIZE, ha->fce, ha->fce_dma);
4580
4581         if (ha->eft)
4582                 dma_free_coherent(&ha->pdev->dev,
4583                     EFT_SIZE, ha->eft, ha->eft_dma);
4584
4585         if (ha->fw_dump)
4586                 vfree(ha->fw_dump);
4587
4588         ha->fce = NULL;
4589         ha->fce_dma = 0;
4590         ha->flags.fce_enabled = 0;
4591         ha->eft = NULL;
4592         ha->eft_dma = 0;
4593         ha->fw_dumped = 0;
4594         ha->fw_dump_cap_flags = 0;
4595         ha->fw_dump_reading = 0;
4596         ha->fw_dump = NULL;
4597         ha->fw_dump_len = 0;
4598
4599         for (j = 0; j < 2; j++, fwdt++) {
4600                 if (fwdt->template)
4601                         vfree(fwdt->template);
4602                 fwdt->template = NULL;
4603                 fwdt->length = 0;
4604         }
4605 }
4606
4607 /*
4608 * qla2x00_mem_free
4609 *      Frees all adapter allocated memory.
4610 *
4611 * Input:
4612 *      ha = adapter block pointer.
4613 */
4614 static void
4615 qla2x00_mem_free(struct qla_hw_data *ha)
4616 {
4617         qla2x00_free_fw_dump(ha);
4618
4619         if (ha->mctp_dump)
4620                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4621                     ha->mctp_dump_dma);
4622         ha->mctp_dump = NULL;
4623
4624         mempool_destroy(ha->srb_mempool);
4625         ha->srb_mempool = NULL;
4626
4627         if (ha->dcbx_tlv)
4628                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4629                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4630         ha->dcbx_tlv = NULL;
4631
4632         if (ha->xgmac_data)
4633                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4634                     ha->xgmac_data, ha->xgmac_data_dma);
4635         ha->xgmac_data = NULL;
4636
4637         if (ha->sns_cmd)
4638                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4639                 ha->sns_cmd, ha->sns_cmd_dma);
4640         ha->sns_cmd = NULL;
4641         ha->sns_cmd_dma = 0;
4642
4643         if (ha->ct_sns)
4644                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4645                 ha->ct_sns, ha->ct_sns_dma);
4646         ha->ct_sns = NULL;
4647         ha->ct_sns_dma = 0;
4648
4649         if (ha->sfp_data)
4650                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4651                     ha->sfp_data_dma);
4652         ha->sfp_data = NULL;
4653
4654         if (ha->flt)
4655                 dma_free_coherent(&ha->pdev->dev,
4656                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4657                     ha->flt, ha->flt_dma);
4658         ha->flt = NULL;
4659         ha->flt_dma = 0;
4660
4661         if (ha->ms_iocb)
4662                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4663         ha->ms_iocb = NULL;
4664         ha->ms_iocb_dma = 0;
4665
4666         if (ha->ex_init_cb)
4667                 dma_pool_free(ha->s_dma_pool,
4668                         ha->ex_init_cb, ha->ex_init_cb_dma);
4669         ha->ex_init_cb = NULL;
4670         ha->ex_init_cb_dma = 0;
4671
4672         if (ha->async_pd)
4673                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4674         ha->async_pd = NULL;
4675         ha->async_pd_dma = 0;
4676
4677         dma_pool_destroy(ha->s_dma_pool);
4678         ha->s_dma_pool = NULL;
4679
4680         if (ha->gid_list)
4681                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4682                 ha->gid_list, ha->gid_list_dma);
4683         ha->gid_list = NULL;
4684         ha->gid_list_dma = 0;
4685
4686         if (IS_QLA82XX(ha)) {
4687                 if (!list_empty(&ha->gbl_dsd_list)) {
4688                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4689
4690                         /* clean up allocated prev pool */
4691                         list_for_each_entry_safe(dsd_ptr,
4692                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4693                                 dma_pool_free(ha->dl_dma_pool,
4694                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4695                                 list_del(&dsd_ptr->list);
4696                                 kfree(dsd_ptr);
4697                         }
4698                 }
4699         }
4700
4701         dma_pool_destroy(ha->dl_dma_pool);
4702         ha->dl_dma_pool = NULL;
4703
4704         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4705         ha->fcp_cmnd_dma_pool = NULL;
4706
4707         mempool_destroy(ha->ctx_mempool);
4708         ha->ctx_mempool = NULL;
4709
4710         if (ql2xenabledif && ha->dif_bundl_pool) {
4711                 struct dsd_dma *dsd, *nxt;
4712
4713                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4714                                          list) {
4715                         list_del(&dsd->list);
4716                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4717                                       dsd->dsd_list_dma);
4718                         ha->dif_bundle_dma_allocs--;
4719                         kfree(dsd);
4720                         ha->dif_bundle_kallocs--;
4721                         ha->pool.unusable.count--;
4722                 }
4723                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4724                         list_del(&dsd->list);
4725                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4726                                       dsd->dsd_list_dma);
4727                         ha->dif_bundle_dma_allocs--;
4728                         kfree(dsd);
4729                         ha->dif_bundle_kallocs--;
4730                 }
4731         }
4732
4733         dma_pool_destroy(ha->dif_bundl_pool);
4734         ha->dif_bundl_pool = NULL;
4735
4736         qlt_mem_free(ha);
4737
4738         if (ha->init_cb)
4739                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4740                         ha->init_cb, ha->init_cb_dma);
4741         ha->init_cb = NULL;
4742         ha->init_cb_dma = 0;
4743
4744         vfree(ha->optrom_buffer);
4745         ha->optrom_buffer = NULL;
4746         kfree(ha->nvram);
4747         ha->nvram = NULL;
4748         kfree(ha->npiv_info);
4749         ha->npiv_info = NULL;
4750         kfree(ha->swl);
4751         ha->swl = NULL;
4752         kfree(ha->loop_id_map);
4753         ha->loop_id_map = NULL;
4754 }
4755
4756 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4757                                                 struct qla_hw_data *ha)
4758 {
4759         struct Scsi_Host *host;
4760         struct scsi_qla_host *vha = NULL;
4761
4762         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4763         if (!host) {
4764                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4765                     "Failed to allocate host from the scsi layer, aborting.\n");
4766                 return NULL;
4767         }
4768
4769         /* Clear our data area */
4770         vha = shost_priv(host);
4771         memset(vha, 0, sizeof(scsi_qla_host_t));
4772
4773         vha->host = host;
4774         vha->host_no = host->host_no;
4775         vha->hw = ha;
4776
4777         vha->qlini_mode = ql2x_ini_mode;
4778         vha->ql2xexchoffld = ql2xexchoffld;
4779         vha->ql2xiniexchg = ql2xiniexchg;
4780
4781         INIT_LIST_HEAD(&vha->vp_fcports);
4782         INIT_LIST_HEAD(&vha->work_list);
4783         INIT_LIST_HEAD(&vha->list);
4784         INIT_LIST_HEAD(&vha->qla_cmd_list);
4785         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4786         INIT_LIST_HEAD(&vha->logo_list);
4787         INIT_LIST_HEAD(&vha->plogi_ack_list);
4788         INIT_LIST_HEAD(&vha->qp_list);
4789         INIT_LIST_HEAD(&vha->gnl.fcports);
4790         INIT_LIST_HEAD(&vha->gpnid_list);
4791         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4792
4793         spin_lock_init(&vha->work_lock);
4794         spin_lock_init(&vha->cmd_list_lock);
4795         init_waitqueue_head(&vha->fcport_waitQ);
4796         init_waitqueue_head(&vha->vref_waitq);
4797
4798         vha->gnl.size = sizeof(struct get_name_list_extended) *
4799                         (ha->max_loop_id + 1);
4800         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4801             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4802         if (!vha->gnl.l) {
4803                 ql_log(ql_log_fatal, vha, 0xd04a,
4804                     "Alloc failed for name list.\n");
4805                 scsi_host_put(vha->host);
4806                 return NULL;
4807         }
4808
4809         /* todo: what about ext login? */
4810         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4811         vha->scan.l = vmalloc(vha->scan.size);
4812         if (!vha->scan.l) {
4813                 ql_log(ql_log_fatal, vha, 0xd04a,
4814                     "Alloc failed for scan database.\n");
4815                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4816                     vha->gnl.l, vha->gnl.ldma);
4817                 vha->gnl.l = NULL;
4818                 scsi_host_put(vha->host);
4819                 return NULL;
4820         }
4821         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4822
4823         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4824         ql_dbg(ql_dbg_init, vha, 0x0041,
4825             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4826             vha->host, vha->hw, vha,
4827             dev_name(&(ha->pdev->dev)));
4828
4829         return vha;
4830 }
4831
4832 struct qla_work_evt *
4833 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4834 {
4835         struct qla_work_evt *e;
4836         uint8_t bail;
4837
4838         if (test_bit(UNLOADING, &vha->dpc_flags))
4839                 return NULL;
4840
4841         QLA_VHA_MARK_BUSY(vha, bail);
4842         if (bail)
4843                 return NULL;
4844
4845         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4846         if (!e) {
4847                 QLA_VHA_MARK_NOT_BUSY(vha);
4848                 return NULL;
4849         }
4850
4851         INIT_LIST_HEAD(&e->list);
4852         e->type = type;
4853         e->flags = QLA_EVT_FLAG_FREE;
4854         return e;
4855 }
4856
4857 int
4858 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4859 {
4860         unsigned long flags;
4861         bool q = false;
4862
4863         spin_lock_irqsave(&vha->work_lock, flags);
4864         list_add_tail(&e->list, &vha->work_list);
4865
4866         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4867                 q = true;
4868
4869         spin_unlock_irqrestore(&vha->work_lock, flags);
4870
4871         if (q)
4872                 queue_work(vha->hw->wq, &vha->iocb_work);
4873
4874         return QLA_SUCCESS;
4875 }
4876
4877 int
4878 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4879     u32 data)
4880 {
4881         struct qla_work_evt *e;
4882
4883         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4884         if (!e)
4885                 return QLA_FUNCTION_FAILED;
4886
4887         e->u.aen.code = code;
4888         e->u.aen.data = data;
4889         return qla2x00_post_work(vha, e);
4890 }
4891
4892 int
4893 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4894 {
4895         struct qla_work_evt *e;
4896
4897         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4898         if (!e)
4899                 return QLA_FUNCTION_FAILED;
4900
4901         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4902         return qla2x00_post_work(vha, e);
4903 }
4904
4905 #define qla2x00_post_async_work(name, type)     \
4906 int qla2x00_post_async_##name##_work(           \
4907     struct scsi_qla_host *vha,                  \
4908     fc_port_t *fcport, uint16_t *data)          \
4909 {                                               \
4910         struct qla_work_evt *e;                 \
4911                                                 \
4912         e = qla2x00_alloc_work(vha, type);      \
4913         if (!e)                                 \
4914                 return QLA_FUNCTION_FAILED;     \
4915                                                 \
4916         e->u.logio.fcport = fcport;             \
4917         if (data) {                             \
4918                 e->u.logio.data[0] = data[0];   \
4919                 e->u.logio.data[1] = data[1];   \
4920         }                                       \
4921         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4922         return qla2x00_post_work(vha, e);       \
4923 }
4924
4925 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4926 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4927 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4928 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4929 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4930 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4931
4932 int
4933 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4934 {
4935         struct qla_work_evt *e;
4936
4937         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4938         if (!e)
4939                 return QLA_FUNCTION_FAILED;
4940
4941         e->u.uevent.code = code;
4942         return qla2x00_post_work(vha, e);
4943 }
4944
4945 static void
4946 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4947 {
4948         char event_string[40];
4949         char *envp[] = { event_string, NULL };
4950
4951         switch (code) {
4952         case QLA_UEVENT_CODE_FW_DUMP:
4953                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4954                     vha->host_no);
4955                 break;
4956         default:
4957                 /* do nothing */
4958                 break;
4959         }
4960         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4961 }
4962
4963 int
4964 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4965                         uint32_t *data, int cnt)
4966 {
4967         struct qla_work_evt *e;
4968
4969         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4970         if (!e)
4971                 return QLA_FUNCTION_FAILED;
4972
4973         e->u.aenfx.evtcode = evtcode;
4974         e->u.aenfx.count = cnt;
4975         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4976         return qla2x00_post_work(vha, e);
4977 }
4978
4979 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4980 {
4981         unsigned long flags;
4982
4983         if (IS_SW_RESV_ADDR(fcport->d_id))
4984                 return;
4985
4986         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4987         if (fcport->disc_state == DSC_UPD_FCPORT) {
4988                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4989                 return;
4990         }
4991         fcport->jiffies_at_registration = jiffies;
4992         fcport->sec_since_registration = 0;
4993         fcport->next_disc_state = DSC_DELETED;
4994         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
4995         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4996
4997         queue_work(system_unbound_wq, &fcport->reg_work);
4998 }
4999
5000 static
5001 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5002 {
5003         unsigned long flags;
5004         fc_port_t *fcport =  NULL, *tfcp;
5005         struct qlt_plogi_ack_t *pla =
5006             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5007         uint8_t free_fcport = 0;
5008
5009         ql_dbg(ql_dbg_disc, vha, 0xffff,
5010             "%s %d %8phC enter\n",
5011             __func__, __LINE__, e->u.new_sess.port_name);
5012
5013         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5014         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5015         if (fcport) {
5016                 fcport->d_id = e->u.new_sess.id;
5017                 if (pla) {
5018                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5019                         memcpy(fcport->node_name,
5020                             pla->iocb.u.isp24.u.plogi.node_name,
5021                             WWN_SIZE);
5022                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5023                         /* we took an extra ref_count to prevent PLOGI ACK when
5024                          * fcport/sess has not been created.
5025                          */
5026                         pla->ref_count--;
5027                 }
5028         } else {
5029                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5030                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5031                 if (fcport) {
5032                         fcport->d_id = e->u.new_sess.id;
5033                         fcport->flags |= FCF_FABRIC_DEVICE;
5034                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5035
5036                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5037                             WWN_SIZE);
5038
5039                         fcport->fc4_type = e->u.new_sess.fc4_type;
5040                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5041                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5042                                 fcport->n2n_flag = 1;
5043                                 if (vha->flags.nvme_enabled)
5044                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5045                         }
5046
5047                 } else {
5048                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5049                                    "%s %8phC mem alloc fail.\n",
5050                                    __func__, e->u.new_sess.port_name);
5051
5052                         if (pla) {
5053                                 list_del(&pla->list);
5054                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5055                         }
5056                         return;
5057                 }
5058
5059                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5060                 /* search again to make sure no one else got ahead */
5061                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5062                     e->u.new_sess.port_name, 1);
5063                 if (tfcp) {
5064                         /* should rarily happen */
5065                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5066                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5067                             __func__, tfcp->port_name, tfcp->disc_state,
5068                             tfcp->fw_login_state);
5069
5070                         free_fcport = 1;
5071                 } else {
5072                         list_add_tail(&fcport->list, &vha->vp_fcports);
5073
5074                 }
5075                 if (pla) {
5076                         qlt_plogi_ack_link(vha, pla, fcport,
5077                             QLT_PLOGI_LINK_SAME_WWN);
5078                         pla->ref_count--;
5079                 }
5080         }
5081         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5082
5083         if (fcport) {
5084                 fcport->id_changed = 1;
5085                 fcport->scan_state = QLA_FCPORT_FOUND;
5086                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5087                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5088
5089                 if (pla) {
5090                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5091                                 u16 wd3_lo;
5092
5093                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5094                                 fcport->local = 0;
5095                                 fcport->loop_id =
5096                                         le16_to_cpu(
5097                                             pla->iocb.u.isp24.nport_handle);
5098                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5099                                 wd3_lo =
5100                                     le16_to_cpu(
5101                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5102
5103                                 if (wd3_lo & BIT_7)
5104                                         fcport->conf_compl_supported = 1;
5105
5106                                 if ((wd3_lo & BIT_4) == 0)
5107                                         fcport->port_type = FCT_INITIATOR;
5108                                 else
5109                                         fcport->port_type = FCT_TARGET;
5110                         }
5111                         qlt_plogi_ack_unref(vha, pla);
5112                 } else {
5113                         fc_port_t *dfcp = NULL;
5114
5115                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5116                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5117                             &e->u.new_sess.id, 1);
5118                         if (tfcp && (tfcp != fcport)) {
5119                                 /*
5120                                  * We have a conflict fcport with same NportID.
5121                                  */
5122                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5123                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5124                                     __func__, tfcp->port_name, tfcp->disc_state,
5125                                     tfcp->fw_login_state);
5126
5127                                 switch (tfcp->disc_state) {
5128                                 case DSC_DELETED:
5129                                         break;
5130                                 case DSC_DELETE_PEND:
5131                                         fcport->login_pause = 1;
5132                                         tfcp->conflict = fcport;
5133                                         break;
5134                                 default:
5135                                         fcport->login_pause = 1;
5136                                         tfcp->conflict = fcport;
5137                                         dfcp = tfcp;
5138                                         break;
5139                                 }
5140                         }
5141                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5142                         if (dfcp)
5143                                 qlt_schedule_sess_for_deletion(tfcp);
5144
5145                         if (N2N_TOPO(vha->hw)) {
5146                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5147                                 fcport->keep_nport_handle = 1;
5148                                 if (vha->flags.nvme_enabled) {
5149                                         fcport->fc4_type =
5150                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5151                                         fcport->n2n_flag = 1;
5152                                 }
5153                                 fcport->fw_login_state = 0;
5154                                 /*
5155                                  * wait link init done before sending login
5156                                  */
5157                         } else {
5158                                 qla24xx_fcport_handle_login(vha, fcport);
5159                         }
5160                 }
5161         }
5162
5163         if (free_fcport) {
5164                 qla2x00_free_fcport(fcport);
5165                 if (pla) {
5166                         list_del(&pla->list);
5167                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5168                 }
5169         }
5170 }
5171
5172 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5173 {
5174         struct srb *sp = e->u.iosb.sp;
5175         int rval;
5176
5177         rval = qla2x00_start_sp(sp);
5178         if (rval != QLA_SUCCESS) {
5179                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5180                     "%s: %s: Re-issue IOCB failed (%d).\n",
5181                     __func__, sp->name, rval);
5182                 qla24xx_sp_unmap(vha, sp);
5183         }
5184 }
5185
5186 void
5187 qla2x00_do_work(struct scsi_qla_host *vha)
5188 {
5189         struct qla_work_evt *e, *tmp;
5190         unsigned long flags;
5191         LIST_HEAD(work);
5192         int rc;
5193
5194         spin_lock_irqsave(&vha->work_lock, flags);
5195         list_splice_init(&vha->work_list, &work);
5196         spin_unlock_irqrestore(&vha->work_lock, flags);
5197
5198         list_for_each_entry_safe(e, tmp, &work, list) {
5199                 rc = QLA_SUCCESS;
5200                 switch (e->type) {
5201                 case QLA_EVT_AEN:
5202                         fc_host_post_event(vha->host, fc_get_event_number(),
5203                             e->u.aen.code, e->u.aen.data);
5204                         break;
5205                 case QLA_EVT_IDC_ACK:
5206                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5207                         break;
5208                 case QLA_EVT_ASYNC_LOGIN:
5209                         qla2x00_async_login(vha, e->u.logio.fcport,
5210                             e->u.logio.data);
5211                         break;
5212                 case QLA_EVT_ASYNC_LOGOUT:
5213                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5214                         break;
5215                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5216                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5217                             e->u.logio.data);
5218                         break;
5219                 case QLA_EVT_ASYNC_ADISC:
5220                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5221                             e->u.logio.data);
5222                         break;
5223                 case QLA_EVT_UEVENT:
5224                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5225                         break;
5226                 case QLA_EVT_AENFX:
5227                         qlafx00_process_aen(vha, e);
5228                         break;
5229                 case QLA_EVT_GPNID:
5230                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5231                         break;
5232                 case QLA_EVT_UNMAP:
5233                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5234                         break;
5235                 case QLA_EVT_RELOGIN:
5236                         qla2x00_relogin(vha);
5237                         break;
5238                 case QLA_EVT_NEW_SESS:
5239                         qla24xx_create_new_sess(vha, e);
5240                         break;
5241                 case QLA_EVT_GPDB:
5242                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5243                             e->u.fcport.opt);
5244                         break;
5245                 case QLA_EVT_PRLI:
5246                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5247                         break;
5248                 case QLA_EVT_GPSC:
5249                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5250                         break;
5251                 case QLA_EVT_GNL:
5252                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5253                         break;
5254                 case QLA_EVT_NACK:
5255                         qla24xx_do_nack_work(vha, e);
5256                         break;
5257                 case QLA_EVT_ASYNC_PRLO:
5258                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5259                         break;
5260                 case QLA_EVT_ASYNC_PRLO_DONE:
5261                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5262                             e->u.logio.data);
5263                         break;
5264                 case QLA_EVT_GPNFT:
5265                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5266                             e->u.gpnft.sp);
5267                         break;
5268                 case QLA_EVT_GPNFT_DONE:
5269                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5270                         break;
5271                 case QLA_EVT_GNNFT_DONE:
5272                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5273                         break;
5274                 case QLA_EVT_GNNID:
5275                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5276                         break;
5277                 case QLA_EVT_GFPNID:
5278                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5279                         break;
5280                 case QLA_EVT_SP_RETRY:
5281                         qla_sp_retry(vha, e);
5282                         break;
5283                 case QLA_EVT_IIDMA:
5284                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5285                         break;
5286                 case QLA_EVT_ELS_PLOGI:
5287                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5288                             e->u.fcport.fcport, false);
5289                         break;
5290                 }
5291
5292                 if (rc == EAGAIN) {
5293                         /* put 'work' at head of 'vha->work_list' */
5294                         spin_lock_irqsave(&vha->work_lock, flags);
5295                         list_splice(&work, &vha->work_list);
5296                         spin_unlock_irqrestore(&vha->work_lock, flags);
5297                         break;
5298                 }
5299                 list_del_init(&e->list);
5300                 if (e->flags & QLA_EVT_FLAG_FREE)
5301                         kfree(e);
5302
5303                 /* For each work completed decrement vha ref count */
5304                 QLA_VHA_MARK_NOT_BUSY(vha);
5305         }
5306 }
5307
5308 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5309 {
5310         struct qla_work_evt *e;
5311
5312         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5313
5314         if (!e) {
5315                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5316                 return QLA_FUNCTION_FAILED;
5317         }
5318
5319         return qla2x00_post_work(vha, e);
5320 }
5321
5322 /* Relogins all the fcports of a vport
5323  * Context: dpc thread
5324  */
5325 void qla2x00_relogin(struct scsi_qla_host *vha)
5326 {
5327         fc_port_t       *fcport;
5328         int status, relogin_needed = 0;
5329         struct event_arg ea;
5330
5331         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5332                 /*
5333                  * If the port is not ONLINE then try to login
5334                  * to it if we haven't run out of retries.
5335                  */
5336                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5337                     fcport->login_retry) {
5338                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5339                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5340                                 continue;
5341
5342                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5343                                 fcport->disc_state == DSC_DELETE_PEND) {
5344                                 relogin_needed = 1;
5345                         } else {
5346                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5347                                         memset(&ea, 0, sizeof(ea));
5348                                         ea.fcport = fcport;
5349                                         qla24xx_handle_relogin_event(vha, &ea);
5350                                 } else if (vha->hw->current_topology ==
5351                                          ISP_CFG_NL &&
5352                                         IS_QLA2XXX_MIDTYPE(vha->hw)) {
5353                                         (void)qla24xx_fcport_handle_login(vha,
5354                                                                         fcport);
5355                                 } else if (vha->hw->current_topology ==
5356                                     ISP_CFG_NL) {
5357                                         fcport->login_retry--;
5358                                         status =
5359                                             qla2x00_local_device_login(vha,
5360                                                 fcport);
5361                                         if (status == QLA_SUCCESS) {
5362                                                 fcport->old_loop_id =
5363                                                     fcport->loop_id;
5364                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5365                                                     "Port login OK: logged in ID 0x%x.\n",
5366                                                     fcport->loop_id);
5367                                                 qla2x00_update_fcport
5368                                                         (vha, fcport);
5369                                         } else if (status == 1) {
5370                                                 set_bit(RELOGIN_NEEDED,
5371                                                     &vha->dpc_flags);
5372                                                 /* retry the login again */
5373                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5374                                                     "Retrying %d login again loop_id 0x%x.\n",
5375                                                     fcport->login_retry,
5376                                                     fcport->loop_id);
5377                                         } else {
5378                                                 fcport->login_retry = 0;
5379                                         }
5380
5381                                         if (fcport->login_retry == 0 &&
5382                                             status != QLA_SUCCESS)
5383                                                 qla2x00_clear_loop_id(fcport);
5384                                 }
5385                         }
5386                 }
5387                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5388                         break;
5389         }
5390
5391         if (relogin_needed)
5392                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5393
5394         ql_dbg(ql_dbg_disc, vha, 0x400e,
5395             "Relogin end.\n");
5396 }
5397
5398 /* Schedule work on any of the dpc-workqueues */
5399 void
5400 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5401 {
5402         struct qla_hw_data *ha = base_vha->hw;
5403
5404         switch (work_code) {
5405         case MBA_IDC_AEN: /* 0x8200 */
5406                 if (ha->dpc_lp_wq)
5407                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5408                 break;
5409
5410         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5411                 if (!ha->flags.nic_core_reset_hdlr_active) {
5412                         if (ha->dpc_hp_wq)
5413                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5414                 } else
5415                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5416                             "NIC Core reset is already active. Skip "
5417                             "scheduling it again.\n");
5418                 break;
5419         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5420                 if (ha->dpc_hp_wq)
5421                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5422                 break;
5423         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5424                 if (ha->dpc_hp_wq)
5425                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5426                 break;
5427         default:
5428                 ql_log(ql_log_warn, base_vha, 0xb05f,
5429                     "Unknown work-code=0x%x.\n", work_code);
5430         }
5431
5432         return;
5433 }
5434
5435 /* Work: Perform NIC Core Unrecoverable state handling */
5436 void
5437 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5438 {
5439         struct qla_hw_data *ha =
5440                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5441         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5442         uint32_t dev_state = 0;
5443
5444         qla83xx_idc_lock(base_vha, 0);
5445         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5446         qla83xx_reset_ownership(base_vha);
5447         if (ha->flags.nic_core_reset_owner) {
5448                 ha->flags.nic_core_reset_owner = 0;
5449                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5450                     QLA8XXX_DEV_FAILED);
5451                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5452                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5453         }
5454         qla83xx_idc_unlock(base_vha, 0);
5455 }
5456
5457 /* Work: Execute IDC state handler */
5458 void
5459 qla83xx_idc_state_handler_work(struct work_struct *work)
5460 {
5461         struct qla_hw_data *ha =
5462                 container_of(work, struct qla_hw_data, idc_state_handler);
5463         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5464         uint32_t dev_state = 0;
5465
5466         qla83xx_idc_lock(base_vha, 0);
5467         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5468         if (dev_state == QLA8XXX_DEV_FAILED ||
5469                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5470                 qla83xx_idc_state_handler(base_vha);
5471         qla83xx_idc_unlock(base_vha, 0);
5472 }
5473
5474 static int
5475 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5476 {
5477         int rval = QLA_SUCCESS;
5478         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5479         uint32_t heart_beat_counter1, heart_beat_counter2;
5480
5481         do {
5482                 if (time_after(jiffies, heart_beat_wait)) {
5483                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5484                             "Nic Core f/w is not alive.\n");
5485                         rval = QLA_FUNCTION_FAILED;
5486                         break;
5487                 }
5488
5489                 qla83xx_idc_lock(base_vha, 0);
5490                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5491                     &heart_beat_counter1);
5492                 qla83xx_idc_unlock(base_vha, 0);
5493                 msleep(100);
5494                 qla83xx_idc_lock(base_vha, 0);
5495                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5496                     &heart_beat_counter2);
5497                 qla83xx_idc_unlock(base_vha, 0);
5498         } while (heart_beat_counter1 == heart_beat_counter2);
5499
5500         return rval;
5501 }
5502
5503 /* Work: Perform NIC Core Reset handling */
5504 void
5505 qla83xx_nic_core_reset_work(struct work_struct *work)
5506 {
5507         struct qla_hw_data *ha =
5508                 container_of(work, struct qla_hw_data, nic_core_reset);
5509         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5510         uint32_t dev_state = 0;
5511
5512         if (IS_QLA2031(ha)) {
5513                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5514                         ql_log(ql_log_warn, base_vha, 0xb081,
5515                             "Failed to dump mctp\n");
5516                 return;
5517         }
5518
5519         if (!ha->flags.nic_core_reset_hdlr_active) {
5520                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5521                         qla83xx_idc_lock(base_vha, 0);
5522                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5523                             &dev_state);
5524                         qla83xx_idc_unlock(base_vha, 0);
5525                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5526                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5527                                     "Nic Core f/w is alive.\n");
5528                                 return;
5529                         }
5530                 }
5531
5532                 ha->flags.nic_core_reset_hdlr_active = 1;
5533                 if (qla83xx_nic_core_reset(base_vha)) {
5534                         /* NIC Core reset failed. */
5535                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5536                             "NIC Core reset failed.\n");
5537                 }
5538                 ha->flags.nic_core_reset_hdlr_active = 0;
5539         }
5540 }
5541
5542 /* Work: Handle 8200 IDC aens */
5543 void
5544 qla83xx_service_idc_aen(struct work_struct *work)
5545 {
5546         struct qla_hw_data *ha =
5547                 container_of(work, struct qla_hw_data, idc_aen);
5548         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5549         uint32_t dev_state, idc_control;
5550
5551         qla83xx_idc_lock(base_vha, 0);
5552         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5553         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5554         qla83xx_idc_unlock(base_vha, 0);
5555         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5556                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5557                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5558                             "Application requested NIC Core Reset.\n");
5559                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5560                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5561                     QLA_SUCCESS) {
5562                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5563                             "Other protocol driver requested NIC Core Reset.\n");
5564                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5565                 }
5566         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5567                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5568                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5569         }
5570 }
5571
5572 static void
5573 qla83xx_wait_logic(void)
5574 {
5575         int i;
5576
5577         /* Yield CPU */
5578         if (!in_interrupt()) {
5579                 /*
5580                  * Wait about 200ms before retrying again.
5581                  * This controls the number of retries for single
5582                  * lock operation.
5583                  */
5584                 msleep(100);
5585                 schedule();
5586         } else {
5587                 for (i = 0; i < 20; i++)
5588                         cpu_relax(); /* This a nop instr on i386 */
5589         }
5590 }
5591
5592 static int
5593 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5594 {
5595         int rval;
5596         uint32_t data;
5597         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5598         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5599         struct qla_hw_data *ha = base_vha->hw;
5600
5601         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5602             "Trying force recovery of the IDC lock.\n");
5603
5604         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5605         if (rval)
5606                 return rval;
5607
5608         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5609                 return QLA_SUCCESS;
5610         } else {
5611                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5612                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5613                     data);
5614                 if (rval)
5615                         return rval;
5616
5617                 msleep(200);
5618
5619                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5620                     &data);
5621                 if (rval)
5622                         return rval;
5623
5624                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5625                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5626                                         ~(idc_lck_rcvry_stage_mask));
5627                         rval = qla83xx_wr_reg(base_vha,
5628                             QLA83XX_IDC_LOCK_RECOVERY, data);
5629                         if (rval)
5630                                 return rval;
5631
5632                         /* Forcefully perform IDC UnLock */
5633                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5634                             &data);
5635                         if (rval)
5636                                 return rval;
5637                         /* Clear lock-id by setting 0xff */
5638                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5639                             0xff);
5640                         if (rval)
5641                                 return rval;
5642                         /* Clear lock-recovery by setting 0x0 */
5643                         rval = qla83xx_wr_reg(base_vha,
5644                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5645                         if (rval)
5646                                 return rval;
5647                 } else
5648                         return QLA_SUCCESS;
5649         }
5650
5651         return rval;
5652 }
5653
5654 static int
5655 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5656 {
5657         int rval = QLA_SUCCESS;
5658         uint32_t o_drv_lockid, n_drv_lockid;
5659         unsigned long lock_recovery_timeout;
5660
5661         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5662 retry_lockid:
5663         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5664         if (rval)
5665                 goto exit;
5666
5667         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5668         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5669                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5670                         return QLA_SUCCESS;
5671                 else
5672                         return QLA_FUNCTION_FAILED;
5673         }
5674
5675         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5676         if (rval)
5677                 goto exit;
5678
5679         if (o_drv_lockid == n_drv_lockid) {
5680                 qla83xx_wait_logic();
5681                 goto retry_lockid;
5682         } else
5683                 return QLA_SUCCESS;
5684
5685 exit:
5686         return rval;
5687 }
5688
5689 void
5690 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5691 {
5692         uint32_t data;
5693         uint32_t lock_owner;
5694         struct qla_hw_data *ha = base_vha->hw;
5695
5696         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5697 retry_lock:
5698         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5699             == QLA_SUCCESS) {
5700                 if (data) {
5701                         /* Setting lock-id to our function-number */
5702                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5703                             ha->portnum);
5704                 } else {
5705                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5706                             &lock_owner);
5707                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5708                             "Failed to acquire IDC lock, acquired by %d, "
5709                             "retrying...\n", lock_owner);
5710
5711                         /* Retry/Perform IDC-Lock recovery */
5712                         if (qla83xx_idc_lock_recovery(base_vha)
5713                             == QLA_SUCCESS) {
5714                                 qla83xx_wait_logic();
5715                                 goto retry_lock;
5716                         } else
5717                                 ql_log(ql_log_warn, base_vha, 0xb075,
5718                                     "IDC Lock recovery FAILED.\n");
5719                 }
5720
5721         }
5722
5723         return;
5724 }
5725
5726 void
5727 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5728 {
5729 #if 0
5730         uint16_t options = (requester_id << 15) | BIT_7;
5731 #endif
5732         uint16_t retry;
5733         uint32_t data;
5734         struct qla_hw_data *ha = base_vha->hw;
5735
5736         /* IDC-unlock implementation using driver-unlock/lock-id
5737          * remote registers
5738          */
5739         retry = 0;
5740 retry_unlock:
5741         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5742             == QLA_SUCCESS) {
5743                 if (data == ha->portnum) {
5744                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5745                         /* Clearing lock-id by setting 0xff */
5746                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5747                 } else if (retry < 10) {
5748                         /* SV: XXX: IDC unlock retrying needed here? */
5749
5750                         /* Retry for IDC-unlock */
5751                         qla83xx_wait_logic();
5752                         retry++;
5753                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5754                             "Failed to release IDC lock, retrying=%d\n", retry);
5755                         goto retry_unlock;
5756                 }
5757         } else if (retry < 10) {
5758                 /* Retry for IDC-unlock */
5759                 qla83xx_wait_logic();
5760                 retry++;
5761                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5762                     "Failed to read drv-lockid, retrying=%d\n", retry);
5763                 goto retry_unlock;
5764         }
5765
5766         return;
5767
5768 #if 0
5769         /* XXX: IDC-unlock implementation using access-control mbx */
5770         retry = 0;
5771 retry_unlock2:
5772         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5773                 if (retry < 10) {
5774                         /* Retry for IDC-unlock */
5775                         qla83xx_wait_logic();
5776                         retry++;
5777                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5778                             "Failed to release IDC lock, retrying=%d\n", retry);
5779                         goto retry_unlock2;
5780                 }
5781         }
5782
5783         return;
5784 #endif
5785 }
5786
5787 int
5788 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5789 {
5790         int rval = QLA_SUCCESS;
5791         struct qla_hw_data *ha = vha->hw;
5792         uint32_t drv_presence;
5793
5794         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5795         if (rval == QLA_SUCCESS) {
5796                 drv_presence |= (1 << ha->portnum);
5797                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5798                     drv_presence);
5799         }
5800
5801         return rval;
5802 }
5803
5804 int
5805 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5806 {
5807         int rval = QLA_SUCCESS;
5808
5809         qla83xx_idc_lock(vha, 0);
5810         rval = __qla83xx_set_drv_presence(vha);
5811         qla83xx_idc_unlock(vha, 0);
5812
5813         return rval;
5814 }
5815
5816 int
5817 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5818 {
5819         int rval = QLA_SUCCESS;
5820         struct qla_hw_data *ha = vha->hw;
5821         uint32_t drv_presence;
5822
5823         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5824         if (rval == QLA_SUCCESS) {
5825                 drv_presence &= ~(1 << ha->portnum);
5826                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5827                     drv_presence);
5828         }
5829
5830         return rval;
5831 }
5832
5833 int
5834 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5835 {
5836         int rval = QLA_SUCCESS;
5837
5838         qla83xx_idc_lock(vha, 0);
5839         rval = __qla83xx_clear_drv_presence(vha);
5840         qla83xx_idc_unlock(vha, 0);
5841
5842         return rval;
5843 }
5844
5845 static void
5846 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5847 {
5848         struct qla_hw_data *ha = vha->hw;
5849         uint32_t drv_ack, drv_presence;
5850         unsigned long ack_timeout;
5851
5852         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5853         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5854         while (1) {
5855                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5856                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5857                 if ((drv_ack & drv_presence) == drv_presence)
5858                         break;
5859
5860                 if (time_after_eq(jiffies, ack_timeout)) {
5861                         ql_log(ql_log_warn, vha, 0xb067,
5862                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5863                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5864                         /*
5865                          * The function(s) which did not ack in time are forced
5866                          * to withdraw any further participation in the IDC
5867                          * reset.
5868                          */
5869                         if (drv_ack != drv_presence)
5870                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5871                                     drv_ack);
5872                         break;
5873                 }
5874
5875                 qla83xx_idc_unlock(vha, 0);
5876                 msleep(1000);
5877                 qla83xx_idc_lock(vha, 0);
5878         }
5879
5880         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5881         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5882 }
5883
5884 static int
5885 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5886 {
5887         int rval = QLA_SUCCESS;
5888         uint32_t idc_control;
5889
5890         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5891         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5892
5893         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5894         __qla83xx_get_idc_control(vha, &idc_control);
5895         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5896         __qla83xx_set_idc_control(vha, 0);
5897
5898         qla83xx_idc_unlock(vha, 0);
5899         rval = qla83xx_restart_nic_firmware(vha);
5900         qla83xx_idc_lock(vha, 0);
5901
5902         if (rval != QLA_SUCCESS) {
5903                 ql_log(ql_log_fatal, vha, 0xb06a,
5904                     "Failed to restart NIC f/w.\n");
5905                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5906                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5907         } else {
5908                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5909                     "Success in restarting nic f/w.\n");
5910                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5911                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5912         }
5913
5914         return rval;
5915 }
5916
5917 /* Assumes idc_lock always held on entry */
5918 int
5919 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5920 {
5921         struct qla_hw_data *ha = base_vha->hw;
5922         int rval = QLA_SUCCESS;
5923         unsigned long dev_init_timeout;
5924         uint32_t dev_state;
5925
5926         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5927         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5928
5929         while (1) {
5930
5931                 if (time_after_eq(jiffies, dev_init_timeout)) {
5932                         ql_log(ql_log_warn, base_vha, 0xb06e,
5933                             "Initialization TIMEOUT!\n");
5934                         /* Init timeout. Disable further NIC Core
5935                          * communication.
5936                          */
5937                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5938                                 QLA8XXX_DEV_FAILED);
5939                         ql_log(ql_log_info, base_vha, 0xb06f,
5940                             "HW State: FAILED.\n");
5941                 }
5942
5943                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5944                 switch (dev_state) {
5945                 case QLA8XXX_DEV_READY:
5946                         if (ha->flags.nic_core_reset_owner)
5947                                 qla83xx_idc_audit(base_vha,
5948                                     IDC_AUDIT_COMPLETION);
5949                         ha->flags.nic_core_reset_owner = 0;
5950                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5951                             "Reset_owner reset by 0x%x.\n",
5952                             ha->portnum);
5953                         goto exit;
5954                 case QLA8XXX_DEV_COLD:
5955                         if (ha->flags.nic_core_reset_owner)
5956                                 rval = qla83xx_device_bootstrap(base_vha);
5957                         else {
5958                         /* Wait for AEN to change device-state */
5959                                 qla83xx_idc_unlock(base_vha, 0);
5960                                 msleep(1000);
5961                                 qla83xx_idc_lock(base_vha, 0);
5962                         }
5963                         break;
5964                 case QLA8XXX_DEV_INITIALIZING:
5965                         /* Wait for AEN to change device-state */
5966                         qla83xx_idc_unlock(base_vha, 0);
5967                         msleep(1000);
5968                         qla83xx_idc_lock(base_vha, 0);
5969                         break;
5970                 case QLA8XXX_DEV_NEED_RESET:
5971                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5972                                 qla83xx_need_reset_handler(base_vha);
5973                         else {
5974                                 /* Wait for AEN to change device-state */
5975                                 qla83xx_idc_unlock(base_vha, 0);
5976                                 msleep(1000);
5977                                 qla83xx_idc_lock(base_vha, 0);
5978                         }
5979                         /* reset timeout value after need reset handler */
5980                         dev_init_timeout = jiffies +
5981                             (ha->fcoe_dev_init_timeout * HZ);
5982                         break;
5983                 case QLA8XXX_DEV_NEED_QUIESCENT:
5984                         /* XXX: DEBUG for now */
5985                         qla83xx_idc_unlock(base_vha, 0);
5986                         msleep(1000);
5987                         qla83xx_idc_lock(base_vha, 0);
5988                         break;
5989                 case QLA8XXX_DEV_QUIESCENT:
5990                         /* XXX: DEBUG for now */
5991                         if (ha->flags.quiesce_owner)
5992                                 goto exit;
5993
5994                         qla83xx_idc_unlock(base_vha, 0);
5995                         msleep(1000);
5996                         qla83xx_idc_lock(base_vha, 0);
5997                         dev_init_timeout = jiffies +
5998                             (ha->fcoe_dev_init_timeout * HZ);
5999                         break;
6000                 case QLA8XXX_DEV_FAILED:
6001                         if (ha->flags.nic_core_reset_owner)
6002                                 qla83xx_idc_audit(base_vha,
6003                                     IDC_AUDIT_COMPLETION);
6004                         ha->flags.nic_core_reset_owner = 0;
6005                         __qla83xx_clear_drv_presence(base_vha);
6006                         qla83xx_idc_unlock(base_vha, 0);
6007                         qla8xxx_dev_failed_handler(base_vha);
6008                         rval = QLA_FUNCTION_FAILED;
6009                         qla83xx_idc_lock(base_vha, 0);
6010                         goto exit;
6011                 case QLA8XXX_BAD_VALUE:
6012                         qla83xx_idc_unlock(base_vha, 0);
6013                         msleep(1000);
6014                         qla83xx_idc_lock(base_vha, 0);
6015                         break;
6016                 default:
6017                         ql_log(ql_log_warn, base_vha, 0xb071,
6018                             "Unknown Device State: %x.\n", dev_state);
6019                         qla83xx_idc_unlock(base_vha, 0);
6020                         qla8xxx_dev_failed_handler(base_vha);
6021                         rval = QLA_FUNCTION_FAILED;
6022                         qla83xx_idc_lock(base_vha, 0);
6023                         goto exit;
6024                 }
6025         }
6026
6027 exit:
6028         return rval;
6029 }
6030
6031 void
6032 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6033 {
6034         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6035             board_disable);
6036         struct pci_dev *pdev = ha->pdev;
6037         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6038
6039         ql_log(ql_log_warn, base_vha, 0x015b,
6040             "Disabling adapter.\n");
6041
6042         if (!atomic_read(&pdev->enable_cnt)) {
6043                 ql_log(ql_log_info, base_vha, 0xfffc,
6044                     "PCI device disabled, no action req for PCI error=%lx\n",
6045                     base_vha->pci_flags);
6046                 return;
6047         }
6048
6049         /*
6050          * if UNLOADING flag is already set, then continue unload,
6051          * where it was set first.
6052          */
6053         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6054                 return;
6055
6056         qla2x00_wait_for_sess_deletion(base_vha);
6057
6058         qla2x00_delete_all_vps(ha, base_vha);
6059
6060         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6061
6062         qla2x00_dfs_remove(base_vha);
6063
6064         qla84xx_put_chip(base_vha);
6065
6066         if (base_vha->timer_active)
6067                 qla2x00_stop_timer(base_vha);
6068
6069         base_vha->flags.online = 0;
6070
6071         qla2x00_destroy_deferred_work(ha);
6072
6073         /*
6074          * Do not try to stop beacon blink as it will issue a mailbox
6075          * command.
6076          */
6077         qla2x00_free_sysfs_attr(base_vha, false);
6078
6079         fc_remove_host(base_vha->host);
6080
6081         scsi_remove_host(base_vha->host);
6082
6083         base_vha->flags.init_done = 0;
6084         qla25xx_delete_queues(base_vha);
6085         qla2x00_free_fcports(base_vha);
6086         qla2x00_free_irqs(base_vha);
6087         qla2x00_mem_free(ha);
6088         qla82xx_md_free(base_vha);
6089         qla2x00_free_queues(ha);
6090
6091         qla2x00_unmap_iobases(ha);
6092
6093         pci_release_selected_regions(ha->pdev, ha->bars);
6094         pci_disable_pcie_error_reporting(pdev);
6095         pci_disable_device(pdev);
6096
6097         /*
6098          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6099          */
6100 }
6101
6102 /**************************************************************************
6103 * qla2x00_do_dpc
6104 *   This kernel thread is a task that is schedule by the interrupt handler
6105 *   to perform the background processing for interrupts.
6106 *
6107 * Notes:
6108 * This task always run in the context of a kernel thread.  It
6109 * is kick-off by the driver's detect code and starts up
6110 * up one per adapter. It immediately goes to sleep and waits for
6111 * some fibre event.  When either the interrupt handler or
6112 * the timer routine detects a event it will one of the task
6113 * bits then wake us up.
6114 **************************************************************************/
6115 static int
6116 qla2x00_do_dpc(void *data)
6117 {
6118         scsi_qla_host_t *base_vha;
6119         struct qla_hw_data *ha;
6120         uint32_t online;
6121         struct qla_qpair *qpair;
6122
6123         ha = (struct qla_hw_data *)data;
6124         base_vha = pci_get_drvdata(ha->pdev);
6125
6126         set_user_nice(current, MIN_NICE);
6127
6128         set_current_state(TASK_INTERRUPTIBLE);
6129         while (!kthread_should_stop()) {
6130                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6131                     "DPC handler sleeping.\n");
6132
6133                 schedule();
6134
6135                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6136                         goto end_loop;
6137
6138                 if (ha->flags.eeh_busy) {
6139                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6140                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6141                         goto end_loop;
6142                 }
6143
6144                 ha->dpc_active = 1;
6145
6146                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6147                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6148                     base_vha->dpc_flags);
6149
6150                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6151                         break;
6152
6153                 if (IS_P3P_TYPE(ha)) {
6154                         if (IS_QLA8044(ha)) {
6155                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6156                                         &base_vha->dpc_flags)) {
6157                                         qla8044_idc_lock(ha);
6158                                         qla8044_wr_direct(base_vha,
6159                                                 QLA8044_CRB_DEV_STATE_INDEX,
6160                                                 QLA8XXX_DEV_FAILED);
6161                                         qla8044_idc_unlock(ha);
6162                                         ql_log(ql_log_info, base_vha, 0x4004,
6163                                                 "HW State: FAILED.\n");
6164                                         qla8044_device_state_handler(base_vha);
6165                                         continue;
6166                                 }
6167
6168                         } else {
6169                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6170                                         &base_vha->dpc_flags)) {
6171                                         qla82xx_idc_lock(ha);
6172                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6173                                                 QLA8XXX_DEV_FAILED);
6174                                         qla82xx_idc_unlock(ha);
6175                                         ql_log(ql_log_info, base_vha, 0x0151,
6176                                                 "HW State: FAILED.\n");
6177                                         qla82xx_device_state_handler(base_vha);
6178                                         continue;
6179                                 }
6180                         }
6181
6182                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6183                                 &base_vha->dpc_flags)) {
6184
6185                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6186                                     "FCoE context reset scheduled.\n");
6187                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6188                                         &base_vha->dpc_flags))) {
6189                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6190                                                 /* FCoE-ctx reset failed.
6191                                                  * Escalate to chip-reset
6192                                                  */
6193                                                 set_bit(ISP_ABORT_NEEDED,
6194                                                         &base_vha->dpc_flags);
6195                                         }
6196                                         clear_bit(ABORT_ISP_ACTIVE,
6197                                                 &base_vha->dpc_flags);
6198                                 }
6199
6200                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6201                                     "FCoE context reset end.\n");
6202                         }
6203                 } else if (IS_QLAFX00(ha)) {
6204                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6205                                 &base_vha->dpc_flags)) {
6206                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6207                                     "Firmware Reset Recovery\n");
6208                                 if (qlafx00_reset_initialize(base_vha)) {
6209                                         /* Failed. Abort isp later. */
6210                                         if (!test_bit(UNLOADING,
6211                                             &base_vha->dpc_flags)) {
6212                                                 set_bit(ISP_UNRECOVERABLE,
6213                                                     &base_vha->dpc_flags);
6214                                                 ql_dbg(ql_dbg_dpc, base_vha,
6215                                                     0x4021,
6216                                                     "Reset Recovery Failed\n");
6217                                         }
6218                                 }
6219                         }
6220
6221                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6222                                 &base_vha->dpc_flags)) {
6223                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6224                                     "ISPFx00 Target Scan scheduled\n");
6225                                 if (qlafx00_rescan_isp(base_vha)) {
6226                                         if (!test_bit(UNLOADING,
6227                                             &base_vha->dpc_flags))
6228                                                 set_bit(ISP_UNRECOVERABLE,
6229                                                     &base_vha->dpc_flags);
6230                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6231                                             "ISPFx00 Target Scan Failed\n");
6232                                 }
6233                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6234                                     "ISPFx00 Target Scan End\n");
6235                         }
6236                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6237                                 &base_vha->dpc_flags)) {
6238                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6239                                     "ISPFx00 Host Info resend scheduled\n");
6240                                 qlafx00_fx_disc(base_vha,
6241                                     &base_vha->hw->mr.fcport,
6242                                     FXDISC_REG_HOST_INFO);
6243                         }
6244                 }
6245
6246                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6247                         &base_vha->dpc_flags) &&
6248                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6249                         qla24xx_detect_sfp(base_vha);
6250
6251                         if (ha->flags.detected_lr_sfp !=
6252                             ha->flags.using_lr_setting)
6253                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6254                 }
6255
6256                 if (test_and_clear_bit
6257                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6258                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6259                         bool do_reset = true;
6260
6261                         switch (base_vha->qlini_mode) {
6262                         case QLA2XXX_INI_MODE_ENABLED:
6263                                 break;
6264                         case QLA2XXX_INI_MODE_DISABLED:
6265                                 if (!qla_tgt_mode_enabled(base_vha) &&
6266                                     !ha->flags.fw_started)
6267                                         do_reset = false;
6268                                 break;
6269                         case QLA2XXX_INI_MODE_DUAL:
6270                                 if (!qla_dual_mode_enabled(base_vha) &&
6271                                     !ha->flags.fw_started)
6272                                         do_reset = false;
6273                                 break;
6274                         default:
6275                                 break;
6276                         }
6277
6278                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6279                             &base_vha->dpc_flags))) {
6280                                 base_vha->flags.online = 1;
6281                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6282                                     "ISP abort scheduled.\n");
6283                                 if (ha->isp_ops->abort_isp(base_vha)) {
6284                                         /* failed. retry later */
6285                                         set_bit(ISP_ABORT_NEEDED,
6286                                             &base_vha->dpc_flags);
6287                                 }
6288                                 clear_bit(ABORT_ISP_ACTIVE,
6289                                                 &base_vha->dpc_flags);
6290                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6291                                     "ISP abort end.\n");
6292                         }
6293                 }
6294
6295                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6296                     &base_vha->dpc_flags)) {
6297                         qla2x00_update_fcports(base_vha);
6298                 }
6299
6300                 if (IS_QLAFX00(ha))
6301                         goto loop_resync_check;
6302
6303                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6304                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6305                             "Quiescence mode scheduled.\n");
6306                         if (IS_P3P_TYPE(ha)) {
6307                                 if (IS_QLA82XX(ha))
6308                                         qla82xx_device_state_handler(base_vha);
6309                                 if (IS_QLA8044(ha))
6310                                         qla8044_device_state_handler(base_vha);
6311                                 clear_bit(ISP_QUIESCE_NEEDED,
6312                                     &base_vha->dpc_flags);
6313                                 if (!ha->flags.quiesce_owner) {
6314                                         qla2x00_perform_loop_resync(base_vha);
6315                                         if (IS_QLA82XX(ha)) {
6316                                                 qla82xx_idc_lock(ha);
6317                                                 qla82xx_clear_qsnt_ready(
6318                                                     base_vha);
6319                                                 qla82xx_idc_unlock(ha);
6320                                         } else if (IS_QLA8044(ha)) {
6321                                                 qla8044_idc_lock(ha);
6322                                                 qla8044_clear_qsnt_ready(
6323                                                     base_vha);
6324                                                 qla8044_idc_unlock(ha);
6325                                         }
6326                                 }
6327                         } else {
6328                                 clear_bit(ISP_QUIESCE_NEEDED,
6329                                     &base_vha->dpc_flags);
6330                                 qla2x00_quiesce_io(base_vha);
6331                         }
6332                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6333                             "Quiescence mode end.\n");
6334                 }
6335
6336                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6337                                 &base_vha->dpc_flags) &&
6338                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6339
6340                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6341                             "Reset marker scheduled.\n");
6342                         qla2x00_rst_aen(base_vha);
6343                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6344                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6345                             "Reset marker end.\n");
6346                 }
6347
6348                 /* Retry each device up to login retry count */
6349                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6350                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6351                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6352
6353                         if (!base_vha->relogin_jif ||
6354                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6355                                 base_vha->relogin_jif = jiffies + HZ;
6356                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6357
6358                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6359                                     "Relogin scheduled.\n");
6360                                 qla24xx_post_relogin_work(base_vha);
6361                         }
6362                 }
6363 loop_resync_check:
6364                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6365                     &base_vha->dpc_flags)) {
6366
6367                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6368                             "Loop resync scheduled.\n");
6369
6370                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6371                             &base_vha->dpc_flags))) {
6372
6373                                 qla2x00_loop_resync(base_vha);
6374
6375                                 clear_bit(LOOP_RESYNC_ACTIVE,
6376                                                 &base_vha->dpc_flags);
6377                         }
6378
6379                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6380                             "Loop resync end.\n");
6381                 }
6382
6383                 if (IS_QLAFX00(ha))
6384                         goto intr_on_check;
6385
6386                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6387                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6388                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6389                         qla2xxx_flash_npiv_conf(base_vha);
6390                 }
6391
6392 intr_on_check:
6393                 if (!ha->interrupts_on)
6394                         ha->isp_ops->enable_intrs(ha);
6395
6396                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6397                                         &base_vha->dpc_flags)) {
6398                         if (ha->beacon_blink_led == 1)
6399                                 ha->isp_ops->beacon_blink(base_vha);
6400                 }
6401
6402                 /* qpair online check */
6403                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6404                     &base_vha->dpc_flags)) {
6405                         if (ha->flags.eeh_busy ||
6406                             ha->flags.pci_channel_io_perm_failure)
6407                                 online = 0;
6408                         else
6409                                 online = 1;
6410
6411                         mutex_lock(&ha->mq_lock);
6412                         list_for_each_entry(qpair, &base_vha->qp_list,
6413                             qp_list_elem)
6414                         qpair->online = online;
6415                         mutex_unlock(&ha->mq_lock);
6416                 }
6417
6418                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6419                     &base_vha->dpc_flags)) {
6420                         ql_log(ql_log_info, base_vha, 0xffffff,
6421                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6422                                                 ha->nvme_last_rptd_aen);
6423                         if (qla27xx_set_zio_threshold(base_vha,
6424                             ha->nvme_last_rptd_aen)) {
6425                                 ql_log(ql_log_info, base_vha, 0xffffff,
6426                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6427                                     ha->nvme_last_rptd_aen);
6428                         }
6429                 }
6430
6431                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6432                     &base_vha->dpc_flags)) {
6433                         ql_log(ql_log_info, base_vha, 0xffffff,
6434                             "SET ZIO Activity exchange threshold to %d.\n",
6435                             ha->last_zio_threshold);
6436                         qla27xx_set_zio_threshold(base_vha,
6437                             ha->last_zio_threshold);
6438                 }
6439
6440                 if (!IS_QLAFX00(ha))
6441                         qla2x00_do_dpc_all_vps(base_vha);
6442
6443                 if (test_and_clear_bit(N2N_LINK_RESET,
6444                         &base_vha->dpc_flags)) {
6445                         qla2x00_lip_reset(base_vha);
6446                 }
6447
6448                 ha->dpc_active = 0;
6449 end_loop:
6450                 set_current_state(TASK_INTERRUPTIBLE);
6451         } /* End of while(1) */
6452         __set_current_state(TASK_RUNNING);
6453
6454         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6455             "DPC handler exiting.\n");
6456
6457         /*
6458          * Make sure that nobody tries to wake us up again.
6459          */
6460         ha->dpc_active = 0;
6461
6462         /* Cleanup any residual CTX SRBs. */
6463         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6464
6465         return 0;
6466 }
6467
6468 void
6469 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6470 {
6471         struct qla_hw_data *ha = vha->hw;
6472         struct task_struct *t = ha->dpc_thread;
6473
6474         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6475                 wake_up_process(t);
6476 }
6477
6478 /*
6479 *  qla2x00_rst_aen
6480 *      Processes asynchronous reset.
6481 *
6482 * Input:
6483 *      ha  = adapter block pointer.
6484 */
6485 static void
6486 qla2x00_rst_aen(scsi_qla_host_t *vha)
6487 {
6488         if (vha->flags.online && !vha->flags.reset_active &&
6489             !atomic_read(&vha->loop_down_timer) &&
6490             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6491                 do {
6492                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6493
6494                         /*
6495                          * Issue marker command only when we are going to start
6496                          * the I/O.
6497                          */
6498                         vha->marker_needed = 1;
6499                 } while (!atomic_read(&vha->loop_down_timer) &&
6500                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6501         }
6502 }
6503
6504 /**************************************************************************
6505 *   qla2x00_timer
6506 *
6507 * Description:
6508 *   One second timer
6509 *
6510 * Context: Interrupt
6511 ***************************************************************************/
6512 void
6513 qla2x00_timer(struct timer_list *t)
6514 {
6515         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6516         unsigned long   cpu_flags = 0;
6517         int             start_dpc = 0;
6518         int             index;
6519         srb_t           *sp;
6520         uint16_t        w;
6521         struct qla_hw_data *ha = vha->hw;
6522         struct req_que *req;
6523
6524         if (ha->flags.eeh_busy) {
6525                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6526                     "EEH = %d, restarting timer.\n",
6527                     ha->flags.eeh_busy);
6528                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6529                 return;
6530         }
6531
6532         /*
6533          * Hardware read to raise pending EEH errors during mailbox waits. If
6534          * the read returns -1 then disable the board.
6535          */
6536         if (!pci_channel_offline(ha->pdev)) {
6537                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6538                 qla2x00_check_reg16_for_disconnect(vha, w);
6539         }
6540
6541         /* Make sure qla82xx_watchdog is run only for physical port */
6542         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6543                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6544                         start_dpc++;
6545                 if (IS_QLA82XX(ha))
6546                         qla82xx_watchdog(vha);
6547                 else if (IS_QLA8044(ha))
6548                         qla8044_watchdog(vha);
6549         }
6550
6551         if (!vha->vp_idx && IS_QLAFX00(ha))
6552                 qlafx00_timer_routine(vha);
6553
6554         /* Loop down handler. */
6555         if (atomic_read(&vha->loop_down_timer) > 0 &&
6556             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6557             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6558                 && vha->flags.online) {
6559
6560                 if (atomic_read(&vha->loop_down_timer) ==
6561                     vha->loop_down_abort_time) {
6562
6563                         ql_log(ql_log_info, vha, 0x6008,
6564                             "Loop down - aborting the queues before time expires.\n");
6565
6566                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6567                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6568
6569                         /*
6570                          * Schedule an ISP abort to return any FCP2-device
6571                          * commands.
6572                          */
6573                         /* NPIV - scan physical port only */
6574                         if (!vha->vp_idx) {
6575                                 spin_lock_irqsave(&ha->hardware_lock,
6576                                     cpu_flags);
6577                                 req = ha->req_q_map[0];
6578                                 for (index = 1;
6579                                     index < req->num_outstanding_cmds;
6580                                     index++) {
6581                                         fc_port_t *sfcp;
6582
6583                                         sp = req->outstanding_cmds[index];
6584                                         if (!sp)
6585                                                 continue;
6586                                         if (sp->cmd_type != TYPE_SRB)
6587                                                 continue;
6588                                         if (sp->type != SRB_SCSI_CMD)
6589                                                 continue;
6590                                         sfcp = sp->fcport;
6591                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6592                                                 continue;
6593
6594                                         if (IS_QLA82XX(ha))
6595                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6596                                                         &vha->dpc_flags);
6597                                         else
6598                                                 set_bit(ISP_ABORT_NEEDED,
6599                                                         &vha->dpc_flags);
6600                                         break;
6601                                 }
6602                                 spin_unlock_irqrestore(&ha->hardware_lock,
6603                                                                 cpu_flags);
6604                         }
6605                         start_dpc++;
6606                 }
6607
6608                 /* if the loop has been down for 4 minutes, reinit adapter */
6609                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6610                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6611                                 ql_log(ql_log_warn, vha, 0x6009,
6612                                     "Loop down - aborting ISP.\n");
6613
6614                                 if (IS_QLA82XX(ha))
6615                                         set_bit(FCOE_CTX_RESET_NEEDED,
6616                                                 &vha->dpc_flags);
6617                                 else
6618                                         set_bit(ISP_ABORT_NEEDED,
6619                                                 &vha->dpc_flags);
6620                         }
6621                 }
6622                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6623                     "Loop down - seconds remaining %d.\n",
6624                     atomic_read(&vha->loop_down_timer));
6625         }
6626         /* Check if beacon LED needs to be blinked for physical host only */
6627         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6628                 /* There is no beacon_blink function for ISP82xx */
6629                 if (!IS_P3P_TYPE(ha)) {
6630                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6631                         start_dpc++;
6632                 }
6633         }
6634
6635         /* Process any deferred work. */
6636         if (!list_empty(&vha->work_list)) {
6637                 unsigned long flags;
6638                 bool q = false;
6639
6640                 spin_lock_irqsave(&vha->work_lock, flags);
6641                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6642                         q = true;
6643                 spin_unlock_irqrestore(&vha->work_lock, flags);
6644                 if (q)
6645                         queue_work(vha->hw->wq, &vha->iocb_work);
6646         }
6647
6648         /*
6649          * FC-NVME
6650          * see if the active AEN count has changed from what was last reported.
6651          */
6652         if (!vha->vp_idx &&
6653             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
6654             ha->zio_mode == QLA_ZIO_MODE_6 &&
6655             !ha->flags.host_shutting_down) {
6656                 ql_log(ql_log_info, vha, 0x3002,
6657                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6658                     ha->nvme_last_rptd_aen);
6659                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6660                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6661                 start_dpc++;
6662         }
6663
6664         if (!vha->vp_idx &&
6665             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6666             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6667             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
6668                 ql_log(ql_log_info, vha, 0x3002,
6669                     "Sched: Set ZIO exchange threshold to %d.\n",
6670                     ha->last_zio_threshold);
6671                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6672                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6673                 start_dpc++;
6674         }
6675
6676         /* Schedule the DPC routine if needed */
6677         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6678             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6679             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6680             start_dpc ||
6681             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6682             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6683             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6684             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6685             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6686             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6687                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6688                     "isp_abort_needed=%d loop_resync_needed=%d "
6689                     "fcport_update_needed=%d start_dpc=%d "
6690                     "reset_marker_needed=%d",
6691                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6692                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6693                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6694                     start_dpc,
6695                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6696                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6697                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6698                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6699                     "relogin_needed=%d.\n",
6700                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6701                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6702                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6703                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6704                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6705                 qla2xxx_wake_dpc(vha);
6706         }
6707
6708         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6709 }
6710
6711 /* Firmware interface routines. */
6712
6713 #define FW_ISP21XX      0
6714 #define FW_ISP22XX      1
6715 #define FW_ISP2300      2
6716 #define FW_ISP2322      3
6717 #define FW_ISP24XX      4
6718 #define FW_ISP25XX      5
6719 #define FW_ISP81XX      6
6720 #define FW_ISP82XX      7
6721 #define FW_ISP2031      8
6722 #define FW_ISP8031      9
6723 #define FW_ISP27XX      10
6724 #define FW_ISP28XX      11
6725
6726 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
6727 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
6728 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
6729 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
6730 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
6731 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
6732 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
6733 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
6734 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
6735 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
6736 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
6737 #define FW_FILE_ISP28XX "/*(DEBLOBBED)*/"
6738
6739
6740 static DEFINE_MUTEX(qla_fw_lock);
6741
6742 static struct fw_blob qla_fw_blobs[] = {
6743         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6744         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6745         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6746         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6747         { .name = FW_FILE_ISP24XX, },
6748         { .name = FW_FILE_ISP25XX, },
6749         { .name = FW_FILE_ISP81XX, },
6750         { .name = FW_FILE_ISP82XX, },
6751         { .name = FW_FILE_ISP2031, },
6752         { .name = FW_FILE_ISP8031, },
6753         { .name = FW_FILE_ISP27XX, },
6754         { .name = FW_FILE_ISP28XX, },
6755         { .name = NULL, },
6756 };
6757
6758 struct fw_blob *
6759 qla2x00_request_firmware(scsi_qla_host_t *vha)
6760 {
6761         struct qla_hw_data *ha = vha->hw;
6762         struct fw_blob *blob;
6763
6764         if (IS_QLA2100(ha)) {
6765                 blob = &qla_fw_blobs[FW_ISP21XX];
6766         } else if (IS_QLA2200(ha)) {
6767                 blob = &qla_fw_blobs[FW_ISP22XX];
6768         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6769                 blob = &qla_fw_blobs[FW_ISP2300];
6770         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6771                 blob = &qla_fw_blobs[FW_ISP2322];
6772         } else if (IS_QLA24XX_TYPE(ha)) {
6773                 blob = &qla_fw_blobs[FW_ISP24XX];
6774         } else if (IS_QLA25XX(ha)) {
6775                 blob = &qla_fw_blobs[FW_ISP25XX];
6776         } else if (IS_QLA81XX(ha)) {
6777                 blob = &qla_fw_blobs[FW_ISP81XX];
6778         } else if (IS_QLA82XX(ha)) {
6779                 blob = &qla_fw_blobs[FW_ISP82XX];
6780         } else if (IS_QLA2031(ha)) {
6781                 blob = &qla_fw_blobs[FW_ISP2031];
6782         } else if (IS_QLA8031(ha)) {
6783                 blob = &qla_fw_blobs[FW_ISP8031];
6784         } else if (IS_QLA27XX(ha)) {
6785                 blob = &qla_fw_blobs[FW_ISP27XX];
6786         } else if (IS_QLA28XX(ha)) {
6787                 blob = &qla_fw_blobs[FW_ISP28XX];
6788         } else {
6789                 return NULL;
6790         }
6791
6792         if (!blob->name)
6793                 return NULL;
6794
6795         mutex_lock(&qla_fw_lock);
6796         if (blob->fw)
6797                 goto out;
6798
6799         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6800                 ql_log(ql_log_warn, vha, 0x0063,
6801                     "Failed to load firmware image (%s).\n", blob->name);
6802                 blob->fw = NULL;
6803                 blob = NULL;
6804         }
6805
6806 out:
6807         mutex_unlock(&qla_fw_lock);
6808         return blob;
6809 }
6810
6811 static void
6812 qla2x00_release_firmware(void)
6813 {
6814         struct fw_blob *blob;
6815
6816         mutex_lock(&qla_fw_lock);
6817         for (blob = qla_fw_blobs; blob->name; blob++)
6818                 release_firmware(blob->fw);
6819         mutex_unlock(&qla_fw_lock);
6820 }
6821
6822 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
6823 {
6824         struct qla_hw_data *ha = vha->hw;
6825         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6826         struct qla_qpair *qpair = NULL;
6827         struct scsi_qla_host *vp;
6828         fc_port_t *fcport;
6829         int i;
6830         unsigned long flags;
6831
6832         ha->chip_reset++;
6833
6834         ha->base_qpair->chip_reset = ha->chip_reset;
6835         for (i = 0; i < ha->max_qpairs; i++) {
6836                 if (ha->queue_pair_map[i])
6837                         ha->queue_pair_map[i]->chip_reset =
6838                             ha->base_qpair->chip_reset;
6839         }
6840
6841         /* purge MBox commands */
6842         if (atomic_read(&ha->num_pend_mbx_stage3)) {
6843                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6844                 complete(&ha->mbx_intr_comp);
6845         }
6846
6847         i = 0;
6848
6849         while (atomic_read(&ha->num_pend_mbx_stage3) ||
6850             atomic_read(&ha->num_pend_mbx_stage2) ||
6851             atomic_read(&ha->num_pend_mbx_stage1)) {
6852                 msleep(20);
6853                 i++;
6854                 if (i > 50)
6855                         break;
6856         }
6857
6858         ha->flags.purge_mbox = 0;
6859
6860         mutex_lock(&ha->mq_lock);
6861         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
6862                 qpair->online = 0;
6863         mutex_unlock(&ha->mq_lock);
6864
6865         qla2x00_mark_all_devices_lost(vha, 0);
6866
6867         spin_lock_irqsave(&ha->vport_slock, flags);
6868         list_for_each_entry(vp, &ha->vp_list, list) {
6869                 atomic_inc(&vp->vref_count);
6870                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6871                 qla2x00_mark_all_devices_lost(vp, 0);
6872                 spin_lock_irqsave(&ha->vport_slock, flags);
6873                 atomic_dec(&vp->vref_count);
6874         }
6875         spin_unlock_irqrestore(&ha->vport_slock, flags);
6876
6877         /* Clear all async request states across all VPs. */
6878         list_for_each_entry(fcport, &vha->vp_fcports, list)
6879                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6880
6881         spin_lock_irqsave(&ha->vport_slock, flags);
6882         list_for_each_entry(vp, &ha->vp_list, list) {
6883                 atomic_inc(&vp->vref_count);
6884                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6885                 list_for_each_entry(fcport, &vp->vp_fcports, list)
6886                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6887                 spin_lock_irqsave(&ha->vport_slock, flags);
6888                 atomic_dec(&vp->vref_count);
6889         }
6890         spin_unlock_irqrestore(&ha->vport_slock, flags);
6891 }
6892
6893
6894 static pci_ers_result_t
6895 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6896 {
6897         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6898         struct qla_hw_data *ha = vha->hw;
6899
6900         ql_dbg(ql_dbg_aer, vha, 0x9000,
6901             "PCI error detected, state %x.\n", state);
6902
6903         if (!atomic_read(&pdev->enable_cnt)) {
6904                 ql_log(ql_log_info, vha, 0xffff,
6905                         "PCI device is disabled,state %x\n", state);
6906                 return PCI_ERS_RESULT_NEED_RESET;
6907         }
6908
6909         switch (state) {
6910         case pci_channel_io_normal:
6911                 ha->flags.eeh_busy = 0;
6912                 if (ql2xmqsupport || ql2xnvmeenable) {
6913                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6914                         qla2xxx_wake_dpc(vha);
6915                 }
6916                 return PCI_ERS_RESULT_CAN_RECOVER;
6917         case pci_channel_io_frozen:
6918                 ha->flags.eeh_busy = 1;
6919                 qla_pci_error_cleanup(vha);
6920                 return PCI_ERS_RESULT_NEED_RESET;
6921         case pci_channel_io_perm_failure:
6922                 ha->flags.pci_channel_io_perm_failure = 1;
6923                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6924                 if (ql2xmqsupport || ql2xnvmeenable) {
6925                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6926                         qla2xxx_wake_dpc(vha);
6927                 }
6928                 return PCI_ERS_RESULT_DISCONNECT;
6929         }
6930         return PCI_ERS_RESULT_NEED_RESET;
6931 }
6932
6933 static pci_ers_result_t
6934 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6935 {
6936         int risc_paused = 0;
6937         uint32_t stat;
6938         unsigned long flags;
6939         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6940         struct qla_hw_data *ha = base_vha->hw;
6941         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6942         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6943
6944         if (IS_QLA82XX(ha))
6945                 return PCI_ERS_RESULT_RECOVERED;
6946
6947         spin_lock_irqsave(&ha->hardware_lock, flags);
6948         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6949                 stat = RD_REG_DWORD(&reg->hccr);
6950                 if (stat & HCCR_RISC_PAUSE)
6951                         risc_paused = 1;
6952         } else if (IS_QLA23XX(ha)) {
6953                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6954                 if (stat & HSR_RISC_PAUSED)
6955                         risc_paused = 1;
6956         } else if (IS_FWI2_CAPABLE(ha)) {
6957                 stat = RD_REG_DWORD(&reg24->host_status);
6958                 if (stat & HSRX_RISC_PAUSED)
6959                         risc_paused = 1;
6960         }
6961         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6962
6963         if (risc_paused) {
6964                 ql_log(ql_log_info, base_vha, 0x9003,
6965                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6966                 ha->isp_ops->fw_dump(base_vha, 0);
6967
6968                 return PCI_ERS_RESULT_NEED_RESET;
6969         } else
6970                 return PCI_ERS_RESULT_RECOVERED;
6971 }
6972
6973 static pci_ers_result_t
6974 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6975 {
6976         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6977         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6978         struct qla_hw_data *ha = base_vha->hw;
6979         int rc;
6980         struct qla_qpair *qpair = NULL;
6981
6982         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6983             "Slot Reset.\n");
6984
6985         /* Workaround: qla2xxx driver which access hardware earlier
6986          * needs error state to be pci_channel_io_online.
6987          * Otherwise mailbox command timesout.
6988          */
6989         pdev->error_state = pci_channel_io_normal;
6990
6991         pci_restore_state(pdev);
6992
6993         /* pci_restore_state() clears the saved_state flag of the device
6994          * save restored state which resets saved_state flag
6995          */
6996         pci_save_state(pdev);
6997
6998         if (ha->mem_only)
6999                 rc = pci_enable_device_mem(pdev);
7000         else
7001                 rc = pci_enable_device(pdev);
7002
7003         if (rc) {
7004                 ql_log(ql_log_warn, base_vha, 0x9005,
7005                     "Can't re-enable PCI device after reset.\n");
7006                 goto exit_slot_reset;
7007         }
7008
7009
7010         if (ha->isp_ops->pci_config(base_vha))
7011                 goto exit_slot_reset;
7012
7013         mutex_lock(&ha->mq_lock);
7014         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7015                 qpair->online = 1;
7016         mutex_unlock(&ha->mq_lock);
7017
7018         base_vha->flags.online = 1;
7019         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7020         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7021                 ret =  PCI_ERS_RESULT_RECOVERED;
7022         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7023
7024
7025 exit_slot_reset:
7026         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7027             "slot_reset return %x.\n", ret);
7028
7029         return ret;
7030 }
7031
7032 static void
7033 qla2xxx_pci_resume(struct pci_dev *pdev)
7034 {
7035         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7036         struct qla_hw_data *ha = base_vha->hw;
7037         int ret;
7038
7039         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7040             "pci_resume.\n");
7041
7042         ha->flags.eeh_busy = 0;
7043
7044         ret = qla2x00_wait_for_hba_online(base_vha);
7045         if (ret != QLA_SUCCESS) {
7046                 ql_log(ql_log_fatal, base_vha, 0x9002,
7047                     "The device failed to resume I/O from slot/link_reset.\n");
7048         }
7049 }
7050
7051 static void
7052 qla_pci_reset_prepare(struct pci_dev *pdev)
7053 {
7054         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7055         struct qla_hw_data *ha = base_vha->hw;
7056         struct qla_qpair *qpair;
7057
7058         ql_log(ql_log_warn, base_vha, 0xffff,
7059             "%s.\n", __func__);
7060
7061         /*
7062          * PCI FLR/function reset is about to reset the
7063          * slot. Stop the chip to stop all DMA access.
7064          * It is assumed that pci_reset_done will be called
7065          * after FLR to resume Chip operation.
7066          */
7067         ha->flags.eeh_busy = 1;
7068         mutex_lock(&ha->mq_lock);
7069         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7070                 qpair->online = 0;
7071         mutex_unlock(&ha->mq_lock);
7072
7073         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7074         qla2x00_abort_isp_cleanup(base_vha);
7075         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7076 }
7077
7078 static void
7079 qla_pci_reset_done(struct pci_dev *pdev)
7080 {
7081         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7082         struct qla_hw_data *ha = base_vha->hw;
7083         struct qla_qpair *qpair;
7084
7085         ql_log(ql_log_warn, base_vha, 0xffff,
7086             "%s.\n", __func__);
7087
7088         /*
7089          * FLR just completed by PCI layer. Resume adapter
7090          */
7091         ha->flags.eeh_busy = 0;
7092         mutex_lock(&ha->mq_lock);
7093         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7094                 qpair->online = 1;
7095         mutex_unlock(&ha->mq_lock);
7096
7097         base_vha->flags.online = 1;
7098         ha->isp_ops->abort_isp(base_vha);
7099         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7100 }
7101
7102 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7103 {
7104         int rc;
7105         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7106         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7107
7108         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7109                 rc = blk_mq_map_queues(qmap);
7110         else
7111                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7112         return rc;
7113 }
7114
7115 struct scsi_host_template qla2xxx_driver_template = {
7116         .module                 = THIS_MODULE,
7117         .name                   = QLA2XXX_DRIVER_NAME,
7118         .queuecommand           = qla2xxx_queuecommand,
7119
7120         .eh_timed_out           = fc_eh_timed_out,
7121         .eh_abort_handler       = qla2xxx_eh_abort,
7122         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7123         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7124         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7125         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7126
7127         .slave_configure        = qla2xxx_slave_configure,
7128
7129         .slave_alloc            = qla2xxx_slave_alloc,
7130         .slave_destroy          = qla2xxx_slave_destroy,
7131         .scan_finished          = qla2xxx_scan_finished,
7132         .scan_start             = qla2xxx_scan_start,
7133         .change_queue_depth     = scsi_change_queue_depth,
7134         .map_queues             = qla2xxx_map_queues,
7135         .this_id                = -1,
7136         .cmd_per_lun            = 3,
7137         .sg_tablesize           = SG_ALL,
7138
7139         .max_sectors            = 0xFFFF,
7140         .shost_attrs            = qla2x00_host_attrs,
7141
7142         .supported_mode         = MODE_INITIATOR,
7143         .track_queue_depth      = 1,
7144         .cmd_size               = sizeof(srb_t),
7145 };
7146
7147 static const struct pci_error_handlers qla2xxx_err_handler = {
7148         .error_detected = qla2xxx_pci_error_detected,
7149         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7150         .slot_reset = qla2xxx_pci_slot_reset,
7151         .resume = qla2xxx_pci_resume,
7152         .reset_prepare = qla_pci_reset_prepare,
7153         .reset_done = qla_pci_reset_done,
7154 };
7155
7156 static struct pci_device_id qla2xxx_pci_tbl[] = {
7157         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7158         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7159         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7160         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7161         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7162         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7163         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7164         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7165         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7166         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7167         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7168         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7169         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7170         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7171         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7172         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7173         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7174         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7175         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7176         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7177         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7178         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7179         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7180         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7181         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7182         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7183         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7184         { 0 },
7185 };
7186 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7187
7188 static struct pci_driver qla2xxx_pci_driver = {
7189         .name           = QLA2XXX_DRIVER_NAME,
7190         .driver         = {
7191                 .owner          = THIS_MODULE,
7192         },
7193         .id_table       = qla2xxx_pci_tbl,
7194         .probe          = qla2x00_probe_one,
7195         .remove         = qla2x00_remove_one,
7196         .shutdown       = qla2x00_shutdown,
7197         .err_handler    = &qla2xxx_err_handler,
7198 };
7199
7200 static const struct file_operations apidev_fops = {
7201         .owner = THIS_MODULE,
7202         .llseek = noop_llseek,
7203 };
7204
7205 /**
7206  * qla2x00_module_init - Module initialization.
7207  **/
7208 static int __init
7209 qla2x00_module_init(void)
7210 {
7211         int ret = 0;
7212
7213         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7214         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7215         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7216         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7217         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7218         BUILD_BUG_ON(sizeof(request_t) != 64);
7219         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7220         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7221         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7222         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7223         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7224         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7225         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7226         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7227         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7228         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7229         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7230         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7231         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7232         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7233         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7234         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7235         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7236
7237         /* Allocate cache for SRBs. */
7238         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7239             SLAB_HWCACHE_ALIGN, NULL);
7240         if (srb_cachep == NULL) {
7241                 ql_log(ql_log_fatal, NULL, 0x0001,
7242                     "Unable to allocate SRB cache...Failing load!.\n");
7243                 return -ENOMEM;
7244         }
7245
7246         /* Initialize target kmem_cache and mem_pools */
7247         ret = qlt_init();
7248         if (ret < 0) {
7249                 goto destroy_cache;
7250         } else if (ret > 0) {
7251                 /*
7252                  * If initiator mode is explictly disabled by qlt_init(),
7253                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7254                  * performing scsi_scan_target() during LOOP UP event.
7255                  */
7256                 qla2xxx_transport_functions.disable_target_scan = 1;
7257                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7258         }
7259
7260         /* Derive version string. */
7261         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7262         if (ql2xextended_error_logging)
7263                 strcat(qla2x00_version_str, "-debug");
7264         if (ql2xextended_error_logging == 1)
7265                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7266
7267         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7268                 qla_insert_tgt_attrs();
7269
7270         qla2xxx_transport_template =
7271             fc_attach_transport(&qla2xxx_transport_functions);
7272         if (!qla2xxx_transport_template) {
7273                 ql_log(ql_log_fatal, NULL, 0x0002,
7274                     "fc_attach_transport failed...Failing load!.\n");
7275                 ret = -ENODEV;
7276                 goto qlt_exit;
7277         }
7278
7279         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7280         if (apidev_major < 0) {
7281                 ql_log(ql_log_fatal, NULL, 0x0003,
7282                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7283         }
7284
7285         qla2xxx_transport_vport_template =
7286             fc_attach_transport(&qla2xxx_transport_vport_functions);
7287         if (!qla2xxx_transport_vport_template) {
7288                 ql_log(ql_log_fatal, NULL, 0x0004,
7289                     "fc_attach_transport vport failed...Failing load!.\n");
7290                 ret = -ENODEV;
7291                 goto unreg_chrdev;
7292         }
7293         ql_log(ql_log_info, NULL, 0x0005,
7294             "QLogic Fibre Channel HBA Driver: %s.\n",
7295             qla2x00_version_str);
7296         ret = pci_register_driver(&qla2xxx_pci_driver);
7297         if (ret) {
7298                 ql_log(ql_log_fatal, NULL, 0x0006,
7299                     "pci_register_driver failed...ret=%d Failing load!.\n",
7300                     ret);
7301                 goto release_vport_transport;
7302         }
7303         return ret;
7304
7305 release_vport_transport:
7306         fc_release_transport(qla2xxx_transport_vport_template);
7307
7308 unreg_chrdev:
7309         if (apidev_major >= 0)
7310                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7311         fc_release_transport(qla2xxx_transport_template);
7312
7313 qlt_exit:
7314         qlt_exit();
7315
7316 destroy_cache:
7317         kmem_cache_destroy(srb_cachep);
7318         return ret;
7319 }
7320
7321 /**
7322  * qla2x00_module_exit - Module cleanup.
7323  **/
7324 static void __exit
7325 qla2x00_module_exit(void)
7326 {
7327         pci_unregister_driver(&qla2xxx_pci_driver);
7328         qla2x00_release_firmware();
7329         kmem_cache_destroy(ctx_cachep);
7330         fc_release_transport(qla2xxx_transport_vport_template);
7331         if (apidev_major >= 0)
7332                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7333         fc_release_transport(qla2xxx_transport_template);
7334         qlt_exit();
7335         kmem_cache_destroy(srb_cachep);
7336 }
7337
7338 module_init(qla2x00_module_init);
7339 module_exit(qla2x00_module_exit);
7340
7341 MODULE_AUTHOR("QLogic Corporation");
7342 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7343 MODULE_LICENSE("GPL");
7344 MODULE_VERSION(QLA2XXX_VERSION);
7345 /*(DEBLOBBED)*/