drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     64
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 64.");
 122
 123 #if (IS_ENABLED(CONFIG_NVME_FC))
 124 int ql2xenabledif;
 125 #else
 126 int ql2xenabledif = 2;
 127 #endif
 128 module_param(ql2xenabledif, int, S_IRUGO);
 129 MODULE_PARM_DESC(ql2xenabledif,
 130                 " Enable T10-CRC-DIF:\n"
 131                 " Default is 2.\n"
 132                 "  0 -- No DIF Support\n"
 133                 "  1 -- Enable DIF for all types\n"
 134                 "  2 -- Enable DIF for all types, except Type 0.\n");
 135
 136 #if (IS_ENABLED(CONFIG_NVME_FC))
 137 int ql2xnvmeenable = 1;
 138 #else
 139 int ql2xnvmeenable;
 140 #endif
 141 module_param(ql2xnvmeenable, int, 0644);
 142 MODULE_PARM_DESC(ql2xnvmeenable,
 143     "Enables NVME support. "
 144     "0 - no NVMe.  Default is Y");
 145
 146 int ql2xenablehba_err_chk = 2;
 147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 149                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 150                 " Default is 2.\n"
 151                 "  0 -- Error isolation disabled\n"
 152                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 153                 "  2 -- Error isolation enabled for all Types\n");
 154
 155 int ql2xiidmaenable=1;
 156 module_param(ql2xiidmaenable, int, S_IRUGO);
 157 MODULE_PARM_DESC(ql2xiidmaenable,
 158                 "Enables iIDMA settings "
 159                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 160
 161 int ql2xmqsupport = 1;
 162 module_param(ql2xmqsupport, int, S_IRUGO);
 163 MODULE_PARM_DESC(ql2xmqsupport,
 164                 "Enable on demand multiple queue pairs support "
 165                 "Default is 1 for supported. "
 166                 "Set it to 0 to turn off mq qpair support.");
 167
 168 int ql2xfwloadbin;
 169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 171 MODULE_PARM_DESC(ql2xfwloadbin,
 172                 "Option to specify location from which to load ISP firmware:.\n"
 173                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 174                 "      interface.\n"
 175                 " 1 -- load firmware from flash.\n"
 176                 " 0 -- use default semantics.\n");
 177
 178 int ql2xetsenable;
 179 module_param(ql2xetsenable, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xetsenable,
 181                 "Enables firmware ETS burst."
 182                 "Default is 0 - skip ETS enablement.");
 183
 184 int ql2xdbwr = 1;
 185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 186 MODULE_PARM_DESC(ql2xdbwr,
 187                 "Option to specify scheme for request queue posting.\n"
 188                 " 0 -- Regular doorbell.\n"
 189                 " 1 -- CAMRAM doorbell (faster).\n");
 190
 191 int ql2xtargetreset = 1;
 192 module_param(ql2xtargetreset, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xtargetreset,
 194                  "Enable target reset."
 195                  "Default is 1 - use hw defaults.");
 196
 197 int ql2xgffidenable;
 198 module_param(ql2xgffidenable, int, S_IRUGO);
 199 MODULE_PARM_DESC(ql2xgffidenable,
 200                 "Enables GFF_ID checks of port type. "
 201                 "Default is 0 - Do not use GFF_ID information.");
 202
 203 int ql2xasynctmfenable = 1;
 204 module_param(ql2xasynctmfenable, int, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xasynctmfenable,
 206                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 207                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 208
 209 int ql2xdontresethba;
 210 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 211 MODULE_PARM_DESC(ql2xdontresethba,
 212                 "Option to specify reset behaviour.\n"
 213                 " 0 (Default) -- Reset on failure.\n"
 214                 " 1 -- Do not reset on failure.\n");
 215
 216 uint64_t ql2xmaxlun = MAX_LUNS;
 217 module_param(ql2xmaxlun, ullong, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmaxlun,
 219                 "Defines the maximum LU number to register with the SCSI "
 220                 "midlayer. Default is 65535.");
 221
 222 int ql2xmdcapmask = 0x1F;
 223 module_param(ql2xmdcapmask, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xmdcapmask,
 225                 "Set the Minidump driver capture mask level. "
 226                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 227
 228 int ql2xmdenable = 1;
 229 module_param(ql2xmdenable, int, S_IRUGO);
 230 MODULE_PARM_DESC(ql2xmdenable,
 231                 "Enable/disable MiniDump. "
 232                 "0 - MiniDump disabled. "
 233                 "1 (Default) - MiniDump enabled.");
 234
 235 int ql2xexlogins = 0;
 236 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 237 MODULE_PARM_DESC(ql2xexlogins,
 238                  "Number of extended Logins. "
 239                  "0 (Default)- Disabled.");
 240
 241 int ql2xexchoffld = 1024;
 242 module_param(ql2xexchoffld, uint, 0644);
 243 MODULE_PARM_DESC(ql2xexchoffld,
 244         "Number of target exchanges.");
 245
 246 int ql2xiniexchg = 1024;
 247 module_param(ql2xiniexchg, uint, 0644);
 248 MODULE_PARM_DESC(ql2xiniexchg,
 249         "Number of initiator exchanges.");
 250
 251 int ql2xfwholdabts = 0;
 252 module_param(ql2xfwholdabts, int, S_IRUGO);
 253 MODULE_PARM_DESC(ql2xfwholdabts,
 254                 "Allow FW to hold status IOCB until ABTS rsp received. "
 255                 "0 (Default) Do not set fw option. "
 256                 "1 - Set fw option to hold ABTS.");
 257
 258 int ql2xmvasynctoatio = 1;
 259 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 260 MODULE_PARM_DESC(ql2xmvasynctoatio,
 261                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 262                 "0 (Default). Do not move IOCBs"
 263                 "1 - Move IOCBs.");
 264
 265 int ql2xautodetectsfp = 1;
 266 module_param(ql2xautodetectsfp, int, 0444);
 267 MODULE_PARM_DESC(ql2xautodetectsfp,
 268                  "Detect SFP range and set appropriate distance.\n"
 269                  "1 (Default): Enable\n");
 270
 271 int ql2xenablemsix = 1;
 272 module_param(ql2xenablemsix, int, 0444);
 273 MODULE_PARM_DESC(ql2xenablemsix,
 274                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 275                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 276                  " 0 -- enable traditional pin-based mechanism.\n"
 277                  " 1 -- enable MSI-X interrupt mechanism.\n"
 278                  " 2 -- enable MSI interrupt mechanism.\n");
 279
 280 int qla2xuseresexchforels;
 281 module_param(qla2xuseresexchforels, int, 0444);
 282 MODULE_PARM_DESC(qla2xuseresexchforels,
 283                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 284                  " 0 (default): disabled");
 285
 286 /*
 287  * SCSI host template entry points
 288  */
 289 static int qla2xxx_slave_configure(struct scsi_device * device);
 290 static int qla2xxx_slave_alloc(struct scsi_device *);
 291 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 292 static void qla2xxx_scan_start(struct Scsi_Host *);
 293 static void qla2xxx_slave_destroy(struct scsi_device *);
 294 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 295 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 296 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 297 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 298 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 299 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 300
 301 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 302 static void qla2x00_free_device(scsi_qla_host_t *);
 303 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 304 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 305
 306
 307 struct scsi_host_template qla2xxx_driver_template = {
 308         .module                 = THIS_MODULE,
 309         .name                   = QLA2XXX_DRIVER_NAME,
 310         .queuecommand           = qla2xxx_queuecommand,
 311
 312         .eh_timed_out           = fc_eh_timed_out,
 313         .eh_abort_handler       = qla2xxx_eh_abort,
 314         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 315         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 316         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 317         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 318
 319         .slave_configure        = qla2xxx_slave_configure,
 320
 321         .slave_alloc            = qla2xxx_slave_alloc,
 322         .slave_destroy          = qla2xxx_slave_destroy,
 323         .scan_finished          = qla2xxx_scan_finished,
 324         .scan_start             = qla2xxx_scan_start,
 325         .change_queue_depth     = scsi_change_queue_depth,
 326         .map_queues             = qla2xxx_map_queues,
 327         .this_id                = -1,
 328         .cmd_per_lun            = 3,
 329         .use_clustering         = ENABLE_CLUSTERING,
 330         .sg_tablesize           = SG_ALL,
 331
 332         .max_sectors            = 0xFFFF,
 333         .shost_attrs            = qla2x00_host_attrs,
 334
 335         .supported_mode         = MODE_INITIATOR,
 336         .track_queue_depth      = 1,
 337 };
 338
 339 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 340 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 341
 342 /* TODO Convert to inlines
 343  *
 344  * Timer routines
 345  */
 346
 347 __inline__ void
 348 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 349 {
 350         timer_setup(&vha->timer, qla2x00_timer, 0);
 351         vha->timer.expires = jiffies + interval * HZ;
 352         add_timer(&vha->timer);
 353         vha->timer_active = 1;
 354 }
 355
 356 static inline void
 357 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 358 {
 359         /* Currently used for 82XX only. */
 360         if (vha->device_flags & DFLG_DEV_FAILED) {
 361                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 362                     "Device in a failed state, returning.\n");
 363                 return;
 364         }
 365
 366         mod_timer(&vha->timer, jiffies + interval * HZ);
 367 }
 368
 369 static __inline__ void
 370 qla2x00_stop_timer(scsi_qla_host_t *vha)
 371 {
 372         del_timer_sync(&vha->timer);
 373         vha->timer_active = 0;
 374 }
 375
 376 static int qla2x00_do_dpc(void *data);
 377
 378 static void qla2x00_rst_aen(scsi_qla_host_t *);
 379
 380 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 381         struct req_que **, struct rsp_que **);
 382 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 383 static void qla2x00_mem_free(struct qla_hw_data *);
 384 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 385         struct qla_qpair *qpair);
 386
 387 /* -------------------------------------------------------------------------- */
 388 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 389     struct rsp_que *rsp)
 390 {
 391         struct qla_hw_data *ha = vha->hw;
 392         rsp->qpair = ha->base_qpair;
 393         rsp->req = req;
 394         ha->base_qpair->req = req;
 395         ha->base_qpair->rsp = rsp;
 396         ha->base_qpair->vha = vha;
 397         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 398         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 399         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 400         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 401         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 402         /* init qpair to this cpu. Will adjust at run time. */
 403         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 404         ha->base_qpair->pdev = ha->pdev;
 405
 406         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 407                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 408 }
 409
 410 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 411                                 struct rsp_que *rsp)
 412 {
 413         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 414         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 415                                 GFP_KERNEL);
 416         if (!ha->req_q_map) {
 417                 ql_log(ql_log_fatal, vha, 0x003b,
 418                     "Unable to allocate memory for request queue ptrs.\n");
 419                 goto fail_req_map;
 420         }
 421
 422         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 423                                 GFP_KERNEL);
 424         if (!ha->rsp_q_map) {
 425                 ql_log(ql_log_fatal, vha, 0x003c,
 426                     "Unable to allocate memory for response queue ptrs.\n");
 427                 goto fail_rsp_map;
 428         }
 429
 430         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 431         if (ha->base_qpair == NULL) {
 432                 ql_log(ql_log_warn, vha, 0x00e0,
 433                     "Failed to allocate base queue pair memory.\n");
 434                 goto fail_base_qpair;
 435         }
 436
 437         qla_init_base_qpair(vha, req, rsp);
 438
 439         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 440                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 441                         GFP_KERNEL);
 442                 if (!ha->queue_pair_map) {
 443                         ql_log(ql_log_fatal, vha, 0x0180,
 444                             "Unable to allocate memory for queue pair ptrs.\n");
 445                         goto fail_qpair_map;
 446                 }
 447         }
 448
 449         /*
 450          * Make sure we record at least the request and response queue zero in
 451          * case we need to free them if part of the probe fails.
 452          */
 453         ha->rsp_q_map[0] = rsp;
 454         ha->req_q_map[0] = req;
 455         set_bit(0, ha->rsp_qid_map);
 456         set_bit(0, ha->req_qid_map);
 457         return 0;
 458
 459 fail_qpair_map:
 460         kfree(ha->base_qpair);
 461         ha->base_qpair = NULL;
 462 fail_base_qpair:
 463         kfree(ha->rsp_q_map);
 464         ha->rsp_q_map = NULL;
 465 fail_rsp_map:
 466         kfree(ha->req_q_map);
 467         ha->req_q_map = NULL;
 468 fail_req_map:
 469         return -ENOMEM;
 470 }
 471
 472 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 473 {
 474         if (IS_QLAFX00(ha)) {
 475                 if (req && req->ring_fx00)
 476                         dma_free_coherent(&ha->pdev->dev,
 477                             (req->length_fx00 + 1) * sizeof(request_t),
 478                             req->ring_fx00, req->dma_fx00);
 479         } else if (req && req->ring)
 480                 dma_free_coherent(&ha->pdev->dev,
 481                 (req->length + 1) * sizeof(request_t),
 482                 req->ring, req->dma);
 483
 484         if (req)
 485                 kfree(req->outstanding_cmds);
 486
 487         kfree(req);
 488 }
 489
 490 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 491 {
 492         if (IS_QLAFX00(ha)) {
 493                 if (rsp && rsp->ring_fx00)
 494                         dma_free_coherent(&ha->pdev->dev,
 495                             (rsp->length_fx00 + 1) * sizeof(request_t),
 496                             rsp->ring_fx00, rsp->dma_fx00);
 497         } else if (rsp && rsp->ring) {
 498                 dma_free_coherent(&ha->pdev->dev,
 499                 (rsp->length + 1) * sizeof(response_t),
 500                 rsp->ring, rsp->dma);
 501         }
 502         kfree(rsp);
 503 }
 504
 505 static void qla2x00_free_queues(struct qla_hw_data *ha)
 506 {
 507         struct req_que *req;
 508         struct rsp_que *rsp;
 509         int cnt;
 510         unsigned long flags;
 511
 512         if (ha->queue_pair_map) {
 513                 kfree(ha->queue_pair_map);
 514                 ha->queue_pair_map = NULL;
 515         }
 516         if (ha->base_qpair) {
 517                 kfree(ha->base_qpair);
 518                 ha->base_qpair = NULL;
 519         }
 520
 521         spin_lock_irqsave(&ha->hardware_lock, flags);
 522         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 523                 if (!test_bit(cnt, ha->req_qid_map))
 524                         continue;
 525
 526                 req = ha->req_q_map[cnt];
 527                 clear_bit(cnt, ha->req_qid_map);
 528                 ha->req_q_map[cnt] = NULL;
 529
 530                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 531                 qla2x00_free_req_que(ha, req);
 532                 spin_lock_irqsave(&ha->hardware_lock, flags);
 533         }
 534         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 535
 536         kfree(ha->req_q_map);
 537         ha->req_q_map = NULL;
 538
 539
 540         spin_lock_irqsave(&ha->hardware_lock, flags);
 541         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 542                 if (!test_bit(cnt, ha->rsp_qid_map))
 543                         continue;
 544
 545                 rsp = ha->rsp_q_map[cnt];
 546                 clear_bit(cnt, ha->rsp_qid_map);
 547                 ha->rsp_q_map[cnt] =  NULL;
 548                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 549                 qla2x00_free_rsp_que(ha, rsp);
 550                 spin_lock_irqsave(&ha->hardware_lock, flags);
 551         }
 552         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 553
 554         kfree(ha->rsp_q_map);
 555         ha->rsp_q_map = NULL;
 556 }
 557
 558 static char *
 559 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 560 {
 561         struct qla_hw_data *ha = vha->hw;
 562         static char *pci_bus_modes[] = {
 563                 "33", "66", "100", "133",
 564         };
 565         uint16_t pci_bus;
 566
 567         strcpy(str, "PCI");
 568         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 569         if (pci_bus) {
 570                 strcat(str, "-X (");
 571                 strcat(str, pci_bus_modes[pci_bus]);
 572         } else {
 573                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 574                 strcat(str, " (");
 575                 strcat(str, pci_bus_modes[pci_bus]);
 576         }
 577         strcat(str, " MHz)");
 578
 579         return (str);
 580 }
 581
 582 static char *
 583 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 584 {
 585         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 586         struct qla_hw_data *ha = vha->hw;
 587         uint32_t pci_bus;
 588
 589         if (pci_is_pcie(ha->pdev)) {
 590                 char lwstr[6];
 591                 uint32_t lstat, lspeed, lwidth;
 592
 593                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 594                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 595                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 596
 597                 strcpy(str, "PCIe (");
 598                 switch (lspeed) {
 599                 case 1:
 600                         strcat(str, "2.5GT/s ");
 601                         break;
 602                 case 2:
 603                         strcat(str, "5.0GT/s ");
 604                         break;
 605                 case 3:
 606                         strcat(str, "8.0GT/s ");
 607                         break;
 608                 default:
 609                         strcat(str, "<unknown> ");
 610                         break;
 611                 }
 612                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 613                 strcat(str, lwstr);
 614
 615                 return str;
 616         }
 617
 618         strcpy(str, "PCI");
 619         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 620         if (pci_bus == 0 || pci_bus == 8) {
 621                 strcat(str, " (");
 622                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 623         } else {
 624                 strcat(str, "-X ");
 625                 if (pci_bus & BIT_2)
 626                         strcat(str, "Mode 2");
 627                 else
 628                         strcat(str, "Mode 1");
 629                 strcat(str, " (");
 630                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 631         }
 632         strcat(str, " MHz)");
 633
 634         return str;
 635 }
 636
 637 static char *
 638 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 639 {
 640         char un_str[10];
 641         struct qla_hw_data *ha = vha->hw;
 642
 643         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 644             ha->fw_minor_version, ha->fw_subminor_version);
 645
 646         if (ha->fw_attributes & BIT_9) {
 647                 strcat(str, "FLX");
 648                 return (str);
 649         }
 650
 651         switch (ha->fw_attributes & 0xFF) {
 652         case 0x7:
 653                 strcat(str, "EF");
 654                 break;
 655         case 0x17:
 656                 strcat(str, "TP");
 657                 break;
 658         case 0x37:
 659                 strcat(str, "IP");
 660                 break;
 661         case 0x77:
 662                 strcat(str, "VI");
 663                 break;
 664         default:
 665                 sprintf(un_str, "(%x)", ha->fw_attributes);
 666                 strcat(str, un_str);
 667                 break;
 668         }
 669         if (ha->fw_attributes & 0x100)
 670                 strcat(str, "X");
 671
 672         return (str);
 673 }
 674
 675 static char *
 676 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 677 {
 678         struct qla_hw_data *ha = vha->hw;
 679
 680         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 681             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 682         return str;
 683 }
 684
 685 void
 686 qla2x00_sp_free_dma(void *ptr)
 687 {
 688         srb_t *sp = ptr;
 689         struct qla_hw_data *ha = sp->vha->hw;
 690         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 691         void *ctx = GET_CMD_CTX_SP(sp);
 692
 693         if (sp->flags & SRB_DMA_VALID) {
 694                 scsi_dma_unmap(cmd);
 695                 sp->flags &= ~SRB_DMA_VALID;
 696         }
 697
 698         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 699                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 700                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 701                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 702         }
 703
 704         if (!ctx)
 705                 goto end;
 706
 707         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 708                 /* List assured to be having elements */
 709                 qla2x00_clean_dsd_pool(ha, ctx);
 710                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 711         }
 712
 713         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 714                 struct crc_context *ctx0 = ctx;
 715
 716                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 717                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 718         }
 719
 720         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 721                 struct ct6_dsd *ctx1 = ctx;
 722
 723                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 724                     ctx1->fcp_cmnd_dma);
 725                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 726                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 727                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 728                 mempool_free(ctx1, ha->ctx_mempool);
 729         }
 730
 731 end:
 732         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 733                 CMD_SP(cmd) = NULL;
 734                 qla2x00_rel_sp(sp);
 735         }
 736 }
 737
 738 void
 739 qla2x00_sp_compl(void *ptr, int res)
 740 {
 741         srb_t *sp = ptr;
 742         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 743
 744         cmd->result = res;
 745
 746         if (atomic_read(&sp->ref_count) == 0) {
 747                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 748                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 749                     sp, GET_CMD_SP(sp));
 750                 if (ql2xextended_error_logging & ql_dbg_io)
 751                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 752                 return;
 753         }
 754         if (!atomic_dec_and_test(&sp->ref_count))
 755                 return;
 756
 757         sp->free(sp);
 758         cmd->scsi_done(cmd);
 759 }
 760
 761 void
 762 qla2xxx_qpair_sp_free_dma(void *ptr)
 763 {
 764         srb_t *sp = (srb_t *)ptr;
 765         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 766         struct qla_hw_data *ha = sp->fcport->vha->hw;
 767         void *ctx = GET_CMD_CTX_SP(sp);
 768
 769         if (sp->flags & SRB_DMA_VALID) {
 770                 scsi_dma_unmap(cmd);
 771                 sp->flags &= ~SRB_DMA_VALID;
 772         }
 773
 774         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 775                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 776                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 777                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 778         }
 779
 780         if (!ctx)
 781                 goto end;
 782
 783         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 784                 /* List assured to be having elements */
 785                 qla2x00_clean_dsd_pool(ha, ctx);
 786                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 787         }
 788
 789         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 790                 struct crc_context *ctx0 = ctx;
 791
 792                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 793                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 794         }
 795
 796         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 797                 struct ct6_dsd *ctx1 = ctx;
 798                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 799                     ctx1->fcp_cmnd_dma);
 800                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 801                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 802                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 803                 mempool_free(ctx1, ha->ctx_mempool);
 804         }
 805 end:
 806         CMD_SP(cmd) = NULL;
 807         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 808 }
 809
 810 void
 811 qla2xxx_qpair_sp_compl(void *ptr, int res)
 812 {
 813         srb_t *sp = ptr;
 814         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 815
 816         cmd->result = res;
 817
 818         if (atomic_read(&sp->ref_count) == 0) {
 819                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 820                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 821                     sp, GET_CMD_SP(sp));
 822                 if (ql2xextended_error_logging & ql_dbg_io)
 823                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 824                 return;
 825         }
 826         if (!atomic_dec_and_test(&sp->ref_count))
 827                 return;
 828
 829         sp->free(sp);
 830         cmd->scsi_done(cmd);
 831 }
 832
 833 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 834  * does not have the changes necessary to avoid taking host->host_lock.
 835  */
 836 static int
 837 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 838 {
 839         scsi_qla_host_t *vha = shost_priv(host);
 840         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 841         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 842         struct qla_hw_data *ha = vha->hw;
 843         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 844         srb_t *sp;
 845         int rval;
 846         struct qla_qpair *qpair = NULL;
 847         uint32_t tag;
 848         uint16_t hwq;
 849
 850         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 851                 cmd->result = DID_NO_CONNECT << 16;
 852                 goto qc24_fail_command;
 853         }
 854
 855         if (ha->mqenable) {
 856                 if (shost_use_blk_mq(vha->host)) {
 857                         tag = blk_mq_unique_tag(cmd->request);
 858                         hwq = blk_mq_unique_tag_to_hwq(tag);
 859                         qpair = ha->queue_pair_map[hwq];
 860                 } else if (vha->vp_idx && vha->qpair) {
 861                         qpair = vha->qpair;
 862                 }
 863
 864                 if (qpair)
 865                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 866         }
 867
 868         if (ha->flags.eeh_busy) {
 869                 if (ha->flags.pci_channel_io_perm_failure) {
 870                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 871                             "PCI Channel IO permanent failure, exiting "
 872                             "cmd=%p.\n", cmd);
 873                         cmd->result = DID_NO_CONNECT << 16;
 874                 } else {
 875                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 876                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 877                         cmd->result = DID_REQUEUE << 16;
 878                 }
 879                 goto qc24_fail_command;
 880         }
 881
 882         rval = fc_remote_port_chkready(rport);
 883         if (rval) {
 884                 cmd->result = rval;
 885                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 886                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 887                     cmd, rval);
 888                 goto qc24_fail_command;
 889         }
 890
 891         if (!vha->flags.difdix_supported &&
 892                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 893                         ql_dbg(ql_dbg_io, vha, 0x3004,
 894                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 895                             cmd);
 896                         cmd->result = DID_NO_CONNECT << 16;
 897                         goto qc24_fail_command;
 898         }
 899
 900         if (!fcport) {
 901                 cmd->result = DID_NO_CONNECT << 16;
 902                 goto qc24_fail_command;
 903         }
 904
 905         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 906                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 907                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 908                         ql_dbg(ql_dbg_io, vha, 0x3005,
 909                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 910                             atomic_read(&fcport->state),
 911                             atomic_read(&base_vha->loop_state));
 912                         cmd->result = DID_NO_CONNECT << 16;
 913                         goto qc24_fail_command;
 914                 }
 915                 goto qc24_target_busy;
 916         }
 917
 918         /*
 919          * Return target busy if we've received a non-zero retry_delay_timer
 920          * in a FCP_RSP.
 921          */
 922         if (fcport->retry_delay_timestamp == 0) {
 923                 /* retry delay not set */
 924         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 925                 fcport->retry_delay_timestamp = 0;
 926         else
 927                 goto qc24_target_busy;
 928
 929         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 930         if (!sp)
 931                 goto qc24_host_busy;
 932
 933         sp->u.scmd.cmd = cmd;
 934         sp->type = SRB_SCSI_CMD;
 935         atomic_set(&sp->ref_count, 1);
 936         CMD_SP(cmd) = (void *)sp;
 937         sp->free = qla2x00_sp_free_dma;
 938         sp->done = qla2x00_sp_compl;
 939
 940         rval = ha->isp_ops->start_scsi(sp);
 941         if (rval != QLA_SUCCESS) {
 942                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 943                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 944                 goto qc24_host_busy_free_sp;
 945         }
 946
 947         return 0;
 948
 949 qc24_host_busy_free_sp:
 950         sp->free(sp);
 951
 952 qc24_host_busy:
 953         return SCSI_MLQUEUE_HOST_BUSY;
 954
 955 qc24_target_busy:
 956         return SCSI_MLQUEUE_TARGET_BUSY;
 957
 958 qc24_fail_command:
 959         cmd->scsi_done(cmd);
 960
 961         return 0;
 962 }
 963
 964 /* For MQ supported I/O */
 965 int
 966 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 967     struct qla_qpair *qpair)
 968 {
 969         scsi_qla_host_t *vha = shost_priv(host);
 970         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 971         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 972         struct qla_hw_data *ha = vha->hw;
 973         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 974         srb_t *sp;
 975         int rval;
 976
 977         rval = fc_remote_port_chkready(rport);
 978         if (rval) {
 979                 cmd->result = rval;
 980                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 981                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 982                     cmd, rval);
 983                 goto qc24_fail_command;
 984         }
 985
 986         if (!fcport) {
 987                 cmd->result = DID_NO_CONNECT << 16;
 988                 goto qc24_fail_command;
 989         }
 990
 991         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 992                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 993                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 994                         ql_dbg(ql_dbg_io, vha, 0x3077,
 995                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 996                             atomic_read(&fcport->state),
 997                             atomic_read(&base_vha->loop_state));
 998                         cmd->result = DID_NO_CONNECT << 16;
 999                         goto qc24_fail_command;
1000                 }
1001                 goto qc24_target_busy;
1002         }
1003
1004         /*
1005          * Return target busy if we've received a non-zero retry_delay_timer
1006          * in a FCP_RSP.
1007          */
1008         if (fcport->retry_delay_timestamp == 0) {
1009                 /* retry delay not set */
1010         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1011                 fcport->retry_delay_timestamp = 0;
1012         else
1013                 goto qc24_target_busy;
1014
1015         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1016         if (!sp)
1017                 goto qc24_host_busy;
1018
1019         sp->u.scmd.cmd = cmd;
1020         sp->type = SRB_SCSI_CMD;
1021         atomic_set(&sp->ref_count, 1);
1022         CMD_SP(cmd) = (void *)sp;
1023         sp->free = qla2xxx_qpair_sp_free_dma;
1024         sp->done = qla2xxx_qpair_sp_compl;
1025         sp->qpair = qpair;
1026
1027         rval = ha->isp_ops->start_scsi_mq(sp);
1028         if (rval != QLA_SUCCESS) {
1029                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1030                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1031                 goto qc24_host_busy_free_sp;
1032         }
1033
1034         return 0;
1035
1036 qc24_host_busy_free_sp:
1037         sp->free(sp);
1038
1039 qc24_host_busy:
1040         return SCSI_MLQUEUE_HOST_BUSY;
1041
1042 qc24_target_busy:
1043         return SCSI_MLQUEUE_TARGET_BUSY;
1044
1045 qc24_fail_command:
1046         cmd->scsi_done(cmd);
1047
1048         return 0;
1049 }
1050
1051 /*
1052  * qla2x00_eh_wait_on_command
1053  *    Waits for the command to be returned by the Firmware for some
1054  *    max time.
1055  *
1056  * Input:
1057  *    cmd = Scsi Command to wait on.
1058  *
1059  * Return:
1060  *    Not Found : 0
1061  *    Found : 1
1062  */
1063 static int
1064 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1065 {
1066 #define ABORT_POLLING_PERIOD    1000
1067 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1068         unsigned long wait_iter = ABORT_WAIT_ITER;
1069         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1070         struct qla_hw_data *ha = vha->hw;
1071         int ret = QLA_SUCCESS;
1072
1073         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1074                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1075                     "Return:eh_wait.\n");
1076                 return ret;
1077         }
1078
1079         while (CMD_SP(cmd) && wait_iter--) {
1080                 msleep(ABORT_POLLING_PERIOD);
1081         }
1082         if (CMD_SP(cmd))
1083                 ret = QLA_FUNCTION_FAILED;
1084
1085         return ret;
1086 }
1087
1088 /*
1089  * qla2x00_wait_for_hba_online
1090  *    Wait till the HBA is online after going through
1091  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1092  *    finally HBA is disabled ie marked offline
1093  *
1094  * Input:
1095  *     ha - pointer to host adapter structure
1096  *
1097  * Note:
1098  *    Does context switching-Release SPIN_LOCK
1099  *    (if any) before calling this routine.
1100  *
1101  * Return:
1102  *    Success (Adapter is online) : 0
1103  *    Failed  (Adapter is offline/disabled) : 1
1104  */
1105 int
1106 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1107 {
1108         int             return_status;
1109         unsigned long   wait_online;
1110         struct qla_hw_data *ha = vha->hw;
1111         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1112
1113         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1114         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1115             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1116             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1117             ha->dpc_active) && time_before(jiffies, wait_online)) {
1118
1119                 msleep(1000);
1120         }
1121         if (base_vha->flags.online)
1122                 return_status = QLA_SUCCESS;
1123         else
1124                 return_status = QLA_FUNCTION_FAILED;
1125
1126         return (return_status);
1127 }
1128
1129 static inline int test_fcport_count(scsi_qla_host_t *vha)
1130 {
1131         struct qla_hw_data *ha = vha->hw;
1132         unsigned long flags;
1133         int res;
1134
1135         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1136         ql_dbg(ql_dbg_init, vha, 0x00ec,
1137             "tgt %p, fcport_count=%d\n",
1138             vha, vha->fcport_count);
1139         res = (vha->fcport_count == 0);
1140         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1141
1142         return res;
1143 }
1144
1145 /*
1146  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1147  * it has dependency on UNLOADING flag to stop device discovery
1148  */
1149 void
1150 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1151 {
1152         qla2x00_mark_all_devices_lost(vha, 0);
1153
1154         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1155 }
1156
1157 /*
1158  * qla2x00_wait_for_hba_ready
1159  * Wait till the HBA is ready before doing driver unload
1160  *
1161  * Input:
1162  *     ha - pointer to host adapter structure
1163  *
1164  * Note:
1165  *    Does context switching-Release SPIN_LOCK
1166  *    (if any) before calling this routine.
1167  *
1168  */
1169 static void
1170 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1171 {
1172         struct qla_hw_data *ha = vha->hw;
1173         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1174
1175         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1176                 ha->flags.mbox_busy) ||
1177                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1178                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1179                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1180                         break;
1181                 msleep(1000);
1182         }
1183 }
1184
1185 int
1186 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1187 {
1188         int             return_status;
1189         unsigned long   wait_reset;
1190         struct qla_hw_data *ha = vha->hw;
1191         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1192
1193         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1194         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1195             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1196             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1197             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1198
1199                 msleep(1000);
1200
1201                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1202                     ha->flags.chip_reset_done)
1203                         break;
1204         }
1205         if (ha->flags.chip_reset_done)
1206                 return_status = QLA_SUCCESS;
1207         else
1208                 return_status = QLA_FUNCTION_FAILED;
1209
1210         return return_status;
1211 }
1212
1213 static void
1214 sp_get(struct srb *sp)
1215 {
1216         atomic_inc(&sp->ref_count);
1217 }
1218
1219 #define ISP_REG_DISCONNECT 0xffffffffU
1220 /**************************************************************************
1221 * qla2x00_isp_reg_stat
1222 *
1223 * Description:
1224 *       Read the host status register of ISP before aborting the command.
1225 *
1226 * Input:
1227 *       ha = pointer to host adapter structure.
1228 *
1229 *
1230 * Returns:
1231 *       Either true or false.
1232 *
1233 * Note: Return true if there is register disconnect.
1234 **************************************************************************/
1235 static inline
1236 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1237 {
1238         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1239         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1240
1241         if (IS_P3P_TYPE(ha))
1242                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1243         else
1244                 return ((RD_REG_DWORD(&reg->host_status)) ==
1245                         ISP_REG_DISCONNECT);
1246 }
1247
1248 /**************************************************************************
1249 * qla2xxx_eh_abort
1250 *
1251 * Description:
1252 *    The abort function will abort the specified command.
1253 *
1254 * Input:
1255 *    cmd = Linux SCSI command packet to be aborted.
1256 *
1257 * Returns:
1258 *    Either SUCCESS or FAILED.
1259 *
1260 * Note:
1261 *    Only return FAILED if command not returned by firmware.
1262 **************************************************************************/
1263 static int
1264 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1265 {
1266         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1267         srb_t *sp;
1268         int ret;
1269         unsigned int id;
1270         uint64_t lun;
1271         unsigned long flags;
1272         int rval, wait = 0;
1273         struct qla_hw_data *ha = vha->hw;
1274
1275         if (qla2x00_isp_reg_stat(ha)) {
1276                 ql_log(ql_log_info, vha, 0x8042,
1277                     "PCI/Register disconnect, exiting.\n");
1278                 return FAILED;
1279         }
1280         if (!CMD_SP(cmd))
1281                 return SUCCESS;
1282
1283         ret = fc_block_scsi_eh(cmd);
1284         if (ret != 0)
1285                 return ret;
1286         ret = SUCCESS;
1287
1288         id = cmd->device->id;
1289         lun = cmd->device->lun;
1290
1291         spin_lock_irqsave(&ha->hardware_lock, flags);
1292         sp = (srb_t *) CMD_SP(cmd);
1293         if (!sp) {
1294                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1295                 return SUCCESS;
1296         }
1297
1298         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1299             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1300             vha->host_no, id, lun, sp, cmd, sp->handle);
1301
1302         /* Get a reference to the sp and drop the lock.*/
1303         sp_get(sp);
1304
1305         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1306         rval = ha->isp_ops->abort_command(sp);
1307         if (rval) {
1308                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1309                         ret = SUCCESS;
1310                 else
1311                         ret = FAILED;
1312
1313                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1314                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1315         } else {
1316                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1317                     "Abort command mbx success cmd=%p.\n", cmd);
1318                 wait = 1;
1319         }
1320
1321         spin_lock_irqsave(&ha->hardware_lock, flags);
1322         sp->done(sp, 0);
1323         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1324
1325         /* Did the command return during mailbox execution? */
1326         if (ret == FAILED && !CMD_SP(cmd))
1327                 ret = SUCCESS;
1328
1329         /* Wait for the command to be returned. */
1330         if (wait) {
1331                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1332                         ql_log(ql_log_warn, vha, 0x8006,
1333                             "Abort handler timed out cmd=%p.\n", cmd);
1334                         ret = FAILED;
1335                 }
1336         }
1337
1338         ql_log(ql_log_info, vha, 0x801c,
1339             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1340             vha->host_no, id, lun, wait, ret);
1341
1342         return ret;
1343 }
1344
1345 int
1346 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1347         uint64_t l, enum nexus_wait_type type)
1348 {
1349         int cnt, match, status;
1350         unsigned long flags;
1351         struct qla_hw_data *ha = vha->hw;
1352         struct req_que *req;
1353         srb_t *sp;
1354         struct scsi_cmnd *cmd;
1355
1356         status = QLA_SUCCESS;
1357
1358         spin_lock_irqsave(&ha->hardware_lock, flags);
1359         req = vha->req;
1360         for (cnt = 1; status == QLA_SUCCESS &&
1361                 cnt < req->num_outstanding_cmds; cnt++) {
1362                 sp = req->outstanding_cmds[cnt];
1363                 if (!sp)
1364                         continue;
1365                 if (sp->type != SRB_SCSI_CMD)
1366                         continue;
1367                 if (vha->vp_idx != sp->vha->vp_idx)
1368                         continue;
1369                 match = 0;
1370                 cmd = GET_CMD_SP(sp);
1371                 switch (type) {
1372                 case WAIT_HOST:
1373                         match = 1;
1374                         break;
1375                 case WAIT_TARGET:
1376                         match = cmd->device->id == t;
1377                         break;
1378                 case WAIT_LUN:
1379                         match = (cmd->device->id == t &&
1380                                 cmd->device->lun == l);
1381                         break;
1382                 }
1383                 if (!match)
1384                         continue;
1385
1386                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1387                 status = qla2x00_eh_wait_on_command(cmd);
1388                 spin_lock_irqsave(&ha->hardware_lock, flags);
1389         }
1390         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1391
1392         return status;
1393 }
1394
1395 static char *reset_errors[] = {
1396         "HBA not online",
1397         "HBA not ready",
1398         "Task management failed",
1399         "Waiting for command completions",
1400 };
1401
1402 static int
1403 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1404     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1405 {
1406         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1407         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1408         int err;
1409
1410         if (!fcport) {
1411                 return FAILED;
1412         }
1413
1414         err = fc_block_scsi_eh(cmd);
1415         if (err != 0)
1416                 return err;
1417
1418         ql_log(ql_log_info, vha, 0x8009,
1419             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1420             cmd->device->id, cmd->device->lun, cmd);
1421
1422         err = 0;
1423         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1424                 ql_log(ql_log_warn, vha, 0x800a,
1425                     "Wait for hba online failed for cmd=%p.\n", cmd);
1426                 goto eh_reset_failed;
1427         }
1428         err = 2;
1429         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1430                 != QLA_SUCCESS) {
1431                 ql_log(ql_log_warn, vha, 0x800c,
1432                     "do_reset failed for cmd=%p.\n", cmd);
1433                 goto eh_reset_failed;
1434         }
1435         err = 3;
1436         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1437             cmd->device->lun, type) != QLA_SUCCESS) {
1438                 ql_log(ql_log_warn, vha, 0x800d,
1439                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1440                 goto eh_reset_failed;
1441         }
1442
1443         ql_log(ql_log_info, vha, 0x800e,
1444             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1445             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1446
1447         return SUCCESS;
1448
1449 eh_reset_failed:
1450         ql_log(ql_log_info, vha, 0x800f,
1451             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1452             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1453             cmd);
1454         return FAILED;
1455 }
1456
1457 static int
1458 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1459 {
1460         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1461         struct qla_hw_data *ha = vha->hw;
1462
1463         if (qla2x00_isp_reg_stat(ha)) {
1464                 ql_log(ql_log_info, vha, 0x803e,
1465                     "PCI/Register disconnect, exiting.\n");
1466                 return FAILED;
1467         }
1468
1469         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1470             ha->isp_ops->lun_reset);
1471 }
1472
1473 static int
1474 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1475 {
1476         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1477         struct qla_hw_data *ha = vha->hw;
1478
1479         if (qla2x00_isp_reg_stat(ha)) {
1480                 ql_log(ql_log_info, vha, 0x803f,
1481                     "PCI/Register disconnect, exiting.\n");
1482                 return FAILED;
1483         }
1484
1485         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1486             ha->isp_ops->target_reset);
1487 }
1488
1489 /**************************************************************************
1490 * qla2xxx_eh_bus_reset
1491 *
1492 * Description:
1493 *    The bus reset function will reset the bus and abort any executing
1494 *    commands.
1495 *
1496 * Input:
1497 *    cmd = Linux SCSI command packet of the command that cause the
1498 *          bus reset.
1499 *
1500 * Returns:
1501 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1502 *
1503 **************************************************************************/
1504 static int
1505 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1506 {
1507         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1508         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1509         int ret = FAILED;
1510         unsigned int id;
1511         uint64_t lun;
1512         struct qla_hw_data *ha = vha->hw;
1513
1514         if (qla2x00_isp_reg_stat(ha)) {
1515                 ql_log(ql_log_info, vha, 0x8040,
1516                     "PCI/Register disconnect, exiting.\n");
1517                 return FAILED;
1518         }
1519
1520         id = cmd->device->id;
1521         lun = cmd->device->lun;
1522
1523         if (!fcport) {
1524                 return ret;
1525         }
1526
1527         ret = fc_block_scsi_eh(cmd);
1528         if (ret != 0)
1529                 return ret;
1530         ret = FAILED;
1531
1532         ql_log(ql_log_info, vha, 0x8012,
1533             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1534
1535         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1536                 ql_log(ql_log_fatal, vha, 0x8013,
1537                     "Wait for hba online failed board disabled.\n");
1538                 goto eh_bus_reset_done;
1539         }
1540
1541         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1542                 ret = SUCCESS;
1543
1544         if (ret == FAILED)
1545                 goto eh_bus_reset_done;
1546
1547         /* Flush outstanding commands. */
1548         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1549             QLA_SUCCESS) {
1550                 ql_log(ql_log_warn, vha, 0x8014,
1551                     "Wait for pending commands failed.\n");
1552                 ret = FAILED;
1553         }
1554
1555 eh_bus_reset_done:
1556         ql_log(ql_log_warn, vha, 0x802b,
1557             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1558             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1559
1560         return ret;
1561 }
1562
1563 /**************************************************************************
1564 * qla2xxx_eh_host_reset
1565 *
1566 * Description:
1567 *    The reset function will reset the Adapter.
1568 *
1569 * Input:
1570 *      cmd = Linux SCSI command packet of the command that cause the
1571 *            adapter reset.
1572 *
1573 * Returns:
1574 *      Either SUCCESS or FAILED.
1575 *
1576 * Note:
1577 **************************************************************************/
1578 static int
1579 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1580 {
1581         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1582         struct qla_hw_data *ha = vha->hw;
1583         int ret = FAILED;
1584         unsigned int id;
1585         uint64_t lun;
1586         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1587
1588         if (qla2x00_isp_reg_stat(ha)) {
1589                 ql_log(ql_log_info, vha, 0x8041,
1590                     "PCI/Register disconnect, exiting.\n");
1591                 schedule_work(&ha->board_disable);
1592                 return SUCCESS;
1593         }
1594
1595         id = cmd->device->id;
1596         lun = cmd->device->lun;
1597
1598         ql_log(ql_log_info, vha, 0x8018,
1599             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1600
1601         /*
1602          * No point in issuing another reset if one is active.  Also do not
1603          * attempt a reset if we are updating flash.
1604          */
1605         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1606                 goto eh_host_reset_lock;
1607
1608         if (vha != base_vha) {
1609                 if (qla2x00_vp_abort_isp(vha))
1610                         goto eh_host_reset_lock;
1611         } else {
1612                 if (IS_P3P_TYPE(vha->hw)) {
1613                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1614                                 /* Ctx reset success */
1615                                 ret = SUCCESS;
1616                                 goto eh_host_reset_lock;
1617                         }
1618                         /* fall thru if ctx reset failed */
1619                 }
1620                 if (ha->wq)
1621                         flush_workqueue(ha->wq);
1622
1623                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1624                 if (ha->isp_ops->abort_isp(base_vha)) {
1625                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1626                         /* failed. schedule dpc to try */
1627                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1628
1629                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1630                                 ql_log(ql_log_warn, vha, 0x802a,
1631                                     "wait for hba online failed.\n");
1632                                 goto eh_host_reset_lock;
1633                         }
1634                 }
1635                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1636         }
1637
1638         /* Waiting for command to be returned to OS.*/
1639         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1640                 QLA_SUCCESS)
1641                 ret = SUCCESS;
1642
1643 eh_host_reset_lock:
1644         ql_log(ql_log_info, vha, 0x8017,
1645             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1646             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1647
1648         return ret;
1649 }
1650
1651 /*
1652 * qla2x00_loop_reset
1653 *      Issue loop reset.
1654 *
1655 * Input:
1656 *      ha = adapter block pointer.
1657 *
1658 * Returns:
1659 *      0 = success
1660 */
1661 int
1662 qla2x00_loop_reset(scsi_qla_host_t *vha)
1663 {
1664         int ret;
1665         struct fc_port *fcport;
1666         struct qla_hw_data *ha = vha->hw;
1667
1668         if (IS_QLAFX00(ha)) {
1669                 return qlafx00_loop_reset(vha);
1670         }
1671
1672         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1673                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1674                         if (fcport->port_type != FCT_TARGET)
1675                                 continue;
1676
1677                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1678                         if (ret != QLA_SUCCESS) {
1679                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1680                                     "Bus Reset failed: Reset=%d "
1681                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1682                         }
1683                 }
1684         }
1685
1686
1687         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1688                 atomic_set(&vha->loop_state, LOOP_DOWN);
1689                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1690                 qla2x00_mark_all_devices_lost(vha, 0);
1691                 ret = qla2x00_full_login_lip(vha);
1692                 if (ret != QLA_SUCCESS) {
1693                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1694                             "full_login_lip=%d.\n", ret);
1695                 }
1696         }
1697
1698         if (ha->flags.enable_lip_reset) {
1699                 ret = qla2x00_lip_reset(vha);
1700                 if (ret != QLA_SUCCESS)
1701                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1702                             "lip_reset failed (%d).\n", ret);
1703         }
1704
1705         /* Issue marker command only when we are going to start the I/O */
1706         vha->marker_needed = 1;
1707
1708         return QLA_SUCCESS;
1709 }
1710
1711 static void
1712 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1713 {
1714         int cnt, status;
1715         unsigned long flags;
1716         srb_t *sp;
1717         scsi_qla_host_t *vha = qp->vha;
1718         struct qla_hw_data *ha = vha->hw;
1719         struct req_que *req;
1720         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1721         struct qla_tgt_cmd *cmd;
1722         uint8_t trace = 0;
1723
1724         if (!ha->req_q_map)
1725                 return;
1726         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1727         req = qp->req;
1728         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1729                 sp = req->outstanding_cmds[cnt];
1730                 if (sp) {
1731                         req->outstanding_cmds[cnt] = NULL;
1732                         if (sp->cmd_type == TYPE_SRB) {
1733                                 if (sp->type == SRB_NVME_CMD ||
1734                                     sp->type == SRB_NVME_LS) {
1735                                         sp_get(sp);
1736                                         spin_unlock_irqrestore(qp->qp_lock_ptr,
1737                                             flags);
1738                                         qla_nvme_abort(ha, sp, res);
1739                                         spin_lock_irqsave(qp->qp_lock_ptr,
1740                                             flags);
1741                                 } else if (GET_CMD_SP(sp) &&
1742                                     !ha->flags.eeh_busy &&
1743                                     (!test_bit(ABORT_ISP_ACTIVE,
1744                                         &vha->dpc_flags)) &&
1745                                     !qla2x00_isp_reg_stat(ha) &&
1746                                     (sp->type == SRB_SCSI_CMD)) {
1747                                         /*
1748                                          * Don't abort commands in
1749                                          * adapter during EEH
1750                                          * recovery as it's not
1751                                          * accessible/responding.
1752                                          *
1753                                          * Get a reference to the sp
1754                                          * and drop the lock. The
1755                                          * reference ensures this
1756                                          * sp->done() call and not the
1757                                          * call in qla2xxx_eh_abort()
1758                                          * ends the SCSI command (with
1759                                          * result 'res').
1760                                          */
1761                                         sp_get(sp);
1762                                         spin_unlock_irqrestore(qp->qp_lock_ptr,
1763                                             flags);
1764                                         status = qla2xxx_eh_abort(
1765                                             GET_CMD_SP(sp));
1766                                         spin_lock_irqsave(qp->qp_lock_ptr,
1767                                             flags);
1768                                         /*
1769                                          * Get rid of extra reference
1770                                          * if immediate exit from
1771                                          * ql2xxx_eh_abort
1772                                          */
1773                                         if (status == FAILED &&
1774                                             (qla2x00_isp_reg_stat(ha)))
1775                                                 atomic_dec(
1776                                                     &sp->ref_count);
1777                                 }
1778                                 sp->done(sp, res);
1779                         } else {
1780                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1781                                     qla_ini_mode_enabled(vha)) {
1782                                         if (!trace)
1783                                                 ql_dbg(ql_dbg_tgt_mgt,
1784                                                     vha, 0xf003,
1785                                                     "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1786                                                     vha->dpc_flags);
1787                                         continue;
1788                                 }
1789                                 cmd = (struct qla_tgt_cmd *)sp;
1790                                 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1791                         }
1792                 }
1793         }
1794         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1795 }
1796
1797 void
1798 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1799 {
1800         int que;
1801         struct qla_hw_data *ha = vha->hw;
1802
1803         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1804
1805         for (que = 0; que < ha->max_qpairs; que++) {
1806                 if (!ha->queue_pair_map[que])
1807                         continue;
1808
1809                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1810         }
1811 }
1812
1813 static int
1814 qla2xxx_slave_alloc(struct scsi_device *sdev)
1815 {
1816         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1817
1818         if (!rport || fc_remote_port_chkready(rport))
1819                 return -ENXIO;
1820
1821         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1822
1823         return 0;
1824 }
1825
1826 static int
1827 qla2xxx_slave_configure(struct scsi_device *sdev)
1828 {
1829         scsi_qla_host_t *vha = shost_priv(sdev->host);
1830         struct req_que *req = vha->req;
1831
1832         if (IS_T10_PI_CAPABLE(vha->hw))
1833                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1834
1835         scsi_change_queue_depth(sdev, req->max_q_depth);
1836         return 0;
1837 }
1838
1839 static void
1840 qla2xxx_slave_destroy(struct scsi_device *sdev)
1841 {
1842         sdev->hostdata = NULL;
1843 }
1844
1845 /**
1846  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1847  * @ha: HA context
1848  *
1849  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1850  * supported addressing method.
1851  */
1852 static void
1853 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1854 {
1855         /* Assume a 32bit DMA mask. */
1856         ha->flags.enable_64bit_addressing = 0;
1857
1858         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1859                 /* Any upper-dword bits set? */
1860                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1861                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1862                         /* Ok, a 64bit DMA mask is applicable. */
1863                         ha->flags.enable_64bit_addressing = 1;
1864                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1865                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1866                         return;
1867                 }
1868         }
1869
1870         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1871         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1872 }
1873
1874 static void
1875 qla2x00_enable_intrs(struct qla_hw_data *ha)
1876 {
1877         unsigned long flags = 0;
1878         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1879
1880         spin_lock_irqsave(&ha->hardware_lock, flags);
1881         ha->interrupts_on = 1;
1882         /* enable risc and host interrupts */
1883         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1884         RD_REG_WORD(&reg->ictrl);
1885         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1886
1887 }
1888
1889 static void
1890 qla2x00_disable_intrs(struct qla_hw_data *ha)
1891 {
1892         unsigned long flags = 0;
1893         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1894
1895         spin_lock_irqsave(&ha->hardware_lock, flags);
1896         ha->interrupts_on = 0;
1897         /* disable risc and host interrupts */
1898         WRT_REG_WORD(&reg->ictrl, 0);
1899         RD_REG_WORD(&reg->ictrl);
1900         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1901 }
1902
1903 static void
1904 qla24xx_enable_intrs(struct qla_hw_data *ha)
1905 {
1906         unsigned long flags = 0;
1907         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1908
1909         spin_lock_irqsave(&ha->hardware_lock, flags);
1910         ha->interrupts_on = 1;
1911         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1912         RD_REG_DWORD(&reg->ictrl);
1913         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1914 }
1915
1916 static void
1917 qla24xx_disable_intrs(struct qla_hw_data *ha)
1918 {
1919         unsigned long flags = 0;
1920         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1921
1922         if (IS_NOPOLLING_TYPE(ha))
1923                 return;
1924         spin_lock_irqsave(&ha->hardware_lock, flags);
1925         ha->interrupts_on = 0;
1926         WRT_REG_DWORD(&reg->ictrl, 0);
1927         RD_REG_DWORD(&reg->ictrl);
1928         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1929 }
1930
1931 static int
1932 qla2x00_iospace_config(struct qla_hw_data *ha)
1933 {
1934         resource_size_t pio;
1935         uint16_t msix;
1936
1937         if (pci_request_selected_regions(ha->pdev, ha->bars,
1938             QLA2XXX_DRIVER_NAME)) {
1939                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1940                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1941                     pci_name(ha->pdev));
1942                 goto iospace_error_exit;
1943         }
1944         if (!(ha->bars & 1))
1945                 goto skip_pio;
1946
1947         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1948         pio = pci_resource_start(ha->pdev, 0);
1949         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1950                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1951                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1952                             "Invalid pci I/O region size (%s).\n",
1953                             pci_name(ha->pdev));
1954                         pio = 0;
1955                 }
1956         } else {
1957                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1958                     "Region #0 no a PIO resource (%s).\n",
1959                     pci_name(ha->pdev));
1960                 pio = 0;
1961         }
1962         ha->pio_address = pio;
1963         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1964             "PIO address=%llu.\n",
1965             (unsigned long long)ha->pio_address);
1966
1967 skip_pio:
1968         /* Use MMIO operations for all accesses. */
1969         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1970                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1971                     "Region #1 not an MMIO resource (%s), aborting.\n",
1972                     pci_name(ha->pdev));
1973                 goto iospace_error_exit;
1974         }
1975         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1976                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1977                     "Invalid PCI mem region size (%s), aborting.\n",
1978                     pci_name(ha->pdev));
1979                 goto iospace_error_exit;
1980         }
1981
1982         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1983         if (!ha->iobase) {
1984                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1985                     "Cannot remap MMIO (%s), aborting.\n",
1986                     pci_name(ha->pdev));
1987                 goto iospace_error_exit;
1988         }
1989
1990         /* Determine queue resources */
1991         ha->max_req_queues = ha->max_rsp_queues = 1;
1992         ha->msix_count = QLA_BASE_VECTORS;
1993
1994         /* Check if FW supports MQ or not */
1995         if (!(ha->fw_attributes & BIT_6))
1996                 goto mqiobase_exit;
1997
1998         if (!ql2xmqsupport || !ql2xnvmeenable ||
1999             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2000                 goto mqiobase_exit;
2001
2002         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2003                         pci_resource_len(ha->pdev, 3));
2004         if (ha->mqiobase) {
2005                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2006                     "MQIO Base=%p.\n", ha->mqiobase);
2007                 /* Read MSIX vector size of the board */
2008                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2009                 ha->msix_count = msix + 1;
2010                 /* Max queues are bounded by available msix vectors */
2011                 /* MB interrupt uses 1 vector */
2012                 ha->max_req_queues = ha->msix_count - 1;
2013                 ha->max_rsp_queues = ha->max_req_queues;
2014                 /* Queue pairs is the max value minus the base queue pair */
2015                 ha->max_qpairs = ha->max_rsp_queues - 1;
2016                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2017                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2018
2019                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2020                     "MSI-X vector count: %d.\n", ha->msix_count);
2021         } else
2022                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2023                     "BAR 3 not enabled.\n");
2024
2025 mqiobase_exit:
2026         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2027             "MSIX Count: %d.\n", ha->msix_count);
2028         return (0);
2029
2030 iospace_error_exit:
2031         return (-ENOMEM);
2032 }
2033
2034
2035 static int
2036 qla83xx_iospace_config(struct qla_hw_data *ha)
2037 {
2038         uint16_t msix;
2039
2040         if (pci_request_selected_regions(ha->pdev, ha->bars,
2041             QLA2XXX_DRIVER_NAME)) {
2042                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2043                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2044                     pci_name(ha->pdev));
2045
2046                 goto iospace_error_exit;
2047         }
2048
2049         /* Use MMIO operations for all accesses. */
2050         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2051                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2052                     "Invalid pci I/O region size (%s).\n",
2053                     pci_name(ha->pdev));
2054                 goto iospace_error_exit;
2055         }
2056         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2057                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2058                     "Invalid PCI mem region size (%s), aborting\n",
2059                         pci_name(ha->pdev));
2060                 goto iospace_error_exit;
2061         }
2062
2063         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2064         if (!ha->iobase) {
2065                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2066                     "Cannot remap MMIO (%s), aborting.\n",
2067                     pci_name(ha->pdev));
2068                 goto iospace_error_exit;
2069         }
2070
2071         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2072         /* 83XX 26XX always use MQ type access for queues
2073          * - mbar 2, a.k.a region 4 */
2074         ha->max_req_queues = ha->max_rsp_queues = 1;
2075         ha->msix_count = QLA_BASE_VECTORS;
2076         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2077                         pci_resource_len(ha->pdev, 4));
2078
2079         if (!ha->mqiobase) {
2080                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2081                     "BAR2/region4 not enabled\n");
2082                 goto mqiobase_exit;
2083         }
2084
2085         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2086                         pci_resource_len(ha->pdev, 2));
2087         if (ha->msixbase) {
2088                 /* Read MSIX vector size of the board */
2089                 pci_read_config_word(ha->pdev,
2090                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2091                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2092                 /*
2093                  * By default, driver uses at least two msix vectors
2094                  * (default & rspq)
2095                  */
2096                 if (ql2xmqsupport || ql2xnvmeenable) {
2097                         /* MB interrupt uses 1 vector */
2098                         ha->max_req_queues = ha->msix_count - 1;
2099
2100                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2101                         if (QLA_TGT_MODE_ENABLED())
2102                                 ha->max_req_queues--;
2103
2104                         ha->max_rsp_queues = ha->max_req_queues;
2105
2106                         /* Queue pairs is the max value minus
2107                          * the base queue pair */
2108                         ha->max_qpairs = ha->max_req_queues - 1;
2109                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2110                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2111                 }
2112                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2113                     "MSI-X vector count: %d.\n", ha->msix_count);
2114         } else
2115                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2116                     "BAR 1 not enabled.\n");
2117
2118 mqiobase_exit:
2119         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2120             "MSIX Count: %d.\n", ha->msix_count);
2121         return 0;
2122
2123 iospace_error_exit:
2124         return -ENOMEM;
2125 }
2126
2127 static struct isp_operations qla2100_isp_ops = {
2128         .pci_config             = qla2100_pci_config,
2129         .reset_chip             = qla2x00_reset_chip,
2130         .chip_diag              = qla2x00_chip_diag,
2131         .config_rings           = qla2x00_config_rings,
2132         .reset_adapter          = qla2x00_reset_adapter,
2133         .nvram_config           = qla2x00_nvram_config,
2134         .update_fw_options      = qla2x00_update_fw_options,
2135         .load_risc              = qla2x00_load_risc,
2136         .pci_info_str           = qla2x00_pci_info_str,
2137         .fw_version_str         = qla2x00_fw_version_str,
2138         .intr_handler           = qla2100_intr_handler,
2139         .enable_intrs           = qla2x00_enable_intrs,
2140         .disable_intrs          = qla2x00_disable_intrs,
2141         .abort_command          = qla2x00_abort_command,
2142         .target_reset           = qla2x00_abort_target,
2143         .lun_reset              = qla2x00_lun_reset,
2144         .fabric_login           = qla2x00_login_fabric,
2145         .fabric_logout          = qla2x00_fabric_logout,
2146         .calc_req_entries       = qla2x00_calc_iocbs_32,
2147         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2148         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2149         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2150         .read_nvram             = qla2x00_read_nvram_data,
2151         .write_nvram            = qla2x00_write_nvram_data,
2152         .fw_dump                = qla2100_fw_dump,
2153         .beacon_on              = NULL,
2154         .beacon_off             = NULL,
2155         .beacon_blink           = NULL,
2156         .read_optrom            = qla2x00_read_optrom_data,
2157         .write_optrom           = qla2x00_write_optrom_data,
2158         .get_flash_version      = qla2x00_get_flash_version,
2159         .start_scsi             = qla2x00_start_scsi,
2160         .start_scsi_mq          = NULL,
2161         .abort_isp              = qla2x00_abort_isp,
2162         .iospace_config         = qla2x00_iospace_config,
2163         .initialize_adapter     = qla2x00_initialize_adapter,
2164 };
2165
2166 static struct isp_operations qla2300_isp_ops = {
2167         .pci_config             = qla2300_pci_config,
2168         .reset_chip             = qla2x00_reset_chip,
2169         .chip_diag              = qla2x00_chip_diag,
2170         .config_rings           = qla2x00_config_rings,
2171         .reset_adapter          = qla2x00_reset_adapter,
2172         .nvram_config           = qla2x00_nvram_config,
2173         .update_fw_options      = qla2x00_update_fw_options,
2174         .load_risc              = qla2x00_load_risc,
2175         .pci_info_str           = qla2x00_pci_info_str,
2176         .fw_version_str         = qla2x00_fw_version_str,
2177         .intr_handler           = qla2300_intr_handler,
2178         .enable_intrs           = qla2x00_enable_intrs,
2179         .disable_intrs          = qla2x00_disable_intrs,
2180         .abort_command          = qla2x00_abort_command,
2181         .target_reset           = qla2x00_abort_target,
2182         .lun_reset              = qla2x00_lun_reset,
2183         .fabric_login           = qla2x00_login_fabric,
2184         .fabric_logout          = qla2x00_fabric_logout,
2185         .calc_req_entries       = qla2x00_calc_iocbs_32,
2186         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2187         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2188         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2189         .read_nvram             = qla2x00_read_nvram_data,
2190         .write_nvram            = qla2x00_write_nvram_data,
2191         .fw_dump                = qla2300_fw_dump,
2192         .beacon_on              = qla2x00_beacon_on,
2193         .beacon_off             = qla2x00_beacon_off,
2194         .beacon_blink           = qla2x00_beacon_blink,
2195         .read_optrom            = qla2x00_read_optrom_data,
2196         .write_optrom           = qla2x00_write_optrom_data,
2197         .get_flash_version      = qla2x00_get_flash_version,
2198         .start_scsi             = qla2x00_start_scsi,
2199         .start_scsi_mq          = NULL,
2200         .abort_isp              = qla2x00_abort_isp,
2201         .iospace_config         = qla2x00_iospace_config,
2202         .initialize_adapter     = qla2x00_initialize_adapter,
2203 };
2204
2205 static struct isp_operations qla24xx_isp_ops = {
2206         .pci_config             = qla24xx_pci_config,
2207         .reset_chip             = qla24xx_reset_chip,
2208         .chip_diag              = qla24xx_chip_diag,
2209         .config_rings           = qla24xx_config_rings,
2210         .reset_adapter          = qla24xx_reset_adapter,
2211         .nvram_config           = qla24xx_nvram_config,
2212         .update_fw_options      = qla24xx_update_fw_options,
2213         .load_risc              = qla24xx_load_risc,
2214         .pci_info_str           = qla24xx_pci_info_str,
2215         .fw_version_str         = qla24xx_fw_version_str,
2216         .intr_handler           = qla24xx_intr_handler,
2217         .enable_intrs           = qla24xx_enable_intrs,
2218         .disable_intrs          = qla24xx_disable_intrs,
2219         .abort_command          = qla24xx_abort_command,
2220         .target_reset           = qla24xx_abort_target,
2221         .lun_reset              = qla24xx_lun_reset,
2222         .fabric_login           = qla24xx_login_fabric,
2223         .fabric_logout          = qla24xx_fabric_logout,
2224         .calc_req_entries       = NULL,
2225         .build_iocbs            = NULL,
2226         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2227         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2228         .read_nvram             = qla24xx_read_nvram_data,
2229         .write_nvram            = qla24xx_write_nvram_data,
2230         .fw_dump                = qla24xx_fw_dump,
2231         .beacon_on              = qla24xx_beacon_on,
2232         .beacon_off             = qla24xx_beacon_off,
2233         .beacon_blink           = qla24xx_beacon_blink,
2234         .read_optrom            = qla24xx_read_optrom_data,
2235         .write_optrom           = qla24xx_write_optrom_data,
2236         .get_flash_version      = qla24xx_get_flash_version,
2237         .start_scsi             = qla24xx_start_scsi,
2238         .start_scsi_mq          = NULL,
2239         .abort_isp              = qla2x00_abort_isp,
2240         .iospace_config         = qla2x00_iospace_config,
2241         .initialize_adapter     = qla2x00_initialize_adapter,
2242 };
2243
2244 static struct isp_operations qla25xx_isp_ops = {
2245         .pci_config             = qla25xx_pci_config,
2246         .reset_chip             = qla24xx_reset_chip,
2247         .chip_diag              = qla24xx_chip_diag,
2248         .config_rings           = qla24xx_config_rings,
2249         .reset_adapter          = qla24xx_reset_adapter,
2250         .nvram_config           = qla24xx_nvram_config,
2251         .update_fw_options      = qla24xx_update_fw_options,
2252         .load_risc              = qla24xx_load_risc,
2253         .pci_info_str           = qla24xx_pci_info_str,
2254         .fw_version_str         = qla24xx_fw_version_str,
2255         .intr_handler           = qla24xx_intr_handler,
2256         .enable_intrs           = qla24xx_enable_intrs,
2257         .disable_intrs          = qla24xx_disable_intrs,
2258         .abort_command          = qla24xx_abort_command,
2259         .target_reset           = qla24xx_abort_target,
2260         .lun_reset              = qla24xx_lun_reset,
2261         .fabric_login           = qla24xx_login_fabric,
2262         .fabric_logout          = qla24xx_fabric_logout,
2263         .calc_req_entries       = NULL,
2264         .build_iocbs            = NULL,
2265         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2266         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2267         .read_nvram             = qla25xx_read_nvram_data,
2268         .write_nvram            = qla25xx_write_nvram_data,
2269         .fw_dump                = qla25xx_fw_dump,
2270         .beacon_on              = qla24xx_beacon_on,
2271         .beacon_off             = qla24xx_beacon_off,
2272         .beacon_blink           = qla24xx_beacon_blink,
2273         .read_optrom            = qla25xx_read_optrom_data,
2274         .write_optrom           = qla24xx_write_optrom_data,
2275         .get_flash_version      = qla24xx_get_flash_version,
2276         .start_scsi             = qla24xx_dif_start_scsi,
2277         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2278         .abort_isp              = qla2x00_abort_isp,
2279         .iospace_config         = qla2x00_iospace_config,
2280         .initialize_adapter     = qla2x00_initialize_adapter,
2281 };
2282
2283 static struct isp_operations qla81xx_isp_ops = {
2284         .pci_config             = qla25xx_pci_config,
2285         .reset_chip             = qla24xx_reset_chip,
2286         .chip_diag              = qla24xx_chip_diag,
2287         .config_rings           = qla24xx_config_rings,
2288         .reset_adapter          = qla24xx_reset_adapter,
2289         .nvram_config           = qla81xx_nvram_config,
2290         .update_fw_options      = qla81xx_update_fw_options,
2291         .load_risc              = qla81xx_load_risc,
2292         .pci_info_str           = qla24xx_pci_info_str,
2293         .fw_version_str         = qla24xx_fw_version_str,
2294         .intr_handler           = qla24xx_intr_handler,
2295         .enable_intrs           = qla24xx_enable_intrs,
2296         .disable_intrs          = qla24xx_disable_intrs,
2297         .abort_command          = qla24xx_abort_command,
2298         .target_reset           = qla24xx_abort_target,
2299         .lun_reset              = qla24xx_lun_reset,
2300         .fabric_login           = qla24xx_login_fabric,
2301         .fabric_logout          = qla24xx_fabric_logout,
2302         .calc_req_entries       = NULL,
2303         .build_iocbs            = NULL,
2304         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2305         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2306         .read_nvram             = NULL,
2307         .write_nvram            = NULL,
2308         .fw_dump                = qla81xx_fw_dump,
2309         .beacon_on              = qla24xx_beacon_on,
2310         .beacon_off             = qla24xx_beacon_off,
2311         .beacon_blink           = qla83xx_beacon_blink,
2312         .read_optrom            = qla25xx_read_optrom_data,
2313         .write_optrom           = qla24xx_write_optrom_data,
2314         .get_flash_version      = qla24xx_get_flash_version,
2315         .start_scsi             = qla24xx_dif_start_scsi,
2316         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2317         .abort_isp              = qla2x00_abort_isp,
2318         .iospace_config         = qla2x00_iospace_config,
2319         .initialize_adapter     = qla2x00_initialize_adapter,
2320 };
2321
2322 static struct isp_operations qla82xx_isp_ops = {
2323         .pci_config             = qla82xx_pci_config,
2324         .reset_chip             = qla82xx_reset_chip,
2325         .chip_diag              = qla24xx_chip_diag,
2326         .config_rings           = qla82xx_config_rings,
2327         .reset_adapter          = qla24xx_reset_adapter,
2328         .nvram_config           = qla81xx_nvram_config,
2329         .update_fw_options      = qla24xx_update_fw_options,
2330         .load_risc              = qla82xx_load_risc,
2331         .pci_info_str           = qla24xx_pci_info_str,
2332         .fw_version_str         = qla24xx_fw_version_str,
2333         .intr_handler           = qla82xx_intr_handler,
2334         .enable_intrs           = qla82xx_enable_intrs,
2335         .disable_intrs          = qla82xx_disable_intrs,
2336         .abort_command          = qla24xx_abort_command,
2337         .target_reset           = qla24xx_abort_target,
2338         .lun_reset              = qla24xx_lun_reset,
2339         .fabric_login           = qla24xx_login_fabric,
2340         .fabric_logout          = qla24xx_fabric_logout,
2341         .calc_req_entries       = NULL,
2342         .build_iocbs            = NULL,
2343         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2344         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2345         .read_nvram             = qla24xx_read_nvram_data,
2346         .write_nvram            = qla24xx_write_nvram_data,
2347         .fw_dump                = qla82xx_fw_dump,
2348         .beacon_on              = qla82xx_beacon_on,
2349         .beacon_off             = qla82xx_beacon_off,
2350         .beacon_blink           = NULL,
2351         .read_optrom            = qla82xx_read_optrom_data,
2352         .write_optrom           = qla82xx_write_optrom_data,
2353         .get_flash_version      = qla82xx_get_flash_version,
2354         .start_scsi             = qla82xx_start_scsi,
2355         .start_scsi_mq          = NULL,
2356         .abort_isp              = qla82xx_abort_isp,
2357         .iospace_config         = qla82xx_iospace_config,
2358         .initialize_adapter     = qla2x00_initialize_adapter,
2359 };
2360
2361 static struct isp_operations qla8044_isp_ops = {
2362         .pci_config             = qla82xx_pci_config,
2363         .reset_chip             = qla82xx_reset_chip,
2364         .chip_diag              = qla24xx_chip_diag,
2365         .config_rings           = qla82xx_config_rings,
2366         .reset_adapter          = qla24xx_reset_adapter,
2367         .nvram_config           = qla81xx_nvram_config,
2368         .update_fw_options      = qla24xx_update_fw_options,
2369         .load_risc              = qla82xx_load_risc,
2370         .pci_info_str           = qla24xx_pci_info_str,
2371         .fw_version_str         = qla24xx_fw_version_str,
2372         .intr_handler           = qla8044_intr_handler,
2373         .enable_intrs           = qla82xx_enable_intrs,
2374         .disable_intrs          = qla82xx_disable_intrs,
2375         .abort_command          = qla24xx_abort_command,
2376         .target_reset           = qla24xx_abort_target,
2377         .lun_reset              = qla24xx_lun_reset,
2378         .fabric_login           = qla24xx_login_fabric,
2379         .fabric_logout          = qla24xx_fabric_logout,
2380         .calc_req_entries       = NULL,
2381         .build_iocbs            = NULL,
2382         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2383         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2384         .read_nvram             = NULL,
2385         .write_nvram            = NULL,
2386         .fw_dump                = qla8044_fw_dump,
2387         .beacon_on              = qla82xx_beacon_on,
2388         .beacon_off             = qla82xx_beacon_off,
2389         .beacon_blink           = NULL,
2390         .read_optrom            = qla8044_read_optrom_data,
2391         .write_optrom           = qla8044_write_optrom_data,
2392         .get_flash_version      = qla82xx_get_flash_version,
2393         .start_scsi             = qla82xx_start_scsi,
2394         .start_scsi_mq          = NULL,
2395         .abort_isp              = qla8044_abort_isp,
2396         .iospace_config         = qla82xx_iospace_config,
2397         .initialize_adapter     = qla2x00_initialize_adapter,
2398 };
2399
2400 static struct isp_operations qla83xx_isp_ops = {
2401         .pci_config             = qla25xx_pci_config,
2402         .reset_chip             = qla24xx_reset_chip,
2403         .chip_diag              = qla24xx_chip_diag,
2404         .config_rings           = qla24xx_config_rings,
2405         .reset_adapter          = qla24xx_reset_adapter,
2406         .nvram_config           = qla81xx_nvram_config,
2407         .update_fw_options      = qla81xx_update_fw_options,
2408         .load_risc              = qla81xx_load_risc,
2409         .pci_info_str           = qla24xx_pci_info_str,
2410         .fw_version_str         = qla24xx_fw_version_str,
2411         .intr_handler           = qla24xx_intr_handler,
2412         .enable_intrs           = qla24xx_enable_intrs,
2413         .disable_intrs          = qla24xx_disable_intrs,
2414         .abort_command          = qla24xx_abort_command,
2415         .target_reset           = qla24xx_abort_target,
2416         .lun_reset              = qla24xx_lun_reset,
2417         .fabric_login           = qla24xx_login_fabric,
2418         .fabric_logout          = qla24xx_fabric_logout,
2419         .calc_req_entries       = NULL,
2420         .build_iocbs            = NULL,
2421         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2422         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2423         .read_nvram             = NULL,
2424         .write_nvram            = NULL,
2425         .fw_dump                = qla83xx_fw_dump,
2426         .beacon_on              = qla24xx_beacon_on,
2427         .beacon_off             = qla24xx_beacon_off,
2428         .beacon_blink           = qla83xx_beacon_blink,
2429         .read_optrom            = qla25xx_read_optrom_data,
2430         .write_optrom           = qla24xx_write_optrom_data,
2431         .get_flash_version      = qla24xx_get_flash_version,
2432         .start_scsi             = qla24xx_dif_start_scsi,
2433         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2434         .abort_isp              = qla2x00_abort_isp,
2435         .iospace_config         = qla83xx_iospace_config,
2436         .initialize_adapter     = qla2x00_initialize_adapter,
2437 };
2438
2439 static struct isp_operations qlafx00_isp_ops = {
2440         .pci_config             = qlafx00_pci_config,
2441         .reset_chip             = qlafx00_soft_reset,
2442         .chip_diag              = qlafx00_chip_diag,
2443         .config_rings           = qlafx00_config_rings,
2444         .reset_adapter          = qlafx00_soft_reset,
2445         .nvram_config           = NULL,
2446         .update_fw_options      = NULL,
2447         .load_risc              = NULL,
2448         .pci_info_str           = qlafx00_pci_info_str,
2449         .fw_version_str         = qlafx00_fw_version_str,
2450         .intr_handler           = qlafx00_intr_handler,
2451         .enable_intrs           = qlafx00_enable_intrs,
2452         .disable_intrs          = qlafx00_disable_intrs,
2453         .abort_command          = qla24xx_async_abort_command,
2454         .target_reset           = qlafx00_abort_target,
2455         .lun_reset              = qlafx00_lun_reset,
2456         .fabric_login           = NULL,
2457         .fabric_logout          = NULL,
2458         .calc_req_entries       = NULL,
2459         .build_iocbs            = NULL,
2460         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2461         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2462         .read_nvram             = qla24xx_read_nvram_data,
2463         .write_nvram            = qla24xx_write_nvram_data,
2464         .fw_dump                = NULL,
2465         .beacon_on              = qla24xx_beacon_on,
2466         .beacon_off             = qla24xx_beacon_off,
2467         .beacon_blink           = NULL,
2468         .read_optrom            = qla24xx_read_optrom_data,
2469         .write_optrom           = qla24xx_write_optrom_data,
2470         .get_flash_version      = qla24xx_get_flash_version,
2471         .start_scsi             = qlafx00_start_scsi,
2472         .start_scsi_mq          = NULL,
2473         .abort_isp              = qlafx00_abort_isp,
2474         .iospace_config         = qlafx00_iospace_config,
2475         .initialize_adapter     = qlafx00_initialize_adapter,
2476 };
2477
2478 static struct isp_operations qla27xx_isp_ops = {
2479         .pci_config             = qla25xx_pci_config,
2480         .reset_chip             = qla24xx_reset_chip,
2481         .chip_diag              = qla24xx_chip_diag,
2482         .config_rings           = qla24xx_config_rings,
2483         .reset_adapter          = qla24xx_reset_adapter,
2484         .nvram_config           = qla81xx_nvram_config,
2485         .update_fw_options      = qla81xx_update_fw_options,
2486         .load_risc              = qla81xx_load_risc,
2487         .pci_info_str           = qla24xx_pci_info_str,
2488         .fw_version_str         = qla24xx_fw_version_str,
2489         .intr_handler           = qla24xx_intr_handler,
2490         .enable_intrs           = qla24xx_enable_intrs,
2491         .disable_intrs          = qla24xx_disable_intrs,
2492         .abort_command          = qla24xx_abort_command,
2493         .target_reset           = qla24xx_abort_target,
2494         .lun_reset              = qla24xx_lun_reset,
2495         .fabric_login           = qla24xx_login_fabric,
2496         .fabric_logout          = qla24xx_fabric_logout,
2497         .calc_req_entries       = NULL,
2498         .build_iocbs            = NULL,
2499         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2500         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2501         .read_nvram             = NULL,
2502         .write_nvram            = NULL,
2503         .fw_dump                = qla27xx_fwdump,
2504         .beacon_on              = qla24xx_beacon_on,
2505         .beacon_off             = qla24xx_beacon_off,
2506         .beacon_blink           = qla83xx_beacon_blink,
2507         .read_optrom            = qla25xx_read_optrom_data,
2508         .write_optrom           = qla24xx_write_optrom_data,
2509         .get_flash_version      = qla24xx_get_flash_version,
2510         .start_scsi             = qla24xx_dif_start_scsi,
2511         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2512         .abort_isp              = qla2x00_abort_isp,
2513         .iospace_config         = qla83xx_iospace_config,
2514         .initialize_adapter     = qla2x00_initialize_adapter,
2515 };
2516
2517 static inline void
2518 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2519 {
2520         ha->device_type = DT_EXTENDED_IDS;
2521         switch (ha->pdev->device) {
2522         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2523                 ha->isp_type |= DT_ISP2100;
2524                 ha->device_type &= ~DT_EXTENDED_IDS;
2525                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2526                 break;
2527         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2528                 ha->isp_type |= DT_ISP2200;
2529                 ha->device_type &= ~DT_EXTENDED_IDS;
2530                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2531                 break;
2532         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2533                 ha->isp_type |= DT_ISP2300;
2534                 ha->device_type |= DT_ZIO_SUPPORTED;
2535                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2536                 break;
2537         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2538                 ha->isp_type |= DT_ISP2312;
2539                 ha->device_type |= DT_ZIO_SUPPORTED;
2540                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2541                 break;
2542         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2543                 ha->isp_type |= DT_ISP2322;
2544                 ha->device_type |= DT_ZIO_SUPPORTED;
2545                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2546                     ha->pdev->subsystem_device == 0x0170)
2547                         ha->device_type |= DT_OEM_001;
2548                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2549                 break;
2550         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2551                 ha->isp_type |= DT_ISP6312;
2552                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2553                 break;
2554         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2555                 ha->isp_type |= DT_ISP6322;
2556                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2557                 break;
2558         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2559                 ha->isp_type |= DT_ISP2422;
2560                 ha->device_type |= DT_ZIO_SUPPORTED;
2561                 ha->device_type |= DT_FWI2;
2562                 ha->device_type |= DT_IIDMA;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2566                 ha->isp_type |= DT_ISP2432;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 ha->device_type |= DT_FWI2;
2569                 ha->device_type |= DT_IIDMA;
2570                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2571                 break;
2572         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2573                 ha->isp_type |= DT_ISP8432;
2574                 ha->device_type |= DT_ZIO_SUPPORTED;
2575                 ha->device_type |= DT_FWI2;
2576                 ha->device_type |= DT_IIDMA;
2577                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2578                 break;
2579         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2580                 ha->isp_type |= DT_ISP5422;
2581                 ha->device_type |= DT_FWI2;
2582                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2583                 break;
2584         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2585                 ha->isp_type |= DT_ISP5432;
2586                 ha->device_type |= DT_FWI2;
2587                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2588                 break;
2589         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2590                 ha->isp_type |= DT_ISP2532;
2591                 ha->device_type |= DT_ZIO_SUPPORTED;
2592                 ha->device_type |= DT_FWI2;
2593                 ha->device_type |= DT_IIDMA;
2594                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2595                 break;
2596         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2597                 ha->isp_type |= DT_ISP8001;
2598                 ha->device_type |= DT_ZIO_SUPPORTED;
2599                 ha->device_type |= DT_FWI2;
2600                 ha->device_type |= DT_IIDMA;
2601                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2602                 break;
2603         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2604                 ha->isp_type |= DT_ISP8021;
2605                 ha->device_type |= DT_ZIO_SUPPORTED;
2606                 ha->device_type |= DT_FWI2;
2607                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2608                 /* Initialize 82XX ISP flags */
2609                 qla82xx_init_flags(ha);
2610                 break;
2611          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2612                 ha->isp_type |= DT_ISP8044;
2613                 ha->device_type |= DT_ZIO_SUPPORTED;
2614                 ha->device_type |= DT_FWI2;
2615                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2616                 /* Initialize 82XX ISP flags */
2617                 qla82xx_init_flags(ha);
2618                 break;
2619         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2620                 ha->isp_type |= DT_ISP2031;
2621                 ha->device_type |= DT_ZIO_SUPPORTED;
2622                 ha->device_type |= DT_FWI2;
2623                 ha->device_type |= DT_IIDMA;
2624                 ha->device_type |= DT_T10_PI;
2625                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2626                 break;
2627         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2628                 ha->isp_type |= DT_ISP8031;
2629                 ha->device_type |= DT_ZIO_SUPPORTED;
2630                 ha->device_type |= DT_FWI2;
2631                 ha->device_type |= DT_IIDMA;
2632                 ha->device_type |= DT_T10_PI;
2633                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2634                 break;
2635         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2636                 ha->isp_type |= DT_ISPFX00;
2637                 break;
2638         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2639                 ha->isp_type |= DT_ISP2071;
2640                 ha->device_type |= DT_ZIO_SUPPORTED;
2641                 ha->device_type |= DT_FWI2;
2642                 ha->device_type |= DT_IIDMA;
2643                 ha->device_type |= DT_T10_PI;
2644                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2645                 break;
2646         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2647                 ha->isp_type |= DT_ISP2271;
2648                 ha->device_type |= DT_ZIO_SUPPORTED;
2649                 ha->device_type |= DT_FWI2;
2650                 ha->device_type |= DT_IIDMA;
2651                 ha->device_type |= DT_T10_PI;
2652                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2653                 break;
2654         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2655                 ha->isp_type |= DT_ISP2261;
2656                 ha->device_type |= DT_ZIO_SUPPORTED;
2657                 ha->device_type |= DT_FWI2;
2658                 ha->device_type |= DT_IIDMA;
2659                 ha->device_type |= DT_T10_PI;
2660                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2661                 break;
2662         }
2663
2664         if (IS_QLA82XX(ha))
2665                 ha->port_no = ha->portnum & 1;
2666         else {
2667                 /* Get adapter physical port no from interrupt pin register. */
2668                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2669                 if (IS_QLA27XX(ha))
2670                         ha->port_no--;
2671                 else
2672                         ha->port_no = !(ha->port_no & 1);
2673         }
2674
2675         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2676             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2677             ha->device_type, ha->port_no, ha->fw_srisc_address);
2678 }
2679
2680 static void
2681 qla2xxx_scan_start(struct Scsi_Host *shost)
2682 {
2683         scsi_qla_host_t *vha = shost_priv(shost);
2684
2685         if (vha->hw->flags.running_gold_fw)
2686                 return;
2687
2688         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2689         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2690         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2691         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2692 }
2693
2694 static int
2695 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2696 {
2697         scsi_qla_host_t *vha = shost_priv(shost);
2698
2699         if (test_bit(UNLOADING, &vha->dpc_flags))
2700                 return 1;
2701         if (!vha->host)
2702                 return 1;
2703         if (time > vha->hw->loop_reset_delay * HZ)
2704                 return 1;
2705
2706         return atomic_read(&vha->loop_state) == LOOP_READY;
2707 }
2708
2709 static void qla2x00_iocb_work_fn(struct work_struct *work)
2710 {
2711         struct scsi_qla_host *vha = container_of(work,
2712                 struct scsi_qla_host, iocb_work);
2713         struct qla_hw_data *ha = vha->hw;
2714         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2715         int i = 2;
2716         unsigned long flags;
2717
2718         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2719                 return;
2720
2721         while (!list_empty(&vha->work_list) && i > 0) {
2722                 qla2x00_do_work(vha);
2723                 i--;
2724         }
2725
2726         spin_lock_irqsave(&vha->work_lock, flags);
2727         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2728         spin_unlock_irqrestore(&vha->work_lock, flags);
2729 }
2730
2731 /*
2732  * PCI driver interface
2733  */
2734 static int
2735 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2736 {
2737         int     ret = -ENODEV;
2738         struct Scsi_Host *host;
2739         scsi_qla_host_t *base_vha = NULL;
2740         struct qla_hw_data *ha;
2741         char pci_info[30];
2742         char fw_str[30], wq_name[30];
2743         struct scsi_host_template *sht;
2744         int bars, mem_only = 0;
2745         uint16_t req_length = 0, rsp_length = 0;
2746         struct req_que *req = NULL;
2747         struct rsp_que *rsp = NULL;
2748         int i;
2749
2750         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2751         sht = &qla2xxx_driver_template;
2752         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2753             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2754             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2755             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2756             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2757             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2758             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2759             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2760             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2761             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2762             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2763             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2764             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2765             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2766             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2767                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2768                 mem_only = 1;
2769                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2770                     "Mem only adapter.\n");
2771         }
2772         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2773             "Bars=%d.\n", bars);
2774
2775         if (mem_only) {
2776                 if (pci_enable_device_mem(pdev))
2777                         return ret;
2778         } else {
2779                 if (pci_enable_device(pdev))
2780                         return ret;
2781         }
2782
2783         /* This may fail but that's ok */
2784         pci_enable_pcie_error_reporting(pdev);
2785
2786         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2787         if (!ha) {
2788                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2789                     "Unable to allocate memory for ha.\n");
2790                 goto disable_device;
2791         }
2792         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2793             "Memory allocated for ha=%p.\n", ha);
2794         ha->pdev = pdev;
2795         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2796         spin_lock_init(&ha->tgt.q_full_lock);
2797         spin_lock_init(&ha->tgt.sess_lock);
2798         spin_lock_init(&ha->tgt.atio_lock);
2799
2800         atomic_set(&ha->nvme_active_aen_cnt, 0);
2801
2802         /* Clear our data area */
2803         ha->bars = bars;
2804         ha->mem_only = mem_only;
2805         spin_lock_init(&ha->hardware_lock);
2806         spin_lock_init(&ha->vport_slock);
2807         mutex_init(&ha->selflogin_lock);
2808         mutex_init(&ha->optrom_mutex);
2809
2810         /* Set ISP-type information. */
2811         qla2x00_set_isp_flags(ha);
2812
2813         /* Set EEH reset type to fundamental if required by hba */
2814         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2815             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2816                 pdev->needs_freset = 1;
2817
2818         ha->prev_topology = 0;
2819         ha->init_cb_size = sizeof(init_cb_t);
2820         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2821         ha->optrom_size = OPTROM_SIZE_2300;
2822         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2823         atomic_set(&ha->num_pend_mbx_stage1, 0);
2824         atomic_set(&ha->num_pend_mbx_stage2, 0);
2825         atomic_set(&ha->num_pend_mbx_stage3, 0);
2826
2827         /* Assign ISP specific operations. */
2828         if (IS_QLA2100(ha)) {
2829                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2830                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2831                 req_length = REQUEST_ENTRY_CNT_2100;
2832                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2833                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2834                 ha->gid_list_info_size = 4;
2835                 ha->flash_conf_off = ~0;
2836                 ha->flash_data_off = ~0;
2837                 ha->nvram_conf_off = ~0;
2838                 ha->nvram_data_off = ~0;
2839                 ha->isp_ops = &qla2100_isp_ops;
2840         } else if (IS_QLA2200(ha)) {
2841                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2842                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2843                 req_length = REQUEST_ENTRY_CNT_2200;
2844                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2845                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2846                 ha->gid_list_info_size = 4;
2847                 ha->flash_conf_off = ~0;
2848                 ha->flash_data_off = ~0;
2849                 ha->nvram_conf_off = ~0;
2850                 ha->nvram_data_off = ~0;
2851                 ha->isp_ops = &qla2100_isp_ops;
2852         } else if (IS_QLA23XX(ha)) {
2853                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2854                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2855                 req_length = REQUEST_ENTRY_CNT_2200;
2856                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2857                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2858                 ha->gid_list_info_size = 6;
2859                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2860                         ha->optrom_size = OPTROM_SIZE_2322;
2861                 ha->flash_conf_off = ~0;
2862                 ha->flash_data_off = ~0;
2863                 ha->nvram_conf_off = ~0;
2864                 ha->nvram_data_off = ~0;
2865                 ha->isp_ops = &qla2300_isp_ops;
2866         } else if (IS_QLA24XX_TYPE(ha)) {
2867                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2868                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2869                 req_length = REQUEST_ENTRY_CNT_24XX;
2870                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2871                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2872                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2873                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2874                 ha->gid_list_info_size = 8;
2875                 ha->optrom_size = OPTROM_SIZE_24XX;
2876                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2877                 ha->isp_ops = &qla24xx_isp_ops;
2878                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2879                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2880                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2881                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2882         } else if (IS_QLA25XX(ha)) {
2883                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2884                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2885                 req_length = REQUEST_ENTRY_CNT_24XX;
2886                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2887                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2888                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2889                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2890                 ha->gid_list_info_size = 8;
2891                 ha->optrom_size = OPTROM_SIZE_25XX;
2892                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2893                 ha->isp_ops = &qla25xx_isp_ops;
2894                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2895                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2896                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2897                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2898         } else if (IS_QLA81XX(ha)) {
2899                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2900                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2901                 req_length = REQUEST_ENTRY_CNT_24XX;
2902                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2903                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2904                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2905                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2906                 ha->gid_list_info_size = 8;
2907                 ha->optrom_size = OPTROM_SIZE_81XX;
2908                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2909                 ha->isp_ops = &qla81xx_isp_ops;
2910                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2911                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2912                 ha->nvram_conf_off = ~0;
2913                 ha->nvram_data_off = ~0;
2914         } else if (IS_QLA82XX(ha)) {
2915                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2916                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2917                 req_length = REQUEST_ENTRY_CNT_82XX;
2918                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2919                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2920                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2921                 ha->gid_list_info_size = 8;
2922                 ha->optrom_size = OPTROM_SIZE_82XX;
2923                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2924                 ha->isp_ops = &qla82xx_isp_ops;
2925                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2926                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2927                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2928                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2929         } else if (IS_QLA8044(ha)) {
2930                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2931                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2932                 req_length = REQUEST_ENTRY_CNT_82XX;
2933                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2934                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2935                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2936                 ha->gid_list_info_size = 8;
2937                 ha->optrom_size = OPTROM_SIZE_83XX;
2938                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2939                 ha->isp_ops = &qla8044_isp_ops;
2940                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2941                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2942                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2943                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2944         } else if (IS_QLA83XX(ha)) {
2945                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2946                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2947                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2948                 req_length = REQUEST_ENTRY_CNT_83XX;
2949                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2950                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2951                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2952                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2953                 ha->gid_list_info_size = 8;
2954                 ha->optrom_size = OPTROM_SIZE_83XX;
2955                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2956                 ha->isp_ops = &qla83xx_isp_ops;
2957                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2958                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2959                 ha->nvram_conf_off = ~0;
2960                 ha->nvram_data_off = ~0;
2961         }  else if (IS_QLAFX00(ha)) {
2962                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2963                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2964                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2965                 req_length = REQUEST_ENTRY_CNT_FX00;
2966                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2967                 ha->isp_ops = &qlafx00_isp_ops;
2968                 ha->port_down_retry_count = 30; /* default value */
2969                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2970                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2971                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2972                 ha->mr.fw_hbt_en = 1;
2973                 ha->mr.host_info_resend = false;
2974                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2975         } else if (IS_QLA27XX(ha)) {
2976                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2977                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2978                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2979                 req_length = REQUEST_ENTRY_CNT_83XX;
2980                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2981                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2982                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2983                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2984                 ha->gid_list_info_size = 8;
2985                 ha->optrom_size = OPTROM_SIZE_83XX;
2986                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2987                 ha->isp_ops = &qla27xx_isp_ops;
2988                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2989                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2990                 ha->nvram_conf_off = ~0;
2991                 ha->nvram_data_off = ~0;
2992         }
2993
2994         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2995             "mbx_count=%d, req_length=%d, "
2996             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2997             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2998             "max_fibre_devices=%d.\n",
2999             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3000             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3001             ha->nvram_npiv_size, ha->max_fibre_devices);
3002         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3003             "isp_ops=%p, flash_conf_off=%d, "
3004             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3005             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3006             ha->nvram_conf_off, ha->nvram_data_off);
3007
3008         /* Configure PCI I/O space */
3009         ret = ha->isp_ops->iospace_config(ha);
3010         if (ret)
3011                 goto iospace_config_failed;
3012
3013         ql_log_pci(ql_log_info, pdev, 0x001d,
3014             "Found an ISP%04X irq %d iobase 0x%p.\n",
3015             pdev->device, pdev->irq, ha->iobase);
3016         mutex_init(&ha->vport_lock);
3017         mutex_init(&ha->mq_lock);
3018         init_completion(&ha->mbx_cmd_comp);
3019         complete(&ha->mbx_cmd_comp);
3020         init_completion(&ha->mbx_intr_comp);
3021         init_completion(&ha->dcbx_comp);
3022         init_completion(&ha->lb_portup_comp);
3023
3024         set_bit(0, (unsigned long *) ha->vp_idx_map);
3025
3026         qla2x00_config_dma_addressing(ha);
3027         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3028             "64 Bit addressing is %s.\n",
3029             ha->flags.enable_64bit_addressing ? "enable" :
3030             "disable");
3031         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3032         if (ret) {
3033                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3034                     "Failed to allocate memory for adapter, aborting.\n");
3035
3036                 goto probe_hw_failed;
3037         }
3038
3039         req->max_q_depth = MAX_Q_DEPTH;
3040         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3041                 req->max_q_depth = ql2xmaxqdepth;
3042
3043
3044         base_vha = qla2x00_create_host(sht, ha);
3045         if (!base_vha) {
3046                 ret = -ENOMEM;
3047                 goto probe_hw_failed;
3048         }
3049
3050         pci_set_drvdata(pdev, base_vha);
3051         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3052
3053         host = base_vha->host;
3054         base_vha->req = req;
3055         if (IS_QLA2XXX_MIDTYPE(ha))
3056                 base_vha->mgmt_svr_loop_id =
3057                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3058         else
3059                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3060                                                 base_vha->vp_idx;
3061
3062         /* Setup fcport template structure. */
3063         ha->mr.fcport.vha = base_vha;
3064         ha->mr.fcport.port_type = FCT_UNKNOWN;
3065         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3066         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3067         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3068         ha->mr.fcport.scan_state = 1;
3069
3070         /* Set the SG table size based on ISP type */
3071         if (!IS_FWI2_CAPABLE(ha)) {
3072                 if (IS_QLA2100(ha))
3073                         host->sg_tablesize = 32;
3074         } else {
3075                 if (!IS_QLA82XX(ha))
3076                         host->sg_tablesize = QLA_SG_ALL;
3077         }
3078         host->max_id = ha->max_fibre_devices;
3079         host->cmd_per_lun = 3;
3080         host->unique_id = host->host_no;
3081         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3082                 host->max_cmd_len = 32;
3083         else
3084                 host->max_cmd_len = MAX_CMDSZ;
3085         host->max_channel = MAX_BUSES - 1;
3086         /* Older HBAs support only 16-bit LUNs */
3087         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3088             ql2xmaxlun > 0xffff)
3089                 host->max_lun = 0xffff;
3090         else
3091                 host->max_lun = ql2xmaxlun;
3092         host->transportt = qla2xxx_transport_template;
3093         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3094
3095         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3096             "max_id=%d this_id=%d "
3097             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3098             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3099             host->this_id, host->cmd_per_lun, host->unique_id,
3100             host->max_cmd_len, host->max_channel, host->max_lun,
3101             host->transportt, sht->vendor_id);
3102
3103         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3104
3105         /* Set up the irqs */
3106         ret = qla2x00_request_irqs(ha, rsp);
3107         if (ret)
3108                 goto probe_failed;
3109
3110         /* Alloc arrays of request and response ring ptrs */
3111         ret = qla2x00_alloc_queues(ha, req, rsp);
3112         if (ret) {
3113                 ql_log(ql_log_fatal, base_vha, 0x003d,
3114                     "Failed to allocate memory for queue pointers..."
3115                     "aborting.\n");
3116                 goto probe_failed;
3117         }
3118
3119         if (ha->mqenable && shost_use_blk_mq(host)) {
3120                 /* number of hardware queues supported by blk/scsi-mq*/
3121                 host->nr_hw_queues = ha->max_qpairs;
3122
3123                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3124                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3125         } else {
3126                 if (ql2xnvmeenable) {
3127                         host->nr_hw_queues = ha->max_qpairs;
3128                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3129                             "FC-NVMe support is enabled, HW queues=%d\n",
3130                             host->nr_hw_queues);
3131                 } else {
3132                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3133                             "blk/scsi-mq disabled.\n");
3134                 }
3135         }
3136
3137         qlt_probe_one_stage1(base_vha, ha);
3138
3139         pci_save_state(pdev);
3140
3141         /* Assign back pointers */
3142         rsp->req = req;
3143         req->rsp = rsp;
3144
3145         if (IS_QLAFX00(ha)) {
3146                 ha->rsp_q_map[0] = rsp;
3147                 ha->req_q_map[0] = req;
3148                 set_bit(0, ha->req_qid_map);
3149                 set_bit(0, ha->rsp_qid_map);
3150         }
3151
3152         /* FWI2-capable only. */
3153         req->req_q_in = &ha->iobase->isp24.req_q_in;
3154         req->req_q_out = &ha->iobase->isp24.req_q_out;
3155         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3156         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3157         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3158                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3159                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3160                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3161                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3162         }
3163
3164         if (IS_QLAFX00(ha)) {
3165                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3166                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3167                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3168                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3169         }
3170
3171         if (IS_P3P_TYPE(ha)) {
3172                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3173                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3174                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3175         }
3176
3177         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3178             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3179             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3180         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3181             "req->req_q_in=%p req->req_q_out=%p "
3182             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3183             req->req_q_in, req->req_q_out,
3184             rsp->rsp_q_in, rsp->rsp_q_out);
3185         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3186             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3187             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3188         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3189             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3190             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3191
3192         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3193         if (unlikely(!ha->wq)) {
3194                 ret = -ENOMEM;
3195                 goto probe_failed;
3196         }
3197
3198         if (ha->isp_ops->initialize_adapter(base_vha)) {
3199                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3200                     "Failed to initialize adapter - Adapter flags %x.\n",
3201                     base_vha->device_flags);
3202
3203                 if (IS_QLA82XX(ha)) {
3204                         qla82xx_idc_lock(ha);
3205                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3206                                 QLA8XXX_DEV_FAILED);
3207                         qla82xx_idc_unlock(ha);
3208                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3209                             "HW State: FAILED.\n");
3210                 } else if (IS_QLA8044(ha)) {
3211                         qla8044_idc_lock(ha);
3212                         qla8044_wr_direct(base_vha,
3213                                 QLA8044_CRB_DEV_STATE_INDEX,
3214                                 QLA8XXX_DEV_FAILED);
3215                         qla8044_idc_unlock(ha);
3216                         ql_log(ql_log_fatal, base_vha, 0x0150,
3217                             "HW State: FAILED.\n");
3218                 }
3219
3220                 ret = -ENODEV;
3221                 goto probe_failed;
3222         }
3223
3224         if (IS_QLAFX00(ha))
3225                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3226         else
3227                 host->can_queue = req->num_outstanding_cmds - 10;
3228
3229         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3230             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3231             host->can_queue, base_vha->req,
3232             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3233
3234         if (ha->mqenable) {
3235                 bool mq = false;
3236                 bool startit = false;
3237
3238                 if (QLA_TGT_MODE_ENABLED()) {
3239                         mq = true;
3240                         startit = false;
3241                 }
3242
3243                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3244                     shost_use_blk_mq(host)) {
3245                         mq = true;
3246                         startit = true;
3247                 }
3248
3249                 if (mq) {
3250                         /* Create start of day qpairs for Block MQ */
3251                         for (i = 0; i < ha->max_qpairs; i++)
3252                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3253                 }
3254         }
3255
3256         if (ha->flags.running_gold_fw)
3257                 goto skip_dpc;
3258
3259         /*
3260          * Startup the kernel thread for this host adapter
3261          */
3262         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3263             "%s_dpc", base_vha->host_str);
3264         if (IS_ERR(ha->dpc_thread)) {
3265                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3266                     "Failed to start DPC thread.\n");
3267                 ret = PTR_ERR(ha->dpc_thread);
3268                 ha->dpc_thread = NULL;
3269                 goto probe_failed;
3270         }
3271         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3272             "DPC thread started successfully.\n");
3273
3274         /*
3275          * If we're not coming up in initiator mode, we might sit for
3276          * a while without waking up the dpc thread, which leads to a
3277          * stuck process warning.  So just kick the dpc once here and
3278          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3279          */
3280         qla2xxx_wake_dpc(base_vha);
3281
3282         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3283
3284         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3285                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3286                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3287                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3288
3289                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3290                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3291                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3292                 INIT_WORK(&ha->idc_state_handler,
3293                     qla83xx_idc_state_handler_work);
3294                 INIT_WORK(&ha->nic_core_unrecoverable,
3295                     qla83xx_nic_core_unrecoverable_work);
3296         }
3297
3298 skip_dpc:
3299         list_add_tail(&base_vha->list, &ha->vp_list);
3300         base_vha->host->irq = ha->pdev->irq;
3301
3302         /* Initialized the timer */
3303         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3304         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3305             "Started qla2x00_timer with "
3306             "interval=%d.\n", WATCH_INTERVAL);
3307         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3308             "Detected hba at address=%p.\n",
3309             ha);
3310
3311         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3312                 if (ha->fw_attributes & BIT_4) {
3313                         int prot = 0, guard;
3314                         base_vha->flags.difdix_supported = 1;
3315                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3316                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3317                         if (ql2xenabledif == 1)
3318                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3319                         scsi_host_set_prot(host,
3320                             prot | SHOST_DIF_TYPE1_PROTECTION
3321                             | SHOST_DIF_TYPE2_PROTECTION
3322                             | SHOST_DIF_TYPE3_PROTECTION
3323                             | SHOST_DIX_TYPE1_PROTECTION
3324                             | SHOST_DIX_TYPE2_PROTECTION
3325                             | SHOST_DIX_TYPE3_PROTECTION);
3326
3327                         guard = SHOST_DIX_GUARD_CRC;
3328
3329                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3330                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3331                                 guard |= SHOST_DIX_GUARD_IP;
3332
3333                         scsi_host_set_guard(host, guard);
3334                 } else
3335                         base_vha->flags.difdix_supported = 0;
3336         }
3337
3338         ha->isp_ops->enable_intrs(ha);
3339
3340         if (IS_QLAFX00(ha)) {
3341                 ret = qlafx00_fx_disc(base_vha,
3342                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3343                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3344                     QLA_SG_ALL : 128;
3345         }
3346
3347         ret = scsi_add_host(host, &pdev->dev);
3348         if (ret)
3349                 goto probe_failed;
3350
3351         base_vha->flags.init_done = 1;
3352         base_vha->flags.online = 1;
3353         ha->prev_minidump_failed = 0;
3354
3355         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3356             "Init done and hba is online.\n");
3357
3358         if (qla_ini_mode_enabled(base_vha) ||
3359                 qla_dual_mode_enabled(base_vha))
3360                 scsi_scan_host(host);
3361         else
3362                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3363                         "skipping scsi_scan_host() for non-initiator port\n");
3364
3365         qla2x00_alloc_sysfs_attr(base_vha);
3366
3367         if (IS_QLAFX00(ha)) {
3368                 ret = qlafx00_fx_disc(base_vha,
3369                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3370
3371                 /* Register system information */
3372                 ret =  qlafx00_fx_disc(base_vha,
3373                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3374         }
3375
3376         qla2x00_init_host_attr(base_vha);
3377
3378         qla2x00_dfs_setup(base_vha);
3379
3380         ql_log(ql_log_info, base_vha, 0x00fb,
3381             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3382         ql_log(ql_log_info, base_vha, 0x00fc,
3383             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3384             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3385             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3386             base_vha->host_no,
3387             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3388
3389         qlt_add_target(ha, base_vha);
3390
3391         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3392
3393         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3394                 return -ENODEV;
3395
3396         if (ha->flags.detected_lr_sfp) {
3397                 ql_log(ql_log_info, base_vha, 0xffff,
3398                     "Reset chip to pick up LR SFP setting\n");
3399                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3400                 qla2xxx_wake_dpc(base_vha);
3401         }
3402
3403         return 0;
3404
3405 probe_failed:
3406         if (base_vha->gnl.l) {
3407                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3408                                 base_vha->gnl.l, base_vha->gnl.ldma);
3409                 base_vha->gnl.l = NULL;
3410         }
3411
3412         if (base_vha->timer_active)
3413                 qla2x00_stop_timer(base_vha);
3414         base_vha->flags.online = 0;
3415         if (ha->dpc_thread) {
3416                 struct task_struct *t = ha->dpc_thread;
3417
3418                 ha->dpc_thread = NULL;
3419                 kthread_stop(t);
3420         }
3421
3422         qla2x00_free_device(base_vha);
3423         scsi_host_put(base_vha->host);
3424         /*
3425          * Need to NULL out local req/rsp after
3426          * qla2x00_free_device => qla2x00_free_queues frees
3427          * what these are pointing to. Or else we'll
3428          * fall over below in qla2x00_free_req/rsp_que.
3429          */
3430         req = NULL;
3431         rsp = NULL;
3432
3433 probe_hw_failed:
3434         qla2x00_mem_free(ha);
3435         qla2x00_free_req_que(ha, req);
3436         qla2x00_free_rsp_que(ha, rsp);
3437         qla2x00_clear_drv_active(ha);
3438
3439 iospace_config_failed:
3440         if (IS_P3P_TYPE(ha)) {
3441                 if (!ha->nx_pcibase)
3442                         iounmap((device_reg_t *)ha->nx_pcibase);
3443                 if (!ql2xdbwr)
3444                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3445         } else {
3446                 if (ha->iobase)
3447                         iounmap(ha->iobase);
3448                 if (ha->cregbase)
3449                         iounmap(ha->cregbase);
3450         }
3451         pci_release_selected_regions(ha->pdev, ha->bars);
3452         kfree(ha);
3453
3454 disable_device:
3455         pci_disable_device(pdev);
3456         return ret;
3457 }
3458
3459 static void
3460 qla2x00_shutdown(struct pci_dev *pdev)
3461 {
3462         scsi_qla_host_t *vha;
3463         struct qla_hw_data  *ha;
3464
3465         vha = pci_get_drvdata(pdev);
3466         ha = vha->hw;
3467
3468         ql_log(ql_log_info, vha, 0xfffa,
3469                 "Adapter shutdown\n");
3470
3471         /*
3472          * Prevent future board_disable and wait
3473          * until any pending board_disable has completed.
3474          */
3475         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3476         cancel_work_sync(&ha->board_disable);
3477
3478         if (!atomic_read(&pdev->enable_cnt))
3479                 return;
3480
3481         /* Notify ISPFX00 firmware */
3482         if (IS_QLAFX00(ha))
3483                 qlafx00_driver_shutdown(vha, 20);
3484
3485         /* Turn-off FCE trace */
3486         if (ha->flags.fce_enabled) {
3487                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3488                 ha->flags.fce_enabled = 0;
3489         }
3490
3491         /* Turn-off EFT trace */
3492         if (ha->eft)
3493                 qla2x00_disable_eft_trace(vha);
3494
3495         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3496                 if (ha->flags.fw_started)
3497                         qla2x00_abort_isp_cleanup(vha);
3498         } else {
3499                 /* Stop currently executing firmware. */
3500                 qla2x00_try_to_stop_firmware(vha);
3501         }
3502
3503         /* Disable timer */
3504         if (vha->timer_active)
3505                 qla2x00_stop_timer(vha);
3506
3507         /* Turn adapter off line */
3508         vha->flags.online = 0;
3509
3510         /* turn-off interrupts on the card */
3511         if (ha->interrupts_on) {
3512                 vha->flags.init_done = 0;
3513                 ha->isp_ops->disable_intrs(ha);
3514         }
3515
3516         qla2x00_free_irqs(vha);
3517
3518         qla2x00_free_fw_dump(ha);
3519
3520         pci_disable_device(pdev);
3521         ql_log(ql_log_info, vha, 0xfffe,
3522                 "Adapter shutdown successfully.\n");
3523 }
3524
3525 /* Deletes all the virtual ports for a given ha */
3526 static void
3527 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3528 {
3529         scsi_qla_host_t *vha;
3530         unsigned long flags;
3531
3532         mutex_lock(&ha->vport_lock);
3533         while (ha->cur_vport_count) {
3534                 spin_lock_irqsave(&ha->vport_slock, flags);
3535
3536                 BUG_ON(base_vha->list.next == &ha->vp_list);
3537                 /* This assumes first entry in ha->vp_list is always base vha */
3538                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3539                 scsi_host_get(vha->host);
3540
3541                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3542                 mutex_unlock(&ha->vport_lock);
3543
3544                 qla_nvme_delete(vha);
3545
3546                 fc_vport_terminate(vha->fc_vport);
3547                 scsi_host_put(vha->host);
3548
3549                 mutex_lock(&ha->vport_lock);
3550         }
3551         mutex_unlock(&ha->vport_lock);
3552 }
3553
3554 /* Stops all deferred work threads */
3555 static void
3556 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3557 {
3558         /* Cancel all work and destroy DPC workqueues */
3559         if (ha->dpc_lp_wq) {
3560                 cancel_work_sync(&ha->idc_aen);
3561                 destroy_workqueue(ha->dpc_lp_wq);
3562                 ha->dpc_lp_wq = NULL;
3563         }
3564
3565         if (ha->dpc_hp_wq) {
3566                 cancel_work_sync(&ha->nic_core_reset);
3567                 cancel_work_sync(&ha->idc_state_handler);
3568                 cancel_work_sync(&ha->nic_core_unrecoverable);
3569                 destroy_workqueue(ha->dpc_hp_wq);
3570                 ha->dpc_hp_wq = NULL;
3571         }
3572
3573         /* Kill the kernel thread for this host */
3574         if (ha->dpc_thread) {
3575                 struct task_struct *t = ha->dpc_thread;
3576
3577                 /*
3578                  * qla2xxx_wake_dpc checks for ->dpc_thread
3579                  * so we need to zero it out.
3580                  */
3581                 ha->dpc_thread = NULL;
3582                 kthread_stop(t);
3583         }
3584 }
3585
3586 static void
3587 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3588 {
3589         if (IS_QLA82XX(ha)) {
3590
3591                 iounmap((device_reg_t *)ha->nx_pcibase);
3592                 if (!ql2xdbwr)
3593                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3594         } else {
3595                 if (ha->iobase)
3596                         iounmap(ha->iobase);
3597
3598                 if (ha->cregbase)
3599                         iounmap(ha->cregbase);
3600
3601                 if (ha->mqiobase)
3602                         iounmap(ha->mqiobase);
3603
3604                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3605                         iounmap(ha->msixbase);
3606         }
3607 }
3608
3609 static void
3610 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3611 {
3612         if (IS_QLA8044(ha)) {
3613                 qla8044_idc_lock(ha);
3614                 qla8044_clear_drv_active(ha);
3615                 qla8044_idc_unlock(ha);
3616         } else if (IS_QLA82XX(ha)) {
3617                 qla82xx_idc_lock(ha);
3618                 qla82xx_clear_drv_active(ha);
3619                 qla82xx_idc_unlock(ha);
3620         }
3621 }
3622
3623 static void
3624 qla2x00_remove_one(struct pci_dev *pdev)
3625 {
3626         scsi_qla_host_t *base_vha;
3627         struct qla_hw_data  *ha;
3628
3629         base_vha = pci_get_drvdata(pdev);
3630         ha = base_vha->hw;
3631         ql_log(ql_log_info, base_vha, 0xb079,
3632             "Removing driver\n");
3633
3634         /* Indicate device removal to prevent future board_disable and wait
3635          * until any pending board_disable has completed. */
3636         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3637         cancel_work_sync(&ha->board_disable);
3638
3639         /*
3640          * If the PCI device is disabled then there was a PCI-disconnect and
3641          * qla2x00_disable_board_on_pci_error has taken care of most of the
3642          * resources.
3643          */
3644         if (!atomic_read(&pdev->enable_cnt)) {
3645                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3646                     base_vha->gnl.l, base_vha->gnl.ldma);
3647                 base_vha->gnl.l = NULL;
3648                 scsi_host_put(base_vha->host);
3649                 kfree(ha);
3650                 pci_set_drvdata(pdev, NULL);
3651                 return;
3652         }
3653         qla2x00_wait_for_hba_ready(base_vha);
3654
3655         /*
3656          * if UNLOADING flag is already set, then continue unload,
3657          * where it was set first.
3658          */
3659         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3660                 return;
3661
3662         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3663                 if (ha->flags.fw_started)
3664                         qla2x00_abort_isp_cleanup(base_vha);
3665         } else if (!IS_QLAFX00(ha)) {
3666                 if (IS_QLA8031(ha)) {
3667                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3668                             "Clearing fcoe driver presence.\n");
3669                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3670                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3671                                     "Error while clearing DRV-Presence.\n");
3672                 }
3673
3674                 qla2x00_try_to_stop_firmware(base_vha);
3675         }
3676
3677         qla2x00_wait_for_sess_deletion(base_vha);
3678
3679         qla_nvme_delete(base_vha);
3680
3681         dma_free_coherent(&ha->pdev->dev,
3682                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3683
3684         base_vha->gnl.l = NULL;
3685
3686         vfree(base_vha->scan.l);
3687
3688         if (IS_QLAFX00(ha))
3689                 qlafx00_driver_shutdown(base_vha, 20);
3690
3691         qla2x00_delete_all_vps(ha, base_vha);
3692
3693         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3694
3695         qla2x00_dfs_remove(base_vha);
3696
3697         qla84xx_put_chip(base_vha);
3698
3699         /* Disable timer */
3700         if (base_vha->timer_active)
3701                 qla2x00_stop_timer(base_vha);
3702
3703         base_vha->flags.online = 0;
3704
3705         /* free DMA memory */
3706         if (ha->exlogin_buf)
3707                 qla2x00_free_exlogin_buffer(ha);
3708
3709         /* free DMA memory */
3710         if (ha->exchoffld_buf)
3711                 qla2x00_free_exchoffld_buffer(ha);
3712
3713         qla2x00_destroy_deferred_work(ha);
3714
3715         qlt_remove_target(ha, base_vha);
3716
3717         qla2x00_free_sysfs_attr(base_vha, true);
3718
3719         fc_remove_host(base_vha->host);
3720         qlt_remove_target_resources(ha);
3721
3722         scsi_remove_host(base_vha->host);
3723
3724         qla2x00_free_device(base_vha);
3725
3726         qla2x00_clear_drv_active(ha);
3727
3728         scsi_host_put(base_vha->host);
3729
3730         qla2x00_unmap_iobases(ha);
3731
3732         pci_release_selected_regions(ha->pdev, ha->bars);
3733         kfree(ha);
3734
3735         pci_disable_pcie_error_reporting(pdev);
3736
3737         pci_disable_device(pdev);
3738 }
3739
3740 static void
3741 qla2x00_free_device(scsi_qla_host_t *vha)
3742 {
3743         struct qla_hw_data *ha = vha->hw;
3744
3745         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3746
3747         /* Disable timer */
3748         if (vha->timer_active)
3749                 qla2x00_stop_timer(vha);
3750
3751         qla25xx_delete_queues(vha);
3752         vha->flags.online = 0;
3753
3754         /* turn-off interrupts on the card */
3755         if (ha->interrupts_on) {
3756                 vha->flags.init_done = 0;
3757                 ha->isp_ops->disable_intrs(ha);
3758         }
3759
3760         qla2x00_free_fcports(vha);
3761
3762         qla2x00_free_irqs(vha);
3763
3764         /* Flush the work queue and remove it */
3765         if (ha->wq) {
3766                 flush_workqueue(ha->wq);
3767                 destroy_workqueue(ha->wq);
3768                 ha->wq = NULL;
3769         }
3770
3771
3772         qla2x00_mem_free(ha);
3773
3774         qla82xx_md_free(vha);
3775
3776         qla2x00_free_queues(ha);
3777 }
3778
3779 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3780 {
3781         fc_port_t *fcport, *tfcport;
3782
3783         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3784                 list_del(&fcport->list);
3785                 qla2x00_clear_loop_id(fcport);
3786                 kfree(fcport);
3787         }
3788 }
3789
3790 static inline void
3791 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3792     int defer)
3793 {
3794         struct fc_rport *rport;
3795         scsi_qla_host_t *base_vha;
3796         unsigned long flags;
3797
3798         if (!fcport->rport)
3799                 return;
3800
3801         rport = fcport->rport;
3802         if (defer) {
3803                 base_vha = pci_get_drvdata(vha->hw->pdev);
3804                 spin_lock_irqsave(vha->host->host_lock, flags);
3805                 fcport->drport = rport;
3806                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3807                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3808                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3809                 qla2xxx_wake_dpc(base_vha);
3810         } else {
3811                 int now;
3812                 if (rport) {
3813                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3814                             "%s %8phN. rport %p roles %x\n",
3815                             __func__, fcport->port_name, rport,
3816                             rport->roles);
3817                         fc_remote_port_delete(rport);
3818                 }
3819                 qlt_do_generation_tick(vha, &now);
3820         }
3821 }
3822
3823 /*
3824  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3825  *
3826  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3827  *
3828  * Return: None.
3829  *
3830  * Context:
3831  */
3832 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3833     int do_login, int defer)
3834 {
3835         if (IS_QLAFX00(vha->hw)) {
3836                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3837                 qla2x00_schedule_rport_del(vha, fcport, defer);
3838                 return;
3839         }
3840
3841         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3842             vha->vp_idx == fcport->vha->vp_idx) {
3843                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3844                 qla2x00_schedule_rport_del(vha, fcport, defer);
3845         }
3846         /*
3847          * We may need to retry the login, so don't change the state of the
3848          * port but do the retries.
3849          */
3850         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3851                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3852
3853         if (!do_login)
3854                 return;
3855
3856         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3857 }
3858
3859 /*
3860  * qla2x00_mark_all_devices_lost
3861  *      Updates fcport state when device goes offline.
3862  *
3863  * Input:
3864  *      ha = adapter block pointer.
3865  *      fcport = port structure pointer.
3866  *
3867  * Return:
3868  *      None.
3869  *
3870  * Context:
3871  */
3872 void
3873 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3874 {
3875         fc_port_t *fcport;
3876
3877         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3878             "Mark all dev lost\n");
3879
3880         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3881                 fcport->scan_state = 0;
3882                 qlt_schedule_sess_for_deletion(fcport);
3883
3884                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3885                         continue;
3886
3887                 /*
3888                  * No point in marking the device as lost, if the device is
3889                  * already DEAD.
3890                  */
3891                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3892                         continue;
3893                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3894                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3895                         if (defer)
3896                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3897                         else if (vha->vp_idx == fcport->vha->vp_idx)
3898                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3899                 }
3900         }
3901 }
3902
3903 /*
3904 * qla2x00_mem_alloc
3905 *      Allocates adapter memory.
3906 *
3907 * Returns:
3908 *      0  = success.
3909 *      !0  = failure.
3910 */
3911 static int
3912 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3913         struct req_que **req, struct rsp_que **rsp)
3914 {
3915         char    name[16];
3916
3917         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3918                 &ha->init_cb_dma, GFP_KERNEL);
3919         if (!ha->init_cb)
3920                 goto fail;
3921
3922         if (qlt_mem_alloc(ha) < 0)
3923                 goto fail_free_init_cb;
3924
3925         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3926                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3927         if (!ha->gid_list)
3928                 goto fail_free_tgt_mem;
3929
3930         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3931         if (!ha->srb_mempool)
3932                 goto fail_free_gid_list;
3933
3934         if (IS_P3P_TYPE(ha)) {
3935                 /* Allocate cache for CT6 Ctx. */
3936                 if (!ctx_cachep) {
3937                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3938                                 sizeof(struct ct6_dsd), 0,
3939                                 SLAB_HWCACHE_ALIGN, NULL);
3940                         if (!ctx_cachep)
3941                                 goto fail_free_srb_mempool;
3942                 }
3943                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3944                         ctx_cachep);
3945                 if (!ha->ctx_mempool)
3946                         goto fail_free_srb_mempool;
3947                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3948                     "ctx_cachep=%p ctx_mempool=%p.\n",
3949                     ctx_cachep, ha->ctx_mempool);
3950         }
3951
3952         /* Get memory for cached NVRAM */
3953         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3954         if (!ha->nvram)
3955                 goto fail_free_ctx_mempool;
3956
3957         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3958                 ha->pdev->device);
3959         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3960                 DMA_POOL_SIZE, 8, 0);
3961         if (!ha->s_dma_pool)
3962                 goto fail_free_nvram;
3963
3964         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3965             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3966             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3967
3968         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3969                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3970                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3971                 if (!ha->dl_dma_pool) {
3972                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3973                             "Failed to allocate memory for dl_dma_pool.\n");
3974                         goto fail_s_dma_pool;
3975                 }
3976
3977                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3978                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3979                 if (!ha->fcp_cmnd_dma_pool) {
3980                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3981                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3982                         goto fail_dl_dma_pool;
3983                 }
3984                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3985                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3986                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3987         }
3988
3989         /* Allocate memory for SNS commands */
3990         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3991         /* Get consistent memory allocated for SNS commands */
3992                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3993                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3994                 if (!ha->sns_cmd)
3995                         goto fail_dma_pool;
3996                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3997                     "sns_cmd: %p.\n", ha->sns_cmd);
3998         } else {
3999         /* Get consistent memory allocated for MS IOCB */
4000                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4001                         &ha->ms_iocb_dma);
4002                 if (!ha->ms_iocb)
4003                         goto fail_dma_pool;
4004         /* Get consistent memory allocated for CT SNS commands */
4005                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4006                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4007                 if (!ha->ct_sns)
4008                         goto fail_free_ms_iocb;
4009                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4010                     "ms_iocb=%p ct_sns=%p.\n",
4011                     ha->ms_iocb, ha->ct_sns);
4012         }
4013
4014         /* Allocate memory for request ring */
4015         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4016         if (!*req) {
4017                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4018                     "Failed to allocate memory for req.\n");
4019                 goto fail_req;
4020         }
4021         (*req)->length = req_len;
4022         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4023                 ((*req)->length + 1) * sizeof(request_t),
4024                 &(*req)->dma, GFP_KERNEL);
4025         if (!(*req)->ring) {
4026                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4027                     "Failed to allocate memory for req_ring.\n");
4028                 goto fail_req_ring;
4029         }
4030         /* Allocate memory for response ring */
4031         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4032         if (!*rsp) {
4033                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4034                     "Failed to allocate memory for rsp.\n");
4035                 goto fail_rsp;
4036         }
4037         (*rsp)->hw = ha;
4038         (*rsp)->length = rsp_len;
4039         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4040                 ((*rsp)->length + 1) * sizeof(response_t),
4041                 &(*rsp)->dma, GFP_KERNEL);
4042         if (!(*rsp)->ring) {
4043                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4044                     "Failed to allocate memory for rsp_ring.\n");
4045                 goto fail_rsp_ring;
4046         }
4047         (*req)->rsp = *rsp;
4048         (*rsp)->req = *req;
4049         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4050             "req=%p req->length=%d req->ring=%p rsp=%p "
4051             "rsp->length=%d rsp->ring=%p.\n",
4052             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4053             (*rsp)->ring);
4054         /* Allocate memory for NVRAM data for vports */
4055         if (ha->nvram_npiv_size) {
4056                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4057                                         sizeof(struct qla_npiv_entry),
4058                                         GFP_KERNEL);
4059                 if (!ha->npiv_info) {
4060                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4061                             "Failed to allocate memory for npiv_info.\n");
4062                         goto fail_npiv_info;
4063                 }
4064         } else
4065                 ha->npiv_info = NULL;
4066
4067         /* Get consistent memory allocated for EX-INIT-CB. */
4068         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4069                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4070                     &ha->ex_init_cb_dma);
4071                 if (!ha->ex_init_cb)
4072                         goto fail_ex_init_cb;
4073                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4074                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4075         }
4076
4077         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4078
4079         /* Get consistent memory allocated for Async Port-Database. */
4080         if (!IS_FWI2_CAPABLE(ha)) {
4081                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4082                         &ha->async_pd_dma);
4083                 if (!ha->async_pd)
4084                         goto fail_async_pd;
4085                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4086                     "async_pd=%p.\n", ha->async_pd);
4087         }
4088
4089         INIT_LIST_HEAD(&ha->vp_list);
4090
4091         /* Allocate memory for our loop_id bitmap */
4092         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4093                                   sizeof(long),
4094                                   GFP_KERNEL);
4095         if (!ha->loop_id_map)
4096                 goto fail_loop_id_map;
4097         else {
4098                 qla2x00_set_reserved_loop_ids(ha);
4099                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4100                     "loop_id_map=%p.\n", ha->loop_id_map);
4101         }
4102
4103         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4104             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4105         if (!ha->sfp_data) {
4106                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4107                     "Unable to allocate memory for SFP read-data.\n");
4108                 goto fail_sfp_data;
4109         }
4110
4111         return 0;
4112
4113 fail_sfp_data:
4114         kfree(ha->loop_id_map);
4115 fail_loop_id_map:
4116         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4117 fail_async_pd:
4118         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4119 fail_ex_init_cb:
4120         kfree(ha->npiv_info);
4121 fail_npiv_info:
4122         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4123                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4124         (*rsp)->ring = NULL;
4125         (*rsp)->dma = 0;
4126 fail_rsp_ring:
4127         kfree(*rsp);
4128         *rsp = NULL;
4129 fail_rsp:
4130         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4131                 sizeof(request_t), (*req)->ring, (*req)->dma);
4132         (*req)->ring = NULL;
4133         (*req)->dma = 0;
4134 fail_req_ring:
4135         kfree(*req);
4136         *req = NULL;
4137 fail_req:
4138         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4139                 ha->ct_sns, ha->ct_sns_dma);
4140         ha->ct_sns = NULL;
4141         ha->ct_sns_dma = 0;
4142 fail_free_ms_iocb:
4143         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4144         ha->ms_iocb = NULL;
4145         ha->ms_iocb_dma = 0;
4146
4147         if (ha->sns_cmd)
4148                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4149                     ha->sns_cmd, ha->sns_cmd_dma);
4150 fail_dma_pool:
4151         if (IS_QLA82XX(ha) || ql2xenabledif) {
4152                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4153                 ha->fcp_cmnd_dma_pool = NULL;
4154         }
4155 fail_dl_dma_pool:
4156         if (IS_QLA82XX(ha) || ql2xenabledif) {
4157                 dma_pool_destroy(ha->dl_dma_pool);
4158                 ha->dl_dma_pool = NULL;
4159         }
4160 fail_s_dma_pool:
4161         dma_pool_destroy(ha->s_dma_pool);
4162         ha->s_dma_pool = NULL;
4163 fail_free_nvram:
4164         kfree(ha->nvram);
4165         ha->nvram = NULL;
4166 fail_free_ctx_mempool:
4167         if (ha->ctx_mempool)
4168                 mempool_destroy(ha->ctx_mempool);
4169         ha->ctx_mempool = NULL;
4170 fail_free_srb_mempool:
4171         if (ha->srb_mempool)
4172                 mempool_destroy(ha->srb_mempool);
4173         ha->srb_mempool = NULL;
4174 fail_free_gid_list:
4175         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4176         ha->gid_list,
4177         ha->gid_list_dma);
4178         ha->gid_list = NULL;
4179         ha->gid_list_dma = 0;
4180 fail_free_tgt_mem:
4181         qlt_mem_free(ha);
4182 fail_free_init_cb:
4183         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4184         ha->init_cb_dma);
4185         ha->init_cb = NULL;
4186         ha->init_cb_dma = 0;
4187 fail:
4188         ql_log(ql_log_fatal, NULL, 0x0030,
4189             "Memory allocation failure.\n");
4190         return -ENOMEM;
4191 }
4192
4193 int
4194 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4195 {
4196         int rval;
4197         uint16_t        size, max_cnt, temp;
4198         struct qla_hw_data *ha = vha->hw;
4199
4200         /* Return if we don't need to alloacate any extended logins */
4201         if (!ql2xexlogins)
4202                 return QLA_SUCCESS;
4203
4204         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4205                 return QLA_SUCCESS;
4206
4207         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4208         max_cnt = 0;
4209         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4210         if (rval != QLA_SUCCESS) {
4211                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4212                     "Failed to get exlogin status.\n");
4213                 return rval;
4214         }
4215
4216         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4217         temp *= size;
4218
4219         if (temp != ha->exlogin_size) {
4220                 qla2x00_free_exlogin_buffer(ha);
4221                 ha->exlogin_size = temp;
4222
4223                 ql_log(ql_log_info, vha, 0xd024,
4224                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4225                     max_cnt, size, temp);
4226
4227                 ql_log(ql_log_info, vha, 0xd025,
4228                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4229
4230                 /* Get consistent memory for extended logins */
4231                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4232                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4233                 if (!ha->exlogin_buf) {
4234                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4235                     "Failed to allocate memory for exlogin_buf_dma.\n");
4236                         return -ENOMEM;
4237                 }
4238         }
4239
4240         /* Now configure the dma buffer */
4241         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4242         if (rval) {
4243                 ql_log(ql_log_fatal, vha, 0xd033,
4244                     "Setup extended login buffer  ****FAILED****.\n");
4245                 qla2x00_free_exlogin_buffer(ha);
4246         }
4247
4248         return rval;
4249 }
4250
4251 /*
4252 * qla2x00_free_exlogin_buffer
4253 *
4254 * Input:
4255 *       ha = adapter block pointer
4256 */
4257 void
4258 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4259 {
4260         if (ha->exlogin_buf) {
4261                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4262                     ha->exlogin_buf, ha->exlogin_buf_dma);
4263                 ha->exlogin_buf = NULL;
4264                 ha->exlogin_size = 0;
4265         }
4266 }
4267
4268 static void
4269 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4270 {
4271         u32 temp;
4272         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4273
4274         if (max_cnt > vha->hw->max_exchg)
4275                 max_cnt = vha->hw->max_exchg;
4276
4277         if (qla_ini_mode_enabled(vha)) {
4278                 if (ql2xiniexchg > max_cnt)
4279                         ql2xiniexchg = max_cnt;
4280
4281                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4282                         *ret_cnt = ql2xiniexchg;
4283         } else if (qla_tgt_mode_enabled(vha)) {
4284                 if (ql2xexchoffld > max_cnt)
4285                         ql2xexchoffld = max_cnt;
4286
4287                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4288                         *ret_cnt = ql2xexchoffld;
4289         } else if (qla_dual_mode_enabled(vha)) {
4290                 temp = ql2xiniexchg + ql2xexchoffld;
4291                 if (temp > max_cnt) {
4292                         ql2xiniexchg -= (temp - max_cnt)/2;
4293                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4294                         temp = max_cnt;
4295                 }
4296
4297                 if (temp > FW_DEF_EXCHANGES_CNT)
4298                         *ret_cnt = temp;
4299         }
4300 }
4301
4302 int
4303 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4304 {
4305         int rval;
4306         u16     size, max_cnt;
4307         u32 actual_cnt, totsz;
4308         struct qla_hw_data *ha = vha->hw;
4309
4310         if (!ha->flags.exchoffld_enabled)
4311                 return QLA_SUCCESS;
4312
4313         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4314                 return QLA_SUCCESS;
4315
4316         max_cnt = 0;
4317         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4318         if (rval != QLA_SUCCESS) {
4319                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4320                     "Failed to get exlogin status.\n");
4321                 return rval;
4322         }
4323
4324         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4325         ql_log(ql_log_info, vha, 0xd014,
4326             "Actual exchange offload count: %d.\n", actual_cnt);
4327
4328         totsz = actual_cnt * size;
4329
4330         if (totsz != ha->exchoffld_size) {
4331                 qla2x00_free_exchoffld_buffer(ha);
4332                 ha->exchoffld_size = totsz;
4333
4334                 ql_log(ql_log_info, vha, 0xd016,
4335                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4336                     max_cnt, actual_cnt, size, totsz);
4337
4338                 ql_log(ql_log_info, vha, 0xd017,
4339                     "Exchange Buffers requested size = 0x%x\n",
4340                     ha->exchoffld_size);
4341
4342                 /* Get consistent memory for extended logins */
4343                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4344                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4345                 if (!ha->exchoffld_buf) {
4346                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4347                         "Failed to allocate memory for Exchange Offload.\n");
4348
4349                         if (ha->max_exchg >
4350                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4351                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4352                         } else if (ha->max_exchg >
4353                             (FW_DEF_EXCHANGES_CNT + 512)) {
4354                                 ha->max_exchg -= 512;
4355                         } else {
4356                                 ha->flags.exchoffld_enabled = 0;
4357                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4358                                     "Disabling Exchange offload due to lack of memory\n");
4359                         }
4360                         ha->exchoffld_size = 0;
4361
4362                         return -ENOMEM;
4363                 }
4364         }
4365
4366         /* Now configure the dma buffer */
4367         rval = qla_set_exchoffld_mem_cfg(vha);
4368         if (rval) {
4369                 ql_log(ql_log_fatal, vha, 0xd02e,
4370                     "Setup exchange offload buffer ****FAILED****.\n");
4371                 qla2x00_free_exchoffld_buffer(ha);
4372         } else {
4373                 /* re-adjust number of target exchange */
4374                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4375
4376                 if (qla_ini_mode_enabled(vha))
4377                         icb->exchange_count = 0;
4378                 else
4379                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4380         }
4381
4382         return rval;
4383 }
4384
4385 /*
4386 * qla2x00_free_exchoffld_buffer
4387 *
4388 * Input:
4389 *       ha = adapter block pointer
4390 */
4391 void
4392 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4393 {
4394         if (ha->exchoffld_buf) {
4395                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4396                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4397                 ha->exchoffld_buf = NULL;
4398                 ha->exchoffld_size = 0;
4399         }
4400 }
4401
4402 /*
4403 * qla2x00_free_fw_dump
4404 *       Frees fw dump stuff.
4405 *
4406 * Input:
4407 *       ha = adapter block pointer
4408 */
4409 static void
4410 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4411 {
4412         if (ha->fce)
4413                 dma_free_coherent(&ha->pdev->dev,
4414                     FCE_SIZE, ha->fce, ha->fce_dma);
4415
4416         if (ha->eft)
4417                 dma_free_coherent(&ha->pdev->dev,
4418                     EFT_SIZE, ha->eft, ha->eft_dma);
4419
4420         if (ha->fw_dump)
4421                 vfree(ha->fw_dump);
4422         if (ha->fw_dump_template)
4423                 vfree(ha->fw_dump_template);
4424
4425         ha->fce = NULL;
4426         ha->fce_dma = 0;
4427         ha->eft = NULL;
4428         ha->eft_dma = 0;
4429         ha->fw_dumped = 0;
4430         ha->fw_dump_cap_flags = 0;
4431         ha->fw_dump_reading = 0;
4432         ha->fw_dump = NULL;
4433         ha->fw_dump_len = 0;
4434         ha->fw_dump_template = NULL;
4435         ha->fw_dump_template_len = 0;
4436 }
4437
4438 /*
4439 * qla2x00_mem_free
4440 *      Frees all adapter allocated memory.
4441 *
4442 * Input:
4443 *      ha = adapter block pointer.
4444 */
4445 static void
4446 qla2x00_mem_free(struct qla_hw_data *ha)
4447 {
4448         qla2x00_free_fw_dump(ha);
4449
4450         if (ha->mctp_dump)
4451                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4452                     ha->mctp_dump_dma);
4453
4454         if (ha->srb_mempool)
4455                 mempool_destroy(ha->srb_mempool);
4456
4457         if (ha->dcbx_tlv)
4458                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4459                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4460
4461         if (ha->xgmac_data)
4462                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4463                     ha->xgmac_data, ha->xgmac_data_dma);
4464
4465         if (ha->sns_cmd)
4466                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4467                 ha->sns_cmd, ha->sns_cmd_dma);
4468
4469         if (ha->ct_sns)
4470                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4471                 ha->ct_sns, ha->ct_sns_dma);
4472
4473         if (ha->sfp_data)
4474                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4475                     ha->sfp_data_dma);
4476
4477         if (ha->ms_iocb)
4478                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4479
4480         if (ha->ex_init_cb)
4481                 dma_pool_free(ha->s_dma_pool,
4482                         ha->ex_init_cb, ha->ex_init_cb_dma);
4483
4484         if (ha->async_pd)
4485                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4486
4487         if (ha->s_dma_pool)
4488                 dma_pool_destroy(ha->s_dma_pool);
4489
4490         if (ha->gid_list)
4491                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4492                 ha->gid_list, ha->gid_list_dma);
4493
4494         if (IS_QLA82XX(ha)) {
4495                 if (!list_empty(&ha->gbl_dsd_list)) {
4496                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4497
4498                         /* clean up allocated prev pool */
4499                         list_for_each_entry_safe(dsd_ptr,
4500                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4501                                 dma_pool_free(ha->dl_dma_pool,
4502                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4503                                 list_del(&dsd_ptr->list);
4504                                 kfree(dsd_ptr);
4505                         }
4506                 }
4507         }
4508
4509         if (ha->dl_dma_pool)
4510                 dma_pool_destroy(ha->dl_dma_pool);
4511
4512         if (ha->fcp_cmnd_dma_pool)
4513                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4514
4515         if (ha->ctx_mempool)
4516                 mempool_destroy(ha->ctx_mempool);
4517
4518         qlt_mem_free(ha);
4519
4520         if (ha->init_cb)
4521                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4522                         ha->init_cb, ha->init_cb_dma);
4523
4524         vfree(ha->optrom_buffer);
4525         kfree(ha->nvram);
4526         kfree(ha->npiv_info);
4527         kfree(ha->swl);
4528         kfree(ha->loop_id_map);
4529
4530         ha->srb_mempool = NULL;
4531         ha->ctx_mempool = NULL;
4532         ha->sns_cmd = NULL;
4533         ha->sns_cmd_dma = 0;
4534         ha->ct_sns = NULL;
4535         ha->ct_sns_dma = 0;
4536         ha->ms_iocb = NULL;
4537         ha->ms_iocb_dma = 0;
4538         ha->init_cb = NULL;
4539         ha->init_cb_dma = 0;
4540         ha->ex_init_cb = NULL;
4541         ha->ex_init_cb_dma = 0;
4542         ha->async_pd = NULL;
4543         ha->async_pd_dma = 0;
4544         ha->loop_id_map = NULL;
4545         ha->npiv_info = NULL;
4546         ha->optrom_buffer = NULL;
4547         ha->swl = NULL;
4548         ha->nvram = NULL;
4549         ha->mctp_dump = NULL;
4550         ha->dcbx_tlv = NULL;
4551         ha->xgmac_data = NULL;
4552         ha->sfp_data = NULL;
4553
4554         ha->s_dma_pool = NULL;
4555         ha->dl_dma_pool = NULL;
4556         ha->fcp_cmnd_dma_pool = NULL;
4557
4558         ha->gid_list = NULL;
4559         ha->gid_list_dma = 0;
4560
4561         ha->tgt.atio_ring = NULL;
4562         ha->tgt.atio_dma = 0;
4563         ha->tgt.tgt_vp_map = NULL;
4564 }
4565
4566 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4567                                                 struct qla_hw_data *ha)
4568 {
4569         struct Scsi_Host *host;
4570         struct scsi_qla_host *vha = NULL;
4571
4572         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4573         if (!host) {
4574                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4575                     "Failed to allocate host from the scsi layer, aborting.\n");
4576                 return NULL;
4577         }
4578
4579         /* Clear our data area */
4580         vha = shost_priv(host);
4581         memset(vha, 0, sizeof(scsi_qla_host_t));
4582
4583         vha->host = host;
4584         vha->host_no = host->host_no;
4585         vha->hw = ha;
4586
4587         INIT_LIST_HEAD(&vha->vp_fcports);
4588         INIT_LIST_HEAD(&vha->work_list);
4589         INIT_LIST_HEAD(&vha->list);
4590         INIT_LIST_HEAD(&vha->qla_cmd_list);
4591         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4592         INIT_LIST_HEAD(&vha->logo_list);
4593         INIT_LIST_HEAD(&vha->plogi_ack_list);
4594         INIT_LIST_HEAD(&vha->qp_list);
4595         INIT_LIST_HEAD(&vha->gnl.fcports);
4596         INIT_LIST_HEAD(&vha->nvme_rport_list);
4597         INIT_LIST_HEAD(&vha->gpnid_list);
4598         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4599
4600         spin_lock_init(&vha->work_lock);
4601         spin_lock_init(&vha->cmd_list_lock);
4602         init_waitqueue_head(&vha->fcport_waitQ);
4603         init_waitqueue_head(&vha->vref_waitq);
4604
4605         vha->gnl.size = sizeof(struct get_name_list_extended) *
4606                         (ha->max_loop_id + 1);
4607         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4608             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4609         if (!vha->gnl.l) {
4610                 ql_log(ql_log_fatal, vha, 0xd04a,
4611                     "Alloc failed for name list.\n");
4612                 scsi_remove_host(vha->host);
4613                 return NULL;
4614         }
4615
4616         /* todo: what about ext login? */
4617         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4618         vha->scan.l = vmalloc(vha->scan.size);
4619         if (!vha->scan.l) {
4620                 ql_log(ql_log_fatal, vha, 0xd04a,
4621                     "Alloc failed for scan database.\n");
4622                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4623                     vha->gnl.l, vha->gnl.ldma);
4624                 vha->gnl.l = NULL;
4625                 scsi_remove_host(vha->host);
4626                 return NULL;
4627         }
4628         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4629
4630         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4631         ql_dbg(ql_dbg_init, vha, 0x0041,
4632             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4633             vha->host, vha->hw, vha,
4634             dev_name(&(ha->pdev->dev)));
4635
4636         return vha;
4637 }
4638
4639 struct qla_work_evt *
4640 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4641 {
4642         struct qla_work_evt *e;
4643         uint8_t bail;
4644
4645         if (test_bit(UNLOADING, &vha->dpc_flags))
4646                 return NULL;
4647
4648         QLA_VHA_MARK_BUSY(vha, bail);
4649         if (bail)
4650                 return NULL;
4651
4652         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4653         if (!e) {
4654                 QLA_VHA_MARK_NOT_BUSY(vha);
4655                 return NULL;
4656         }
4657
4658         INIT_LIST_HEAD(&e->list);
4659         e->type = type;
4660         e->flags = QLA_EVT_FLAG_FREE;
4661         return e;
4662 }
4663
4664 int
4665 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4666 {
4667         unsigned long flags;
4668         bool q = false;
4669
4670         spin_lock_irqsave(&vha->work_lock, flags);
4671         list_add_tail(&e->list, &vha->work_list);
4672
4673         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4674                 q = true;
4675
4676         spin_unlock_irqrestore(&vha->work_lock, flags);
4677
4678         if (q)
4679                 queue_work(vha->hw->wq, &vha->iocb_work);
4680
4681         return QLA_SUCCESS;
4682 }
4683
4684 int
4685 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4686     u32 data)
4687 {
4688         struct qla_work_evt *e;
4689
4690         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4691         if (!e)
4692                 return QLA_FUNCTION_FAILED;
4693
4694         e->u.aen.code = code;
4695         e->u.aen.data = data;
4696         return qla2x00_post_work(vha, e);
4697 }
4698
4699 int
4700 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4701 {
4702         struct qla_work_evt *e;
4703
4704         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4705         if (!e)
4706                 return QLA_FUNCTION_FAILED;
4707
4708         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4709         return qla2x00_post_work(vha, e);
4710 }
4711
4712 #define qla2x00_post_async_work(name, type)     \
4713 int qla2x00_post_async_##name##_work(           \
4714     struct scsi_qla_host *vha,                  \
4715     fc_port_t *fcport, uint16_t *data)          \
4716 {                                               \
4717         struct qla_work_evt *e;                 \
4718                                                 \
4719         e = qla2x00_alloc_work(vha, type);      \
4720         if (!e)                                 \
4721                 return QLA_FUNCTION_FAILED;     \
4722                                                 \
4723         e->u.logio.fcport = fcport;             \
4724         if (data) {                             \
4725                 e->u.logio.data[0] = data[0];   \
4726                 e->u.logio.data[1] = data[1];   \
4727         }                                       \
4728         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4729         return qla2x00_post_work(vha, e);       \
4730 }
4731
4732 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4733 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4734 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4735 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4736 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4737 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4738 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4739
4740 int
4741 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4742 {
4743         struct qla_work_evt *e;
4744
4745         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4746         if (!e)
4747                 return QLA_FUNCTION_FAILED;
4748
4749         e->u.uevent.code = code;
4750         return qla2x00_post_work(vha, e);
4751 }
4752
4753 static void
4754 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4755 {
4756         char event_string[40];
4757         char *envp[] = { event_string, NULL };
4758
4759         switch (code) {
4760         case QLA_UEVENT_CODE_FW_DUMP:
4761                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4762                     vha->host_no);
4763                 break;
4764         default:
4765                 /* do nothing */
4766                 break;
4767         }
4768         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4769 }
4770
4771 int
4772 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4773                         uint32_t *data, int cnt)
4774 {
4775         struct qla_work_evt *e;
4776
4777         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4778         if (!e)
4779                 return QLA_FUNCTION_FAILED;
4780
4781         e->u.aenfx.evtcode = evtcode;
4782         e->u.aenfx.count = cnt;
4783         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4784         return qla2x00_post_work(vha, e);
4785 }
4786
4787 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4788 {
4789         unsigned long flags;
4790
4791         if (IS_SW_RESV_ADDR(fcport->d_id))
4792                 return;
4793
4794         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4795         if (fcport->disc_state == DSC_UPD_FCPORT) {
4796                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4797                 return;
4798         }
4799         fcport->jiffies_at_registration = jiffies;
4800         fcport->sec_since_registration = 0;
4801         fcport->next_disc_state = DSC_DELETED;
4802         fcport->disc_state = DSC_UPD_FCPORT;
4803         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4804
4805         queue_work(system_unbound_wq, &fcport->reg_work);
4806 }
4807
4808 static
4809 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4810 {
4811         unsigned long flags;
4812         fc_port_t *fcport =  NULL, *tfcp;
4813         struct qlt_plogi_ack_t *pla =
4814             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4815         uint8_t free_fcport = 0;
4816
4817         ql_dbg(ql_dbg_disc, vha, 0xffff,
4818             "%s %d %8phC enter\n",
4819             __func__, __LINE__, e->u.new_sess.port_name);
4820
4821         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4822         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4823         if (fcport) {
4824                 fcport->d_id = e->u.new_sess.id;
4825                 if (pla) {
4826                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4827                         memcpy(fcport->node_name,
4828                             pla->iocb.u.isp24.u.plogi.node_name,
4829                             WWN_SIZE);
4830                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4831                         /* we took an extra ref_count to prevent PLOGI ACK when
4832                          * fcport/sess has not been created.
4833                          */
4834                         pla->ref_count--;
4835                 }
4836         } else {
4837                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4838                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4839                 if (fcport) {
4840                         fcport->d_id = e->u.new_sess.id;
4841                         fcport->flags |= FCF_FABRIC_DEVICE;
4842                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4843                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
4844                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
4845
4846                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
4847                                 fcport->fc4_type = FC4_TYPE_OTHER;
4848                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
4849                         }
4850
4851                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4852                             WWN_SIZE);
4853                 } else {
4854                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4855                                    "%s %8phC mem alloc fail.\n",
4856                                    __func__, e->u.new_sess.port_name);
4857
4858                         if (pla)
4859                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4860                         return;
4861                 }
4862
4863                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4864                 /* search again to make sure no one else got ahead */
4865                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4866                     e->u.new_sess.port_name, 1);
4867                 if (tfcp) {
4868                         /* should rarily happen */
4869                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4870                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4871                             __func__, tfcp->port_name, tfcp->disc_state,
4872                             tfcp->fw_login_state);
4873
4874                         free_fcport = 1;
4875                 } else {
4876                         list_add_tail(&fcport->list, &vha->vp_fcports);
4877
4878                 }
4879                 if (pla) {
4880                         qlt_plogi_ack_link(vha, pla, fcport,
4881                             QLT_PLOGI_LINK_SAME_WWN);
4882                         pla->ref_count--;
4883                 }
4884         }
4885         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4886
4887         if (fcport) {
4888                 fcport->id_changed = 1;
4889                 fcport->scan_state = QLA_FCPORT_FOUND;
4890                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4891                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
4892
4893                 if (pla) {
4894                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
4895                                 u16 wd3_lo;
4896
4897                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4898                                 fcport->local = 0;
4899                                 fcport->loop_id =
4900                                         le16_to_cpu(
4901                                             pla->iocb.u.isp24.nport_handle);
4902                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4903                                 wd3_lo =
4904                                     le16_to_cpu(
4905                                         pla->iocb.u.isp24.u.prli.wd3_lo);
4906
4907                                 if (wd3_lo & BIT_7)
4908                                         fcport->conf_compl_supported = 1;
4909
4910                                 if ((wd3_lo & BIT_4) == 0)
4911                                         fcport->port_type = FCT_INITIATOR;
4912                                 else
4913                                         fcport->port_type = FCT_TARGET;
4914                         }
4915                         qlt_plogi_ack_unref(vha, pla);
4916                 } else {
4917                         fc_port_t *dfcp = NULL;
4918
4919                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4920                         tfcp = qla2x00_find_fcport_by_nportid(vha,
4921                             &e->u.new_sess.id, 1);
4922                         if (tfcp && (tfcp != fcport)) {
4923                                 /*
4924                                  * We have a conflict fcport with same NportID.
4925                                  */
4926                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
4927                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
4928                                     __func__, tfcp->port_name, tfcp->disc_state,
4929                                     tfcp->fw_login_state);
4930
4931                                 switch (tfcp->disc_state) {
4932                                 case DSC_DELETED:
4933                                         break;
4934                                 case DSC_DELETE_PEND:
4935                                         fcport->login_pause = 1;
4936                                         tfcp->conflict = fcport;
4937                                         break;
4938                                 default:
4939                                         fcport->login_pause = 1;
4940                                         tfcp->conflict = fcport;
4941                                         dfcp = tfcp;
4942                                         break;
4943                                 }
4944                         }
4945                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4946                         if (dfcp)
4947                                 qlt_schedule_sess_for_deletion(tfcp);
4948
4949
4950                         if (N2N_TOPO(vha->hw))
4951                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
4952
4953                         if (N2N_TOPO(vha->hw)) {
4954                                 if (vha->flags.nvme_enabled) {
4955                                         fcport->fc4f_nvme = 1;
4956                                         fcport->n2n_flag = 1;
4957                                 }
4958                                 fcport->fw_login_state = 0;
4959                                 /*
4960                                  * wait link init done before sending login
4961                                  */
4962                         } else {
4963                                 qla24xx_fcport_handle_login(vha, fcport);
4964                         }
4965                 }
4966         }
4967
4968         if (free_fcport) {
4969                 qla2x00_free_fcport(fcport);
4970                 if (pla)
4971                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
4972         }
4973 }
4974
4975 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
4976 {
4977         struct srb *sp = e->u.iosb.sp;
4978         int rval;
4979
4980         rval = qla2x00_start_sp(sp);
4981         if (rval != QLA_SUCCESS) {
4982                 ql_dbg(ql_dbg_disc, vha, 0x2043,
4983                     "%s: %s: Re-issue IOCB failed (%d).\n",
4984                     __func__, sp->name, rval);
4985                 qla24xx_sp_unmap(vha, sp);
4986         }
4987 }
4988
4989 void
4990 qla2x00_do_work(struct scsi_qla_host *vha)
4991 {
4992         struct qla_work_evt *e, *tmp;
4993         unsigned long flags;
4994         LIST_HEAD(work);
4995
4996         spin_lock_irqsave(&vha->work_lock, flags);
4997         list_splice_init(&vha->work_list, &work);
4998         spin_unlock_irqrestore(&vha->work_lock, flags);
4999
5000         list_for_each_entry_safe(e, tmp, &work, list) {
5001                 list_del_init(&e->list);
5002
5003                 switch (e->type) {
5004                 case QLA_EVT_AEN:
5005                         fc_host_post_event(vha->host, fc_get_event_number(),
5006                             e->u.aen.code, e->u.aen.data);
5007                         break;
5008                 case QLA_EVT_IDC_ACK:
5009                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5010                         break;
5011                 case QLA_EVT_ASYNC_LOGIN:
5012                         qla2x00_async_login(vha, e->u.logio.fcport,
5013                             e->u.logio.data);
5014                         break;
5015                 case QLA_EVT_ASYNC_LOGOUT:
5016                         qla2x00_async_logout(vha, e->u.logio.fcport);
5017                         break;
5018                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5019                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5020                             e->u.logio.data);
5021                         break;
5022                 case QLA_EVT_ASYNC_ADISC:
5023                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5024                             e->u.logio.data);
5025                         break;
5026                 case QLA_EVT_ASYNC_ADISC_DONE:
5027                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
5028                             e->u.logio.data);
5029                         break;
5030                 case QLA_EVT_UEVENT:
5031                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5032                         break;
5033                 case QLA_EVT_AENFX:
5034                         qlafx00_process_aen(vha, e);
5035                         break;
5036                 case QLA_EVT_GIDPN:
5037                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
5038                         break;
5039                 case QLA_EVT_GPNID:
5040                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5041                         break;
5042                 case QLA_EVT_UNMAP:
5043                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5044                         break;
5045                 case QLA_EVT_RELOGIN:
5046                         qla2x00_relogin(vha);
5047                         break;
5048                 case QLA_EVT_NEW_SESS:
5049                         qla24xx_create_new_sess(vha, e);
5050                         break;
5051                 case QLA_EVT_GPDB:
5052                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5053                             e->u.fcport.opt);
5054                         break;
5055                 case QLA_EVT_PRLI:
5056                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5057                         break;
5058                 case QLA_EVT_GPSC:
5059                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5060                         break;
5061                 case QLA_EVT_GNL:
5062                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5063                         break;
5064                 case QLA_EVT_NACK:
5065                         qla24xx_do_nack_work(vha, e);
5066                         break;
5067                 case QLA_EVT_ASYNC_PRLO:
5068                         qla2x00_async_prlo(vha, e->u.logio.fcport);
5069                         break;
5070                 case QLA_EVT_ASYNC_PRLO_DONE:
5071                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5072                             e->u.logio.data);
5073                         break;
5074                 case QLA_EVT_GPNFT:
5075                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5076                             e->u.gpnft.sp);
5077                         break;
5078                 case QLA_EVT_GPNFT_DONE:
5079                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5080                         break;
5081                 case QLA_EVT_GNNFT_DONE:
5082                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5083                         break;
5084                 case QLA_EVT_GNNID:
5085                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5086                         break;
5087                 case QLA_EVT_GFPNID:
5088                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5089                         break;
5090                 case QLA_EVT_SP_RETRY:
5091                         qla_sp_retry(vha, e);
5092                         break;
5093                 case QLA_EVT_IIDMA:
5094                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5095                         break;
5096                 case QLA_EVT_ELS_PLOGI:
5097                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5098                             e->u.fcport.fcport, false);
5099                         break;
5100                 }
5101                 if (e->flags & QLA_EVT_FLAG_FREE)
5102                         kfree(e);
5103
5104                 /* For each work completed decrement vha ref count */
5105                 QLA_VHA_MARK_NOT_BUSY(vha);
5106         }
5107 }
5108
5109 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5110 {
5111         struct qla_work_evt *e;
5112
5113         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5114
5115         if (!e) {
5116                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5117                 return QLA_FUNCTION_FAILED;
5118         }
5119
5120         return qla2x00_post_work(vha, e);
5121 }
5122
5123 /* Relogins all the fcports of a vport
5124  * Context: dpc thread
5125  */
5126 void qla2x00_relogin(struct scsi_qla_host *vha)
5127 {
5128         fc_port_t       *fcport;
5129         int status, relogin_needed = 0;
5130         struct event_arg ea;
5131
5132         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5133                 /*
5134                  * If the port is not ONLINE then try to login
5135                  * to it if we haven't run out of retries.
5136                  */
5137                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5138                     fcport->login_retry) {
5139                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5140                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5141                                 continue;
5142
5143                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5144                                 fcport->disc_state == DSC_DELETE_PEND) {
5145                                 relogin_needed = 1;
5146                         } else {
5147                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5148                                         memset(&ea, 0, sizeof(ea));
5149                                         ea.event = FCME_RELOGIN;
5150                                         ea.fcport = fcport;
5151                                         qla2x00_fcport_event_handler(vha, &ea);
5152                                 } else if (vha->hw->current_topology ==
5153                                     ISP_CFG_NL) {
5154                                         fcport->login_retry--;
5155                                         status =
5156                                             qla2x00_local_device_login(vha,
5157                                                 fcport);
5158                                         if (status == QLA_SUCCESS) {
5159                                                 fcport->old_loop_id =
5160                                                     fcport->loop_id;
5161                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5162                                                     "Port login OK: logged in ID 0x%x.\n",
5163                                                     fcport->loop_id);
5164                                                 qla2x00_update_fcport
5165                                                         (vha, fcport);
5166                                         } else if (status == 1) {
5167                                                 set_bit(RELOGIN_NEEDED,
5168                                                     &vha->dpc_flags);
5169                                                 /* retry the login again */
5170                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5171                                                     "Retrying %d login again loop_id 0x%x.\n",
5172                                                     fcport->login_retry,
5173                                                     fcport->loop_id);
5174                                         } else {
5175                                                 fcport->login_retry = 0;
5176                                         }
5177
5178                                         if (fcport->login_retry == 0 &&
5179                                             status != QLA_SUCCESS)
5180                                                 qla2x00_clear_loop_id(fcport);
5181                                 }
5182                         }
5183                 }
5184                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5185                         break;
5186         }
5187
5188         if (relogin_needed)
5189                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5190
5191         ql_dbg(ql_dbg_disc, vha, 0x400e,
5192             "Relogin end.\n");
5193 }
5194
5195 /* Schedule work on any of the dpc-workqueues */
5196 void
5197 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5198 {
5199         struct qla_hw_data *ha = base_vha->hw;
5200
5201         switch (work_code) {
5202         case MBA_IDC_AEN: /* 0x8200 */
5203                 if (ha->dpc_lp_wq)
5204                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5205                 break;
5206
5207         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5208                 if (!ha->flags.nic_core_reset_hdlr_active) {
5209                         if (ha->dpc_hp_wq)
5210                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5211                 } else
5212                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5213                             "NIC Core reset is already active. Skip "
5214                             "scheduling it again.\n");
5215                 break;
5216         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5217                 if (ha->dpc_hp_wq)
5218                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5219                 break;
5220         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5221                 if (ha->dpc_hp_wq)
5222                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5223                 break;
5224         default:
5225                 ql_log(ql_log_warn, base_vha, 0xb05f,
5226                     "Unknown work-code=0x%x.\n", work_code);
5227         }
5228
5229         return;
5230 }
5231
5232 /* Work: Perform NIC Core Unrecoverable state handling */
5233 void
5234 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5235 {
5236         struct qla_hw_data *ha =
5237                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5238         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5239         uint32_t dev_state = 0;
5240
5241         qla83xx_idc_lock(base_vha, 0);
5242         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5243         qla83xx_reset_ownership(base_vha);
5244         if (ha->flags.nic_core_reset_owner) {
5245                 ha->flags.nic_core_reset_owner = 0;
5246                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5247                     QLA8XXX_DEV_FAILED);
5248                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5249                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5250         }
5251         qla83xx_idc_unlock(base_vha, 0);
5252 }
5253
5254 /* Work: Execute IDC state handler */
5255 void
5256 qla83xx_idc_state_handler_work(struct work_struct *work)
5257 {
5258         struct qla_hw_data *ha =
5259                 container_of(work, struct qla_hw_data, idc_state_handler);
5260         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5261         uint32_t dev_state = 0;
5262
5263         qla83xx_idc_lock(base_vha, 0);
5264         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5265         if (dev_state == QLA8XXX_DEV_FAILED ||
5266                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5267                 qla83xx_idc_state_handler(base_vha);
5268         qla83xx_idc_unlock(base_vha, 0);
5269 }
5270
5271 static int
5272 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5273 {
5274         int rval = QLA_SUCCESS;
5275         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5276         uint32_t heart_beat_counter1, heart_beat_counter2;
5277
5278         do {
5279                 if (time_after(jiffies, heart_beat_wait)) {
5280                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5281                             "Nic Core f/w is not alive.\n");
5282                         rval = QLA_FUNCTION_FAILED;
5283                         break;
5284                 }
5285
5286                 qla83xx_idc_lock(base_vha, 0);
5287                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5288                     &heart_beat_counter1);
5289                 qla83xx_idc_unlock(base_vha, 0);
5290                 msleep(100);
5291                 qla83xx_idc_lock(base_vha, 0);
5292                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5293                     &heart_beat_counter2);
5294                 qla83xx_idc_unlock(base_vha, 0);
5295         } while (heart_beat_counter1 == heart_beat_counter2);
5296
5297         return rval;
5298 }
5299
5300 /* Work: Perform NIC Core Reset handling */
5301 void
5302 qla83xx_nic_core_reset_work(struct work_struct *work)
5303 {
5304         struct qla_hw_data *ha =
5305                 container_of(work, struct qla_hw_data, nic_core_reset);
5306         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5307         uint32_t dev_state = 0;
5308
5309         if (IS_QLA2031(ha)) {
5310                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5311                         ql_log(ql_log_warn, base_vha, 0xb081,
5312                             "Failed to dump mctp\n");
5313                 return;
5314         }
5315
5316         if (!ha->flags.nic_core_reset_hdlr_active) {
5317                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5318                         qla83xx_idc_lock(base_vha, 0);
5319                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5320                             &dev_state);
5321                         qla83xx_idc_unlock(base_vha, 0);
5322                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5323                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5324                                     "Nic Core f/w is alive.\n");
5325                                 return;
5326                         }
5327                 }
5328
5329                 ha->flags.nic_core_reset_hdlr_active = 1;
5330                 if (qla83xx_nic_core_reset(base_vha)) {
5331                         /* NIC Core reset failed. */
5332                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5333                             "NIC Core reset failed.\n");
5334                 }
5335                 ha->flags.nic_core_reset_hdlr_active = 0;
5336         }
5337 }
5338
5339 /* Work: Handle 8200 IDC aens */
5340 void
5341 qla83xx_service_idc_aen(struct work_struct *work)
5342 {
5343         struct qla_hw_data *ha =
5344                 container_of(work, struct qla_hw_data, idc_aen);
5345         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5346         uint32_t dev_state, idc_control;
5347
5348         qla83xx_idc_lock(base_vha, 0);
5349         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5350         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5351         qla83xx_idc_unlock(base_vha, 0);
5352         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5353                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5354                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5355                             "Application requested NIC Core Reset.\n");
5356                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5357                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5358                     QLA_SUCCESS) {
5359                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5360                             "Other protocol driver requested NIC Core Reset.\n");
5361                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5362                 }
5363         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5364                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5365                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5366         }
5367 }
5368
5369 static void
5370 qla83xx_wait_logic(void)
5371 {
5372         int i;
5373
5374         /* Yield CPU */
5375         if (!in_interrupt()) {
5376                 /*
5377                  * Wait about 200ms before retrying again.
5378                  * This controls the number of retries for single
5379                  * lock operation.
5380                  */
5381                 msleep(100);
5382                 schedule();
5383         } else {
5384                 for (i = 0; i < 20; i++)
5385                         cpu_relax(); /* This a nop instr on i386 */
5386         }
5387 }
5388
5389 static int
5390 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5391 {
5392         int rval;
5393         uint32_t data;
5394         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5395         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5396         struct qla_hw_data *ha = base_vha->hw;
5397         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5398             "Trying force recovery of the IDC lock.\n");
5399
5400         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5401         if (rval)
5402                 return rval;
5403
5404         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5405                 return QLA_SUCCESS;
5406         } else {
5407                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5408                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5409                     data);
5410                 if (rval)
5411                         return rval;
5412
5413                 msleep(200);
5414
5415                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5416                     &data);
5417                 if (rval)
5418                         return rval;
5419
5420                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5421                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5422                                         ~(idc_lck_rcvry_stage_mask));
5423                         rval = qla83xx_wr_reg(base_vha,
5424                             QLA83XX_IDC_LOCK_RECOVERY, data);
5425                         if (rval)
5426                                 return rval;
5427
5428                         /* Forcefully perform IDC UnLock */
5429                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5430                             &data);
5431                         if (rval)
5432                                 return rval;
5433                         /* Clear lock-id by setting 0xff */
5434                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5435                             0xff);
5436                         if (rval)
5437                                 return rval;
5438                         /* Clear lock-recovery by setting 0x0 */
5439                         rval = qla83xx_wr_reg(base_vha,
5440                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5441                         if (rval)
5442                                 return rval;
5443                 } else
5444                         return QLA_SUCCESS;
5445         }
5446
5447         return rval;
5448 }
5449
5450 static int
5451 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5452 {
5453         int rval = QLA_SUCCESS;
5454         uint32_t o_drv_lockid, n_drv_lockid;
5455         unsigned long lock_recovery_timeout;
5456
5457         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5458 retry_lockid:
5459         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5460         if (rval)
5461                 goto exit;
5462
5463         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5464         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5465                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5466                         return QLA_SUCCESS;
5467                 else
5468                         return QLA_FUNCTION_FAILED;
5469         }
5470
5471         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5472         if (rval)
5473                 goto exit;
5474
5475         if (o_drv_lockid == n_drv_lockid) {
5476                 qla83xx_wait_logic();
5477                 goto retry_lockid;
5478         } else
5479                 return QLA_SUCCESS;
5480
5481 exit:
5482         return rval;
5483 }
5484
5485 void
5486 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5487 {
5488         uint16_t options = (requester_id << 15) | BIT_6;
5489         uint32_t data;
5490         uint32_t lock_owner;
5491         struct qla_hw_data *ha = base_vha->hw;
5492
5493         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5494 retry_lock:
5495         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5496             == QLA_SUCCESS) {
5497                 if (data) {
5498                         /* Setting lock-id to our function-number */
5499                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5500                             ha->portnum);
5501                 } else {
5502                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5503                             &lock_owner);
5504                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5505                             "Failed to acquire IDC lock, acquired by %d, "
5506                             "retrying...\n", lock_owner);
5507
5508                         /* Retry/Perform IDC-Lock recovery */
5509                         if (qla83xx_idc_lock_recovery(base_vha)
5510                             == QLA_SUCCESS) {
5511                                 qla83xx_wait_logic();
5512                                 goto retry_lock;
5513                         } else
5514                                 ql_log(ql_log_warn, base_vha, 0xb075,
5515                                     "IDC Lock recovery FAILED.\n");
5516                 }
5517
5518         }
5519
5520         return;
5521
5522         /* XXX: IDC-lock implementation using access-control mbx */
5523 retry_lock2:
5524         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5525                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5526                     "Failed to acquire IDC lock. retrying...\n");
5527                 /* Retry/Perform IDC-Lock recovery */
5528                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5529                         qla83xx_wait_logic();
5530                         goto retry_lock2;
5531                 } else
5532                         ql_log(ql_log_warn, base_vha, 0xb076,
5533                             "IDC Lock recovery FAILED.\n");
5534         }
5535
5536         return;
5537 }
5538
5539 void
5540 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5541 {
5542 #if 0
5543         uint16_t options = (requester_id << 15) | BIT_7;
5544 #endif
5545         uint16_t retry;
5546         uint32_t data;
5547         struct qla_hw_data *ha = base_vha->hw;
5548
5549         /* IDC-unlock implementation using driver-unlock/lock-id
5550          * remote registers
5551          */
5552         retry = 0;
5553 retry_unlock:
5554         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5555             == QLA_SUCCESS) {
5556                 if (data == ha->portnum) {
5557                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5558                         /* Clearing lock-id by setting 0xff */
5559                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5560                 } else if (retry < 10) {
5561                         /* SV: XXX: IDC unlock retrying needed here? */
5562
5563                         /* Retry for IDC-unlock */
5564                         qla83xx_wait_logic();
5565                         retry++;
5566                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5567                             "Failed to release IDC lock, retrying=%d\n", retry);
5568                         goto retry_unlock;
5569                 }
5570         } else if (retry < 10) {
5571                 /* Retry for IDC-unlock */
5572                 qla83xx_wait_logic();
5573                 retry++;
5574                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5575                     "Failed to read drv-lockid, retrying=%d\n", retry);
5576                 goto retry_unlock;
5577         }
5578
5579         return;
5580
5581 #if 0
5582         /* XXX: IDC-unlock implementation using access-control mbx */
5583         retry = 0;
5584 retry_unlock2:
5585         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5586                 if (retry < 10) {
5587                         /* Retry for IDC-unlock */
5588                         qla83xx_wait_logic();
5589                         retry++;
5590                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5591                             "Failed to release IDC lock, retrying=%d\n", retry);
5592                         goto retry_unlock2;
5593                 }
5594         }
5595
5596         return;
5597 #endif
5598 }
5599
5600 int
5601 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5602 {
5603         int rval = QLA_SUCCESS;
5604         struct qla_hw_data *ha = vha->hw;
5605         uint32_t drv_presence;
5606
5607         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5608         if (rval == QLA_SUCCESS) {
5609                 drv_presence |= (1 << ha->portnum);
5610                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5611                     drv_presence);
5612         }
5613
5614         return rval;
5615 }
5616
5617 int
5618 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5619 {
5620         int rval = QLA_SUCCESS;
5621
5622         qla83xx_idc_lock(vha, 0);
5623         rval = __qla83xx_set_drv_presence(vha);
5624         qla83xx_idc_unlock(vha, 0);
5625
5626         return rval;
5627 }
5628
5629 int
5630 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5631 {
5632         int rval = QLA_SUCCESS;
5633         struct qla_hw_data *ha = vha->hw;
5634         uint32_t drv_presence;
5635
5636         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5637         if (rval == QLA_SUCCESS) {
5638                 drv_presence &= ~(1 << ha->portnum);
5639                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5640                     drv_presence);
5641         }
5642
5643         return rval;
5644 }
5645
5646 int
5647 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5648 {
5649         int rval = QLA_SUCCESS;
5650
5651         qla83xx_idc_lock(vha, 0);
5652         rval = __qla83xx_clear_drv_presence(vha);
5653         qla83xx_idc_unlock(vha, 0);
5654
5655         return rval;
5656 }
5657
5658 static void
5659 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5660 {
5661         struct qla_hw_data *ha = vha->hw;
5662         uint32_t drv_ack, drv_presence;
5663         unsigned long ack_timeout;
5664
5665         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5666         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5667         while (1) {
5668                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5669                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5670                 if ((drv_ack & drv_presence) == drv_presence)
5671                         break;
5672
5673                 if (time_after_eq(jiffies, ack_timeout)) {
5674                         ql_log(ql_log_warn, vha, 0xb067,
5675                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5676                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5677                         /*
5678                          * The function(s) which did not ack in time are forced
5679                          * to withdraw any further participation in the IDC
5680                          * reset.
5681                          */
5682                         if (drv_ack != drv_presence)
5683                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5684                                     drv_ack);
5685                         break;
5686                 }
5687
5688                 qla83xx_idc_unlock(vha, 0);
5689                 msleep(1000);
5690                 qla83xx_idc_lock(vha, 0);
5691         }
5692
5693         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5694         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5695 }
5696
5697 static int
5698 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5699 {
5700         int rval = QLA_SUCCESS;
5701         uint32_t idc_control;
5702
5703         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5704         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5705
5706         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5707         __qla83xx_get_idc_control(vha, &idc_control);
5708         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5709         __qla83xx_set_idc_control(vha, 0);
5710
5711         qla83xx_idc_unlock(vha, 0);
5712         rval = qla83xx_restart_nic_firmware(vha);
5713         qla83xx_idc_lock(vha, 0);
5714
5715         if (rval != QLA_SUCCESS) {
5716                 ql_log(ql_log_fatal, vha, 0xb06a,
5717                     "Failed to restart NIC f/w.\n");
5718                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5719                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5720         } else {
5721                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5722                     "Success in restarting nic f/w.\n");
5723                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5724                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5725         }
5726
5727         return rval;
5728 }
5729
5730 /* Assumes idc_lock always held on entry */
5731 int
5732 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5733 {
5734         struct qla_hw_data *ha = base_vha->hw;
5735         int rval = QLA_SUCCESS;
5736         unsigned long dev_init_timeout;
5737         uint32_t dev_state;
5738
5739         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5740         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5741
5742         while (1) {
5743
5744                 if (time_after_eq(jiffies, dev_init_timeout)) {
5745                         ql_log(ql_log_warn, base_vha, 0xb06e,
5746                             "Initialization TIMEOUT!\n");
5747                         /* Init timeout. Disable further NIC Core
5748                          * communication.
5749                          */
5750                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5751                                 QLA8XXX_DEV_FAILED);
5752                         ql_log(ql_log_info, base_vha, 0xb06f,
5753                             "HW State: FAILED.\n");
5754                 }
5755
5756                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5757                 switch (dev_state) {
5758                 case QLA8XXX_DEV_READY:
5759                         if (ha->flags.nic_core_reset_owner)
5760                                 qla83xx_idc_audit(base_vha,
5761                                     IDC_AUDIT_COMPLETION);
5762                         ha->flags.nic_core_reset_owner = 0;
5763                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5764                             "Reset_owner reset by 0x%x.\n",
5765                             ha->portnum);
5766                         goto exit;
5767                 case QLA8XXX_DEV_COLD:
5768                         if (ha->flags.nic_core_reset_owner)
5769                                 rval = qla83xx_device_bootstrap(base_vha);
5770                         else {
5771                         /* Wait for AEN to change device-state */
5772                                 qla83xx_idc_unlock(base_vha, 0);
5773                                 msleep(1000);
5774                                 qla83xx_idc_lock(base_vha, 0);
5775                         }
5776                         break;
5777                 case QLA8XXX_DEV_INITIALIZING:
5778                         /* Wait for AEN to change device-state */
5779                         qla83xx_idc_unlock(base_vha, 0);
5780                         msleep(1000);
5781                         qla83xx_idc_lock(base_vha, 0);
5782                         break;
5783                 case QLA8XXX_DEV_NEED_RESET:
5784                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5785                                 qla83xx_need_reset_handler(base_vha);
5786                         else {
5787                                 /* Wait for AEN to change device-state */
5788                                 qla83xx_idc_unlock(base_vha, 0);
5789                                 msleep(1000);
5790                                 qla83xx_idc_lock(base_vha, 0);
5791                         }
5792                         /* reset timeout value after need reset handler */
5793                         dev_init_timeout = jiffies +
5794                             (ha->fcoe_dev_init_timeout * HZ);
5795                         break;
5796                 case QLA8XXX_DEV_NEED_QUIESCENT:
5797                         /* XXX: DEBUG for now */
5798                         qla83xx_idc_unlock(base_vha, 0);
5799                         msleep(1000);
5800                         qla83xx_idc_lock(base_vha, 0);
5801                         break;
5802                 case QLA8XXX_DEV_QUIESCENT:
5803                         /* XXX: DEBUG for now */
5804                         if (ha->flags.quiesce_owner)
5805                                 goto exit;
5806
5807                         qla83xx_idc_unlock(base_vha, 0);
5808                         msleep(1000);
5809                         qla83xx_idc_lock(base_vha, 0);
5810                         dev_init_timeout = jiffies +
5811                             (ha->fcoe_dev_init_timeout * HZ);
5812                         break;
5813                 case QLA8XXX_DEV_FAILED:
5814                         if (ha->flags.nic_core_reset_owner)
5815                                 qla83xx_idc_audit(base_vha,
5816                                     IDC_AUDIT_COMPLETION);
5817                         ha->flags.nic_core_reset_owner = 0;
5818                         __qla83xx_clear_drv_presence(base_vha);
5819                         qla83xx_idc_unlock(base_vha, 0);
5820                         qla8xxx_dev_failed_handler(base_vha);
5821                         rval = QLA_FUNCTION_FAILED;
5822                         qla83xx_idc_lock(base_vha, 0);
5823                         goto exit;
5824                 case QLA8XXX_BAD_VALUE:
5825                         qla83xx_idc_unlock(base_vha, 0);
5826                         msleep(1000);
5827                         qla83xx_idc_lock(base_vha, 0);
5828                         break;
5829                 default:
5830                         ql_log(ql_log_warn, base_vha, 0xb071,
5831                             "Unknown Device State: %x.\n", dev_state);
5832                         qla83xx_idc_unlock(base_vha, 0);
5833                         qla8xxx_dev_failed_handler(base_vha);
5834                         rval = QLA_FUNCTION_FAILED;
5835                         qla83xx_idc_lock(base_vha, 0);
5836                         goto exit;
5837                 }
5838         }
5839
5840 exit:
5841         return rval;
5842 }
5843
5844 void
5845 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5846 {
5847         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5848             board_disable);
5849         struct pci_dev *pdev = ha->pdev;
5850         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5851
5852         ql_log(ql_log_warn, base_vha, 0x015b,
5853             "Disabling adapter.\n");
5854
5855         if (!atomic_read(&pdev->enable_cnt)) {
5856                 ql_log(ql_log_info, base_vha, 0xfffc,
5857                     "PCI device disabled, no action req for PCI error=%lx\n",
5858                     base_vha->pci_flags);
5859                 return;
5860         }
5861
5862         /*
5863          * if UNLOADING flag is already set, then continue unload,
5864          * where it was set first.
5865          */
5866         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
5867                 return;
5868
5869         qla2x00_wait_for_sess_deletion(base_vha);
5870
5871         qla2x00_delete_all_vps(ha, base_vha);
5872
5873         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5874
5875         qla2x00_dfs_remove(base_vha);
5876
5877         qla84xx_put_chip(base_vha);
5878
5879         if (base_vha->timer_active)
5880                 qla2x00_stop_timer(base_vha);
5881
5882         base_vha->flags.online = 0;
5883
5884         qla2x00_destroy_deferred_work(ha);
5885
5886         /*
5887          * Do not try to stop beacon blink as it will issue a mailbox
5888          * command.
5889          */
5890         qla2x00_free_sysfs_attr(base_vha, false);
5891
5892         fc_remove_host(base_vha->host);
5893
5894         scsi_remove_host(base_vha->host);
5895
5896         base_vha->flags.init_done = 0;
5897         qla25xx_delete_queues(base_vha);
5898         qla2x00_free_fcports(base_vha);
5899         qla2x00_free_irqs(base_vha);
5900         qla2x00_mem_free(ha);
5901         qla82xx_md_free(base_vha);
5902         qla2x00_free_queues(ha);
5903
5904         qla2x00_unmap_iobases(ha);
5905
5906         pci_release_selected_regions(ha->pdev, ha->bars);
5907         pci_disable_pcie_error_reporting(pdev);
5908         pci_disable_device(pdev);
5909
5910         /*
5911          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5912          */
5913 }
5914
5915 /**************************************************************************
5916 * qla2x00_do_dpc
5917 *   This kernel thread is a task that is schedule by the interrupt handler
5918 *   to perform the background processing for interrupts.
5919 *
5920 * Notes:
5921 * This task always run in the context of a kernel thread.  It
5922 * is kick-off by the driver's detect code and starts up
5923 * up one per adapter. It immediately goes to sleep and waits for
5924 * some fibre event.  When either the interrupt handler or
5925 * the timer routine detects a event it will one of the task
5926 * bits then wake us up.
5927 **************************************************************************/
5928 static int
5929 qla2x00_do_dpc(void *data)
5930 {
5931         scsi_qla_host_t *base_vha;
5932         struct qla_hw_data *ha;
5933         uint32_t online;
5934         struct qla_qpair *qpair;
5935
5936         ha = (struct qla_hw_data *)data;
5937         base_vha = pci_get_drvdata(ha->pdev);
5938
5939         set_user_nice(current, MIN_NICE);
5940
5941         set_current_state(TASK_INTERRUPTIBLE);
5942         while (!kthread_should_stop()) {
5943                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5944                     "DPC handler sleeping.\n");
5945
5946                 schedule();
5947
5948                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5949                         goto end_loop;
5950
5951                 if (ha->flags.eeh_busy) {
5952                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5953                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5954                         goto end_loop;
5955                 }
5956
5957                 ha->dpc_active = 1;
5958
5959                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5960                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5961                     base_vha->dpc_flags);
5962
5963                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5964                         break;
5965
5966                 if (IS_P3P_TYPE(ha)) {
5967                         if (IS_QLA8044(ha)) {
5968                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5969                                         &base_vha->dpc_flags)) {
5970                                         qla8044_idc_lock(ha);
5971                                         qla8044_wr_direct(base_vha,
5972                                                 QLA8044_CRB_DEV_STATE_INDEX,
5973                                                 QLA8XXX_DEV_FAILED);
5974                                         qla8044_idc_unlock(ha);
5975                                         ql_log(ql_log_info, base_vha, 0x4004,
5976                                                 "HW State: FAILED.\n");
5977                                         qla8044_device_state_handler(base_vha);
5978                                         continue;
5979                                 }
5980
5981                         } else {
5982                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5983                                         &base_vha->dpc_flags)) {
5984                                         qla82xx_idc_lock(ha);
5985                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5986                                                 QLA8XXX_DEV_FAILED);
5987                                         qla82xx_idc_unlock(ha);
5988                                         ql_log(ql_log_info, base_vha, 0x0151,
5989                                                 "HW State: FAILED.\n");
5990                                         qla82xx_device_state_handler(base_vha);
5991                                         continue;
5992                                 }
5993                         }
5994
5995                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5996                                 &base_vha->dpc_flags)) {
5997
5998                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5999                                     "FCoE context reset scheduled.\n");
6000                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6001                                         &base_vha->dpc_flags))) {
6002                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6003                                                 /* FCoE-ctx reset failed.
6004                                                  * Escalate to chip-reset
6005                                                  */
6006                                                 set_bit(ISP_ABORT_NEEDED,
6007                                                         &base_vha->dpc_flags);
6008                                         }
6009                                         clear_bit(ABORT_ISP_ACTIVE,
6010                                                 &base_vha->dpc_flags);
6011                                 }
6012
6013                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6014                                     "FCoE context reset end.\n");
6015                         }
6016                 } else if (IS_QLAFX00(ha)) {
6017                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6018                                 &base_vha->dpc_flags)) {
6019                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6020                                     "Firmware Reset Recovery\n");
6021                                 if (qlafx00_reset_initialize(base_vha)) {
6022                                         /* Failed. Abort isp later. */
6023                                         if (!test_bit(UNLOADING,
6024                                             &base_vha->dpc_flags)) {
6025                                                 set_bit(ISP_UNRECOVERABLE,
6026                                                     &base_vha->dpc_flags);
6027                                                 ql_dbg(ql_dbg_dpc, base_vha,
6028                                                     0x4021,
6029                                                     "Reset Recovery Failed\n");
6030                                         }
6031                                 }
6032                         }
6033
6034                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6035                                 &base_vha->dpc_flags)) {
6036                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6037                                     "ISPFx00 Target Scan scheduled\n");
6038                                 if (qlafx00_rescan_isp(base_vha)) {
6039                                         if (!test_bit(UNLOADING,
6040                                             &base_vha->dpc_flags))
6041                                                 set_bit(ISP_UNRECOVERABLE,
6042                                                     &base_vha->dpc_flags);
6043                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6044                                             "ISPFx00 Target Scan Failed\n");
6045                                 }
6046                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6047                                     "ISPFx00 Target Scan End\n");
6048                         }
6049                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6050                                 &base_vha->dpc_flags)) {
6051                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6052                                     "ISPFx00 Host Info resend scheduled\n");
6053                                 qlafx00_fx_disc(base_vha,
6054                                     &base_vha->hw->mr.fcport,
6055                                     FXDISC_REG_HOST_INFO);
6056                         }
6057                 }
6058
6059                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6060                         &base_vha->dpc_flags) &&
6061                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6062                         qla24xx_detect_sfp(base_vha);
6063
6064                         if (ha->flags.detected_lr_sfp !=
6065                             ha->flags.using_lr_setting)
6066                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6067                 }
6068
6069                 if (test_and_clear_bit
6070                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6071                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6072                         bool do_reset = true;
6073
6074                         switch (ql2x_ini_mode) {
6075                         case QLA2XXX_INI_MODE_ENABLED:
6076                                 break;
6077                         case QLA2XXX_INI_MODE_DISABLED:
6078                                 if (!qla_tgt_mode_enabled(base_vha))
6079                                         do_reset = false;
6080                                 break;
6081                         case QLA2XXX_INI_MODE_DUAL:
6082                                 if (!qla_dual_mode_enabled(base_vha))
6083                                         do_reset = false;
6084                                 break;
6085                         default:
6086                                 break;
6087                         }
6088
6089                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6090                             &base_vha->dpc_flags))) {
6091                                 base_vha->flags.online = 1;
6092                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6093                                     "ISP abort scheduled.\n");
6094                                 if (ha->isp_ops->abort_isp(base_vha)) {
6095                                         /* failed. retry later */
6096                                         set_bit(ISP_ABORT_NEEDED,
6097                                             &base_vha->dpc_flags);
6098                                 }
6099                                 clear_bit(ABORT_ISP_ACTIVE,
6100                                                 &base_vha->dpc_flags);
6101                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6102                                     "ISP abort end.\n");
6103                         }
6104                 }
6105
6106                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6107                     &base_vha->dpc_flags)) {
6108                         qla2x00_update_fcports(base_vha);
6109                 }
6110
6111                 if (IS_QLAFX00(ha))
6112                         goto loop_resync_check;
6113
6114                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6115                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6116                             "Quiescence mode scheduled.\n");
6117                         if (IS_P3P_TYPE(ha)) {
6118                                 if (IS_QLA82XX(ha))
6119                                         qla82xx_device_state_handler(base_vha);
6120                                 if (IS_QLA8044(ha))
6121                                         qla8044_device_state_handler(base_vha);
6122                                 clear_bit(ISP_QUIESCE_NEEDED,
6123                                     &base_vha->dpc_flags);
6124                                 if (!ha->flags.quiesce_owner) {
6125                                         qla2x00_perform_loop_resync(base_vha);
6126                                         if (IS_QLA82XX(ha)) {
6127                                                 qla82xx_idc_lock(ha);
6128                                                 qla82xx_clear_qsnt_ready(
6129                                                     base_vha);
6130                                                 qla82xx_idc_unlock(ha);
6131                                         } else if (IS_QLA8044(ha)) {
6132                                                 qla8044_idc_lock(ha);
6133                                                 qla8044_clear_qsnt_ready(
6134                                                     base_vha);
6135                                                 qla8044_idc_unlock(ha);
6136                                         }
6137                                 }
6138                         } else {
6139                                 clear_bit(ISP_QUIESCE_NEEDED,
6140                                     &base_vha->dpc_flags);
6141                                 qla2x00_quiesce_io(base_vha);
6142                         }
6143                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6144                             "Quiescence mode end.\n");
6145                 }
6146
6147                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6148                                 &base_vha->dpc_flags) &&
6149                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6150
6151                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6152                             "Reset marker scheduled.\n");
6153                         qla2x00_rst_aen(base_vha);
6154                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6155                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6156                             "Reset marker end.\n");
6157                 }
6158
6159                 /* Retry each device up to login retry count */
6160                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6161                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6162                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6163
6164                         if (!base_vha->relogin_jif ||
6165                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6166                                 base_vha->relogin_jif = jiffies + HZ;
6167                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6168
6169                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6170                                     "Relogin scheduled.\n");
6171                                 qla24xx_post_relogin_work(base_vha);
6172                         }
6173                 }
6174 loop_resync_check:
6175                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6176                     &base_vha->dpc_flags)) {
6177
6178                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6179                             "Loop resync scheduled.\n");
6180
6181                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6182                             &base_vha->dpc_flags))) {
6183
6184                                 qla2x00_loop_resync(base_vha);
6185
6186                                 clear_bit(LOOP_RESYNC_ACTIVE,
6187                                                 &base_vha->dpc_flags);
6188                         }
6189
6190                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6191                             "Loop resync end.\n");
6192                 }
6193
6194                 if (IS_QLAFX00(ha))
6195                         goto intr_on_check;
6196
6197                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6198                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6199                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6200                         qla2xxx_flash_npiv_conf(base_vha);
6201                 }
6202
6203 intr_on_check:
6204                 if (!ha->interrupts_on)
6205                         ha->isp_ops->enable_intrs(ha);
6206
6207                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6208                                         &base_vha->dpc_flags)) {
6209                         if (ha->beacon_blink_led == 1)
6210                                 ha->isp_ops->beacon_blink(base_vha);
6211                 }
6212
6213                 /* qpair online check */
6214                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6215                     &base_vha->dpc_flags)) {
6216                         if (ha->flags.eeh_busy ||
6217                             ha->flags.pci_channel_io_perm_failure)
6218                                 online = 0;
6219                         else
6220                                 online = 1;
6221
6222                         mutex_lock(&ha->mq_lock);
6223                         list_for_each_entry(qpair, &base_vha->qp_list,
6224                             qp_list_elem)
6225                         qpair->online = online;
6226                         mutex_unlock(&ha->mq_lock);
6227                 }
6228
6229                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
6230                         ql_log(ql_log_info, base_vha, 0xffffff,
6231                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6232                                                 ha->nvme_last_rptd_aen);
6233                         if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
6234                                 ql_log(ql_log_info, base_vha, 0xffffff,
6235                                         "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6236                                                 ha->nvme_last_rptd_aen);
6237                         }
6238                 }
6239
6240                 if (!IS_QLAFX00(ha))
6241                         qla2x00_do_dpc_all_vps(base_vha);
6242
6243                 if (test_and_clear_bit(N2N_LINK_RESET,
6244                         &base_vha->dpc_flags)) {
6245                         qla2x00_lip_reset(base_vha);
6246                 }
6247
6248                 ha->dpc_active = 0;
6249 end_loop:
6250                 set_current_state(TASK_INTERRUPTIBLE);
6251         } /* End of while(1) */
6252         __set_current_state(TASK_RUNNING);
6253
6254         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6255             "DPC handler exiting.\n");
6256
6257         /*
6258          * Make sure that nobody tries to wake us up again.
6259          */
6260         ha->dpc_active = 0;
6261
6262         /* Cleanup any residual CTX SRBs. */
6263         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6264
6265         return 0;
6266 }
6267
6268 void
6269 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6270 {
6271         struct qla_hw_data *ha = vha->hw;
6272         struct task_struct *t = ha->dpc_thread;
6273
6274         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6275                 wake_up_process(t);
6276 }
6277
6278 /*
6279 *  qla2x00_rst_aen
6280 *      Processes asynchronous reset.
6281 *
6282 * Input:
6283 *      ha  = adapter block pointer.
6284 */
6285 static void
6286 qla2x00_rst_aen(scsi_qla_host_t *vha)
6287 {
6288         if (vha->flags.online && !vha->flags.reset_active &&
6289             !atomic_read(&vha->loop_down_timer) &&
6290             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6291                 do {
6292                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6293
6294                         /*
6295                          * Issue marker command only when we are going to start
6296                          * the I/O.
6297                          */
6298                         vha->marker_needed = 1;
6299                 } while (!atomic_read(&vha->loop_down_timer) &&
6300                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6301         }
6302 }
6303
6304 /**************************************************************************
6305 *   qla2x00_timer
6306 *
6307 * Description:
6308 *   One second timer
6309 *
6310 * Context: Interrupt
6311 ***************************************************************************/
6312 void
6313 qla2x00_timer(struct timer_list *t)
6314 {
6315         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6316         unsigned long   cpu_flags = 0;
6317         int             start_dpc = 0;
6318         int             index;
6319         srb_t           *sp;
6320         uint16_t        w;
6321         struct qla_hw_data *ha = vha->hw;
6322         struct req_que *req;
6323
6324         if (ha->flags.eeh_busy) {
6325                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6326                     "EEH = %d, restarting timer.\n",
6327                     ha->flags.eeh_busy);
6328                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6329                 return;
6330         }
6331
6332         /*
6333          * Hardware read to raise pending EEH errors during mailbox waits. If
6334          * the read returns -1 then disable the board.
6335          */
6336         if (!pci_channel_offline(ha->pdev)) {
6337                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6338                 qla2x00_check_reg16_for_disconnect(vha, w);
6339         }
6340
6341         /* Make sure qla82xx_watchdog is run only for physical port */
6342         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6343                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6344                         start_dpc++;
6345                 if (IS_QLA82XX(ha))
6346                         qla82xx_watchdog(vha);
6347                 else if (IS_QLA8044(ha))
6348                         qla8044_watchdog(vha);
6349         }
6350
6351         if (!vha->vp_idx && IS_QLAFX00(ha))
6352                 qlafx00_timer_routine(vha);
6353
6354         /* Loop down handler. */
6355         if (atomic_read(&vha->loop_down_timer) > 0 &&
6356             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6357             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6358                 && vha->flags.online) {
6359
6360                 if (atomic_read(&vha->loop_down_timer) ==
6361                     vha->loop_down_abort_time) {
6362
6363                         ql_log(ql_log_info, vha, 0x6008,
6364                             "Loop down - aborting the queues before time expires.\n");
6365
6366                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6367                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6368
6369                         /*
6370                          * Schedule an ISP abort to return any FCP2-device
6371                          * commands.
6372                          */
6373                         /* NPIV - scan physical port only */
6374                         if (!vha->vp_idx) {
6375                                 spin_lock_irqsave(&ha->hardware_lock,
6376                                     cpu_flags);
6377                                 req = ha->req_q_map[0];
6378                                 for (index = 1;
6379                                     index < req->num_outstanding_cmds;
6380                                     index++) {
6381                                         fc_port_t *sfcp;
6382
6383                                         sp = req->outstanding_cmds[index];
6384                                         if (!sp)
6385                                                 continue;
6386                                         if (sp->cmd_type != TYPE_SRB)
6387                                                 continue;
6388                                         if (sp->type != SRB_SCSI_CMD)
6389                                                 continue;
6390                                         sfcp = sp->fcport;
6391                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6392                                                 continue;
6393
6394                                         if (IS_QLA82XX(ha))
6395                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6396                                                         &vha->dpc_flags);
6397                                         else
6398                                                 set_bit(ISP_ABORT_NEEDED,
6399                                                         &vha->dpc_flags);
6400                                         break;
6401                                 }
6402                                 spin_unlock_irqrestore(&ha->hardware_lock,
6403                                                                 cpu_flags);
6404                         }
6405                         start_dpc++;
6406                 }
6407
6408                 /* if the loop has been down for 4 minutes, reinit adapter */
6409                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6410                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6411                                 ql_log(ql_log_warn, vha, 0x6009,
6412                                     "Loop down - aborting ISP.\n");
6413
6414                                 if (IS_QLA82XX(ha))
6415                                         set_bit(FCOE_CTX_RESET_NEEDED,
6416                                                 &vha->dpc_flags);
6417                                 else
6418                                         set_bit(ISP_ABORT_NEEDED,
6419                                                 &vha->dpc_flags);
6420                         }
6421                 }
6422                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6423                     "Loop down - seconds remaining %d.\n",
6424                     atomic_read(&vha->loop_down_timer));
6425         }
6426         /* Check if beacon LED needs to be blinked for physical host only */
6427         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6428                 /* There is no beacon_blink function for ISP82xx */
6429                 if (!IS_P3P_TYPE(ha)) {
6430                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6431                         start_dpc++;
6432                 }
6433         }
6434
6435         /* Process any deferred work. */
6436         if (!list_empty(&vha->work_list)) {
6437                 unsigned long flags;
6438                 bool q = false;
6439
6440                 spin_lock_irqsave(&vha->work_lock, flags);
6441                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6442                         q = true;
6443                 spin_unlock_irqrestore(&vha->work_lock, flags);
6444                 if (q)
6445                         queue_work(vha->hw->wq, &vha->iocb_work);
6446         }
6447
6448         /*
6449          * FC-NVME
6450          * see if the active AEN count has changed from what was last reported.
6451          */
6452         if (!vha->vp_idx &&
6453                 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6454                 ha->zio_mode == QLA_ZIO_MODE_6) {
6455                 ql_log(ql_log_info, vha, 0x3002,
6456                         "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6457                         ha->nvme_last_rptd_aen);
6458                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6459                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6460                 start_dpc++;
6461         }
6462
6463         /* Schedule the DPC routine if needed */
6464         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6465             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6466             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6467             start_dpc ||
6468             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6469             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6470             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6471             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6472             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6473             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6474                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6475                     "isp_abort_needed=%d loop_resync_needed=%d "
6476                     "fcport_update_needed=%d start_dpc=%d "
6477                     "reset_marker_needed=%d",
6478                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6479                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6480                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6481                     start_dpc,
6482                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6483                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6484                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6485                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6486                     "relogin_needed=%d.\n",
6487                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6488                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6489                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6490                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6491                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6492                 qla2xxx_wake_dpc(vha);
6493         }
6494
6495         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6496 }
6497
6498 /* Firmware interface routines. */
6499
6500 #define FW_BLOBS        11
6501 #define FW_ISP21XX      0
6502 #define FW_ISP22XX      1
6503 #define FW_ISP2300      2
6504 #define FW_ISP2322      3
6505 #define FW_ISP24XX      4
6506 #define FW_ISP25XX      5
6507 #define FW_ISP81XX      6
6508 #define FW_ISP82XX      7
6509 #define FW_ISP2031      8
6510 #define FW_ISP8031      9
6511 #define FW_ISP27XX      10
6512
6513 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
6514 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
6515 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
6516 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
6517 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
6518 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
6519 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
6520 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
6521 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
6522 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
6523 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
6524
6525
6526 static DEFINE_MUTEX(qla_fw_lock);
6527
6528 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6529         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6530         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6531         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6532         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6533         { .name = FW_FILE_ISP24XX, },
6534         { .name = FW_FILE_ISP25XX, },
6535         { .name = FW_FILE_ISP81XX, },
6536         { .name = FW_FILE_ISP82XX, },
6537         { .name = FW_FILE_ISP2031, },
6538         { .name = FW_FILE_ISP8031, },
6539         { .name = FW_FILE_ISP27XX, },
6540 };
6541
6542 struct fw_blob *
6543 qla2x00_request_firmware(scsi_qla_host_t *vha)
6544 {
6545         struct qla_hw_data *ha = vha->hw;
6546         struct fw_blob *blob;
6547
6548         if (IS_QLA2100(ha)) {
6549                 blob = &qla_fw_blobs[FW_ISP21XX];
6550         } else if (IS_QLA2200(ha)) {
6551                 blob = &qla_fw_blobs[FW_ISP22XX];
6552         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6553                 blob = &qla_fw_blobs[FW_ISP2300];
6554         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6555                 blob = &qla_fw_blobs[FW_ISP2322];
6556         } else if (IS_QLA24XX_TYPE(ha)) {
6557                 blob = &qla_fw_blobs[FW_ISP24XX];
6558         } else if (IS_QLA25XX(ha)) {
6559                 blob = &qla_fw_blobs[FW_ISP25XX];
6560         } else if (IS_QLA81XX(ha)) {
6561                 blob = &qla_fw_blobs[FW_ISP81XX];
6562         } else if (IS_QLA82XX(ha)) {
6563                 blob = &qla_fw_blobs[FW_ISP82XX];
6564         } else if (IS_QLA2031(ha)) {
6565                 blob = &qla_fw_blobs[FW_ISP2031];
6566         } else if (IS_QLA8031(ha)) {
6567                 blob = &qla_fw_blobs[FW_ISP8031];
6568         } else if (IS_QLA27XX(ha)) {
6569                 blob = &qla_fw_blobs[FW_ISP27XX];
6570         } else {
6571                 return NULL;
6572         }
6573
6574         mutex_lock(&qla_fw_lock);
6575         if (blob->fw)
6576                 goto out;
6577
6578         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6579                 ql_log(ql_log_warn, vha, 0x0063,
6580                     "Failed to load firmware image (%s).\n", blob->name);
6581                 blob->fw = NULL;
6582                 blob = NULL;
6583                 goto out;
6584         }
6585
6586 out:
6587         mutex_unlock(&qla_fw_lock);
6588         return blob;
6589 }
6590
6591 static void
6592 qla2x00_release_firmware(void)
6593 {
6594         int idx;
6595
6596         mutex_lock(&qla_fw_lock);
6597         for (idx = 0; idx < FW_BLOBS; idx++)
6598                 release_firmware(qla_fw_blobs[idx].fw);
6599         mutex_unlock(&qla_fw_lock);
6600 }
6601
6602 static pci_ers_result_t
6603 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6604 {
6605         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6606         struct qla_hw_data *ha = vha->hw;
6607
6608         ql_dbg(ql_dbg_aer, vha, 0x9000,
6609             "PCI error detected, state %x.\n", state);
6610
6611         if (!atomic_read(&pdev->enable_cnt)) {
6612                 ql_log(ql_log_info, vha, 0xffff,
6613                         "PCI device is disabled,state %x\n", state);
6614                 return PCI_ERS_RESULT_NEED_RESET;
6615         }
6616
6617         switch (state) {
6618         case pci_channel_io_normal:
6619                 ha->flags.eeh_busy = 0;
6620                 if (ql2xmqsupport || ql2xnvmeenable) {
6621                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6622                         qla2xxx_wake_dpc(vha);
6623                 }
6624                 return PCI_ERS_RESULT_CAN_RECOVER;
6625         case pci_channel_io_frozen:
6626                 ha->flags.eeh_busy = 1;
6627                 /* For ISP82XX complete any pending mailbox cmd */
6628                 if (IS_QLA82XX(ha)) {
6629                         ha->flags.isp82xx_fw_hung = 1;
6630                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6631                         qla82xx_clear_pending_mbx(vha);
6632                 }
6633                 qla2x00_free_irqs(vha);
6634                 pci_disable_device(pdev);
6635                 /* Return back all IOs */
6636                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6637                 if (ql2xmqsupport || ql2xnvmeenable) {
6638                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6639                         qla2xxx_wake_dpc(vha);
6640                 }
6641                 return PCI_ERS_RESULT_NEED_RESET;
6642         case pci_channel_io_perm_failure:
6643                 ha->flags.pci_channel_io_perm_failure = 1;
6644                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6645                 if (ql2xmqsupport || ql2xnvmeenable) {
6646                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6647                         qla2xxx_wake_dpc(vha);
6648                 }
6649                 return PCI_ERS_RESULT_DISCONNECT;
6650         }
6651         return PCI_ERS_RESULT_NEED_RESET;
6652 }
6653
6654 static pci_ers_result_t
6655 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6656 {
6657         int risc_paused = 0;
6658         uint32_t stat;
6659         unsigned long flags;
6660         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6661         struct qla_hw_data *ha = base_vha->hw;
6662         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6663         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6664
6665         if (IS_QLA82XX(ha))
6666                 return PCI_ERS_RESULT_RECOVERED;
6667
6668         spin_lock_irqsave(&ha->hardware_lock, flags);
6669         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6670                 stat = RD_REG_DWORD(&reg->hccr);
6671                 if (stat & HCCR_RISC_PAUSE)
6672                         risc_paused = 1;
6673         } else if (IS_QLA23XX(ha)) {
6674                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6675                 if (stat & HSR_RISC_PAUSED)
6676                         risc_paused = 1;
6677         } else if (IS_FWI2_CAPABLE(ha)) {
6678                 stat = RD_REG_DWORD(&reg24->host_status);
6679                 if (stat & HSRX_RISC_PAUSED)
6680                         risc_paused = 1;
6681         }
6682         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6683
6684         if (risc_paused) {
6685                 ql_log(ql_log_info, base_vha, 0x9003,
6686                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6687                 ha->isp_ops->fw_dump(base_vha, 0);
6688
6689                 return PCI_ERS_RESULT_NEED_RESET;
6690         } else
6691                 return PCI_ERS_RESULT_RECOVERED;
6692 }
6693
6694 static uint32_t
6695 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6696 {
6697         uint32_t rval = QLA_FUNCTION_FAILED;
6698         uint32_t drv_active = 0;
6699         struct qla_hw_data *ha = base_vha->hw;
6700         int fn;
6701         struct pci_dev *other_pdev = NULL;
6702
6703         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6704             "Entered %s.\n", __func__);
6705
6706         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6707
6708         if (base_vha->flags.online) {
6709                 /* Abort all outstanding commands,
6710                  * so as to be requeued later */
6711                 qla2x00_abort_isp_cleanup(base_vha);
6712         }
6713
6714
6715         fn = PCI_FUNC(ha->pdev->devfn);
6716         while (fn > 0) {
6717                 fn--;
6718                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6719                     "Finding pci device at function = 0x%x.\n", fn);
6720                 other_pdev =
6721                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6722                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6723                     fn));
6724
6725                 if (!other_pdev)
6726                         continue;
6727                 if (atomic_read(&other_pdev->enable_cnt)) {
6728                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6729                             "Found PCI func available and enable at 0x%x.\n",
6730                             fn);
6731                         pci_dev_put(other_pdev);
6732                         break;
6733                 }
6734                 pci_dev_put(other_pdev);
6735         }
6736
6737         if (!fn) {
6738                 /* Reset owner */
6739                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6740                     "This devfn is reset owner = 0x%x.\n",
6741                     ha->pdev->devfn);
6742                 qla82xx_idc_lock(ha);
6743
6744                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6745                     QLA8XXX_DEV_INITIALIZING);
6746
6747                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6748                     QLA82XX_IDC_VERSION);
6749
6750                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6751                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6752                     "drv_active = 0x%x.\n", drv_active);
6753
6754                 qla82xx_idc_unlock(ha);
6755                 /* Reset if device is not already reset
6756                  * drv_active would be 0 if a reset has already been done
6757                  */
6758                 if (drv_active)
6759                         rval = qla82xx_start_firmware(base_vha);
6760                 else
6761                         rval = QLA_SUCCESS;
6762                 qla82xx_idc_lock(ha);
6763
6764                 if (rval != QLA_SUCCESS) {
6765                         ql_log(ql_log_info, base_vha, 0x900b,
6766                             "HW State: FAILED.\n");
6767                         qla82xx_clear_drv_active(ha);
6768                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6769                             QLA8XXX_DEV_FAILED);
6770                 } else {
6771                         ql_log(ql_log_info, base_vha, 0x900c,
6772                             "HW State: READY.\n");
6773                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6774                             QLA8XXX_DEV_READY);
6775                         qla82xx_idc_unlock(ha);
6776                         ha->flags.isp82xx_fw_hung = 0;
6777                         rval = qla82xx_restart_isp(base_vha);
6778                         qla82xx_idc_lock(ha);
6779                         /* Clear driver state register */
6780                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6781                         qla82xx_set_drv_active(base_vha);
6782                 }
6783                 qla82xx_idc_unlock(ha);
6784         } else {
6785                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6786                     "This devfn is not reset owner = 0x%x.\n",
6787                     ha->pdev->devfn);
6788                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6789                     QLA8XXX_DEV_READY)) {
6790                         ha->flags.isp82xx_fw_hung = 0;
6791                         rval = qla82xx_restart_isp(base_vha);
6792                         qla82xx_idc_lock(ha);
6793                         qla82xx_set_drv_active(base_vha);
6794                         qla82xx_idc_unlock(ha);
6795                 }
6796         }
6797         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6798
6799         return rval;
6800 }
6801
6802 static pci_ers_result_t
6803 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6804 {
6805         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6806         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6807         struct qla_hw_data *ha = base_vha->hw;
6808         struct rsp_que *rsp;
6809         int rc, retries = 10;
6810
6811         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6812             "Slot Reset.\n");
6813
6814         /* Workaround: qla2xxx driver which access hardware earlier
6815          * needs error state to be pci_channel_io_online.
6816          * Otherwise mailbox command timesout.
6817          */
6818         pdev->error_state = pci_channel_io_normal;
6819
6820         pci_restore_state(pdev);
6821
6822         /* pci_restore_state() clears the saved_state flag of the device
6823          * save restored state which resets saved_state flag
6824          */
6825         pci_save_state(pdev);
6826
6827         if (ha->mem_only)
6828                 rc = pci_enable_device_mem(pdev);
6829         else
6830                 rc = pci_enable_device(pdev);
6831
6832         if (rc) {
6833                 ql_log(ql_log_warn, base_vha, 0x9005,
6834                     "Can't re-enable PCI device after reset.\n");
6835                 goto exit_slot_reset;
6836         }
6837
6838         rsp = ha->rsp_q_map[0];
6839         if (qla2x00_request_irqs(ha, rsp))
6840                 goto exit_slot_reset;
6841
6842         if (ha->isp_ops->pci_config(base_vha))
6843                 goto exit_slot_reset;
6844
6845         if (IS_QLA82XX(ha)) {
6846                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6847                         ret = PCI_ERS_RESULT_RECOVERED;
6848                         goto exit_slot_reset;
6849                 } else
6850                         goto exit_slot_reset;
6851         }
6852
6853         while (ha->flags.mbox_busy && retries--)
6854                 msleep(1000);
6855
6856         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6857         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6858                 ret =  PCI_ERS_RESULT_RECOVERED;
6859         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6860
6861
6862 exit_slot_reset:
6863         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6864             "slot_reset return %x.\n", ret);
6865
6866         return ret;
6867 }
6868
6869 static void
6870 qla2xxx_pci_resume(struct pci_dev *pdev)
6871 {
6872         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6873         struct qla_hw_data *ha = base_vha->hw;
6874         int ret;
6875
6876         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6877             "pci_resume.\n");
6878
6879         ret = qla2x00_wait_for_hba_online(base_vha);
6880         if (ret != QLA_SUCCESS) {
6881                 ql_log(ql_log_fatal, base_vha, 0x9002,
6882                     "The device failed to resume I/O from slot/link_reset.\n");
6883         }
6884
6885         pci_cleanup_aer_uncorrect_error_status(pdev);
6886
6887         ha->flags.eeh_busy = 0;
6888 }
6889
6890 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6891 {
6892         int rc;
6893         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6894
6895         if (USER_CTRL_IRQ(vha->hw))
6896                 rc = blk_mq_map_queues(&shost->tag_set);
6897         else
6898                 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev, 0);
6899         return rc;
6900 }
6901
6902 static const struct pci_error_handlers qla2xxx_err_handler = {
6903         .error_detected = qla2xxx_pci_error_detected,
6904         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6905         .slot_reset = qla2xxx_pci_slot_reset,
6906         .resume = qla2xxx_pci_resume,
6907 };
6908
6909 static struct pci_device_id qla2xxx_pci_tbl[] = {
6910         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6911         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6912         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6913         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6914         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6915         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6916         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6917         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6918         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6919         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6920         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6921         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6922         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6923         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6924         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6925         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6926         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6927         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6928         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6929         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6930         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6931         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6932         { 0 },
6933 };
6934 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6935
6936 static struct pci_driver qla2xxx_pci_driver = {
6937         .name           = QLA2XXX_DRIVER_NAME,
6938         .driver         = {
6939                 .owner          = THIS_MODULE,
6940         },
6941         .id_table       = qla2xxx_pci_tbl,
6942         .probe          = qla2x00_probe_one,
6943         .remove         = qla2x00_remove_one,
6944         .shutdown       = qla2x00_shutdown,
6945         .err_handler    = &qla2xxx_err_handler,
6946 };
6947
6948 static const struct file_operations apidev_fops = {
6949         .owner = THIS_MODULE,
6950         .llseek = noop_llseek,
6951 };
6952
6953 /**
6954  * qla2x00_module_init - Module initialization.
6955  **/
6956 static int __init
6957 qla2x00_module_init(void)
6958 {
6959         int ret = 0;
6960
6961         /* Allocate cache for SRBs. */
6962         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6963             SLAB_HWCACHE_ALIGN, NULL);
6964         if (srb_cachep == NULL) {
6965                 ql_log(ql_log_fatal, NULL, 0x0001,
6966                     "Unable to allocate SRB cache...Failing load!.\n");
6967                 return -ENOMEM;
6968         }
6969
6970         /* Initialize target kmem_cache and mem_pools */
6971         ret = qlt_init();
6972         if (ret < 0) {
6973                 goto destroy_cache;
6974         } else if (ret > 0) {
6975                 /*
6976                  * If initiator mode is explictly disabled by qlt_init(),
6977                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6978                  * performing scsi_scan_target() during LOOP UP event.
6979                  */
6980                 qla2xxx_transport_functions.disable_target_scan = 1;
6981                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6982         }
6983
6984         /* Derive version string. */
6985         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6986         if (ql2xextended_error_logging)
6987                 strcat(qla2x00_version_str, "-debug");
6988         if (ql2xextended_error_logging == 1)
6989                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6990
6991         qla2xxx_transport_template =
6992             fc_attach_transport(&qla2xxx_transport_functions);
6993         if (!qla2xxx_transport_template) {
6994                 ql_log(ql_log_fatal, NULL, 0x0002,
6995                     "fc_attach_transport failed...Failing load!.\n");
6996                 ret = -ENODEV;
6997                 goto qlt_exit;
6998         }
6999
7000         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7001         if (apidev_major < 0) {
7002                 ql_log(ql_log_fatal, NULL, 0x0003,
7003                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7004         }
7005
7006         qla2xxx_transport_vport_template =
7007             fc_attach_transport(&qla2xxx_transport_vport_functions);
7008         if (!qla2xxx_transport_vport_template) {
7009                 ql_log(ql_log_fatal, NULL, 0x0004,
7010                     "fc_attach_transport vport failed...Failing load!.\n");
7011                 ret = -ENODEV;
7012                 goto unreg_chrdev;
7013         }
7014         ql_log(ql_log_info, NULL, 0x0005,
7015             "QLogic Fibre Channel HBA Driver: %s.\n",
7016             qla2x00_version_str);
7017         ret = pci_register_driver(&qla2xxx_pci_driver);
7018         if (ret) {
7019                 ql_log(ql_log_fatal, NULL, 0x0006,
7020                     "pci_register_driver failed...ret=%d Failing load!.\n",
7021                     ret);
7022                 goto release_vport_transport;
7023         }
7024         return ret;
7025
7026 release_vport_transport:
7027         fc_release_transport(qla2xxx_transport_vport_template);
7028
7029 unreg_chrdev:
7030         if (apidev_major >= 0)
7031                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7032         fc_release_transport(qla2xxx_transport_template);
7033
7034 qlt_exit:
7035         qlt_exit();
7036
7037 destroy_cache:
7038         kmem_cache_destroy(srb_cachep);
7039         return ret;
7040 }
7041
7042 /**
7043  * qla2x00_module_exit - Module cleanup.
7044  **/
7045 static void __exit
7046 qla2x00_module_exit(void)
7047 {
7048         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7049         pci_unregister_driver(&qla2xxx_pci_driver);
7050         qla2x00_release_firmware();
7051         kmem_cache_destroy(srb_cachep);
7052         qlt_exit();
7053         if (ctx_cachep)
7054                 kmem_cache_destroy(ctx_cachep);
7055         fc_release_transport(qla2xxx_transport_template);
7056         fc_release_transport(qla2xxx_transport_vport_template);
7057 }
7058
7059 module_init(qla2x00_module_init);
7060 module_exit(qla2x00_module_exit);
7061
7062 MODULE_AUTHOR("QLogic Corporation");
7063 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7064 MODULE_LICENSE("GPL");
7065 MODULE_VERSION(QLA2XXX_VERSION);
7066 /*(DEBLOBBED)*/