drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     64
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 64.");
 122
 123 #if (IS_ENABLED(CONFIG_NVME_FC))
 124 int ql2xenabledif;
 125 #else
 126 int ql2xenabledif = 2;
 127 #endif
 128 module_param(ql2xenabledif, int, S_IRUGO);
 129 MODULE_PARM_DESC(ql2xenabledif,
 130                 " Enable T10-CRC-DIF:\n"
 131                 " Default is 2.\n"
 132                 "  0 -- No DIF Support\n"
 133                 "  1 -- Enable DIF for all types\n"
 134                 "  2 -- Enable DIF for all types, except Type 0.\n");
 135
 136 #if (IS_ENABLED(CONFIG_NVME_FC))
 137 int ql2xnvmeenable = 1;
 138 #else
 139 int ql2xnvmeenable;
 140 #endif
 141 module_param(ql2xnvmeenable, int, 0644);
 142 MODULE_PARM_DESC(ql2xnvmeenable,
 143     "Enables NVME support. "
 144     "0 - no NVMe.  Default is Y");
 145
 146 int ql2xenablehba_err_chk = 2;
 147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 149                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 150                 " Default is 2.\n"
 151                 "  0 -- Error isolation disabled\n"
 152                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 153                 "  2 -- Error isolation enabled for all Types\n");
 154
 155 int ql2xiidmaenable=1;
 156 module_param(ql2xiidmaenable, int, S_IRUGO);
 157 MODULE_PARM_DESC(ql2xiidmaenable,
 158                 "Enables iIDMA settings "
 159                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 160
 161 int ql2xmqsupport = 1;
 162 module_param(ql2xmqsupport, int, S_IRUGO);
 163 MODULE_PARM_DESC(ql2xmqsupport,
 164                 "Enable on demand multiple queue pairs support "
 165                 "Default is 1 for supported. "
 166                 "Set it to 0 to turn off mq qpair support.");
 167
 168 int ql2xfwloadbin;
 169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 171 MODULE_PARM_DESC(ql2xfwloadbin,
 172                 "Option to specify location from which to load ISP firmware:.\n"
 173                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 174                 "      interface.\n"
 175                 " 1 -- load firmware from flash.\n"
 176                 " 0 -- use default semantics.\n");
 177
 178 int ql2xetsenable;
 179 module_param(ql2xetsenable, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xetsenable,
 181                 "Enables firmware ETS burst."
 182                 "Default is 0 - skip ETS enablement.");
 183
 184 int ql2xdbwr = 1;
 185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 186 MODULE_PARM_DESC(ql2xdbwr,
 187                 "Option to specify scheme for request queue posting.\n"
 188                 " 0 -- Regular doorbell.\n"
 189                 " 1 -- CAMRAM doorbell (faster).\n");
 190
 191 int ql2xgffidenable;
 192 module_param(ql2xgffidenable, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xgffidenable,
 194                 "Enables GFF_ID checks of port type. "
 195                 "Default is 0 - Do not use GFF_ID information.");
 196
 197 int ql2xasynctmfenable = 1;
 198 module_param(ql2xasynctmfenable, int, S_IRUGO);
 199 MODULE_PARM_DESC(ql2xasynctmfenable,
 200                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 201                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 202
 203 int ql2xdontresethba;
 204 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 205 MODULE_PARM_DESC(ql2xdontresethba,
 206                 "Option to specify reset behaviour.\n"
 207                 " 0 (Default) -- Reset on failure.\n"
 208                 " 1 -- Do not reset on failure.\n");
 209
 210 uint64_t ql2xmaxlun = MAX_LUNS;
 211 module_param(ql2xmaxlun, ullong, S_IRUGO);
 212 MODULE_PARM_DESC(ql2xmaxlun,
 213                 "Defines the maximum LU number to register with the SCSI "
 214                 "midlayer. Default is 65535.");
 215
 216 int ql2xmdcapmask = 0x1F;
 217 module_param(ql2xmdcapmask, int, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmdcapmask,
 219                 "Set the Minidump driver capture mask level. "
 220                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 221
 222 int ql2xmdenable = 1;
 223 module_param(ql2xmdenable, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xmdenable,
 225                 "Enable/disable MiniDump. "
 226                 "0 - MiniDump disabled. "
 227                 "1 (Default) - MiniDump enabled.");
 228
 229 int ql2xexlogins = 0;
 230 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 231 MODULE_PARM_DESC(ql2xexlogins,
 232                  "Number of extended Logins. "
 233                  "0 (Default)- Disabled.");
 234
 235 int ql2xexchoffld = 1024;
 236 module_param(ql2xexchoffld, uint, 0644);
 237 MODULE_PARM_DESC(ql2xexchoffld,
 238         "Number of target exchanges.");
 239
 240 int ql2xiniexchg = 1024;
 241 module_param(ql2xiniexchg, uint, 0644);
 242 MODULE_PARM_DESC(ql2xiniexchg,
 243         "Number of initiator exchanges.");
 244
 245 int ql2xfwholdabts = 0;
 246 module_param(ql2xfwholdabts, int, S_IRUGO);
 247 MODULE_PARM_DESC(ql2xfwholdabts,
 248                 "Allow FW to hold status IOCB until ABTS rsp received. "
 249                 "0 (Default) Do not set fw option. "
 250                 "1 - Set fw option to hold ABTS.");
 251
 252 int ql2xmvasynctoatio = 1;
 253 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 254 MODULE_PARM_DESC(ql2xmvasynctoatio,
 255                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 256                 "0 (Default). Do not move IOCBs"
 257                 "1 - Move IOCBs.");
 258
 259 int ql2xautodetectsfp = 1;
 260 module_param(ql2xautodetectsfp, int, 0444);
 261 MODULE_PARM_DESC(ql2xautodetectsfp,
 262                  "Detect SFP range and set appropriate distance.\n"
 263                  "1 (Default): Enable\n");
 264
 265 int ql2xenablemsix = 1;
 266 module_param(ql2xenablemsix, int, 0444);
 267 MODULE_PARM_DESC(ql2xenablemsix,
 268                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 269                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 270                  " 0 -- enable traditional pin-based mechanism.\n"
 271                  " 1 -- enable MSI-X interrupt mechanism.\n"
 272                  " 2 -- enable MSI interrupt mechanism.\n");
 273
 274 int qla2xuseresexchforels;
 275 module_param(qla2xuseresexchforels, int, 0444);
 276 MODULE_PARM_DESC(qla2xuseresexchforels,
 277                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 278                  " 0 (default): disabled");
 279
 280 /*
 281  * SCSI host template entry points
 282  */
 283 static int qla2xxx_slave_configure(struct scsi_device * device);
 284 static int qla2xxx_slave_alloc(struct scsi_device *);
 285 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 286 static void qla2xxx_scan_start(struct Scsi_Host *);
 287 static void qla2xxx_slave_destroy(struct scsi_device *);
 288 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 289 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 290 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 291 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 292 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 293 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 294
 295 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 296 static void qla2x00_free_device(scsi_qla_host_t *);
 297 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 298 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 299
 300
 301 struct scsi_host_template qla2xxx_driver_template = {
 302         .module                 = THIS_MODULE,
 303         .name                   = QLA2XXX_DRIVER_NAME,
 304         .queuecommand           = qla2xxx_queuecommand,
 305
 306         .eh_timed_out           = fc_eh_timed_out,
 307         .eh_abort_handler       = qla2xxx_eh_abort,
 308         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 309         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 310         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 311         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 312
 313         .slave_configure        = qla2xxx_slave_configure,
 314
 315         .slave_alloc            = qla2xxx_slave_alloc,
 316         .slave_destroy          = qla2xxx_slave_destroy,
 317         .scan_finished          = qla2xxx_scan_finished,
 318         .scan_start             = qla2xxx_scan_start,
 319         .change_queue_depth     = scsi_change_queue_depth,
 320         .map_queues             = qla2xxx_map_queues,
 321         .this_id                = -1,
 322         .cmd_per_lun            = 3,
 323         .use_clustering         = ENABLE_CLUSTERING,
 324         .sg_tablesize           = SG_ALL,
 325
 326         .max_sectors            = 0xFFFF,
 327         .shost_attrs            = qla2x00_host_attrs,
 328
 329         .supported_mode         = MODE_INITIATOR,
 330         .track_queue_depth      = 1,
 331 };
 332
 333 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 334 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 335
 336 /* TODO Convert to inlines
 337  *
 338  * Timer routines
 339  */
 340
 341 __inline__ void
 342 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 343 {
 344         timer_setup(&vha->timer, qla2x00_timer, 0);
 345         vha->timer.expires = jiffies + interval * HZ;
 346         add_timer(&vha->timer);
 347         vha->timer_active = 1;
 348 }
 349
 350 static inline void
 351 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 352 {
 353         /* Currently used for 82XX only. */
 354         if (vha->device_flags & DFLG_DEV_FAILED) {
 355                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 356                     "Device in a failed state, returning.\n");
 357                 return;
 358         }
 359
 360         mod_timer(&vha->timer, jiffies + interval * HZ);
 361 }
 362
 363 static __inline__ void
 364 qla2x00_stop_timer(scsi_qla_host_t *vha)
 365 {
 366         del_timer_sync(&vha->timer);
 367         vha->timer_active = 0;
 368 }
 369
 370 static int qla2x00_do_dpc(void *data);
 371
 372 static void qla2x00_rst_aen(scsi_qla_host_t *);
 373
 374 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 375         struct req_que **, struct rsp_que **);
 376 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 377 static void qla2x00_mem_free(struct qla_hw_data *);
 378 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 379         struct qla_qpair *qpair);
 380
 381 /* -------------------------------------------------------------------------- */
 382 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 383     struct rsp_que *rsp)
 384 {
 385         struct qla_hw_data *ha = vha->hw;
 386         rsp->qpair = ha->base_qpair;
 387         rsp->req = req;
 388         ha->base_qpair->req = req;
 389         ha->base_qpair->rsp = rsp;
 390         ha->base_qpair->vha = vha;
 391         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 392         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 393         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 394         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 395         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 396         /* init qpair to this cpu. Will adjust at run time. */
 397         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 398         ha->base_qpair->pdev = ha->pdev;
 399
 400         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 401                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 402 }
 403
 404 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 405                                 struct rsp_que *rsp)
 406 {
 407         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 408         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 409                                 GFP_KERNEL);
 410         if (!ha->req_q_map) {
 411                 ql_log(ql_log_fatal, vha, 0x003b,
 412                     "Unable to allocate memory for request queue ptrs.\n");
 413                 goto fail_req_map;
 414         }
 415
 416         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 417                                 GFP_KERNEL);
 418         if (!ha->rsp_q_map) {
 419                 ql_log(ql_log_fatal, vha, 0x003c,
 420                     "Unable to allocate memory for response queue ptrs.\n");
 421                 goto fail_rsp_map;
 422         }
 423
 424         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 425         if (ha->base_qpair == NULL) {
 426                 ql_log(ql_log_warn, vha, 0x00e0,
 427                     "Failed to allocate base queue pair memory.\n");
 428                 goto fail_base_qpair;
 429         }
 430
 431         qla_init_base_qpair(vha, req, rsp);
 432
 433         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 434                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 435                         GFP_KERNEL);
 436                 if (!ha->queue_pair_map) {
 437                         ql_log(ql_log_fatal, vha, 0x0180,
 438                             "Unable to allocate memory for queue pair ptrs.\n");
 439                         goto fail_qpair_map;
 440                 }
 441         }
 442
 443         /*
 444          * Make sure we record at least the request and response queue zero in
 445          * case we need to free them if part of the probe fails.
 446          */
 447         ha->rsp_q_map[0] = rsp;
 448         ha->req_q_map[0] = req;
 449         set_bit(0, ha->rsp_qid_map);
 450         set_bit(0, ha->req_qid_map);
 451         return 0;
 452
 453 fail_qpair_map:
 454         kfree(ha->base_qpair);
 455         ha->base_qpair = NULL;
 456 fail_base_qpair:
 457         kfree(ha->rsp_q_map);
 458         ha->rsp_q_map = NULL;
 459 fail_rsp_map:
 460         kfree(ha->req_q_map);
 461         ha->req_q_map = NULL;
 462 fail_req_map:
 463         return -ENOMEM;
 464 }
 465
 466 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 467 {
 468         if (IS_QLAFX00(ha)) {
 469                 if (req && req->ring_fx00)
 470                         dma_free_coherent(&ha->pdev->dev,
 471                             (req->length_fx00 + 1) * sizeof(request_t),
 472                             req->ring_fx00, req->dma_fx00);
 473         } else if (req && req->ring)
 474                 dma_free_coherent(&ha->pdev->dev,
 475                 (req->length + 1) * sizeof(request_t),
 476                 req->ring, req->dma);
 477
 478         if (req)
 479                 kfree(req->outstanding_cmds);
 480
 481         kfree(req);
 482 }
 483
 484 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 485 {
 486         if (IS_QLAFX00(ha)) {
 487                 if (rsp && rsp->ring_fx00)
 488                         dma_free_coherent(&ha->pdev->dev,
 489                             (rsp->length_fx00 + 1) * sizeof(request_t),
 490                             rsp->ring_fx00, rsp->dma_fx00);
 491         } else if (rsp && rsp->ring) {
 492                 dma_free_coherent(&ha->pdev->dev,
 493                 (rsp->length + 1) * sizeof(response_t),
 494                 rsp->ring, rsp->dma);
 495         }
 496         kfree(rsp);
 497 }
 498
 499 static void qla2x00_free_queues(struct qla_hw_data *ha)
 500 {
 501         struct req_que *req;
 502         struct rsp_que *rsp;
 503         int cnt;
 504         unsigned long flags;
 505
 506         if (ha->queue_pair_map) {
 507                 kfree(ha->queue_pair_map);
 508                 ha->queue_pair_map = NULL;
 509         }
 510         if (ha->base_qpair) {
 511                 kfree(ha->base_qpair);
 512                 ha->base_qpair = NULL;
 513         }
 514
 515         spin_lock_irqsave(&ha->hardware_lock, flags);
 516         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 517                 if (!test_bit(cnt, ha->req_qid_map))
 518                         continue;
 519
 520                 req = ha->req_q_map[cnt];
 521                 clear_bit(cnt, ha->req_qid_map);
 522                 ha->req_q_map[cnt] = NULL;
 523
 524                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 525                 qla2x00_free_req_que(ha, req);
 526                 spin_lock_irqsave(&ha->hardware_lock, flags);
 527         }
 528         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529
 530         kfree(ha->req_q_map);
 531         ha->req_q_map = NULL;
 532
 533
 534         spin_lock_irqsave(&ha->hardware_lock, flags);
 535         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 536                 if (!test_bit(cnt, ha->rsp_qid_map))
 537                         continue;
 538
 539                 rsp = ha->rsp_q_map[cnt];
 540                 clear_bit(cnt, ha->rsp_qid_map);
 541                 ha->rsp_q_map[cnt] =  NULL;
 542                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 543                 qla2x00_free_rsp_que(ha, rsp);
 544                 spin_lock_irqsave(&ha->hardware_lock, flags);
 545         }
 546         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 547
 548         kfree(ha->rsp_q_map);
 549         ha->rsp_q_map = NULL;
 550 }
 551
 552 static char *
 553 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 554 {
 555         struct qla_hw_data *ha = vha->hw;
 556         static char *pci_bus_modes[] = {
 557                 "33", "66", "100", "133",
 558         };
 559         uint16_t pci_bus;
 560
 561         strcpy(str, "PCI");
 562         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 563         if (pci_bus) {
 564                 strcat(str, "-X (");
 565                 strcat(str, pci_bus_modes[pci_bus]);
 566         } else {
 567                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 568                 strcat(str, " (");
 569                 strcat(str, pci_bus_modes[pci_bus]);
 570         }
 571         strcat(str, " MHz)");
 572
 573         return (str);
 574 }
 575
 576 static char *
 577 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 578 {
 579         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 580         struct qla_hw_data *ha = vha->hw;
 581         uint32_t pci_bus;
 582
 583         if (pci_is_pcie(ha->pdev)) {
 584                 char lwstr[6];
 585                 uint32_t lstat, lspeed, lwidth;
 586
 587                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 588                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 589                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 590
 591                 strcpy(str, "PCIe (");
 592                 switch (lspeed) {
 593                 case 1:
 594                         strcat(str, "2.5GT/s ");
 595                         break;
 596                 case 2:
 597                         strcat(str, "5.0GT/s ");
 598                         break;
 599                 case 3:
 600                         strcat(str, "8.0GT/s ");
 601                         break;
 602                 default:
 603                         strcat(str, "<unknown> ");
 604                         break;
 605                 }
 606                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 607                 strcat(str, lwstr);
 608
 609                 return str;
 610         }
 611
 612         strcpy(str, "PCI");
 613         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 614         if (pci_bus == 0 || pci_bus == 8) {
 615                 strcat(str, " (");
 616                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 617         } else {
 618                 strcat(str, "-X ");
 619                 if (pci_bus & BIT_2)
 620                         strcat(str, "Mode 2");
 621                 else
 622                         strcat(str, "Mode 1");
 623                 strcat(str, " (");
 624                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 625         }
 626         strcat(str, " MHz)");
 627
 628         return str;
 629 }
 630
 631 static char *
 632 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 633 {
 634         char un_str[10];
 635         struct qla_hw_data *ha = vha->hw;
 636
 637         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 638             ha->fw_minor_version, ha->fw_subminor_version);
 639
 640         if (ha->fw_attributes & BIT_9) {
 641                 strcat(str, "FLX");
 642                 return (str);
 643         }
 644
 645         switch (ha->fw_attributes & 0xFF) {
 646         case 0x7:
 647                 strcat(str, "EF");
 648                 break;
 649         case 0x17:
 650                 strcat(str, "TP");
 651                 break;
 652         case 0x37:
 653                 strcat(str, "IP");
 654                 break;
 655         case 0x77:
 656                 strcat(str, "VI");
 657                 break;
 658         default:
 659                 sprintf(un_str, "(%x)", ha->fw_attributes);
 660                 strcat(str, un_str);
 661                 break;
 662         }
 663         if (ha->fw_attributes & 0x100)
 664                 strcat(str, "X");
 665
 666         return (str);
 667 }
 668
 669 static char *
 670 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 671 {
 672         struct qla_hw_data *ha = vha->hw;
 673
 674         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 675             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 676         return str;
 677 }
 678
 679 void
 680 qla2x00_sp_free_dma(void *ptr)
 681 {
 682         srb_t *sp = ptr;
 683         struct qla_hw_data *ha = sp->vha->hw;
 684         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 685         void *ctx = GET_CMD_CTX_SP(sp);
 686
 687         if (sp->flags & SRB_DMA_VALID) {
 688                 scsi_dma_unmap(cmd);
 689                 sp->flags &= ~SRB_DMA_VALID;
 690         }
 691
 692         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 693                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 694                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 695                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 696         }
 697
 698         if (!ctx)
 699                 goto end;
 700
 701         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 702                 /* List assured to be having elements */
 703                 qla2x00_clean_dsd_pool(ha, ctx);
 704                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 705         }
 706
 707         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 708                 struct crc_context *ctx0 = ctx;
 709
 710                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 711                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 712         }
 713
 714         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 715                 struct ct6_dsd *ctx1 = ctx;
 716
 717                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 718                     ctx1->fcp_cmnd_dma);
 719                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 720                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 721                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 722                 mempool_free(ctx1, ha->ctx_mempool);
 723         }
 724
 725 end:
 726         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 727                 CMD_SP(cmd) = NULL;
 728                 qla2x00_rel_sp(sp);
 729         }
 730 }
 731
 732 void
 733 qla2x00_sp_compl(void *ptr, int res)
 734 {
 735         srb_t *sp = ptr;
 736         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 737
 738         cmd->result = res;
 739
 740         if (atomic_read(&sp->ref_count) == 0) {
 741                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 742                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 743                     sp, GET_CMD_SP(sp));
 744                 if (ql2xextended_error_logging & ql_dbg_io)
 745                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 746                 return;
 747         }
 748         if (!atomic_dec_and_test(&sp->ref_count))
 749                 return;
 750
 751         sp->free(sp);
 752         cmd->scsi_done(cmd);
 753 }
 754
 755 void
 756 qla2xxx_qpair_sp_free_dma(void *ptr)
 757 {
 758         srb_t *sp = (srb_t *)ptr;
 759         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 760         struct qla_hw_data *ha = sp->fcport->vha->hw;
 761         void *ctx = GET_CMD_CTX_SP(sp);
 762
 763         if (sp->flags & SRB_DMA_VALID) {
 764                 scsi_dma_unmap(cmd);
 765                 sp->flags &= ~SRB_DMA_VALID;
 766         }
 767
 768         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 769                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 770                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 771                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 772         }
 773
 774         if (!ctx)
 775                 goto end;
 776
 777         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 778                 /* List assured to be having elements */
 779                 qla2x00_clean_dsd_pool(ha, ctx);
 780                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 781         }
 782
 783         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 784                 struct crc_context *ctx0 = ctx;
 785
 786                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 787                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 788         }
 789
 790         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 791                 struct ct6_dsd *ctx1 = ctx;
 792                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 793                     ctx1->fcp_cmnd_dma);
 794                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 795                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 796                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 797                 mempool_free(ctx1, ha->ctx_mempool);
 798         }
 799 end:
 800         CMD_SP(cmd) = NULL;
 801         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 802 }
 803
 804 void
 805 qla2xxx_qpair_sp_compl(void *ptr, int res)
 806 {
 807         srb_t *sp = ptr;
 808         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 809
 810         cmd->result = res;
 811
 812         if (atomic_read(&sp->ref_count) == 0) {
 813                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 814                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 815                     sp, GET_CMD_SP(sp));
 816                 if (ql2xextended_error_logging & ql_dbg_io)
 817                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 818                 return;
 819         }
 820         if (!atomic_dec_and_test(&sp->ref_count))
 821                 return;
 822
 823         sp->free(sp);
 824         cmd->scsi_done(cmd);
 825 }
 826
 827 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 828  * does not have the changes necessary to avoid taking host->host_lock.
 829  */
 830 static int
 831 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 832 {
 833         scsi_qla_host_t *vha = shost_priv(host);
 834         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 835         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 836         struct qla_hw_data *ha = vha->hw;
 837         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 838         srb_t *sp;
 839         int rval;
 840         struct qla_qpair *qpair = NULL;
 841         uint32_t tag;
 842         uint16_t hwq;
 843
 844         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 845                 cmd->result = DID_NO_CONNECT << 16;
 846                 goto qc24_fail_command;
 847         }
 848
 849         if (ha->mqenable) {
 850                 if (shost_use_blk_mq(vha->host)) {
 851                         tag = blk_mq_unique_tag(cmd->request);
 852                         hwq = blk_mq_unique_tag_to_hwq(tag);
 853                         qpair = ha->queue_pair_map[hwq];
 854                 } else if (vha->vp_idx && vha->qpair) {
 855                         qpair = vha->qpair;
 856                 }
 857
 858                 if (qpair)
 859                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 860         }
 861
 862         if (ha->flags.eeh_busy) {
 863                 if (ha->flags.pci_channel_io_perm_failure) {
 864                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 865                             "PCI Channel IO permanent failure, exiting "
 866                             "cmd=%p.\n", cmd);
 867                         cmd->result = DID_NO_CONNECT << 16;
 868                 } else {
 869                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 870                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 871                         cmd->result = DID_REQUEUE << 16;
 872                 }
 873                 goto qc24_fail_command;
 874         }
 875
 876         rval = fc_remote_port_chkready(rport);
 877         if (rval) {
 878                 cmd->result = rval;
 879                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 880                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 881                     cmd, rval);
 882                 goto qc24_fail_command;
 883         }
 884
 885         if (!vha->flags.difdix_supported &&
 886                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 887                         ql_dbg(ql_dbg_io, vha, 0x3004,
 888                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 889                             cmd);
 890                         cmd->result = DID_NO_CONNECT << 16;
 891                         goto qc24_fail_command;
 892         }
 893
 894         if (!fcport) {
 895                 cmd->result = DID_NO_CONNECT << 16;
 896                 goto qc24_fail_command;
 897         }
 898
 899         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 900                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 901                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 902                         ql_dbg(ql_dbg_io, vha, 0x3005,
 903                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 904                             atomic_read(&fcport->state),
 905                             atomic_read(&base_vha->loop_state));
 906                         cmd->result = DID_NO_CONNECT << 16;
 907                         goto qc24_fail_command;
 908                 }
 909                 goto qc24_target_busy;
 910         }
 911
 912         /*
 913          * Return target busy if we've received a non-zero retry_delay_timer
 914          * in a FCP_RSP.
 915          */
 916         if (fcport->retry_delay_timestamp == 0) {
 917                 /* retry delay not set */
 918         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 919                 fcport->retry_delay_timestamp = 0;
 920         else
 921                 goto qc24_target_busy;
 922
 923         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 924         if (!sp)
 925                 goto qc24_host_busy;
 926
 927         sp->u.scmd.cmd = cmd;
 928         sp->type = SRB_SCSI_CMD;
 929         atomic_set(&sp->ref_count, 1);
 930         CMD_SP(cmd) = (void *)sp;
 931         sp->free = qla2x00_sp_free_dma;
 932         sp->done = qla2x00_sp_compl;
 933
 934         rval = ha->isp_ops->start_scsi(sp);
 935         if (rval != QLA_SUCCESS) {
 936                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 937                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 938                 goto qc24_host_busy_free_sp;
 939         }
 940
 941         return 0;
 942
 943 qc24_host_busy_free_sp:
 944         sp->free(sp);
 945
 946 qc24_host_busy:
 947         return SCSI_MLQUEUE_HOST_BUSY;
 948
 949 qc24_target_busy:
 950         return SCSI_MLQUEUE_TARGET_BUSY;
 951
 952 qc24_fail_command:
 953         cmd->scsi_done(cmd);
 954
 955         return 0;
 956 }
 957
 958 /* For MQ supported I/O */
 959 int
 960 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 961     struct qla_qpair *qpair)
 962 {
 963         scsi_qla_host_t *vha = shost_priv(host);
 964         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 965         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 966         struct qla_hw_data *ha = vha->hw;
 967         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 968         srb_t *sp;
 969         int rval;
 970
 971         rval = fc_remote_port_chkready(rport);
 972         if (rval) {
 973                 cmd->result = rval;
 974                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 975                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 976                     cmd, rval);
 977                 goto qc24_fail_command;
 978         }
 979
 980         if (!fcport) {
 981                 cmd->result = DID_NO_CONNECT << 16;
 982                 goto qc24_fail_command;
 983         }
 984
 985         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 986                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 987                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 988                         ql_dbg(ql_dbg_io, vha, 0x3077,
 989                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 990                             atomic_read(&fcport->state),
 991                             atomic_read(&base_vha->loop_state));
 992                         cmd->result = DID_NO_CONNECT << 16;
 993                         goto qc24_fail_command;
 994                 }
 995                 goto qc24_target_busy;
 996         }
 997
 998         /*
 999          * Return target busy if we've received a non-zero retry_delay_timer
1000          * in a FCP_RSP.
1001          */
1002         if (fcport->retry_delay_timestamp == 0) {
1003                 /* retry delay not set */
1004         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1005                 fcport->retry_delay_timestamp = 0;
1006         else
1007                 goto qc24_target_busy;
1008
1009         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1010         if (!sp)
1011                 goto qc24_host_busy;
1012
1013         sp->u.scmd.cmd = cmd;
1014         sp->type = SRB_SCSI_CMD;
1015         atomic_set(&sp->ref_count, 1);
1016         CMD_SP(cmd) = (void *)sp;
1017         sp->free = qla2xxx_qpair_sp_free_dma;
1018         sp->done = qla2xxx_qpair_sp_compl;
1019         sp->qpair = qpair;
1020
1021         rval = ha->isp_ops->start_scsi_mq(sp);
1022         if (rval != QLA_SUCCESS) {
1023                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1024                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1025                 goto qc24_host_busy_free_sp;
1026         }
1027
1028         return 0;
1029
1030 qc24_host_busy_free_sp:
1031         sp->free(sp);
1032
1033 qc24_host_busy:
1034         return SCSI_MLQUEUE_HOST_BUSY;
1035
1036 qc24_target_busy:
1037         return SCSI_MLQUEUE_TARGET_BUSY;
1038
1039 qc24_fail_command:
1040         cmd->scsi_done(cmd);
1041
1042         return 0;
1043 }
1044
1045 /*
1046  * qla2x00_eh_wait_on_command
1047  *    Waits for the command to be returned by the Firmware for some
1048  *    max time.
1049  *
1050  * Input:
1051  *    cmd = Scsi Command to wait on.
1052  *
1053  * Return:
1054  *    Not Found : 0
1055  *    Found : 1
1056  */
1057 static int
1058 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1059 {
1060 #define ABORT_POLLING_PERIOD    1000
1061 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1062         unsigned long wait_iter = ABORT_WAIT_ITER;
1063         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1064         struct qla_hw_data *ha = vha->hw;
1065         int ret = QLA_SUCCESS;
1066
1067         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1068                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1069                     "Return:eh_wait.\n");
1070                 return ret;
1071         }
1072
1073         while (CMD_SP(cmd) && wait_iter--) {
1074                 msleep(ABORT_POLLING_PERIOD);
1075         }
1076         if (CMD_SP(cmd))
1077                 ret = QLA_FUNCTION_FAILED;
1078
1079         return ret;
1080 }
1081
1082 /*
1083  * qla2x00_wait_for_hba_online
1084  *    Wait till the HBA is online after going through
1085  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1086  *    finally HBA is disabled ie marked offline
1087  *
1088  * Input:
1089  *     ha - pointer to host adapter structure
1090  *
1091  * Note:
1092  *    Does context switching-Release SPIN_LOCK
1093  *    (if any) before calling this routine.
1094  *
1095  * Return:
1096  *    Success (Adapter is online) : 0
1097  *    Failed  (Adapter is offline/disabled) : 1
1098  */
1099 int
1100 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1101 {
1102         int             return_status;
1103         unsigned long   wait_online;
1104         struct qla_hw_data *ha = vha->hw;
1105         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1106
1107         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1108         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1109             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1110             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1111             ha->dpc_active) && time_before(jiffies, wait_online)) {
1112
1113                 msleep(1000);
1114         }
1115         if (base_vha->flags.online)
1116                 return_status = QLA_SUCCESS;
1117         else
1118                 return_status = QLA_FUNCTION_FAILED;
1119
1120         return (return_status);
1121 }
1122
1123 static inline int test_fcport_count(scsi_qla_host_t *vha)
1124 {
1125         struct qla_hw_data *ha = vha->hw;
1126         unsigned long flags;
1127         int res;
1128
1129         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1130         ql_dbg(ql_dbg_init, vha, 0x00ec,
1131             "tgt %p, fcport_count=%d\n",
1132             vha, vha->fcport_count);
1133         res = (vha->fcport_count == 0);
1134         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1135
1136         return res;
1137 }
1138
1139 /*
1140  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1141  * it has dependency on UNLOADING flag to stop device discovery
1142  */
1143 void
1144 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1145 {
1146         qla2x00_mark_all_devices_lost(vha, 0);
1147
1148         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1149 }
1150
1151 /*
1152  * qla2x00_wait_for_hba_ready
1153  * Wait till the HBA is ready before doing driver unload
1154  *
1155  * Input:
1156  *     ha - pointer to host adapter structure
1157  *
1158  * Note:
1159  *    Does context switching-Release SPIN_LOCK
1160  *    (if any) before calling this routine.
1161  *
1162  */
1163 static void
1164 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1165 {
1166         struct qla_hw_data *ha = vha->hw;
1167         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1168
1169         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1170                 ha->flags.mbox_busy) ||
1171                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1172                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1173                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1174                         break;
1175                 msleep(1000);
1176         }
1177 }
1178
1179 int
1180 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1181 {
1182         int             return_status;
1183         unsigned long   wait_reset;
1184         struct qla_hw_data *ha = vha->hw;
1185         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1186
1187         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1188         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1189             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1190             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1191             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1192
1193                 msleep(1000);
1194
1195                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1196                     ha->flags.chip_reset_done)
1197                         break;
1198         }
1199         if (ha->flags.chip_reset_done)
1200                 return_status = QLA_SUCCESS;
1201         else
1202                 return_status = QLA_FUNCTION_FAILED;
1203
1204         return return_status;
1205 }
1206
1207 static void
1208 sp_get(struct srb *sp)
1209 {
1210         atomic_inc(&sp->ref_count);
1211 }
1212
1213 #define ISP_REG_DISCONNECT 0xffffffffU
1214 /**************************************************************************
1215 * qla2x00_isp_reg_stat
1216 *
1217 * Description:
1218 *       Read the host status register of ISP before aborting the command.
1219 *
1220 * Input:
1221 *       ha = pointer to host adapter structure.
1222 *
1223 *
1224 * Returns:
1225 *       Either true or false.
1226 *
1227 * Note: Return true if there is register disconnect.
1228 **************************************************************************/
1229 static inline
1230 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1231 {
1232         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1233         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1234
1235         if (IS_P3P_TYPE(ha))
1236                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1237         else
1238                 return ((RD_REG_DWORD(&reg->host_status)) ==
1239                         ISP_REG_DISCONNECT);
1240 }
1241
1242 /**************************************************************************
1243 * qla2xxx_eh_abort
1244 *
1245 * Description:
1246 *    The abort function will abort the specified command.
1247 *
1248 * Input:
1249 *    cmd = Linux SCSI command packet to be aborted.
1250 *
1251 * Returns:
1252 *    Either SUCCESS or FAILED.
1253 *
1254 * Note:
1255 *    Only return FAILED if command not returned by firmware.
1256 **************************************************************************/
1257 static int
1258 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1259 {
1260         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1261         srb_t *sp;
1262         int ret;
1263         unsigned int id;
1264         uint64_t lun;
1265         unsigned long flags;
1266         int rval, wait = 0;
1267         struct qla_hw_data *ha = vha->hw;
1268
1269         if (qla2x00_isp_reg_stat(ha)) {
1270                 ql_log(ql_log_info, vha, 0x8042,
1271                     "PCI/Register disconnect, exiting.\n");
1272                 return FAILED;
1273         }
1274         if (!CMD_SP(cmd))
1275                 return SUCCESS;
1276
1277         ret = fc_block_scsi_eh(cmd);
1278         if (ret != 0)
1279                 return ret;
1280         ret = SUCCESS;
1281
1282         id = cmd->device->id;
1283         lun = cmd->device->lun;
1284
1285         spin_lock_irqsave(&ha->hardware_lock, flags);
1286         sp = (srb_t *) CMD_SP(cmd);
1287         if (!sp) {
1288                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1289                 return SUCCESS;
1290         }
1291
1292         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1293             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1294             vha->host_no, id, lun, sp, cmd, sp->handle);
1295
1296         /* Get a reference to the sp and drop the lock.*/
1297         sp_get(sp);
1298
1299         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1300         rval = ha->isp_ops->abort_command(sp);
1301         if (rval) {
1302                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1303                         ret = SUCCESS;
1304                 else
1305                         ret = FAILED;
1306
1307                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1308                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1309         } else {
1310                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1311                     "Abort command mbx success cmd=%p.\n", cmd);
1312                 wait = 1;
1313         }
1314
1315         spin_lock_irqsave(&ha->hardware_lock, flags);
1316         sp->done(sp, 0);
1317         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1318
1319         /* Did the command return during mailbox execution? */
1320         if (ret == FAILED && !CMD_SP(cmd))
1321                 ret = SUCCESS;
1322
1323         /* Wait for the command to be returned. */
1324         if (wait) {
1325                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1326                         ql_log(ql_log_warn, vha, 0x8006,
1327                             "Abort handler timed out cmd=%p.\n", cmd);
1328                         ret = FAILED;
1329                 }
1330         }
1331
1332         ql_log(ql_log_info, vha, 0x801c,
1333             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1334             vha->host_no, id, lun, wait, ret);
1335
1336         return ret;
1337 }
1338
1339 int
1340 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1341         uint64_t l, enum nexus_wait_type type)
1342 {
1343         int cnt, match, status;
1344         unsigned long flags;
1345         struct qla_hw_data *ha = vha->hw;
1346         struct req_que *req;
1347         srb_t *sp;
1348         struct scsi_cmnd *cmd;
1349
1350         status = QLA_SUCCESS;
1351
1352         spin_lock_irqsave(&ha->hardware_lock, flags);
1353         req = vha->req;
1354         for (cnt = 1; status == QLA_SUCCESS &&
1355                 cnt < req->num_outstanding_cmds; cnt++) {
1356                 sp = req->outstanding_cmds[cnt];
1357                 if (!sp)
1358                         continue;
1359                 if (sp->type != SRB_SCSI_CMD)
1360                         continue;
1361                 if (vha->vp_idx != sp->vha->vp_idx)
1362                         continue;
1363                 match = 0;
1364                 cmd = GET_CMD_SP(sp);
1365                 switch (type) {
1366                 case WAIT_HOST:
1367                         match = 1;
1368                         break;
1369                 case WAIT_TARGET:
1370                         match = cmd->device->id == t;
1371                         break;
1372                 case WAIT_LUN:
1373                         match = (cmd->device->id == t &&
1374                                 cmd->device->lun == l);
1375                         break;
1376                 }
1377                 if (!match)
1378                         continue;
1379
1380                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1381                 status = qla2x00_eh_wait_on_command(cmd);
1382                 spin_lock_irqsave(&ha->hardware_lock, flags);
1383         }
1384         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1385
1386         return status;
1387 }
1388
1389 static char *reset_errors[] = {
1390         "HBA not online",
1391         "HBA not ready",
1392         "Task management failed",
1393         "Waiting for command completions",
1394 };
1395
1396 static int
1397 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1398     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1399 {
1400         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1401         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1402         int err;
1403
1404         if (!fcport) {
1405                 return FAILED;
1406         }
1407
1408         err = fc_block_scsi_eh(cmd);
1409         if (err != 0)
1410                 return err;
1411
1412         ql_log(ql_log_info, vha, 0x8009,
1413             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1414             cmd->device->id, cmd->device->lun, cmd);
1415
1416         err = 0;
1417         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1418                 ql_log(ql_log_warn, vha, 0x800a,
1419                     "Wait for hba online failed for cmd=%p.\n", cmd);
1420                 goto eh_reset_failed;
1421         }
1422         err = 2;
1423         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1424                 != QLA_SUCCESS) {
1425                 ql_log(ql_log_warn, vha, 0x800c,
1426                     "do_reset failed for cmd=%p.\n", cmd);
1427                 goto eh_reset_failed;
1428         }
1429         err = 3;
1430         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1431             cmd->device->lun, type) != QLA_SUCCESS) {
1432                 ql_log(ql_log_warn, vha, 0x800d,
1433                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1434                 goto eh_reset_failed;
1435         }
1436
1437         ql_log(ql_log_info, vha, 0x800e,
1438             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1439             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1440
1441         return SUCCESS;
1442
1443 eh_reset_failed:
1444         ql_log(ql_log_info, vha, 0x800f,
1445             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1446             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1447             cmd);
1448         return FAILED;
1449 }
1450
1451 static int
1452 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1453 {
1454         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1455         struct qla_hw_data *ha = vha->hw;
1456
1457         if (qla2x00_isp_reg_stat(ha)) {
1458                 ql_log(ql_log_info, vha, 0x803e,
1459                     "PCI/Register disconnect, exiting.\n");
1460                 return FAILED;
1461         }
1462
1463         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1464             ha->isp_ops->lun_reset);
1465 }
1466
1467 static int
1468 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1469 {
1470         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1471         struct qla_hw_data *ha = vha->hw;
1472
1473         if (qla2x00_isp_reg_stat(ha)) {
1474                 ql_log(ql_log_info, vha, 0x803f,
1475                     "PCI/Register disconnect, exiting.\n");
1476                 return FAILED;
1477         }
1478
1479         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1480             ha->isp_ops->target_reset);
1481 }
1482
1483 /**************************************************************************
1484 * qla2xxx_eh_bus_reset
1485 *
1486 * Description:
1487 *    The bus reset function will reset the bus and abort any executing
1488 *    commands.
1489 *
1490 * Input:
1491 *    cmd = Linux SCSI command packet of the command that cause the
1492 *          bus reset.
1493 *
1494 * Returns:
1495 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1496 *
1497 **************************************************************************/
1498 static int
1499 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1500 {
1501         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1502         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1503         int ret = FAILED;
1504         unsigned int id;
1505         uint64_t lun;
1506         struct qla_hw_data *ha = vha->hw;
1507
1508         if (qla2x00_isp_reg_stat(ha)) {
1509                 ql_log(ql_log_info, vha, 0x8040,
1510                     "PCI/Register disconnect, exiting.\n");
1511                 return FAILED;
1512         }
1513
1514         id = cmd->device->id;
1515         lun = cmd->device->lun;
1516
1517         if (!fcport) {
1518                 return ret;
1519         }
1520
1521         ret = fc_block_scsi_eh(cmd);
1522         if (ret != 0)
1523                 return ret;
1524         ret = FAILED;
1525
1526         ql_log(ql_log_info, vha, 0x8012,
1527             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1528
1529         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1530                 ql_log(ql_log_fatal, vha, 0x8013,
1531                     "Wait for hba online failed board disabled.\n");
1532                 goto eh_bus_reset_done;
1533         }
1534
1535         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1536                 ret = SUCCESS;
1537
1538         if (ret == FAILED)
1539                 goto eh_bus_reset_done;
1540
1541         /* Flush outstanding commands. */
1542         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1543             QLA_SUCCESS) {
1544                 ql_log(ql_log_warn, vha, 0x8014,
1545                     "Wait for pending commands failed.\n");
1546                 ret = FAILED;
1547         }
1548
1549 eh_bus_reset_done:
1550         ql_log(ql_log_warn, vha, 0x802b,
1551             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1552             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1553
1554         return ret;
1555 }
1556
1557 /**************************************************************************
1558 * qla2xxx_eh_host_reset
1559 *
1560 * Description:
1561 *    The reset function will reset the Adapter.
1562 *
1563 * Input:
1564 *      cmd = Linux SCSI command packet of the command that cause the
1565 *            adapter reset.
1566 *
1567 * Returns:
1568 *      Either SUCCESS or FAILED.
1569 *
1570 * Note:
1571 **************************************************************************/
1572 static int
1573 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1574 {
1575         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1576         struct qla_hw_data *ha = vha->hw;
1577         int ret = FAILED;
1578         unsigned int id;
1579         uint64_t lun;
1580         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1581
1582         if (qla2x00_isp_reg_stat(ha)) {
1583                 ql_log(ql_log_info, vha, 0x8041,
1584                     "PCI/Register disconnect, exiting.\n");
1585                 schedule_work(&ha->board_disable);
1586                 return SUCCESS;
1587         }
1588
1589         id = cmd->device->id;
1590         lun = cmd->device->lun;
1591
1592         ql_log(ql_log_info, vha, 0x8018,
1593             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1594
1595         /*
1596          * No point in issuing another reset if one is active.  Also do not
1597          * attempt a reset if we are updating flash.
1598          */
1599         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1600                 goto eh_host_reset_lock;
1601
1602         if (vha != base_vha) {
1603                 if (qla2x00_vp_abort_isp(vha))
1604                         goto eh_host_reset_lock;
1605         } else {
1606                 if (IS_P3P_TYPE(vha->hw)) {
1607                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1608                                 /* Ctx reset success */
1609                                 ret = SUCCESS;
1610                                 goto eh_host_reset_lock;
1611                         }
1612                         /* fall thru if ctx reset failed */
1613                 }
1614                 if (ha->wq)
1615                         flush_workqueue(ha->wq);
1616
1617                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1618                 if (ha->isp_ops->abort_isp(base_vha)) {
1619                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1620                         /* failed. schedule dpc to try */
1621                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1622
1623                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1624                                 ql_log(ql_log_warn, vha, 0x802a,
1625                                     "wait for hba online failed.\n");
1626                                 goto eh_host_reset_lock;
1627                         }
1628                 }
1629                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1630         }
1631
1632         /* Waiting for command to be returned to OS.*/
1633         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1634                 QLA_SUCCESS)
1635                 ret = SUCCESS;
1636
1637 eh_host_reset_lock:
1638         ql_log(ql_log_info, vha, 0x8017,
1639             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1640             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1641
1642         return ret;
1643 }
1644
1645 /*
1646 * qla2x00_loop_reset
1647 *      Issue loop reset.
1648 *
1649 * Input:
1650 *      ha = adapter block pointer.
1651 *
1652 * Returns:
1653 *      0 = success
1654 */
1655 int
1656 qla2x00_loop_reset(scsi_qla_host_t *vha)
1657 {
1658         int ret;
1659         struct qla_hw_data *ha = vha->hw;
1660
1661         if (IS_QLAFX00(ha))
1662                 return QLA_SUCCESS;
1663
1664         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1665                 atomic_set(&vha->loop_state, LOOP_DOWN);
1666                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1667                 qla2x00_mark_all_devices_lost(vha, 0);
1668                 ret = qla2x00_full_login_lip(vha);
1669                 if (ret != QLA_SUCCESS) {
1670                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1671                             "full_login_lip=%d.\n", ret);
1672                 }
1673         }
1674
1675         if (ha->flags.enable_lip_reset) {
1676                 ret = qla2x00_lip_reset(vha);
1677                 if (ret != QLA_SUCCESS)
1678                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1679                             "lip_reset failed (%d).\n", ret);
1680         }
1681
1682         /* Issue marker command only when we are going to start the I/O */
1683         vha->marker_needed = 1;
1684
1685         return QLA_SUCCESS;
1686 }
1687
1688 static void
1689 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1690 {
1691         int cnt, status;
1692         unsigned long flags;
1693         srb_t *sp;
1694         scsi_qla_host_t *vha = qp->vha;
1695         struct qla_hw_data *ha = vha->hw;
1696         struct req_que *req;
1697         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1698         struct qla_tgt_cmd *cmd;
1699         uint8_t trace = 0;
1700
1701         if (!ha->req_q_map)
1702                 return;
1703         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1704         req = qp->req;
1705         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1706                 sp = req->outstanding_cmds[cnt];
1707                 if (sp) {
1708                         req->outstanding_cmds[cnt] = NULL;
1709                         if (sp->cmd_type == TYPE_SRB) {
1710                                 if (sp->type == SRB_NVME_CMD ||
1711                                     sp->type == SRB_NVME_LS) {
1712                                         sp_get(sp);
1713                                         spin_unlock_irqrestore(qp->qp_lock_ptr,
1714                                             flags);
1715                                         qla_nvme_abort(ha, sp, res);
1716                                         spin_lock_irqsave(qp->qp_lock_ptr,
1717                                             flags);
1718                                 } else if (GET_CMD_SP(sp) &&
1719                                     !ha->flags.eeh_busy &&
1720                                     (!test_bit(ABORT_ISP_ACTIVE,
1721                                         &vha->dpc_flags)) &&
1722                                     !qla2x00_isp_reg_stat(ha) &&
1723                                     (sp->type == SRB_SCSI_CMD)) {
1724                                         /*
1725                                          * Don't abort commands in
1726                                          * adapter during EEH
1727                                          * recovery as it's not
1728                                          * accessible/responding.
1729                                          *
1730                                          * Get a reference to the sp
1731                                          * and drop the lock. The
1732                                          * reference ensures this
1733                                          * sp->done() call and not the
1734                                          * call in qla2xxx_eh_abort()
1735                                          * ends the SCSI command (with
1736                                          * result 'res').
1737                                          */
1738                                         sp_get(sp);
1739                                         spin_unlock_irqrestore(qp->qp_lock_ptr,
1740                                             flags);
1741                                         status = qla2xxx_eh_abort(
1742                                             GET_CMD_SP(sp));
1743                                         spin_lock_irqsave(qp->qp_lock_ptr,
1744                                             flags);
1745                                         /*
1746                                          * Get rid of extra reference
1747                                          * if immediate exit from
1748                                          * ql2xxx_eh_abort
1749                                          */
1750                                         if (status == FAILED &&
1751                                             (qla2x00_isp_reg_stat(ha)))
1752                                                 atomic_dec(
1753                                                     &sp->ref_count);
1754                                 }
1755                                 sp->done(sp, res);
1756                         } else {
1757                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1758                                     qla_ini_mode_enabled(vha)) {
1759                                         if (!trace)
1760                                                 ql_dbg(ql_dbg_tgt_mgt,
1761                                                     vha, 0xf003,
1762                                                     "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1763                                                     vha->dpc_flags);
1764                                         continue;
1765                                 }
1766                                 cmd = (struct qla_tgt_cmd *)sp;
1767                                 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1768                         }
1769                 }
1770         }
1771         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1772 }
1773
1774 void
1775 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1776 {
1777         int que;
1778         struct qla_hw_data *ha = vha->hw;
1779
1780         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1781
1782         for (que = 0; que < ha->max_qpairs; que++) {
1783                 if (!ha->queue_pair_map[que])
1784                         continue;
1785
1786                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1787         }
1788 }
1789
1790 static int
1791 qla2xxx_slave_alloc(struct scsi_device *sdev)
1792 {
1793         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1794
1795         if (!rport || fc_remote_port_chkready(rport))
1796                 return -ENXIO;
1797
1798         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1799
1800         return 0;
1801 }
1802
1803 static int
1804 qla2xxx_slave_configure(struct scsi_device *sdev)
1805 {
1806         scsi_qla_host_t *vha = shost_priv(sdev->host);
1807         struct req_que *req = vha->req;
1808
1809         if (IS_T10_PI_CAPABLE(vha->hw))
1810                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1811
1812         scsi_change_queue_depth(sdev, req->max_q_depth);
1813         return 0;
1814 }
1815
1816 static void
1817 qla2xxx_slave_destroy(struct scsi_device *sdev)
1818 {
1819         sdev->hostdata = NULL;
1820 }
1821
1822 /**
1823  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1824  * @ha: HA context
1825  *
1826  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1827  * supported addressing method.
1828  */
1829 static void
1830 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1831 {
1832         /* Assume a 32bit DMA mask. */
1833         ha->flags.enable_64bit_addressing = 0;
1834
1835         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1836                 /* Any upper-dword bits set? */
1837                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1838                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1839                         /* Ok, a 64bit DMA mask is applicable. */
1840                         ha->flags.enable_64bit_addressing = 1;
1841                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1842                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1843                         return;
1844                 }
1845         }
1846
1847         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1848         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1849 }
1850
1851 static void
1852 qla2x00_enable_intrs(struct qla_hw_data *ha)
1853 {
1854         unsigned long flags = 0;
1855         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1856
1857         spin_lock_irqsave(&ha->hardware_lock, flags);
1858         ha->interrupts_on = 1;
1859         /* enable risc and host interrupts */
1860         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1861         RD_REG_WORD(&reg->ictrl);
1862         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1863
1864 }
1865
1866 static void
1867 qla2x00_disable_intrs(struct qla_hw_data *ha)
1868 {
1869         unsigned long flags = 0;
1870         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1871
1872         spin_lock_irqsave(&ha->hardware_lock, flags);
1873         ha->interrupts_on = 0;
1874         /* disable risc and host interrupts */
1875         WRT_REG_WORD(&reg->ictrl, 0);
1876         RD_REG_WORD(&reg->ictrl);
1877         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1878 }
1879
1880 static void
1881 qla24xx_enable_intrs(struct qla_hw_data *ha)
1882 {
1883         unsigned long flags = 0;
1884         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1885
1886         spin_lock_irqsave(&ha->hardware_lock, flags);
1887         ha->interrupts_on = 1;
1888         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1889         RD_REG_DWORD(&reg->ictrl);
1890         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1891 }
1892
1893 static void
1894 qla24xx_disable_intrs(struct qla_hw_data *ha)
1895 {
1896         unsigned long flags = 0;
1897         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1898
1899         if (IS_NOPOLLING_TYPE(ha))
1900                 return;
1901         spin_lock_irqsave(&ha->hardware_lock, flags);
1902         ha->interrupts_on = 0;
1903         WRT_REG_DWORD(&reg->ictrl, 0);
1904         RD_REG_DWORD(&reg->ictrl);
1905         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1906 }
1907
1908 static int
1909 qla2x00_iospace_config(struct qla_hw_data *ha)
1910 {
1911         resource_size_t pio;
1912         uint16_t msix;
1913
1914         if (pci_request_selected_regions(ha->pdev, ha->bars,
1915             QLA2XXX_DRIVER_NAME)) {
1916                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1917                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1918                     pci_name(ha->pdev));
1919                 goto iospace_error_exit;
1920         }
1921         if (!(ha->bars & 1))
1922                 goto skip_pio;
1923
1924         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1925         pio = pci_resource_start(ha->pdev, 0);
1926         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1927                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1928                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1929                             "Invalid pci I/O region size (%s).\n",
1930                             pci_name(ha->pdev));
1931                         pio = 0;
1932                 }
1933         } else {
1934                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1935                     "Region #0 no a PIO resource (%s).\n",
1936                     pci_name(ha->pdev));
1937                 pio = 0;
1938         }
1939         ha->pio_address = pio;
1940         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1941             "PIO address=%llu.\n",
1942             (unsigned long long)ha->pio_address);
1943
1944 skip_pio:
1945         /* Use MMIO operations for all accesses. */
1946         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1947                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1948                     "Region #1 not an MMIO resource (%s), aborting.\n",
1949                     pci_name(ha->pdev));
1950                 goto iospace_error_exit;
1951         }
1952         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1953                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1954                     "Invalid PCI mem region size (%s), aborting.\n",
1955                     pci_name(ha->pdev));
1956                 goto iospace_error_exit;
1957         }
1958
1959         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1960         if (!ha->iobase) {
1961                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1962                     "Cannot remap MMIO (%s), aborting.\n",
1963                     pci_name(ha->pdev));
1964                 goto iospace_error_exit;
1965         }
1966
1967         /* Determine queue resources */
1968         ha->max_req_queues = ha->max_rsp_queues = 1;
1969         ha->msix_count = QLA_BASE_VECTORS;
1970
1971         /* Check if FW supports MQ or not */
1972         if (!(ha->fw_attributes & BIT_6))
1973                 goto mqiobase_exit;
1974
1975         if (!ql2xmqsupport || !ql2xnvmeenable ||
1976             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1977                 goto mqiobase_exit;
1978
1979         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1980                         pci_resource_len(ha->pdev, 3));
1981         if (ha->mqiobase) {
1982                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1983                     "MQIO Base=%p.\n", ha->mqiobase);
1984                 /* Read MSIX vector size of the board */
1985                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1986                 ha->msix_count = msix + 1;
1987                 /* Max queues are bounded by available msix vectors */
1988                 /* MB interrupt uses 1 vector */
1989                 ha->max_req_queues = ha->msix_count - 1;
1990                 ha->max_rsp_queues = ha->max_req_queues;
1991                 /* Queue pairs is the max value minus the base queue pair */
1992                 ha->max_qpairs = ha->max_rsp_queues - 1;
1993                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1994                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1995
1996                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1997                     "MSI-X vector count: %d.\n", ha->msix_count);
1998         } else
1999                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2000                     "BAR 3 not enabled.\n");
2001
2002 mqiobase_exit:
2003         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2004             "MSIX Count: %d.\n", ha->msix_count);
2005         return (0);
2006
2007 iospace_error_exit:
2008         return (-ENOMEM);
2009 }
2010
2011
2012 static int
2013 qla83xx_iospace_config(struct qla_hw_data *ha)
2014 {
2015         uint16_t msix;
2016
2017         if (pci_request_selected_regions(ha->pdev, ha->bars,
2018             QLA2XXX_DRIVER_NAME)) {
2019                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2020                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2021                     pci_name(ha->pdev));
2022
2023                 goto iospace_error_exit;
2024         }
2025
2026         /* Use MMIO operations for all accesses. */
2027         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2028                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2029                     "Invalid pci I/O region size (%s).\n",
2030                     pci_name(ha->pdev));
2031                 goto iospace_error_exit;
2032         }
2033         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2034                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2035                     "Invalid PCI mem region size (%s), aborting\n",
2036                         pci_name(ha->pdev));
2037                 goto iospace_error_exit;
2038         }
2039
2040         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2041         if (!ha->iobase) {
2042                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2043                     "Cannot remap MMIO (%s), aborting.\n",
2044                     pci_name(ha->pdev));
2045                 goto iospace_error_exit;
2046         }
2047
2048         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2049         /* 83XX 26XX always use MQ type access for queues
2050          * - mbar 2, a.k.a region 4 */
2051         ha->max_req_queues = ha->max_rsp_queues = 1;
2052         ha->msix_count = QLA_BASE_VECTORS;
2053         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2054                         pci_resource_len(ha->pdev, 4));
2055
2056         if (!ha->mqiobase) {
2057                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2058                     "BAR2/region4 not enabled\n");
2059                 goto mqiobase_exit;
2060         }
2061
2062         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2063                         pci_resource_len(ha->pdev, 2));
2064         if (ha->msixbase) {
2065                 /* Read MSIX vector size of the board */
2066                 pci_read_config_word(ha->pdev,
2067                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2068                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2069                 /*
2070                  * By default, driver uses at least two msix vectors
2071                  * (default & rspq)
2072                  */
2073                 if (ql2xmqsupport || ql2xnvmeenable) {
2074                         /* MB interrupt uses 1 vector */
2075                         ha->max_req_queues = ha->msix_count - 1;
2076
2077                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2078                         if (QLA_TGT_MODE_ENABLED())
2079                                 ha->max_req_queues--;
2080
2081                         ha->max_rsp_queues = ha->max_req_queues;
2082
2083                         /* Queue pairs is the max value minus
2084                          * the base queue pair */
2085                         ha->max_qpairs = ha->max_req_queues - 1;
2086                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2087                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2088                 }
2089                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2090                     "MSI-X vector count: %d.\n", ha->msix_count);
2091         } else
2092                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2093                     "BAR 1 not enabled.\n");
2094
2095 mqiobase_exit:
2096         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2097             "MSIX Count: %d.\n", ha->msix_count);
2098         return 0;
2099
2100 iospace_error_exit:
2101         return -ENOMEM;
2102 }
2103
2104 static struct isp_operations qla2100_isp_ops = {
2105         .pci_config             = qla2100_pci_config,
2106         .reset_chip             = qla2x00_reset_chip,
2107         .chip_diag              = qla2x00_chip_diag,
2108         .config_rings           = qla2x00_config_rings,
2109         .reset_adapter          = qla2x00_reset_adapter,
2110         .nvram_config           = qla2x00_nvram_config,
2111         .update_fw_options      = qla2x00_update_fw_options,
2112         .load_risc              = qla2x00_load_risc,
2113         .pci_info_str           = qla2x00_pci_info_str,
2114         .fw_version_str         = qla2x00_fw_version_str,
2115         .intr_handler           = qla2100_intr_handler,
2116         .enable_intrs           = qla2x00_enable_intrs,
2117         .disable_intrs          = qla2x00_disable_intrs,
2118         .abort_command          = qla2x00_abort_command,
2119         .target_reset           = qla2x00_abort_target,
2120         .lun_reset              = qla2x00_lun_reset,
2121         .fabric_login           = qla2x00_login_fabric,
2122         .fabric_logout          = qla2x00_fabric_logout,
2123         .calc_req_entries       = qla2x00_calc_iocbs_32,
2124         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2125         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2126         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2127         .read_nvram             = qla2x00_read_nvram_data,
2128         .write_nvram            = qla2x00_write_nvram_data,
2129         .fw_dump                = qla2100_fw_dump,
2130         .beacon_on              = NULL,
2131         .beacon_off             = NULL,
2132         .beacon_blink           = NULL,
2133         .read_optrom            = qla2x00_read_optrom_data,
2134         .write_optrom           = qla2x00_write_optrom_data,
2135         .get_flash_version      = qla2x00_get_flash_version,
2136         .start_scsi             = qla2x00_start_scsi,
2137         .start_scsi_mq          = NULL,
2138         .abort_isp              = qla2x00_abort_isp,
2139         .iospace_config         = qla2x00_iospace_config,
2140         .initialize_adapter     = qla2x00_initialize_adapter,
2141 };
2142
2143 static struct isp_operations qla2300_isp_ops = {
2144         .pci_config             = qla2300_pci_config,
2145         .reset_chip             = qla2x00_reset_chip,
2146         .chip_diag              = qla2x00_chip_diag,
2147         .config_rings           = qla2x00_config_rings,
2148         .reset_adapter          = qla2x00_reset_adapter,
2149         .nvram_config           = qla2x00_nvram_config,
2150         .update_fw_options      = qla2x00_update_fw_options,
2151         .load_risc              = qla2x00_load_risc,
2152         .pci_info_str           = qla2x00_pci_info_str,
2153         .fw_version_str         = qla2x00_fw_version_str,
2154         .intr_handler           = qla2300_intr_handler,
2155         .enable_intrs           = qla2x00_enable_intrs,
2156         .disable_intrs          = qla2x00_disable_intrs,
2157         .abort_command          = qla2x00_abort_command,
2158         .target_reset           = qla2x00_abort_target,
2159         .lun_reset              = qla2x00_lun_reset,
2160         .fabric_login           = qla2x00_login_fabric,
2161         .fabric_logout          = qla2x00_fabric_logout,
2162         .calc_req_entries       = qla2x00_calc_iocbs_32,
2163         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2164         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2165         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2166         .read_nvram             = qla2x00_read_nvram_data,
2167         .write_nvram            = qla2x00_write_nvram_data,
2168         .fw_dump                = qla2300_fw_dump,
2169         .beacon_on              = qla2x00_beacon_on,
2170         .beacon_off             = qla2x00_beacon_off,
2171         .beacon_blink           = qla2x00_beacon_blink,
2172         .read_optrom            = qla2x00_read_optrom_data,
2173         .write_optrom           = qla2x00_write_optrom_data,
2174         .get_flash_version      = qla2x00_get_flash_version,
2175         .start_scsi             = qla2x00_start_scsi,
2176         .start_scsi_mq          = NULL,
2177         .abort_isp              = qla2x00_abort_isp,
2178         .iospace_config         = qla2x00_iospace_config,
2179         .initialize_adapter     = qla2x00_initialize_adapter,
2180 };
2181
2182 static struct isp_operations qla24xx_isp_ops = {
2183         .pci_config             = qla24xx_pci_config,
2184         .reset_chip             = qla24xx_reset_chip,
2185         .chip_diag              = qla24xx_chip_diag,
2186         .config_rings           = qla24xx_config_rings,
2187         .reset_adapter          = qla24xx_reset_adapter,
2188         .nvram_config           = qla24xx_nvram_config,
2189         .update_fw_options      = qla24xx_update_fw_options,
2190         .load_risc              = qla24xx_load_risc,
2191         .pci_info_str           = qla24xx_pci_info_str,
2192         .fw_version_str         = qla24xx_fw_version_str,
2193         .intr_handler           = qla24xx_intr_handler,
2194         .enable_intrs           = qla24xx_enable_intrs,
2195         .disable_intrs          = qla24xx_disable_intrs,
2196         .abort_command          = qla24xx_abort_command,
2197         .target_reset           = qla24xx_abort_target,
2198         .lun_reset              = qla24xx_lun_reset,
2199         .fabric_login           = qla24xx_login_fabric,
2200         .fabric_logout          = qla24xx_fabric_logout,
2201         .calc_req_entries       = NULL,
2202         .build_iocbs            = NULL,
2203         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2204         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2205         .read_nvram             = qla24xx_read_nvram_data,
2206         .write_nvram            = qla24xx_write_nvram_data,
2207         .fw_dump                = qla24xx_fw_dump,
2208         .beacon_on              = qla24xx_beacon_on,
2209         .beacon_off             = qla24xx_beacon_off,
2210         .beacon_blink           = qla24xx_beacon_blink,
2211         .read_optrom            = qla24xx_read_optrom_data,
2212         .write_optrom           = qla24xx_write_optrom_data,
2213         .get_flash_version      = qla24xx_get_flash_version,
2214         .start_scsi             = qla24xx_start_scsi,
2215         .start_scsi_mq          = NULL,
2216         .abort_isp              = qla2x00_abort_isp,
2217         .iospace_config         = qla2x00_iospace_config,
2218         .initialize_adapter     = qla2x00_initialize_adapter,
2219 };
2220
2221 static struct isp_operations qla25xx_isp_ops = {
2222         .pci_config             = qla25xx_pci_config,
2223         .reset_chip             = qla24xx_reset_chip,
2224         .chip_diag              = qla24xx_chip_diag,
2225         .config_rings           = qla24xx_config_rings,
2226         .reset_adapter          = qla24xx_reset_adapter,
2227         .nvram_config           = qla24xx_nvram_config,
2228         .update_fw_options      = qla24xx_update_fw_options,
2229         .load_risc              = qla24xx_load_risc,
2230         .pci_info_str           = qla24xx_pci_info_str,
2231         .fw_version_str         = qla24xx_fw_version_str,
2232         .intr_handler           = qla24xx_intr_handler,
2233         .enable_intrs           = qla24xx_enable_intrs,
2234         .disable_intrs          = qla24xx_disable_intrs,
2235         .abort_command          = qla24xx_abort_command,
2236         .target_reset           = qla24xx_abort_target,
2237         .lun_reset              = qla24xx_lun_reset,
2238         .fabric_login           = qla24xx_login_fabric,
2239         .fabric_logout          = qla24xx_fabric_logout,
2240         .calc_req_entries       = NULL,
2241         .build_iocbs            = NULL,
2242         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2243         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2244         .read_nvram             = qla25xx_read_nvram_data,
2245         .write_nvram            = qla25xx_write_nvram_data,
2246         .fw_dump                = qla25xx_fw_dump,
2247         .beacon_on              = qla24xx_beacon_on,
2248         .beacon_off             = qla24xx_beacon_off,
2249         .beacon_blink           = qla24xx_beacon_blink,
2250         .read_optrom            = qla25xx_read_optrom_data,
2251         .write_optrom           = qla24xx_write_optrom_data,
2252         .get_flash_version      = qla24xx_get_flash_version,
2253         .start_scsi             = qla24xx_dif_start_scsi,
2254         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2255         .abort_isp              = qla2x00_abort_isp,
2256         .iospace_config         = qla2x00_iospace_config,
2257         .initialize_adapter     = qla2x00_initialize_adapter,
2258 };
2259
2260 static struct isp_operations qla81xx_isp_ops = {
2261         .pci_config             = qla25xx_pci_config,
2262         .reset_chip             = qla24xx_reset_chip,
2263         .chip_diag              = qla24xx_chip_diag,
2264         .config_rings           = qla24xx_config_rings,
2265         .reset_adapter          = qla24xx_reset_adapter,
2266         .nvram_config           = qla81xx_nvram_config,
2267         .update_fw_options      = qla81xx_update_fw_options,
2268         .load_risc              = qla81xx_load_risc,
2269         .pci_info_str           = qla24xx_pci_info_str,
2270         .fw_version_str         = qla24xx_fw_version_str,
2271         .intr_handler           = qla24xx_intr_handler,
2272         .enable_intrs           = qla24xx_enable_intrs,
2273         .disable_intrs          = qla24xx_disable_intrs,
2274         .abort_command          = qla24xx_abort_command,
2275         .target_reset           = qla24xx_abort_target,
2276         .lun_reset              = qla24xx_lun_reset,
2277         .fabric_login           = qla24xx_login_fabric,
2278         .fabric_logout          = qla24xx_fabric_logout,
2279         .calc_req_entries       = NULL,
2280         .build_iocbs            = NULL,
2281         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2282         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2283         .read_nvram             = NULL,
2284         .write_nvram            = NULL,
2285         .fw_dump                = qla81xx_fw_dump,
2286         .beacon_on              = qla24xx_beacon_on,
2287         .beacon_off             = qla24xx_beacon_off,
2288         .beacon_blink           = qla83xx_beacon_blink,
2289         .read_optrom            = qla25xx_read_optrom_data,
2290         .write_optrom           = qla24xx_write_optrom_data,
2291         .get_flash_version      = qla24xx_get_flash_version,
2292         .start_scsi             = qla24xx_dif_start_scsi,
2293         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2294         .abort_isp              = qla2x00_abort_isp,
2295         .iospace_config         = qla2x00_iospace_config,
2296         .initialize_adapter     = qla2x00_initialize_adapter,
2297 };
2298
2299 static struct isp_operations qla82xx_isp_ops = {
2300         .pci_config             = qla82xx_pci_config,
2301         .reset_chip             = qla82xx_reset_chip,
2302         .chip_diag              = qla24xx_chip_diag,
2303         .config_rings           = qla82xx_config_rings,
2304         .reset_adapter          = qla24xx_reset_adapter,
2305         .nvram_config           = qla81xx_nvram_config,
2306         .update_fw_options      = qla24xx_update_fw_options,
2307         .load_risc              = qla82xx_load_risc,
2308         .pci_info_str           = qla24xx_pci_info_str,
2309         .fw_version_str         = qla24xx_fw_version_str,
2310         .intr_handler           = qla82xx_intr_handler,
2311         .enable_intrs           = qla82xx_enable_intrs,
2312         .disable_intrs          = qla82xx_disable_intrs,
2313         .abort_command          = qla24xx_abort_command,
2314         .target_reset           = qla24xx_abort_target,
2315         .lun_reset              = qla24xx_lun_reset,
2316         .fabric_login           = qla24xx_login_fabric,
2317         .fabric_logout          = qla24xx_fabric_logout,
2318         .calc_req_entries       = NULL,
2319         .build_iocbs            = NULL,
2320         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2321         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2322         .read_nvram             = qla24xx_read_nvram_data,
2323         .write_nvram            = qla24xx_write_nvram_data,
2324         .fw_dump                = qla82xx_fw_dump,
2325         .beacon_on              = qla82xx_beacon_on,
2326         .beacon_off             = qla82xx_beacon_off,
2327         .beacon_blink           = NULL,
2328         .read_optrom            = qla82xx_read_optrom_data,
2329         .write_optrom           = qla82xx_write_optrom_data,
2330         .get_flash_version      = qla82xx_get_flash_version,
2331         .start_scsi             = qla82xx_start_scsi,
2332         .start_scsi_mq          = NULL,
2333         .abort_isp              = qla82xx_abort_isp,
2334         .iospace_config         = qla82xx_iospace_config,
2335         .initialize_adapter     = qla2x00_initialize_adapter,
2336 };
2337
2338 static struct isp_operations qla8044_isp_ops = {
2339         .pci_config             = qla82xx_pci_config,
2340         .reset_chip             = qla82xx_reset_chip,
2341         .chip_diag              = qla24xx_chip_diag,
2342         .config_rings           = qla82xx_config_rings,
2343         .reset_adapter          = qla24xx_reset_adapter,
2344         .nvram_config           = qla81xx_nvram_config,
2345         .update_fw_options      = qla24xx_update_fw_options,
2346         .load_risc              = qla82xx_load_risc,
2347         .pci_info_str           = qla24xx_pci_info_str,
2348         .fw_version_str         = qla24xx_fw_version_str,
2349         .intr_handler           = qla8044_intr_handler,
2350         .enable_intrs           = qla82xx_enable_intrs,
2351         .disable_intrs          = qla82xx_disable_intrs,
2352         .abort_command          = qla24xx_abort_command,
2353         .target_reset           = qla24xx_abort_target,
2354         .lun_reset              = qla24xx_lun_reset,
2355         .fabric_login           = qla24xx_login_fabric,
2356         .fabric_logout          = qla24xx_fabric_logout,
2357         .calc_req_entries       = NULL,
2358         .build_iocbs            = NULL,
2359         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2360         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2361         .read_nvram             = NULL,
2362         .write_nvram            = NULL,
2363         .fw_dump                = qla8044_fw_dump,
2364         .beacon_on              = qla82xx_beacon_on,
2365         .beacon_off             = qla82xx_beacon_off,
2366         .beacon_blink           = NULL,
2367         .read_optrom            = qla8044_read_optrom_data,
2368         .write_optrom           = qla8044_write_optrom_data,
2369         .get_flash_version      = qla82xx_get_flash_version,
2370         .start_scsi             = qla82xx_start_scsi,
2371         .start_scsi_mq          = NULL,
2372         .abort_isp              = qla8044_abort_isp,
2373         .iospace_config         = qla82xx_iospace_config,
2374         .initialize_adapter     = qla2x00_initialize_adapter,
2375 };
2376
2377 static struct isp_operations qla83xx_isp_ops = {
2378         .pci_config             = qla25xx_pci_config,
2379         .reset_chip             = qla24xx_reset_chip,
2380         .chip_diag              = qla24xx_chip_diag,
2381         .config_rings           = qla24xx_config_rings,
2382         .reset_adapter          = qla24xx_reset_adapter,
2383         .nvram_config           = qla81xx_nvram_config,
2384         .update_fw_options      = qla81xx_update_fw_options,
2385         .load_risc              = qla81xx_load_risc,
2386         .pci_info_str           = qla24xx_pci_info_str,
2387         .fw_version_str         = qla24xx_fw_version_str,
2388         .intr_handler           = qla24xx_intr_handler,
2389         .enable_intrs           = qla24xx_enable_intrs,
2390         .disable_intrs          = qla24xx_disable_intrs,
2391         .abort_command          = qla24xx_abort_command,
2392         .target_reset           = qla24xx_abort_target,
2393         .lun_reset              = qla24xx_lun_reset,
2394         .fabric_login           = qla24xx_login_fabric,
2395         .fabric_logout          = qla24xx_fabric_logout,
2396         .calc_req_entries       = NULL,
2397         .build_iocbs            = NULL,
2398         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2399         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2400         .read_nvram             = NULL,
2401         .write_nvram            = NULL,
2402         .fw_dump                = qla83xx_fw_dump,
2403         .beacon_on              = qla24xx_beacon_on,
2404         .beacon_off             = qla24xx_beacon_off,
2405         .beacon_blink           = qla83xx_beacon_blink,
2406         .read_optrom            = qla25xx_read_optrom_data,
2407         .write_optrom           = qla24xx_write_optrom_data,
2408         .get_flash_version      = qla24xx_get_flash_version,
2409         .start_scsi             = qla24xx_dif_start_scsi,
2410         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2411         .abort_isp              = qla2x00_abort_isp,
2412         .iospace_config         = qla83xx_iospace_config,
2413         .initialize_adapter     = qla2x00_initialize_adapter,
2414 };
2415
2416 static struct isp_operations qlafx00_isp_ops = {
2417         .pci_config             = qlafx00_pci_config,
2418         .reset_chip             = qlafx00_soft_reset,
2419         .chip_diag              = qlafx00_chip_diag,
2420         .config_rings           = qlafx00_config_rings,
2421         .reset_adapter          = qlafx00_soft_reset,
2422         .nvram_config           = NULL,
2423         .update_fw_options      = NULL,
2424         .load_risc              = NULL,
2425         .pci_info_str           = qlafx00_pci_info_str,
2426         .fw_version_str         = qlafx00_fw_version_str,
2427         .intr_handler           = qlafx00_intr_handler,
2428         .enable_intrs           = qlafx00_enable_intrs,
2429         .disable_intrs          = qlafx00_disable_intrs,
2430         .abort_command          = qla24xx_async_abort_command,
2431         .target_reset           = qlafx00_abort_target,
2432         .lun_reset              = qlafx00_lun_reset,
2433         .fabric_login           = NULL,
2434         .fabric_logout          = NULL,
2435         .calc_req_entries       = NULL,
2436         .build_iocbs            = NULL,
2437         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2438         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2439         .read_nvram             = qla24xx_read_nvram_data,
2440         .write_nvram            = qla24xx_write_nvram_data,
2441         .fw_dump                = NULL,
2442         .beacon_on              = qla24xx_beacon_on,
2443         .beacon_off             = qla24xx_beacon_off,
2444         .beacon_blink           = NULL,
2445         .read_optrom            = qla24xx_read_optrom_data,
2446         .write_optrom           = qla24xx_write_optrom_data,
2447         .get_flash_version      = qla24xx_get_flash_version,
2448         .start_scsi             = qlafx00_start_scsi,
2449         .start_scsi_mq          = NULL,
2450         .abort_isp              = qlafx00_abort_isp,
2451         .iospace_config         = qlafx00_iospace_config,
2452         .initialize_adapter     = qlafx00_initialize_adapter,
2453 };
2454
2455 static struct isp_operations qla27xx_isp_ops = {
2456         .pci_config             = qla25xx_pci_config,
2457         .reset_chip             = qla24xx_reset_chip,
2458         .chip_diag              = qla24xx_chip_diag,
2459         .config_rings           = qla24xx_config_rings,
2460         .reset_adapter          = qla24xx_reset_adapter,
2461         .nvram_config           = qla81xx_nvram_config,
2462         .update_fw_options      = qla81xx_update_fw_options,
2463         .load_risc              = qla81xx_load_risc,
2464         .pci_info_str           = qla24xx_pci_info_str,
2465         .fw_version_str         = qla24xx_fw_version_str,
2466         .intr_handler           = qla24xx_intr_handler,
2467         .enable_intrs           = qla24xx_enable_intrs,
2468         .disable_intrs          = qla24xx_disable_intrs,
2469         .abort_command          = qla24xx_abort_command,
2470         .target_reset           = qla24xx_abort_target,
2471         .lun_reset              = qla24xx_lun_reset,
2472         .fabric_login           = qla24xx_login_fabric,
2473         .fabric_logout          = qla24xx_fabric_logout,
2474         .calc_req_entries       = NULL,
2475         .build_iocbs            = NULL,
2476         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2477         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2478         .read_nvram             = NULL,
2479         .write_nvram            = NULL,
2480         .fw_dump                = qla27xx_fwdump,
2481         .beacon_on              = qla24xx_beacon_on,
2482         .beacon_off             = qla24xx_beacon_off,
2483         .beacon_blink           = qla83xx_beacon_blink,
2484         .read_optrom            = qla25xx_read_optrom_data,
2485         .write_optrom           = qla24xx_write_optrom_data,
2486         .get_flash_version      = qla24xx_get_flash_version,
2487         .start_scsi             = qla24xx_dif_start_scsi,
2488         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2489         .abort_isp              = qla2x00_abort_isp,
2490         .iospace_config         = qla83xx_iospace_config,
2491         .initialize_adapter     = qla2x00_initialize_adapter,
2492 };
2493
2494 static inline void
2495 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2496 {
2497         ha->device_type = DT_EXTENDED_IDS;
2498         switch (ha->pdev->device) {
2499         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2500                 ha->isp_type |= DT_ISP2100;
2501                 ha->device_type &= ~DT_EXTENDED_IDS;
2502                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2503                 break;
2504         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2505                 ha->isp_type |= DT_ISP2200;
2506                 ha->device_type &= ~DT_EXTENDED_IDS;
2507                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2508                 break;
2509         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2510                 ha->isp_type |= DT_ISP2300;
2511                 ha->device_type |= DT_ZIO_SUPPORTED;
2512                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2513                 break;
2514         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2515                 ha->isp_type |= DT_ISP2312;
2516                 ha->device_type |= DT_ZIO_SUPPORTED;
2517                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2518                 break;
2519         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2520                 ha->isp_type |= DT_ISP2322;
2521                 ha->device_type |= DT_ZIO_SUPPORTED;
2522                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2523                     ha->pdev->subsystem_device == 0x0170)
2524                         ha->device_type |= DT_OEM_001;
2525                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2526                 break;
2527         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2528                 ha->isp_type |= DT_ISP6312;
2529                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2530                 break;
2531         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2532                 ha->isp_type |= DT_ISP6322;
2533                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2534                 break;
2535         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2536                 ha->isp_type |= DT_ISP2422;
2537                 ha->device_type |= DT_ZIO_SUPPORTED;
2538                 ha->device_type |= DT_FWI2;
2539                 ha->device_type |= DT_IIDMA;
2540                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2541                 break;
2542         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2543                 ha->isp_type |= DT_ISP2432;
2544                 ha->device_type |= DT_ZIO_SUPPORTED;
2545                 ha->device_type |= DT_FWI2;
2546                 ha->device_type |= DT_IIDMA;
2547                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2548                 break;
2549         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2550                 ha->isp_type |= DT_ISP8432;
2551                 ha->device_type |= DT_ZIO_SUPPORTED;
2552                 ha->device_type |= DT_FWI2;
2553                 ha->device_type |= DT_IIDMA;
2554                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2555                 break;
2556         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2557                 ha->isp_type |= DT_ISP5422;
2558                 ha->device_type |= DT_FWI2;
2559                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2560                 break;
2561         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2562                 ha->isp_type |= DT_ISP5432;
2563                 ha->device_type |= DT_FWI2;
2564                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2565                 break;
2566         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2567                 ha->isp_type |= DT_ISP2532;
2568                 ha->device_type |= DT_ZIO_SUPPORTED;
2569                 ha->device_type |= DT_FWI2;
2570                 ha->device_type |= DT_IIDMA;
2571                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2572                 break;
2573         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2574                 ha->isp_type |= DT_ISP8001;
2575                 ha->device_type |= DT_ZIO_SUPPORTED;
2576                 ha->device_type |= DT_FWI2;
2577                 ha->device_type |= DT_IIDMA;
2578                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2579                 break;
2580         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2581                 ha->isp_type |= DT_ISP8021;
2582                 ha->device_type |= DT_ZIO_SUPPORTED;
2583                 ha->device_type |= DT_FWI2;
2584                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2585                 /* Initialize 82XX ISP flags */
2586                 qla82xx_init_flags(ha);
2587                 break;
2588          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2589                 ha->isp_type |= DT_ISP8044;
2590                 ha->device_type |= DT_ZIO_SUPPORTED;
2591                 ha->device_type |= DT_FWI2;
2592                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2593                 /* Initialize 82XX ISP flags */
2594                 qla82xx_init_flags(ha);
2595                 break;
2596         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2597                 ha->isp_type |= DT_ISP2031;
2598                 ha->device_type |= DT_ZIO_SUPPORTED;
2599                 ha->device_type |= DT_FWI2;
2600                 ha->device_type |= DT_IIDMA;
2601                 ha->device_type |= DT_T10_PI;
2602                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2603                 break;
2604         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2605                 ha->isp_type |= DT_ISP8031;
2606                 ha->device_type |= DT_ZIO_SUPPORTED;
2607                 ha->device_type |= DT_FWI2;
2608                 ha->device_type |= DT_IIDMA;
2609                 ha->device_type |= DT_T10_PI;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611                 break;
2612         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2613                 ha->isp_type |= DT_ISPFX00;
2614                 break;
2615         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2616                 ha->isp_type |= DT_ISP2071;
2617                 ha->device_type |= DT_ZIO_SUPPORTED;
2618                 ha->device_type |= DT_FWI2;
2619                 ha->device_type |= DT_IIDMA;
2620                 ha->device_type |= DT_T10_PI;
2621                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2622                 break;
2623         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2624                 ha->isp_type |= DT_ISP2271;
2625                 ha->device_type |= DT_ZIO_SUPPORTED;
2626                 ha->device_type |= DT_FWI2;
2627                 ha->device_type |= DT_IIDMA;
2628                 ha->device_type |= DT_T10_PI;
2629                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2630                 break;
2631         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2632                 ha->isp_type |= DT_ISP2261;
2633                 ha->device_type |= DT_ZIO_SUPPORTED;
2634                 ha->device_type |= DT_FWI2;
2635                 ha->device_type |= DT_IIDMA;
2636                 ha->device_type |= DT_T10_PI;
2637                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2638                 break;
2639         }
2640
2641         if (IS_QLA82XX(ha))
2642                 ha->port_no = ha->portnum & 1;
2643         else {
2644                 /* Get adapter physical port no from interrupt pin register. */
2645                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2646                 if (IS_QLA27XX(ha))
2647                         ha->port_no--;
2648                 else
2649                         ha->port_no = !(ha->port_no & 1);
2650         }
2651
2652         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2653             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2654             ha->device_type, ha->port_no, ha->fw_srisc_address);
2655 }
2656
2657 static void
2658 qla2xxx_scan_start(struct Scsi_Host *shost)
2659 {
2660         scsi_qla_host_t *vha = shost_priv(shost);
2661
2662         if (vha->hw->flags.running_gold_fw)
2663                 return;
2664
2665         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2666         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2667         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2668         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2669 }
2670
2671 static int
2672 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2673 {
2674         scsi_qla_host_t *vha = shost_priv(shost);
2675
2676         if (test_bit(UNLOADING, &vha->dpc_flags))
2677                 return 1;
2678         if (!vha->host)
2679                 return 1;
2680         if (time > vha->hw->loop_reset_delay * HZ)
2681                 return 1;
2682
2683         return atomic_read(&vha->loop_state) == LOOP_READY;
2684 }
2685
2686 static void qla2x00_iocb_work_fn(struct work_struct *work)
2687 {
2688         struct scsi_qla_host *vha = container_of(work,
2689                 struct scsi_qla_host, iocb_work);
2690         struct qla_hw_data *ha = vha->hw;
2691         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2692         int i = 2;
2693         unsigned long flags;
2694
2695         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2696                 return;
2697
2698         while (!list_empty(&vha->work_list) && i > 0) {
2699                 qla2x00_do_work(vha);
2700                 i--;
2701         }
2702
2703         spin_lock_irqsave(&vha->work_lock, flags);
2704         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2705         spin_unlock_irqrestore(&vha->work_lock, flags);
2706 }
2707
2708 /*
2709  * PCI driver interface
2710  */
2711 static int
2712 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2713 {
2714         int     ret = -ENODEV;
2715         struct Scsi_Host *host;
2716         scsi_qla_host_t *base_vha = NULL;
2717         struct qla_hw_data *ha;
2718         char pci_info[30];
2719         char fw_str[30], wq_name[30];
2720         struct scsi_host_template *sht;
2721         int bars, mem_only = 0;
2722         uint16_t req_length = 0, rsp_length = 0;
2723         struct req_que *req = NULL;
2724         struct rsp_que *rsp = NULL;
2725         int i;
2726
2727         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2728         sht = &qla2xxx_driver_template;
2729         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2730             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2731             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2732             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2733             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2734             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2735             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2736             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2737             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2738             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2739             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2740             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2741             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2742             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2743             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2744                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2745                 mem_only = 1;
2746                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2747                     "Mem only adapter.\n");
2748         }
2749         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2750             "Bars=%d.\n", bars);
2751
2752         if (mem_only) {
2753                 if (pci_enable_device_mem(pdev))
2754                         return ret;
2755         } else {
2756                 if (pci_enable_device(pdev))
2757                         return ret;
2758         }
2759
2760         /* This may fail but that's ok */
2761         pci_enable_pcie_error_reporting(pdev);
2762
2763         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2764         if (!ha) {
2765                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2766                     "Unable to allocate memory for ha.\n");
2767                 goto disable_device;
2768         }
2769         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2770             "Memory allocated for ha=%p.\n", ha);
2771         ha->pdev = pdev;
2772         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2773         spin_lock_init(&ha->tgt.q_full_lock);
2774         spin_lock_init(&ha->tgt.sess_lock);
2775         spin_lock_init(&ha->tgt.atio_lock);
2776
2777         atomic_set(&ha->nvme_active_aen_cnt, 0);
2778
2779         /* Clear our data area */
2780         ha->bars = bars;
2781         ha->mem_only = mem_only;
2782         spin_lock_init(&ha->hardware_lock);
2783         spin_lock_init(&ha->vport_slock);
2784         mutex_init(&ha->selflogin_lock);
2785         mutex_init(&ha->optrom_mutex);
2786
2787         /* Set ISP-type information. */
2788         qla2x00_set_isp_flags(ha);
2789
2790         /* Set EEH reset type to fundamental if required by hba */
2791         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2792             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2793                 pdev->needs_freset = 1;
2794
2795         ha->prev_topology = 0;
2796         ha->init_cb_size = sizeof(init_cb_t);
2797         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2798         ha->optrom_size = OPTROM_SIZE_2300;
2799         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2800         atomic_set(&ha->num_pend_mbx_stage1, 0);
2801         atomic_set(&ha->num_pend_mbx_stage2, 0);
2802         atomic_set(&ha->num_pend_mbx_stage3, 0);
2803
2804         /* Assign ISP specific operations. */
2805         if (IS_QLA2100(ha)) {
2806                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2807                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2808                 req_length = REQUEST_ENTRY_CNT_2100;
2809                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2810                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2811                 ha->gid_list_info_size = 4;
2812                 ha->flash_conf_off = ~0;
2813                 ha->flash_data_off = ~0;
2814                 ha->nvram_conf_off = ~0;
2815                 ha->nvram_data_off = ~0;
2816                 ha->isp_ops = &qla2100_isp_ops;
2817         } else if (IS_QLA2200(ha)) {
2818                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2819                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2820                 req_length = REQUEST_ENTRY_CNT_2200;
2821                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2822                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2823                 ha->gid_list_info_size = 4;
2824                 ha->flash_conf_off = ~0;
2825                 ha->flash_data_off = ~0;
2826                 ha->nvram_conf_off = ~0;
2827                 ha->nvram_data_off = ~0;
2828                 ha->isp_ops = &qla2100_isp_ops;
2829         } else if (IS_QLA23XX(ha)) {
2830                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2831                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2832                 req_length = REQUEST_ENTRY_CNT_2200;
2833                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2834                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2835                 ha->gid_list_info_size = 6;
2836                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2837                         ha->optrom_size = OPTROM_SIZE_2322;
2838                 ha->flash_conf_off = ~0;
2839                 ha->flash_data_off = ~0;
2840                 ha->nvram_conf_off = ~0;
2841                 ha->nvram_data_off = ~0;
2842                 ha->isp_ops = &qla2300_isp_ops;
2843         } else if (IS_QLA24XX_TYPE(ha)) {
2844                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2845                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2846                 req_length = REQUEST_ENTRY_CNT_24XX;
2847                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2848                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2849                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2850                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2851                 ha->gid_list_info_size = 8;
2852                 ha->optrom_size = OPTROM_SIZE_24XX;
2853                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2854                 ha->isp_ops = &qla24xx_isp_ops;
2855                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2856                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2857                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2858                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2859         } else if (IS_QLA25XX(ha)) {
2860                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2861                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2862                 req_length = REQUEST_ENTRY_CNT_24XX;
2863                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2864                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2865                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2866                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2867                 ha->gid_list_info_size = 8;
2868                 ha->optrom_size = OPTROM_SIZE_25XX;
2869                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2870                 ha->isp_ops = &qla25xx_isp_ops;
2871                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2872                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2873                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2874                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2875         } else if (IS_QLA81XX(ha)) {
2876                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2877                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2878                 req_length = REQUEST_ENTRY_CNT_24XX;
2879                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2880                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2881                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2882                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2883                 ha->gid_list_info_size = 8;
2884                 ha->optrom_size = OPTROM_SIZE_81XX;
2885                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2886                 ha->isp_ops = &qla81xx_isp_ops;
2887                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2888                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2889                 ha->nvram_conf_off = ~0;
2890                 ha->nvram_data_off = ~0;
2891         } else if (IS_QLA82XX(ha)) {
2892                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2893                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2894                 req_length = REQUEST_ENTRY_CNT_82XX;
2895                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2896                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2897                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2898                 ha->gid_list_info_size = 8;
2899                 ha->optrom_size = OPTROM_SIZE_82XX;
2900                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2901                 ha->isp_ops = &qla82xx_isp_ops;
2902                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2903                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2904                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2905                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2906         } else if (IS_QLA8044(ha)) {
2907                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2908                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2909                 req_length = REQUEST_ENTRY_CNT_82XX;
2910                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2911                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2912                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2913                 ha->gid_list_info_size = 8;
2914                 ha->optrom_size = OPTROM_SIZE_83XX;
2915                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2916                 ha->isp_ops = &qla8044_isp_ops;
2917                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2918                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2919                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2920                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2921         } else if (IS_QLA83XX(ha)) {
2922                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2923                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2924                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2925                 req_length = REQUEST_ENTRY_CNT_83XX;
2926                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2927                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2928                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2929                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2930                 ha->gid_list_info_size = 8;
2931                 ha->optrom_size = OPTROM_SIZE_83XX;
2932                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2933                 ha->isp_ops = &qla83xx_isp_ops;
2934                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2935                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2936                 ha->nvram_conf_off = ~0;
2937                 ha->nvram_data_off = ~0;
2938         }  else if (IS_QLAFX00(ha)) {
2939                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2940                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2941                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2942                 req_length = REQUEST_ENTRY_CNT_FX00;
2943                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2944                 ha->isp_ops = &qlafx00_isp_ops;
2945                 ha->port_down_retry_count = 30; /* default value */
2946                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2947                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2948                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2949                 ha->mr.fw_hbt_en = 1;
2950                 ha->mr.host_info_resend = false;
2951                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2952         } else if (IS_QLA27XX(ha)) {
2953                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2954                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2955                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2956                 req_length = REQUEST_ENTRY_CNT_83XX;
2957                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2958                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2959                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2960                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2961                 ha->gid_list_info_size = 8;
2962                 ha->optrom_size = OPTROM_SIZE_83XX;
2963                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2964                 ha->isp_ops = &qla27xx_isp_ops;
2965                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2966                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2967                 ha->nvram_conf_off = ~0;
2968                 ha->nvram_data_off = ~0;
2969         }
2970
2971         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2972             "mbx_count=%d, req_length=%d, "
2973             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2974             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2975             "max_fibre_devices=%d.\n",
2976             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2977             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2978             ha->nvram_npiv_size, ha->max_fibre_devices);
2979         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2980             "isp_ops=%p, flash_conf_off=%d, "
2981             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2982             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2983             ha->nvram_conf_off, ha->nvram_data_off);
2984
2985         /* Configure PCI I/O space */
2986         ret = ha->isp_ops->iospace_config(ha);
2987         if (ret)
2988                 goto iospace_config_failed;
2989
2990         ql_log_pci(ql_log_info, pdev, 0x001d,
2991             "Found an ISP%04X irq %d iobase 0x%p.\n",
2992             pdev->device, pdev->irq, ha->iobase);
2993         mutex_init(&ha->vport_lock);
2994         mutex_init(&ha->mq_lock);
2995         init_completion(&ha->mbx_cmd_comp);
2996         complete(&ha->mbx_cmd_comp);
2997         init_completion(&ha->mbx_intr_comp);
2998         init_completion(&ha->dcbx_comp);
2999         init_completion(&ha->lb_portup_comp);
3000
3001         set_bit(0, (unsigned long *) ha->vp_idx_map);
3002
3003         qla2x00_config_dma_addressing(ha);
3004         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3005             "64 Bit addressing is %s.\n",
3006             ha->flags.enable_64bit_addressing ? "enable" :
3007             "disable");
3008         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3009         if (ret) {
3010                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3011                     "Failed to allocate memory for adapter, aborting.\n");
3012
3013                 goto probe_hw_failed;
3014         }
3015
3016         req->max_q_depth = MAX_Q_DEPTH;
3017         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3018                 req->max_q_depth = ql2xmaxqdepth;
3019
3020
3021         base_vha = qla2x00_create_host(sht, ha);
3022         if (!base_vha) {
3023                 ret = -ENOMEM;
3024                 goto probe_hw_failed;
3025         }
3026
3027         pci_set_drvdata(pdev, base_vha);
3028         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3029
3030         host = base_vha->host;
3031         base_vha->req = req;
3032         if (IS_QLA2XXX_MIDTYPE(ha))
3033                 base_vha->mgmt_svr_loop_id =
3034                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3035         else
3036                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3037                                                 base_vha->vp_idx;
3038
3039         /* Setup fcport template structure. */
3040         ha->mr.fcport.vha = base_vha;
3041         ha->mr.fcport.port_type = FCT_UNKNOWN;
3042         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3043         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3044         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3045         ha->mr.fcport.scan_state = 1;
3046
3047         /* Set the SG table size based on ISP type */
3048         if (!IS_FWI2_CAPABLE(ha)) {
3049                 if (IS_QLA2100(ha))
3050                         host->sg_tablesize = 32;
3051         } else {
3052                 if (!IS_QLA82XX(ha))
3053                         host->sg_tablesize = QLA_SG_ALL;
3054         }
3055         host->max_id = ha->max_fibre_devices;
3056         host->cmd_per_lun = 3;
3057         host->unique_id = host->host_no;
3058         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3059                 host->max_cmd_len = 32;
3060         else
3061                 host->max_cmd_len = MAX_CMDSZ;
3062         host->max_channel = MAX_BUSES - 1;
3063         /* Older HBAs support only 16-bit LUNs */
3064         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3065             ql2xmaxlun > 0xffff)
3066                 host->max_lun = 0xffff;
3067         else
3068                 host->max_lun = ql2xmaxlun;
3069         host->transportt = qla2xxx_transport_template;
3070         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3071
3072         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3073             "max_id=%d this_id=%d "
3074             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3075             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3076             host->this_id, host->cmd_per_lun, host->unique_id,
3077             host->max_cmd_len, host->max_channel, host->max_lun,
3078             host->transportt, sht->vendor_id);
3079
3080         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3081
3082         /* Set up the irqs */
3083         ret = qla2x00_request_irqs(ha, rsp);
3084         if (ret)
3085                 goto probe_failed;
3086
3087         /* Alloc arrays of request and response ring ptrs */
3088         ret = qla2x00_alloc_queues(ha, req, rsp);
3089         if (ret) {
3090                 ql_log(ql_log_fatal, base_vha, 0x003d,
3091                     "Failed to allocate memory for queue pointers..."
3092                     "aborting.\n");
3093                 goto probe_failed;
3094         }
3095
3096         if (ha->mqenable && shost_use_blk_mq(host)) {
3097                 /* number of hardware queues supported by blk/scsi-mq*/
3098                 host->nr_hw_queues = ha->max_qpairs;
3099
3100                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3101                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3102         } else {
3103                 if (ql2xnvmeenable) {
3104                         host->nr_hw_queues = ha->max_qpairs;
3105                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3106                             "FC-NVMe support is enabled, HW queues=%d\n",
3107                             host->nr_hw_queues);
3108                 } else {
3109                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3110                             "blk/scsi-mq disabled.\n");
3111                 }
3112         }
3113
3114         qlt_probe_one_stage1(base_vha, ha);
3115
3116         pci_save_state(pdev);
3117
3118         /* Assign back pointers */
3119         rsp->req = req;
3120         req->rsp = rsp;
3121
3122         if (IS_QLAFX00(ha)) {
3123                 ha->rsp_q_map[0] = rsp;
3124                 ha->req_q_map[0] = req;
3125                 set_bit(0, ha->req_qid_map);
3126                 set_bit(0, ha->rsp_qid_map);
3127         }
3128
3129         /* FWI2-capable only. */
3130         req->req_q_in = &ha->iobase->isp24.req_q_in;
3131         req->req_q_out = &ha->iobase->isp24.req_q_out;
3132         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3133         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3134         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3135                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3136                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3137                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3138                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3139         }
3140
3141         if (IS_QLAFX00(ha)) {
3142                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3143                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3144                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3145                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3146         }
3147
3148         if (IS_P3P_TYPE(ha)) {
3149                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3150                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3151                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3152         }
3153
3154         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3155             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3156             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3157         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3158             "req->req_q_in=%p req->req_q_out=%p "
3159             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3160             req->req_q_in, req->req_q_out,
3161             rsp->rsp_q_in, rsp->rsp_q_out);
3162         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3163             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3164             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3165         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3166             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3167             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3168
3169         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3170         if (unlikely(!ha->wq)) {
3171                 ret = -ENOMEM;
3172                 goto probe_failed;
3173         }
3174
3175         if (ha->isp_ops->initialize_adapter(base_vha)) {
3176                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3177                     "Failed to initialize adapter - Adapter flags %x.\n",
3178                     base_vha->device_flags);
3179
3180                 if (IS_QLA82XX(ha)) {
3181                         qla82xx_idc_lock(ha);
3182                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3183                                 QLA8XXX_DEV_FAILED);
3184                         qla82xx_idc_unlock(ha);
3185                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3186                             "HW State: FAILED.\n");
3187                 } else if (IS_QLA8044(ha)) {
3188                         qla8044_idc_lock(ha);
3189                         qla8044_wr_direct(base_vha,
3190                                 QLA8044_CRB_DEV_STATE_INDEX,
3191                                 QLA8XXX_DEV_FAILED);
3192                         qla8044_idc_unlock(ha);
3193                         ql_log(ql_log_fatal, base_vha, 0x0150,
3194                             "HW State: FAILED.\n");
3195                 }
3196
3197                 ret = -ENODEV;
3198                 goto probe_failed;
3199         }
3200
3201         if (IS_QLAFX00(ha))
3202                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3203         else
3204                 host->can_queue = req->num_outstanding_cmds - 10;
3205
3206         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3207             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3208             host->can_queue, base_vha->req,
3209             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3210
3211         if (ha->mqenable) {
3212                 bool mq = false;
3213                 bool startit = false;
3214
3215                 if (QLA_TGT_MODE_ENABLED()) {
3216                         mq = true;
3217                         startit = false;
3218                 }
3219
3220                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3221                     shost_use_blk_mq(host)) {
3222                         mq = true;
3223                         startit = true;
3224                 }
3225
3226                 if (mq) {
3227                         /* Create start of day qpairs for Block MQ */
3228                         for (i = 0; i < ha->max_qpairs; i++)
3229                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3230                 }
3231         }
3232
3233         if (ha->flags.running_gold_fw)
3234                 goto skip_dpc;
3235
3236         /*
3237          * Startup the kernel thread for this host adapter
3238          */
3239         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3240             "%s_dpc", base_vha->host_str);
3241         if (IS_ERR(ha->dpc_thread)) {
3242                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3243                     "Failed to start DPC thread.\n");
3244                 ret = PTR_ERR(ha->dpc_thread);
3245                 ha->dpc_thread = NULL;
3246                 goto probe_failed;
3247         }
3248         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3249             "DPC thread started successfully.\n");
3250
3251         /*
3252          * If we're not coming up in initiator mode, we might sit for
3253          * a while without waking up the dpc thread, which leads to a
3254          * stuck process warning.  So just kick the dpc once here and
3255          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3256          */
3257         qla2xxx_wake_dpc(base_vha);
3258
3259         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3260
3261         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3262                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3263                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3264                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3265
3266                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3267                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3268                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3269                 INIT_WORK(&ha->idc_state_handler,
3270                     qla83xx_idc_state_handler_work);
3271                 INIT_WORK(&ha->nic_core_unrecoverable,
3272                     qla83xx_nic_core_unrecoverable_work);
3273         }
3274
3275 skip_dpc:
3276         list_add_tail(&base_vha->list, &ha->vp_list);
3277         base_vha->host->irq = ha->pdev->irq;
3278
3279         /* Initialized the timer */
3280         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3281         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3282             "Started qla2x00_timer with "
3283             "interval=%d.\n", WATCH_INTERVAL);
3284         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3285             "Detected hba at address=%p.\n",
3286             ha);
3287
3288         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3289                 if (ha->fw_attributes & BIT_4) {
3290                         int prot = 0, guard;
3291                         base_vha->flags.difdix_supported = 1;
3292                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3293                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3294                         if (ql2xenabledif == 1)
3295                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3296                         scsi_host_set_prot(host,
3297                             prot | SHOST_DIF_TYPE1_PROTECTION
3298                             | SHOST_DIF_TYPE2_PROTECTION
3299                             | SHOST_DIF_TYPE3_PROTECTION
3300                             | SHOST_DIX_TYPE1_PROTECTION
3301                             | SHOST_DIX_TYPE2_PROTECTION
3302                             | SHOST_DIX_TYPE3_PROTECTION);
3303
3304                         guard = SHOST_DIX_GUARD_CRC;
3305
3306                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3307                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3308                                 guard |= SHOST_DIX_GUARD_IP;
3309
3310                         scsi_host_set_guard(host, guard);
3311                 } else
3312                         base_vha->flags.difdix_supported = 0;
3313         }
3314
3315         ha->isp_ops->enable_intrs(ha);
3316
3317         if (IS_QLAFX00(ha)) {
3318                 ret = qlafx00_fx_disc(base_vha,
3319                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3320                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3321                     QLA_SG_ALL : 128;
3322         }
3323
3324         ret = scsi_add_host(host, &pdev->dev);
3325         if (ret)
3326                 goto probe_failed;
3327
3328         base_vha->flags.init_done = 1;
3329         base_vha->flags.online = 1;
3330         ha->prev_minidump_failed = 0;
3331
3332         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3333             "Init done and hba is online.\n");
3334
3335         if (qla_ini_mode_enabled(base_vha) ||
3336                 qla_dual_mode_enabled(base_vha))
3337                 scsi_scan_host(host);
3338         else
3339                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3340                         "skipping scsi_scan_host() for non-initiator port\n");
3341
3342         qla2x00_alloc_sysfs_attr(base_vha);
3343
3344         if (IS_QLAFX00(ha)) {
3345                 ret = qlafx00_fx_disc(base_vha,
3346                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3347
3348                 /* Register system information */
3349                 ret =  qlafx00_fx_disc(base_vha,
3350                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3351         }
3352
3353         qla2x00_init_host_attr(base_vha);
3354
3355         qla2x00_dfs_setup(base_vha);
3356
3357         ql_log(ql_log_info, base_vha, 0x00fb,
3358             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3359         ql_log(ql_log_info, base_vha, 0x00fc,
3360             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3361             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3362             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3363             base_vha->host_no,
3364             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3365
3366         qlt_add_target(ha, base_vha);
3367
3368         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3369
3370         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3371                 return -ENODEV;
3372
3373         if (ha->flags.detected_lr_sfp) {
3374                 ql_log(ql_log_info, base_vha, 0xffff,
3375                     "Reset chip to pick up LR SFP setting\n");
3376                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3377                 qla2xxx_wake_dpc(base_vha);
3378         }
3379
3380         return 0;
3381
3382 probe_failed:
3383         if (base_vha->gnl.l) {
3384                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3385                                 base_vha->gnl.l, base_vha->gnl.ldma);
3386                 base_vha->gnl.l = NULL;
3387         }
3388
3389         if (base_vha->timer_active)
3390                 qla2x00_stop_timer(base_vha);
3391         base_vha->flags.online = 0;
3392         if (ha->dpc_thread) {
3393                 struct task_struct *t = ha->dpc_thread;
3394
3395                 ha->dpc_thread = NULL;
3396                 kthread_stop(t);
3397         }
3398
3399         qla2x00_free_device(base_vha);
3400         scsi_host_put(base_vha->host);
3401         /*
3402          * Need to NULL out local req/rsp after
3403          * qla2x00_free_device => qla2x00_free_queues frees
3404          * what these are pointing to. Or else we'll
3405          * fall over below in qla2x00_free_req/rsp_que.
3406          */
3407         req = NULL;
3408         rsp = NULL;
3409
3410 probe_hw_failed:
3411         qla2x00_mem_free(ha);
3412         qla2x00_free_req_que(ha, req);
3413         qla2x00_free_rsp_que(ha, rsp);
3414         qla2x00_clear_drv_active(ha);
3415
3416 iospace_config_failed:
3417         if (IS_P3P_TYPE(ha)) {
3418                 if (!ha->nx_pcibase)
3419                         iounmap((device_reg_t *)ha->nx_pcibase);
3420                 if (!ql2xdbwr)
3421                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3422         } else {
3423                 if (ha->iobase)
3424                         iounmap(ha->iobase);
3425                 if (ha->cregbase)
3426                         iounmap(ha->cregbase);
3427         }
3428         pci_release_selected_regions(ha->pdev, ha->bars);
3429         kfree(ha);
3430
3431 disable_device:
3432         pci_disable_device(pdev);
3433         return ret;
3434 }
3435
3436 static void
3437 qla2x00_shutdown(struct pci_dev *pdev)
3438 {
3439         scsi_qla_host_t *vha;
3440         struct qla_hw_data  *ha;
3441
3442         vha = pci_get_drvdata(pdev);
3443         ha = vha->hw;
3444
3445         ql_log(ql_log_info, vha, 0xfffa,
3446                 "Adapter shutdown\n");
3447
3448         /*
3449          * Prevent future board_disable and wait
3450          * until any pending board_disable has completed.
3451          */
3452         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3453         cancel_work_sync(&ha->board_disable);
3454
3455         if (!atomic_read(&pdev->enable_cnt))
3456                 return;
3457
3458         /* Notify ISPFX00 firmware */
3459         if (IS_QLAFX00(ha))
3460                 qlafx00_driver_shutdown(vha, 20);
3461
3462         /* Turn-off FCE trace */
3463         if (ha->flags.fce_enabled) {
3464                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3465                 ha->flags.fce_enabled = 0;
3466         }
3467
3468         /* Turn-off EFT trace */
3469         if (ha->eft)
3470                 qla2x00_disable_eft_trace(vha);
3471
3472         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3473                 if (ha->flags.fw_started)
3474                         qla2x00_abort_isp_cleanup(vha);
3475         } else {
3476                 /* Stop currently executing firmware. */
3477                 qla2x00_try_to_stop_firmware(vha);
3478         }
3479
3480         /* Disable timer */
3481         if (vha->timer_active)
3482                 qla2x00_stop_timer(vha);
3483
3484         /* Turn adapter off line */
3485         vha->flags.online = 0;
3486
3487         /* turn-off interrupts on the card */
3488         if (ha->interrupts_on) {
3489                 vha->flags.init_done = 0;
3490                 ha->isp_ops->disable_intrs(ha);
3491         }
3492
3493         qla2x00_free_irqs(vha);
3494
3495         qla2x00_free_fw_dump(ha);
3496
3497         pci_disable_device(pdev);
3498         ql_log(ql_log_info, vha, 0xfffe,
3499                 "Adapter shutdown successfully.\n");
3500 }
3501
3502 /* Deletes all the virtual ports for a given ha */
3503 static void
3504 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3505 {
3506         scsi_qla_host_t *vha;
3507         unsigned long flags;
3508
3509         mutex_lock(&ha->vport_lock);
3510         while (ha->cur_vport_count) {
3511                 spin_lock_irqsave(&ha->vport_slock, flags);
3512
3513                 BUG_ON(base_vha->list.next == &ha->vp_list);
3514                 /* This assumes first entry in ha->vp_list is always base vha */
3515                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3516                 scsi_host_get(vha->host);
3517
3518                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3519                 mutex_unlock(&ha->vport_lock);
3520
3521                 qla_nvme_delete(vha);
3522
3523                 fc_vport_terminate(vha->fc_vport);
3524                 scsi_host_put(vha->host);
3525
3526                 mutex_lock(&ha->vport_lock);
3527         }
3528         mutex_unlock(&ha->vport_lock);
3529 }
3530
3531 /* Stops all deferred work threads */
3532 static void
3533 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3534 {
3535         /* Cancel all work and destroy DPC workqueues */
3536         if (ha->dpc_lp_wq) {
3537                 cancel_work_sync(&ha->idc_aen);
3538                 destroy_workqueue(ha->dpc_lp_wq);
3539                 ha->dpc_lp_wq = NULL;
3540         }
3541
3542         if (ha->dpc_hp_wq) {
3543                 cancel_work_sync(&ha->nic_core_reset);
3544                 cancel_work_sync(&ha->idc_state_handler);
3545                 cancel_work_sync(&ha->nic_core_unrecoverable);
3546                 destroy_workqueue(ha->dpc_hp_wq);
3547                 ha->dpc_hp_wq = NULL;
3548         }
3549
3550         /* Kill the kernel thread for this host */
3551         if (ha->dpc_thread) {
3552                 struct task_struct *t = ha->dpc_thread;
3553
3554                 /*
3555                  * qla2xxx_wake_dpc checks for ->dpc_thread
3556                  * so we need to zero it out.
3557                  */
3558                 ha->dpc_thread = NULL;
3559                 kthread_stop(t);
3560         }
3561 }
3562
3563 static void
3564 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3565 {
3566         if (IS_QLA82XX(ha)) {
3567
3568                 iounmap((device_reg_t *)ha->nx_pcibase);
3569                 if (!ql2xdbwr)
3570                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3571         } else {
3572                 if (ha->iobase)
3573                         iounmap(ha->iobase);
3574
3575                 if (ha->cregbase)
3576                         iounmap(ha->cregbase);
3577
3578                 if (ha->mqiobase)
3579                         iounmap(ha->mqiobase);
3580
3581                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3582                         iounmap(ha->msixbase);
3583         }
3584 }
3585
3586 static void
3587 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3588 {
3589         if (IS_QLA8044(ha)) {
3590                 qla8044_idc_lock(ha);
3591                 qla8044_clear_drv_active(ha);
3592                 qla8044_idc_unlock(ha);
3593         } else if (IS_QLA82XX(ha)) {
3594                 qla82xx_idc_lock(ha);
3595                 qla82xx_clear_drv_active(ha);
3596                 qla82xx_idc_unlock(ha);
3597         }
3598 }
3599
3600 static void
3601 qla2x00_remove_one(struct pci_dev *pdev)
3602 {
3603         scsi_qla_host_t *base_vha;
3604         struct qla_hw_data  *ha;
3605
3606         base_vha = pci_get_drvdata(pdev);
3607         ha = base_vha->hw;
3608         ql_log(ql_log_info, base_vha, 0xb079,
3609             "Removing driver\n");
3610
3611         /* Indicate device removal to prevent future board_disable and wait
3612          * until any pending board_disable has completed. */
3613         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3614         cancel_work_sync(&ha->board_disable);
3615
3616         /*
3617          * If the PCI device is disabled then there was a PCI-disconnect and
3618          * qla2x00_disable_board_on_pci_error has taken care of most of the
3619          * resources.
3620          */
3621         if (!atomic_read(&pdev->enable_cnt)) {
3622                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3623                     base_vha->gnl.l, base_vha->gnl.ldma);
3624                 base_vha->gnl.l = NULL;
3625                 scsi_host_put(base_vha->host);
3626                 kfree(ha);
3627                 pci_set_drvdata(pdev, NULL);
3628                 return;
3629         }
3630         qla2x00_wait_for_hba_ready(base_vha);
3631
3632         /*
3633          * if UNLOADING flag is already set, then continue unload,
3634          * where it was set first.
3635          */
3636         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3637                 return;
3638
3639         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3640                 if (ha->flags.fw_started)
3641                         qla2x00_abort_isp_cleanup(base_vha);
3642         } else if (!IS_QLAFX00(ha)) {
3643                 if (IS_QLA8031(ha)) {
3644                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3645                             "Clearing fcoe driver presence.\n");
3646                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3647                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3648                                     "Error while clearing DRV-Presence.\n");
3649                 }
3650
3651                 qla2x00_try_to_stop_firmware(base_vha);
3652         }
3653
3654         qla2x00_wait_for_sess_deletion(base_vha);
3655
3656         qla_nvme_delete(base_vha);
3657
3658         dma_free_coherent(&ha->pdev->dev,
3659                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3660
3661         base_vha->gnl.l = NULL;
3662
3663         vfree(base_vha->scan.l);
3664
3665         if (IS_QLAFX00(ha))
3666                 qlafx00_driver_shutdown(base_vha, 20);
3667
3668         qla2x00_delete_all_vps(ha, base_vha);
3669
3670         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3671
3672         qla2x00_dfs_remove(base_vha);
3673
3674         qla84xx_put_chip(base_vha);
3675
3676         /* Disable timer */
3677         if (base_vha->timer_active)
3678                 qla2x00_stop_timer(base_vha);
3679
3680         base_vha->flags.online = 0;
3681
3682         /* free DMA memory */
3683         if (ha->exlogin_buf)
3684                 qla2x00_free_exlogin_buffer(ha);
3685
3686         /* free DMA memory */
3687         if (ha->exchoffld_buf)
3688                 qla2x00_free_exchoffld_buffer(ha);
3689
3690         qla2x00_destroy_deferred_work(ha);
3691
3692         qlt_remove_target(ha, base_vha);
3693
3694         qla2x00_free_sysfs_attr(base_vha, true);
3695
3696         fc_remove_host(base_vha->host);
3697         qlt_remove_target_resources(ha);
3698
3699         scsi_remove_host(base_vha->host);
3700
3701         qla2x00_free_device(base_vha);
3702
3703         qla2x00_clear_drv_active(ha);
3704
3705         scsi_host_put(base_vha->host);
3706
3707         qla2x00_unmap_iobases(ha);
3708
3709         pci_release_selected_regions(ha->pdev, ha->bars);
3710         kfree(ha);
3711
3712         pci_disable_pcie_error_reporting(pdev);
3713
3714         pci_disable_device(pdev);
3715 }
3716
3717 static void
3718 qla2x00_free_device(scsi_qla_host_t *vha)
3719 {
3720         struct qla_hw_data *ha = vha->hw;
3721
3722         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3723
3724         /* Disable timer */
3725         if (vha->timer_active)
3726                 qla2x00_stop_timer(vha);
3727
3728         qla25xx_delete_queues(vha);
3729         vha->flags.online = 0;
3730
3731         /* turn-off interrupts on the card */
3732         if (ha->interrupts_on) {
3733                 vha->flags.init_done = 0;
3734                 ha->isp_ops->disable_intrs(ha);
3735         }
3736
3737         qla2x00_free_fcports(vha);
3738
3739         qla2x00_free_irqs(vha);
3740
3741         /* Flush the work queue and remove it */
3742         if (ha->wq) {
3743                 flush_workqueue(ha->wq);
3744                 destroy_workqueue(ha->wq);
3745                 ha->wq = NULL;
3746         }
3747
3748
3749         qla2x00_mem_free(ha);
3750
3751         qla82xx_md_free(vha);
3752
3753         qla2x00_free_queues(ha);
3754 }
3755
3756 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3757 {
3758         fc_port_t *fcport, *tfcport;
3759
3760         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3761                 list_del(&fcport->list);
3762                 qla2x00_clear_loop_id(fcport);
3763                 kfree(fcport);
3764         }
3765 }
3766
3767 static inline void
3768 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3769     int defer)
3770 {
3771         struct fc_rport *rport;
3772         scsi_qla_host_t *base_vha;
3773         unsigned long flags;
3774
3775         if (!fcport->rport)
3776                 return;
3777
3778         rport = fcport->rport;
3779         if (defer) {
3780                 base_vha = pci_get_drvdata(vha->hw->pdev);
3781                 spin_lock_irqsave(vha->host->host_lock, flags);
3782                 fcport->drport = rport;
3783                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3784                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3785                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3786                 qla2xxx_wake_dpc(base_vha);
3787         } else {
3788                 int now;
3789                 if (rport) {
3790                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3791                             "%s %8phN. rport %p roles %x\n",
3792                             __func__, fcport->port_name, rport,
3793                             rport->roles);
3794                         fc_remote_port_delete(rport);
3795                 }
3796                 qlt_do_generation_tick(vha, &now);
3797         }
3798 }
3799
3800 /*
3801  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3802  *
3803  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3804  *
3805  * Return: None.
3806  *
3807  * Context:
3808  */
3809 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3810     int do_login, int defer)
3811 {
3812         if (IS_QLAFX00(vha->hw)) {
3813                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3814                 qla2x00_schedule_rport_del(vha, fcport, defer);
3815                 return;
3816         }
3817
3818         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3819             vha->vp_idx == fcport->vha->vp_idx) {
3820                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3821                 qla2x00_schedule_rport_del(vha, fcport, defer);
3822         }
3823         /*
3824          * We may need to retry the login, so don't change the state of the
3825          * port but do the retries.
3826          */
3827         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3828                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3829
3830         if (!do_login)
3831                 return;
3832
3833         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3834 }
3835
3836 /*
3837  * qla2x00_mark_all_devices_lost
3838  *      Updates fcport state when device goes offline.
3839  *
3840  * Input:
3841  *      ha = adapter block pointer.
3842  *      fcport = port structure pointer.
3843  *
3844  * Return:
3845  *      None.
3846  *
3847  * Context:
3848  */
3849 void
3850 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3851 {
3852         fc_port_t *fcport;
3853
3854         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3855             "Mark all dev lost\n");
3856
3857         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3858                 fcport->scan_state = 0;
3859                 qlt_schedule_sess_for_deletion(fcport);
3860
3861                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3862                         continue;
3863
3864                 /*
3865                  * No point in marking the device as lost, if the device is
3866                  * already DEAD.
3867                  */
3868                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3869                         continue;
3870                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3871                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3872                         if (defer)
3873                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3874                         else if (vha->vp_idx == fcport->vha->vp_idx)
3875                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3876                 }
3877         }
3878 }
3879
3880 /*
3881 * qla2x00_mem_alloc
3882 *      Allocates adapter memory.
3883 *
3884 * Returns:
3885 *      0  = success.
3886 *      !0  = failure.
3887 */
3888 static int
3889 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3890         struct req_que **req, struct rsp_que **rsp)
3891 {
3892         char    name[16];
3893
3894         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3895                 &ha->init_cb_dma, GFP_KERNEL);
3896         if (!ha->init_cb)
3897                 goto fail;
3898
3899         if (qlt_mem_alloc(ha) < 0)
3900                 goto fail_free_init_cb;
3901
3902         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3903                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3904         if (!ha->gid_list)
3905                 goto fail_free_tgt_mem;
3906
3907         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3908         if (!ha->srb_mempool)
3909                 goto fail_free_gid_list;
3910
3911         if (IS_P3P_TYPE(ha)) {
3912                 /* Allocate cache for CT6 Ctx. */
3913                 if (!ctx_cachep) {
3914                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3915                                 sizeof(struct ct6_dsd), 0,
3916                                 SLAB_HWCACHE_ALIGN, NULL);
3917                         if (!ctx_cachep)
3918                                 goto fail_free_srb_mempool;
3919                 }
3920                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3921                         ctx_cachep);
3922                 if (!ha->ctx_mempool)
3923                         goto fail_free_srb_mempool;
3924                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3925                     "ctx_cachep=%p ctx_mempool=%p.\n",
3926                     ctx_cachep, ha->ctx_mempool);
3927         }
3928
3929         /* Get memory for cached NVRAM */
3930         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3931         if (!ha->nvram)
3932                 goto fail_free_ctx_mempool;
3933
3934         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3935                 ha->pdev->device);
3936         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3937                 DMA_POOL_SIZE, 8, 0);
3938         if (!ha->s_dma_pool)
3939                 goto fail_free_nvram;
3940
3941         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3942             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3943             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3944
3945         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3946                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3947                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3948                 if (!ha->dl_dma_pool) {
3949                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3950                             "Failed to allocate memory for dl_dma_pool.\n");
3951                         goto fail_s_dma_pool;
3952                 }
3953
3954                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3955                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3956                 if (!ha->fcp_cmnd_dma_pool) {
3957                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3958                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3959                         goto fail_dl_dma_pool;
3960                 }
3961                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3962                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3963                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3964         }
3965
3966         /* Allocate memory for SNS commands */
3967         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3968         /* Get consistent memory allocated for SNS commands */
3969                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3970                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3971                 if (!ha->sns_cmd)
3972                         goto fail_dma_pool;
3973                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3974                     "sns_cmd: %p.\n", ha->sns_cmd);
3975         } else {
3976         /* Get consistent memory allocated for MS IOCB */
3977                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3978                         &ha->ms_iocb_dma);
3979                 if (!ha->ms_iocb)
3980                         goto fail_dma_pool;
3981         /* Get consistent memory allocated for CT SNS commands */
3982                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3983                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3984                 if (!ha->ct_sns)
3985                         goto fail_free_ms_iocb;
3986                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3987                     "ms_iocb=%p ct_sns=%p.\n",
3988                     ha->ms_iocb, ha->ct_sns);
3989         }
3990
3991         /* Allocate memory for request ring */
3992         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3993         if (!*req) {
3994                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3995                     "Failed to allocate memory for req.\n");
3996                 goto fail_req;
3997         }
3998         (*req)->length = req_len;
3999         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4000                 ((*req)->length + 1) * sizeof(request_t),
4001                 &(*req)->dma, GFP_KERNEL);
4002         if (!(*req)->ring) {
4003                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4004                     "Failed to allocate memory for req_ring.\n");
4005                 goto fail_req_ring;
4006         }
4007         /* Allocate memory for response ring */
4008         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4009         if (!*rsp) {
4010                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4011                     "Failed to allocate memory for rsp.\n");
4012                 goto fail_rsp;
4013         }
4014         (*rsp)->hw = ha;
4015         (*rsp)->length = rsp_len;
4016         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4017                 ((*rsp)->length + 1) * sizeof(response_t),
4018                 &(*rsp)->dma, GFP_KERNEL);
4019         if (!(*rsp)->ring) {
4020                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4021                     "Failed to allocate memory for rsp_ring.\n");
4022                 goto fail_rsp_ring;
4023         }
4024         (*req)->rsp = *rsp;
4025         (*rsp)->req = *req;
4026         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4027             "req=%p req->length=%d req->ring=%p rsp=%p "
4028             "rsp->length=%d rsp->ring=%p.\n",
4029             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4030             (*rsp)->ring);
4031         /* Allocate memory for NVRAM data for vports */
4032         if (ha->nvram_npiv_size) {
4033                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4034                                         sizeof(struct qla_npiv_entry),
4035                                         GFP_KERNEL);
4036                 if (!ha->npiv_info) {
4037                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4038                             "Failed to allocate memory for npiv_info.\n");
4039                         goto fail_npiv_info;
4040                 }
4041         } else
4042                 ha->npiv_info = NULL;
4043
4044         /* Get consistent memory allocated for EX-INIT-CB. */
4045         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4046                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4047                     &ha->ex_init_cb_dma);
4048                 if (!ha->ex_init_cb)
4049                         goto fail_ex_init_cb;
4050                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4051                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4052         }
4053
4054         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4055
4056         /* Get consistent memory allocated for Async Port-Database. */
4057         if (!IS_FWI2_CAPABLE(ha)) {
4058                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4059                         &ha->async_pd_dma);
4060                 if (!ha->async_pd)
4061                         goto fail_async_pd;
4062                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4063                     "async_pd=%p.\n", ha->async_pd);
4064         }
4065
4066         INIT_LIST_HEAD(&ha->vp_list);
4067
4068         /* Allocate memory for our loop_id bitmap */
4069         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4070                                   sizeof(long),
4071                                   GFP_KERNEL);
4072         if (!ha->loop_id_map)
4073                 goto fail_loop_id_map;
4074         else {
4075                 qla2x00_set_reserved_loop_ids(ha);
4076                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4077                     "loop_id_map=%p.\n", ha->loop_id_map);
4078         }
4079
4080         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4081             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4082         if (!ha->sfp_data) {
4083                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4084                     "Unable to allocate memory for SFP read-data.\n");
4085                 goto fail_sfp_data;
4086         }
4087
4088         return 0;
4089
4090 fail_sfp_data:
4091         kfree(ha->loop_id_map);
4092 fail_loop_id_map:
4093         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4094 fail_async_pd:
4095         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4096 fail_ex_init_cb:
4097         kfree(ha->npiv_info);
4098 fail_npiv_info:
4099         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4100                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4101         (*rsp)->ring = NULL;
4102         (*rsp)->dma = 0;
4103 fail_rsp_ring:
4104         kfree(*rsp);
4105         *rsp = NULL;
4106 fail_rsp:
4107         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4108                 sizeof(request_t), (*req)->ring, (*req)->dma);
4109         (*req)->ring = NULL;
4110         (*req)->dma = 0;
4111 fail_req_ring:
4112         kfree(*req);
4113         *req = NULL;
4114 fail_req:
4115         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4116                 ha->ct_sns, ha->ct_sns_dma);
4117         ha->ct_sns = NULL;
4118         ha->ct_sns_dma = 0;
4119 fail_free_ms_iocb:
4120         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4121         ha->ms_iocb = NULL;
4122         ha->ms_iocb_dma = 0;
4123
4124         if (ha->sns_cmd)
4125                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4126                     ha->sns_cmd, ha->sns_cmd_dma);
4127 fail_dma_pool:
4128         if (IS_QLA82XX(ha) || ql2xenabledif) {
4129                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4130                 ha->fcp_cmnd_dma_pool = NULL;
4131         }
4132 fail_dl_dma_pool:
4133         if (IS_QLA82XX(ha) || ql2xenabledif) {
4134                 dma_pool_destroy(ha->dl_dma_pool);
4135                 ha->dl_dma_pool = NULL;
4136         }
4137 fail_s_dma_pool:
4138         dma_pool_destroy(ha->s_dma_pool);
4139         ha->s_dma_pool = NULL;
4140 fail_free_nvram:
4141         kfree(ha->nvram);
4142         ha->nvram = NULL;
4143 fail_free_ctx_mempool:
4144         if (ha->ctx_mempool)
4145                 mempool_destroy(ha->ctx_mempool);
4146         ha->ctx_mempool = NULL;
4147 fail_free_srb_mempool:
4148         if (ha->srb_mempool)
4149                 mempool_destroy(ha->srb_mempool);
4150         ha->srb_mempool = NULL;
4151 fail_free_gid_list:
4152         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4153         ha->gid_list,
4154         ha->gid_list_dma);
4155         ha->gid_list = NULL;
4156         ha->gid_list_dma = 0;
4157 fail_free_tgt_mem:
4158         qlt_mem_free(ha);
4159 fail_free_init_cb:
4160         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4161         ha->init_cb_dma);
4162         ha->init_cb = NULL;
4163         ha->init_cb_dma = 0;
4164 fail:
4165         ql_log(ql_log_fatal, NULL, 0x0030,
4166             "Memory allocation failure.\n");
4167         return -ENOMEM;
4168 }
4169
4170 int
4171 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4172 {
4173         int rval;
4174         uint16_t        size, max_cnt, temp;
4175         struct qla_hw_data *ha = vha->hw;
4176
4177         /* Return if we don't need to alloacate any extended logins */
4178         if (!ql2xexlogins)
4179                 return QLA_SUCCESS;
4180
4181         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4182                 return QLA_SUCCESS;
4183
4184         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4185         max_cnt = 0;
4186         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4187         if (rval != QLA_SUCCESS) {
4188                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4189                     "Failed to get exlogin status.\n");
4190                 return rval;
4191         }
4192
4193         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4194         temp *= size;
4195
4196         if (temp != ha->exlogin_size) {
4197                 qla2x00_free_exlogin_buffer(ha);
4198                 ha->exlogin_size = temp;
4199
4200                 ql_log(ql_log_info, vha, 0xd024,
4201                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4202                     max_cnt, size, temp);
4203
4204                 ql_log(ql_log_info, vha, 0xd025,
4205                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4206
4207                 /* Get consistent memory for extended logins */
4208                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4209                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4210                 if (!ha->exlogin_buf) {
4211                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4212                     "Failed to allocate memory for exlogin_buf_dma.\n");
4213                         return -ENOMEM;
4214                 }
4215         }
4216
4217         /* Now configure the dma buffer */
4218         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4219         if (rval) {
4220                 ql_log(ql_log_fatal, vha, 0xd033,
4221                     "Setup extended login buffer  ****FAILED****.\n");
4222                 qla2x00_free_exlogin_buffer(ha);
4223         }
4224
4225         return rval;
4226 }
4227
4228 /*
4229 * qla2x00_free_exlogin_buffer
4230 *
4231 * Input:
4232 *       ha = adapter block pointer
4233 */
4234 void
4235 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4236 {
4237         if (ha->exlogin_buf) {
4238                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4239                     ha->exlogin_buf, ha->exlogin_buf_dma);
4240                 ha->exlogin_buf = NULL;
4241                 ha->exlogin_size = 0;
4242         }
4243 }
4244
4245 static void
4246 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4247 {
4248         u32 temp;
4249         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4250
4251         if (max_cnt > vha->hw->max_exchg)
4252                 max_cnt = vha->hw->max_exchg;
4253
4254         if (qla_ini_mode_enabled(vha)) {
4255                 if (ql2xiniexchg > max_cnt)
4256                         ql2xiniexchg = max_cnt;
4257
4258                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4259                         *ret_cnt = ql2xiniexchg;
4260         } else if (qla_tgt_mode_enabled(vha)) {
4261                 if (ql2xexchoffld > max_cnt)
4262                         ql2xexchoffld = max_cnt;
4263
4264                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4265                         *ret_cnt = ql2xexchoffld;
4266         } else if (qla_dual_mode_enabled(vha)) {
4267                 temp = ql2xiniexchg + ql2xexchoffld;
4268                 if (temp > max_cnt) {
4269                         ql2xiniexchg -= (temp - max_cnt)/2;
4270                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4271                         temp = max_cnt;
4272                 }
4273
4274                 if (temp > FW_DEF_EXCHANGES_CNT)
4275                         *ret_cnt = temp;
4276         }
4277 }
4278
4279 int
4280 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4281 {
4282         int rval;
4283         u16     size, max_cnt;
4284         u32 actual_cnt, totsz;
4285         struct qla_hw_data *ha = vha->hw;
4286
4287         if (!ha->flags.exchoffld_enabled)
4288                 return QLA_SUCCESS;
4289
4290         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4291                 return QLA_SUCCESS;
4292
4293         max_cnt = 0;
4294         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4295         if (rval != QLA_SUCCESS) {
4296                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4297                     "Failed to get exlogin status.\n");
4298                 return rval;
4299         }
4300
4301         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4302         ql_log(ql_log_info, vha, 0xd014,
4303             "Actual exchange offload count: %d.\n", actual_cnt);
4304
4305         totsz = actual_cnt * size;
4306
4307         if (totsz != ha->exchoffld_size) {
4308                 qla2x00_free_exchoffld_buffer(ha);
4309                 ha->exchoffld_size = totsz;
4310
4311                 ql_log(ql_log_info, vha, 0xd016,
4312                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4313                     max_cnt, actual_cnt, size, totsz);
4314
4315                 ql_log(ql_log_info, vha, 0xd017,
4316                     "Exchange Buffers requested size = 0x%x\n",
4317                     ha->exchoffld_size);
4318
4319                 /* Get consistent memory for extended logins */
4320                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4321                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4322                 if (!ha->exchoffld_buf) {
4323                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4324                         "Failed to allocate memory for Exchange Offload.\n");
4325
4326                         if (ha->max_exchg >
4327                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4328                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4329                         } else if (ha->max_exchg >
4330                             (FW_DEF_EXCHANGES_CNT + 512)) {
4331                                 ha->max_exchg -= 512;
4332                         } else {
4333                                 ha->flags.exchoffld_enabled = 0;
4334                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4335                                     "Disabling Exchange offload due to lack of memory\n");
4336                         }
4337                         ha->exchoffld_size = 0;
4338
4339                         return -ENOMEM;
4340                 }
4341         }
4342
4343         /* Now configure the dma buffer */
4344         rval = qla_set_exchoffld_mem_cfg(vha);
4345         if (rval) {
4346                 ql_log(ql_log_fatal, vha, 0xd02e,
4347                     "Setup exchange offload buffer ****FAILED****.\n");
4348                 qla2x00_free_exchoffld_buffer(ha);
4349         } else {
4350                 /* re-adjust number of target exchange */
4351                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4352
4353                 if (qla_ini_mode_enabled(vha))
4354                         icb->exchange_count = 0;
4355                 else
4356                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4357         }
4358
4359         return rval;
4360 }
4361
4362 /*
4363 * qla2x00_free_exchoffld_buffer
4364 *
4365 * Input:
4366 *       ha = adapter block pointer
4367 */
4368 void
4369 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4370 {
4371         if (ha->exchoffld_buf) {
4372                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4373                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4374                 ha->exchoffld_buf = NULL;
4375                 ha->exchoffld_size = 0;
4376         }
4377 }
4378
4379 /*
4380 * qla2x00_free_fw_dump
4381 *       Frees fw dump stuff.
4382 *
4383 * Input:
4384 *       ha = adapter block pointer
4385 */
4386 static void
4387 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4388 {
4389         if (ha->fce)
4390                 dma_free_coherent(&ha->pdev->dev,
4391                     FCE_SIZE, ha->fce, ha->fce_dma);
4392
4393         if (ha->eft)
4394                 dma_free_coherent(&ha->pdev->dev,
4395                     EFT_SIZE, ha->eft, ha->eft_dma);
4396
4397         if (ha->fw_dump)
4398                 vfree(ha->fw_dump);
4399         if (ha->fw_dump_template)
4400                 vfree(ha->fw_dump_template);
4401
4402         ha->fce = NULL;
4403         ha->fce_dma = 0;
4404         ha->eft = NULL;
4405         ha->eft_dma = 0;
4406         ha->fw_dumped = 0;
4407         ha->fw_dump_cap_flags = 0;
4408         ha->fw_dump_reading = 0;
4409         ha->fw_dump = NULL;
4410         ha->fw_dump_len = 0;
4411         ha->fw_dump_template = NULL;
4412         ha->fw_dump_template_len = 0;
4413 }
4414
4415 /*
4416 * qla2x00_mem_free
4417 *      Frees all adapter allocated memory.
4418 *
4419 * Input:
4420 *      ha = adapter block pointer.
4421 */
4422 static void
4423 qla2x00_mem_free(struct qla_hw_data *ha)
4424 {
4425         qla2x00_free_fw_dump(ha);
4426
4427         if (ha->mctp_dump)
4428                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4429                     ha->mctp_dump_dma);
4430
4431         if (ha->srb_mempool)
4432                 mempool_destroy(ha->srb_mempool);
4433
4434         if (ha->dcbx_tlv)
4435                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4436                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4437
4438         if (ha->xgmac_data)
4439                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4440                     ha->xgmac_data, ha->xgmac_data_dma);
4441
4442         if (ha->sns_cmd)
4443                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4444                 ha->sns_cmd, ha->sns_cmd_dma);
4445
4446         if (ha->ct_sns)
4447                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4448                 ha->ct_sns, ha->ct_sns_dma);
4449
4450         if (ha->sfp_data)
4451                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4452                     ha->sfp_data_dma);
4453
4454         if (ha->ms_iocb)
4455                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4456
4457         if (ha->ex_init_cb)
4458                 dma_pool_free(ha->s_dma_pool,
4459                         ha->ex_init_cb, ha->ex_init_cb_dma);
4460
4461         if (ha->async_pd)
4462                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4463
4464         if (ha->s_dma_pool)
4465                 dma_pool_destroy(ha->s_dma_pool);
4466
4467         if (ha->gid_list)
4468                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4469                 ha->gid_list, ha->gid_list_dma);
4470
4471         if (IS_QLA82XX(ha)) {
4472                 if (!list_empty(&ha->gbl_dsd_list)) {
4473                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4474
4475                         /* clean up allocated prev pool */
4476                         list_for_each_entry_safe(dsd_ptr,
4477                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4478                                 dma_pool_free(ha->dl_dma_pool,
4479                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4480                                 list_del(&dsd_ptr->list);
4481                                 kfree(dsd_ptr);
4482                         }
4483                 }
4484         }
4485
4486         if (ha->dl_dma_pool)
4487                 dma_pool_destroy(ha->dl_dma_pool);
4488
4489         if (ha->fcp_cmnd_dma_pool)
4490                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4491
4492         if (ha->ctx_mempool)
4493                 mempool_destroy(ha->ctx_mempool);
4494
4495         qlt_mem_free(ha);
4496
4497         if (ha->init_cb)
4498                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4499                         ha->init_cb, ha->init_cb_dma);
4500
4501         vfree(ha->optrom_buffer);
4502         kfree(ha->nvram);
4503         kfree(ha->npiv_info);
4504         kfree(ha->swl);
4505         kfree(ha->loop_id_map);
4506
4507         ha->srb_mempool = NULL;
4508         ha->ctx_mempool = NULL;
4509         ha->sns_cmd = NULL;
4510         ha->sns_cmd_dma = 0;
4511         ha->ct_sns = NULL;
4512         ha->ct_sns_dma = 0;
4513         ha->ms_iocb = NULL;
4514         ha->ms_iocb_dma = 0;
4515         ha->init_cb = NULL;
4516         ha->init_cb_dma = 0;
4517         ha->ex_init_cb = NULL;
4518         ha->ex_init_cb_dma = 0;
4519         ha->async_pd = NULL;
4520         ha->async_pd_dma = 0;
4521         ha->loop_id_map = NULL;
4522         ha->npiv_info = NULL;
4523         ha->optrom_buffer = NULL;
4524         ha->swl = NULL;
4525         ha->nvram = NULL;
4526         ha->mctp_dump = NULL;
4527         ha->dcbx_tlv = NULL;
4528         ha->xgmac_data = NULL;
4529         ha->sfp_data = NULL;
4530
4531         ha->s_dma_pool = NULL;
4532         ha->dl_dma_pool = NULL;
4533         ha->fcp_cmnd_dma_pool = NULL;
4534
4535         ha->gid_list = NULL;
4536         ha->gid_list_dma = 0;
4537
4538         ha->tgt.atio_ring = NULL;
4539         ha->tgt.atio_dma = 0;
4540         ha->tgt.tgt_vp_map = NULL;
4541 }
4542
4543 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4544                                                 struct qla_hw_data *ha)
4545 {
4546         struct Scsi_Host *host;
4547         struct scsi_qla_host *vha = NULL;
4548
4549         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4550         if (!host) {
4551                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4552                     "Failed to allocate host from the scsi layer, aborting.\n");
4553                 return NULL;
4554         }
4555
4556         /* Clear our data area */
4557         vha = shost_priv(host);
4558         memset(vha, 0, sizeof(scsi_qla_host_t));
4559
4560         vha->host = host;
4561         vha->host_no = host->host_no;
4562         vha->hw = ha;
4563
4564         INIT_LIST_HEAD(&vha->vp_fcports);
4565         INIT_LIST_HEAD(&vha->work_list);
4566         INIT_LIST_HEAD(&vha->list);
4567         INIT_LIST_HEAD(&vha->qla_cmd_list);
4568         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4569         INIT_LIST_HEAD(&vha->logo_list);
4570         INIT_LIST_HEAD(&vha->plogi_ack_list);
4571         INIT_LIST_HEAD(&vha->qp_list);
4572         INIT_LIST_HEAD(&vha->gnl.fcports);
4573         INIT_LIST_HEAD(&vha->nvme_rport_list);
4574         INIT_LIST_HEAD(&vha->gpnid_list);
4575         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4576
4577         spin_lock_init(&vha->work_lock);
4578         spin_lock_init(&vha->cmd_list_lock);
4579         init_waitqueue_head(&vha->fcport_waitQ);
4580         init_waitqueue_head(&vha->vref_waitq);
4581
4582         vha->gnl.size = sizeof(struct get_name_list_extended) *
4583                         (ha->max_loop_id + 1);
4584         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4585             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4586         if (!vha->gnl.l) {
4587                 ql_log(ql_log_fatal, vha, 0xd04a,
4588                     "Alloc failed for name list.\n");
4589                 scsi_remove_host(vha->host);
4590                 return NULL;
4591         }
4592
4593         /* todo: what about ext login? */
4594         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4595         vha->scan.l = vmalloc(vha->scan.size);
4596         if (!vha->scan.l) {
4597                 ql_log(ql_log_fatal, vha, 0xd04a,
4598                     "Alloc failed for scan database.\n");
4599                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4600                     vha->gnl.l, vha->gnl.ldma);
4601                 vha->gnl.l = NULL;
4602                 scsi_remove_host(vha->host);
4603                 return NULL;
4604         }
4605         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4606
4607         snprintf(vha->host_str, sizeof(vha->host_str), "%s_%lu",
4608                  QLA2XXX_DRIVER_NAME, vha->host_no);
4609         ql_dbg(ql_dbg_init, vha, 0x0041,
4610             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4611             vha->host, vha->hw, vha,
4612             dev_name(&(ha->pdev->dev)));
4613
4614         return vha;
4615 }
4616
4617 struct qla_work_evt *
4618 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4619 {
4620         struct qla_work_evt *e;
4621         uint8_t bail;
4622
4623         if (test_bit(UNLOADING, &vha->dpc_flags))
4624                 return NULL;
4625
4626         QLA_VHA_MARK_BUSY(vha, bail);
4627         if (bail)
4628                 return NULL;
4629
4630         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4631         if (!e) {
4632                 QLA_VHA_MARK_NOT_BUSY(vha);
4633                 return NULL;
4634         }
4635
4636         INIT_LIST_HEAD(&e->list);
4637         e->type = type;
4638         e->flags = QLA_EVT_FLAG_FREE;
4639         return e;
4640 }
4641
4642 int
4643 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4644 {
4645         unsigned long flags;
4646         bool q = false;
4647
4648         spin_lock_irqsave(&vha->work_lock, flags);
4649         list_add_tail(&e->list, &vha->work_list);
4650
4651         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4652                 q = true;
4653
4654         spin_unlock_irqrestore(&vha->work_lock, flags);
4655
4656         if (q)
4657                 queue_work(vha->hw->wq, &vha->iocb_work);
4658
4659         return QLA_SUCCESS;
4660 }
4661
4662 int
4663 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4664     u32 data)
4665 {
4666         struct qla_work_evt *e;
4667
4668         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4669         if (!e)
4670                 return QLA_FUNCTION_FAILED;
4671
4672         e->u.aen.code = code;
4673         e->u.aen.data = data;
4674         return qla2x00_post_work(vha, e);
4675 }
4676
4677 int
4678 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4679 {
4680         struct qla_work_evt *e;
4681
4682         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4683         if (!e)
4684                 return QLA_FUNCTION_FAILED;
4685
4686         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4687         return qla2x00_post_work(vha, e);
4688 }
4689
4690 #define qla2x00_post_async_work(name, type)     \
4691 int qla2x00_post_async_##name##_work(           \
4692     struct scsi_qla_host *vha,                  \
4693     fc_port_t *fcport, uint16_t *data)          \
4694 {                                               \
4695         struct qla_work_evt *e;                 \
4696                                                 \
4697         e = qla2x00_alloc_work(vha, type);      \
4698         if (!e)                                 \
4699                 return QLA_FUNCTION_FAILED;     \
4700                                                 \
4701         e->u.logio.fcport = fcport;             \
4702         if (data) {                             \
4703                 e->u.logio.data[0] = data[0];   \
4704                 e->u.logio.data[1] = data[1];   \
4705         }                                       \
4706         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4707         return qla2x00_post_work(vha, e);       \
4708 }
4709
4710 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4711 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4712 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4713 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4714 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4715 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4716 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4717
4718 int
4719 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4720 {
4721         struct qla_work_evt *e;
4722
4723         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4724         if (!e)
4725                 return QLA_FUNCTION_FAILED;
4726
4727         e->u.uevent.code = code;
4728         return qla2x00_post_work(vha, e);
4729 }
4730
4731 static void
4732 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4733 {
4734         char event_string[40];
4735         char *envp[] = { event_string, NULL };
4736
4737         switch (code) {
4738         case QLA_UEVENT_CODE_FW_DUMP:
4739                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%lu",
4740                     vha->host_no);
4741                 break;
4742         default:
4743                 /* do nothing */
4744                 break;
4745         }
4746         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4747 }
4748
4749 int
4750 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4751                         uint32_t *data, int cnt)
4752 {
4753         struct qla_work_evt *e;
4754
4755         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4756         if (!e)
4757                 return QLA_FUNCTION_FAILED;
4758
4759         e->u.aenfx.evtcode = evtcode;
4760         e->u.aenfx.count = cnt;
4761         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4762         return qla2x00_post_work(vha, e);
4763 }
4764
4765 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4766 {
4767         unsigned long flags;
4768
4769         if (IS_SW_RESV_ADDR(fcport->d_id))
4770                 return;
4771
4772         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4773         if (fcport->disc_state == DSC_UPD_FCPORT) {
4774                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4775                 return;
4776         }
4777         fcport->jiffies_at_registration = jiffies;
4778         fcport->sec_since_registration = 0;
4779         fcport->next_disc_state = DSC_DELETED;
4780         fcport->disc_state = DSC_UPD_FCPORT;
4781         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4782
4783         queue_work(system_unbound_wq, &fcport->reg_work);
4784 }
4785
4786 static
4787 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4788 {
4789         unsigned long flags;
4790         fc_port_t *fcport =  NULL, *tfcp;
4791         struct qlt_plogi_ack_t *pla =
4792             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4793         uint8_t free_fcport = 0;
4794
4795         ql_dbg(ql_dbg_disc, vha, 0xffff,
4796             "%s %d %8phC enter\n",
4797             __func__, __LINE__, e->u.new_sess.port_name);
4798
4799         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4800         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4801         if (fcport) {
4802                 fcport->d_id = e->u.new_sess.id;
4803                 if (pla) {
4804                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4805                         memcpy(fcport->node_name,
4806                             pla->iocb.u.isp24.u.plogi.node_name,
4807                             WWN_SIZE);
4808                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4809                         /* we took an extra ref_count to prevent PLOGI ACK when
4810                          * fcport/sess has not been created.
4811                          */
4812                         pla->ref_count--;
4813                 }
4814         } else {
4815                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4816                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4817                 if (fcport) {
4818                         fcport->d_id = e->u.new_sess.id;
4819                         fcport->flags |= FCF_FABRIC_DEVICE;
4820                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4821                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
4822                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
4823
4824                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
4825                                 fcport->fc4_type = FC4_TYPE_OTHER;
4826                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
4827                         }
4828
4829                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4830                             WWN_SIZE);
4831                 } else {
4832                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4833                                    "%s %8phC mem alloc fail.\n",
4834                                    __func__, e->u.new_sess.port_name);
4835
4836                         if (pla)
4837                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4838                         return;
4839                 }
4840
4841                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4842                 /* search again to make sure no one else got ahead */
4843                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4844                     e->u.new_sess.port_name, 1);
4845                 if (tfcp) {
4846                         /* should rarily happen */
4847                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4848                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4849                             __func__, tfcp->port_name, tfcp->disc_state,
4850                             tfcp->fw_login_state);
4851
4852                         free_fcport = 1;
4853                 } else {
4854                         list_add_tail(&fcport->list, &vha->vp_fcports);
4855
4856                 }
4857                 if (pla) {
4858                         qlt_plogi_ack_link(vha, pla, fcport,
4859                             QLT_PLOGI_LINK_SAME_WWN);
4860                         pla->ref_count--;
4861                 }
4862         }
4863         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4864
4865         if (fcport) {
4866                 fcport->id_changed = 1;
4867                 fcport->scan_state = QLA_FCPORT_FOUND;
4868                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4869                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
4870
4871                 if (pla) {
4872                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
4873                                 u16 wd3_lo;
4874
4875                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4876                                 fcport->local = 0;
4877                                 fcport->loop_id =
4878                                         le16_to_cpu(
4879                                             pla->iocb.u.isp24.nport_handle);
4880                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4881                                 wd3_lo =
4882                                     le16_to_cpu(
4883                                         pla->iocb.u.isp24.u.prli.wd3_lo);
4884
4885                                 if (wd3_lo & BIT_7)
4886                                         fcport->conf_compl_supported = 1;
4887
4888                                 if ((wd3_lo & BIT_4) == 0)
4889                                         fcport->port_type = FCT_INITIATOR;
4890                                 else
4891                                         fcport->port_type = FCT_TARGET;
4892                         }
4893                         qlt_plogi_ack_unref(vha, pla);
4894                 } else {
4895                         fc_port_t *dfcp = NULL;
4896
4897                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4898                         tfcp = qla2x00_find_fcport_by_nportid(vha,
4899                             &e->u.new_sess.id, 1);
4900                         if (tfcp && (tfcp != fcport)) {
4901                                 /*
4902                                  * We have a conflict fcport with same NportID.
4903                                  */
4904                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
4905                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
4906                                     __func__, tfcp->port_name, tfcp->disc_state,
4907                                     tfcp->fw_login_state);
4908
4909                                 switch (tfcp->disc_state) {
4910                                 case DSC_DELETED:
4911                                         break;
4912                                 case DSC_DELETE_PEND:
4913                                         fcport->login_pause = 1;
4914                                         tfcp->conflict = fcport;
4915                                         break;
4916                                 default:
4917                                         fcport->login_pause = 1;
4918                                         tfcp->conflict = fcport;
4919                                         dfcp = tfcp;
4920                                         break;
4921                                 }
4922                         }
4923                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4924                         if (dfcp)
4925                                 qlt_schedule_sess_for_deletion(tfcp);
4926
4927
4928                         if (N2N_TOPO(vha->hw))
4929                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
4930
4931                         if (N2N_TOPO(vha->hw)) {
4932                                 if (vha->flags.nvme_enabled) {
4933                                         fcport->fc4f_nvme = 1;
4934                                         fcport->n2n_flag = 1;
4935                                 }
4936                                 fcport->fw_login_state = 0;
4937                                 /*
4938                                  * wait link init done before sending login
4939                                  */
4940                         } else {
4941                                 qla24xx_fcport_handle_login(vha, fcport);
4942                         }
4943                 }
4944         }
4945
4946         if (free_fcport) {
4947                 qla2x00_free_fcport(fcport);
4948                 if (pla)
4949                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
4950         }
4951 }
4952
4953 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
4954 {
4955         struct srb *sp = e->u.iosb.sp;
4956         int rval;
4957
4958         rval = qla2x00_start_sp(sp);
4959         if (rval != QLA_SUCCESS) {
4960                 ql_dbg(ql_dbg_disc, vha, 0x2043,
4961                     "%s: %s: Re-issue IOCB failed (%d).\n",
4962                     __func__, sp->name, rval);
4963                 qla24xx_sp_unmap(vha, sp);
4964         }
4965 }
4966
4967 void
4968 qla2x00_do_work(struct scsi_qla_host *vha)
4969 {
4970         struct qla_work_evt *e, *tmp;
4971         unsigned long flags;
4972         LIST_HEAD(work);
4973
4974         spin_lock_irqsave(&vha->work_lock, flags);
4975         list_splice_init(&vha->work_list, &work);
4976         spin_unlock_irqrestore(&vha->work_lock, flags);
4977
4978         list_for_each_entry_safe(e, tmp, &work, list) {
4979                 list_del_init(&e->list);
4980
4981                 switch (e->type) {
4982                 case QLA_EVT_AEN:
4983                         fc_host_post_event(vha->host, fc_get_event_number(),
4984                             e->u.aen.code, e->u.aen.data);
4985                         break;
4986                 case QLA_EVT_IDC_ACK:
4987                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4988                         break;
4989                 case QLA_EVT_ASYNC_LOGIN:
4990                         qla2x00_async_login(vha, e->u.logio.fcport,
4991                             e->u.logio.data);
4992                         break;
4993                 case QLA_EVT_ASYNC_LOGOUT:
4994                         qla2x00_async_logout(vha, e->u.logio.fcport);
4995                         break;
4996                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4997                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4998                             e->u.logio.data);
4999                         break;
5000                 case QLA_EVT_ASYNC_ADISC:
5001                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5002                             e->u.logio.data);
5003                         break;
5004                 case QLA_EVT_ASYNC_ADISC_DONE:
5005                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
5006                             e->u.logio.data);
5007                         break;
5008                 case QLA_EVT_UEVENT:
5009                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5010                         break;
5011                 case QLA_EVT_AENFX:
5012                         qlafx00_process_aen(vha, e);
5013                         break;
5014                 case QLA_EVT_GIDPN:
5015                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
5016                         break;
5017                 case QLA_EVT_GPNID:
5018                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5019                         break;
5020                 case QLA_EVT_UNMAP:
5021                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5022                         break;
5023                 case QLA_EVT_RELOGIN:
5024                         qla2x00_relogin(vha);
5025                         break;
5026                 case QLA_EVT_NEW_SESS:
5027                         qla24xx_create_new_sess(vha, e);
5028                         break;
5029                 case QLA_EVT_GPDB:
5030                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5031                             e->u.fcport.opt);
5032                         break;
5033                 case QLA_EVT_PRLI:
5034                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5035                         break;
5036                 case QLA_EVT_GPSC:
5037                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5038                         break;
5039                 case QLA_EVT_GNL:
5040                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5041                         break;
5042                 case QLA_EVT_NACK:
5043                         qla24xx_do_nack_work(vha, e);
5044                         break;
5045                 case QLA_EVT_ASYNC_PRLO:
5046                         qla2x00_async_prlo(vha, e->u.logio.fcport);
5047                         break;
5048                 case QLA_EVT_ASYNC_PRLO_DONE:
5049                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5050                             e->u.logio.data);
5051                         break;
5052                 case QLA_EVT_GPNFT:
5053                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5054                             e->u.gpnft.sp);
5055                         break;
5056                 case QLA_EVT_GPNFT_DONE:
5057                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5058                         break;
5059                 case QLA_EVT_GNNFT_DONE:
5060                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5061                         break;
5062                 case QLA_EVT_GNNID:
5063                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5064                         break;
5065                 case QLA_EVT_GFPNID:
5066                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5067                         break;
5068                 case QLA_EVT_SP_RETRY:
5069                         qla_sp_retry(vha, e);
5070                         break;
5071                 case QLA_EVT_IIDMA:
5072                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5073                         break;
5074                 case QLA_EVT_ELS_PLOGI:
5075                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5076                             e->u.fcport.fcport, false);
5077                         break;
5078                 }
5079                 if (e->flags & QLA_EVT_FLAG_FREE)
5080                         kfree(e);
5081
5082                 /* For each work completed decrement vha ref count */
5083                 QLA_VHA_MARK_NOT_BUSY(vha);
5084         }
5085 }
5086
5087 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5088 {
5089         struct qla_work_evt *e;
5090
5091         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5092
5093         if (!e) {
5094                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5095                 return QLA_FUNCTION_FAILED;
5096         }
5097
5098         return qla2x00_post_work(vha, e);
5099 }
5100
5101 /* Relogins all the fcports of a vport
5102  * Context: dpc thread
5103  */
5104 void qla2x00_relogin(struct scsi_qla_host *vha)
5105 {
5106         fc_port_t       *fcport;
5107         int status, relogin_needed = 0;
5108         struct event_arg ea;
5109
5110         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5111                 /*
5112                  * If the port is not ONLINE then try to login
5113                  * to it if we haven't run out of retries.
5114                  */
5115                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5116                     fcport->login_retry) {
5117                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5118                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5119                                 continue;
5120
5121                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5122                                 fcport->disc_state == DSC_DELETE_PEND) {
5123                                 relogin_needed = 1;
5124                         } else {
5125                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5126                                         memset(&ea, 0, sizeof(ea));
5127                                         ea.event = FCME_RELOGIN;
5128                                         ea.fcport = fcport;
5129                                         qla2x00_fcport_event_handler(vha, &ea);
5130                                 } else if (vha->hw->current_topology ==
5131                                     ISP_CFG_NL) {
5132                                         fcport->login_retry--;
5133                                         status =
5134                                             qla2x00_local_device_login(vha,
5135                                                 fcport);
5136                                         if (status == QLA_SUCCESS) {
5137                                                 fcport->old_loop_id =
5138                                                     fcport->loop_id;
5139                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5140                                                     "Port login OK: logged in ID 0x%x.\n",
5141                                                     fcport->loop_id);
5142                                                 qla2x00_update_fcport
5143                                                         (vha, fcport);
5144                                         } else if (status == 1) {
5145                                                 set_bit(RELOGIN_NEEDED,
5146                                                     &vha->dpc_flags);
5147                                                 /* retry the login again */
5148                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5149                                                     "Retrying %d login again loop_id 0x%x.\n",
5150                                                     fcport->login_retry,
5151                                                     fcport->loop_id);
5152                                         } else {
5153                                                 fcport->login_retry = 0;
5154                                         }
5155
5156                                         if (fcport->login_retry == 0 &&
5157                                             status != QLA_SUCCESS)
5158                                                 qla2x00_clear_loop_id(fcport);
5159                                 }
5160                         }
5161                 }
5162                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5163                         break;
5164         }
5165
5166         if (relogin_needed)
5167                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5168
5169         ql_dbg(ql_dbg_disc, vha, 0x400e,
5170             "Relogin end.\n");
5171 }
5172
5173 /* Schedule work on any of the dpc-workqueues */
5174 void
5175 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5176 {
5177         struct qla_hw_data *ha = base_vha->hw;
5178
5179         switch (work_code) {
5180         case MBA_IDC_AEN: /* 0x8200 */
5181                 if (ha->dpc_lp_wq)
5182                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5183                 break;
5184
5185         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5186                 if (!ha->flags.nic_core_reset_hdlr_active) {
5187                         if (ha->dpc_hp_wq)
5188                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5189                 } else
5190                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5191                             "NIC Core reset is already active. Skip "
5192                             "scheduling it again.\n");
5193                 break;
5194         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5195                 if (ha->dpc_hp_wq)
5196                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5197                 break;
5198         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5199                 if (ha->dpc_hp_wq)
5200                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5201                 break;
5202         default:
5203                 ql_log(ql_log_warn, base_vha, 0xb05f,
5204                     "Unknown work-code=0x%x.\n", work_code);
5205         }
5206
5207         return;
5208 }
5209
5210 /* Work: Perform NIC Core Unrecoverable state handling */
5211 void
5212 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5213 {
5214         struct qla_hw_data *ha =
5215                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5216         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5217         uint32_t dev_state = 0;
5218
5219         qla83xx_idc_lock(base_vha, 0);
5220         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5221         qla83xx_reset_ownership(base_vha);
5222         if (ha->flags.nic_core_reset_owner) {
5223                 ha->flags.nic_core_reset_owner = 0;
5224                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5225                     QLA8XXX_DEV_FAILED);
5226                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5227                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5228         }
5229         qla83xx_idc_unlock(base_vha, 0);
5230 }
5231
5232 /* Work: Execute IDC state handler */
5233 void
5234 qla83xx_idc_state_handler_work(struct work_struct *work)
5235 {
5236         struct qla_hw_data *ha =
5237                 container_of(work, struct qla_hw_data, idc_state_handler);
5238         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5239         uint32_t dev_state = 0;
5240
5241         qla83xx_idc_lock(base_vha, 0);
5242         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5243         if (dev_state == QLA8XXX_DEV_FAILED ||
5244                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5245                 qla83xx_idc_state_handler(base_vha);
5246         qla83xx_idc_unlock(base_vha, 0);
5247 }
5248
5249 static int
5250 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5251 {
5252         int rval = QLA_SUCCESS;
5253         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5254         uint32_t heart_beat_counter1, heart_beat_counter2;
5255
5256         do {
5257                 if (time_after(jiffies, heart_beat_wait)) {
5258                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5259                             "Nic Core f/w is not alive.\n");
5260                         rval = QLA_FUNCTION_FAILED;
5261                         break;
5262                 }
5263
5264                 qla83xx_idc_lock(base_vha, 0);
5265                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5266                     &heart_beat_counter1);
5267                 qla83xx_idc_unlock(base_vha, 0);
5268                 msleep(100);
5269                 qla83xx_idc_lock(base_vha, 0);
5270                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5271                     &heart_beat_counter2);
5272                 qla83xx_idc_unlock(base_vha, 0);
5273         } while (heart_beat_counter1 == heart_beat_counter2);
5274
5275         return rval;
5276 }
5277
5278 /* Work: Perform NIC Core Reset handling */
5279 void
5280 qla83xx_nic_core_reset_work(struct work_struct *work)
5281 {
5282         struct qla_hw_data *ha =
5283                 container_of(work, struct qla_hw_data, nic_core_reset);
5284         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5285         uint32_t dev_state = 0;
5286
5287         if (IS_QLA2031(ha)) {
5288                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5289                         ql_log(ql_log_warn, base_vha, 0xb081,
5290                             "Failed to dump mctp\n");
5291                 return;
5292         }
5293
5294         if (!ha->flags.nic_core_reset_hdlr_active) {
5295                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5296                         qla83xx_idc_lock(base_vha, 0);
5297                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5298                             &dev_state);
5299                         qla83xx_idc_unlock(base_vha, 0);
5300                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5301                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5302                                     "Nic Core f/w is alive.\n");
5303                                 return;
5304                         }
5305                 }
5306
5307                 ha->flags.nic_core_reset_hdlr_active = 1;
5308                 if (qla83xx_nic_core_reset(base_vha)) {
5309                         /* NIC Core reset failed. */
5310                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5311                             "NIC Core reset failed.\n");
5312                 }
5313                 ha->flags.nic_core_reset_hdlr_active = 0;
5314         }
5315 }
5316
5317 /* Work: Handle 8200 IDC aens */
5318 void
5319 qla83xx_service_idc_aen(struct work_struct *work)
5320 {
5321         struct qla_hw_data *ha =
5322                 container_of(work, struct qla_hw_data, idc_aen);
5323         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5324         uint32_t dev_state, idc_control;
5325
5326         qla83xx_idc_lock(base_vha, 0);
5327         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5328         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5329         qla83xx_idc_unlock(base_vha, 0);
5330         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5331                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5332                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5333                             "Application requested NIC Core Reset.\n");
5334                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5335                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5336                     QLA_SUCCESS) {
5337                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5338                             "Other protocol driver requested NIC Core Reset.\n");
5339                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5340                 }
5341         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5342                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5343                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5344         }
5345 }
5346
5347 static void
5348 qla83xx_wait_logic(void)
5349 {
5350         int i;
5351
5352         /* Yield CPU */
5353         if (!in_interrupt()) {
5354                 /*
5355                  * Wait about 200ms before retrying again.
5356                  * This controls the number of retries for single
5357                  * lock operation.
5358                  */
5359                 msleep(100);
5360                 schedule();
5361         } else {
5362                 for (i = 0; i < 20; i++)
5363                         cpu_relax(); /* This a nop instr on i386 */
5364         }
5365 }
5366
5367 static int
5368 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5369 {
5370         int rval;
5371         uint32_t data;
5372         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5373         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5374         struct qla_hw_data *ha = base_vha->hw;
5375         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5376             "Trying force recovery of the IDC lock.\n");
5377
5378         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5379         if (rval)
5380                 return rval;
5381
5382         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5383                 return QLA_SUCCESS;
5384         } else {
5385                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5386                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5387                     data);
5388                 if (rval)
5389                         return rval;
5390
5391                 msleep(200);
5392
5393                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5394                     &data);
5395                 if (rval)
5396                         return rval;
5397
5398                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5399                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5400                                         ~(idc_lck_rcvry_stage_mask));
5401                         rval = qla83xx_wr_reg(base_vha,
5402                             QLA83XX_IDC_LOCK_RECOVERY, data);
5403                         if (rval)
5404                                 return rval;
5405
5406                         /* Forcefully perform IDC UnLock */
5407                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5408                             &data);
5409                         if (rval)
5410                                 return rval;
5411                         /* Clear lock-id by setting 0xff */
5412                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5413                             0xff);
5414                         if (rval)
5415                                 return rval;
5416                         /* Clear lock-recovery by setting 0x0 */
5417                         rval = qla83xx_wr_reg(base_vha,
5418                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5419                         if (rval)
5420                                 return rval;
5421                 } else
5422                         return QLA_SUCCESS;
5423         }
5424
5425         return rval;
5426 }
5427
5428 static int
5429 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5430 {
5431         int rval = QLA_SUCCESS;
5432         uint32_t o_drv_lockid, n_drv_lockid;
5433         unsigned long lock_recovery_timeout;
5434
5435         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5436 retry_lockid:
5437         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5438         if (rval)
5439                 goto exit;
5440
5441         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5442         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5443                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5444                         return QLA_SUCCESS;
5445                 else
5446                         return QLA_FUNCTION_FAILED;
5447         }
5448
5449         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5450         if (rval)
5451                 goto exit;
5452
5453         if (o_drv_lockid == n_drv_lockid) {
5454                 qla83xx_wait_logic();
5455                 goto retry_lockid;
5456         } else
5457                 return QLA_SUCCESS;
5458
5459 exit:
5460         return rval;
5461 }
5462
5463 void
5464 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5465 {
5466         uint16_t options = (requester_id << 15) | BIT_6;
5467         uint32_t data;
5468         uint32_t lock_owner;
5469         struct qla_hw_data *ha = base_vha->hw;
5470
5471         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5472 retry_lock:
5473         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5474             == QLA_SUCCESS) {
5475                 if (data) {
5476                         /* Setting lock-id to our function-number */
5477                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5478                             ha->portnum);
5479                 } else {
5480                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5481                             &lock_owner);
5482                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5483                             "Failed to acquire IDC lock, acquired by %d, "
5484                             "retrying...\n", lock_owner);
5485
5486                         /* Retry/Perform IDC-Lock recovery */
5487                         if (qla83xx_idc_lock_recovery(base_vha)
5488                             == QLA_SUCCESS) {
5489                                 qla83xx_wait_logic();
5490                                 goto retry_lock;
5491                         } else
5492                                 ql_log(ql_log_warn, base_vha, 0xb075,
5493                                     "IDC Lock recovery FAILED.\n");
5494                 }
5495
5496         }
5497
5498         return;
5499
5500         /* XXX: IDC-lock implementation using access-control mbx */
5501 retry_lock2:
5502         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5503                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5504                     "Failed to acquire IDC lock. retrying...\n");
5505                 /* Retry/Perform IDC-Lock recovery */
5506                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5507                         qla83xx_wait_logic();
5508                         goto retry_lock2;
5509                 } else
5510                         ql_log(ql_log_warn, base_vha, 0xb076,
5511                             "IDC Lock recovery FAILED.\n");
5512         }
5513
5514         return;
5515 }
5516
5517 void
5518 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5519 {
5520 #if 0
5521         uint16_t options = (requester_id << 15) | BIT_7;
5522 #endif
5523         uint16_t retry;
5524         uint32_t data;
5525         struct qla_hw_data *ha = base_vha->hw;
5526
5527         /* IDC-unlock implementation using driver-unlock/lock-id
5528          * remote registers
5529          */
5530         retry = 0;
5531 retry_unlock:
5532         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5533             == QLA_SUCCESS) {
5534                 if (data == ha->portnum) {
5535                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5536                         /* Clearing lock-id by setting 0xff */
5537                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5538                 } else if (retry < 10) {
5539                         /* SV: XXX: IDC unlock retrying needed here? */
5540
5541                         /* Retry for IDC-unlock */
5542                         qla83xx_wait_logic();
5543                         retry++;
5544                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5545                             "Failed to release IDC lock, retrying=%d\n", retry);
5546                         goto retry_unlock;
5547                 }
5548         } else if (retry < 10) {
5549                 /* Retry for IDC-unlock */
5550                 qla83xx_wait_logic();
5551                 retry++;
5552                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5553                     "Failed to read drv-lockid, retrying=%d\n", retry);
5554                 goto retry_unlock;
5555         }
5556
5557         return;
5558
5559 #if 0
5560         /* XXX: IDC-unlock implementation using access-control mbx */
5561         retry = 0;
5562 retry_unlock2:
5563         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5564                 if (retry < 10) {
5565                         /* Retry for IDC-unlock */
5566                         qla83xx_wait_logic();
5567                         retry++;
5568                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5569                             "Failed to release IDC lock, retrying=%d\n", retry);
5570                         goto retry_unlock2;
5571                 }
5572         }
5573
5574         return;
5575 #endif
5576 }
5577
5578 int
5579 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5580 {
5581         int rval = QLA_SUCCESS;
5582         struct qla_hw_data *ha = vha->hw;
5583         uint32_t drv_presence;
5584
5585         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5586         if (rval == QLA_SUCCESS) {
5587                 drv_presence |= (1 << ha->portnum);
5588                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5589                     drv_presence);
5590         }
5591
5592         return rval;
5593 }
5594
5595 int
5596 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5597 {
5598         int rval = QLA_SUCCESS;
5599
5600         qla83xx_idc_lock(vha, 0);
5601         rval = __qla83xx_set_drv_presence(vha);
5602         qla83xx_idc_unlock(vha, 0);
5603
5604         return rval;
5605 }
5606
5607 int
5608 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5609 {
5610         int rval = QLA_SUCCESS;
5611         struct qla_hw_data *ha = vha->hw;
5612         uint32_t drv_presence;
5613
5614         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5615         if (rval == QLA_SUCCESS) {
5616                 drv_presence &= ~(1 << ha->portnum);
5617                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5618                     drv_presence);
5619         }
5620
5621         return rval;
5622 }
5623
5624 int
5625 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5626 {
5627         int rval = QLA_SUCCESS;
5628
5629         qla83xx_idc_lock(vha, 0);
5630         rval = __qla83xx_clear_drv_presence(vha);
5631         qla83xx_idc_unlock(vha, 0);
5632
5633         return rval;
5634 }
5635
5636 static void
5637 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5638 {
5639         struct qla_hw_data *ha = vha->hw;
5640         uint32_t drv_ack, drv_presence;
5641         unsigned long ack_timeout;
5642
5643         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5644         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5645         while (1) {
5646                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5647                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5648                 if ((drv_ack & drv_presence) == drv_presence)
5649                         break;
5650
5651                 if (time_after_eq(jiffies, ack_timeout)) {
5652                         ql_log(ql_log_warn, vha, 0xb067,
5653                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5654                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5655                         /*
5656                          * The function(s) which did not ack in time are forced
5657                          * to withdraw any further participation in the IDC
5658                          * reset.
5659                          */
5660                         if (drv_ack != drv_presence)
5661                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5662                                     drv_ack);
5663                         break;
5664                 }
5665
5666                 qla83xx_idc_unlock(vha, 0);
5667                 msleep(1000);
5668                 qla83xx_idc_lock(vha, 0);
5669         }
5670
5671         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5672         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5673 }
5674
5675 static int
5676 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5677 {
5678         int rval = QLA_SUCCESS;
5679         uint32_t idc_control;
5680
5681         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5682         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5683
5684         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5685         __qla83xx_get_idc_control(vha, &idc_control);
5686         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5687         __qla83xx_set_idc_control(vha, 0);
5688
5689         qla83xx_idc_unlock(vha, 0);
5690         rval = qla83xx_restart_nic_firmware(vha);
5691         qla83xx_idc_lock(vha, 0);
5692
5693         if (rval != QLA_SUCCESS) {
5694                 ql_log(ql_log_fatal, vha, 0xb06a,
5695                     "Failed to restart NIC f/w.\n");
5696                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5697                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5698         } else {
5699                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5700                     "Success in restarting nic f/w.\n");
5701                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5702                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5703         }
5704
5705         return rval;
5706 }
5707
5708 /* Assumes idc_lock always held on entry */
5709 int
5710 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5711 {
5712         struct qla_hw_data *ha = base_vha->hw;
5713         int rval = QLA_SUCCESS;
5714         unsigned long dev_init_timeout;
5715         uint32_t dev_state;
5716
5717         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5718         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5719
5720         while (1) {
5721
5722                 if (time_after_eq(jiffies, dev_init_timeout)) {
5723                         ql_log(ql_log_warn, base_vha, 0xb06e,
5724                             "Initialization TIMEOUT!\n");
5725                         /* Init timeout. Disable further NIC Core
5726                          * communication.
5727                          */
5728                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5729                                 QLA8XXX_DEV_FAILED);
5730                         ql_log(ql_log_info, base_vha, 0xb06f,
5731                             "HW State: FAILED.\n");
5732                 }
5733
5734                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5735                 switch (dev_state) {
5736                 case QLA8XXX_DEV_READY:
5737                         if (ha->flags.nic_core_reset_owner)
5738                                 qla83xx_idc_audit(base_vha,
5739                                     IDC_AUDIT_COMPLETION);
5740                         ha->flags.nic_core_reset_owner = 0;
5741                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5742                             "Reset_owner reset by 0x%x.\n",
5743                             ha->portnum);
5744                         goto exit;
5745                 case QLA8XXX_DEV_COLD:
5746                         if (ha->flags.nic_core_reset_owner)
5747                                 rval = qla83xx_device_bootstrap(base_vha);
5748                         else {
5749                         /* Wait for AEN to change device-state */
5750                                 qla83xx_idc_unlock(base_vha, 0);
5751                                 msleep(1000);
5752                                 qla83xx_idc_lock(base_vha, 0);
5753                         }
5754                         break;
5755                 case QLA8XXX_DEV_INITIALIZING:
5756                         /* Wait for AEN to change device-state */
5757                         qla83xx_idc_unlock(base_vha, 0);
5758                         msleep(1000);
5759                         qla83xx_idc_lock(base_vha, 0);
5760                         break;
5761                 case QLA8XXX_DEV_NEED_RESET:
5762                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5763                                 qla83xx_need_reset_handler(base_vha);
5764                         else {
5765                                 /* Wait for AEN to change device-state */
5766                                 qla83xx_idc_unlock(base_vha, 0);
5767                                 msleep(1000);
5768                                 qla83xx_idc_lock(base_vha, 0);
5769                         }
5770                         /* reset timeout value after need reset handler */
5771                         dev_init_timeout = jiffies +
5772                             (ha->fcoe_dev_init_timeout * HZ);
5773                         break;
5774                 case QLA8XXX_DEV_NEED_QUIESCENT:
5775                         /* XXX: DEBUG for now */
5776                         qla83xx_idc_unlock(base_vha, 0);
5777                         msleep(1000);
5778                         qla83xx_idc_lock(base_vha, 0);
5779                         break;
5780                 case QLA8XXX_DEV_QUIESCENT:
5781                         /* XXX: DEBUG for now */
5782                         if (ha->flags.quiesce_owner)
5783                                 goto exit;
5784
5785                         qla83xx_idc_unlock(base_vha, 0);
5786                         msleep(1000);
5787                         qla83xx_idc_lock(base_vha, 0);
5788                         dev_init_timeout = jiffies +
5789                             (ha->fcoe_dev_init_timeout * HZ);
5790                         break;
5791                 case QLA8XXX_DEV_FAILED:
5792                         if (ha->flags.nic_core_reset_owner)
5793                                 qla83xx_idc_audit(base_vha,
5794                                     IDC_AUDIT_COMPLETION);
5795                         ha->flags.nic_core_reset_owner = 0;
5796                         __qla83xx_clear_drv_presence(base_vha);
5797                         qla83xx_idc_unlock(base_vha, 0);
5798                         qla8xxx_dev_failed_handler(base_vha);
5799                         rval = QLA_FUNCTION_FAILED;
5800                         qla83xx_idc_lock(base_vha, 0);
5801                         goto exit;
5802                 case QLA8XXX_BAD_VALUE:
5803                         qla83xx_idc_unlock(base_vha, 0);
5804                         msleep(1000);
5805                         qla83xx_idc_lock(base_vha, 0);
5806                         break;
5807                 default:
5808                         ql_log(ql_log_warn, base_vha, 0xb071,
5809                             "Unknown Device State: %x.\n", dev_state);
5810                         qla83xx_idc_unlock(base_vha, 0);
5811                         qla8xxx_dev_failed_handler(base_vha);
5812                         rval = QLA_FUNCTION_FAILED;
5813                         qla83xx_idc_lock(base_vha, 0);
5814                         goto exit;
5815                 }
5816         }
5817
5818 exit:
5819         return rval;
5820 }
5821
5822 void
5823 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5824 {
5825         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5826             board_disable);
5827         struct pci_dev *pdev = ha->pdev;
5828         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5829
5830         ql_log(ql_log_warn, base_vha, 0x015b,
5831             "Disabling adapter.\n");
5832
5833         if (!atomic_read(&pdev->enable_cnt)) {
5834                 ql_log(ql_log_info, base_vha, 0xfffc,
5835                     "PCI device disabled, no action req for PCI error=%lx\n",
5836                     base_vha->pci_flags);
5837                 return;
5838         }
5839
5840         /*
5841          * if UNLOADING flag is already set, then continue unload,
5842          * where it was set first.
5843          */
5844         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
5845                 return;
5846
5847         qla2x00_wait_for_sess_deletion(base_vha);
5848
5849         qla2x00_delete_all_vps(ha, base_vha);
5850
5851         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5852
5853         qla2x00_dfs_remove(base_vha);
5854
5855         qla84xx_put_chip(base_vha);
5856
5857         if (base_vha->timer_active)
5858                 qla2x00_stop_timer(base_vha);
5859
5860         base_vha->flags.online = 0;
5861
5862         qla2x00_destroy_deferred_work(ha);
5863
5864         /*
5865          * Do not try to stop beacon blink as it will issue a mailbox
5866          * command.
5867          */
5868         qla2x00_free_sysfs_attr(base_vha, false);
5869
5870         fc_remove_host(base_vha->host);
5871
5872         scsi_remove_host(base_vha->host);
5873
5874         base_vha->flags.init_done = 0;
5875         qla25xx_delete_queues(base_vha);
5876         qla2x00_free_fcports(base_vha);
5877         qla2x00_free_irqs(base_vha);
5878         qla2x00_mem_free(ha);
5879         qla82xx_md_free(base_vha);
5880         qla2x00_free_queues(ha);
5881
5882         qla2x00_unmap_iobases(ha);
5883
5884         pci_release_selected_regions(ha->pdev, ha->bars);
5885         pci_disable_pcie_error_reporting(pdev);
5886         pci_disable_device(pdev);
5887
5888         /*
5889          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5890          */
5891 }
5892
5893 /**************************************************************************
5894 * qla2x00_do_dpc
5895 *   This kernel thread is a task that is schedule by the interrupt handler
5896 *   to perform the background processing for interrupts.
5897 *
5898 * Notes:
5899 * This task always run in the context of a kernel thread.  It
5900 * is kick-off by the driver's detect code and starts up
5901 * up one per adapter. It immediately goes to sleep and waits for
5902 * some fibre event.  When either the interrupt handler or
5903 * the timer routine detects a event it will one of the task
5904 * bits then wake us up.
5905 **************************************************************************/
5906 static int
5907 qla2x00_do_dpc(void *data)
5908 {
5909         scsi_qla_host_t *base_vha;
5910         struct qla_hw_data *ha;
5911         uint32_t online;
5912         struct qla_qpair *qpair;
5913
5914         ha = (struct qla_hw_data *)data;
5915         base_vha = pci_get_drvdata(ha->pdev);
5916
5917         set_user_nice(current, MIN_NICE);
5918
5919         set_current_state(TASK_INTERRUPTIBLE);
5920         while (!kthread_should_stop()) {
5921                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5922                     "DPC handler sleeping.\n");
5923
5924                 schedule();
5925
5926                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5927                         goto end_loop;
5928
5929                 if (ha->flags.eeh_busy) {
5930                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5931                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5932                         goto end_loop;
5933                 }
5934
5935                 ha->dpc_active = 1;
5936
5937                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5938                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5939                     base_vha->dpc_flags);
5940
5941                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5942                         break;
5943
5944                 if (IS_P3P_TYPE(ha)) {
5945                         if (IS_QLA8044(ha)) {
5946                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5947                                         &base_vha->dpc_flags)) {
5948                                         qla8044_idc_lock(ha);
5949                                         qla8044_wr_direct(base_vha,
5950                                                 QLA8044_CRB_DEV_STATE_INDEX,
5951                                                 QLA8XXX_DEV_FAILED);
5952                                         qla8044_idc_unlock(ha);
5953                                         ql_log(ql_log_info, base_vha, 0x4004,
5954                                                 "HW State: FAILED.\n");
5955                                         qla8044_device_state_handler(base_vha);
5956                                         continue;
5957                                 }
5958
5959                         } else {
5960                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5961                                         &base_vha->dpc_flags)) {
5962                                         qla82xx_idc_lock(ha);
5963                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5964                                                 QLA8XXX_DEV_FAILED);
5965                                         qla82xx_idc_unlock(ha);
5966                                         ql_log(ql_log_info, base_vha, 0x0151,
5967                                                 "HW State: FAILED.\n");
5968                                         qla82xx_device_state_handler(base_vha);
5969                                         continue;
5970                                 }
5971                         }
5972
5973                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5974                                 &base_vha->dpc_flags)) {
5975
5976                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5977                                     "FCoE context reset scheduled.\n");
5978                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5979                                         &base_vha->dpc_flags))) {
5980                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5981                                                 /* FCoE-ctx reset failed.
5982                                                  * Escalate to chip-reset
5983                                                  */
5984                                                 set_bit(ISP_ABORT_NEEDED,
5985                                                         &base_vha->dpc_flags);
5986                                         }
5987                                         clear_bit(ABORT_ISP_ACTIVE,
5988                                                 &base_vha->dpc_flags);
5989                                 }
5990
5991                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5992                                     "FCoE context reset end.\n");
5993                         }
5994                 } else if (IS_QLAFX00(ha)) {
5995                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5996                                 &base_vha->dpc_flags)) {
5997                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5998                                     "Firmware Reset Recovery\n");
5999                                 if (qlafx00_reset_initialize(base_vha)) {
6000                                         /* Failed. Abort isp later. */
6001                                         if (!test_bit(UNLOADING,
6002                                             &base_vha->dpc_flags)) {
6003                                                 set_bit(ISP_UNRECOVERABLE,
6004                                                     &base_vha->dpc_flags);
6005                                                 ql_dbg(ql_dbg_dpc, base_vha,
6006                                                     0x4021,
6007                                                     "Reset Recovery Failed\n");
6008                                         }
6009                                 }
6010                         }
6011
6012                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6013                                 &base_vha->dpc_flags)) {
6014                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6015                                     "ISPFx00 Target Scan scheduled\n");
6016                                 if (qlafx00_rescan_isp(base_vha)) {
6017                                         if (!test_bit(UNLOADING,
6018                                             &base_vha->dpc_flags))
6019                                                 set_bit(ISP_UNRECOVERABLE,
6020                                                     &base_vha->dpc_flags);
6021                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6022                                             "ISPFx00 Target Scan Failed\n");
6023                                 }
6024                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6025                                     "ISPFx00 Target Scan End\n");
6026                         }
6027                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6028                                 &base_vha->dpc_flags)) {
6029                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6030                                     "ISPFx00 Host Info resend scheduled\n");
6031                                 qlafx00_fx_disc(base_vha,
6032                                     &base_vha->hw->mr.fcport,
6033                                     FXDISC_REG_HOST_INFO);
6034                         }
6035                 }
6036
6037                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6038                         &base_vha->dpc_flags) &&
6039                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6040                         qla24xx_detect_sfp(base_vha);
6041
6042                         if (ha->flags.detected_lr_sfp !=
6043                             ha->flags.using_lr_setting)
6044                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6045                 }
6046
6047                 if (test_and_clear_bit
6048                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6049                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6050                         bool do_reset = true;
6051
6052                         switch (ql2x_ini_mode) {
6053                         case QLA2XXX_INI_MODE_ENABLED:
6054                                 break;
6055                         case QLA2XXX_INI_MODE_DISABLED:
6056                                 if (!qla_tgt_mode_enabled(base_vha))
6057                                         do_reset = false;
6058                                 break;
6059                         case QLA2XXX_INI_MODE_DUAL:
6060                                 if (!qla_dual_mode_enabled(base_vha))
6061                                         do_reset = false;
6062                                 break;
6063                         default:
6064                                 break;
6065                         }
6066
6067                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6068                             &base_vha->dpc_flags))) {
6069                                 base_vha->flags.online = 1;
6070                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6071                                     "ISP abort scheduled.\n");
6072                                 if (ha->isp_ops->abort_isp(base_vha)) {
6073                                         /* failed. retry later */
6074                                         set_bit(ISP_ABORT_NEEDED,
6075                                             &base_vha->dpc_flags);
6076                                 }
6077                                 clear_bit(ABORT_ISP_ACTIVE,
6078                                                 &base_vha->dpc_flags);
6079                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6080                                     "ISP abort end.\n");
6081                         }
6082                 }
6083
6084                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6085                     &base_vha->dpc_flags)) {
6086                         qla2x00_update_fcports(base_vha);
6087                 }
6088
6089                 if (IS_QLAFX00(ha))
6090                         goto loop_resync_check;
6091
6092                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6093                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6094                             "Quiescence mode scheduled.\n");
6095                         if (IS_P3P_TYPE(ha)) {
6096                                 if (IS_QLA82XX(ha))
6097                                         qla82xx_device_state_handler(base_vha);
6098                                 if (IS_QLA8044(ha))
6099                                         qla8044_device_state_handler(base_vha);
6100                                 clear_bit(ISP_QUIESCE_NEEDED,
6101                                     &base_vha->dpc_flags);
6102                                 if (!ha->flags.quiesce_owner) {
6103                                         qla2x00_perform_loop_resync(base_vha);
6104                                         if (IS_QLA82XX(ha)) {
6105                                                 qla82xx_idc_lock(ha);
6106                                                 qla82xx_clear_qsnt_ready(
6107                                                     base_vha);
6108                                                 qla82xx_idc_unlock(ha);
6109                                         } else if (IS_QLA8044(ha)) {
6110                                                 qla8044_idc_lock(ha);
6111                                                 qla8044_clear_qsnt_ready(
6112                                                     base_vha);
6113                                                 qla8044_idc_unlock(ha);
6114                                         }
6115                                 }
6116                         } else {
6117                                 clear_bit(ISP_QUIESCE_NEEDED,
6118                                     &base_vha->dpc_flags);
6119                                 qla2x00_quiesce_io(base_vha);
6120                         }
6121                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6122                             "Quiescence mode end.\n");
6123                 }
6124
6125                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6126                                 &base_vha->dpc_flags) &&
6127                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6128
6129                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6130                             "Reset marker scheduled.\n");
6131                         qla2x00_rst_aen(base_vha);
6132                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6133                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6134                             "Reset marker end.\n");
6135                 }
6136
6137                 /* Retry each device up to login retry count */
6138                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6139                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6140                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6141
6142                         if (!base_vha->relogin_jif ||
6143                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6144                                 base_vha->relogin_jif = jiffies + HZ;
6145                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6146
6147                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6148                                     "Relogin scheduled.\n");
6149                                 qla24xx_post_relogin_work(base_vha);
6150                         }
6151                 }
6152 loop_resync_check:
6153                 if (!qla2x00_reset_active(base_vha) &&
6154                     test_and_clear_bit(LOOP_RESYNC_NEEDED,
6155                     &base_vha->dpc_flags)) {
6156                         /*
6157                          * Allow abort_isp to complete before moving on to scanning.
6158                          */
6159                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6160                             "Loop resync scheduled.\n");
6161
6162                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6163                             &base_vha->dpc_flags))) {
6164
6165                                 qla2x00_loop_resync(base_vha);
6166
6167                                 clear_bit(LOOP_RESYNC_ACTIVE,
6168                                                 &base_vha->dpc_flags);
6169                         }
6170
6171                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6172                             "Loop resync end.\n");
6173                 }
6174
6175                 if (IS_QLAFX00(ha))
6176                         goto intr_on_check;
6177
6178                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6179                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6180                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6181                         qla2xxx_flash_npiv_conf(base_vha);
6182                 }
6183
6184 intr_on_check:
6185                 if (!ha->interrupts_on)
6186                         ha->isp_ops->enable_intrs(ha);
6187
6188                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6189                                         &base_vha->dpc_flags)) {
6190                         if (ha->beacon_blink_led == 1)
6191                                 ha->isp_ops->beacon_blink(base_vha);
6192                 }
6193
6194                 /* qpair online check */
6195                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6196                     &base_vha->dpc_flags)) {
6197                         if (ha->flags.eeh_busy ||
6198                             ha->flags.pci_channel_io_perm_failure)
6199                                 online = 0;
6200                         else
6201                                 online = 1;
6202
6203                         mutex_lock(&ha->mq_lock);
6204                         list_for_each_entry(qpair, &base_vha->qp_list,
6205                             qp_list_elem)
6206                         qpair->online = online;
6207                         mutex_unlock(&ha->mq_lock);
6208                 }
6209
6210                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
6211                         ql_log(ql_log_info, base_vha, 0xffffff,
6212                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6213                                                 ha->nvme_last_rptd_aen);
6214                         if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
6215                                 ql_log(ql_log_info, base_vha, 0xffffff,
6216                                         "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6217                                                 ha->nvme_last_rptd_aen);
6218                         }
6219                 }
6220
6221                 if (!IS_QLAFX00(ha))
6222                         qla2x00_do_dpc_all_vps(base_vha);
6223
6224                 if (test_and_clear_bit(N2N_LINK_RESET,
6225                         &base_vha->dpc_flags)) {
6226                         qla2x00_lip_reset(base_vha);
6227                 }
6228
6229                 ha->dpc_active = 0;
6230 end_loop:
6231                 set_current_state(TASK_INTERRUPTIBLE);
6232         } /* End of while(1) */
6233         __set_current_state(TASK_RUNNING);
6234
6235         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6236             "DPC handler exiting.\n");
6237
6238         /*
6239          * Make sure that nobody tries to wake us up again.
6240          */
6241         ha->dpc_active = 0;
6242
6243         /* Cleanup any residual CTX SRBs. */
6244         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6245
6246         return 0;
6247 }
6248
6249 void
6250 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6251 {
6252         struct qla_hw_data *ha = vha->hw;
6253         struct task_struct *t = ha->dpc_thread;
6254
6255         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6256                 wake_up_process(t);
6257 }
6258
6259 /*
6260 *  qla2x00_rst_aen
6261 *      Processes asynchronous reset.
6262 *
6263 * Input:
6264 *      ha  = adapter block pointer.
6265 */
6266 static void
6267 qla2x00_rst_aen(scsi_qla_host_t *vha)
6268 {
6269         if (vha->flags.online && !vha->flags.reset_active &&
6270             !atomic_read(&vha->loop_down_timer) &&
6271             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6272                 do {
6273                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6274
6275                         /*
6276                          * Issue marker command only when we are going to start
6277                          * the I/O.
6278                          */
6279                         vha->marker_needed = 1;
6280                 } while (!atomic_read(&vha->loop_down_timer) &&
6281                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6282         }
6283 }
6284
6285 /**************************************************************************
6286 *   qla2x00_timer
6287 *
6288 * Description:
6289 *   One second timer
6290 *
6291 * Context: Interrupt
6292 ***************************************************************************/
6293 void
6294 qla2x00_timer(struct timer_list *t)
6295 {
6296         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6297         unsigned long   cpu_flags = 0;
6298         int             start_dpc = 0;
6299         int             index;
6300         srb_t           *sp;
6301         uint16_t        w;
6302         struct qla_hw_data *ha = vha->hw;
6303         struct req_que *req;
6304
6305         if (ha->flags.eeh_busy) {
6306                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6307                     "EEH = %d, restarting timer.\n",
6308                     ha->flags.eeh_busy);
6309                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6310                 return;
6311         }
6312
6313         /*
6314          * Hardware read to raise pending EEH errors during mailbox waits. If
6315          * the read returns -1 then disable the board.
6316          */
6317         if (!pci_channel_offline(ha->pdev)) {
6318                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6319                 qla2x00_check_reg16_for_disconnect(vha, w);
6320         }
6321
6322         /* Make sure qla82xx_watchdog is run only for physical port */
6323         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6324                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6325                         start_dpc++;
6326                 if (IS_QLA82XX(ha))
6327                         qla82xx_watchdog(vha);
6328                 else if (IS_QLA8044(ha))
6329                         qla8044_watchdog(vha);
6330         }
6331
6332         if (!vha->vp_idx && IS_QLAFX00(ha))
6333                 qlafx00_timer_routine(vha);
6334
6335         /* Loop down handler. */
6336         if (atomic_read(&vha->loop_down_timer) > 0 &&
6337             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6338             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6339                 && vha->flags.online) {
6340
6341                 if (atomic_read(&vha->loop_down_timer) ==
6342                     vha->loop_down_abort_time) {
6343
6344                         ql_log(ql_log_info, vha, 0x6008,
6345                             "Loop down - aborting the queues before time expires.\n");
6346
6347                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6348                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6349
6350                         /*
6351                          * Schedule an ISP abort to return any FCP2-device
6352                          * commands.
6353                          */
6354                         /* NPIV - scan physical port only */
6355                         if (!vha->vp_idx) {
6356                                 spin_lock_irqsave(&ha->hardware_lock,
6357                                     cpu_flags);
6358                                 req = ha->req_q_map[0];
6359                                 for (index = 1;
6360                                     index < req->num_outstanding_cmds;
6361                                     index++) {
6362                                         fc_port_t *sfcp;
6363
6364                                         sp = req->outstanding_cmds[index];
6365                                         if (!sp)
6366                                                 continue;
6367                                         if (sp->cmd_type != TYPE_SRB)
6368                                                 continue;
6369                                         if (sp->type != SRB_SCSI_CMD)
6370                                                 continue;
6371                                         sfcp = sp->fcport;
6372                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6373                                                 continue;
6374
6375                                         if (IS_QLA82XX(ha))
6376                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6377                                                         &vha->dpc_flags);
6378                                         else
6379                                                 set_bit(ISP_ABORT_NEEDED,
6380                                                         &vha->dpc_flags);
6381                                         break;
6382                                 }
6383                                 spin_unlock_irqrestore(&ha->hardware_lock,
6384                                                                 cpu_flags);
6385                         }
6386                         start_dpc++;
6387                 }
6388
6389                 /* if the loop has been down for 4 minutes, reinit adapter */
6390                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6391                         if (!(vha->device_flags & DFLG_NO_CABLE) && !vha->vp_idx) {
6392                                 ql_log(ql_log_warn, vha, 0x6009,
6393                                     "Loop down - aborting ISP.\n");
6394
6395                                 if (IS_QLA82XX(ha))
6396                                         set_bit(FCOE_CTX_RESET_NEEDED,
6397                                                 &vha->dpc_flags);
6398                                 else
6399                                         set_bit(ISP_ABORT_NEEDED,
6400                                                 &vha->dpc_flags);
6401                         }
6402                 }
6403                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6404                     "Loop down - seconds remaining %d.\n",
6405                     atomic_read(&vha->loop_down_timer));
6406         }
6407         /* Check if beacon LED needs to be blinked for physical host only */
6408         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6409                 /* There is no beacon_blink function for ISP82xx */
6410                 if (!IS_P3P_TYPE(ha)) {
6411                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6412                         start_dpc++;
6413                 }
6414         }
6415
6416         /* Process any deferred work. */
6417         if (!list_empty(&vha->work_list)) {
6418                 unsigned long flags;
6419                 bool q = false;
6420
6421                 spin_lock_irqsave(&vha->work_lock, flags);
6422                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6423                         q = true;
6424                 spin_unlock_irqrestore(&vha->work_lock, flags);
6425                 if (q)
6426                         queue_work(vha->hw->wq, &vha->iocb_work);
6427         }
6428
6429         /*
6430          * FC-NVME
6431          * see if the active AEN count has changed from what was last reported.
6432          */
6433         if (!vha->vp_idx &&
6434                 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6435                 ha->zio_mode == QLA_ZIO_MODE_6) {
6436                 ql_log(ql_log_info, vha, 0x3002,
6437                         "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6438                         ha->nvme_last_rptd_aen);
6439                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6440                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6441                 start_dpc++;
6442         }
6443
6444         /* Schedule the DPC routine if needed */
6445         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6446             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6447             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6448             start_dpc ||
6449             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6450             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6451             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6452             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6453             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6454             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6455                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6456                     "isp_abort_needed=%d loop_resync_needed=%d "
6457                     "fcport_update_needed=%d start_dpc=%d "
6458                     "reset_marker_needed=%d",
6459                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6460                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6461                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6462                     start_dpc,
6463                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6464                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6465                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6466                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6467                     "relogin_needed=%d.\n",
6468                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6469                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6470                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6471                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6472                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6473                 qla2xxx_wake_dpc(vha);
6474         }
6475
6476         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6477 }
6478
6479 /* Firmware interface routines. */
6480
6481 #define FW_BLOBS        11
6482 #define FW_ISP21XX      0
6483 #define FW_ISP22XX      1
6484 #define FW_ISP2300      2
6485 #define FW_ISP2322      3
6486 #define FW_ISP24XX      4
6487 #define FW_ISP25XX      5
6488 #define FW_ISP81XX      6
6489 #define FW_ISP82XX      7
6490 #define FW_ISP2031      8
6491 #define FW_ISP8031      9
6492 #define FW_ISP27XX      10
6493
6494 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
6495 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
6496 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
6497 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
6498 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
6499 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
6500 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
6501 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
6502 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
6503 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
6504 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
6505
6506
6507 static DEFINE_MUTEX(qla_fw_lock);
6508
6509 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6510         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6511         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6512         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6513         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6514         { .name = FW_FILE_ISP24XX, },
6515         { .name = FW_FILE_ISP25XX, },
6516         { .name = FW_FILE_ISP81XX, },
6517         { .name = FW_FILE_ISP82XX, },
6518         { .name = FW_FILE_ISP2031, },
6519         { .name = FW_FILE_ISP8031, },
6520         { .name = FW_FILE_ISP27XX, },
6521 };
6522
6523 struct fw_blob *
6524 qla2x00_request_firmware(scsi_qla_host_t *vha)
6525 {
6526         struct qla_hw_data *ha = vha->hw;
6527         struct fw_blob *blob;
6528
6529         if (IS_QLA2100(ha)) {
6530                 blob = &qla_fw_blobs[FW_ISP21XX];
6531         } else if (IS_QLA2200(ha)) {
6532                 blob = &qla_fw_blobs[FW_ISP22XX];
6533         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6534                 blob = &qla_fw_blobs[FW_ISP2300];
6535         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6536                 blob = &qla_fw_blobs[FW_ISP2322];
6537         } else if (IS_QLA24XX_TYPE(ha)) {
6538                 blob = &qla_fw_blobs[FW_ISP24XX];
6539         } else if (IS_QLA25XX(ha)) {
6540                 blob = &qla_fw_blobs[FW_ISP25XX];
6541         } else if (IS_QLA81XX(ha)) {
6542                 blob = &qla_fw_blobs[FW_ISP81XX];
6543         } else if (IS_QLA82XX(ha)) {
6544                 blob = &qla_fw_blobs[FW_ISP82XX];
6545         } else if (IS_QLA2031(ha)) {
6546                 blob = &qla_fw_blobs[FW_ISP2031];
6547         } else if (IS_QLA8031(ha)) {
6548                 blob = &qla_fw_blobs[FW_ISP8031];
6549         } else if (IS_QLA27XX(ha)) {
6550                 blob = &qla_fw_blobs[FW_ISP27XX];
6551         } else {
6552                 return NULL;
6553         }
6554
6555         mutex_lock(&qla_fw_lock);
6556         if (blob->fw)
6557                 goto out;
6558
6559         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6560                 ql_log(ql_log_warn, vha, 0x0063,
6561                     "Failed to load firmware image (%s).\n", blob->name);
6562                 blob->fw = NULL;
6563                 blob = NULL;
6564                 goto out;
6565         }
6566
6567 out:
6568         mutex_unlock(&qla_fw_lock);
6569         return blob;
6570 }
6571
6572 static void
6573 qla2x00_release_firmware(void)
6574 {
6575         int idx;
6576
6577         mutex_lock(&qla_fw_lock);
6578         for (idx = 0; idx < FW_BLOBS; idx++)
6579                 release_firmware(qla_fw_blobs[idx].fw);
6580         mutex_unlock(&qla_fw_lock);
6581 }
6582
6583 static pci_ers_result_t
6584 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6585 {
6586         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6587         struct qla_hw_data *ha = vha->hw;
6588
6589         ql_dbg(ql_dbg_aer, vha, 0x9000,
6590             "PCI error detected, state %x.\n", state);
6591
6592         if (!atomic_read(&pdev->enable_cnt)) {
6593                 ql_log(ql_log_info, vha, 0xffff,
6594                         "PCI device is disabled,state %x\n", state);
6595                 return PCI_ERS_RESULT_NEED_RESET;
6596         }
6597
6598         switch (state) {
6599         case pci_channel_io_normal:
6600                 ha->flags.eeh_busy = 0;
6601                 if (ql2xmqsupport || ql2xnvmeenable) {
6602                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6603                         qla2xxx_wake_dpc(vha);
6604                 }
6605                 return PCI_ERS_RESULT_CAN_RECOVER;
6606         case pci_channel_io_frozen:
6607                 ha->flags.eeh_busy = 1;
6608                 /* For ISP82XX complete any pending mailbox cmd */
6609                 if (IS_QLA82XX(ha)) {
6610                         ha->flags.isp82xx_fw_hung = 1;
6611                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6612                         qla82xx_clear_pending_mbx(vha);
6613                 }
6614                 qla2x00_free_irqs(vha);
6615                 pci_disable_device(pdev);
6616                 /* Return back all IOs */
6617                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6618                 if (ql2xmqsupport || ql2xnvmeenable) {
6619                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6620                         qla2xxx_wake_dpc(vha);
6621                 }
6622                 return PCI_ERS_RESULT_NEED_RESET;
6623         case pci_channel_io_perm_failure:
6624                 ha->flags.pci_channel_io_perm_failure = 1;
6625                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6626                 if (ql2xmqsupport || ql2xnvmeenable) {
6627                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6628                         qla2xxx_wake_dpc(vha);
6629                 }
6630                 return PCI_ERS_RESULT_DISCONNECT;
6631         }
6632         return PCI_ERS_RESULT_NEED_RESET;
6633 }
6634
6635 static pci_ers_result_t
6636 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6637 {
6638         int risc_paused = 0;
6639         uint32_t stat;
6640         unsigned long flags;
6641         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6642         struct qla_hw_data *ha = base_vha->hw;
6643         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6644         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6645
6646         if (IS_QLA82XX(ha))
6647                 return PCI_ERS_RESULT_RECOVERED;
6648
6649         spin_lock_irqsave(&ha->hardware_lock, flags);
6650         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6651                 stat = RD_REG_DWORD(&reg->hccr);
6652                 if (stat & HCCR_RISC_PAUSE)
6653                         risc_paused = 1;
6654         } else if (IS_QLA23XX(ha)) {
6655                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6656                 if (stat & HSR_RISC_PAUSED)
6657                         risc_paused = 1;
6658         } else if (IS_FWI2_CAPABLE(ha)) {
6659                 stat = RD_REG_DWORD(&reg24->host_status);
6660                 if (stat & HSRX_RISC_PAUSED)
6661                         risc_paused = 1;
6662         }
6663         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6664
6665         if (risc_paused) {
6666                 ql_log(ql_log_info, base_vha, 0x9003,
6667                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6668                 ha->isp_ops->fw_dump(base_vha, 0);
6669
6670                 return PCI_ERS_RESULT_NEED_RESET;
6671         } else
6672                 return PCI_ERS_RESULT_RECOVERED;
6673 }
6674
6675 static uint32_t
6676 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6677 {
6678         uint32_t rval = QLA_FUNCTION_FAILED;
6679         uint32_t drv_active = 0;
6680         struct qla_hw_data *ha = base_vha->hw;
6681         int fn;
6682         struct pci_dev *other_pdev = NULL;
6683
6684         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6685             "Entered %s.\n", __func__);
6686
6687         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6688
6689         if (base_vha->flags.online) {
6690                 /* Abort all outstanding commands,
6691                  * so as to be requeued later */
6692                 qla2x00_abort_isp_cleanup(base_vha);
6693         }
6694
6695
6696         fn = PCI_FUNC(ha->pdev->devfn);
6697         while (fn > 0) {
6698                 fn--;
6699                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6700                     "Finding pci device at function = 0x%x.\n", fn);
6701                 other_pdev =
6702                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6703                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6704                     fn));
6705
6706                 if (!other_pdev)
6707                         continue;
6708                 if (atomic_read(&other_pdev->enable_cnt)) {
6709                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6710                             "Found PCI func available and enable at 0x%x.\n",
6711                             fn);
6712                         pci_dev_put(other_pdev);
6713                         break;
6714                 }
6715                 pci_dev_put(other_pdev);
6716         }
6717
6718         if (!fn) {
6719                 /* Reset owner */
6720                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6721                     "This devfn is reset owner = 0x%x.\n",
6722                     ha->pdev->devfn);
6723                 qla82xx_idc_lock(ha);
6724
6725                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6726                     QLA8XXX_DEV_INITIALIZING);
6727
6728                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6729                     QLA82XX_IDC_VERSION);
6730
6731                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6732                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6733                     "drv_active = 0x%x.\n", drv_active);
6734
6735                 qla82xx_idc_unlock(ha);
6736                 /* Reset if device is not already reset
6737                  * drv_active would be 0 if a reset has already been done
6738                  */
6739                 if (drv_active)
6740                         rval = qla82xx_start_firmware(base_vha);
6741                 else
6742                         rval = QLA_SUCCESS;
6743                 qla82xx_idc_lock(ha);
6744
6745                 if (rval != QLA_SUCCESS) {
6746                         ql_log(ql_log_info, base_vha, 0x900b,
6747                             "HW State: FAILED.\n");
6748                         qla82xx_clear_drv_active(ha);
6749                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6750                             QLA8XXX_DEV_FAILED);
6751                 } else {
6752                         ql_log(ql_log_info, base_vha, 0x900c,
6753                             "HW State: READY.\n");
6754                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6755                             QLA8XXX_DEV_READY);
6756                         qla82xx_idc_unlock(ha);
6757                         ha->flags.isp82xx_fw_hung = 0;
6758                         rval = qla82xx_restart_isp(base_vha);
6759                         qla82xx_idc_lock(ha);
6760                         /* Clear driver state register */
6761                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6762                         qla82xx_set_drv_active(base_vha);
6763                 }
6764                 qla82xx_idc_unlock(ha);
6765         } else {
6766                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6767                     "This devfn is not reset owner = 0x%x.\n",
6768                     ha->pdev->devfn);
6769                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6770                     QLA8XXX_DEV_READY)) {
6771                         ha->flags.isp82xx_fw_hung = 0;
6772                         rval = qla82xx_restart_isp(base_vha);
6773                         qla82xx_idc_lock(ha);
6774                         qla82xx_set_drv_active(base_vha);
6775                         qla82xx_idc_unlock(ha);
6776                 }
6777         }
6778         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6779
6780         return rval;
6781 }
6782
6783 static pci_ers_result_t
6784 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6785 {
6786         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6787         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6788         struct qla_hw_data *ha = base_vha->hw;
6789         struct rsp_que *rsp;
6790         int rc, retries = 10;
6791
6792         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6793             "Slot Reset.\n");
6794
6795         /* Workaround: qla2xxx driver which access hardware earlier
6796          * needs error state to be pci_channel_io_online.
6797          * Otherwise mailbox command timesout.
6798          */
6799         pdev->error_state = pci_channel_io_normal;
6800
6801         pci_restore_state(pdev);
6802
6803         /* pci_restore_state() clears the saved_state flag of the device
6804          * save restored state which resets saved_state flag
6805          */
6806         pci_save_state(pdev);
6807
6808         if (ha->mem_only)
6809                 rc = pci_enable_device_mem(pdev);
6810         else
6811                 rc = pci_enable_device(pdev);
6812
6813         if (rc) {
6814                 ql_log(ql_log_warn, base_vha, 0x9005,
6815                     "Can't re-enable PCI device after reset.\n");
6816                 goto exit_slot_reset;
6817         }
6818
6819         rsp = ha->rsp_q_map[0];
6820         if (qla2x00_request_irqs(ha, rsp))
6821                 goto exit_slot_reset;
6822
6823         if (ha->isp_ops->pci_config(base_vha))
6824                 goto exit_slot_reset;
6825
6826         if (IS_QLA82XX(ha)) {
6827                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6828                         ret = PCI_ERS_RESULT_RECOVERED;
6829                         goto exit_slot_reset;
6830                 } else
6831                         goto exit_slot_reset;
6832         }
6833
6834         while (ha->flags.mbox_busy && retries--)
6835                 msleep(1000);
6836
6837         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6838         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6839                 ret =  PCI_ERS_RESULT_RECOVERED;
6840         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6841
6842
6843 exit_slot_reset:
6844         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6845             "slot_reset return %x.\n", ret);
6846
6847         return ret;
6848 }
6849
6850 static void
6851 qla2xxx_pci_resume(struct pci_dev *pdev)
6852 {
6853         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6854         struct qla_hw_data *ha = base_vha->hw;
6855         int ret;
6856
6857         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6858             "pci_resume.\n");
6859
6860         ret = qla2x00_wait_for_hba_online(base_vha);
6861         if (ret != QLA_SUCCESS) {
6862                 ql_log(ql_log_fatal, base_vha, 0x9002,
6863                     "The device failed to resume I/O from slot/link_reset.\n");
6864         }
6865
6866         pci_cleanup_aer_uncorrect_error_status(pdev);
6867
6868         ha->flags.eeh_busy = 0;
6869 }
6870
6871 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6872 {
6873         int rc;
6874         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6875
6876         if (USER_CTRL_IRQ(vha->hw))
6877                 rc = blk_mq_map_queues(&shost->tag_set);
6878         else
6879                 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev, 0);
6880         return rc;
6881 }
6882
6883 static const struct pci_error_handlers qla2xxx_err_handler = {
6884         .error_detected = qla2xxx_pci_error_detected,
6885         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6886         .slot_reset = qla2xxx_pci_slot_reset,
6887         .resume = qla2xxx_pci_resume,
6888 };
6889
6890 static struct pci_device_id qla2xxx_pci_tbl[] = {
6891         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6892         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6893         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6894         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6895         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6896         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6897         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6898         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6899         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6900         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6901         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6902         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6903         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6904         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6905         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6906         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6907         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6908         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6909         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6910         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6911         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6912         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6913         { 0 },
6914 };
6915 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6916
6917 static struct pci_driver qla2xxx_pci_driver = {
6918         .name           = QLA2XXX_DRIVER_NAME,
6919         .driver         = {
6920                 .owner          = THIS_MODULE,
6921         },
6922         .id_table       = qla2xxx_pci_tbl,
6923         .probe          = qla2x00_probe_one,
6924         .remove         = qla2x00_remove_one,
6925         .shutdown       = qla2x00_shutdown,
6926         .err_handler    = &qla2xxx_err_handler,
6927 };
6928
6929 static const struct file_operations apidev_fops = {
6930         .owner = THIS_MODULE,
6931         .llseek = noop_llseek,
6932 };
6933
6934 /**
6935  * qla2x00_module_init - Module initialization.
6936  **/
6937 static int __init
6938 qla2x00_module_init(void)
6939 {
6940         int ret = 0;
6941
6942         /* Allocate cache for SRBs. */
6943         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6944             SLAB_HWCACHE_ALIGN, NULL);
6945         if (srb_cachep == NULL) {
6946                 ql_log(ql_log_fatal, NULL, 0x0001,
6947                     "Unable to allocate SRB cache...Failing load!.\n");
6948                 return -ENOMEM;
6949         }
6950
6951         /* Initialize target kmem_cache and mem_pools */
6952         ret = qlt_init();
6953         if (ret < 0) {
6954                 goto destroy_cache;
6955         } else if (ret > 0) {
6956                 /*
6957                  * If initiator mode is explictly disabled by qlt_init(),
6958                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6959                  * performing scsi_scan_target() during LOOP UP event.
6960                  */
6961                 qla2xxx_transport_functions.disable_target_scan = 1;
6962                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6963         }
6964
6965         /* Derive version string. */
6966         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6967         if (ql2xextended_error_logging)
6968                 strcat(qla2x00_version_str, "-debug");
6969         if (ql2xextended_error_logging == 1)
6970                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6971
6972         qla2xxx_transport_template =
6973             fc_attach_transport(&qla2xxx_transport_functions);
6974         if (!qla2xxx_transport_template) {
6975                 ql_log(ql_log_fatal, NULL, 0x0002,
6976                     "fc_attach_transport failed...Failing load!.\n");
6977                 ret = -ENODEV;
6978                 goto qlt_exit;
6979         }
6980
6981         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6982         if (apidev_major < 0) {
6983                 ql_log(ql_log_fatal, NULL, 0x0003,
6984                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6985         }
6986
6987         qla2xxx_transport_vport_template =
6988             fc_attach_transport(&qla2xxx_transport_vport_functions);
6989         if (!qla2xxx_transport_vport_template) {
6990                 ql_log(ql_log_fatal, NULL, 0x0004,
6991                     "fc_attach_transport vport failed...Failing load!.\n");
6992                 ret = -ENODEV;
6993                 goto unreg_chrdev;
6994         }
6995         ql_log(ql_log_info, NULL, 0x0005,
6996             "QLogic Fibre Channel HBA Driver: %s.\n",
6997             qla2x00_version_str);
6998         ret = pci_register_driver(&qla2xxx_pci_driver);
6999         if (ret) {
7000                 ql_log(ql_log_fatal, NULL, 0x0006,
7001                     "pci_register_driver failed...ret=%d Failing load!.\n",
7002                     ret);
7003                 goto release_vport_transport;
7004         }
7005         return ret;
7006
7007 release_vport_transport:
7008         fc_release_transport(qla2xxx_transport_vport_template);
7009
7010 unreg_chrdev:
7011         if (apidev_major >= 0)
7012                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7013         fc_release_transport(qla2xxx_transport_template);
7014
7015 qlt_exit:
7016         qlt_exit();
7017
7018 destroy_cache:
7019         kmem_cache_destroy(srb_cachep);
7020         return ret;
7021 }
7022
7023 /**
7024  * qla2x00_module_exit - Module cleanup.
7025  **/
7026 static void __exit
7027 qla2x00_module_exit(void)
7028 {
7029         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7030         pci_unregister_driver(&qla2xxx_pci_driver);
7031         qla2x00_release_firmware();
7032         kmem_cache_destroy(srb_cachep);
7033         qlt_exit();
7034         if (ctx_cachep)
7035                 kmem_cache_destroy(ctx_cachep);
7036         fc_release_transport(qla2xxx_transport_template);
7037         fc_release_transport(qla2xxx_transport_vport_template);
7038 }
7039
7040 module_init(qla2x00_module_init);
7041 module_exit(qla2x00_module_exit);
7042
7043 MODULE_AUTHOR("QLogic Corporation");
7044 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7045 MODULE_LICENSE("GPL");
7046 MODULE_VERSION(QLA2XXX_VERSION);
7047 /*(DEBLOBBED)*/