drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(ql2xextended_error_logging,
  85                 "Option to enable extended error logging,\n"
  86                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  87                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  88                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  89                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  90                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  91                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  92                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  93                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  94                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  95                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  96                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  97                 "\t\t0x1e400000 - Preferred value for capturing essential "
  98                 "debug information (equivalent to old "
  99                 "ql2xextended_error_logging=1).\n"
 100                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 101
 102 int ql2xshiftctondsd = 6;
 103 module_param(ql2xshiftctondsd, int, S_IRUGO);
 104 MODULE_PARM_DESC(ql2xshiftctondsd,
 105                 "Set to control shifting of command type processing "
 106                 "based on total number of SG elements.");
 107
 108 int ql2xfdmienable=1;
 109 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 110 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 MODULE_PARM_DESC(ql2xfdmienable,
 112                 "Enables FDMI registrations. "
 113                 "0 - no FDMI. Default is 1 - perform FDMI.");
 114
 115 #define MAX_Q_DEPTH     32
 116 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 117 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 118 MODULE_PARM_DESC(ql2xmaxqdepth,
 119                 "Maximum queue depth to set for each LUN. "
 120                 "Default is 32.");
 121
 122 int ql2xenabledif = 2;
 123 module_param(ql2xenabledif, int, S_IRUGO);
 124 MODULE_PARM_DESC(ql2xenabledif,
 125                 " Enable T10-CRC-DIF:\n"
 126                 " Default is 2.\n"
 127                 "  0 -- No DIF Support\n"
 128                 "  1 -- Enable DIF for all types\n"
 129                 "  2 -- Enable DIF for all types, except Type 0.\n");
 130
 131 int ql2xenablehba_err_chk = 2;
 132 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 133 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 134                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 135                 " Default is 2.\n"
 136                 "  0 -- Error isolation disabled\n"
 137                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 138                 "  2 -- Error isolation enabled for all Types\n");
 139
 140 int ql2xiidmaenable=1;
 141 module_param(ql2xiidmaenable, int, S_IRUGO);
 142 MODULE_PARM_DESC(ql2xiidmaenable,
 143                 "Enables iIDMA settings "
 144                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 145
 146 int ql2xmaxqueues = 1;
 147 module_param(ql2xmaxqueues, int, S_IRUGO);
 148 MODULE_PARM_DESC(ql2xmaxqueues,
 149                 "Enables MQ settings "
 150                 "Default is 1 for single queue. Set it to number "
 151                 "of queues in MQ mode.");
 152
 153 int ql2xmultique_tag;
 154 module_param(ql2xmultique_tag, int, S_IRUGO);
 155 MODULE_PARM_DESC(ql2xmultique_tag,
 156                 "Enables CPU affinity settings for the driver "
 157                 "Default is 0 for no affinity of request and response IO. "
 158                 "Set it to 1 to turn on the cpu affinity.");
 159
 160 int ql2xfwloadbin;
 161 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 162 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 163 MODULE_PARM_DESC(ql2xfwloadbin,
 164                 "Option to specify location from which to load ISP firmware:.\n"
 165                 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
 166                 "      interface.\n"
 167                 " 1 -- load firmware from flash.\n"
 168                 " 0 -- use default semantics.\n");
 169
 170 int ql2xetsenable;
 171 module_param(ql2xetsenable, int, S_IRUGO);
 172 MODULE_PARM_DESC(ql2xetsenable,
 173                 "Enables firmware ETS burst."
 174                 "Default is 0 - skip ETS enablement.");
 175
 176 int ql2xdbwr = 1;
 177 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 178 MODULE_PARM_DESC(ql2xdbwr,
 179                 "Option to specify scheme for request queue posting.\n"
 180                 " 0 -- Regular doorbell.\n"
 181                 " 1 -- CAMRAM doorbell (faster).\n");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint64_t ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, ullong, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 int ql2xexlogins = 0;
 222 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 223 MODULE_PARM_DESC(ql2xexlogins,
 224                  "Number of extended Logins. "
 225                  "0 (Default)- Disabled.");
 226
 227 int ql2xexchoffld = 0;
 228 module_param(ql2xexchoffld, uint, S_IRUGO|S_IWUSR);
 229 MODULE_PARM_DESC(ql2xexchoffld,
 230                  "Number of exchanges to offload. "
 231                  "0 (Default)- Disabled.");
 232
 233 int ql2xfwholdabts = 0;
 234 module_param(ql2xfwholdabts, int, S_IRUGO);
 235 MODULE_PARM_DESC(ql2xfwholdabts,
 236                 "Allow FW to hold status IOCB until ABTS rsp received. "
 237                 "0 (Default) Do not set fw option. "
 238                 "1 - Set fw option to hold ABTS.");
 239
 240 /*
 241  * SCSI host template entry points
 242  */
 243 static int qla2xxx_slave_configure(struct scsi_device * device);
 244 static int qla2xxx_slave_alloc(struct scsi_device *);
 245 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 246 static void qla2xxx_scan_start(struct Scsi_Host *);
 247 static void qla2xxx_slave_destroy(struct scsi_device *);
 248 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 249 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 250 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 251 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 252 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 253 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 254
 255 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 256 static void qla2x00_free_device(scsi_qla_host_t *);
 257 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 258
 259 struct scsi_host_template qla2xxx_driver_template = {
 260         .module                 = THIS_MODULE,
 261         .name                   = QLA2XXX_DRIVER_NAME,
 262         .queuecommand           = qla2xxx_queuecommand,
 263
 264         .eh_abort_handler       = qla2xxx_eh_abort,
 265         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 266         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 267         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 268         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 269
 270         .slave_configure        = qla2xxx_slave_configure,
 271
 272         .slave_alloc            = qla2xxx_slave_alloc,
 273         .slave_destroy          = qla2xxx_slave_destroy,
 274         .scan_finished          = qla2xxx_scan_finished,
 275         .scan_start             = qla2xxx_scan_start,
 276         .change_queue_depth     = scsi_change_queue_depth,
 277         .this_id                = -1,
 278         .cmd_per_lun            = 3,
 279         .use_clustering         = ENABLE_CLUSTERING,
 280         .sg_tablesize           = SG_ALL,
 281
 282         .max_sectors            = 0xFFFF,
 283         .shost_attrs            = qla2x00_host_attrs,
 284
 285         .supported_mode         = MODE_INITIATOR,
 286         .track_queue_depth      = 1,
 287 };
 288
 289 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 290 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 291
 292 /* TODO Convert to inlines
 293  *
 294  * Timer routines
 295  */
 296
 297 __inline__ void
 298 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 299 {
 300         init_timer(&vha->timer);
 301         vha->timer.expires = jiffies + interval * HZ;
 302         vha->timer.data = (unsigned long)vha;
 303         vha->timer.function = (void (*)(unsigned long))func;
 304         add_timer(&vha->timer);
 305         vha->timer_active = 1;
 306 }
 307
 308 static inline void
 309 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 310 {
 311         /* Currently used for 82XX only. */
 312         if (vha->device_flags & DFLG_DEV_FAILED) {
 313                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 314                     "Device in a failed state, returning.\n");
 315                 return;
 316         }
 317
 318         mod_timer(&vha->timer, jiffies + interval * HZ);
 319 }
 320
 321 static __inline__ void
 322 qla2x00_stop_timer(scsi_qla_host_t *vha)
 323 {
 324         del_timer_sync(&vha->timer);
 325         vha->timer_active = 0;
 326 }
 327
 328 static int qla2x00_do_dpc(void *data);
 329
 330 static void qla2x00_rst_aen(scsi_qla_host_t *);
 331
 332 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 333         struct req_que **, struct rsp_que **);
 334 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 335 static void qla2x00_mem_free(struct qla_hw_data *);
 336
 337 /* -------------------------------------------------------------------------- */
 338 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 339                                 struct rsp_que *rsp)
 340 {
 341         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 342         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 343                                 GFP_KERNEL);
 344         if (!ha->req_q_map) {
 345                 ql_log(ql_log_fatal, vha, 0x003b,
 346                     "Unable to allocate memory for request queue ptrs.\n");
 347                 goto fail_req_map;
 348         }
 349
 350         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 351                                 GFP_KERNEL);
 352         if (!ha->rsp_q_map) {
 353                 ql_log(ql_log_fatal, vha, 0x003c,
 354                     "Unable to allocate memory for response queue ptrs.\n");
 355                 goto fail_rsp_map;
 356         }
 357         /*
 358          * Make sure we record at least the request and response queue zero in
 359          * case we need to free them if part of the probe fails.
 360          */
 361         ha->rsp_q_map[0] = rsp;
 362         ha->req_q_map[0] = req;
 363         set_bit(0, ha->rsp_qid_map);
 364         set_bit(0, ha->req_qid_map);
 365         return 1;
 366
 367 fail_rsp_map:
 368         kfree(ha->req_q_map);
 369         ha->req_q_map = NULL;
 370 fail_req_map:
 371         return -ENOMEM;
 372 }
 373
 374 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 375 {
 376         if (IS_QLAFX00(ha)) {
 377                 if (req && req->ring_fx00)
 378                         dma_free_coherent(&ha->pdev->dev,
 379                             (req->length_fx00 + 1) * sizeof(request_t),
 380                             req->ring_fx00, req->dma_fx00);
 381         } else if (req && req->ring)
 382                 dma_free_coherent(&ha->pdev->dev,
 383                 (req->length + 1) * sizeof(request_t),
 384                 req->ring, req->dma);
 385
 386         if (req)
 387                 kfree(req->outstanding_cmds);
 388
 389         kfree(req);
 390         req = NULL;
 391 }
 392
 393 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 394 {
 395         if (IS_QLAFX00(ha)) {
 396                 if (rsp && rsp->ring)
 397                         dma_free_coherent(&ha->pdev->dev,
 398                             (rsp->length_fx00 + 1) * sizeof(request_t),
 399                             rsp->ring_fx00, rsp->dma_fx00);
 400         } else if (rsp && rsp->ring) {
 401                 dma_free_coherent(&ha->pdev->dev,
 402                 (rsp->length + 1) * sizeof(response_t),
 403                 rsp->ring, rsp->dma);
 404         }
 405         kfree(rsp);
 406         rsp = NULL;
 407 }
 408
 409 static void qla2x00_free_queues(struct qla_hw_data *ha)
 410 {
 411         struct req_que *req;
 412         struct rsp_que *rsp;
 413         int cnt;
 414
 415         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 416                 if (!test_bit(cnt, ha->req_qid_map))
 417                         continue;
 418
 419                 req = ha->req_q_map[cnt];
 420                 qla2x00_free_req_que(ha, req);
 421         }
 422         kfree(ha->req_q_map);
 423         ha->req_q_map = NULL;
 424
 425         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 426                 if (!test_bit(cnt, ha->rsp_qid_map))
 427                         continue;
 428
 429                 rsp = ha->rsp_q_map[cnt];
 430                 qla2x00_free_rsp_que(ha, rsp);
 431         }
 432         kfree(ha->rsp_q_map);
 433         ha->rsp_q_map = NULL;
 434 }
 435
 436 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 437 {
 438         uint16_t options = 0;
 439         int ques, req, ret;
 440         struct qla_hw_data *ha = vha->hw;
 441
 442         if (!(ha->fw_attributes & BIT_6)) {
 443                 ql_log(ql_log_warn, vha, 0x00d8,
 444                     "Firmware is not multi-queue capable.\n");
 445                 goto fail;
 446         }
 447         if (ql2xmultique_tag) {
 448                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 449                 if (unlikely(!ha->wq)) {
 450                         ql_log(ql_log_warn, vha, 0x01e0,
 451                             "Failed to alloc workqueue.\n");
 452                         goto fail;
 453                 }
 454                 /* create a request queue for IO */
 455                 options |= BIT_7;
 456                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 457                         QLA_DEFAULT_QUE_QOS);
 458                 if (!req) {
 459                         ql_log(ql_log_warn, vha, 0x00e0,
 460                             "Failed to create request queue.\n");
 461                         goto fail2;
 462                 }
 463                 vha->req = ha->req_q_map[req];
 464                 options |= BIT_1;
 465                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 466                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 467                         if (!ret) {
 468                                 ql_log(ql_log_warn, vha, 0x00e8,
 469                                     "Failed to create response queue.\n");
 470                                 goto fail3;
 471                         }
 472                 }
 473                 ha->flags.cpu_affinity_enabled = 1;
 474                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 475                     "CPU affinity mode enabled, "
 476                     "no. of response queues:%d no. of request queues:%d.\n",
 477                     ha->max_rsp_queues, ha->max_req_queues);
 478                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 479                     "CPU affinity mode enabled, "
 480                     "no. of response queues:%d no. of request queues:%d.\n",
 481                     ha->max_rsp_queues, ha->max_req_queues);
 482         }
 483         return 0;
 484
 485 fail3:
 486         qla25xx_delete_queues(vha);
 487         vha->req = ha->req_q_map[0];
 488 fail2:
 489         destroy_workqueue(ha->wq);
 490         ha->wq = NULL;
 491 fail:
 492         ha->mqenable = 0;
 493         kfree(ha->req_q_map);
 494         kfree(ha->rsp_q_map);
 495         ha->max_req_queues = ha->max_rsp_queues = 1;
 496         return 1;
 497 }
 498
 499 static char *
 500 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 501 {
 502         struct qla_hw_data *ha = vha->hw;
 503         static char *pci_bus_modes[] = {
 504                 "33", "66", "100", "133",
 505         };
 506         uint16_t pci_bus;
 507
 508         strcpy(str, "PCI");
 509         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 510         if (pci_bus) {
 511                 strcat(str, "-X (");
 512                 strcat(str, pci_bus_modes[pci_bus]);
 513         } else {
 514                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 515                 strcat(str, " (");
 516                 strcat(str, pci_bus_modes[pci_bus]);
 517         }
 518         strcat(str, " MHz)");
 519
 520         return (str);
 521 }
 522
 523 static char *
 524 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 525 {
 526         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 527         struct qla_hw_data *ha = vha->hw;
 528         uint32_t pci_bus;
 529
 530         if (pci_is_pcie(ha->pdev)) {
 531                 char lwstr[6];
 532                 uint32_t lstat, lspeed, lwidth;
 533
 534                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 535                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 536                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 537
 538                 strcpy(str, "PCIe (");
 539                 switch (lspeed) {
 540                 case 1:
 541                         strcat(str, "2.5GT/s ");
 542                         break;
 543                 case 2:
 544                         strcat(str, "5.0GT/s ");
 545                         break;
 546                 case 3:
 547                         strcat(str, "8.0GT/s ");
 548                         break;
 549                 default:
 550                         strcat(str, "<unknown> ");
 551                         break;
 552                 }
 553                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 554                 strcat(str, lwstr);
 555
 556                 return str;
 557         }
 558
 559         strcpy(str, "PCI");
 560         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 561         if (pci_bus == 0 || pci_bus == 8) {
 562                 strcat(str, " (");
 563                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 564         } else {
 565                 strcat(str, "-X ");
 566                 if (pci_bus & BIT_2)
 567                         strcat(str, "Mode 2");
 568                 else
 569                         strcat(str, "Mode 1");
 570                 strcat(str, " (");
 571                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 572         }
 573         strcat(str, " MHz)");
 574
 575         return str;
 576 }
 577
 578 static char *
 579 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 580 {
 581         char un_str[10];
 582         struct qla_hw_data *ha = vha->hw;
 583
 584         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 585             ha->fw_minor_version, ha->fw_subminor_version);
 586
 587         if (ha->fw_attributes & BIT_9) {
 588                 strcat(str, "FLX");
 589                 return (str);
 590         }
 591
 592         switch (ha->fw_attributes & 0xFF) {
 593         case 0x7:
 594                 strcat(str, "EF");
 595                 break;
 596         case 0x17:
 597                 strcat(str, "TP");
 598                 break;
 599         case 0x37:
 600                 strcat(str, "IP");
 601                 break;
 602         case 0x77:
 603                 strcat(str, "VI");
 604                 break;
 605         default:
 606                 sprintf(un_str, "(%x)", ha->fw_attributes);
 607                 strcat(str, un_str);
 608                 break;
 609         }
 610         if (ha->fw_attributes & 0x100)
 611                 strcat(str, "X");
 612
 613         return (str);
 614 }
 615
 616 static char *
 617 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 618 {
 619         struct qla_hw_data *ha = vha->hw;
 620
 621         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 622             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 623         return str;
 624 }
 625
 626 void
 627 qla2x00_sp_free_dma(void *vha, void *ptr)
 628 {
 629         srb_t *sp = (srb_t *)ptr;
 630         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 631         struct qla_hw_data *ha = sp->fcport->vha->hw;
 632         void *ctx = GET_CMD_CTX_SP(sp);
 633
 634         if (sp->flags & SRB_DMA_VALID) {
 635                 scsi_dma_unmap(cmd);
 636                 sp->flags &= ~SRB_DMA_VALID;
 637         }
 638
 639         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 640                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 641                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 642                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 643         }
 644
 645         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 646                 /* List assured to be having elements */
 647                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 648                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 649         }
 650
 651         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 652                 dma_pool_free(ha->dl_dma_pool, ctx,
 653                     ((struct crc_context *)ctx)->crc_ctx_dma);
 654                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 655         }
 656
 657         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 658                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 659
 660                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 661                         ctx1->fcp_cmnd_dma);
 662                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 663                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 664                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 665                 mempool_free(ctx1, ha->ctx_mempool);
 666                 ctx1 = NULL;
 667         }
 668
 669         CMD_SP(cmd) = NULL;
 670         qla2x00_rel_sp(sp->fcport->vha, sp);
 671 }
 672
 673 static void
 674 qla2x00_sp_compl(void *data, void *ptr, int res)
 675 {
 676         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 677         srb_t *sp = (srb_t *)ptr;
 678         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 679
 680         cmd->result = res;
 681
 682         if (atomic_read(&sp->ref_count) == 0) {
 683                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 684                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 685                     sp, GET_CMD_SP(sp));
 686                 if (ql2xextended_error_logging & ql_dbg_io)
 687                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 688                 return;
 689         }
 690         if (!atomic_dec_and_test(&sp->ref_count))
 691                 return;
 692
 693         qla2x00_sp_free_dma(ha, sp);
 694         cmd->scsi_done(cmd);
 695 }
 696
 697 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 698  * does not have the changes necessary to avoid taking host->host_lock.
 699  */
 700 static int
 701 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 702 {
 703         scsi_qla_host_t *vha = shost_priv(host);
 704         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 705         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 706         struct qla_hw_data *ha = vha->hw;
 707         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 708         srb_t *sp;
 709         int rval;
 710
 711         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 712                 cmd->result = DID_NO_CONNECT << 16;
 713                 goto qc24_fail_command;
 714         }
 715
 716         if (ha->flags.eeh_busy) {
 717                 if (ha->flags.pci_channel_io_perm_failure) {
 718                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 719                             "PCI Channel IO permanent failure, exiting "
 720                             "cmd=%p.\n", cmd);
 721                         cmd->result = DID_NO_CONNECT << 16;
 722                 } else {
 723                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 724                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 725                         cmd->result = DID_REQUEUE << 16;
 726                 }
 727                 goto qc24_fail_command;
 728         }
 729
 730         rval = fc_remote_port_chkready(rport);
 731         if (rval) {
 732                 cmd->result = rval;
 733                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 734                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 735                     cmd, rval);
 736                 goto qc24_fail_command;
 737         }
 738
 739         if (!vha->flags.difdix_supported &&
 740                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 741                         ql_dbg(ql_dbg_io, vha, 0x3004,
 742                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 743                             cmd);
 744                         cmd->result = DID_NO_CONNECT << 16;
 745                         goto qc24_fail_command;
 746         }
 747
 748         if (!fcport) {
 749                 cmd->result = DID_NO_CONNECT << 16;
 750                 goto qc24_fail_command;
 751         }
 752
 753         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 754                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 755                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 756                         ql_dbg(ql_dbg_io, vha, 0x3005,
 757                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 758                             atomic_read(&fcport->state),
 759                             atomic_read(&base_vha->loop_state));
 760                         cmd->result = DID_NO_CONNECT << 16;
 761                         goto qc24_fail_command;
 762                 }
 763                 goto qc24_target_busy;
 764         }
 765
 766         /*
 767          * Return target busy if we've received a non-zero retry_delay_timer
 768          * in a FCP_RSP.
 769          */
 770         if (fcport->retry_delay_timestamp == 0) {
 771                 /* retry delay not set */
 772         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 773                 fcport->retry_delay_timestamp = 0;
 774         else
 775                 goto qc24_target_busy;
 776
 777         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 778         if (!sp)
 779                 goto qc24_host_busy;
 780
 781         sp->u.scmd.cmd = cmd;
 782         sp->type = SRB_SCSI_CMD;
 783         atomic_set(&sp->ref_count, 1);
 784         CMD_SP(cmd) = (void *)sp;
 785         sp->free = qla2x00_sp_free_dma;
 786         sp->done = qla2x00_sp_compl;
 787
 788         rval = ha->isp_ops->start_scsi(sp);
 789         if (rval != QLA_SUCCESS) {
 790                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 791                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 792                 goto qc24_host_busy_free_sp;
 793         }
 794
 795         return 0;
 796
 797 qc24_host_busy_free_sp:
 798         qla2x00_sp_free_dma(ha, sp);
 799
 800 qc24_host_busy:
 801         return SCSI_MLQUEUE_HOST_BUSY;
 802
 803 qc24_target_busy:
 804         return SCSI_MLQUEUE_TARGET_BUSY;
 805
 806 qc24_fail_command:
 807         cmd->scsi_done(cmd);
 808
 809         return 0;
 810 }
 811
 812 /*
 813  * qla2x00_eh_wait_on_command
 814  *    Waits for the command to be returned by the Firmware for some
 815  *    max time.
 816  *
 817  * Input:
 818  *    cmd = Scsi Command to wait on.
 819  *
 820  * Return:
 821  *    Not Found : 0
 822  *    Found : 1
 823  */
 824 static int
 825 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 826 {
 827 #define ABORT_POLLING_PERIOD    1000
 828 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 829         unsigned long wait_iter = ABORT_WAIT_ITER;
 830         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 831         struct qla_hw_data *ha = vha->hw;
 832         int ret = QLA_SUCCESS;
 833
 834         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 835                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 836                     "Return:eh_wait.\n");
 837                 return ret;
 838         }
 839
 840         while (CMD_SP(cmd) && wait_iter--) {
 841                 msleep(ABORT_POLLING_PERIOD);
 842         }
 843         if (CMD_SP(cmd))
 844                 ret = QLA_FUNCTION_FAILED;
 845
 846         return ret;
 847 }
 848
 849 /*
 850  * qla2x00_wait_for_hba_online
 851  *    Wait till the HBA is online after going through
 852  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 853  *    finally HBA is disabled ie marked offline
 854  *
 855  * Input:
 856  *     ha - pointer to host adapter structure
 857  *
 858  * Note:
 859  *    Does context switching-Release SPIN_LOCK
 860  *    (if any) before calling this routine.
 861  *
 862  * Return:
 863  *    Success (Adapter is online) : 0
 864  *    Failed  (Adapter is offline/disabled) : 1
 865  */
 866 int
 867 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 868 {
 869         int             return_status;
 870         unsigned long   wait_online;
 871         struct qla_hw_data *ha = vha->hw;
 872         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 873
 874         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 875         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 876             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 877             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 878             ha->dpc_active) && time_before(jiffies, wait_online)) {
 879
 880                 msleep(1000);
 881         }
 882         if (base_vha->flags.online)
 883                 return_status = QLA_SUCCESS;
 884         else
 885                 return_status = QLA_FUNCTION_FAILED;
 886
 887         return (return_status);
 888 }
 889
 890 /*
 891  * qla2x00_wait_for_hba_ready
 892  * Wait till the HBA is ready before doing driver unload
 893  *
 894  * Input:
 895  *     ha - pointer to host adapter structure
 896  *
 897  * Note:
 898  *    Does context switching-Release SPIN_LOCK
 899  *    (if any) before calling this routine.
 900  *
 901  */
 902 static void
 903 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 904 {
 905         struct qla_hw_data *ha = vha->hw;
 906         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 907
 908         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
 909                 ha->flags.mbox_busy) ||
 910                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 911                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
 912                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
 913                         break;
 914                 msleep(1000);
 915         }
 916 }
 917
 918 int
 919 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 920 {
 921         int             return_status;
 922         unsigned long   wait_reset;
 923         struct qla_hw_data *ha = vha->hw;
 924         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 925
 926         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 927         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 928             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 929             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 930             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 931
 932                 msleep(1000);
 933
 934                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 935                     ha->flags.chip_reset_done)
 936                         break;
 937         }
 938         if (ha->flags.chip_reset_done)
 939                 return_status = QLA_SUCCESS;
 940         else
 941                 return_status = QLA_FUNCTION_FAILED;
 942
 943         return return_status;
 944 }
 945
 946 static void
 947 sp_get(struct srb *sp)
 948 {
 949         atomic_inc(&sp->ref_count);
 950 }
 951
 952 #define ISP_REG_DISCONNECT 0xffffffffU
 953 /**************************************************************************
 954 * qla2x00_isp_reg_stat
 955 *
 956 * Description:
 957 *       Read the host status register of ISP before aborting the command.
 958 *
 959 * Input:
 960 *       ha = pointer to host adapter structure.
 961 *
 962 *
 963 * Returns:
 964 *       Either true or false.
 965 *
 966 * Note: Return true if there is register disconnect.
 967 **************************************************************************/
 968 static inline
 969 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
 970 {
 971         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
 972         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
 973
 974         if (IS_P3P_TYPE(ha))
 975                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
 976         else
 977                 return ((RD_REG_DWORD(&reg->host_status)) ==
 978                         ISP_REG_DISCONNECT);
 979 }
 980
 981 /**************************************************************************
 982 * qla2xxx_eh_abort
 983 *
 984 * Description:
 985 *    The abort function will abort the specified command.
 986 *
 987 * Input:
 988 *    cmd = Linux SCSI command packet to be aborted.
 989 *
 990 * Returns:
 991 *    Either SUCCESS or FAILED.
 992 *
 993 * Note:
 994 *    Only return FAILED if command not returned by firmware.
 995 **************************************************************************/
 996 static int
 997 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 998 {
 999         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1000         srb_t *sp;
1001         int ret;
1002         unsigned int id;
1003         uint64_t lun;
1004         unsigned long flags;
1005         int rval, wait = 0;
1006         struct qla_hw_data *ha = vha->hw;
1007
1008         if (qla2x00_isp_reg_stat(ha)) {
1009                 ql_log(ql_log_info, vha, 0x8042,
1010                     "PCI/Register disconnect, exiting.\n");
1011                 return FAILED;
1012         }
1013         if (!CMD_SP(cmd))
1014                 return SUCCESS;
1015
1016         ret = fc_block_scsi_eh(cmd);
1017         if (ret != 0)
1018                 return ret;
1019         ret = SUCCESS;
1020
1021         id = cmd->device->id;
1022         lun = cmd->device->lun;
1023
1024         spin_lock_irqsave(&ha->hardware_lock, flags);
1025         sp = (srb_t *) CMD_SP(cmd);
1026         if (!sp) {
1027                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1028                 return SUCCESS;
1029         }
1030
1031         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1032             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1033             vha->host_no, id, lun, sp, cmd, sp->handle);
1034
1035         /* Get a reference to the sp and drop the lock.*/
1036         sp_get(sp);
1037
1038         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1039         rval = ha->isp_ops->abort_command(sp);
1040         if (rval) {
1041                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1042                         ret = SUCCESS;
1043                 else
1044                         ret = FAILED;
1045
1046                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1047                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1048         } else {
1049                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1050                     "Abort command mbx success cmd=%p.\n", cmd);
1051                 wait = 1;
1052         }
1053
1054         spin_lock_irqsave(&ha->hardware_lock, flags);
1055         sp->done(ha, sp, 0);
1056         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1057
1058         /* Did the command return during mailbox execution? */
1059         if (ret == FAILED && !CMD_SP(cmd))
1060                 ret = SUCCESS;
1061
1062         /* Wait for the command to be returned. */
1063         if (wait) {
1064                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1065                         ql_log(ql_log_warn, vha, 0x8006,
1066                             "Abort handler timed out cmd=%p.\n", cmd);
1067                         ret = FAILED;
1068                 }
1069         }
1070
1071         ql_log(ql_log_info, vha, 0x801c,
1072             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1073             vha->host_no, id, lun, wait, ret);
1074
1075         return ret;
1076 }
1077
1078 int
1079 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1080         uint64_t l, enum nexus_wait_type type)
1081 {
1082         int cnt, match, status;
1083         unsigned long flags;
1084         struct qla_hw_data *ha = vha->hw;
1085         struct req_que *req;
1086         srb_t *sp;
1087         struct scsi_cmnd *cmd;
1088
1089         status = QLA_SUCCESS;
1090
1091         spin_lock_irqsave(&ha->hardware_lock, flags);
1092         req = vha->req;
1093         for (cnt = 1; status == QLA_SUCCESS &&
1094                 cnt < req->num_outstanding_cmds; cnt++) {
1095                 sp = req->outstanding_cmds[cnt];
1096                 if (!sp)
1097                         continue;
1098                 if (sp->type != SRB_SCSI_CMD)
1099                         continue;
1100                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1101                         continue;
1102                 match = 0;
1103                 cmd = GET_CMD_SP(sp);
1104                 switch (type) {
1105                 case WAIT_HOST:
1106                         match = 1;
1107                         break;
1108                 case WAIT_TARGET:
1109                         match = cmd->device->id == t;
1110                         break;
1111                 case WAIT_LUN:
1112                         match = (cmd->device->id == t &&
1113                                 cmd->device->lun == l);
1114                         break;
1115                 }
1116                 if (!match)
1117                         continue;
1118
1119                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1120                 status = qla2x00_eh_wait_on_command(cmd);
1121                 spin_lock_irqsave(&ha->hardware_lock, flags);
1122         }
1123         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1124
1125         return status;
1126 }
1127
1128 static char *reset_errors[] = {
1129         "HBA not online",
1130         "HBA not ready",
1131         "Task management failed",
1132         "Waiting for command completions",
1133 };
1134
1135 static int
1136 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1137     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1138 {
1139         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1140         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1141         int err;
1142
1143         if (!fcport) {
1144                 return FAILED;
1145         }
1146
1147         err = fc_block_scsi_eh(cmd);
1148         if (err != 0)
1149                 return err;
1150
1151         ql_log(ql_log_info, vha, 0x8009,
1152             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1153             cmd->device->id, cmd->device->lun, cmd);
1154
1155         err = 0;
1156         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1157                 ql_log(ql_log_warn, vha, 0x800a,
1158                     "Wait for hba online failed for cmd=%p.\n", cmd);
1159                 goto eh_reset_failed;
1160         }
1161         err = 2;
1162         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1163                 != QLA_SUCCESS) {
1164                 ql_log(ql_log_warn, vha, 0x800c,
1165                     "do_reset failed for cmd=%p.\n", cmd);
1166                 goto eh_reset_failed;
1167         }
1168         err = 3;
1169         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1170             cmd->device->lun, type) != QLA_SUCCESS) {
1171                 ql_log(ql_log_warn, vha, 0x800d,
1172                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1173                 goto eh_reset_failed;
1174         }
1175
1176         ql_log(ql_log_info, vha, 0x800e,
1177             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1178             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1179
1180         return SUCCESS;
1181
1182 eh_reset_failed:
1183         ql_log(ql_log_info, vha, 0x800f,
1184             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1185             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1186             cmd);
1187         return FAILED;
1188 }
1189
1190 static int
1191 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1192 {
1193         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1194         struct qla_hw_data *ha = vha->hw;
1195
1196         if (qla2x00_isp_reg_stat(ha)) {
1197                 ql_log(ql_log_info, vha, 0x803e,
1198                     "PCI/Register disconnect, exiting.\n");
1199                 return FAILED;
1200         }
1201
1202         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1203             ha->isp_ops->lun_reset);
1204 }
1205
1206 static int
1207 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1208 {
1209         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1210         struct qla_hw_data *ha = vha->hw;
1211
1212         if (qla2x00_isp_reg_stat(ha)) {
1213                 ql_log(ql_log_info, vha, 0x803f,
1214                     "PCI/Register disconnect, exiting.\n");
1215                 return FAILED;
1216         }
1217
1218         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1219             ha->isp_ops->target_reset);
1220 }
1221
1222 /**************************************************************************
1223 * qla2xxx_eh_bus_reset
1224 *
1225 * Description:
1226 *    The bus reset function will reset the bus and abort any executing
1227 *    commands.
1228 *
1229 * Input:
1230 *    cmd = Linux SCSI command packet of the command that cause the
1231 *          bus reset.
1232 *
1233 * Returns:
1234 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1235 *
1236 **************************************************************************/
1237 static int
1238 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1239 {
1240         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1241         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1242         int ret = FAILED;
1243         unsigned int id;
1244         uint64_t lun;
1245         struct qla_hw_data *ha = vha->hw;
1246
1247         if (qla2x00_isp_reg_stat(ha)) {
1248                 ql_log(ql_log_info, vha, 0x8040,
1249                     "PCI/Register disconnect, exiting.\n");
1250                 return FAILED;
1251         }
1252
1253         id = cmd->device->id;
1254         lun = cmd->device->lun;
1255
1256         if (!fcport) {
1257                 return ret;
1258         }
1259
1260         ret = fc_block_scsi_eh(cmd);
1261         if (ret != 0)
1262                 return ret;
1263         ret = FAILED;
1264
1265         ql_log(ql_log_info, vha, 0x8012,
1266             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1267
1268         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1269                 ql_log(ql_log_fatal, vha, 0x8013,
1270                     "Wait for hba online failed board disabled.\n");
1271                 goto eh_bus_reset_done;
1272         }
1273
1274         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1275                 ret = SUCCESS;
1276
1277         if (ret == FAILED)
1278                 goto eh_bus_reset_done;
1279
1280         /* Flush outstanding commands. */
1281         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1282             QLA_SUCCESS) {
1283                 ql_log(ql_log_warn, vha, 0x8014,
1284                     "Wait for pending commands failed.\n");
1285                 ret = FAILED;
1286         }
1287
1288 eh_bus_reset_done:
1289         ql_log(ql_log_warn, vha, 0x802b,
1290             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1291             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1292
1293         return ret;
1294 }
1295
1296 /**************************************************************************
1297 * qla2xxx_eh_host_reset
1298 *
1299 * Description:
1300 *    The reset function will reset the Adapter.
1301 *
1302 * Input:
1303 *      cmd = Linux SCSI command packet of the command that cause the
1304 *            adapter reset.
1305 *
1306 * Returns:
1307 *      Either SUCCESS or FAILED.
1308 *
1309 * Note:
1310 **************************************************************************/
1311 static int
1312 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1313 {
1314         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1315         struct qla_hw_data *ha = vha->hw;
1316         int ret = FAILED;
1317         unsigned int id;
1318         uint64_t lun;
1319         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1320
1321         if (qla2x00_isp_reg_stat(ha)) {
1322                 ql_log(ql_log_info, vha, 0x8041,
1323                     "PCI/Register disconnect, exiting.\n");
1324                 schedule_work(&ha->board_disable);
1325                 return SUCCESS;
1326         }
1327
1328         id = cmd->device->id;
1329         lun = cmd->device->lun;
1330
1331         ql_log(ql_log_info, vha, 0x8018,
1332             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1333
1334         /*
1335          * No point in issuing another reset if one is active.  Also do not
1336          * attempt a reset if we are updating flash.
1337          */
1338         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1339                 goto eh_host_reset_lock;
1340
1341         if (vha != base_vha) {
1342                 if (qla2x00_vp_abort_isp(vha))
1343                         goto eh_host_reset_lock;
1344         } else {
1345                 if (IS_P3P_TYPE(vha->hw)) {
1346                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1347                                 /* Ctx reset success */
1348                                 ret = SUCCESS;
1349                                 goto eh_host_reset_lock;
1350                         }
1351                         /* fall thru if ctx reset failed */
1352                 }
1353                 if (ha->wq)
1354                         flush_workqueue(ha->wq);
1355
1356                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1357                 if (ha->isp_ops->abort_isp(base_vha)) {
1358                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1359                         /* failed. schedule dpc to try */
1360                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1361
1362                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1363                                 ql_log(ql_log_warn, vha, 0x802a,
1364                                     "wait for hba online failed.\n");
1365                                 goto eh_host_reset_lock;
1366                         }
1367                 }
1368                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1369         }
1370
1371         /* Waiting for command to be returned to OS.*/
1372         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1373                 QLA_SUCCESS)
1374                 ret = SUCCESS;
1375
1376 eh_host_reset_lock:
1377         ql_log(ql_log_info, vha, 0x8017,
1378             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1379             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1380
1381         return ret;
1382 }
1383
1384 /*
1385 * qla2x00_loop_reset
1386 *      Issue loop reset.
1387 *
1388 * Input:
1389 *      ha = adapter block pointer.
1390 *
1391 * Returns:
1392 *      0 = success
1393 */
1394 int
1395 qla2x00_loop_reset(scsi_qla_host_t *vha)
1396 {
1397         int ret;
1398         struct qla_hw_data *ha = vha->hw;
1399
1400         if (IS_QLAFX00(ha))
1401                 return QLA_SUCCESS;
1402
1403         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1404                 atomic_set(&vha->loop_state, LOOP_DOWN);
1405                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1406                 qla2x00_mark_all_devices_lost(vha, 0);
1407                 ret = qla2x00_full_login_lip(vha);
1408                 if (ret != QLA_SUCCESS) {
1409                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1410                             "full_login_lip=%d.\n", ret);
1411                 }
1412         }
1413
1414         if (ha->flags.enable_lip_reset) {
1415                 ret = qla2x00_lip_reset(vha);
1416                 if (ret != QLA_SUCCESS)
1417                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1418                             "lip_reset failed (%d).\n", ret);
1419         }
1420
1421         /* Issue marker command only when we are going to start the I/O */
1422         vha->marker_needed = 1;
1423
1424         return QLA_SUCCESS;
1425 }
1426
1427 void
1428 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1429 {
1430         int que, cnt, status;
1431         unsigned long flags;
1432         srb_t *sp;
1433         struct qla_hw_data *ha = vha->hw;
1434         struct req_que *req;
1435
1436         qlt_host_reset_handler(ha);
1437
1438         spin_lock_irqsave(&ha->hardware_lock, flags);
1439         for (que = 0; que < ha->max_req_queues; que++) {
1440                 req = ha->req_q_map[que];
1441                 if (!req)
1442                         continue;
1443                 if (!req->outstanding_cmds)
1444                         continue;
1445                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1446                         sp = req->outstanding_cmds[cnt];
1447                         if (sp) {
1448                                 /* Don't abort commands in adapter during EEH
1449                                  * recovery as it's not accessible/responding.
1450                                  */
1451                                 if (GET_CMD_SP(sp) && !ha->flags.eeh_busy &&
1452                                     (sp->type == SRB_SCSI_CMD)) {
1453                                         /* Get a reference to the sp and drop the lock.
1454                                          * The reference ensures this sp->done() call
1455                                          * - and not the call in qla2xxx_eh_abort() -
1456                                          * ends the SCSI command (with result 'res').
1457                                          */
1458                                         sp_get(sp);
1459                                         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1460                                         status = qla2xxx_eh_abort(GET_CMD_SP(sp));
1461                                         spin_lock_irqsave(&ha->hardware_lock, flags);
1462                                         /* Get rid of extra reference if immediate exit
1463                                          * from ql2xxx_eh_abort */
1464                                         if (status == FAILED && (qla2x00_isp_reg_stat(ha)))
1465                                                 atomic_dec(&sp->ref_count);
1466                                 }
1467                                 req->outstanding_cmds[cnt] = NULL;
1468                                 sp->done(vha, sp, res);
1469                         }
1470                 }
1471         }
1472         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1473 }
1474
1475 static int
1476 qla2xxx_slave_alloc(struct scsi_device *sdev)
1477 {
1478         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1479
1480         if (!rport || fc_remote_port_chkready(rport))
1481                 return -ENXIO;
1482
1483         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1484
1485         return 0;
1486 }
1487
1488 static int
1489 qla2xxx_slave_configure(struct scsi_device *sdev)
1490 {
1491         scsi_qla_host_t *vha = shost_priv(sdev->host);
1492         struct req_que *req = vha->req;
1493
1494         if (IS_T10_PI_CAPABLE(vha->hw))
1495                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1496
1497         scsi_change_queue_depth(sdev, req->max_q_depth);
1498         return 0;
1499 }
1500
1501 static void
1502 qla2xxx_slave_destroy(struct scsi_device *sdev)
1503 {
1504         sdev->hostdata = NULL;
1505 }
1506
1507 /**
1508  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1509  * @ha: HA context
1510  *
1511  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1512  * supported addressing method.
1513  */
1514 static void
1515 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1516 {
1517         /* Assume a 32bit DMA mask. */
1518         ha->flags.enable_64bit_addressing = 0;
1519
1520         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1521                 /* Any upper-dword bits set? */
1522                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1523                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1524                         /* Ok, a 64bit DMA mask is applicable. */
1525                         ha->flags.enable_64bit_addressing = 1;
1526                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1527                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1528                         return;
1529                 }
1530         }
1531
1532         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1533         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1534 }
1535
1536 static void
1537 qla2x00_enable_intrs(struct qla_hw_data *ha)
1538 {
1539         unsigned long flags = 0;
1540         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1541
1542         spin_lock_irqsave(&ha->hardware_lock, flags);
1543         ha->interrupts_on = 1;
1544         /* enable risc and host interrupts */
1545         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1546         RD_REG_WORD(&reg->ictrl);
1547         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1548
1549 }
1550
1551 static void
1552 qla2x00_disable_intrs(struct qla_hw_data *ha)
1553 {
1554         unsigned long flags = 0;
1555         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1556
1557         spin_lock_irqsave(&ha->hardware_lock, flags);
1558         ha->interrupts_on = 0;
1559         /* disable risc and host interrupts */
1560         WRT_REG_WORD(&reg->ictrl, 0);
1561         RD_REG_WORD(&reg->ictrl);
1562         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1563 }
1564
1565 static void
1566 qla24xx_enable_intrs(struct qla_hw_data *ha)
1567 {
1568         unsigned long flags = 0;
1569         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1570
1571         spin_lock_irqsave(&ha->hardware_lock, flags);
1572         ha->interrupts_on = 1;
1573         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1574         RD_REG_DWORD(&reg->ictrl);
1575         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1576 }
1577
1578 static void
1579 qla24xx_disable_intrs(struct qla_hw_data *ha)
1580 {
1581         unsigned long flags = 0;
1582         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1583
1584         if (IS_NOPOLLING_TYPE(ha))
1585                 return;
1586         spin_lock_irqsave(&ha->hardware_lock, flags);
1587         ha->interrupts_on = 0;
1588         WRT_REG_DWORD(&reg->ictrl, 0);
1589         RD_REG_DWORD(&reg->ictrl);
1590         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1591 }
1592
1593 static int
1594 qla2x00_iospace_config(struct qla_hw_data *ha)
1595 {
1596         resource_size_t pio;
1597         uint16_t msix;
1598         int cpus;
1599
1600         if (pci_request_selected_regions(ha->pdev, ha->bars,
1601             QLA2XXX_DRIVER_NAME)) {
1602                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1603                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1604                     pci_name(ha->pdev));
1605                 goto iospace_error_exit;
1606         }
1607         if (!(ha->bars & 1))
1608                 goto skip_pio;
1609
1610         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1611         pio = pci_resource_start(ha->pdev, 0);
1612         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1613                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1614                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1615                             "Invalid pci I/O region size (%s).\n",
1616                             pci_name(ha->pdev));
1617                         pio = 0;
1618                 }
1619         } else {
1620                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1621                     "Region #0 no a PIO resource (%s).\n",
1622                     pci_name(ha->pdev));
1623                 pio = 0;
1624         }
1625         ha->pio_address = pio;
1626         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1627             "PIO address=%llu.\n",
1628             (unsigned long long)ha->pio_address);
1629
1630 skip_pio:
1631         /* Use MMIO operations for all accesses. */
1632         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1633                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1634                     "Region #1 not an MMIO resource (%s), aborting.\n",
1635                     pci_name(ha->pdev));
1636                 goto iospace_error_exit;
1637         }
1638         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1639                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1640                     "Invalid PCI mem region size (%s), aborting.\n",
1641                     pci_name(ha->pdev));
1642                 goto iospace_error_exit;
1643         }
1644
1645         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1646         if (!ha->iobase) {
1647                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1648                     "Cannot remap MMIO (%s), aborting.\n",
1649                     pci_name(ha->pdev));
1650                 goto iospace_error_exit;
1651         }
1652
1653         /* Determine queue resources */
1654         ha->max_req_queues = ha->max_rsp_queues = 1;
1655         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1656                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1657                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1658                 goto mqiobase_exit;
1659
1660         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1661                         pci_resource_len(ha->pdev, 3));
1662         if (ha->mqiobase) {
1663                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1664                     "MQIO Base=%p.\n", ha->mqiobase);
1665                 /* Read MSIX vector size of the board */
1666                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1667                 ha->msix_count = msix;
1668                 /* Max queues are bounded by available msix vectors */
1669                 /* queue 0 uses two msix vectors */
1670                 if (ql2xmultique_tag) {
1671                         cpus = num_online_cpus();
1672                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1673                                 (cpus + 1) : (ha->msix_count - 1);
1674                         ha->max_req_queues = 2;
1675                 } else if (ql2xmaxqueues > 1) {
1676                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1677                             QLA_MQ_SIZE : ql2xmaxqueues;
1678                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1679                             "QoS mode set, max no of request queues:%d.\n",
1680                             ha->max_req_queues);
1681                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1682                             "QoS mode set, max no of request queues:%d.\n",
1683                             ha->max_req_queues);
1684                 }
1685                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1686                     "MSI-X vector count: %d.\n", msix);
1687         } else
1688                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1689                     "BAR 3 not enabled.\n");
1690
1691 mqiobase_exit:
1692         ha->msix_count = ha->max_rsp_queues + 1;
1693         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1694             "MSIX Count:%d.\n", ha->msix_count);
1695         return (0);
1696
1697 iospace_error_exit:
1698         return (-ENOMEM);
1699 }
1700
1701
1702 static int
1703 qla83xx_iospace_config(struct qla_hw_data *ha)
1704 {
1705         uint16_t msix;
1706         int cpus;
1707
1708         if (pci_request_selected_regions(ha->pdev, ha->bars,
1709             QLA2XXX_DRIVER_NAME)) {
1710                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1711                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1712                     pci_name(ha->pdev));
1713
1714                 goto iospace_error_exit;
1715         }
1716
1717         /* Use MMIO operations for all accesses. */
1718         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1719                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1720                     "Invalid pci I/O region size (%s).\n",
1721                     pci_name(ha->pdev));
1722                 goto iospace_error_exit;
1723         }
1724         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1725                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1726                     "Invalid PCI mem region size (%s), aborting\n",
1727                         pci_name(ha->pdev));
1728                 goto iospace_error_exit;
1729         }
1730
1731         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1732         if (!ha->iobase) {
1733                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1734                     "Cannot remap MMIO (%s), aborting.\n",
1735                     pci_name(ha->pdev));
1736                 goto iospace_error_exit;
1737         }
1738
1739         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1740         /* 83XX 26XX always use MQ type access for queues
1741          * - mbar 2, a.k.a region 4 */
1742         ha->max_req_queues = ha->max_rsp_queues = 1;
1743         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1744                         pci_resource_len(ha->pdev, 4));
1745
1746         if (!ha->mqiobase) {
1747                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1748                     "BAR2/region4 not enabled\n");
1749                 goto mqiobase_exit;
1750         }
1751
1752         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1753                         pci_resource_len(ha->pdev, 2));
1754         if (ha->msixbase) {
1755                 /* Read MSIX vector size of the board */
1756                 pci_read_config_word(ha->pdev,
1757                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1758                 ha->msix_count = msix;
1759                 /* Max queues are bounded by available msix vectors */
1760                 /* queue 0 uses two msix vectors */
1761                 if (ql2xmultique_tag) {
1762                         cpus = num_online_cpus();
1763                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1764                                 (cpus + 1) : (ha->msix_count - 1);
1765                         ha->max_req_queues = 2;
1766                 } else if (ql2xmaxqueues > 1) {
1767                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1768                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1769                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1770                             "QoS mode set, max no of request queues:%d.\n",
1771                             ha->max_req_queues);
1772                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1773                             "QoS mode set, max no of request queues:%d.\n",
1774                             ha->max_req_queues);
1775                 }
1776                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1777                     "MSI-X vector count: %d.\n", msix);
1778         } else
1779                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1780                     "BAR 1 not enabled.\n");
1781
1782 mqiobase_exit:
1783         ha->msix_count = ha->max_rsp_queues + 1;
1784
1785         qlt_83xx_iospace_config(ha);
1786
1787         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1788             "MSIX Count:%d.\n", ha->msix_count);
1789         return 0;
1790
1791 iospace_error_exit:
1792         return -ENOMEM;
1793 }
1794
1795 static struct isp_operations qla2100_isp_ops = {
1796         .pci_config             = qla2100_pci_config,
1797         .reset_chip             = qla2x00_reset_chip,
1798         .chip_diag              = qla2x00_chip_diag,
1799         .config_rings           = qla2x00_config_rings,
1800         .reset_adapter          = qla2x00_reset_adapter,
1801         .nvram_config           = qla2x00_nvram_config,
1802         .update_fw_options      = qla2x00_update_fw_options,
1803         .load_risc              = qla2x00_load_risc,
1804         .pci_info_str           = qla2x00_pci_info_str,
1805         .fw_version_str         = qla2x00_fw_version_str,
1806         .intr_handler           = qla2100_intr_handler,
1807         .enable_intrs           = qla2x00_enable_intrs,
1808         .disable_intrs          = qla2x00_disable_intrs,
1809         .abort_command          = qla2x00_abort_command,
1810         .target_reset           = qla2x00_abort_target,
1811         .lun_reset              = qla2x00_lun_reset,
1812         .fabric_login           = qla2x00_login_fabric,
1813         .fabric_logout          = qla2x00_fabric_logout,
1814         .calc_req_entries       = qla2x00_calc_iocbs_32,
1815         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1816         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1817         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1818         .read_nvram             = qla2x00_read_nvram_data,
1819         .write_nvram            = qla2x00_write_nvram_data,
1820         .fw_dump                = qla2100_fw_dump,
1821         .beacon_on              = NULL,
1822         .beacon_off             = NULL,
1823         .beacon_blink           = NULL,
1824         .read_optrom            = qla2x00_read_optrom_data,
1825         .write_optrom           = qla2x00_write_optrom_data,
1826         .get_flash_version      = qla2x00_get_flash_version,
1827         .start_scsi             = qla2x00_start_scsi,
1828         .abort_isp              = qla2x00_abort_isp,
1829         .iospace_config         = qla2x00_iospace_config,
1830         .initialize_adapter     = qla2x00_initialize_adapter,
1831 };
1832
1833 static struct isp_operations qla2300_isp_ops = {
1834         .pci_config             = qla2300_pci_config,
1835         .reset_chip             = qla2x00_reset_chip,
1836         .chip_diag              = qla2x00_chip_diag,
1837         .config_rings           = qla2x00_config_rings,
1838         .reset_adapter          = qla2x00_reset_adapter,
1839         .nvram_config           = qla2x00_nvram_config,
1840         .update_fw_options      = qla2x00_update_fw_options,
1841         .load_risc              = qla2x00_load_risc,
1842         .pci_info_str           = qla2x00_pci_info_str,
1843         .fw_version_str         = qla2x00_fw_version_str,
1844         .intr_handler           = qla2300_intr_handler,
1845         .enable_intrs           = qla2x00_enable_intrs,
1846         .disable_intrs          = qla2x00_disable_intrs,
1847         .abort_command          = qla2x00_abort_command,
1848         .target_reset           = qla2x00_abort_target,
1849         .lun_reset              = qla2x00_lun_reset,
1850         .fabric_login           = qla2x00_login_fabric,
1851         .fabric_logout          = qla2x00_fabric_logout,
1852         .calc_req_entries       = qla2x00_calc_iocbs_32,
1853         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1854         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1855         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1856         .read_nvram             = qla2x00_read_nvram_data,
1857         .write_nvram            = qla2x00_write_nvram_data,
1858         .fw_dump                = qla2300_fw_dump,
1859         .beacon_on              = qla2x00_beacon_on,
1860         .beacon_off             = qla2x00_beacon_off,
1861         .beacon_blink           = qla2x00_beacon_blink,
1862         .read_optrom            = qla2x00_read_optrom_data,
1863         .write_optrom           = qla2x00_write_optrom_data,
1864         .get_flash_version      = qla2x00_get_flash_version,
1865         .start_scsi             = qla2x00_start_scsi,
1866         .abort_isp              = qla2x00_abort_isp,
1867         .iospace_config         = qla2x00_iospace_config,
1868         .initialize_adapter     = qla2x00_initialize_adapter,
1869 };
1870
1871 static struct isp_operations qla24xx_isp_ops = {
1872         .pci_config             = qla24xx_pci_config,
1873         .reset_chip             = qla24xx_reset_chip,
1874         .chip_diag              = qla24xx_chip_diag,
1875         .config_rings           = qla24xx_config_rings,
1876         .reset_adapter          = qla24xx_reset_adapter,
1877         .nvram_config           = qla24xx_nvram_config,
1878         .update_fw_options      = qla24xx_update_fw_options,
1879         .load_risc              = qla24xx_load_risc,
1880         .pci_info_str           = qla24xx_pci_info_str,
1881         .fw_version_str         = qla24xx_fw_version_str,
1882         .intr_handler           = qla24xx_intr_handler,
1883         .enable_intrs           = qla24xx_enable_intrs,
1884         .disable_intrs          = qla24xx_disable_intrs,
1885         .abort_command          = qla24xx_abort_command,
1886         .target_reset           = qla24xx_abort_target,
1887         .lun_reset              = qla24xx_lun_reset,
1888         .fabric_login           = qla24xx_login_fabric,
1889         .fabric_logout          = qla24xx_fabric_logout,
1890         .calc_req_entries       = NULL,
1891         .build_iocbs            = NULL,
1892         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1893         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1894         .read_nvram             = qla24xx_read_nvram_data,
1895         .write_nvram            = qla24xx_write_nvram_data,
1896         .fw_dump                = qla24xx_fw_dump,
1897         .beacon_on              = qla24xx_beacon_on,
1898         .beacon_off             = qla24xx_beacon_off,
1899         .beacon_blink           = qla24xx_beacon_blink,
1900         .read_optrom            = qla24xx_read_optrom_data,
1901         .write_optrom           = qla24xx_write_optrom_data,
1902         .get_flash_version      = qla24xx_get_flash_version,
1903         .start_scsi             = qla24xx_start_scsi,
1904         .abort_isp              = qla2x00_abort_isp,
1905         .iospace_config         = qla2x00_iospace_config,
1906         .initialize_adapter     = qla2x00_initialize_adapter,
1907 };
1908
1909 static struct isp_operations qla25xx_isp_ops = {
1910         .pci_config             = qla25xx_pci_config,
1911         .reset_chip             = qla24xx_reset_chip,
1912         .chip_diag              = qla24xx_chip_diag,
1913         .config_rings           = qla24xx_config_rings,
1914         .reset_adapter          = qla24xx_reset_adapter,
1915         .nvram_config           = qla24xx_nvram_config,
1916         .update_fw_options      = qla24xx_update_fw_options,
1917         .load_risc              = qla24xx_load_risc,
1918         .pci_info_str           = qla24xx_pci_info_str,
1919         .fw_version_str         = qla24xx_fw_version_str,
1920         .intr_handler           = qla24xx_intr_handler,
1921         .enable_intrs           = qla24xx_enable_intrs,
1922         .disable_intrs          = qla24xx_disable_intrs,
1923         .abort_command          = qla24xx_abort_command,
1924         .target_reset           = qla24xx_abort_target,
1925         .lun_reset              = qla24xx_lun_reset,
1926         .fabric_login           = qla24xx_login_fabric,
1927         .fabric_logout          = qla24xx_fabric_logout,
1928         .calc_req_entries       = NULL,
1929         .build_iocbs            = NULL,
1930         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1931         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1932         .read_nvram             = qla25xx_read_nvram_data,
1933         .write_nvram            = qla25xx_write_nvram_data,
1934         .fw_dump                = qla25xx_fw_dump,
1935         .beacon_on              = qla24xx_beacon_on,
1936         .beacon_off             = qla24xx_beacon_off,
1937         .beacon_blink           = qla24xx_beacon_blink,
1938         .read_optrom            = qla25xx_read_optrom_data,
1939         .write_optrom           = qla24xx_write_optrom_data,
1940         .get_flash_version      = qla24xx_get_flash_version,
1941         .start_scsi             = qla24xx_dif_start_scsi,
1942         .abort_isp              = qla2x00_abort_isp,
1943         .iospace_config         = qla2x00_iospace_config,
1944         .initialize_adapter     = qla2x00_initialize_adapter,
1945 };
1946
1947 static struct isp_operations qla81xx_isp_ops = {
1948         .pci_config             = qla25xx_pci_config,
1949         .reset_chip             = qla24xx_reset_chip,
1950         .chip_diag              = qla24xx_chip_diag,
1951         .config_rings           = qla24xx_config_rings,
1952         .reset_adapter          = qla24xx_reset_adapter,
1953         .nvram_config           = qla81xx_nvram_config,
1954         .update_fw_options      = qla81xx_update_fw_options,
1955         .load_risc              = qla81xx_load_risc,
1956         .pci_info_str           = qla24xx_pci_info_str,
1957         .fw_version_str         = qla24xx_fw_version_str,
1958         .intr_handler           = qla24xx_intr_handler,
1959         .enable_intrs           = qla24xx_enable_intrs,
1960         .disable_intrs          = qla24xx_disable_intrs,
1961         .abort_command          = qla24xx_abort_command,
1962         .target_reset           = qla24xx_abort_target,
1963         .lun_reset              = qla24xx_lun_reset,
1964         .fabric_login           = qla24xx_login_fabric,
1965         .fabric_logout          = qla24xx_fabric_logout,
1966         .calc_req_entries       = NULL,
1967         .build_iocbs            = NULL,
1968         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1969         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1970         .read_nvram             = NULL,
1971         .write_nvram            = NULL,
1972         .fw_dump                = qla81xx_fw_dump,
1973         .beacon_on              = qla24xx_beacon_on,
1974         .beacon_off             = qla24xx_beacon_off,
1975         .beacon_blink           = qla83xx_beacon_blink,
1976         .read_optrom            = qla25xx_read_optrom_data,
1977         .write_optrom           = qla24xx_write_optrom_data,
1978         .get_flash_version      = qla24xx_get_flash_version,
1979         .start_scsi             = qla24xx_dif_start_scsi,
1980         .abort_isp              = qla2x00_abort_isp,
1981         .iospace_config         = qla2x00_iospace_config,
1982         .initialize_adapter     = qla2x00_initialize_adapter,
1983 };
1984
1985 static struct isp_operations qla82xx_isp_ops = {
1986         .pci_config             = qla82xx_pci_config,
1987         .reset_chip             = qla82xx_reset_chip,
1988         .chip_diag              = qla24xx_chip_diag,
1989         .config_rings           = qla82xx_config_rings,
1990         .reset_adapter          = qla24xx_reset_adapter,
1991         .nvram_config           = qla81xx_nvram_config,
1992         .update_fw_options      = qla24xx_update_fw_options,
1993         .load_risc              = qla82xx_load_risc,
1994         .pci_info_str           = qla24xx_pci_info_str,
1995         .fw_version_str         = qla24xx_fw_version_str,
1996         .intr_handler           = qla82xx_intr_handler,
1997         .enable_intrs           = qla82xx_enable_intrs,
1998         .disable_intrs          = qla82xx_disable_intrs,
1999         .abort_command          = qla24xx_abort_command,
2000         .target_reset           = qla24xx_abort_target,
2001         .lun_reset              = qla24xx_lun_reset,
2002         .fabric_login           = qla24xx_login_fabric,
2003         .fabric_logout          = qla24xx_fabric_logout,
2004         .calc_req_entries       = NULL,
2005         .build_iocbs            = NULL,
2006         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2007         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2008         .read_nvram             = qla24xx_read_nvram_data,
2009         .write_nvram            = qla24xx_write_nvram_data,
2010         .fw_dump                = qla82xx_fw_dump,
2011         .beacon_on              = qla82xx_beacon_on,
2012         .beacon_off             = qla82xx_beacon_off,
2013         .beacon_blink           = NULL,
2014         .read_optrom            = qla82xx_read_optrom_data,
2015         .write_optrom           = qla82xx_write_optrom_data,
2016         .get_flash_version      = qla82xx_get_flash_version,
2017         .start_scsi             = qla82xx_start_scsi,
2018         .abort_isp              = qla82xx_abort_isp,
2019         .iospace_config         = qla82xx_iospace_config,
2020         .initialize_adapter     = qla2x00_initialize_adapter,
2021 };
2022
2023 static struct isp_operations qla8044_isp_ops = {
2024         .pci_config             = qla82xx_pci_config,
2025         .reset_chip             = qla82xx_reset_chip,
2026         .chip_diag              = qla24xx_chip_diag,
2027         .config_rings           = qla82xx_config_rings,
2028         .reset_adapter          = qla24xx_reset_adapter,
2029         .nvram_config           = qla81xx_nvram_config,
2030         .update_fw_options      = qla24xx_update_fw_options,
2031         .load_risc              = qla82xx_load_risc,
2032         .pci_info_str           = qla24xx_pci_info_str,
2033         .fw_version_str         = qla24xx_fw_version_str,
2034         .intr_handler           = qla8044_intr_handler,
2035         .enable_intrs           = qla82xx_enable_intrs,
2036         .disable_intrs          = qla82xx_disable_intrs,
2037         .abort_command          = qla24xx_abort_command,
2038         .target_reset           = qla24xx_abort_target,
2039         .lun_reset              = qla24xx_lun_reset,
2040         .fabric_login           = qla24xx_login_fabric,
2041         .fabric_logout          = qla24xx_fabric_logout,
2042         .calc_req_entries       = NULL,
2043         .build_iocbs            = NULL,
2044         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2045         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2046         .read_nvram             = NULL,
2047         .write_nvram            = NULL,
2048         .fw_dump                = qla8044_fw_dump,
2049         .beacon_on              = qla82xx_beacon_on,
2050         .beacon_off             = qla82xx_beacon_off,
2051         .beacon_blink           = NULL,
2052         .read_optrom            = qla8044_read_optrom_data,
2053         .write_optrom           = qla8044_write_optrom_data,
2054         .get_flash_version      = qla82xx_get_flash_version,
2055         .start_scsi             = qla82xx_start_scsi,
2056         .abort_isp              = qla8044_abort_isp,
2057         .iospace_config         = qla82xx_iospace_config,
2058         .initialize_adapter     = qla2x00_initialize_adapter,
2059 };
2060
2061 static struct isp_operations qla83xx_isp_ops = {
2062         .pci_config             = qla25xx_pci_config,
2063         .reset_chip             = qla24xx_reset_chip,
2064         .chip_diag              = qla24xx_chip_diag,
2065         .config_rings           = qla24xx_config_rings,
2066         .reset_adapter          = qla24xx_reset_adapter,
2067         .nvram_config           = qla81xx_nvram_config,
2068         .update_fw_options      = qla81xx_update_fw_options,
2069         .load_risc              = qla81xx_load_risc,
2070         .pci_info_str           = qla24xx_pci_info_str,
2071         .fw_version_str         = qla24xx_fw_version_str,
2072         .intr_handler           = qla24xx_intr_handler,
2073         .enable_intrs           = qla24xx_enable_intrs,
2074         .disable_intrs          = qla24xx_disable_intrs,
2075         .abort_command          = qla24xx_abort_command,
2076         .target_reset           = qla24xx_abort_target,
2077         .lun_reset              = qla24xx_lun_reset,
2078         .fabric_login           = qla24xx_login_fabric,
2079         .fabric_logout          = qla24xx_fabric_logout,
2080         .calc_req_entries       = NULL,
2081         .build_iocbs            = NULL,
2082         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2083         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2084         .read_nvram             = NULL,
2085         .write_nvram            = NULL,
2086         .fw_dump                = qla83xx_fw_dump,
2087         .beacon_on              = qla24xx_beacon_on,
2088         .beacon_off             = qla24xx_beacon_off,
2089         .beacon_blink           = qla83xx_beacon_blink,
2090         .read_optrom            = qla25xx_read_optrom_data,
2091         .write_optrom           = qla24xx_write_optrom_data,
2092         .get_flash_version      = qla24xx_get_flash_version,
2093         .start_scsi             = qla24xx_dif_start_scsi,
2094         .abort_isp              = qla2x00_abort_isp,
2095         .iospace_config         = qla83xx_iospace_config,
2096         .initialize_adapter     = qla2x00_initialize_adapter,
2097 };
2098
2099 static struct isp_operations qlafx00_isp_ops = {
2100         .pci_config             = qlafx00_pci_config,
2101         .reset_chip             = qlafx00_soft_reset,
2102         .chip_diag              = qlafx00_chip_diag,
2103         .config_rings           = qlafx00_config_rings,
2104         .reset_adapter          = qlafx00_soft_reset,
2105         .nvram_config           = NULL,
2106         .update_fw_options      = NULL,
2107         .load_risc              = NULL,
2108         .pci_info_str           = qlafx00_pci_info_str,
2109         .fw_version_str         = qlafx00_fw_version_str,
2110         .intr_handler           = qlafx00_intr_handler,
2111         .enable_intrs           = qlafx00_enable_intrs,
2112         .disable_intrs          = qlafx00_disable_intrs,
2113         .abort_command          = qla24xx_async_abort_command,
2114         .target_reset           = qlafx00_abort_target,
2115         .lun_reset              = qlafx00_lun_reset,
2116         .fabric_login           = NULL,
2117         .fabric_logout          = NULL,
2118         .calc_req_entries       = NULL,
2119         .build_iocbs            = NULL,
2120         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2121         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2122         .read_nvram             = qla24xx_read_nvram_data,
2123         .write_nvram            = qla24xx_write_nvram_data,
2124         .fw_dump                = NULL,
2125         .beacon_on              = qla24xx_beacon_on,
2126         .beacon_off             = qla24xx_beacon_off,
2127         .beacon_blink           = NULL,
2128         .read_optrom            = qla24xx_read_optrom_data,
2129         .write_optrom           = qla24xx_write_optrom_data,
2130         .get_flash_version      = qla24xx_get_flash_version,
2131         .start_scsi             = qlafx00_start_scsi,
2132         .abort_isp              = qlafx00_abort_isp,
2133         .iospace_config         = qlafx00_iospace_config,
2134         .initialize_adapter     = qlafx00_initialize_adapter,
2135 };
2136
2137 static struct isp_operations qla27xx_isp_ops = {
2138         .pci_config             = qla25xx_pci_config,
2139         .reset_chip             = qla24xx_reset_chip,
2140         .chip_diag              = qla24xx_chip_diag,
2141         .config_rings           = qla24xx_config_rings,
2142         .reset_adapter          = qla24xx_reset_adapter,
2143         .nvram_config           = qla81xx_nvram_config,
2144         .update_fw_options      = qla81xx_update_fw_options,
2145         .load_risc              = qla81xx_load_risc,
2146         .pci_info_str           = qla24xx_pci_info_str,
2147         .fw_version_str         = qla24xx_fw_version_str,
2148         .intr_handler           = qla24xx_intr_handler,
2149         .enable_intrs           = qla24xx_enable_intrs,
2150         .disable_intrs          = qla24xx_disable_intrs,
2151         .abort_command          = qla24xx_abort_command,
2152         .target_reset           = qla24xx_abort_target,
2153         .lun_reset              = qla24xx_lun_reset,
2154         .fabric_login           = qla24xx_login_fabric,
2155         .fabric_logout          = qla24xx_fabric_logout,
2156         .calc_req_entries       = NULL,
2157         .build_iocbs            = NULL,
2158         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2159         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2160         .read_nvram             = NULL,
2161         .write_nvram            = NULL,
2162         .fw_dump                = qla27xx_fwdump,
2163         .beacon_on              = qla24xx_beacon_on,
2164         .beacon_off             = qla24xx_beacon_off,
2165         .beacon_blink           = qla83xx_beacon_blink,
2166         .read_optrom            = qla25xx_read_optrom_data,
2167         .write_optrom           = qla24xx_write_optrom_data,
2168         .get_flash_version      = qla24xx_get_flash_version,
2169         .start_scsi             = qla24xx_dif_start_scsi,
2170         .abort_isp              = qla2x00_abort_isp,
2171         .iospace_config         = qla83xx_iospace_config,
2172         .initialize_adapter     = qla2x00_initialize_adapter,
2173 };
2174
2175 static inline void
2176 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2177 {
2178         ha->device_type = DT_EXTENDED_IDS;
2179         switch (ha->pdev->device) {
2180         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2181                 ha->isp_type |= DT_ISP2100;
2182                 ha->device_type &= ~DT_EXTENDED_IDS;
2183                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2184                 break;
2185         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2186                 ha->isp_type |= DT_ISP2200;
2187                 ha->device_type &= ~DT_EXTENDED_IDS;
2188                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2189                 break;
2190         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2191                 ha->isp_type |= DT_ISP2300;
2192                 ha->device_type |= DT_ZIO_SUPPORTED;
2193                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2194                 break;
2195         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2196                 ha->isp_type |= DT_ISP2312;
2197                 ha->device_type |= DT_ZIO_SUPPORTED;
2198                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2199                 break;
2200         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2201                 ha->isp_type |= DT_ISP2322;
2202                 ha->device_type |= DT_ZIO_SUPPORTED;
2203                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2204                     ha->pdev->subsystem_device == 0x0170)
2205                         ha->device_type |= DT_OEM_001;
2206                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2207                 break;
2208         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2209                 ha->isp_type |= DT_ISP6312;
2210                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2211                 break;
2212         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2213                 ha->isp_type |= DT_ISP6322;
2214                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2215                 break;
2216         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2217                 ha->isp_type |= DT_ISP2422;
2218                 ha->device_type |= DT_ZIO_SUPPORTED;
2219                 ha->device_type |= DT_FWI2;
2220                 ha->device_type |= DT_IIDMA;
2221                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2222                 break;
2223         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2224                 ha->isp_type |= DT_ISP2432;
2225                 ha->device_type |= DT_ZIO_SUPPORTED;
2226                 ha->device_type |= DT_FWI2;
2227                 ha->device_type |= DT_IIDMA;
2228                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2229                 break;
2230         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2231                 ha->isp_type |= DT_ISP8432;
2232                 ha->device_type |= DT_ZIO_SUPPORTED;
2233                 ha->device_type |= DT_FWI2;
2234                 ha->device_type |= DT_IIDMA;
2235                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2236                 break;
2237         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2238                 ha->isp_type |= DT_ISP5422;
2239                 ha->device_type |= DT_FWI2;
2240                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2241                 break;
2242         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2243                 ha->isp_type |= DT_ISP5432;
2244                 ha->device_type |= DT_FWI2;
2245                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2246                 break;
2247         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2248                 ha->isp_type |= DT_ISP2532;
2249                 ha->device_type |= DT_ZIO_SUPPORTED;
2250                 ha->device_type |= DT_FWI2;
2251                 ha->device_type |= DT_IIDMA;
2252                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2253                 break;
2254         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2255                 ha->isp_type |= DT_ISP8001;
2256                 ha->device_type |= DT_ZIO_SUPPORTED;
2257                 ha->device_type |= DT_FWI2;
2258                 ha->device_type |= DT_IIDMA;
2259                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2260                 break;
2261         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2262                 ha->isp_type |= DT_ISP8021;
2263                 ha->device_type |= DT_ZIO_SUPPORTED;
2264                 ha->device_type |= DT_FWI2;
2265                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2266                 /* Initialize 82XX ISP flags */
2267                 qla82xx_init_flags(ha);
2268                 break;
2269          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2270                 ha->isp_type |= DT_ISP8044;
2271                 ha->device_type |= DT_ZIO_SUPPORTED;
2272                 ha->device_type |= DT_FWI2;
2273                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2274                 /* Initialize 82XX ISP flags */
2275                 qla82xx_init_flags(ha);
2276                 break;
2277         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2278                 ha->isp_type |= DT_ISP2031;
2279                 ha->device_type |= DT_ZIO_SUPPORTED;
2280                 ha->device_type |= DT_FWI2;
2281                 ha->device_type |= DT_IIDMA;
2282                 ha->device_type |= DT_T10_PI;
2283                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2284                 break;
2285         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2286                 ha->isp_type |= DT_ISP8031;
2287                 ha->device_type |= DT_ZIO_SUPPORTED;
2288                 ha->device_type |= DT_FWI2;
2289                 ha->device_type |= DT_IIDMA;
2290                 ha->device_type |= DT_T10_PI;
2291                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2292                 break;
2293         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2294                 ha->isp_type |= DT_ISPFX00;
2295                 break;
2296         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2297                 ha->isp_type |= DT_ISP2071;
2298                 ha->device_type |= DT_ZIO_SUPPORTED;
2299                 ha->device_type |= DT_FWI2;
2300                 ha->device_type |= DT_IIDMA;
2301                 ha->device_type |= DT_T10_PI;
2302                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2303                 break;
2304         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2305                 ha->isp_type |= DT_ISP2271;
2306                 ha->device_type |= DT_ZIO_SUPPORTED;
2307                 ha->device_type |= DT_FWI2;
2308                 ha->device_type |= DT_IIDMA;
2309                 ha->device_type |= DT_T10_PI;
2310                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2311                 break;
2312         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2313                 ha->isp_type |= DT_ISP2261;
2314                 ha->device_type |= DT_ZIO_SUPPORTED;
2315                 ha->device_type |= DT_FWI2;
2316                 ha->device_type |= DT_IIDMA;
2317                 ha->device_type |= DT_T10_PI;
2318                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2319                 break;
2320         }
2321
2322         if (IS_QLA82XX(ha))
2323                 ha->port_no = ha->portnum & 1;
2324         else {
2325                 /* Get adapter physical port no from interrupt pin register. */
2326                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2327                 if (IS_QLA27XX(ha))
2328                         ha->port_no--;
2329                 else
2330                         ha->port_no = !(ha->port_no & 1);
2331         }
2332
2333         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2334             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2335             ha->device_type, ha->port_no, ha->fw_srisc_address);
2336 }
2337
2338 static void
2339 qla2xxx_scan_start(struct Scsi_Host *shost)
2340 {
2341         scsi_qla_host_t *vha = shost_priv(shost);
2342
2343         if (vha->hw->flags.running_gold_fw)
2344                 return;
2345
2346         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2347         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2348         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2349         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2350 }
2351
2352 static int
2353 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2354 {
2355         scsi_qla_host_t *vha = shost_priv(shost);
2356
2357         if (test_bit(UNLOADING, &vha->dpc_flags))
2358                 return 1;
2359         if (!vha->host)
2360                 return 1;
2361         if (time > vha->hw->loop_reset_delay * HZ)
2362                 return 1;
2363
2364         return atomic_read(&vha->loop_state) == LOOP_READY;
2365 }
2366
2367 /*
2368  * PCI driver interface
2369  */
2370 static int
2371 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2372 {
2373         int     ret = -ENODEV;
2374         struct Scsi_Host *host;
2375         scsi_qla_host_t *base_vha = NULL;
2376         struct qla_hw_data *ha;
2377         char pci_info[30];
2378         char fw_str[30], wq_name[30];
2379         struct scsi_host_template *sht;
2380         int bars, mem_only = 0;
2381         uint16_t req_length = 0, rsp_length = 0;
2382         struct req_que *req = NULL;
2383         struct rsp_que *rsp = NULL;
2384         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2385         sht = &qla2xxx_driver_template;
2386         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2387             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2388             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2389             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2390             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2391             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2392             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2393             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2394             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2395             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2396             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2397             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2398             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2399             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2400             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2401                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2402                 mem_only = 1;
2403                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2404                     "Mem only adapter.\n");
2405         }
2406         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2407             "Bars=%d.\n", bars);
2408
2409         if (mem_only) {
2410                 if (pci_enable_device_mem(pdev))
2411                         return ret;
2412         } else {
2413                 if (pci_enable_device(pdev))
2414                         return ret;
2415         }
2416
2417         /* This may fail but that's ok */
2418         pci_enable_pcie_error_reporting(pdev);
2419
2420         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2421         if (!ha) {
2422                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2423                     "Unable to allocate memory for ha.\n");
2424                 goto disable_device;
2425         }
2426         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2427             "Memory allocated for ha=%p.\n", ha);
2428         ha->pdev = pdev;
2429         ha->tgt.enable_class_2 = ql2xenableclass2;
2430         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2431         spin_lock_init(&ha->tgt.q_full_lock);
2432         spin_lock_init(&ha->tgt.sess_lock);
2433         spin_lock_init(&ha->tgt.atio_lock);
2434
2435
2436         /* Clear our data area */
2437         ha->bars = bars;
2438         ha->mem_only = mem_only;
2439         spin_lock_init(&ha->hardware_lock);
2440         spin_lock_init(&ha->vport_slock);
2441         mutex_init(&ha->selflogin_lock);
2442         mutex_init(&ha->optrom_mutex);
2443
2444         /* Set ISP-type information. */
2445         qla2x00_set_isp_flags(ha);
2446
2447         /* Set EEH reset type to fundamental if required by hba */
2448         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2449             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2450                 pdev->needs_freset = 1;
2451
2452         ha->prev_topology = 0;
2453         ha->init_cb_size = sizeof(init_cb_t);
2454         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2455         ha->optrom_size = OPTROM_SIZE_2300;
2456
2457         /* Assign ISP specific operations. */
2458         if (IS_QLA2100(ha)) {
2459                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2460                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2461                 req_length = REQUEST_ENTRY_CNT_2100;
2462                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2463                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2464                 ha->gid_list_info_size = 4;
2465                 ha->flash_conf_off = ~0;
2466                 ha->flash_data_off = ~0;
2467                 ha->nvram_conf_off = ~0;
2468                 ha->nvram_data_off = ~0;
2469                 ha->isp_ops = &qla2100_isp_ops;
2470         } else if (IS_QLA2200(ha)) {
2471                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2472                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2473                 req_length = REQUEST_ENTRY_CNT_2200;
2474                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2475                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2476                 ha->gid_list_info_size = 4;
2477                 ha->flash_conf_off = ~0;
2478                 ha->flash_data_off = ~0;
2479                 ha->nvram_conf_off = ~0;
2480                 ha->nvram_data_off = ~0;
2481                 ha->isp_ops = &qla2100_isp_ops;
2482         } else if (IS_QLA23XX(ha)) {
2483                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2484                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2485                 req_length = REQUEST_ENTRY_CNT_2200;
2486                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2487                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2488                 ha->gid_list_info_size = 6;
2489                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2490                         ha->optrom_size = OPTROM_SIZE_2322;
2491                 ha->flash_conf_off = ~0;
2492                 ha->flash_data_off = ~0;
2493                 ha->nvram_conf_off = ~0;
2494                 ha->nvram_data_off = ~0;
2495                 ha->isp_ops = &qla2300_isp_ops;
2496         } else if (IS_QLA24XX_TYPE(ha)) {
2497                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2498                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2499                 req_length = REQUEST_ENTRY_CNT_24XX;
2500                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2501                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2502                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2503                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2504                 ha->gid_list_info_size = 8;
2505                 ha->optrom_size = OPTROM_SIZE_24XX;
2506                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2507                 ha->isp_ops = &qla24xx_isp_ops;
2508                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2509                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2510                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2511                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2512         } else if (IS_QLA25XX(ha)) {
2513                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2514                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2515                 req_length = REQUEST_ENTRY_CNT_24XX;
2516                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2517                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2518                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2519                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2520                 ha->gid_list_info_size = 8;
2521                 ha->optrom_size = OPTROM_SIZE_25XX;
2522                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2523                 ha->isp_ops = &qla25xx_isp_ops;
2524                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2525                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2526                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2527                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2528         } else if (IS_QLA81XX(ha)) {
2529                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2530                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2531                 req_length = REQUEST_ENTRY_CNT_24XX;
2532                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2533                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2534                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2535                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2536                 ha->gid_list_info_size = 8;
2537                 ha->optrom_size = OPTROM_SIZE_81XX;
2538                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2539                 ha->isp_ops = &qla81xx_isp_ops;
2540                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2541                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2542                 ha->nvram_conf_off = ~0;
2543                 ha->nvram_data_off = ~0;
2544         } else if (IS_QLA82XX(ha)) {
2545                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2546                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2547                 req_length = REQUEST_ENTRY_CNT_82XX;
2548                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2549                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2550                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2551                 ha->gid_list_info_size = 8;
2552                 ha->optrom_size = OPTROM_SIZE_82XX;
2553                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2554                 ha->isp_ops = &qla82xx_isp_ops;
2555                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2556                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2557                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2558                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2559         } else if (IS_QLA8044(ha)) {
2560                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2561                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2562                 req_length = REQUEST_ENTRY_CNT_82XX;
2563                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2564                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2565                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2566                 ha->gid_list_info_size = 8;
2567                 ha->optrom_size = OPTROM_SIZE_83XX;
2568                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2569                 ha->isp_ops = &qla8044_isp_ops;
2570                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2571                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2572                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2573                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2574         } else if (IS_QLA83XX(ha)) {
2575                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2576                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2577                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2578                 req_length = REQUEST_ENTRY_CNT_83XX;
2579                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2580                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2581                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2582                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2583                 ha->gid_list_info_size = 8;
2584                 ha->optrom_size = OPTROM_SIZE_83XX;
2585                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2586                 ha->isp_ops = &qla83xx_isp_ops;
2587                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2588                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2589                 ha->nvram_conf_off = ~0;
2590                 ha->nvram_data_off = ~0;
2591         }  else if (IS_QLAFX00(ha)) {
2592                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2593                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2594                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2595                 req_length = REQUEST_ENTRY_CNT_FX00;
2596                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2597                 ha->isp_ops = &qlafx00_isp_ops;
2598                 ha->port_down_retry_count = 30; /* default value */
2599                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2600                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2601                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2602                 ha->mr.fw_hbt_en = 1;
2603                 ha->mr.host_info_resend = false;
2604                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2605         } else if (IS_QLA27XX(ha)) {
2606                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2607                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2608                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2609                 req_length = REQUEST_ENTRY_CNT_83XX;
2610                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2611                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2612                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2613                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2614                 ha->gid_list_info_size = 8;
2615                 ha->optrom_size = OPTROM_SIZE_83XX;
2616                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2617                 ha->isp_ops = &qla27xx_isp_ops;
2618                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2619                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2620                 ha->nvram_conf_off = ~0;
2621                 ha->nvram_data_off = ~0;
2622         }
2623
2624         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2625             "mbx_count=%d, req_length=%d, "
2626             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2627             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2628             "max_fibre_devices=%d.\n",
2629             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2630             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2631             ha->nvram_npiv_size, ha->max_fibre_devices);
2632         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2633             "isp_ops=%p, flash_conf_off=%d, "
2634             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2635             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2636             ha->nvram_conf_off, ha->nvram_data_off);
2637
2638         /* Configure PCI I/O space */
2639         ret = ha->isp_ops->iospace_config(ha);
2640         if (ret)
2641                 goto iospace_config_failed;
2642
2643         ql_log_pci(ql_log_info, pdev, 0x001d,
2644             "Found an ISP%04X irq %d iobase 0x%p.\n",
2645             pdev->device, pdev->irq, ha->iobase);
2646         mutex_init(&ha->vport_lock);
2647         init_completion(&ha->mbx_cmd_comp);
2648         complete(&ha->mbx_cmd_comp);
2649         init_completion(&ha->mbx_intr_comp);
2650         init_completion(&ha->dcbx_comp);
2651         init_completion(&ha->lb_portup_comp);
2652
2653         set_bit(0, (unsigned long *) ha->vp_idx_map);
2654
2655         qla2x00_config_dma_addressing(ha);
2656         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2657             "64 Bit addressing is %s.\n",
2658             ha->flags.enable_64bit_addressing ? "enable" :
2659             "disable");
2660         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2661         if (ret) {
2662                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2663                     "Failed to allocate memory for adapter, aborting.\n");
2664
2665                 goto probe_hw_failed;
2666         }
2667
2668         req->max_q_depth = MAX_Q_DEPTH;
2669         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2670                 req->max_q_depth = ql2xmaxqdepth;
2671
2672
2673         base_vha = qla2x00_create_host(sht, ha);
2674         if (!base_vha) {
2675                 ret = -ENOMEM;
2676                 qla2x00_mem_free(ha);
2677                 qla2x00_free_req_que(ha, req);
2678                 qla2x00_free_rsp_que(ha, rsp);
2679                 goto probe_hw_failed;
2680         }
2681
2682         pci_set_drvdata(pdev, base_vha);
2683         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2684
2685         host = base_vha->host;
2686         base_vha->req = req;
2687         if (IS_QLA2XXX_MIDTYPE(ha))
2688                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2689         else
2690                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2691                                                 base_vha->vp_idx;
2692
2693         /* Setup fcport template structure. */
2694         ha->mr.fcport.vha = base_vha;
2695         ha->mr.fcport.port_type = FCT_UNKNOWN;
2696         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2697         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2698         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2699         ha->mr.fcport.scan_state = 1;
2700
2701         /* Set the SG table size based on ISP type */
2702         if (!IS_FWI2_CAPABLE(ha)) {
2703                 if (IS_QLA2100(ha))
2704                         host->sg_tablesize = 32;
2705         } else {
2706                 if (!IS_QLA82XX(ha))
2707                         host->sg_tablesize = QLA_SG_ALL;
2708         }
2709         host->max_id = ha->max_fibre_devices;
2710         host->cmd_per_lun = 3;
2711         host->unique_id = host->host_no;
2712         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2713                 host->max_cmd_len = 32;
2714         else
2715                 host->max_cmd_len = MAX_CMDSZ;
2716         host->max_channel = MAX_BUSES - 1;
2717         /* Older HBAs support only 16-bit LUNs */
2718         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2719             ql2xmaxlun > 0xffff)
2720                 host->max_lun = 0xffff;
2721         else
2722                 host->max_lun = ql2xmaxlun;
2723         host->transportt = qla2xxx_transport_template;
2724         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2725
2726         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2727             "max_id=%d this_id=%d "
2728             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2729             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2730             host->this_id, host->cmd_per_lun, host->unique_id,
2731             host->max_cmd_len, host->max_channel, host->max_lun,
2732             host->transportt, sht->vendor_id);
2733
2734 que_init:
2735         /* Alloc arrays of request and response ring ptrs */
2736         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2737                 ql_log(ql_log_fatal, base_vha, 0x003d,
2738                     "Failed to allocate memory for queue pointers..."
2739                     "aborting.\n");
2740                 goto probe_init_failed;
2741         }
2742
2743         qlt_probe_one_stage1(base_vha, ha);
2744
2745         /* Set up the irqs */
2746         ret = qla2x00_request_irqs(ha, rsp);
2747         if (ret)
2748                 goto probe_init_failed;
2749
2750         pci_save_state(pdev);
2751
2752         /* Assign back pointers */
2753         rsp->req = req;
2754         req->rsp = rsp;
2755
2756         if (IS_QLAFX00(ha)) {
2757                 ha->rsp_q_map[0] = rsp;
2758                 ha->req_q_map[0] = req;
2759                 set_bit(0, ha->req_qid_map);
2760                 set_bit(0, ha->rsp_qid_map);
2761         }
2762
2763         /* FWI2-capable only. */
2764         req->req_q_in = &ha->iobase->isp24.req_q_in;
2765         req->req_q_out = &ha->iobase->isp24.req_q_out;
2766         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2767         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2768         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2769                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2770                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2771                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2772                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2773         }
2774
2775         if (IS_QLAFX00(ha)) {
2776                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2777                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2778                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2779                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2780         }
2781
2782         if (IS_P3P_TYPE(ha)) {
2783                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2784                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2785                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2786         }
2787
2788         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2789             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2790             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2791         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2792             "req->req_q_in=%p req->req_q_out=%p "
2793             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2794             req->req_q_in, req->req_q_out,
2795             rsp->rsp_q_in, rsp->rsp_q_out);
2796         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2797             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2798             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2799         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2800             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2801             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2802
2803         if (ha->isp_ops->initialize_adapter(base_vha)) {
2804                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2805                     "Failed to initialize adapter - Adapter flags %x.\n",
2806                     base_vha->device_flags);
2807
2808                 if (IS_QLA82XX(ha)) {
2809                         qla82xx_idc_lock(ha);
2810                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2811                                 QLA8XXX_DEV_FAILED);
2812                         qla82xx_idc_unlock(ha);
2813                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2814                             "HW State: FAILED.\n");
2815                 } else if (IS_QLA8044(ha)) {
2816                         qla8044_idc_lock(ha);
2817                         qla8044_wr_direct(base_vha,
2818                                 QLA8044_CRB_DEV_STATE_INDEX,
2819                                 QLA8XXX_DEV_FAILED);
2820                         qla8044_idc_unlock(ha);
2821                         ql_log(ql_log_fatal, base_vha, 0x0150,
2822                             "HW State: FAILED.\n");
2823                 }
2824
2825                 ret = -ENODEV;
2826                 goto probe_failed;
2827         }
2828
2829         if (IS_QLAFX00(ha))
2830                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2831         else
2832                 host->can_queue = req->num_outstanding_cmds - 10;
2833
2834         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2835             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2836             host->can_queue, base_vha->req,
2837             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2838
2839         if (ha->mqenable) {
2840                 if (qla25xx_setup_mode(base_vha)) {
2841                         ql_log(ql_log_warn, base_vha, 0x00ec,
2842                             "Failed to create queues, falling back to single queue mode.\n");
2843                         goto que_init;
2844                 }
2845         }
2846
2847         if (ha->flags.running_gold_fw)
2848                 goto skip_dpc;
2849
2850         /*
2851          * Startup the kernel thread for this host adapter
2852          */
2853         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2854             "%s_dpc", base_vha->host_str);
2855         if (IS_ERR(ha->dpc_thread)) {
2856                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2857                     "Failed to start DPC thread.\n");
2858                 ret = PTR_ERR(ha->dpc_thread);
2859                 goto probe_failed;
2860         }
2861         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2862             "DPC thread started successfully.\n");
2863
2864         /*
2865          * If we're not coming up in initiator mode, we might sit for
2866          * a while without waking up the dpc thread, which leads to a
2867          * stuck process warning.  So just kick the dpc once here and
2868          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2869          */
2870         qla2xxx_wake_dpc(base_vha);
2871
2872         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2873
2874         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2875                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2876                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2877                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2878
2879                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2880                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2881                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2882                 INIT_WORK(&ha->idc_state_handler,
2883                     qla83xx_idc_state_handler_work);
2884                 INIT_WORK(&ha->nic_core_unrecoverable,
2885                     qla83xx_nic_core_unrecoverable_work);
2886         }
2887
2888 skip_dpc:
2889         list_add_tail(&base_vha->list, &ha->vp_list);
2890         base_vha->host->irq = ha->pdev->irq;
2891
2892         /* Initialized the timer */
2893         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2894         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2895             "Started qla2x00_timer with "
2896             "interval=%d.\n", WATCH_INTERVAL);
2897         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2898             "Detected hba at address=%p.\n",
2899             ha);
2900
2901         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2902                 if (ha->fw_attributes & BIT_4) {
2903                         int prot = 0, guard;
2904                         base_vha->flags.difdix_supported = 1;
2905                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2906                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2907                         if (ql2xenabledif == 1)
2908                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2909                         scsi_host_set_prot(host,
2910                             prot | SHOST_DIF_TYPE1_PROTECTION
2911                             | SHOST_DIF_TYPE2_PROTECTION
2912                             | SHOST_DIF_TYPE3_PROTECTION
2913                             | SHOST_DIX_TYPE1_PROTECTION
2914                             | SHOST_DIX_TYPE2_PROTECTION
2915                             | SHOST_DIX_TYPE3_PROTECTION);
2916
2917                         guard = SHOST_DIX_GUARD_CRC;
2918
2919                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2920                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2921                                 guard |= SHOST_DIX_GUARD_IP;
2922
2923                         scsi_host_set_guard(host, guard);
2924                 } else
2925                         base_vha->flags.difdix_supported = 0;
2926         }
2927
2928         ha->isp_ops->enable_intrs(ha);
2929
2930         if (IS_QLAFX00(ha)) {
2931                 ret = qlafx00_fx_disc(base_vha,
2932                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2933                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2934                     QLA_SG_ALL : 128;
2935         }
2936
2937         ret = scsi_add_host(host, &pdev->dev);
2938         if (ret)
2939                 goto probe_failed;
2940
2941         base_vha->flags.init_done = 1;
2942         base_vha->flags.online = 1;
2943         ha->prev_minidump_failed = 0;
2944
2945         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2946             "Init done and hba is online.\n");
2947
2948         if (qla_ini_mode_enabled(base_vha))
2949                 scsi_scan_host(host);
2950         else
2951                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2952                         "skipping scsi_scan_host() for non-initiator port\n");
2953
2954         qla2x00_alloc_sysfs_attr(base_vha);
2955
2956         if (IS_QLAFX00(ha)) {
2957                 ret = qlafx00_fx_disc(base_vha,
2958                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2959
2960                 /* Register system information */
2961                 ret =  qlafx00_fx_disc(base_vha,
2962                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2963         }
2964
2965         qla2x00_init_host_attr(base_vha);
2966
2967         qla2x00_dfs_setup(base_vha);
2968
2969         ql_log(ql_log_info, base_vha, 0x00fb,
2970             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2971         ql_log(ql_log_info, base_vha, 0x00fc,
2972             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2973             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2974             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2975             base_vha->host_no,
2976             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2977
2978         qlt_add_target(ha, base_vha);
2979
2980         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2981
2982         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2983                 return -ENODEV;
2984
2985         return 0;
2986
2987 probe_init_failed:
2988         qla2x00_free_req_que(ha, req);
2989         ha->req_q_map[0] = NULL;
2990         clear_bit(0, ha->req_qid_map);
2991         qla2x00_free_rsp_que(ha, rsp);
2992         ha->rsp_q_map[0] = NULL;
2993         clear_bit(0, ha->rsp_qid_map);
2994         ha->max_req_queues = ha->max_rsp_queues = 0;
2995
2996 probe_failed:
2997         if (base_vha->timer_active)
2998                 qla2x00_stop_timer(base_vha);
2999         base_vha->flags.online = 0;
3000         if (ha->dpc_thread) {
3001                 struct task_struct *t = ha->dpc_thread;
3002
3003                 ha->dpc_thread = NULL;
3004                 kthread_stop(t);
3005         }
3006
3007         qla2x00_free_device(base_vha);
3008
3009         scsi_host_put(base_vha->host);
3010
3011 probe_hw_failed:
3012         qla2x00_clear_drv_active(ha);
3013
3014 iospace_config_failed:
3015         if (IS_P3P_TYPE(ha)) {
3016                 if (!ha->nx_pcibase)
3017                         iounmap((device_reg_t *)ha->nx_pcibase);
3018                 if (!ql2xdbwr)
3019                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3020         } else {
3021                 if (ha->iobase)
3022                         iounmap(ha->iobase);
3023                 if (ha->cregbase)
3024                         iounmap(ha->cregbase);
3025         }
3026         pci_release_selected_regions(ha->pdev, ha->bars);
3027         kfree(ha);
3028         ha = NULL;
3029
3030 disable_device:
3031         pci_disable_device(pdev);
3032         return ret;
3033 }
3034
3035 static void
3036 qla2x00_shutdown(struct pci_dev *pdev)
3037 {
3038         scsi_qla_host_t *vha;
3039         struct qla_hw_data  *ha;
3040
3041         if (!atomic_read(&pdev->enable_cnt))
3042                 return;
3043
3044         vha = pci_get_drvdata(pdev);
3045         ha = vha->hw;
3046
3047         /* Notify ISPFX00 firmware */
3048         if (IS_QLAFX00(ha))
3049                 qlafx00_driver_shutdown(vha, 20);
3050
3051         /* Turn-off FCE trace */
3052         if (ha->flags.fce_enabled) {
3053                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3054                 ha->flags.fce_enabled = 0;
3055         }
3056
3057         /* Turn-off EFT trace */
3058         if (ha->eft)
3059                 qla2x00_disable_eft_trace(vha);
3060
3061         /* Stop currently executing firmware. */
3062         qla2x00_try_to_stop_firmware(vha);
3063
3064         /* Disable timer */
3065         if (vha->timer_active)
3066                 qla2x00_stop_timer(vha);
3067
3068         /* Turn adapter off line */
3069         vha->flags.online = 0;
3070
3071         /* turn-off interrupts on the card */
3072         if (ha->interrupts_on) {
3073                 vha->flags.init_done = 0;
3074                 ha->isp_ops->disable_intrs(ha);
3075         }
3076
3077         qla2x00_free_irqs(vha);
3078
3079         qla2x00_free_fw_dump(ha);
3080
3081         pci_disable_pcie_error_reporting(pdev);
3082         pci_disable_device(pdev);
3083 }
3084
3085 /* Deletes all the virtual ports for a given ha */
3086 static void
3087 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3088 {
3089         scsi_qla_host_t *vha;
3090         unsigned long flags;
3091
3092         mutex_lock(&ha->vport_lock);
3093         while (ha->cur_vport_count) {
3094                 spin_lock_irqsave(&ha->vport_slock, flags);
3095
3096                 BUG_ON(base_vha->list.next == &ha->vp_list);
3097                 /* This assumes first entry in ha->vp_list is always base vha */
3098                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3099                 scsi_host_get(vha->host);
3100
3101                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3102                 mutex_unlock(&ha->vport_lock);
3103
3104                 fc_vport_terminate(vha->fc_vport);
3105                 scsi_host_put(vha->host);
3106
3107                 mutex_lock(&ha->vport_lock);
3108         }
3109         mutex_unlock(&ha->vport_lock);
3110 }
3111
3112 /* Stops all deferred work threads */
3113 static void
3114 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3115 {
3116         /* Flush the work queue and remove it */
3117         if (ha->wq) {
3118                 flush_workqueue(ha->wq);
3119                 destroy_workqueue(ha->wq);
3120                 ha->wq = NULL;
3121         }
3122
3123         /* Cancel all work and destroy DPC workqueues */
3124         if (ha->dpc_lp_wq) {
3125                 cancel_work_sync(&ha->idc_aen);
3126                 destroy_workqueue(ha->dpc_lp_wq);
3127                 ha->dpc_lp_wq = NULL;
3128         }
3129
3130         if (ha->dpc_hp_wq) {
3131                 cancel_work_sync(&ha->nic_core_reset);
3132                 cancel_work_sync(&ha->idc_state_handler);
3133                 cancel_work_sync(&ha->nic_core_unrecoverable);
3134                 destroy_workqueue(ha->dpc_hp_wq);
3135                 ha->dpc_hp_wq = NULL;
3136         }
3137
3138         /* Kill the kernel thread for this host */
3139         if (ha->dpc_thread) {
3140                 struct task_struct *t = ha->dpc_thread;
3141
3142                 /*
3143                  * qla2xxx_wake_dpc checks for ->dpc_thread
3144                  * so we need to zero it out.
3145                  */
3146                 ha->dpc_thread = NULL;
3147                 kthread_stop(t);
3148         }
3149 }
3150
3151 static void
3152 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3153 {
3154         if (IS_QLA82XX(ha)) {
3155
3156                 iounmap((device_reg_t *)ha->nx_pcibase);
3157                 if (!ql2xdbwr)
3158                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3159         } else {
3160                 if (ha->iobase)
3161                         iounmap(ha->iobase);
3162
3163                 if (ha->cregbase)
3164                         iounmap(ha->cregbase);
3165
3166                 if (ha->mqiobase)
3167                         iounmap(ha->mqiobase);
3168
3169                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3170                         iounmap(ha->msixbase);
3171         }
3172 }
3173
3174 static void
3175 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3176 {
3177         if (IS_QLA8044(ha)) {
3178                 qla8044_idc_lock(ha);
3179                 qla8044_clear_drv_active(ha);
3180                 qla8044_idc_unlock(ha);
3181         } else if (IS_QLA82XX(ha)) {
3182                 qla82xx_idc_lock(ha);
3183                 qla82xx_clear_drv_active(ha);
3184                 qla82xx_idc_unlock(ha);
3185         }
3186 }
3187
3188 static void
3189 qla2x00_remove_one(struct pci_dev *pdev)
3190 {
3191         scsi_qla_host_t *base_vha;
3192         struct qla_hw_data  *ha;
3193
3194         base_vha = pci_get_drvdata(pdev);
3195         ha = base_vha->hw;
3196
3197         /* Indicate device removal to prevent future board_disable and wait
3198          * until any pending board_disable has completed. */
3199         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3200         cancel_work_sync(&ha->board_disable);
3201
3202         /*
3203          * If the PCI device is disabled then there was a PCI-disconnect and
3204          * qla2x00_disable_board_on_pci_error has taken care of most of the
3205          * resources.
3206          */
3207         if (!atomic_read(&pdev->enable_cnt)) {
3208                 scsi_host_put(base_vha->host);
3209                 kfree(ha);
3210                 pci_set_drvdata(pdev, NULL);
3211                 return;
3212         }
3213
3214         qla2x00_wait_for_hba_ready(base_vha);
3215
3216         /* if UNLOAD flag is already set, then continue unload,
3217          * where it was set first.
3218          */
3219         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3220                 return;
3221
3222         set_bit(UNLOADING, &base_vha->dpc_flags);
3223
3224         if (IS_QLAFX00(ha))
3225                 qlafx00_driver_shutdown(base_vha, 20);
3226
3227         qla2x00_delete_all_vps(ha, base_vha);
3228
3229         if (IS_QLA8031(ha)) {
3230                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3231                     "Clearing fcoe driver presence.\n");
3232                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3233                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3234                             "Error while clearing DRV-Presence.\n");
3235         }
3236
3237         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3238
3239         qla2x00_dfs_remove(base_vha);
3240
3241         qla84xx_put_chip(base_vha);
3242
3243         /* Laser should be disabled only for ISP2031 */
3244         if (IS_QLA2031(ha))
3245                 qla83xx_disable_laser(base_vha);
3246
3247         /* Disable timer */
3248         if (base_vha->timer_active)
3249                 qla2x00_stop_timer(base_vha);
3250
3251         base_vha->flags.online = 0;
3252
3253         /* free DMA memory */
3254         if (ha->exlogin_buf)
3255                 qla2x00_free_exlogin_buffer(ha);
3256
3257         /* free DMA memory */
3258         if (ha->exchoffld_buf)
3259                 qla2x00_free_exchoffld_buffer(ha);
3260
3261         qla2x00_destroy_deferred_work(ha);
3262
3263         qlt_remove_target(ha, base_vha);
3264
3265         qla2x00_free_sysfs_attr(base_vha, true);
3266
3267         fc_remove_host(base_vha->host);
3268
3269         scsi_remove_host(base_vha->host);
3270
3271         qla2x00_free_device(base_vha);
3272
3273         qla2x00_clear_drv_active(ha);
3274
3275         scsi_host_put(base_vha->host);
3276
3277         qla2x00_unmap_iobases(ha);
3278
3279         pci_release_selected_regions(ha->pdev, ha->bars);
3280         kfree(ha);
3281         ha = NULL;
3282
3283         pci_disable_pcie_error_reporting(pdev);
3284
3285         pci_disable_device(pdev);
3286 }
3287
3288 static void
3289 qla2x00_free_device(scsi_qla_host_t *vha)
3290 {
3291         struct qla_hw_data *ha = vha->hw;
3292
3293         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3294
3295         /* Disable timer */
3296         if (vha->timer_active)
3297                 qla2x00_stop_timer(vha);
3298
3299         qla25xx_delete_queues(vha);
3300
3301         if (ha->flags.fce_enabled)
3302                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3303
3304         if (ha->eft)
3305                 qla2x00_disable_eft_trace(vha);
3306
3307         /* Stop currently executing firmware. */
3308         qla2x00_try_to_stop_firmware(vha);
3309
3310         vha->flags.online = 0;
3311
3312         /* turn-off interrupts on the card */
3313         if (ha->interrupts_on) {
3314                 vha->flags.init_done = 0;
3315                 ha->isp_ops->disable_intrs(ha);
3316         }
3317
3318         qla2x00_free_irqs(vha);
3319
3320         qla2x00_free_fcports(vha);
3321
3322         qla2x00_mem_free(ha);
3323
3324         qla82xx_md_free(vha);
3325
3326         qla2x00_free_queues(ha);
3327 }
3328
3329 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3330 {
3331         fc_port_t *fcport, *tfcport;
3332
3333         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3334                 list_del(&fcport->list);
3335                 qla2x00_clear_loop_id(fcport);
3336                 kfree(fcport);
3337                 fcport = NULL;
3338         }
3339 }
3340
3341 static inline void
3342 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3343     int defer)
3344 {
3345         struct fc_rport *rport;
3346         scsi_qla_host_t *base_vha;
3347         unsigned long flags;
3348
3349         if (!fcport->rport)
3350                 return;
3351
3352         rport = fcport->rport;
3353         if (defer) {
3354                 base_vha = pci_get_drvdata(vha->hw->pdev);
3355                 spin_lock_irqsave(vha->host->host_lock, flags);
3356                 fcport->drport = rport;
3357                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3358                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3359                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3360                 qla2xxx_wake_dpc(base_vha);
3361         } else {
3362                 int now;
3363                 if (rport)
3364                         fc_remote_port_delete(rport);
3365                 qlt_do_generation_tick(vha, &now);
3366                 qlt_fc_port_deleted(vha, fcport, now);
3367         }
3368 }
3369
3370 /*
3371  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3372  *
3373  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3374  *
3375  * Return: None.
3376  *
3377  * Context:
3378  */
3379 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3380     int do_login, int defer)
3381 {
3382         if (IS_QLAFX00(vha->hw)) {
3383                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3384                 qla2x00_schedule_rport_del(vha, fcport, defer);
3385                 return;
3386         }
3387
3388         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3389             vha->vp_idx == fcport->vha->vp_idx) {
3390                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3391                 qla2x00_schedule_rport_del(vha, fcport, defer);
3392         }
3393         /*
3394          * We may need to retry the login, so don't change the state of the
3395          * port but do the retries.
3396          */
3397         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3398                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3399
3400         if (!do_login)
3401                 return;
3402
3403         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3404
3405         if (fcport->login_retry == 0) {
3406                 fcport->login_retry = vha->hw->login_retry_count;
3407
3408                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3409                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3410                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3411         }
3412 }
3413
3414 /*
3415  * qla2x00_mark_all_devices_lost
3416  *      Updates fcport state when device goes offline.
3417  *
3418  * Input:
3419  *      ha = adapter block pointer.
3420  *      fcport = port structure pointer.
3421  *
3422  * Return:
3423  *      None.
3424  *
3425  * Context:
3426  */
3427 void
3428 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3429 {
3430         fc_port_t *fcport;
3431
3432         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3433                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3434                         continue;
3435
3436                 /*
3437                  * No point in marking the device as lost, if the device is
3438                  * already DEAD.
3439                  */
3440                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3441                         continue;
3442                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3443                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3444                         if (defer)
3445                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3446                         else if (vha->vp_idx == fcport->vha->vp_idx)
3447                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3448                 }
3449         }
3450 }
3451
3452 /*
3453 * qla2x00_mem_alloc
3454 *      Allocates adapter memory.
3455 *
3456 * Returns:
3457 *      0  = success.
3458 *      !0  = failure.
3459 */
3460 static int
3461 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3462         struct req_que **req, struct rsp_que **rsp)
3463 {
3464         char    name[16];
3465
3466         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3467                 &ha->init_cb_dma, GFP_KERNEL);
3468         if (!ha->init_cb)
3469                 goto fail;
3470
3471         if (qlt_mem_alloc(ha) < 0)
3472                 goto fail_free_init_cb;
3473
3474         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3475                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3476         if (!ha->gid_list)
3477                 goto fail_free_tgt_mem;
3478
3479         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3480         if (!ha->srb_mempool)
3481                 goto fail_free_gid_list;
3482
3483         if (IS_P3P_TYPE(ha)) {
3484                 /* Allocate cache for CT6 Ctx. */
3485                 if (!ctx_cachep) {
3486                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3487                                 sizeof(struct ct6_dsd), 0,
3488                                 SLAB_HWCACHE_ALIGN, NULL);
3489                         if (!ctx_cachep)
3490                                 goto fail_free_srb_mempool;
3491                 }
3492                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3493                         ctx_cachep);
3494                 if (!ha->ctx_mempool)
3495                         goto fail_free_srb_mempool;
3496                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3497                     "ctx_cachep=%p ctx_mempool=%p.\n",
3498                     ctx_cachep, ha->ctx_mempool);
3499         }
3500
3501         /* Get memory for cached NVRAM */
3502         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3503         if (!ha->nvram)
3504                 goto fail_free_ctx_mempool;
3505
3506         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3507                 ha->pdev->device);
3508         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3509                 DMA_POOL_SIZE, 8, 0);
3510         if (!ha->s_dma_pool)
3511                 goto fail_free_nvram;
3512
3513         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3514             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3515             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3516
3517         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3518                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3519                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3520                 if (!ha->dl_dma_pool) {
3521                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3522                             "Failed to allocate memory for dl_dma_pool.\n");
3523                         goto fail_s_dma_pool;
3524                 }
3525
3526                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3527                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3528                 if (!ha->fcp_cmnd_dma_pool) {
3529                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3530                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3531                         goto fail_dl_dma_pool;
3532                 }
3533                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3534                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3535                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3536         }
3537
3538         /* Allocate memory for SNS commands */
3539         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3540         /* Get consistent memory allocated for SNS commands */
3541                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3542                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3543                 if (!ha->sns_cmd)
3544                         goto fail_dma_pool;
3545                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3546                     "sns_cmd: %p.\n", ha->sns_cmd);
3547         } else {
3548         /* Get consistent memory allocated for MS IOCB */
3549                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3550                         &ha->ms_iocb_dma);
3551                 if (!ha->ms_iocb)
3552                         goto fail_dma_pool;
3553         /* Get consistent memory allocated for CT SNS commands */
3554                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3555                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3556                 if (!ha->ct_sns)
3557                         goto fail_free_ms_iocb;
3558                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3559                     "ms_iocb=%p ct_sns=%p.\n",
3560                     ha->ms_iocb, ha->ct_sns);
3561         }
3562
3563         /* Allocate memory for request ring */
3564         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3565         if (!*req) {
3566                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3567                     "Failed to allocate memory for req.\n");
3568                 goto fail_req;
3569         }
3570         (*req)->length = req_len;
3571         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3572                 ((*req)->length + 1) * sizeof(request_t),
3573                 &(*req)->dma, GFP_KERNEL);
3574         if (!(*req)->ring) {
3575                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3576                     "Failed to allocate memory for req_ring.\n");
3577                 goto fail_req_ring;
3578         }
3579         /* Allocate memory for response ring */
3580         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3581         if (!*rsp) {
3582                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3583                     "Failed to allocate memory for rsp.\n");
3584                 goto fail_rsp;
3585         }
3586         (*rsp)->hw = ha;
3587         (*rsp)->length = rsp_len;
3588         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3589                 ((*rsp)->length + 1) * sizeof(response_t),
3590                 &(*rsp)->dma, GFP_KERNEL);
3591         if (!(*rsp)->ring) {
3592                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3593                     "Failed to allocate memory for rsp_ring.\n");
3594                 goto fail_rsp_ring;
3595         }
3596         (*req)->rsp = *rsp;
3597         (*rsp)->req = *req;
3598         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3599             "req=%p req->length=%d req->ring=%p rsp=%p "
3600             "rsp->length=%d rsp->ring=%p.\n",
3601             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3602             (*rsp)->ring);
3603         /* Allocate memory for NVRAM data for vports */
3604         if (ha->nvram_npiv_size) {
3605                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3606                     ha->nvram_npiv_size, GFP_KERNEL);
3607                 if (!ha->npiv_info) {
3608                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3609                             "Failed to allocate memory for npiv_info.\n");
3610                         goto fail_npiv_info;
3611                 }
3612         } else
3613                 ha->npiv_info = NULL;
3614
3615         /* Get consistent memory allocated for EX-INIT-CB. */
3616         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3617                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3618                     &ha->ex_init_cb_dma);
3619                 if (!ha->ex_init_cb)
3620                         goto fail_ex_init_cb;
3621                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3622                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3623         }
3624
3625         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3626
3627         /* Get consistent memory allocated for Async Port-Database. */
3628         if (!IS_FWI2_CAPABLE(ha)) {
3629                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3630                         &ha->async_pd_dma);
3631                 if (!ha->async_pd)
3632                         goto fail_async_pd;
3633                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3634                     "async_pd=%p.\n", ha->async_pd);
3635         }
3636
3637         INIT_LIST_HEAD(&ha->vp_list);
3638
3639         /* Allocate memory for our loop_id bitmap */
3640         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3641             GFP_KERNEL);
3642         if (!ha->loop_id_map)
3643                 goto fail_loop_id_map;
3644         else {
3645                 qla2x00_set_reserved_loop_ids(ha);
3646                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3647                     "loop_id_map=%p.\n", ha->loop_id_map);
3648         }
3649
3650         return 0;
3651
3652 fail_loop_id_map:
3653         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3654 fail_async_pd:
3655         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3656 fail_ex_init_cb:
3657         kfree(ha->npiv_info);
3658 fail_npiv_info:
3659         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3660                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3661         (*rsp)->ring = NULL;
3662         (*rsp)->dma = 0;
3663 fail_rsp_ring:
3664         kfree(*rsp);
3665 fail_rsp:
3666         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3667                 sizeof(request_t), (*req)->ring, (*req)->dma);
3668         (*req)->ring = NULL;
3669         (*req)->dma = 0;
3670 fail_req_ring:
3671         kfree(*req);
3672 fail_req:
3673         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3674                 ha->ct_sns, ha->ct_sns_dma);
3675         ha->ct_sns = NULL;
3676         ha->ct_sns_dma = 0;
3677 fail_free_ms_iocb:
3678         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3679         ha->ms_iocb = NULL;
3680         ha->ms_iocb_dma = 0;
3681
3682         if (ha->sns_cmd)
3683                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3684                     ha->sns_cmd, ha->sns_cmd_dma);
3685 fail_dma_pool:
3686         if (IS_QLA82XX(ha) || ql2xenabledif) {
3687                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3688                 ha->fcp_cmnd_dma_pool = NULL;
3689         }
3690 fail_dl_dma_pool:
3691         if (IS_QLA82XX(ha) || ql2xenabledif) {
3692                 dma_pool_destroy(ha->dl_dma_pool);
3693                 ha->dl_dma_pool = NULL;
3694         }
3695 fail_s_dma_pool:
3696         dma_pool_destroy(ha->s_dma_pool);
3697         ha->s_dma_pool = NULL;
3698 fail_free_nvram:
3699         kfree(ha->nvram);
3700         ha->nvram = NULL;
3701 fail_free_ctx_mempool:
3702         if (ha->ctx_mempool)
3703                 mempool_destroy(ha->ctx_mempool);
3704         ha->ctx_mempool = NULL;
3705 fail_free_srb_mempool:
3706         if (ha->srb_mempool)
3707                 mempool_destroy(ha->srb_mempool);
3708         ha->srb_mempool = NULL;
3709 fail_free_gid_list:
3710         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3711         ha->gid_list,
3712         ha->gid_list_dma);
3713         ha->gid_list = NULL;
3714         ha->gid_list_dma = 0;
3715 fail_free_tgt_mem:
3716         qlt_mem_free(ha);
3717 fail_free_init_cb:
3718         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3719         ha->init_cb_dma);
3720         ha->init_cb = NULL;
3721         ha->init_cb_dma = 0;
3722 fail:
3723         ql_log(ql_log_fatal, NULL, 0x0030,
3724             "Memory allocation failure.\n");
3725         return -ENOMEM;
3726 }
3727
3728 int
3729 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
3730 {
3731         int rval;
3732         uint16_t        size, max_cnt, temp;
3733         struct qla_hw_data *ha = vha->hw;
3734
3735         /* Return if we don't need to alloacate any extended logins */
3736         if (!ql2xexlogins)
3737                 return QLA_SUCCESS;
3738
3739         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
3740         max_cnt = 0;
3741         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
3742         if (rval != QLA_SUCCESS) {
3743                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
3744                     "Failed to get exlogin status.\n");
3745                 return rval;
3746         }
3747
3748         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
3749         ha->exlogin_size = (size * temp);
3750         ql_log(ql_log_info, vha, 0xd024,
3751                 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
3752                 max_cnt, size, temp);
3753
3754         ql_log(ql_log_info, vha, 0xd025, "EXLOGIN: requested size=0x%x\n",
3755                 ha->exlogin_size);
3756
3757         /* Get consistent memory for extended logins */
3758         ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
3759             ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
3760         if (!ha->exlogin_buf) {
3761                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
3762                     "Failed to allocate memory for exlogin_buf_dma.\n");
3763                 return -ENOMEM;
3764         }
3765
3766         /* Now configure the dma buffer */
3767         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
3768         if (rval) {
3769                 ql_log(ql_log_fatal, vha, 0x00cf,
3770                     "Setup extended login buffer  ****FAILED****.\n");
3771                 qla2x00_free_exlogin_buffer(ha);
3772         }
3773
3774         return rval;
3775 }
3776
3777 /*
3778 * qla2x00_free_exlogin_buffer
3779 *
3780 * Input:
3781 *       ha = adapter block pointer
3782 */
3783 void
3784 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
3785 {
3786         if (ha->exlogin_buf) {
3787                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
3788                     ha->exlogin_buf, ha->exlogin_buf_dma);
3789                 ha->exlogin_buf = NULL;
3790                 ha->exlogin_size = 0;
3791         }
3792 }
3793
3794 int
3795 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
3796 {
3797         int rval;
3798         uint16_t        size, max_cnt, temp;
3799         struct qla_hw_data *ha = vha->hw;
3800
3801         /* Return if we don't need to alloacate any extended logins */
3802         if (!ql2xexchoffld)
3803                 return QLA_SUCCESS;
3804
3805         ql_log(ql_log_info, vha, 0xd014,
3806             "Exchange offload count: %d.\n", ql2xexlogins);
3807
3808         max_cnt = 0;
3809         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
3810         if (rval != QLA_SUCCESS) {
3811                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
3812                     "Failed to get exlogin status.\n");
3813                 return rval;
3814         }
3815
3816         temp = (ql2xexchoffld > max_cnt) ? max_cnt : ql2xexchoffld;
3817         ha->exchoffld_size = (size * temp);
3818         ql_log(ql_log_info, vha, 0xd016,
3819                 "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
3820                 max_cnt, size, temp);
3821
3822         ql_log(ql_log_info, vha, 0xd017,
3823             "Exchange Buffers requested size = 0x%x\n", ha->exchoffld_size);
3824
3825         /* Get consistent memory for extended logins */
3826         ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
3827             ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
3828         if (!ha->exchoffld_buf) {
3829                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
3830                     "Failed to allocate memory for exchoffld_buf_dma.\n");
3831                 return -ENOMEM;
3832         }
3833
3834         /* Now configure the dma buffer */
3835         rval = qla_set_exchoffld_mem_cfg(vha, ha->exchoffld_buf_dma);
3836         if (rval) {
3837                 ql_log(ql_log_fatal, vha, 0xd02e,
3838                     "Setup exchange offload buffer ****FAILED****.\n");
3839                 qla2x00_free_exchoffld_buffer(ha);
3840         }
3841
3842         return rval;
3843 }
3844
3845 /*
3846 * qla2x00_free_exchoffld_buffer
3847 *
3848 * Input:
3849 *       ha = adapter block pointer
3850 */
3851 void
3852 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
3853 {
3854         if (ha->exchoffld_buf) {
3855                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
3856                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
3857                 ha->exchoffld_buf = NULL;
3858                 ha->exchoffld_size = 0;
3859         }
3860 }
3861
3862 /*
3863 * qla2x00_free_fw_dump
3864 *       Frees fw dump stuff.
3865 *
3866 * Input:
3867 *       ha = adapter block pointer
3868 */
3869 static void
3870 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3871 {
3872         if (ha->fce)
3873                 dma_free_coherent(&ha->pdev->dev,
3874                     FCE_SIZE, ha->fce, ha->fce_dma);
3875
3876         if (ha->eft)
3877                 dma_free_coherent(&ha->pdev->dev,
3878                     EFT_SIZE, ha->eft, ha->eft_dma);
3879
3880         if (ha->fw_dump)
3881                 vfree(ha->fw_dump);
3882         if (ha->fw_dump_template)
3883                 vfree(ha->fw_dump_template);
3884
3885         ha->fce = NULL;
3886         ha->fce_dma = 0;
3887         ha->eft = NULL;
3888         ha->eft_dma = 0;
3889         ha->fw_dumped = 0;
3890         ha->fw_dump_cap_flags = 0;
3891         ha->fw_dump_reading = 0;
3892         ha->fw_dump = NULL;
3893         ha->fw_dump_len = 0;
3894         ha->fw_dump_template = NULL;
3895         ha->fw_dump_template_len = 0;
3896 }
3897
3898 /*
3899 * qla2x00_mem_free
3900 *      Frees all adapter allocated memory.
3901 *
3902 * Input:
3903 *      ha = adapter block pointer.
3904 */
3905 static void
3906 qla2x00_mem_free(struct qla_hw_data *ha)
3907 {
3908         qla2x00_free_fw_dump(ha);
3909
3910         if (ha->mctp_dump)
3911                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3912                     ha->mctp_dump_dma);
3913
3914         if (ha->srb_mempool)
3915                 mempool_destroy(ha->srb_mempool);
3916
3917         if (ha->dcbx_tlv)
3918                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3919                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3920
3921         if (ha->xgmac_data)
3922                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3923                     ha->xgmac_data, ha->xgmac_data_dma);
3924
3925         if (ha->sns_cmd)
3926                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3927                 ha->sns_cmd, ha->sns_cmd_dma);
3928
3929         if (ha->ct_sns)
3930                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3931                 ha->ct_sns, ha->ct_sns_dma);
3932
3933         if (ha->sfp_data)
3934                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3935
3936         if (ha->ms_iocb)
3937                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3938
3939         if (ha->ex_init_cb)
3940                 dma_pool_free(ha->s_dma_pool,
3941                         ha->ex_init_cb, ha->ex_init_cb_dma);
3942
3943         if (ha->async_pd)
3944                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3945
3946         if (ha->s_dma_pool)
3947                 dma_pool_destroy(ha->s_dma_pool);
3948
3949         if (ha->gid_list)
3950                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3951                 ha->gid_list, ha->gid_list_dma);
3952
3953         if (IS_QLA82XX(ha)) {
3954                 if (!list_empty(&ha->gbl_dsd_list)) {
3955                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3956
3957                         /* clean up allocated prev pool */
3958                         list_for_each_entry_safe(dsd_ptr,
3959                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3960                                 dma_pool_free(ha->dl_dma_pool,
3961                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3962                                 list_del(&dsd_ptr->list);
3963                                 kfree(dsd_ptr);
3964                         }
3965                 }
3966         }
3967
3968         if (ha->dl_dma_pool)
3969                 dma_pool_destroy(ha->dl_dma_pool);
3970
3971         if (ha->fcp_cmnd_dma_pool)
3972                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3973
3974         if (ha->ctx_mempool)
3975                 mempool_destroy(ha->ctx_mempool);
3976
3977         qlt_mem_free(ha);
3978
3979         if (ha->init_cb)
3980                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3981                         ha->init_cb, ha->init_cb_dma);
3982         vfree(ha->optrom_buffer);
3983         kfree(ha->nvram);
3984         kfree(ha->npiv_info);
3985         kfree(ha->swl);
3986         kfree(ha->loop_id_map);
3987
3988         ha->srb_mempool = NULL;
3989         ha->ctx_mempool = NULL;
3990         ha->sns_cmd = NULL;
3991         ha->sns_cmd_dma = 0;
3992         ha->ct_sns = NULL;
3993         ha->ct_sns_dma = 0;
3994         ha->ms_iocb = NULL;
3995         ha->ms_iocb_dma = 0;
3996         ha->init_cb = NULL;
3997         ha->init_cb_dma = 0;
3998         ha->ex_init_cb = NULL;
3999         ha->ex_init_cb_dma = 0;
4000         ha->async_pd = NULL;
4001         ha->async_pd_dma = 0;
4002
4003         ha->s_dma_pool = NULL;
4004         ha->dl_dma_pool = NULL;
4005         ha->fcp_cmnd_dma_pool = NULL;
4006
4007         ha->gid_list = NULL;
4008         ha->gid_list_dma = 0;
4009
4010         ha->tgt.atio_ring = NULL;
4011         ha->tgt.atio_dma = 0;
4012         ha->tgt.tgt_vp_map = NULL;
4013 }
4014
4015 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4016                                                 struct qla_hw_data *ha)
4017 {
4018         struct Scsi_Host *host;
4019         struct scsi_qla_host *vha = NULL;
4020
4021         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4022         if (host == NULL) {
4023                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4024                     "Failed to allocate host from the scsi layer, aborting.\n");
4025                 goto fail;
4026         }
4027
4028         /* Clear our data area */
4029         vha = shost_priv(host);
4030         memset(vha, 0, sizeof(scsi_qla_host_t));
4031
4032         vha->host = host;
4033         vha->host_no = host->host_no;
4034         vha->hw = ha;
4035
4036         INIT_LIST_HEAD(&vha->vp_fcports);
4037         INIT_LIST_HEAD(&vha->work_list);
4038         INIT_LIST_HEAD(&vha->list);
4039         INIT_LIST_HEAD(&vha->qla_cmd_list);
4040         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4041         INIT_LIST_HEAD(&vha->logo_list);
4042         INIT_LIST_HEAD(&vha->plogi_ack_list);
4043
4044         spin_lock_init(&vha->work_lock);
4045         spin_lock_init(&vha->cmd_list_lock);
4046         init_waitqueue_head(&vha->vref_waitq);
4047
4048         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4049         ql_dbg(ql_dbg_init, vha, 0x0041,
4050             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4051             vha->host, vha->hw, vha,
4052             dev_name(&(ha->pdev->dev)));
4053
4054         return vha;
4055
4056 fail:
4057         return vha;
4058 }
4059
4060 static struct qla_work_evt *
4061 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4062 {
4063         struct qla_work_evt *e;
4064         uint8_t bail;
4065
4066         QLA_VHA_MARK_BUSY(vha, bail);
4067         if (bail)
4068                 return NULL;
4069
4070         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4071         if (!e) {
4072                 QLA_VHA_MARK_NOT_BUSY(vha);
4073                 return NULL;
4074         }
4075
4076         INIT_LIST_HEAD(&e->list);
4077         e->type = type;
4078         e->flags = QLA_EVT_FLAG_FREE;
4079         return e;
4080 }
4081
4082 static int
4083 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4084 {
4085         unsigned long flags;
4086
4087         spin_lock_irqsave(&vha->work_lock, flags);
4088         list_add_tail(&e->list, &vha->work_list);
4089         spin_unlock_irqrestore(&vha->work_lock, flags);
4090         qla2xxx_wake_dpc(vha);
4091
4092         return QLA_SUCCESS;
4093 }
4094
4095 int
4096 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4097     u32 data)
4098 {
4099         struct qla_work_evt *e;
4100
4101         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4102         if (!e)
4103                 return QLA_FUNCTION_FAILED;
4104
4105         e->u.aen.code = code;
4106         e->u.aen.data = data;
4107         return qla2x00_post_work(vha, e);
4108 }
4109
4110 int
4111 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4112 {
4113         struct qla_work_evt *e;
4114
4115         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4116         if (!e)
4117                 return QLA_FUNCTION_FAILED;
4118
4119         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4120         return qla2x00_post_work(vha, e);
4121 }
4122
4123 #define qla2x00_post_async_work(name, type)     \
4124 int qla2x00_post_async_##name##_work(           \
4125     struct scsi_qla_host *vha,                  \
4126     fc_port_t *fcport, uint16_t *data)          \
4127 {                                               \
4128         struct qla_work_evt *e;                 \
4129                                                 \
4130         e = qla2x00_alloc_work(vha, type);      \
4131         if (!e)                                 \
4132                 return QLA_FUNCTION_FAILED;     \
4133                                                 \
4134         e->u.logio.fcport = fcport;             \
4135         if (data) {                             \
4136                 e->u.logio.data[0] = data[0];   \
4137                 e->u.logio.data[1] = data[1];   \
4138         }                                       \
4139         return qla2x00_post_work(vha, e);       \
4140 }
4141
4142 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4143 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
4144 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4145 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4146 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4147 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4148
4149 int
4150 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4151 {
4152         struct qla_work_evt *e;
4153
4154         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4155         if (!e)
4156                 return QLA_FUNCTION_FAILED;
4157
4158         e->u.uevent.code = code;
4159         return qla2x00_post_work(vha, e);
4160 }
4161
4162 static void
4163 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4164 {
4165         char event_string[40];
4166         char *envp[] = { event_string, NULL };
4167
4168         switch (code) {
4169         case QLA_UEVENT_CODE_FW_DUMP:
4170                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4171                     vha->host_no);
4172                 break;
4173         default:
4174                 /* do nothing */
4175                 break;
4176         }
4177         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4178 }
4179
4180 int
4181 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4182                         uint32_t *data, int cnt)
4183 {
4184         struct qla_work_evt *e;
4185
4186         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4187         if (!e)
4188                 return QLA_FUNCTION_FAILED;
4189
4190         e->u.aenfx.evtcode = evtcode;
4191         e->u.aenfx.count = cnt;
4192         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4193         return qla2x00_post_work(vha, e);
4194 }
4195
4196 void
4197 qla2x00_do_work(struct scsi_qla_host *vha)
4198 {
4199         struct qla_work_evt *e, *tmp;
4200         unsigned long flags;
4201         LIST_HEAD(work);
4202
4203         spin_lock_irqsave(&vha->work_lock, flags);
4204         list_splice_init(&vha->work_list, &work);
4205         spin_unlock_irqrestore(&vha->work_lock, flags);
4206
4207         list_for_each_entry_safe(e, tmp, &work, list) {
4208                 list_del_init(&e->list);
4209
4210                 switch (e->type) {
4211                 case QLA_EVT_AEN:
4212                         fc_host_post_event(vha->host, fc_get_event_number(),
4213                             e->u.aen.code, e->u.aen.data);
4214                         break;
4215                 case QLA_EVT_IDC_ACK:
4216                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4217                         break;
4218                 case QLA_EVT_ASYNC_LOGIN:
4219                         qla2x00_async_login(vha, e->u.logio.fcport,
4220                             e->u.logio.data);
4221                         break;
4222                 case QLA_EVT_ASYNC_LOGIN_DONE:
4223                         qla2x00_async_login_done(vha, e->u.logio.fcport,
4224                             e->u.logio.data);
4225                         break;
4226                 case QLA_EVT_ASYNC_LOGOUT:
4227                         qla2x00_async_logout(vha, e->u.logio.fcport);
4228                         break;
4229                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4230                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4231                             e->u.logio.data);
4232                         break;
4233                 case QLA_EVT_ASYNC_ADISC:
4234                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4235                             e->u.logio.data);
4236                         break;
4237                 case QLA_EVT_ASYNC_ADISC_DONE:
4238                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4239                             e->u.logio.data);
4240                         break;
4241                 case QLA_EVT_UEVENT:
4242                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4243                         break;
4244                 case QLA_EVT_AENFX:
4245                         qlafx00_process_aen(vha, e);
4246                         break;
4247                 }
4248                 if (e->flags & QLA_EVT_FLAG_FREE)
4249                         kfree(e);
4250
4251                 /* For each work completed decrement vha ref count */
4252                 QLA_VHA_MARK_NOT_BUSY(vha);
4253         }
4254 }
4255
4256 /* Relogins all the fcports of a vport
4257  * Context: dpc thread
4258  */
4259 void qla2x00_relogin(struct scsi_qla_host *vha)
4260 {
4261         fc_port_t       *fcport;
4262         int status;
4263         uint16_t        next_loopid = 0;
4264         struct qla_hw_data *ha = vha->hw;
4265         uint16_t data[2];
4266
4267         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4268         /*
4269          * If the port is not ONLINE then try to login
4270          * to it if we haven't run out of retries.
4271          */
4272                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4273                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4274                         fcport->login_retry--;
4275                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4276                                 if (fcport->flags & FCF_FCP2_DEVICE)
4277                                         ha->isp_ops->fabric_logout(vha,
4278                                                         fcport->loop_id,
4279                                                         fcport->d_id.b.domain,
4280                                                         fcport->d_id.b.area,
4281                                                         fcport->d_id.b.al_pa);
4282
4283                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4284                                         fcport->loop_id = next_loopid =
4285                                             ha->min_external_loopid;
4286                                         status = qla2x00_find_new_loop_id(
4287                                             vha, fcport);
4288                                         if (status != QLA_SUCCESS) {
4289                                                 /* Ran out of IDs to use */
4290                                                 break;
4291                                         }
4292                                 }
4293
4294                                 if (IS_ALOGIO_CAPABLE(ha)) {
4295                                         fcport->flags |= FCF_ASYNC_SENT;
4296                                         data[0] = 0;
4297                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4298                                         status = qla2x00_post_async_login_work(
4299                                             vha, fcport, data);
4300                                         if (status == QLA_SUCCESS)
4301                                                 continue;
4302                                         /* Attempt a retry. */
4303                                         status = 1;
4304                                 } else {
4305                                         status = qla2x00_fabric_login(vha,
4306                                             fcport, &next_loopid);
4307                                         if (status ==  QLA_SUCCESS) {
4308                                                 int status2;
4309                                                 uint8_t opts;
4310
4311                                                 opts = 0;
4312                                                 if (fcport->flags &
4313                                                     FCF_FCP2_DEVICE)
4314                                                         opts |= BIT_1;
4315                                                 status2 =
4316                                                     qla2x00_get_port_database(
4317                                                         vha, fcport, opts);
4318                                                 if (status2 != QLA_SUCCESS)
4319                                                         status = 1;
4320                                         }
4321                                 }
4322                         } else
4323                                 status = qla2x00_local_device_login(vha,
4324                                                                 fcport);
4325
4326                         if (status == QLA_SUCCESS) {
4327                                 fcport->old_loop_id = fcport->loop_id;
4328
4329                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4330                                     "Port login OK: logged in ID 0x%x.\n",
4331                                     fcport->loop_id);
4332
4333                                 qla2x00_update_fcport(vha, fcport);
4334
4335                         } else if (status == 1) {
4336                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4337                                 /* retry the login again */
4338                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4339                                     "Retrying %d login again loop_id 0x%x.\n",
4340                                     fcport->login_retry, fcport->loop_id);
4341                         } else {
4342                                 fcport->login_retry = 0;
4343                         }
4344
4345                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4346                                 qla2x00_clear_loop_id(fcport);
4347                 }
4348                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4349                         break;
4350         }
4351 }
4352
4353 /* Schedule work on any of the dpc-workqueues */
4354 void
4355 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4356 {
4357         struct qla_hw_data *ha = base_vha->hw;
4358
4359         switch (work_code) {
4360         case MBA_IDC_AEN: /* 0x8200 */
4361                 if (ha->dpc_lp_wq)
4362                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4363                 break;
4364
4365         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4366                 if (!ha->flags.nic_core_reset_hdlr_active) {
4367                         if (ha->dpc_hp_wq)
4368                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4369                 } else
4370                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4371                             "NIC Core reset is already active. Skip "
4372                             "scheduling it again.\n");
4373                 break;
4374         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4375                 if (ha->dpc_hp_wq)
4376                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4377                 break;
4378         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4379                 if (ha->dpc_hp_wq)
4380                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4381                 break;
4382         default:
4383                 ql_log(ql_log_warn, base_vha, 0xb05f,
4384                     "Unknown work-code=0x%x.\n", work_code);
4385         }
4386
4387         return;
4388 }
4389
4390 /* Work: Perform NIC Core Unrecoverable state handling */
4391 void
4392 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4393 {
4394         struct qla_hw_data *ha =
4395                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4396         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4397         uint32_t dev_state = 0;
4398
4399         qla83xx_idc_lock(base_vha, 0);
4400         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4401         qla83xx_reset_ownership(base_vha);
4402         if (ha->flags.nic_core_reset_owner) {
4403                 ha->flags.nic_core_reset_owner = 0;
4404                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4405                     QLA8XXX_DEV_FAILED);
4406                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4407                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4408         }
4409         qla83xx_idc_unlock(base_vha, 0);
4410 }
4411
4412 /* Work: Execute IDC state handler */
4413 void
4414 qla83xx_idc_state_handler_work(struct work_struct *work)
4415 {
4416         struct qla_hw_data *ha =
4417                 container_of(work, struct qla_hw_data, idc_state_handler);
4418         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4419         uint32_t dev_state = 0;
4420
4421         qla83xx_idc_lock(base_vha, 0);
4422         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4423         if (dev_state == QLA8XXX_DEV_FAILED ||
4424                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4425                 qla83xx_idc_state_handler(base_vha);
4426         qla83xx_idc_unlock(base_vha, 0);
4427 }
4428
4429 static int
4430 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4431 {
4432         int rval = QLA_SUCCESS;
4433         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4434         uint32_t heart_beat_counter1, heart_beat_counter2;
4435
4436         do {
4437                 if (time_after(jiffies, heart_beat_wait)) {
4438                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4439                             "Nic Core f/w is not alive.\n");
4440                         rval = QLA_FUNCTION_FAILED;
4441                         break;
4442                 }
4443
4444                 qla83xx_idc_lock(base_vha, 0);
4445                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4446                     &heart_beat_counter1);
4447                 qla83xx_idc_unlock(base_vha, 0);
4448                 msleep(100);
4449                 qla83xx_idc_lock(base_vha, 0);
4450                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4451                     &heart_beat_counter2);
4452                 qla83xx_idc_unlock(base_vha, 0);
4453         } while (heart_beat_counter1 == heart_beat_counter2);
4454
4455         return rval;
4456 }
4457
4458 /* Work: Perform NIC Core Reset handling */
4459 void
4460 qla83xx_nic_core_reset_work(struct work_struct *work)
4461 {
4462         struct qla_hw_data *ha =
4463                 container_of(work, struct qla_hw_data, nic_core_reset);
4464         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4465         uint32_t dev_state = 0;
4466
4467         if (IS_QLA2031(ha)) {
4468                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4469                         ql_log(ql_log_warn, base_vha, 0xb081,
4470                             "Failed to dump mctp\n");
4471                 return;
4472         }
4473
4474         if (!ha->flags.nic_core_reset_hdlr_active) {
4475                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4476                         qla83xx_idc_lock(base_vha, 0);
4477                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4478                             &dev_state);
4479                         qla83xx_idc_unlock(base_vha, 0);
4480                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4481                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4482                                     "Nic Core f/w is alive.\n");
4483                                 return;
4484                         }
4485                 }
4486
4487                 ha->flags.nic_core_reset_hdlr_active = 1;
4488                 if (qla83xx_nic_core_reset(base_vha)) {
4489                         /* NIC Core reset failed. */
4490                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4491                             "NIC Core reset failed.\n");
4492                 }
4493                 ha->flags.nic_core_reset_hdlr_active = 0;
4494         }
4495 }
4496
4497 /* Work: Handle 8200 IDC aens */
4498 void
4499 qla83xx_service_idc_aen(struct work_struct *work)
4500 {
4501         struct qla_hw_data *ha =
4502                 container_of(work, struct qla_hw_data, idc_aen);
4503         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4504         uint32_t dev_state, idc_control;
4505
4506         qla83xx_idc_lock(base_vha, 0);
4507         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4508         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4509         qla83xx_idc_unlock(base_vha, 0);
4510         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4511                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4512                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4513                             "Application requested NIC Core Reset.\n");
4514                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4515                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4516                     QLA_SUCCESS) {
4517                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4518                             "Other protocol driver requested NIC Core Reset.\n");
4519                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4520                 }
4521         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4522                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4523                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4524         }
4525 }
4526
4527 static void
4528 qla83xx_wait_logic(void)
4529 {
4530         int i;
4531
4532         /* Yield CPU */
4533         if (!in_interrupt()) {
4534                 /*
4535                  * Wait about 200ms before retrying again.
4536                  * This controls the number of retries for single
4537                  * lock operation.
4538                  */
4539                 msleep(100);
4540                 schedule();
4541         } else {
4542                 for (i = 0; i < 20; i++)
4543                         cpu_relax(); /* This a nop instr on i386 */
4544         }
4545 }
4546
4547 static int
4548 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4549 {
4550         int rval;
4551         uint32_t data;
4552         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4553         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4554         struct qla_hw_data *ha = base_vha->hw;
4555         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4556             "Trying force recovery of the IDC lock.\n");
4557
4558         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4559         if (rval)
4560                 return rval;
4561
4562         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4563                 return QLA_SUCCESS;
4564         } else {
4565                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4566                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4567                     data);
4568                 if (rval)
4569                         return rval;
4570
4571                 msleep(200);
4572
4573                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4574                     &data);
4575                 if (rval)
4576                         return rval;
4577
4578                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4579                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4580                                         ~(idc_lck_rcvry_stage_mask));
4581                         rval = qla83xx_wr_reg(base_vha,
4582                             QLA83XX_IDC_LOCK_RECOVERY, data);
4583                         if (rval)
4584                                 return rval;
4585
4586                         /* Forcefully perform IDC UnLock */
4587                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4588                             &data);
4589                         if (rval)
4590                                 return rval;
4591                         /* Clear lock-id by setting 0xff */
4592                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4593                             0xff);
4594                         if (rval)
4595                                 return rval;
4596                         /* Clear lock-recovery by setting 0x0 */
4597                         rval = qla83xx_wr_reg(base_vha,
4598                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4599                         if (rval)
4600                                 return rval;
4601                 } else
4602                         return QLA_SUCCESS;
4603         }
4604
4605         return rval;
4606 }
4607
4608 static int
4609 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4610 {
4611         int rval = QLA_SUCCESS;
4612         uint32_t o_drv_lockid, n_drv_lockid;
4613         unsigned long lock_recovery_timeout;
4614
4615         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4616 retry_lockid:
4617         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4618         if (rval)
4619                 goto exit;
4620
4621         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4622         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4623                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4624                         return QLA_SUCCESS;
4625                 else
4626                         return QLA_FUNCTION_FAILED;
4627         }
4628
4629         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4630         if (rval)
4631                 goto exit;
4632
4633         if (o_drv_lockid == n_drv_lockid) {
4634                 qla83xx_wait_logic();
4635                 goto retry_lockid;
4636         } else
4637                 return QLA_SUCCESS;
4638
4639 exit:
4640         return rval;
4641 }
4642
4643 void
4644 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4645 {
4646         uint16_t options = (requester_id << 15) | BIT_6;
4647         uint32_t data;
4648         uint32_t lock_owner;
4649         struct qla_hw_data *ha = base_vha->hw;
4650
4651         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4652 retry_lock:
4653         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4654             == QLA_SUCCESS) {
4655                 if (data) {
4656                         /* Setting lock-id to our function-number */
4657                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4658                             ha->portnum);
4659                 } else {
4660                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4661                             &lock_owner);
4662                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4663                             "Failed to acquire IDC lock, acquired by %d, "
4664                             "retrying...\n", lock_owner);
4665
4666                         /* Retry/Perform IDC-Lock recovery */
4667                         if (qla83xx_idc_lock_recovery(base_vha)
4668                             == QLA_SUCCESS) {
4669                                 qla83xx_wait_logic();
4670                                 goto retry_lock;
4671                         } else
4672                                 ql_log(ql_log_warn, base_vha, 0xb075,
4673                                     "IDC Lock recovery FAILED.\n");
4674                 }
4675
4676         }
4677
4678         return;
4679
4680         /* XXX: IDC-lock implementation using access-control mbx */
4681 retry_lock2:
4682         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4683                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4684                     "Failed to acquire IDC lock. retrying...\n");
4685                 /* Retry/Perform IDC-Lock recovery */
4686                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4687                         qla83xx_wait_logic();
4688                         goto retry_lock2;
4689                 } else
4690                         ql_log(ql_log_warn, base_vha, 0xb076,
4691                             "IDC Lock recovery FAILED.\n");
4692         }
4693
4694         return;
4695 }
4696
4697 void
4698 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4699 {
4700 #if 0
4701         uint16_t options = (requester_id << 15) | BIT_7;
4702 #endif
4703         uint16_t retry;
4704         uint32_t data;
4705         struct qla_hw_data *ha = base_vha->hw;
4706
4707         /* IDC-unlock implementation using driver-unlock/lock-id
4708          * remote registers
4709          */
4710         retry = 0;
4711 retry_unlock:
4712         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4713             == QLA_SUCCESS) {
4714                 if (data == ha->portnum) {
4715                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4716                         /* Clearing lock-id by setting 0xff */
4717                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4718                 } else if (retry < 10) {
4719                         /* SV: XXX: IDC unlock retrying needed here? */
4720
4721                         /* Retry for IDC-unlock */
4722                         qla83xx_wait_logic();
4723                         retry++;
4724                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4725                             "Failed to release IDC lock, retrying=%d\n", retry);
4726                         goto retry_unlock;
4727                 }
4728         } else if (retry < 10) {
4729                 /* Retry for IDC-unlock */
4730                 qla83xx_wait_logic();
4731                 retry++;
4732                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4733                     "Failed to read drv-lockid, retrying=%d\n", retry);
4734                 goto retry_unlock;
4735         }
4736
4737         return;
4738
4739 #if 0
4740         /* XXX: IDC-unlock implementation using access-control mbx */
4741         retry = 0;
4742 retry_unlock2:
4743         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4744                 if (retry < 10) {
4745                         /* Retry for IDC-unlock */
4746                         qla83xx_wait_logic();
4747                         retry++;
4748                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4749                             "Failed to release IDC lock, retrying=%d\n", retry);
4750                         goto retry_unlock2;
4751                 }
4752         }
4753
4754         return;
4755 #endif
4756 }
4757
4758 int
4759 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4760 {
4761         int rval = QLA_SUCCESS;
4762         struct qla_hw_data *ha = vha->hw;
4763         uint32_t drv_presence;
4764
4765         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4766         if (rval == QLA_SUCCESS) {
4767                 drv_presence |= (1 << ha->portnum);
4768                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4769                     drv_presence);
4770         }
4771
4772         return rval;
4773 }
4774
4775 int
4776 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4777 {
4778         int rval = QLA_SUCCESS;
4779
4780         qla83xx_idc_lock(vha, 0);
4781         rval = __qla83xx_set_drv_presence(vha);
4782         qla83xx_idc_unlock(vha, 0);
4783
4784         return rval;
4785 }
4786
4787 int
4788 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4789 {
4790         int rval = QLA_SUCCESS;
4791         struct qla_hw_data *ha = vha->hw;
4792         uint32_t drv_presence;
4793
4794         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4795         if (rval == QLA_SUCCESS) {
4796                 drv_presence &= ~(1 << ha->portnum);
4797                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4798                     drv_presence);
4799         }
4800
4801         return rval;
4802 }
4803
4804 int
4805 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4806 {
4807         int rval = QLA_SUCCESS;
4808
4809         qla83xx_idc_lock(vha, 0);
4810         rval = __qla83xx_clear_drv_presence(vha);
4811         qla83xx_idc_unlock(vha, 0);
4812
4813         return rval;
4814 }
4815
4816 static void
4817 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4818 {
4819         struct qla_hw_data *ha = vha->hw;
4820         uint32_t drv_ack, drv_presence;
4821         unsigned long ack_timeout;
4822
4823         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4824         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4825         while (1) {
4826                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4827                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4828                 if ((drv_ack & drv_presence) == drv_presence)
4829                         break;
4830
4831                 if (time_after_eq(jiffies, ack_timeout)) {
4832                         ql_log(ql_log_warn, vha, 0xb067,
4833                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4834                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4835                         /*
4836                          * The function(s) which did not ack in time are forced
4837                          * to withdraw any further participation in the IDC
4838                          * reset.
4839                          */
4840                         if (drv_ack != drv_presence)
4841                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4842                                     drv_ack);
4843                         break;
4844                 }
4845
4846                 qla83xx_idc_unlock(vha, 0);
4847                 msleep(1000);
4848                 qla83xx_idc_lock(vha, 0);
4849         }
4850
4851         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4852         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4853 }
4854
4855 static int
4856 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4857 {
4858         int rval = QLA_SUCCESS;
4859         uint32_t idc_control;
4860
4861         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4862         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4863
4864         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4865         __qla83xx_get_idc_control(vha, &idc_control);
4866         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4867         __qla83xx_set_idc_control(vha, 0);
4868
4869         qla83xx_idc_unlock(vha, 0);
4870         rval = qla83xx_restart_nic_firmware(vha);
4871         qla83xx_idc_lock(vha, 0);
4872
4873         if (rval != QLA_SUCCESS) {
4874                 ql_log(ql_log_fatal, vha, 0xb06a,
4875                     "Failed to restart NIC f/w.\n");
4876                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4877                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4878         } else {
4879                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4880                     "Success in restarting nic f/w.\n");
4881                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4882                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4883         }
4884
4885         return rval;
4886 }
4887
4888 /* Assumes idc_lock always held on entry */
4889 int
4890 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4891 {
4892         struct qla_hw_data *ha = base_vha->hw;
4893         int rval = QLA_SUCCESS;
4894         unsigned long dev_init_timeout;
4895         uint32_t dev_state;
4896
4897         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4898         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4899
4900         while (1) {
4901
4902                 if (time_after_eq(jiffies, dev_init_timeout)) {
4903                         ql_log(ql_log_warn, base_vha, 0xb06e,
4904                             "Initialization TIMEOUT!\n");
4905                         /* Init timeout. Disable further NIC Core
4906                          * communication.
4907                          */
4908                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4909                                 QLA8XXX_DEV_FAILED);
4910                         ql_log(ql_log_info, base_vha, 0xb06f,
4911                             "HW State: FAILED.\n");
4912                 }
4913
4914                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4915                 switch (dev_state) {
4916                 case QLA8XXX_DEV_READY:
4917                         if (ha->flags.nic_core_reset_owner)
4918                                 qla83xx_idc_audit(base_vha,
4919                                     IDC_AUDIT_COMPLETION);
4920                         ha->flags.nic_core_reset_owner = 0;
4921                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4922                             "Reset_owner reset by 0x%x.\n",
4923                             ha->portnum);
4924                         goto exit;
4925                 case QLA8XXX_DEV_COLD:
4926                         if (ha->flags.nic_core_reset_owner)
4927                                 rval = qla83xx_device_bootstrap(base_vha);
4928                         else {
4929                         /* Wait for AEN to change device-state */
4930                                 qla83xx_idc_unlock(base_vha, 0);
4931                                 msleep(1000);
4932                                 qla83xx_idc_lock(base_vha, 0);
4933                         }
4934                         break;
4935                 case QLA8XXX_DEV_INITIALIZING:
4936                         /* Wait for AEN to change device-state */
4937                         qla83xx_idc_unlock(base_vha, 0);
4938                         msleep(1000);
4939                         qla83xx_idc_lock(base_vha, 0);
4940                         break;
4941                 case QLA8XXX_DEV_NEED_RESET:
4942                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4943                                 qla83xx_need_reset_handler(base_vha);
4944                         else {
4945                                 /* Wait for AEN to change device-state */
4946                                 qla83xx_idc_unlock(base_vha, 0);
4947                                 msleep(1000);
4948                                 qla83xx_idc_lock(base_vha, 0);
4949                         }
4950                         /* reset timeout value after need reset handler */
4951                         dev_init_timeout = jiffies +
4952                             (ha->fcoe_dev_init_timeout * HZ);
4953                         break;
4954                 case QLA8XXX_DEV_NEED_QUIESCENT:
4955                         /* XXX: DEBUG for now */
4956                         qla83xx_idc_unlock(base_vha, 0);
4957                         msleep(1000);
4958                         qla83xx_idc_lock(base_vha, 0);
4959                         break;
4960                 case QLA8XXX_DEV_QUIESCENT:
4961                         /* XXX: DEBUG for now */
4962                         if (ha->flags.quiesce_owner)
4963                                 goto exit;
4964
4965                         qla83xx_idc_unlock(base_vha, 0);
4966                         msleep(1000);
4967                         qla83xx_idc_lock(base_vha, 0);
4968                         dev_init_timeout = jiffies +
4969                             (ha->fcoe_dev_init_timeout * HZ);
4970                         break;
4971                 case QLA8XXX_DEV_FAILED:
4972                         if (ha->flags.nic_core_reset_owner)
4973                                 qla83xx_idc_audit(base_vha,
4974                                     IDC_AUDIT_COMPLETION);
4975                         ha->flags.nic_core_reset_owner = 0;
4976                         __qla83xx_clear_drv_presence(base_vha);
4977                         qla83xx_idc_unlock(base_vha, 0);
4978                         qla8xxx_dev_failed_handler(base_vha);
4979                         rval = QLA_FUNCTION_FAILED;
4980                         qla83xx_idc_lock(base_vha, 0);
4981                         goto exit;
4982                 case QLA8XXX_BAD_VALUE:
4983                         qla83xx_idc_unlock(base_vha, 0);
4984                         msleep(1000);
4985                         qla83xx_idc_lock(base_vha, 0);
4986                         break;
4987                 default:
4988                         ql_log(ql_log_warn, base_vha, 0xb071,
4989                             "Unknown Device State: %x.\n", dev_state);
4990                         qla83xx_idc_unlock(base_vha, 0);
4991                         qla8xxx_dev_failed_handler(base_vha);
4992                         rval = QLA_FUNCTION_FAILED;
4993                         qla83xx_idc_lock(base_vha, 0);
4994                         goto exit;
4995                 }
4996         }
4997
4998 exit:
4999         return rval;
5000 }
5001
5002 void
5003 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5004 {
5005         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5006             board_disable);
5007         struct pci_dev *pdev = ha->pdev;
5008         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5009
5010         /* if UNLOAD flag is already set, then continue unload,
5011          * where it was set first.
5012          */
5013         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5014                 return;
5015
5016         ql_log(ql_log_warn, base_vha, 0x015b,
5017             "Disabling adapter.\n");
5018
5019         set_bit(UNLOADING, &base_vha->dpc_flags);
5020
5021         qla2x00_delete_all_vps(ha, base_vha);
5022
5023         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5024
5025         qla2x00_dfs_remove(base_vha);
5026
5027         qla84xx_put_chip(base_vha);
5028
5029         if (base_vha->timer_active)
5030                 qla2x00_stop_timer(base_vha);
5031
5032         base_vha->flags.online = 0;
5033
5034         qla2x00_destroy_deferred_work(ha);
5035
5036         /*
5037          * Do not try to stop beacon blink as it will issue a mailbox
5038          * command.
5039          */
5040         qla2x00_free_sysfs_attr(base_vha, false);
5041
5042         fc_remove_host(base_vha->host);
5043
5044         scsi_remove_host(base_vha->host);
5045
5046         base_vha->flags.init_done = 0;
5047         qla25xx_delete_queues(base_vha);
5048         qla2x00_free_irqs(base_vha);
5049         qla2x00_free_fcports(base_vha);
5050         qla2x00_mem_free(ha);
5051         qla82xx_md_free(base_vha);
5052         qla2x00_free_queues(ha);
5053
5054         qla2x00_unmap_iobases(ha);
5055
5056         pci_release_selected_regions(ha->pdev, ha->bars);
5057         pci_disable_pcie_error_reporting(pdev);
5058         pci_disable_device(pdev);
5059
5060         /*
5061          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5062          */
5063 }
5064
5065 /**************************************************************************
5066 * qla2x00_do_dpc
5067 *   This kernel thread is a task that is schedule by the interrupt handler
5068 *   to perform the background processing for interrupts.
5069 *
5070 * Notes:
5071 * This task always run in the context of a kernel thread.  It
5072 * is kick-off by the driver's detect code and starts up
5073 * up one per adapter. It immediately goes to sleep and waits for
5074 * some fibre event.  When either the interrupt handler or
5075 * the timer routine detects a event it will one of the task
5076 * bits then wake us up.
5077 **************************************************************************/
5078 static int
5079 qla2x00_do_dpc(void *data)
5080 {
5081         scsi_qla_host_t *base_vha;
5082         struct qla_hw_data *ha;
5083
5084         ha = (struct qla_hw_data *)data;
5085         base_vha = pci_get_drvdata(ha->pdev);
5086
5087         set_user_nice(current, MIN_NICE);
5088
5089         set_current_state(TASK_INTERRUPTIBLE);
5090         while (!kthread_should_stop()) {
5091                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5092                     "DPC handler sleeping.\n");
5093
5094                 schedule();
5095
5096                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5097                         goto end_loop;
5098
5099                 if (ha->flags.eeh_busy) {
5100                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5101                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5102                         goto end_loop;
5103                 }
5104
5105                 ha->dpc_active = 1;
5106
5107                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5108                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5109                     base_vha->dpc_flags);
5110
5111                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5112                         break;
5113
5114                 qla2x00_do_work(base_vha);
5115
5116                 if (IS_P3P_TYPE(ha)) {
5117                         if (IS_QLA8044(ha)) {
5118                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5119                                         &base_vha->dpc_flags)) {
5120                                         qla8044_idc_lock(ha);
5121                                         qla8044_wr_direct(base_vha,
5122                                                 QLA8044_CRB_DEV_STATE_INDEX,
5123                                                 QLA8XXX_DEV_FAILED);
5124                                         qla8044_idc_unlock(ha);
5125                                         ql_log(ql_log_info, base_vha, 0x4004,
5126                                                 "HW State: FAILED.\n");
5127                                         qla8044_device_state_handler(base_vha);
5128                                         continue;
5129                                 }
5130
5131                         } else {
5132                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5133                                         &base_vha->dpc_flags)) {
5134                                         qla82xx_idc_lock(ha);
5135                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5136                                                 QLA8XXX_DEV_FAILED);
5137                                         qla82xx_idc_unlock(ha);
5138                                         ql_log(ql_log_info, base_vha, 0x0151,
5139                                                 "HW State: FAILED.\n");
5140                                         qla82xx_device_state_handler(base_vha);
5141                                         continue;
5142                                 }
5143                         }
5144
5145                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5146                                 &base_vha->dpc_flags)) {
5147
5148                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5149                                     "FCoE context reset scheduled.\n");
5150                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5151                                         &base_vha->dpc_flags))) {
5152                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5153                                                 /* FCoE-ctx reset failed.
5154                                                  * Escalate to chip-reset
5155                                                  */
5156                                                 set_bit(ISP_ABORT_NEEDED,
5157                                                         &base_vha->dpc_flags);
5158                                         }
5159                                         clear_bit(ABORT_ISP_ACTIVE,
5160                                                 &base_vha->dpc_flags);
5161                                 }
5162
5163                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5164                                     "FCoE context reset end.\n");
5165                         }
5166                 } else if (IS_QLAFX00(ha)) {
5167                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5168                                 &base_vha->dpc_flags)) {
5169                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5170                                     "Firmware Reset Recovery\n");
5171                                 if (qlafx00_reset_initialize(base_vha)) {
5172                                         /* Failed. Abort isp later. */
5173                                         if (!test_bit(UNLOADING,
5174                                             &base_vha->dpc_flags)) {
5175                                                 set_bit(ISP_UNRECOVERABLE,
5176                                                     &base_vha->dpc_flags);
5177                                                 ql_dbg(ql_dbg_dpc, base_vha,
5178                                                     0x4021,
5179                                                     "Reset Recovery Failed\n");
5180                                         }
5181                                 }
5182                         }
5183
5184                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5185                                 &base_vha->dpc_flags)) {
5186                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5187                                     "ISPFx00 Target Scan scheduled\n");
5188                                 if (qlafx00_rescan_isp(base_vha)) {
5189                                         if (!test_bit(UNLOADING,
5190                                             &base_vha->dpc_flags))
5191                                                 set_bit(ISP_UNRECOVERABLE,
5192                                                     &base_vha->dpc_flags);
5193                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5194                                             "ISPFx00 Target Scan Failed\n");
5195                                 }
5196                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5197                                     "ISPFx00 Target Scan End\n");
5198                         }
5199                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5200                                 &base_vha->dpc_flags)) {
5201                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5202                                     "ISPFx00 Host Info resend scheduled\n");
5203                                 qlafx00_fx_disc(base_vha,
5204                                     &base_vha->hw->mr.fcport,
5205                                     FXDISC_REG_HOST_INFO);
5206                         }
5207                 }
5208
5209                 if (test_and_clear_bit
5210                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
5211                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
5212
5213                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5214                             "ISP abort scheduled.\n");
5215                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5216                             &base_vha->dpc_flags))) {
5217
5218                                 if (ha->isp_ops->abort_isp(base_vha)) {
5219                                         /* failed. retry later */
5220                                         set_bit(ISP_ABORT_NEEDED,
5221                                             &base_vha->dpc_flags);
5222                                 }
5223                                 clear_bit(ABORT_ISP_ACTIVE,
5224                                                 &base_vha->dpc_flags);
5225                         }
5226
5227                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5228                             "ISP abort end.\n");
5229                 }
5230
5231                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5232                     &base_vha->dpc_flags)) {
5233                         qla2x00_update_fcports(base_vha);
5234                 }
5235
5236                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
5237                         int ret;
5238                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
5239                         if (ret != QLA_SUCCESS)
5240                                 ql_log(ql_log_warn, base_vha, 0x121,
5241                                     "Failed to enable receiving of RSCN "
5242                                     "requests: 0x%x.\n", ret);
5243                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5244                 }
5245
5246                 if (IS_QLAFX00(ha))
5247                         goto loop_resync_check;
5248
5249                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5250                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5251                             "Quiescence mode scheduled.\n");
5252                         if (IS_P3P_TYPE(ha)) {
5253                                 if (IS_QLA82XX(ha))
5254                                         qla82xx_device_state_handler(base_vha);
5255                                 if (IS_QLA8044(ha))
5256                                         qla8044_device_state_handler(base_vha);
5257                                 clear_bit(ISP_QUIESCE_NEEDED,
5258                                     &base_vha->dpc_flags);
5259                                 if (!ha->flags.quiesce_owner) {
5260                                         qla2x00_perform_loop_resync(base_vha);
5261                                         if (IS_QLA82XX(ha)) {
5262                                                 qla82xx_idc_lock(ha);
5263                                                 qla82xx_clear_qsnt_ready(
5264                                                     base_vha);
5265                                                 qla82xx_idc_unlock(ha);
5266                                         } else if (IS_QLA8044(ha)) {
5267                                                 qla8044_idc_lock(ha);
5268                                                 qla8044_clear_qsnt_ready(
5269                                                     base_vha);
5270                                                 qla8044_idc_unlock(ha);
5271                                         }
5272                                 }
5273                         } else {
5274                                 clear_bit(ISP_QUIESCE_NEEDED,
5275                                     &base_vha->dpc_flags);
5276                                 qla2x00_quiesce_io(base_vha);
5277                         }
5278                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5279                             "Quiescence mode end.\n");
5280                 }
5281
5282                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5283                                 &base_vha->dpc_flags) &&
5284                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5285
5286                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5287                             "Reset marker scheduled.\n");
5288                         qla2x00_rst_aen(base_vha);
5289                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5290                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5291                             "Reset marker end.\n");
5292                 }
5293
5294                 /* Retry each device up to login retry count */
5295                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5296                                                 &base_vha->dpc_flags)) &&
5297                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5298                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5299
5300                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5301                             "Relogin scheduled.\n");
5302                         qla2x00_relogin(base_vha);
5303                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5304                             "Relogin end.\n");
5305                 }
5306 loop_resync_check:
5307                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5308                     &base_vha->dpc_flags)) {
5309
5310                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5311                             "Loop resync scheduled.\n");
5312
5313                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5314                             &base_vha->dpc_flags))) {
5315
5316                                 qla2x00_loop_resync(base_vha);
5317
5318                                 clear_bit(LOOP_RESYNC_ACTIVE,
5319                                                 &base_vha->dpc_flags);
5320                         }
5321
5322                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5323                             "Loop resync end.\n");
5324                 }
5325
5326                 if (IS_QLAFX00(ha))
5327                         goto intr_on_check;
5328
5329                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5330                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5331                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5332                         qla2xxx_flash_npiv_conf(base_vha);
5333                 }
5334
5335 intr_on_check:
5336                 if (!ha->interrupts_on)
5337                         ha->isp_ops->enable_intrs(ha);
5338
5339                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5340                                         &base_vha->dpc_flags)) {
5341                         if (ha->beacon_blink_led == 1)
5342                                 ha->isp_ops->beacon_blink(base_vha);
5343                 }
5344
5345                 if (!IS_QLAFX00(ha))
5346                         qla2x00_do_dpc_all_vps(base_vha);
5347
5348                 ha->dpc_active = 0;
5349 end_loop:
5350                 set_current_state(TASK_INTERRUPTIBLE);
5351         } /* End of while(1) */
5352         __set_current_state(TASK_RUNNING);
5353
5354         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5355             "DPC handler exiting.\n");
5356
5357         /*
5358          * Make sure that nobody tries to wake us up again.
5359          */
5360         ha->dpc_active = 0;
5361
5362         /* Cleanup any residual CTX SRBs. */
5363         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5364
5365         return 0;
5366 }
5367
5368 void
5369 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5370 {
5371         struct qla_hw_data *ha = vha->hw;
5372         struct task_struct *t = ha->dpc_thread;
5373
5374         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5375                 wake_up_process(t);
5376 }
5377
5378 /*
5379 *  qla2x00_rst_aen
5380 *      Processes asynchronous reset.
5381 *
5382 * Input:
5383 *      ha  = adapter block pointer.
5384 */
5385 static void
5386 qla2x00_rst_aen(scsi_qla_host_t *vha)
5387 {
5388         if (vha->flags.online && !vha->flags.reset_active &&
5389             !atomic_read(&vha->loop_down_timer) &&
5390             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5391                 do {
5392                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5393
5394                         /*
5395                          * Issue marker command only when we are going to start
5396                          * the I/O.
5397                          */
5398                         vha->marker_needed = 1;
5399                 } while (!atomic_read(&vha->loop_down_timer) &&
5400                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5401         }
5402 }
5403
5404 /**************************************************************************
5405 *   qla2x00_timer
5406 *
5407 * Description:
5408 *   One second timer
5409 *
5410 * Context: Interrupt
5411 ***************************************************************************/
5412 void
5413 qla2x00_timer(scsi_qla_host_t *vha)
5414 {
5415         unsigned long   cpu_flags = 0;
5416         int             start_dpc = 0;
5417         int             index;
5418         srb_t           *sp;
5419         uint16_t        w;
5420         struct qla_hw_data *ha = vha->hw;
5421         struct req_que *req;
5422
5423         if (ha->flags.eeh_busy) {
5424                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5425                     "EEH = %d, restarting timer.\n",
5426                     ha->flags.eeh_busy);
5427                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5428                 return;
5429         }
5430
5431         /*
5432          * Hardware read to raise pending EEH errors during mailbox waits. If
5433          * the read returns -1 then disable the board.
5434          */
5435         if (!pci_channel_offline(ha->pdev)) {
5436                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5437                 qla2x00_check_reg16_for_disconnect(vha, w);
5438         }
5439
5440         /* Make sure qla82xx_watchdog is run only for physical port */
5441         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5442                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5443                         start_dpc++;
5444                 if (IS_QLA82XX(ha))
5445                         qla82xx_watchdog(vha);
5446                 else if (IS_QLA8044(ha))
5447                         qla8044_watchdog(vha);
5448         }
5449
5450         if (!vha->vp_idx && IS_QLAFX00(ha))
5451                 qlafx00_timer_routine(vha);
5452
5453         /* Loop down handler. */
5454         if (atomic_read(&vha->loop_down_timer) > 0 &&
5455             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5456             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5457                 && vha->flags.online) {
5458
5459                 if (atomic_read(&vha->loop_down_timer) ==
5460                     vha->loop_down_abort_time) {
5461
5462                         ql_log(ql_log_info, vha, 0x6008,
5463                             "Loop down - aborting the queues before time expires.\n");
5464
5465                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5466                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5467
5468                         /*
5469                          * Schedule an ISP abort to return any FCP2-device
5470                          * commands.
5471                          */
5472                         /* NPIV - scan physical port only */
5473                         if (!vha->vp_idx) {
5474                                 spin_lock_irqsave(&ha->hardware_lock,
5475                                     cpu_flags);
5476                                 req = ha->req_q_map[0];
5477                                 for (index = 1;
5478                                     index < req->num_outstanding_cmds;
5479                                     index++) {
5480                                         fc_port_t *sfcp;
5481
5482                                         sp = req->outstanding_cmds[index];
5483                                         if (!sp)
5484                                                 continue;
5485                                         if (sp->type != SRB_SCSI_CMD)
5486                                                 continue;
5487                                         sfcp = sp->fcport;
5488                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5489                                                 continue;
5490
5491                                         if (IS_QLA82XX(ha))
5492                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5493                                                         &vha->dpc_flags);
5494                                         else
5495                                                 set_bit(ISP_ABORT_NEEDED,
5496                                                         &vha->dpc_flags);
5497                                         break;
5498                                 }
5499                                 spin_unlock_irqrestore(&ha->hardware_lock,
5500                                                                 cpu_flags);
5501                         }
5502                         start_dpc++;
5503                 }
5504
5505                 /* if the loop has been down for 4 minutes, reinit adapter */
5506                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5507                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5508                                 ql_log(ql_log_warn, vha, 0x6009,
5509                                     "Loop down - aborting ISP.\n");
5510
5511                                 if (IS_QLA82XX(ha))
5512                                         set_bit(FCOE_CTX_RESET_NEEDED,
5513                                                 &vha->dpc_flags);
5514                                 else
5515                                         set_bit(ISP_ABORT_NEEDED,
5516                                                 &vha->dpc_flags);
5517                         }
5518                 }
5519                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5520                     "Loop down - seconds remaining %d.\n",
5521                     atomic_read(&vha->loop_down_timer));
5522         }
5523         /* Check if beacon LED needs to be blinked for physical host only */
5524         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5525                 /* There is no beacon_blink function for ISP82xx */
5526                 if (!IS_P3P_TYPE(ha)) {
5527                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5528                         start_dpc++;
5529                 }
5530         }
5531
5532         /* Process any deferred work. */
5533         if (!list_empty(&vha->work_list))
5534                 start_dpc++;
5535
5536         /* Schedule the DPC routine if needed */
5537         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5538             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5539             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5540             start_dpc ||
5541             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5542             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5543             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5544             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5545             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5546             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5547                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5548                     "isp_abort_needed=%d loop_resync_needed=%d "
5549                     "fcport_update_needed=%d start_dpc=%d "
5550                     "reset_marker_needed=%d",
5551                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5552                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5553                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5554                     start_dpc,
5555                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5556                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5557                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5558                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5559                     "relogin_needed=%d.\n",
5560                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5561                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5562                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5563                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5564                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5565                 qla2xxx_wake_dpc(vha);
5566         }
5567
5568         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5569 }
5570
5571 /* Firmware interface routines. */
5572
5573 #define FW_BLOBS        11
5574 #define FW_ISP21XX      0
5575 #define FW_ISP22XX      1
5576 #define FW_ISP2300      2
5577 #define FW_ISP2322      3
5578 #define FW_ISP24XX      4
5579 #define FW_ISP25XX      5
5580 #define FW_ISP81XX      6
5581 #define FW_ISP82XX      7
5582 #define FW_ISP2031      8
5583 #define FW_ISP8031      9
5584 #define FW_ISP27XX      10
5585
5586 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
5587 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
5588 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
5589 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
5590 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
5591 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
5592 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
5593 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
5594 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
5595 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
5596 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
5597
5598
5599 static DEFINE_MUTEX(qla_fw_lock);
5600
5601 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5602         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5603         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5604         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5605         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5606         { .name = FW_FILE_ISP24XX, },
5607         { .name = FW_FILE_ISP25XX, },
5608         { .name = FW_FILE_ISP81XX, },
5609         { .name = FW_FILE_ISP82XX, },
5610         { .name = FW_FILE_ISP2031, },
5611         { .name = FW_FILE_ISP8031, },
5612         { .name = FW_FILE_ISP27XX, },
5613 };
5614
5615 struct fw_blob *
5616 qla2x00_request_firmware(scsi_qla_host_t *vha)
5617 {
5618         struct qla_hw_data *ha = vha->hw;
5619         struct fw_blob *blob;
5620
5621         if (IS_QLA2100(ha)) {
5622                 blob = &qla_fw_blobs[FW_ISP21XX];
5623         } else if (IS_QLA2200(ha)) {
5624                 blob = &qla_fw_blobs[FW_ISP22XX];
5625         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5626                 blob = &qla_fw_blobs[FW_ISP2300];
5627         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5628                 blob = &qla_fw_blobs[FW_ISP2322];
5629         } else if (IS_QLA24XX_TYPE(ha)) {
5630                 blob = &qla_fw_blobs[FW_ISP24XX];
5631         } else if (IS_QLA25XX(ha)) {
5632                 blob = &qla_fw_blobs[FW_ISP25XX];
5633         } else if (IS_QLA81XX(ha)) {
5634                 blob = &qla_fw_blobs[FW_ISP81XX];
5635         } else if (IS_QLA82XX(ha)) {
5636                 blob = &qla_fw_blobs[FW_ISP82XX];
5637         } else if (IS_QLA2031(ha)) {
5638                 blob = &qla_fw_blobs[FW_ISP2031];
5639         } else if (IS_QLA8031(ha)) {
5640                 blob = &qla_fw_blobs[FW_ISP8031];
5641         } else if (IS_QLA27XX(ha)) {
5642                 blob = &qla_fw_blobs[FW_ISP27XX];
5643         } else {
5644                 return NULL;
5645         }
5646
5647         mutex_lock(&qla_fw_lock);
5648         if (blob->fw)
5649                 goto out;
5650
5651         if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5652                 ql_log(ql_log_warn, vha, 0x0063,
5653                     "Failed to load firmware image (%s).\n", blob->name);
5654                 blob->fw = NULL;
5655                 blob = NULL;
5656                 goto out;
5657         }
5658
5659 out:
5660         mutex_unlock(&qla_fw_lock);
5661         return blob;
5662 }
5663
5664 static void
5665 qla2x00_release_firmware(void)
5666 {
5667         int idx;
5668
5669         mutex_lock(&qla_fw_lock);
5670         for (idx = 0; idx < FW_BLOBS; idx++)
5671                 release_firmware(qla_fw_blobs[idx].fw);
5672         mutex_unlock(&qla_fw_lock);
5673 }
5674
5675 static pci_ers_result_t
5676 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5677 {
5678         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5679         struct qla_hw_data *ha = vha->hw;
5680
5681         ql_dbg(ql_dbg_aer, vha, 0x9000,
5682             "PCI error detected, state %x.\n", state);
5683
5684         switch (state) {
5685         case pci_channel_io_normal:
5686                 ha->flags.eeh_busy = 0;
5687                 return PCI_ERS_RESULT_CAN_RECOVER;
5688         case pci_channel_io_frozen:
5689                 ha->flags.eeh_busy = 1;
5690                 /* For ISP82XX complete any pending mailbox cmd */
5691                 if (IS_QLA82XX(ha)) {
5692                         ha->flags.isp82xx_fw_hung = 1;
5693                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5694                         qla82xx_clear_pending_mbx(vha);
5695                 }
5696                 qla2x00_free_irqs(vha);
5697                 pci_disable_device(pdev);
5698                 /* Return back all IOs */
5699                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5700                 return PCI_ERS_RESULT_NEED_RESET;
5701         case pci_channel_io_perm_failure:
5702                 ha->flags.pci_channel_io_perm_failure = 1;
5703                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5704                 return PCI_ERS_RESULT_DISCONNECT;
5705         }
5706         return PCI_ERS_RESULT_NEED_RESET;
5707 }
5708
5709 static pci_ers_result_t
5710 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5711 {
5712         int risc_paused = 0;
5713         uint32_t stat;
5714         unsigned long flags;
5715         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5716         struct qla_hw_data *ha = base_vha->hw;
5717         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5718         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5719
5720         if (IS_QLA82XX(ha))
5721                 return PCI_ERS_RESULT_RECOVERED;
5722
5723         spin_lock_irqsave(&ha->hardware_lock, flags);
5724         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5725                 stat = RD_REG_DWORD(&reg->hccr);
5726                 if (stat & HCCR_RISC_PAUSE)
5727                         risc_paused = 1;
5728         } else if (IS_QLA23XX(ha)) {
5729                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5730                 if (stat & HSR_RISC_PAUSED)
5731                         risc_paused = 1;
5732         } else if (IS_FWI2_CAPABLE(ha)) {
5733                 stat = RD_REG_DWORD(&reg24->host_status);
5734                 if (stat & HSRX_RISC_PAUSED)
5735                         risc_paused = 1;
5736         }
5737         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5738
5739         if (risc_paused) {
5740                 ql_log(ql_log_info, base_vha, 0x9003,
5741                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5742                 ha->isp_ops->fw_dump(base_vha, 0);
5743
5744                 return PCI_ERS_RESULT_NEED_RESET;
5745         } else
5746                 return PCI_ERS_RESULT_RECOVERED;
5747 }
5748
5749 static uint32_t
5750 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5751 {
5752         uint32_t rval = QLA_FUNCTION_FAILED;
5753         uint32_t drv_active = 0;
5754         struct qla_hw_data *ha = base_vha->hw;
5755         int fn;
5756         struct pci_dev *other_pdev = NULL;
5757
5758         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5759             "Entered %s.\n", __func__);
5760
5761         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5762
5763         if (base_vha->flags.online) {
5764                 /* Abort all outstanding commands,
5765                  * so as to be requeued later */
5766                 qla2x00_abort_isp_cleanup(base_vha);
5767         }
5768
5769
5770         fn = PCI_FUNC(ha->pdev->devfn);
5771         while (fn > 0) {
5772                 fn--;
5773                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5774                     "Finding pci device at function = 0x%x.\n", fn);
5775                 other_pdev =
5776                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5777                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5778                     fn));
5779
5780                 if (!other_pdev)
5781                         continue;
5782                 if (atomic_read(&other_pdev->enable_cnt)) {
5783                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5784                             "Found PCI func available and enable at 0x%x.\n",
5785                             fn);
5786                         pci_dev_put(other_pdev);
5787                         break;
5788                 }
5789                 pci_dev_put(other_pdev);
5790         }
5791
5792         if (!fn) {
5793                 /* Reset owner */
5794                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5795                     "This devfn is reset owner = 0x%x.\n",
5796                     ha->pdev->devfn);
5797                 qla82xx_idc_lock(ha);
5798
5799                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5800                     QLA8XXX_DEV_INITIALIZING);
5801
5802                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5803                     QLA82XX_IDC_VERSION);
5804
5805                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5806                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5807                     "drv_active = 0x%x.\n", drv_active);
5808
5809                 qla82xx_idc_unlock(ha);
5810                 /* Reset if device is not already reset
5811                  * drv_active would be 0 if a reset has already been done
5812                  */
5813                 if (drv_active)
5814                         rval = qla82xx_start_firmware(base_vha);
5815                 else
5816                         rval = QLA_SUCCESS;
5817                 qla82xx_idc_lock(ha);
5818
5819                 if (rval != QLA_SUCCESS) {
5820                         ql_log(ql_log_info, base_vha, 0x900b,
5821                             "HW State: FAILED.\n");
5822                         qla82xx_clear_drv_active(ha);
5823                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5824                             QLA8XXX_DEV_FAILED);
5825                 } else {
5826                         ql_log(ql_log_info, base_vha, 0x900c,
5827                             "HW State: READY.\n");
5828                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5829                             QLA8XXX_DEV_READY);
5830                         qla82xx_idc_unlock(ha);
5831                         ha->flags.isp82xx_fw_hung = 0;
5832                         rval = qla82xx_restart_isp(base_vha);
5833                         qla82xx_idc_lock(ha);
5834                         /* Clear driver state register */
5835                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5836                         qla82xx_set_drv_active(base_vha);
5837                 }
5838                 qla82xx_idc_unlock(ha);
5839         } else {
5840                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5841                     "This devfn is not reset owner = 0x%x.\n",
5842                     ha->pdev->devfn);
5843                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5844                     QLA8XXX_DEV_READY)) {
5845                         ha->flags.isp82xx_fw_hung = 0;
5846                         rval = qla82xx_restart_isp(base_vha);
5847                         qla82xx_idc_lock(ha);
5848                         qla82xx_set_drv_active(base_vha);
5849                         qla82xx_idc_unlock(ha);
5850                 }
5851         }
5852         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5853
5854         return rval;
5855 }
5856
5857 static pci_ers_result_t
5858 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5859 {
5860         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5861         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5862         struct qla_hw_data *ha = base_vha->hw;
5863         struct rsp_que *rsp;
5864         int rc, retries = 10;
5865
5866         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5867             "Slot Reset.\n");
5868
5869         /* Workaround: qla2xxx driver which access hardware earlier
5870          * needs error state to be pci_channel_io_online.
5871          * Otherwise mailbox command timesout.
5872          */
5873         pdev->error_state = pci_channel_io_normal;
5874
5875         pci_restore_state(pdev);
5876
5877         /* pci_restore_state() clears the saved_state flag of the device
5878          * save restored state which resets saved_state flag
5879          */
5880         pci_save_state(pdev);
5881
5882         if (ha->mem_only)
5883                 rc = pci_enable_device_mem(pdev);
5884         else
5885                 rc = pci_enable_device(pdev);
5886
5887         if (rc) {
5888                 ql_log(ql_log_warn, base_vha, 0x9005,
5889                     "Can't re-enable PCI device after reset.\n");
5890                 goto exit_slot_reset;
5891         }
5892
5893         rsp = ha->rsp_q_map[0];
5894         if (qla2x00_request_irqs(ha, rsp))
5895                 goto exit_slot_reset;
5896
5897         if (ha->isp_ops->pci_config(base_vha))
5898                 goto exit_slot_reset;
5899
5900         if (IS_QLA82XX(ha)) {
5901                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5902                         ret = PCI_ERS_RESULT_RECOVERED;
5903                         goto exit_slot_reset;
5904                 } else
5905                         goto exit_slot_reset;
5906         }
5907
5908         while (ha->flags.mbox_busy && retries--)
5909                 msleep(1000);
5910
5911         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5912         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5913                 ret =  PCI_ERS_RESULT_RECOVERED;
5914         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5915
5916
5917 exit_slot_reset:
5918         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5919             "slot_reset return %x.\n", ret);
5920
5921         return ret;
5922 }
5923
5924 static void
5925 qla2xxx_pci_resume(struct pci_dev *pdev)
5926 {
5927         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5928         struct qla_hw_data *ha = base_vha->hw;
5929         int ret;
5930
5931         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5932             "pci_resume.\n");
5933
5934         ret = qla2x00_wait_for_hba_online(base_vha);
5935         if (ret != QLA_SUCCESS) {
5936                 ql_log(ql_log_fatal, base_vha, 0x9002,
5937                     "The device failed to resume I/O from slot/link_reset.\n");
5938         }
5939
5940         pci_cleanup_aer_uncorrect_error_status(pdev);
5941
5942         ha->flags.eeh_busy = 0;
5943 }
5944
5945 static void
5946 qla83xx_disable_laser(scsi_qla_host_t *vha)
5947 {
5948         uint32_t reg, data, fn;
5949         struct qla_hw_data *ha = vha->hw;
5950         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5951
5952         /* pci func #/port # */
5953         ql_dbg(ql_dbg_init, vha, 0x004b,
5954             "Disabling Laser for hba: %p\n", vha);
5955
5956         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5957                 (BIT_15|BIT_14|BIT_13|BIT_12));
5958
5959         fn = (fn >> 12);
5960
5961         if (fn & 1)
5962                 reg = PORT_1_2031;
5963         else
5964                 reg = PORT_0_2031;
5965
5966         data = LASER_OFF_2031;
5967
5968         qla83xx_wr_reg(vha, reg, data);
5969 }
5970
5971 static const struct pci_error_handlers qla2xxx_err_handler = {
5972         .error_detected = qla2xxx_pci_error_detected,
5973         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5974         .slot_reset = qla2xxx_pci_slot_reset,
5975         .resume = qla2xxx_pci_resume,
5976 };
5977
5978 static struct pci_device_id qla2xxx_pci_tbl[] = {
5979         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5980         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5981         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5982         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5983         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5984         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5985         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5986         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5987         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5988         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5989         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5990         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5991         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5992         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5993         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5994         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5995         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5996         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5997         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5998         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5999         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6000         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6001         { 0 },
6002 };
6003 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6004
6005 static struct pci_driver qla2xxx_pci_driver = {
6006         .name           = QLA2XXX_DRIVER_NAME,
6007         .driver         = {
6008                 .owner          = THIS_MODULE,
6009         },
6010         .id_table       = qla2xxx_pci_tbl,
6011         .probe          = qla2x00_probe_one,
6012         .remove         = qla2x00_remove_one,
6013         .shutdown       = qla2x00_shutdown,
6014         .err_handler    = &qla2xxx_err_handler,
6015 };
6016
6017 static const struct file_operations apidev_fops = {
6018         .owner = THIS_MODULE,
6019         .llseek = noop_llseek,
6020 };
6021
6022 /**
6023  * qla2x00_module_init - Module initialization.
6024  **/
6025 static int __init
6026 qla2x00_module_init(void)
6027 {
6028         int ret = 0;
6029
6030         /* Allocate cache for SRBs. */
6031         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6032             SLAB_HWCACHE_ALIGN, NULL);
6033         if (srb_cachep == NULL) {
6034                 ql_log(ql_log_fatal, NULL, 0x0001,
6035                     "Unable to allocate SRB cache...Failing load!.\n");
6036                 return -ENOMEM;
6037         }
6038
6039         /* Initialize target kmem_cache and mem_pools */
6040         ret = qlt_init();
6041         if (ret < 0) {
6042                 goto destroy_cache;
6043         } else if (ret > 0) {
6044                 /*
6045                  * If initiator mode is explictly disabled by qlt_init(),
6046                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6047                  * performing scsi_scan_target() during LOOP UP event.
6048                  */
6049                 qla2xxx_transport_functions.disable_target_scan = 1;
6050                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6051         }
6052
6053         /* Derive version string. */
6054         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6055         if (ql2xextended_error_logging)
6056                 strcat(qla2x00_version_str, "-debug");
6057
6058         qla2xxx_transport_template =
6059             fc_attach_transport(&qla2xxx_transport_functions);
6060         if (!qla2xxx_transport_template) {
6061                 ql_log(ql_log_fatal, NULL, 0x0002,
6062                     "fc_attach_transport failed...Failing load!.\n");
6063                 ret = -ENODEV;
6064                 goto qlt_exit;
6065         }
6066
6067         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6068         if (apidev_major < 0) {
6069                 ql_log(ql_log_fatal, NULL, 0x0003,
6070                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6071         }
6072
6073         qla2xxx_transport_vport_template =
6074             fc_attach_transport(&qla2xxx_transport_vport_functions);
6075         if (!qla2xxx_transport_vport_template) {
6076                 ql_log(ql_log_fatal, NULL, 0x0004,
6077                     "fc_attach_transport vport failed...Failing load!.\n");
6078                 ret = -ENODEV;
6079                 goto unreg_chrdev;
6080         }
6081         ql_log(ql_log_info, NULL, 0x0005,
6082             "QLogic Fibre Channel HBA Driver: %s.\n",
6083             qla2x00_version_str);
6084         ret = pci_register_driver(&qla2xxx_pci_driver);
6085         if (ret) {
6086                 ql_log(ql_log_fatal, NULL, 0x0006,
6087                     "pci_register_driver failed...ret=%d Failing load!.\n",
6088                     ret);
6089                 goto release_vport_transport;
6090         }
6091         return ret;
6092
6093 release_vport_transport:
6094         fc_release_transport(qla2xxx_transport_vport_template);
6095
6096 unreg_chrdev:
6097         if (apidev_major >= 0)
6098                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6099         fc_release_transport(qla2xxx_transport_template);
6100
6101 qlt_exit:
6102         qlt_exit();
6103
6104 destroy_cache:
6105         kmem_cache_destroy(srb_cachep);
6106         return ret;
6107 }
6108
6109 /**
6110  * qla2x00_module_exit - Module cleanup.
6111  **/
6112 static void __exit
6113 qla2x00_module_exit(void)
6114 {
6115         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6116         pci_unregister_driver(&qla2xxx_pci_driver);
6117         qla2x00_release_firmware();
6118         kmem_cache_destroy(srb_cachep);
6119         qlt_exit();
6120         if (ctx_cachep)
6121                 kmem_cache_destroy(ctx_cachep);
6122         fc_release_transport(qla2xxx_transport_template);
6123         fc_release_transport(qla2xxx_transport_vport_template);
6124 }
6125
6126 module_init(qla2x00_module_init);
6127 module_exit(qla2x00_module_exit);
6128
6129 MODULE_AUTHOR("QLogic Corporation");
6130 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6131 MODULE_LICENSE("GPL");
6132 MODULE_VERSION(QLA2XXX_VERSION);
6133 /*(DEBLOBBED)*/