drivers/scsi/qla2xxx/qla_mr.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8 #include <linux/delay.h>
   9 #include <linux/ktime.h>
  10 #include <linux/pci.h>
  11 #include <linux/ratelimit.h>
  12 #include <linux/vmalloc.h>
  13 #include <linux/bsg-lib.h>
  14 #include <scsi/scsi_tcq.h>
  15 #include <linux/utsname.h>
  16
  17
  18 /* QLAFX00 specific Mailbox implementation functions */
  19
  20 /*
  21  * qlafx00_mailbox_command
  22  *      Issue mailbox command and waits for completion.
  23  *
  24  * Input:
  25  *      ha = adapter block pointer.
  26  *      mcp = driver internal mbx struct pointer.
  27  *
  28  * Output:
  29  *      mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  30  *
  31  * Returns:
  32  *      0 : QLA_SUCCESS = cmd performed success
  33  *      1 : QLA_FUNCTION_FAILED   (error encountered)
  34  *      6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  35  *
  36  * Context:
  37  *      Kernel context.
  38  */
  39 static int
  40 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
  41
  42 {
  43         int             rval;
  44         unsigned long    flags = 0;
  45         device_reg_t *reg;
  46         uint8_t         abort_active;
  47         uint8_t         io_lock_on;
  48         uint16_t        command = 0;
  49         uint32_t        *iptr;
  50         uint32_t __iomem *optr;
  51         uint32_t        cnt;
  52         uint32_t        mboxes;
  53         unsigned long   wait_time;
  54         struct qla_hw_data *ha = vha->hw;
  55         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  56
  57         if (ha->pdev->error_state > pci_channel_io_frozen) {
  58                 ql_log(ql_log_warn, vha, 0x115c,
  59                     "error_state is greater than pci_channel_io_frozen, "
  60                     "exiting.\n");
  61                 return QLA_FUNCTION_TIMEOUT;
  62         }
  63
  64         if (vha->device_flags & DFLG_DEV_FAILED) {
  65                 ql_log(ql_log_warn, vha, 0x115f,
  66                     "Device in failed state, exiting.\n");
  67                 return QLA_FUNCTION_TIMEOUT;
  68         }
  69
  70         reg = ha->iobase;
  71         io_lock_on = base_vha->flags.init_done;
  72
  73         rval = QLA_SUCCESS;
  74         abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  75
  76         if (ha->flags.pci_channel_io_perm_failure) {
  77                 ql_log(ql_log_warn, vha, 0x1175,
  78                     "Perm failure on EEH timeout MBX, exiting.\n");
  79                 return QLA_FUNCTION_TIMEOUT;
  80         }
  81
  82         if (ha->flags.isp82xx_fw_hung) {
  83                 /* Setting Link-Down error */
  84                 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
  85                 ql_log(ql_log_warn, vha, 0x1176,
  86                     "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
  87                 rval = QLA_FUNCTION_FAILED;
  88                 goto premature_exit;
  89         }
  90
  91         /*
  92          * Wait for active mailbox commands to finish by waiting at most tov
  93          * seconds. This is to serialize actual issuing of mailbox cmds during
  94          * non ISP abort time.
  95          */
  96         if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  97                 /* Timeout occurred. Return error. */
  98                 ql_log(ql_log_warn, vha, 0x1177,
  99                     "Cmd access timeout, cmd=0x%x, Exiting.\n",
 100                     mcp->mb[0]);
 101                 return QLA_FUNCTION_TIMEOUT;
 102         }
 103
 104         ha->flags.mbox_busy = 1;
 105         /* Save mailbox command for debug */
 106         ha->mcp32 = mcp;
 107
 108         ql_dbg(ql_dbg_mbx, vha, 0x1178,
 109             "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
 110
 111         spin_lock_irqsave(&ha->hardware_lock, flags);
 112
 113         /* Load mailbox registers. */
 114         optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
 115
 116         iptr = mcp->mb;
 117         command = mcp->mb[0];
 118         mboxes = mcp->out_mb;
 119
 120         for (cnt = 0; cnt < ha->mbx_count; cnt++) {
 121                 if (mboxes & BIT_0)
 122                         WRT_REG_DWORD(optr, *iptr);
 123
 124                 mboxes >>= 1;
 125                 optr++;
 126                 iptr++;
 127         }
 128
 129         /* Issue set host interrupt command to send cmd out. */
 130         ha->flags.mbox_int = 0;
 131         clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
 132
 133         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
 134             (uint8_t *)mcp->mb, 16);
 135         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
 136             ((uint8_t *)mcp->mb + 0x10), 16);
 137         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
 138             ((uint8_t *)mcp->mb + 0x20), 8);
 139
 140         /* Unlock mbx registers and wait for interrupt */
 141         ql_dbg(ql_dbg_mbx, vha, 0x1179,
 142             "Going to unlock irq & waiting for interrupts. "
 143             "jiffies=%lx.\n", jiffies);
 144
 145         /* Wait for mbx cmd completion until timeout */
 146         if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
 147                 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
 148
 149                 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
 150                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 151
 152                 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
 153         } else {
 154                 ql_dbg(ql_dbg_mbx, vha, 0x112c,
 155                     "Cmd=%x Polling Mode.\n", command);
 156
 157                 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
 158                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 159
 160                 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
 161                 while (!ha->flags.mbox_int) {
 162                         if (time_after(jiffies, wait_time))
 163                                 break;
 164
 165                         /* Check for pending interrupts. */
 166                         qla2x00_poll(ha->rsp_q_map[0]);
 167
 168                         if (!ha->flags.mbox_int &&
 169                             !(IS_QLA2200(ha) &&
 170                             command == MBC_LOAD_RISC_RAM_EXTENDED))
 171                                 usleep_range(10000, 11000);
 172                 } /* while */
 173                 ql_dbg(ql_dbg_mbx, vha, 0x112d,
 174                     "Waited %d sec.\n",
 175                     (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
 176         }
 177
 178         /* Check whether we timed out */
 179         if (ha->flags.mbox_int) {
 180                 uint32_t *iptr2;
 181
 182                 ql_dbg(ql_dbg_mbx, vha, 0x112e,
 183                     "Cmd=%x completed.\n", command);
 184
 185                 /* Got interrupt. Clear the flag. */
 186                 ha->flags.mbox_int = 0;
 187                 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
 188
 189                 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
 190                         rval = QLA_FUNCTION_FAILED;
 191
 192                 /* Load return mailbox registers. */
 193                 iptr2 = mcp->mb;
 194                 iptr = (uint32_t *)&ha->mailbox_out32[0];
 195                 mboxes = mcp->in_mb;
 196                 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
 197                         if (mboxes & BIT_0)
 198                                 *iptr2 = *iptr;
 199
 200                         mboxes >>= 1;
 201                         iptr2++;
 202                         iptr++;
 203                 }
 204         } else {
 205
 206                 rval = QLA_FUNCTION_TIMEOUT;
 207         }
 208
 209         ha->flags.mbox_busy = 0;
 210
 211         /* Clean up */
 212         ha->mcp32 = NULL;
 213
 214         if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
 215                 ql_dbg(ql_dbg_mbx, vha, 0x113a,
 216                     "checking for additional resp interrupt.\n");
 217
 218                 /* polling mode for non isp_abort commands. */
 219                 qla2x00_poll(ha->rsp_q_map[0]);
 220         }
 221
 222         if (rval == QLA_FUNCTION_TIMEOUT &&
 223             mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
 224                 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
 225                     ha->flags.eeh_busy) {
 226                         /* not in dpc. schedule it for dpc to take over. */
 227                         ql_dbg(ql_dbg_mbx, vha, 0x115d,
 228                             "Timeout, schedule isp_abort_needed.\n");
 229
 230                         if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
 231                             !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
 232                             !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
 233
 234                                 ql_log(ql_log_info, base_vha, 0x115e,
 235                                     "Mailbox cmd timeout occurred, cmd=0x%x, "
 236                                     "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
 237                                     "abort.\n", command, mcp->mb[0],
 238                                     ha->flags.eeh_busy);
 239                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 240                                 qla2xxx_wake_dpc(vha);
 241                         }
 242                 } else if (!abort_active) {
 243                         /* call abort directly since we are in the DPC thread */
 244                         ql_dbg(ql_dbg_mbx, vha, 0x1160,
 245                             "Timeout, calling abort_isp.\n");
 246
 247                         if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
 248                             !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
 249                             !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
 250
 251                                 ql_log(ql_log_info, base_vha, 0x1161,
 252                                     "Mailbox cmd timeout occurred, cmd=0x%x, "
 253                                     "mb[0]=0x%x. Scheduling ISP abort ",
 254                                     command, mcp->mb[0]);
 255
 256                                 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
 257                                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 258                                 if (ha->isp_ops->abort_isp(vha)) {
 259                                         /* Failed. retry later. */
 260                                         set_bit(ISP_ABORT_NEEDED,
 261                                             &vha->dpc_flags);
 262                                 }
 263                                 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
 264                                 ql_dbg(ql_dbg_mbx, vha, 0x1162,
 265                                     "Finished abort_isp.\n");
 266                         }
 267                 }
 268         }
 269
 270 premature_exit:
 271         /* Allow next mbx cmd to come in. */
 272         complete(&ha->mbx_cmd_comp);
 273
 274         if (rval) {
 275                 ql_log(ql_log_warn, base_vha, 0x1163,
 276                     "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
 277                     "mb[3]=%x, cmd=%x ****.\n",
 278                     mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
 279         } else {
 280                 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
 281         }
 282
 283         return rval;
 284 }
 285
 286 /*
 287  * qlafx00_driver_shutdown
 288  *      Indicate a driver shutdown to firmware.
 289  *
 290  * Input:
 291  *      ha = adapter block pointer.
 292  *
 293  * Returns:
 294  *      local function return status code.
 295  *
 296  * Context:
 297  *      Kernel context.
 298  */
 299 int
 300 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
 301 {
 302         int rval;
 303         struct mbx_cmd_32 mc;
 304         struct mbx_cmd_32 *mcp = &mc;
 305
 306         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
 307             "Entered %s.\n", __func__);
 308
 309         mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
 310         mcp->out_mb = MBX_0;
 311         mcp->in_mb = MBX_0;
 312         if (tmo)
 313                 mcp->tov = tmo;
 314         else
 315                 mcp->tov = MBX_TOV_SECONDS;
 316         mcp->flags = 0;
 317         rval = qlafx00_mailbox_command(vha, mcp);
 318
 319         if (rval != QLA_SUCCESS) {
 320                 ql_dbg(ql_dbg_mbx, vha, 0x1167,
 321                     "Failed=%x.\n", rval);
 322         } else {
 323                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
 324                     "Done %s.\n", __func__);
 325         }
 326
 327         return rval;
 328 }
 329
 330 /*
 331  * qlafx00_get_firmware_state
 332  *      Get adapter firmware state.
 333  *
 334  * Input:
 335  *      ha = adapter block pointer.
 336  *      TARGET_QUEUE_LOCK must be released.
 337  *      ADAPTER_STATE_LOCK must be released.
 338  *
 339  * Returns:
 340  *      qla7xxx local function return status code.
 341  *
 342  * Context:
 343  *      Kernel context.
 344  */
 345 static int
 346 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
 347 {
 348         int rval;
 349         struct mbx_cmd_32 mc;
 350         struct mbx_cmd_32 *mcp = &mc;
 351
 352         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
 353             "Entered %s.\n", __func__);
 354
 355         mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
 356         mcp->out_mb = MBX_0;
 357         mcp->in_mb = MBX_1|MBX_0;
 358         mcp->tov = MBX_TOV_SECONDS;
 359         mcp->flags = 0;
 360         rval = qlafx00_mailbox_command(vha, mcp);
 361
 362         /* Return firmware states. */
 363         states[0] = mcp->mb[1];
 364
 365         if (rval != QLA_SUCCESS) {
 366                 ql_dbg(ql_dbg_mbx, vha, 0x116a,
 367                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
 368         } else {
 369                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
 370                     "Done %s.\n", __func__);
 371         }
 372         return rval;
 373 }
 374
 375 /*
 376  * qlafx00_init_firmware
 377  *      Initialize adapter firmware.
 378  *
 379  * Input:
 380  *      ha = adapter block pointer.
 381  *      dptr = Initialization control block pointer.
 382  *      size = size of initialization control block.
 383  *      TARGET_QUEUE_LOCK must be released.
 384  *      ADAPTER_STATE_LOCK must be released.
 385  *
 386  * Returns:
 387  *      qlafx00 local function return status code.
 388  *
 389  * Context:
 390  *      Kernel context.
 391  */
 392 int
 393 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
 394 {
 395         int rval;
 396         struct mbx_cmd_32 mc;
 397         struct mbx_cmd_32 *mcp = &mc;
 398         struct qla_hw_data *ha = vha->hw;
 399
 400         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
 401             "Entered %s.\n", __func__);
 402
 403         mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
 404
 405         mcp->mb[1] = 0;
 406         mcp->mb[2] = MSD(ha->init_cb_dma);
 407         mcp->mb[3] = LSD(ha->init_cb_dma);
 408
 409         mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
 410         mcp->in_mb = MBX_0;
 411         mcp->buf_size = size;
 412         mcp->flags = MBX_DMA_OUT;
 413         mcp->tov = MBX_TOV_SECONDS;
 414         rval = qlafx00_mailbox_command(vha, mcp);
 415
 416         if (rval != QLA_SUCCESS) {
 417                 ql_dbg(ql_dbg_mbx, vha, 0x116d,
 418                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
 419         } else {
 420                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
 421                     "Done %s.\n", __func__);
 422         }
 423         return rval;
 424 }
 425
 426 /*
 427  * qlafx00_mbx_reg_test
 428  */
 429 static int
 430 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
 431 {
 432         int rval;
 433         struct mbx_cmd_32 mc;
 434         struct mbx_cmd_32 *mcp = &mc;
 435
 436         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
 437             "Entered %s.\n", __func__);
 438
 439
 440         mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
 441         mcp->mb[1] = 0xAAAA;
 442         mcp->mb[2] = 0x5555;
 443         mcp->mb[3] = 0xAA55;
 444         mcp->mb[4] = 0x55AA;
 445         mcp->mb[5] = 0xA5A5;
 446         mcp->mb[6] = 0x5A5A;
 447         mcp->mb[7] = 0x2525;
 448         mcp->mb[8] = 0xBBBB;
 449         mcp->mb[9] = 0x6666;
 450         mcp->mb[10] = 0xBB66;
 451         mcp->mb[11] = 0x66BB;
 452         mcp->mb[12] = 0xB6B6;
 453         mcp->mb[13] = 0x6B6B;
 454         mcp->mb[14] = 0x3636;
 455         mcp->mb[15] = 0xCCCC;
 456
 457
 458         mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
 459                         MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
 460         mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
 461                         MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
 462         mcp->buf_size = 0;
 463         mcp->flags = MBX_DMA_OUT;
 464         mcp->tov = MBX_TOV_SECONDS;
 465         rval = qlafx00_mailbox_command(vha, mcp);
 466         if (rval == QLA_SUCCESS) {
 467                 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
 468                     mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
 469                         rval = QLA_FUNCTION_FAILED;
 470                 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
 471                     mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
 472                         rval = QLA_FUNCTION_FAILED;
 473                 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
 474                     mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
 475                         rval = QLA_FUNCTION_FAILED;
 476                 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
 477                     mcp->mb[31] != 0xCCCC)
 478                         rval = QLA_FUNCTION_FAILED;
 479         }
 480
 481         if (rval != QLA_SUCCESS) {
 482                 ql_dbg(ql_dbg_mbx, vha, 0x1170,
 483                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
 484         } else {
 485                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
 486                     "Done %s.\n", __func__);
 487         }
 488         return rval;
 489 }
 490
 491 /**
 492  * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
 493  * @vha: HA context
 494  *
 495  * Returns 0 on success.
 496  */
 497 int
 498 qlafx00_pci_config(scsi_qla_host_t *vha)
 499 {
 500         uint16_t w;
 501         struct qla_hw_data *ha = vha->hw;
 502
 503         pci_set_master(ha->pdev);
 504         pci_try_set_mwi(ha->pdev);
 505
 506         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
 507         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
 508         w &= ~PCI_COMMAND_INTX_DISABLE;
 509         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
 510
 511         /* PCIe -- adjust Maximum Read Request Size (2048). */
 512         if (pci_is_pcie(ha->pdev))
 513                 pcie_set_readrq(ha->pdev, 2048);
 514
 515         ha->chip_revision = ha->pdev->revision;
 516
 517         return QLA_SUCCESS;
 518 }
 519
 520 /**
 521  * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
 522  * @vha: HA context
 523  *
 524  */
 525 static inline void
 526 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
 527 {
 528         unsigned long flags = 0;
 529         struct qla_hw_data *ha = vha->hw;
 530         int i, core;
 531         uint32_t cnt;
 532         uint32_t reg_val;
 533
 534         spin_lock_irqsave(&ha->hardware_lock, flags);
 535
 536         QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0);
 537         QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0);
 538
 539         /* stop the XOR DMA engines */
 540         QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02);
 541         QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02);
 542         QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02);
 543         QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02);
 544
 545         /* stop the IDMA engines */
 546         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840);
 547         reg_val &= ~(1<<12);
 548         QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val);
 549
 550         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844);
 551         reg_val &= ~(1<<12);
 552         QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val);
 553
 554         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848);
 555         reg_val &= ~(1<<12);
 556         QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val);
 557
 558         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C);
 559         reg_val &= ~(1<<12);
 560         QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val);
 561
 562         for (i = 0; i < 100000; i++) {
 563                 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 &&
 564                     (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0)
 565                         break;
 566                 udelay(100);
 567         }
 568
 569         /* Set all 4 cores in reset */
 570         for (i = 0; i < 4; i++) {
 571                 QLAFX00_SET_HBA_SOC_REG(ha,
 572                     (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
 573                 QLAFX00_SET_HBA_SOC_REG(ha,
 574                     (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
 575         }
 576
 577         /* Reset all units in Fabric */
 578         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101));
 579
 580         /* */
 581         QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1);
 582         QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0);
 583
 584         /* Set all 4 core Memory Power Down Registers */
 585         for (i = 0; i < 5; i++) {
 586                 QLAFX00_SET_HBA_SOC_REG(ha,
 587                     (SOC_PWR_MANAGEMENT_PWR_DOWN_REG + 4*i), (0x0));
 588         }
 589
 590         /* Reset all interrupt control registers */
 591         for (i = 0; i < 115; i++) {
 592                 QLAFX00_SET_HBA_SOC_REG(ha,
 593                     (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
 594         }
 595
 596         /* Reset Timers control registers. per core */
 597         for (core = 0; core < 4; core++)
 598                 for (i = 0; i < 8; i++)
 599                         QLAFX00_SET_HBA_SOC_REG(ha,
 600                             (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
 601
 602         /* Reset per core IRQ ack register */
 603         for (core = 0; core < 4; core++)
 604                 QLAFX00_SET_HBA_SOC_REG(ha,
 605                     (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
 606
 607         /* Set Fabric control and config to defaults */
 608         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
 609         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
 610
 611         /* Kick in Fabric units */
 612         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
 613
 614         /* Kick in Core0 to start boot process */
 615         QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
 616
 617         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 618
 619         /* Wait 10secs for soft-reset to complete. */
 620         for (cnt = 10; cnt; cnt--) {
 621                 msleep(1000);
 622                 barrier();
 623         }
 624 }
 625
 626 /**
 627  * qlafx00_soft_reset() - Soft Reset ISPFx00.
 628  * @vha: HA context
 629  *
 630  * Returns 0 on success.
 631  */
 632 void
 633 qlafx00_soft_reset(scsi_qla_host_t *vha)
 634 {
 635         struct qla_hw_data *ha = vha->hw;
 636
 637         if (unlikely(pci_channel_offline(ha->pdev) &&
 638             ha->flags.pci_channel_io_perm_failure))
 639                 return;
 640
 641         ha->isp_ops->disable_intrs(ha);
 642         qlafx00_soc_cpu_reset(vha);
 643 }
 644
 645 /**
 646  * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
 647  * @vha: HA context
 648  *
 649  * Returns 0 on success.
 650  */
 651 int
 652 qlafx00_chip_diag(scsi_qla_host_t *vha)
 653 {
 654         int rval = 0;
 655         struct qla_hw_data *ha = vha->hw;
 656         struct req_que *req = ha->req_q_map[0];
 657
 658         ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
 659
 660         rval = qlafx00_mbx_reg_test(vha);
 661         if (rval) {
 662                 ql_log(ql_log_warn, vha, 0x1165,
 663                     "Failed mailbox send register test\n");
 664         } else {
 665                 /* Flag a successful rval */
 666                 rval = QLA_SUCCESS;
 667         }
 668         return rval;
 669 }
 670
 671 void
 672 qlafx00_config_rings(struct scsi_qla_host *vha)
 673 {
 674         struct qla_hw_data *ha = vha->hw;
 675         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
 676
 677         WRT_REG_DWORD(&reg->req_q_in, 0);
 678         WRT_REG_DWORD(&reg->req_q_out, 0);
 679
 680         WRT_REG_DWORD(&reg->rsp_q_in, 0);
 681         WRT_REG_DWORD(&reg->rsp_q_out, 0);
 682
 683         /* PCI posting */
 684         RD_REG_DWORD(&reg->rsp_q_out);
 685 }
 686
 687 char *
 688 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
 689 {
 690         struct qla_hw_data *ha = vha->hw;
 691
 692         if (pci_is_pcie(ha->pdev)) {
 693                 strcpy(str, "PCIe iSA");
 694                 return str;
 695         }
 696         return str;
 697 }
 698
 699 char *
 700 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 701 {
 702         struct qla_hw_data *ha = vha->hw;
 703
 704         snprintf(str, size, "%s", ha->mr.fw_version);
 705         return str;
 706 }
 707
 708 void
 709 qlafx00_enable_intrs(struct qla_hw_data *ha)
 710 {
 711         unsigned long flags = 0;
 712
 713         spin_lock_irqsave(&ha->hardware_lock, flags);
 714         ha->interrupts_on = 1;
 715         QLAFX00_ENABLE_ICNTRL_REG(ha);
 716         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 717 }
 718
 719 void
 720 qlafx00_disable_intrs(struct qla_hw_data *ha)
 721 {
 722         unsigned long flags = 0;
 723
 724         spin_lock_irqsave(&ha->hardware_lock, flags);
 725         ha->interrupts_on = 0;
 726         QLAFX00_DISABLE_ICNTRL_REG(ha);
 727         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 728 }
 729
 730 int
 731 qlafx00_abort_target(fc_port_t *fcport, uint64_t l, int tag)
 732 {
 733         return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
 734 }
 735
 736 int
 737 qlafx00_lun_reset(fc_port_t *fcport, uint64_t l, int tag)
 738 {
 739         return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
 740 }
 741
 742 int
 743 qlafx00_iospace_config(struct qla_hw_data *ha)
 744 {
 745         if (pci_request_selected_regions(ha->pdev, ha->bars,
 746             QLA2XXX_DRIVER_NAME)) {
 747                 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
 748                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
 749                     pci_name(ha->pdev));
 750                 goto iospace_error_exit;
 751         }
 752
 753         /* Use MMIO operations for all accesses. */
 754         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
 755                 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
 756                     "Invalid pci I/O region size (%s).\n",
 757                     pci_name(ha->pdev));
 758                 goto iospace_error_exit;
 759         }
 760         if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
 761                 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
 762                     "Invalid PCI mem BAR0 region size (%s), aborting\n",
 763                         pci_name(ha->pdev));
 764                 goto iospace_error_exit;
 765         }
 766
 767         ha->cregbase =
 768             ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
 769         if (!ha->cregbase) {
 770                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
 771                     "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
 772                 goto iospace_error_exit;
 773         }
 774
 775         if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
 776                 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
 777                     "region #2 not an MMIO resource (%s), aborting\n",
 778                     pci_name(ha->pdev));
 779                 goto iospace_error_exit;
 780         }
 781         if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
 782                 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
 783                     "Invalid PCI mem BAR2 region size (%s), aborting\n",
 784                         pci_name(ha->pdev));
 785                 goto iospace_error_exit;
 786         }
 787
 788         ha->iobase =
 789             ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
 790         if (!ha->iobase) {
 791                 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
 792                     "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
 793                 goto iospace_error_exit;
 794         }
 795
 796         /* Determine queue resources */
 797         ha->max_req_queues = ha->max_rsp_queues = 1;
 798
 799         ql_log_pci(ql_log_info, ha->pdev, 0x012c,
 800             "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
 801             ha->bars, ha->cregbase, ha->iobase);
 802
 803         return 0;
 804
 805 iospace_error_exit:
 806         return -ENOMEM;
 807 }
 808
 809 static void
 810 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
 811 {
 812         struct qla_hw_data *ha = vha->hw;
 813         struct req_que *req = ha->req_q_map[0];
 814         struct rsp_que *rsp = ha->rsp_q_map[0];
 815
 816         req->length_fx00 = req->length;
 817         req->ring_fx00 = req->ring;
 818         req->dma_fx00 = req->dma;
 819
 820         rsp->length_fx00 = rsp->length;
 821         rsp->ring_fx00 = rsp->ring;
 822         rsp->dma_fx00 = rsp->dma;
 823
 824         ql_dbg(ql_dbg_init, vha, 0x012d,
 825             "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
 826             "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
 827             req->length_fx00, (u64)req->dma_fx00);
 828
 829         ql_dbg(ql_dbg_init, vha, 0x012e,
 830             "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
 831             "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
 832             rsp->length_fx00, (u64)rsp->dma_fx00);
 833 }
 834
 835 static int
 836 qlafx00_config_queues(struct scsi_qla_host *vha)
 837 {
 838         struct qla_hw_data *ha = vha->hw;
 839         struct req_que *req = ha->req_q_map[0];
 840         struct rsp_que *rsp = ha->rsp_q_map[0];
 841         dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
 842
 843         req->length = ha->req_que_len;
 844         req->ring = (void __force *)ha->iobase + ha->req_que_off;
 845         req->dma = bar2_hdl + ha->req_que_off;
 846         if ((!req->ring) || (req->length == 0)) {
 847                 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
 848                     "Unable to allocate memory for req_ring\n");
 849                 return QLA_FUNCTION_FAILED;
 850         }
 851
 852         ql_dbg(ql_dbg_init, vha, 0x0130,
 853             "req: %p req_ring pointer %p req len 0x%x "
 854             "req off 0x%x\n, req->dma: 0x%llx",
 855             req, req->ring, req->length,
 856             ha->req_que_off, (u64)req->dma);
 857
 858         rsp->length = ha->rsp_que_len;
 859         rsp->ring = (void __force *)ha->iobase + ha->rsp_que_off;
 860         rsp->dma = bar2_hdl + ha->rsp_que_off;
 861         if ((!rsp->ring) || (rsp->length == 0)) {
 862                 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
 863                     "Unable to allocate memory for rsp_ring\n");
 864                 return QLA_FUNCTION_FAILED;
 865         }
 866
 867         ql_dbg(ql_dbg_init, vha, 0x0132,
 868             "rsp: %p rsp_ring pointer %p rsp len 0x%x "
 869             "rsp off 0x%x, rsp->dma: 0x%llx\n",
 870             rsp, rsp->ring, rsp->length,
 871             ha->rsp_que_off, (u64)rsp->dma);
 872
 873         return QLA_SUCCESS;
 874 }
 875
 876 static int
 877 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
 878 {
 879         int rval = 0;
 880         unsigned long wtime;
 881         uint16_t wait_time;     /* Wait time */
 882         struct qla_hw_data *ha = vha->hw;
 883         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
 884         uint32_t aenmbx, aenmbx7 = 0;
 885         uint32_t pseudo_aen;
 886         uint32_t state[5];
 887         bool done = false;
 888
 889         /* 30 seconds wait - Adjust if required */
 890         wait_time = 30;
 891
 892         pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
 893         if (pseudo_aen == 1) {
 894                 aenmbx7 = RD_REG_DWORD(&reg->initval7);
 895                 ha->mbx_intr_code = MSW(aenmbx7);
 896                 ha->rqstq_intr_code = LSW(aenmbx7);
 897                 rval = qlafx00_driver_shutdown(vha, 10);
 898                 if (rval != QLA_SUCCESS)
 899                         qlafx00_soft_reset(vha);
 900         }
 901
 902         /* wait time before firmware ready */
 903         wtime = jiffies + (wait_time * HZ);
 904         do {
 905                 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
 906                 barrier();
 907                 ql_dbg(ql_dbg_mbx, vha, 0x0133,
 908                     "aenmbx: 0x%x\n", aenmbx);
 909
 910                 switch (aenmbx) {
 911                 case MBA_FW_NOT_STARTED:
 912                 case MBA_FW_STARTING:
 913                         break;
 914
 915                 case MBA_SYSTEM_ERR:
 916                 case MBA_REQ_TRANSFER_ERR:
 917                 case MBA_RSP_TRANSFER_ERR:
 918                 case MBA_FW_INIT_FAILURE:
 919                         qlafx00_soft_reset(vha);
 920                         break;
 921
 922                 case MBA_FW_RESTART_CMPLT:
 923                         /* Set the mbx and rqstq intr code */
 924                         aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
 925                         ha->mbx_intr_code = MSW(aenmbx7);
 926                         ha->rqstq_intr_code = LSW(aenmbx7);
 927                         ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
 928                         ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
 929                         ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
 930                         ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
 931                         WRT_REG_DWORD(&reg->aenmailbox0, 0);
 932                         RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
 933                         ql_dbg(ql_dbg_init, vha, 0x0134,
 934                             "f/w returned mbx_intr_code: 0x%x, "
 935                             "rqstq_intr_code: 0x%x\n",
 936                             ha->mbx_intr_code, ha->rqstq_intr_code);
 937                         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
 938                         rval = QLA_SUCCESS;
 939                         done = true;
 940                         break;
 941
 942                 default:
 943                         if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
 944                                 break;
 945
 946                         /* If fw is apparently not ready. In order to continue,
 947                          * we might need to issue Mbox cmd, but the problem is
 948                          * that the DoorBell vector values that come with the
 949                          * 8060 AEN are most likely gone by now (and thus no
 950                          * bell would be rung on the fw side when mbox cmd is
 951                          * issued). We have to therefore grab the 8060 AEN
 952                          * shadow regs (filled in by FW when the last 8060
 953                          * AEN was being posted).
 954                          * Do the following to determine what is needed in
 955                          * order to get the FW ready:
 956                          * 1. reload the 8060 AEN values from the shadow regs
 957                          * 2. clear int status to get rid of possible pending
 958                          *    interrupts
 959                          * 3. issue Get FW State Mbox cmd to determine fw state
 960                          * Set the mbx and rqstq intr code from Shadow Regs
 961                          */
 962                         aenmbx7 = RD_REG_DWORD(&reg->initval7);
 963                         ha->mbx_intr_code = MSW(aenmbx7);
 964                         ha->rqstq_intr_code = LSW(aenmbx7);
 965                         ha->req_que_off = RD_REG_DWORD(&reg->initval1);
 966                         ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
 967                         ha->req_que_len = RD_REG_DWORD(&reg->initval5);
 968                         ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
 969                         ql_dbg(ql_dbg_init, vha, 0x0135,
 970                             "f/w returned mbx_intr_code: 0x%x, "
 971                             "rqstq_intr_code: 0x%x\n",
 972                             ha->mbx_intr_code, ha->rqstq_intr_code);
 973                         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
 974
 975                         /* Get the FW state */
 976                         rval = qlafx00_get_firmware_state(vha, state);
 977                         if (rval != QLA_SUCCESS) {
 978                                 /* Retry if timer has not expired */
 979                                 break;
 980                         }
 981
 982                         if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
 983                                 /* Firmware is waiting to be
 984                                  * initialized by driver
 985                                  */
 986                                 rval = QLA_SUCCESS;
 987                                 done = true;
 988                                 break;
 989                         }
 990
 991                         /* Issue driver shutdown and wait until f/w recovers.
 992                          * Driver should continue to poll until 8060 AEN is
 993                          * received indicating firmware recovery.
 994                          */
 995                         ql_dbg(ql_dbg_init, vha, 0x0136,
 996                             "Sending Driver shutdown fw_state 0x%x\n",
 997                             state[0]);
 998
 999                         rval = qlafx00_driver_shutdown(vha, 10);
1000                         if (rval != QLA_SUCCESS) {
1001                                 rval = QLA_FUNCTION_FAILED;
1002                                 break;
1003                         }
1004                         msleep(500);
1005
1006                         wtime = jiffies + (wait_time * HZ);
1007                         break;
1008                 }
1009
1010                 if (!done) {
1011                         if (time_after_eq(jiffies, wtime)) {
1012                                 ql_dbg(ql_dbg_init, vha, 0x0137,
1013                                     "Init f/w failed: aen[7]: 0x%x\n",
1014                                     RD_REG_DWORD(&reg->aenmailbox7));
1015                                 rval = QLA_FUNCTION_FAILED;
1016                                 done = true;
1017                                 break;
1018                         }
1019                         /* Delay for a while */
1020                         msleep(500);
1021                 }
1022         } while (!done);
1023
1024         if (rval)
1025                 ql_dbg(ql_dbg_init, vha, 0x0138,
1026                     "%s **** FAILED ****.\n", __func__);
1027         else
1028                 ql_dbg(ql_dbg_init, vha, 0x0139,
1029                     "%s **** SUCCESS ****.\n", __func__);
1030
1031         return rval;
1032 }
1033
1034 /*
1035  * qlafx00_fw_ready() - Waits for firmware ready.
1036  * @ha: HA context
1037  *
1038  * Returns 0 on success.
1039  */
1040 int
1041 qlafx00_fw_ready(scsi_qla_host_t *vha)
1042 {
1043         int             rval;
1044         unsigned long   wtime;
1045         uint16_t        wait_time;      /* Wait time if loop is coming ready */
1046         uint32_t        state[5];
1047
1048         rval = QLA_SUCCESS;
1049
1050         wait_time = 10;
1051
1052         /* wait time before firmware ready */
1053         wtime = jiffies + (wait_time * HZ);
1054
1055         /* Wait for ISP to finish init */
1056         if (!vha->flags.init_done)
1057                 ql_dbg(ql_dbg_init, vha, 0x013a,
1058                     "Waiting for init to complete...\n");
1059
1060         do {
1061                 rval = qlafx00_get_firmware_state(vha, state);
1062
1063                 if (rval == QLA_SUCCESS) {
1064                         if (state[0] == FSTATE_FX00_INITIALIZED) {
1065                                 ql_dbg(ql_dbg_init, vha, 0x013b,
1066                                     "fw_state=%x\n", state[0]);
1067                                 rval = QLA_SUCCESS;
1068                                         break;
1069                         }
1070                 }
1071                 rval = QLA_FUNCTION_FAILED;
1072
1073                 if (time_after_eq(jiffies, wtime))
1074                         break;
1075
1076                 /* Delay for a while */
1077                 msleep(500);
1078
1079                 ql_dbg(ql_dbg_init, vha, 0x013c,
1080                     "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1081         } while (1);
1082
1083
1084         if (rval)
1085                 ql_dbg(ql_dbg_init, vha, 0x013d,
1086                     "Firmware ready **** FAILED ****.\n");
1087         else
1088                 ql_dbg(ql_dbg_init, vha, 0x013e,
1089                     "Firmware ready **** SUCCESS ****.\n");
1090
1091         return rval;
1092 }
1093
1094 static int
1095 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1096         struct list_head *new_fcports)
1097 {
1098         int             rval;
1099         uint16_t        tgt_id;
1100         fc_port_t       *fcport, *new_fcport;
1101         int             found;
1102         struct qla_hw_data *ha = vha->hw;
1103
1104         rval = QLA_SUCCESS;
1105
1106         if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1107                 return QLA_FUNCTION_FAILED;
1108
1109         if ((atomic_read(&vha->loop_down_timer) ||
1110              STATE_TRANSITION(vha))) {
1111                 atomic_set(&vha->loop_down_timer, 0);
1112                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1113                 return QLA_FUNCTION_FAILED;
1114         }
1115
1116         ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1117             "Listing Target bit map...\n");
1118         ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1119             0x2089, (uint8_t *)ha->gid_list, 32);
1120
1121         /* Allocate temporary rmtport for any new rmtports discovered. */
1122         new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1123         if (new_fcport == NULL)
1124                 return QLA_MEMORY_ALLOC_FAILED;
1125
1126         for_each_set_bit(tgt_id, (void *)ha->gid_list,
1127             QLAFX00_TGT_NODE_LIST_SIZE) {
1128
1129                 /* Send get target node info */
1130                 new_fcport->tgt_id = tgt_id;
1131                 rval = qlafx00_fx_disc(vha, new_fcport,
1132                     FXDISC_GET_TGT_NODE_INFO);
1133                 if (rval != QLA_SUCCESS) {
1134                         ql_log(ql_log_warn, vha, 0x208a,
1135                             "Target info scan failed -- assuming zero-entry "
1136                             "result...\n");
1137                         continue;
1138                 }
1139
1140                 /* Locate matching device in database. */
1141                 found = 0;
1142                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1143                         if (memcmp(new_fcport->port_name,
1144                             fcport->port_name, WWN_SIZE))
1145                                 continue;
1146
1147                         found++;
1148
1149                         /*
1150                          * If tgt_id is same and state FCS_ONLINE, nothing
1151                          * changed.
1152                          */
1153                         if (fcport->tgt_id == new_fcport->tgt_id &&
1154                             atomic_read(&fcport->state) == FCS_ONLINE)
1155                                 break;
1156
1157                         /*
1158                          * Tgt ID changed or device was marked to be updated.
1159                          */
1160                         ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1161                             "TGT-ID Change(%s): Present tgt id: "
1162                             "0x%x state: 0x%x "
1163                             "wwnn = %llx wwpn = %llx.\n",
1164                             __func__, fcport->tgt_id,
1165                             atomic_read(&fcport->state),
1166                             (unsigned long long)wwn_to_u64(fcport->node_name),
1167                             (unsigned long long)wwn_to_u64(fcport->port_name));
1168
1169                         ql_log(ql_log_info, vha, 0x208c,
1170                             "TGT-ID Announce(%s): Discovered tgt "
1171                             "id 0x%x wwnn = %llx "
1172                             "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1173                             (unsigned long long)
1174                             wwn_to_u64(new_fcport->node_name),
1175                             (unsigned long long)
1176                             wwn_to_u64(new_fcport->port_name));
1177
1178                         if (atomic_read(&fcport->state) != FCS_ONLINE) {
1179                                 fcport->old_tgt_id = fcport->tgt_id;
1180                                 fcport->tgt_id = new_fcport->tgt_id;
1181                                 ql_log(ql_log_info, vha, 0x208d,
1182                                    "TGT-ID: New fcport Added: %p\n", fcport);
1183                                 qla2x00_update_fcport(vha, fcport);
1184                         } else {
1185                                 ql_log(ql_log_info, vha, 0x208e,
1186                                     " Existing TGT-ID %x did not get "
1187                                     " offline event from firmware.\n",
1188                                     fcport->old_tgt_id);
1189                                 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1190                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1191                                 kfree(new_fcport);
1192                                 return rval;
1193                         }
1194                         break;
1195                 }
1196
1197                 if (found)
1198                         continue;
1199
1200                 /* If device was not in our fcports list, then add it. */
1201                 list_add_tail(&new_fcport->list, new_fcports);
1202
1203                 /* Allocate a new replacement fcport. */
1204                 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1205                 if (new_fcport == NULL)
1206                         return QLA_MEMORY_ALLOC_FAILED;
1207         }
1208
1209         kfree(new_fcport);
1210         return rval;
1211 }
1212
1213 /*
1214  * qlafx00_configure_all_targets
1215  *      Setup target devices with node ID's.
1216  *
1217  * Input:
1218  *      ha = adapter block pointer.
1219  *
1220  * Returns:
1221  *      0 = success.
1222  *      BIT_0 = error
1223  */
1224 static int
1225 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1226 {
1227         int rval;
1228         fc_port_t *fcport, *rmptemp;
1229         LIST_HEAD(new_fcports);
1230
1231         rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1232             FXDISC_GET_TGT_NODE_LIST);
1233         if (rval != QLA_SUCCESS) {
1234                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1235                 return rval;
1236         }
1237
1238         rval = qlafx00_find_all_targets(vha, &new_fcports);
1239         if (rval != QLA_SUCCESS) {
1240                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1241                 return rval;
1242         }
1243
1244         /*
1245          * Delete all previous devices marked lost.
1246          */
1247         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1248                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1249                         break;
1250
1251                 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1252                         if (fcport->port_type != FCT_INITIATOR)
1253                                 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1254                 }
1255         }
1256
1257         /*
1258          * Add the new devices to our devices list.
1259          */
1260         list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1261                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1262                         break;
1263
1264                 qla2x00_update_fcport(vha, fcport);
1265                 list_move_tail(&fcport->list, &vha->vp_fcports);
1266                 ql_log(ql_log_info, vha, 0x208f,
1267                     "Attach new target id 0x%x wwnn = %llx "
1268                     "wwpn = %llx.\n",
1269                     fcport->tgt_id,
1270                     (unsigned long long)wwn_to_u64(fcport->node_name),
1271                     (unsigned long long)wwn_to_u64(fcport->port_name));
1272         }
1273
1274         /* Free all new device structures not processed. */
1275         list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1276                 list_del(&fcport->list);
1277                 kfree(fcport);
1278         }
1279
1280         return rval;
1281 }
1282
1283 /*
1284  * qlafx00_configure_devices
1285  *      Updates Fibre Channel Device Database with what is actually on loop.
1286  *
1287  * Input:
1288  *      ha                = adapter block pointer.
1289  *
1290  * Returns:
1291  *      0 = success.
1292  *      1 = error.
1293  *      2 = database was full and device was not configured.
1294  */
1295 int
1296 qlafx00_configure_devices(scsi_qla_host_t *vha)
1297 {
1298         int  rval;
1299         unsigned long flags;
1300         rval = QLA_SUCCESS;
1301
1302         flags = vha->dpc_flags;
1303
1304         ql_dbg(ql_dbg_disc, vha, 0x2090,
1305             "Configure devices -- dpc flags =0x%lx\n", flags);
1306
1307         rval = qlafx00_configure_all_targets(vha);
1308
1309         if (rval == QLA_SUCCESS) {
1310                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1311                         rval = QLA_FUNCTION_FAILED;
1312                 } else {
1313                         atomic_set(&vha->loop_state, LOOP_READY);
1314                         ql_log(ql_log_info, vha, 0x2091,
1315                             "Device Ready\n");
1316                 }
1317         }
1318
1319         if (rval) {
1320                 ql_dbg(ql_dbg_disc, vha, 0x2092,
1321                     "%s *** FAILED ***.\n", __func__);
1322         } else {
1323                 ql_dbg(ql_dbg_disc, vha, 0x2093,
1324                     "%s: exiting normally.\n", __func__);
1325         }
1326         return rval;
1327 }
1328
1329 static void
1330 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
1331 {
1332         struct qla_hw_data *ha = vha->hw;
1333         fc_port_t *fcport;
1334
1335         vha->flags.online = 0;
1336         ha->mr.fw_hbt_en = 0;
1337
1338         if (!critemp) {
1339                 ha->flags.chip_reset_done = 0;
1340                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1341                 vha->qla_stats.total_isp_aborts++;
1342                 ql_log(ql_log_info, vha, 0x013f,
1343                     "Performing ISP error recovery - ha = %p.\n", ha);
1344                 ha->isp_ops->reset_chip(vha);
1345         }
1346
1347         if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1348                 atomic_set(&vha->loop_state, LOOP_DOWN);
1349                 atomic_set(&vha->loop_down_timer,
1350                     QLAFX00_LOOP_DOWN_TIME);
1351         } else {
1352                 if (!atomic_read(&vha->loop_down_timer))
1353                         atomic_set(&vha->loop_down_timer,
1354                             QLAFX00_LOOP_DOWN_TIME);
1355         }
1356
1357         /* Clear all async request states across all VPs. */
1358         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1359                 fcport->flags = 0;
1360                 if (atomic_read(&fcport->state) == FCS_ONLINE)
1361                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1362         }
1363
1364         if (!ha->flags.eeh_busy) {
1365                 if (critemp) {
1366                         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1367                 } else {
1368                         /* Requeue all commands in outstanding command list. */
1369                         qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1370                 }
1371         }
1372
1373         qla2x00_free_irqs(vha);
1374         if (critemp)
1375                 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1376         else
1377                 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1378
1379         /* Clear the Interrupts */
1380         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1381
1382         ql_log(ql_log_info, vha, 0x0140,
1383             "%s Done done - ha=%p.\n", __func__, ha);
1384 }
1385
1386 /**
1387  * qlafx00_init_response_q_entries() - Initializes response queue entries.
1388  * @rsp: response queue
1389  *
1390  * Beginning of request ring has initialization control block already built
1391  * by nvram config routine.
1392  *
1393  * Returns 0 on success.
1394  */
1395 void
1396 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1397 {
1398         uint16_t cnt;
1399         response_t *pkt;
1400
1401         rsp->ring_ptr = rsp->ring;
1402         rsp->ring_index    = 0;
1403         rsp->status_srb = NULL;
1404         pkt = rsp->ring_ptr;
1405         for (cnt = 0; cnt < rsp->length; cnt++) {
1406                 pkt->signature = RESPONSE_PROCESSED;
1407                 WRT_REG_DWORD((void __force __iomem *)&pkt->signature,
1408                     RESPONSE_PROCESSED);
1409                 pkt++;
1410         }
1411 }
1412
1413 int
1414 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1415 {
1416         uint32_t status = QLA_FUNCTION_FAILED;
1417         struct qla_hw_data *ha = vha->hw;
1418         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1419         uint32_t aenmbx7;
1420
1421         qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1422
1423         aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1424         ha->mbx_intr_code = MSW(aenmbx7);
1425         ha->rqstq_intr_code = LSW(aenmbx7);
1426         ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1427         ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1428         ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1429         ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1430
1431         ql_dbg(ql_dbg_disc, vha, 0x2094,
1432             "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1433             " Req que offset 0x%x Rsp que offset 0x%x\n",
1434             ha->mbx_intr_code, ha->rqstq_intr_code,
1435             ha->req_que_off, ha->rsp_que_len);
1436
1437         /* Clear the Interrupts */
1438         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1439
1440         status = qla2x00_init_rings(vha);
1441         if (!status) {
1442                 vha->flags.online = 1;
1443
1444                 /* if no cable then assume it's good */
1445                 if ((vha->device_flags & DFLG_NO_CABLE))
1446                         status = 0;
1447                 /* Register system information */
1448                 if (qlafx00_fx_disc(vha,
1449                     &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1450                         ql_dbg(ql_dbg_disc, vha, 0x2095,
1451                             "failed to register host info\n");
1452         }
1453         scsi_unblock_requests(vha->host);
1454         return status;
1455 }
1456
1457 void
1458 qlafx00_timer_routine(scsi_qla_host_t *vha)
1459 {
1460         struct qla_hw_data *ha = vha->hw;
1461         uint32_t fw_heart_beat;
1462         uint32_t aenmbx0;
1463         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1464         uint32_t tempc;
1465
1466         /* Check firmware health */
1467         if (ha->mr.fw_hbt_cnt)
1468                 ha->mr.fw_hbt_cnt--;
1469         else {
1470                 if ((!ha->flags.mr_reset_hdlr_active) &&
1471                     (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1472                     (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1473                     (ha->mr.fw_hbt_en)) {
1474                         fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1475                         if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1476                                 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1477                                 ha->mr.fw_hbt_miss_cnt = 0;
1478                         } else {
1479                                 ha->mr.fw_hbt_miss_cnt++;
1480                                 if (ha->mr.fw_hbt_miss_cnt ==
1481                                     QLAFX00_HEARTBEAT_MISS_CNT) {
1482                                         set_bit(ISP_ABORT_NEEDED,
1483                                             &vha->dpc_flags);
1484                                         qla2xxx_wake_dpc(vha);
1485                                         ha->mr.fw_hbt_miss_cnt = 0;
1486                                 }
1487                         }
1488                 }
1489                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1490         }
1491
1492         if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1493                 /* Reset recovery to be performed in timer routine */
1494                 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1495                 if (ha->mr.fw_reset_timer_exp) {
1496                         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1497                         qla2xxx_wake_dpc(vha);
1498                         ha->mr.fw_reset_timer_exp = 0;
1499                 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1500                         /* Wake up DPC to rescan the targets */
1501                         set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1502                         clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1503                         qla2xxx_wake_dpc(vha);
1504                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1505                 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1506                     (!ha->mr.fw_hbt_en)) {
1507                         ha->mr.fw_hbt_en = 1;
1508                 } else if (!ha->mr.fw_reset_timer_tick) {
1509                         if (aenmbx0 == ha->mr.old_aenmbx0_state)
1510                                 ha->mr.fw_reset_timer_exp = 1;
1511                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1512                 } else if (aenmbx0 == 0xFFFFFFFF) {
1513                         uint32_t data0, data1;
1514
1515                         data0 = QLAFX00_RD_REG(ha,
1516                             QLAFX00_BAR1_BASE_ADDR_REG);
1517                         data1 = QLAFX00_RD_REG(ha,
1518                             QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1519
1520                         data0 &= 0xffff0000;
1521                         data1 &= 0x0000ffff;
1522
1523                         QLAFX00_WR_REG(ha,
1524                             QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1525                             (data0 | data1));
1526                 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1527                         ha->mr.fw_reset_timer_tick =
1528                             QLAFX00_MAX_RESET_INTERVAL;
1529                 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1530                         ha->mr.fw_reset_timer_tick =
1531                             QLAFX00_MAX_RESET_INTERVAL;
1532                 }
1533                 if (ha->mr.old_aenmbx0_state != aenmbx0) {
1534                         ha->mr.old_aenmbx0_state = aenmbx0;
1535                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1536                 }
1537                 ha->mr.fw_reset_timer_tick--;
1538         }
1539         if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1540                 /*
1541                  * Critical temperature recovery to be
1542                  * performed in timer routine
1543                  */
1544                 if (ha->mr.fw_critemp_timer_tick == 0) {
1545                         tempc = QLAFX00_GET_TEMPERATURE(ha);
1546                         ql_dbg(ql_dbg_timer, vha, 0x6012,
1547                             "ISPFx00(%s): Critical temp timer, "
1548                             "current SOC temperature: %d\n",
1549                             __func__, tempc);
1550                         if (tempc < ha->mr.critical_temperature) {
1551                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1552                                 clear_bit(FX00_CRITEMP_RECOVERY,
1553                                     &vha->dpc_flags);
1554                                 qla2xxx_wake_dpc(vha);
1555                         }
1556                         ha->mr.fw_critemp_timer_tick =
1557                             QLAFX00_CRITEMP_INTERVAL;
1558                 } else {
1559                         ha->mr.fw_critemp_timer_tick--;
1560                 }
1561         }
1562         if (ha->mr.host_info_resend) {
1563                 /*
1564                  * Incomplete host info might be sent to firmware
1565                  * durinng system boot - info should be resend
1566                  */
1567                 if (ha->mr.hinfo_resend_timer_tick == 0) {
1568                         ha->mr.host_info_resend = false;
1569                         set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1570                         ha->mr.hinfo_resend_timer_tick =
1571                             QLAFX00_HINFO_RESEND_INTERVAL;
1572                         qla2xxx_wake_dpc(vha);
1573                 } else {
1574                         ha->mr.hinfo_resend_timer_tick--;
1575                 }
1576         }
1577
1578 }
1579
1580 /*
1581  *  qlfx00a_reset_initialize
1582  *      Re-initialize after a iSA device reset.
1583  *
1584  * Input:
1585  *      ha  = adapter block pointer.
1586  *
1587  * Returns:
1588  *      0 = success
1589  */
1590 int
1591 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1592 {
1593         struct qla_hw_data *ha = vha->hw;
1594
1595         if (vha->device_flags & DFLG_DEV_FAILED) {
1596                 ql_dbg(ql_dbg_init, vha, 0x0142,
1597                     "Device in failed state\n");
1598                 return QLA_SUCCESS;
1599         }
1600
1601         ha->flags.mr_reset_hdlr_active = 1;
1602
1603         if (vha->flags.online) {
1604                 scsi_block_requests(vha->host);
1605                 qlafx00_abort_isp_cleanup(vha, false);
1606         }
1607
1608         ql_log(ql_log_info, vha, 0x0143,
1609             "(%s): succeeded.\n", __func__);
1610         ha->flags.mr_reset_hdlr_active = 0;
1611         return QLA_SUCCESS;
1612 }
1613
1614 /*
1615  *  qlafx00_abort_isp
1616  *      Resets ISP and aborts all outstanding commands.
1617  *
1618  * Input:
1619  *      ha  = adapter block pointer.
1620  *
1621  * Returns:
1622  *      0 = success
1623  */
1624 int
1625 qlafx00_abort_isp(scsi_qla_host_t *vha)
1626 {
1627         struct qla_hw_data *ha = vha->hw;
1628
1629         if (vha->flags.online) {
1630                 if (unlikely(pci_channel_offline(ha->pdev) &&
1631                     ha->flags.pci_channel_io_perm_failure)) {
1632                         clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1633                         return QLA_SUCCESS;
1634                 }
1635
1636                 scsi_block_requests(vha->host);
1637                 qlafx00_abort_isp_cleanup(vha, false);
1638         } else {
1639                 scsi_block_requests(vha->host);
1640                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1641                 vha->qla_stats.total_isp_aborts++;
1642                 ha->isp_ops->reset_chip(vha);
1643                 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1644                 /* Clear the Interrupts */
1645                 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1646         }
1647
1648         ql_log(ql_log_info, vha, 0x0145,
1649             "(%s): succeeded.\n", __func__);
1650
1651         return QLA_SUCCESS;
1652 }
1653
1654 static inline fc_port_t*
1655 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1656 {
1657         fc_port_t       *fcport;
1658
1659         /* Check for matching device in remote port list. */
1660         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1661                 if (fcport->tgt_id == tgt_id) {
1662                         ql_dbg(ql_dbg_async, vha, 0x5072,
1663                             "Matching fcport(%p) found with TGT-ID: 0x%x "
1664                             "and Remote TGT_ID: 0x%x\n",
1665                             fcport, fcport->tgt_id, tgt_id);
1666                         return fcport;
1667                 }
1668         }
1669         return NULL;
1670 }
1671
1672 static void
1673 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1674 {
1675         fc_port_t       *fcport;
1676
1677         ql_log(ql_log_info, vha, 0x5073,
1678             "Detach TGT-ID: 0x%x\n", tgt_id);
1679
1680         fcport = qlafx00_get_fcport(vha, tgt_id);
1681         if (!fcport)
1682                 return;
1683
1684         qla2x00_mark_device_lost(vha, fcport, 0, 0);
1685
1686         return;
1687 }
1688
1689 int
1690 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1691 {
1692         int rval = 0;
1693         uint32_t aen_code, aen_data;
1694
1695         aen_code = FCH_EVT_VENDOR_UNIQUE;
1696         aen_data = evt->u.aenfx.evtcode;
1697
1698         switch (evt->u.aenfx.evtcode) {
1699         case QLAFX00_MBA_PORT_UPDATE:           /* Port database update */
1700                 if (evt->u.aenfx.mbx[1] == 0) {
1701                         if (evt->u.aenfx.mbx[2] == 1) {
1702                                 if (!vha->flags.fw_tgt_reported)
1703                                         vha->flags.fw_tgt_reported = 1;
1704                                 atomic_set(&vha->loop_down_timer, 0);
1705                                 atomic_set(&vha->loop_state, LOOP_UP);
1706                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1707                                 qla2xxx_wake_dpc(vha);
1708                         } else if (evt->u.aenfx.mbx[2] == 2) {
1709                                 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1710                         }
1711                 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1712                         if (evt->u.aenfx.mbx[2] == 1) {
1713                                 if (!vha->flags.fw_tgt_reported)
1714                                         vha->flags.fw_tgt_reported = 1;
1715                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1716                         } else if (evt->u.aenfx.mbx[2] == 2) {
1717                                 vha->device_flags |= DFLG_NO_CABLE;
1718                                 qla2x00_mark_all_devices_lost(vha, 1);
1719                         }
1720                 }
1721                 break;
1722         case QLAFX00_MBA_LINK_UP:
1723                 aen_code = FCH_EVT_LINKUP;
1724                 aen_data = 0;
1725                 break;
1726         case QLAFX00_MBA_LINK_DOWN:
1727                 aen_code = FCH_EVT_LINKDOWN;
1728                 aen_data = 0;
1729                 break;
1730         case QLAFX00_MBA_TEMP_CRIT:     /* Critical temperature event */
1731                 ql_log(ql_log_info, vha, 0x5082,
1732                     "Process critical temperature event "
1733                     "aenmb[0]: %x\n",
1734                     evt->u.aenfx.evtcode);
1735                 scsi_block_requests(vha->host);
1736                 qlafx00_abort_isp_cleanup(vha, true);
1737                 scsi_unblock_requests(vha->host);
1738                 break;
1739         }
1740
1741         fc_host_post_event(vha->host, fc_get_event_number(),
1742             aen_code, aen_data);
1743
1744         return rval;
1745 }
1746
1747 static void
1748 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1749 {
1750         u64 port_name = 0, node_name = 0;
1751
1752         port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1753         node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1754
1755         fc_host_node_name(vha->host) = node_name;
1756         fc_host_port_name(vha->host) = port_name;
1757         if (!pinfo->port_type)
1758                 vha->hw->current_topology = ISP_CFG_F;
1759         if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1760                 atomic_set(&vha->loop_state, LOOP_READY);
1761         else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1762                 atomic_set(&vha->loop_state, LOOP_DOWN);
1763         vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1764 }
1765
1766 static void
1767 qla2x00_fxdisc_iocb_timeout(void *data)
1768 {
1769         srb_t *sp = data;
1770         struct srb_iocb *lio = &sp->u.iocb_cmd;
1771
1772         complete(&lio->u.fxiocb.fxiocb_comp);
1773 }
1774
1775 static void
1776 qla2x00_fxdisc_sp_done(void *ptr, int res)
1777 {
1778         srb_t *sp = ptr;
1779         struct srb_iocb *lio = &sp->u.iocb_cmd;
1780
1781         complete(&lio->u.fxiocb.fxiocb_comp);
1782 }
1783
1784 int
1785 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1786 {
1787         srb_t *sp;
1788         struct srb_iocb *fdisc;
1789         int rval = QLA_FUNCTION_FAILED;
1790         struct qla_hw_data *ha = vha->hw;
1791         struct host_system_info *phost_info;
1792         struct register_host_info *preg_hsi;
1793         struct new_utsname *p_sysid = NULL;
1794
1795         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1796         if (!sp)
1797                 goto done;
1798
1799         sp->type = SRB_FXIOCB_DCMD;
1800         sp->name = "fxdisc";
1801
1802         fdisc = &sp->u.iocb_cmd;
1803         fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1804         qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1805
1806         switch (fx_type) {
1807         case FXDISC_GET_CONFIG_INFO:
1808         fdisc->u.fxiocb.flags =
1809                     SRB_FXDISC_RESP_DMA_VALID;
1810                 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1811                 break;
1812         case FXDISC_GET_PORT_INFO:
1813                 fdisc->u.fxiocb.flags =
1814                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1815                 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1816                 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1817                 break;
1818         case FXDISC_GET_TGT_NODE_INFO:
1819                 fdisc->u.fxiocb.flags =
1820                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1821                 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1822                 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1823                 break;
1824         case FXDISC_GET_TGT_NODE_LIST:
1825                 fdisc->u.fxiocb.flags =
1826                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1827                 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1828                 break;
1829         case FXDISC_REG_HOST_INFO:
1830                 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1831                 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1832                 p_sysid = utsname();
1833                 if (!p_sysid) {
1834                         ql_log(ql_log_warn, vha, 0x303c,
1835                             "Not able to get the system information\n");
1836                         goto done_free_sp;
1837                 }
1838                 break;
1839         case FXDISC_ABORT_IOCTL:
1840         default:
1841                 break;
1842         }
1843
1844         if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1845                 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1846                     fdisc->u.fxiocb.req_len,
1847                     &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1848                 if (!fdisc->u.fxiocb.req_addr)
1849                         goto done_free_sp;
1850
1851                 if (fx_type == FXDISC_REG_HOST_INFO) {
1852                         preg_hsi = (struct register_host_info *)
1853                                 fdisc->u.fxiocb.req_addr;
1854                         phost_info = &preg_hsi->hsi;
1855                         memset(preg_hsi, 0, sizeof(struct register_host_info));
1856                         phost_info->os_type = OS_TYPE_LINUX;
1857                         strncpy(phost_info->sysname,
1858                             p_sysid->sysname, SYSNAME_LENGTH);
1859                         strncpy(phost_info->nodename,
1860                             p_sysid->nodename, NODENAME_LENGTH);
1861                         if (!strcmp(phost_info->nodename, "(none)"))
1862                                 ha->mr.host_info_resend = true;
1863                         strncpy(phost_info->release,
1864                             p_sysid->release, RELEASE_LENGTH);
1865                         strncpy(phost_info->version,
1866                             p_sysid->version, VERSION_LENGTH);
1867                         strncpy(phost_info->machine,
1868                             p_sysid->machine, MACHINE_LENGTH);
1869                         strncpy(phost_info->domainname,
1870                             p_sysid->domainname, DOMNAME_LENGTH);
1871                         strncpy(phost_info->hostdriver,
1872                             QLA2XXX_VERSION, VERSION_LENGTH);
1873                         preg_hsi->utc = (uint64_t)ktime_get_real_seconds();
1874                         ql_dbg(ql_dbg_init, vha, 0x0149,
1875                             "ISP%04X: Host registration with firmware\n",
1876                             ha->pdev->device);
1877                         ql_dbg(ql_dbg_init, vha, 0x014a,
1878                             "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1879                             phost_info->os_type,
1880                             phost_info->sysname,
1881                             phost_info->nodename);
1882                         ql_dbg(ql_dbg_init, vha, 0x014b,
1883                             "release = '%s', version = '%s'\n",
1884                             phost_info->release,
1885                             phost_info->version);
1886                         ql_dbg(ql_dbg_init, vha, 0x014c,
1887                             "machine = '%s' "
1888                             "domainname = '%s', hostdriver = '%s'\n",
1889                             phost_info->machine,
1890                             phost_info->domainname,
1891                             phost_info->hostdriver);
1892                         ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1893                             (uint8_t *)phost_info,
1894                             sizeof(struct host_system_info));
1895                 }
1896         }
1897
1898         if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1899                 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1900                     fdisc->u.fxiocb.rsp_len,
1901                     &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1902                 if (!fdisc->u.fxiocb.rsp_addr)
1903                         goto done_unmap_req;
1904         }
1905
1906         fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1907         sp->done = qla2x00_fxdisc_sp_done;
1908
1909         rval = qla2x00_start_sp(sp);
1910         if (rval != QLA_SUCCESS)
1911                 goto done_unmap_dma;
1912
1913         wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1914
1915         if (fx_type == FXDISC_GET_CONFIG_INFO) {
1916                 struct config_info_data *pinfo =
1917                     (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1918                 strcpy(vha->hw->model_number, pinfo->model_num);
1919                 strcpy(vha->hw->model_desc, pinfo->model_description);
1920                 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1921                     sizeof(vha->hw->mr.symbolic_name));
1922                 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1923                     sizeof(vha->hw->mr.serial_num));
1924                 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1925                     sizeof(vha->hw->mr.hw_version));
1926                 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1927                     sizeof(vha->hw->mr.fw_version));
1928                 strim(vha->hw->mr.fw_version);
1929                 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1930                     sizeof(vha->hw->mr.uboot_version));
1931                 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1932                     sizeof(vha->hw->mr.fru_serial_num));
1933                 vha->hw->mr.critical_temperature =
1934                     (pinfo->nominal_temp_value) ?
1935                     pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1936                 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1937                     QLAFX00_EXTENDED_IO_EN_MASK) != 0;
1938         } else if (fx_type == FXDISC_GET_PORT_INFO) {
1939                 struct port_info_data *pinfo =
1940                     (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1941                 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1942                 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1943                 vha->d_id.b.domain = pinfo->port_id[0];
1944                 vha->d_id.b.area = pinfo->port_id[1];
1945                 vha->d_id.b.al_pa = pinfo->port_id[2];
1946                 qlafx00_update_host_attr(vha, pinfo);
1947                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1948                     (uint8_t *)pinfo, 16);
1949         } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1950                 struct qlafx00_tgt_node_info *pinfo =
1951                     (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1952                 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1953                 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1954                 fcport->port_type = FCT_TARGET;
1955                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1956                     (uint8_t *)pinfo, 16);
1957         } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1958                 struct qlafx00_tgt_node_info *pinfo =
1959                     (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1960                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1961                     (uint8_t *)pinfo, 16);
1962                 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1963         } else if (fx_type == FXDISC_ABORT_IOCTL)
1964                 fdisc->u.fxiocb.result =
1965                     (fdisc->u.fxiocb.result ==
1966                         cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
1967                     cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1968
1969         rval = le32_to_cpu(fdisc->u.fxiocb.result);
1970
1971 done_unmap_dma:
1972         if (fdisc->u.fxiocb.rsp_addr)
1973                 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1974                     fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1975
1976 done_unmap_req:
1977         if (fdisc->u.fxiocb.req_addr)
1978                 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1979                     fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1980 done_free_sp:
1981         sp->free(sp);
1982 done:
1983         return rval;
1984 }
1985
1986 /*
1987  * qlafx00_initialize_adapter
1988  *      Initialize board.
1989  *
1990  * Input:
1991  *      ha = adapter block pointer.
1992  *
1993  * Returns:
1994  *      0 = success
1995  */
1996 int
1997 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
1998 {
1999         int     rval;
2000         struct qla_hw_data *ha = vha->hw;
2001         uint32_t tempc;
2002
2003         /* Clear adapter flags. */
2004         vha->flags.online = 0;
2005         ha->flags.chip_reset_done = 0;
2006         vha->flags.reset_active = 0;
2007         ha->flags.pci_channel_io_perm_failure = 0;
2008         ha->flags.eeh_busy = 0;
2009         atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2010         atomic_set(&vha->loop_state, LOOP_DOWN);
2011         vha->device_flags = DFLG_NO_CABLE;
2012         vha->dpc_flags = 0;
2013         vha->flags.management_server_logged_in = 0;
2014         ha->isp_abort_cnt = 0;
2015         ha->beacon_blink_led = 0;
2016
2017         set_bit(0, ha->req_qid_map);
2018         set_bit(0, ha->rsp_qid_map);
2019
2020         ql_dbg(ql_dbg_init, vha, 0x0147,
2021             "Configuring PCI space...\n");
2022
2023         rval = ha->isp_ops->pci_config(vha);
2024         if (rval) {
2025                 ql_log(ql_log_warn, vha, 0x0148,
2026                     "Unable to configure PCI space.\n");
2027                 return rval;
2028         }
2029
2030         rval = qlafx00_init_fw_ready(vha);
2031         if (rval != QLA_SUCCESS)
2032                 return rval;
2033
2034         qlafx00_save_queue_ptrs(vha);
2035
2036         rval = qlafx00_config_queues(vha);
2037         if (rval != QLA_SUCCESS)
2038                 return rval;
2039
2040         /*
2041          * Allocate the array of outstanding commands
2042          * now that we know the firmware resources.
2043          */
2044         rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2045         if (rval != QLA_SUCCESS)
2046                 return rval;
2047
2048         rval = qla2x00_init_rings(vha);
2049         ha->flags.chip_reset_done = 1;
2050
2051         tempc = QLAFX00_GET_TEMPERATURE(ha);
2052         ql_dbg(ql_dbg_init, vha, 0x0152,
2053             "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2054             __func__, tempc);
2055
2056         return rval;
2057 }
2058
2059 uint32_t
2060 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2061                       char *buf)
2062 {
2063         scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2064         int rval = QLA_FUNCTION_FAILED;
2065         uint32_t state[1];
2066
2067         if (qla2x00_reset_active(vha))
2068                 ql_log(ql_log_warn, vha, 0x70ce,
2069                     "ISP reset active.\n");
2070         else if (!vha->hw->flags.eeh_busy) {
2071                 rval = qlafx00_get_firmware_state(vha, state);
2072         }
2073         if (rval != QLA_SUCCESS)
2074                 memset(state, -1, sizeof(state));
2075
2076         return state[0];
2077 }
2078
2079 void
2080 qlafx00_get_host_speed(struct Scsi_Host *shost)
2081 {
2082         struct qla_hw_data *ha = ((struct scsi_qla_host *)
2083                                         (shost_priv(shost)))->hw;
2084         u32 speed = FC_PORTSPEED_UNKNOWN;
2085
2086         switch (ha->link_data_rate) {
2087         case QLAFX00_PORT_SPEED_2G:
2088                 speed = FC_PORTSPEED_2GBIT;
2089                 break;
2090         case QLAFX00_PORT_SPEED_4G:
2091                 speed = FC_PORTSPEED_4GBIT;
2092                 break;
2093         case QLAFX00_PORT_SPEED_8G:
2094                 speed = FC_PORTSPEED_8GBIT;
2095                 break;
2096         case QLAFX00_PORT_SPEED_10G:
2097                 speed = FC_PORTSPEED_10GBIT;
2098                 break;
2099         }
2100         fc_host_speed(shost) = speed;
2101 }
2102
2103 /** QLAFX00 specific ISR implementation functions */
2104
2105 static inline void
2106 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2107                      uint32_t sense_len, struct rsp_que *rsp, int res)
2108 {
2109         struct scsi_qla_host *vha = sp->vha;
2110         struct scsi_cmnd *cp = GET_CMD_SP(sp);
2111         uint32_t track_sense_len;
2112
2113         SET_FW_SENSE_LEN(sp, sense_len);
2114
2115         if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2116                 sense_len = SCSI_SENSE_BUFFERSIZE;
2117
2118         SET_CMD_SENSE_LEN(sp, sense_len);
2119         SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2120         track_sense_len = sense_len;
2121
2122         if (sense_len > par_sense_len)
2123                 sense_len = par_sense_len;
2124
2125         memcpy(cp->sense_buffer, sense_data, sense_len);
2126
2127         SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2128
2129         SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2130         track_sense_len -= sense_len;
2131         SET_CMD_SENSE_LEN(sp, track_sense_len);
2132
2133         ql_dbg(ql_dbg_io, vha, 0x304d,
2134             "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2135             sense_len, par_sense_len, track_sense_len);
2136         if (GET_FW_SENSE_LEN(sp) > 0) {
2137                 rsp->status_srb = sp;
2138                 cp->result = res;
2139         }
2140
2141         if (sense_len) {
2142                 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2143                     "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2144                     sp->vha->host_no, cp->device->id, cp->device->lun,
2145                     cp);
2146                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2147                     cp->sense_buffer, sense_len);
2148         }
2149 }
2150
2151 static void
2152 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2153                       struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2154                       __le16 sstatus, __le16 cpstatus)
2155 {
2156         struct srb_iocb *tmf;
2157
2158         tmf = &sp->u.iocb_cmd;
2159         if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2160             (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2161                 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2162         tmf->u.tmf.comp_status = cpstatus;
2163         sp->done(sp, 0);
2164 }
2165
2166 static void
2167 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2168                          struct abort_iocb_entry_fx00 *pkt)
2169 {
2170         const char func[] = "ABT_IOCB";
2171         srb_t *sp;
2172         struct srb_iocb *abt;
2173
2174         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2175         if (!sp)
2176                 return;
2177
2178         abt = &sp->u.iocb_cmd;
2179         abt->u.abt.comp_status = pkt->tgt_id_sts;
2180         sp->done(sp, 0);
2181 }
2182
2183 static void
2184 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2185                          struct ioctl_iocb_entry_fx00 *pkt)
2186 {
2187         const char func[] = "IOSB_IOCB";
2188         srb_t *sp;
2189         struct bsg_job *bsg_job;
2190         struct fc_bsg_reply *bsg_reply;
2191         struct srb_iocb *iocb_job;
2192         int res;
2193         struct qla_mt_iocb_rsp_fx00 fstatus;
2194         uint8_t *fw_sts_ptr;
2195
2196         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2197         if (!sp)
2198                 return;
2199
2200         if (sp->type == SRB_FXIOCB_DCMD) {
2201                 iocb_job = &sp->u.iocb_cmd;
2202                 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2203                 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2204                 iocb_job->u.fxiocb.result = pkt->status;
2205                 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2206                         iocb_job->u.fxiocb.req_data =
2207                             pkt->dataword_r;
2208         } else {
2209                 bsg_job = sp->u.bsg_job;
2210                 bsg_reply = bsg_job->reply;
2211
2212                 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2213
2214                 fstatus.reserved_1 = pkt->reserved_0;
2215                 fstatus.func_type = pkt->comp_func_num;
2216                 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2217                 fstatus.ioctl_data = pkt->dataword_r;
2218                 fstatus.adapid = pkt->adapid;
2219                 fstatus.reserved_2 = pkt->dataword_r_extra;
2220                 fstatus.res_count = pkt->residuallen;
2221                 fstatus.status = pkt->status;
2222                 fstatus.seq_number = pkt->seq_no;
2223                 memcpy(fstatus.reserved_3,
2224                     pkt->reserved_2, 20 * sizeof(uint8_t));
2225
2226                 fw_sts_ptr = bsg_job->reply + sizeof(struct fc_bsg_reply);
2227
2228                 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2229                     sizeof(struct qla_mt_iocb_rsp_fx00));
2230                 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2231                         sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2232
2233                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2234                     sp->fcport->vha, 0x5080,
2235                     (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2236
2237                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2238                     sp->fcport->vha, 0x5074,
2239                     (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2240
2241                 res = bsg_reply->result = DID_OK << 16;
2242                 bsg_reply->reply_payload_rcv_len =
2243                     bsg_job->reply_payload.payload_len;
2244         }
2245         sp->done(sp, res);
2246 }
2247
2248 /**
2249  * qlafx00_status_entry() - Process a Status IOCB entry.
2250  * @vha: SCSI driver HA context
2251  * @rsp: response queue
2252  * @pkt: Entry pointer
2253  */
2254 static void
2255 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2256 {
2257         srb_t           *sp;
2258         fc_port_t       *fcport;
2259         struct scsi_cmnd *cp;
2260         struct sts_entry_fx00 *sts;
2261         __le16          comp_status;
2262         __le16          scsi_status;
2263         __le16          lscsi_status;
2264         int32_t         resid;
2265         uint32_t        sense_len, par_sense_len, rsp_info_len, resid_len,
2266             fw_resid_len;
2267         uint8_t         *rsp_info = NULL, *sense_data = NULL;
2268         struct qla_hw_data *ha = vha->hw;
2269         uint32_t hindex, handle;
2270         uint16_t que;
2271         struct req_que *req;
2272         int logit = 1;
2273         int res = 0;
2274
2275         sts = (struct sts_entry_fx00 *) pkt;
2276
2277         comp_status = sts->comp_status;
2278         scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2279         hindex = sts->handle;
2280         handle = LSW(hindex);
2281
2282         que = MSW(hindex);
2283         req = ha->req_q_map[que];
2284
2285         /* Validate handle. */
2286         if (handle < req->num_outstanding_cmds)
2287                 sp = req->outstanding_cmds[handle];
2288         else
2289                 sp = NULL;
2290
2291         if (sp == NULL) {
2292                 ql_dbg(ql_dbg_io, vha, 0x3034,
2293                     "Invalid status handle (0x%x).\n", handle);
2294
2295                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2296                 qla2xxx_wake_dpc(vha);
2297                 return;
2298         }
2299
2300         if (sp->type == SRB_TM_CMD) {
2301                 req->outstanding_cmds[handle] = NULL;
2302                 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2303                     scsi_status, comp_status);
2304                 return;
2305         }
2306
2307         /* Fast path completion. */
2308         if (comp_status == CS_COMPLETE && scsi_status == 0) {
2309                 qla2x00_process_completed_request(vha, req, handle);
2310                 return;
2311         }
2312
2313         req->outstanding_cmds[handle] = NULL;
2314         cp = GET_CMD_SP(sp);
2315         if (cp == NULL) {
2316                 ql_dbg(ql_dbg_io, vha, 0x3048,
2317                     "Command already returned (0x%x/%p).\n",
2318                     handle, sp);
2319
2320                 return;
2321         }
2322
2323         lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2324
2325         fcport = sp->fcport;
2326
2327         sense_len = par_sense_len = rsp_info_len = resid_len =
2328                 fw_resid_len = 0;
2329         if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2330                 sense_len = sts->sense_len;
2331         if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2332             | (uint16_t)SS_RESIDUAL_OVER)))
2333                 resid_len = le32_to_cpu(sts->residual_len);
2334         if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2335                 fw_resid_len = le32_to_cpu(sts->residual_len);
2336         rsp_info = sense_data = sts->data;
2337         par_sense_len = sizeof(sts->data);
2338
2339         /* Check for overrun. */
2340         if (comp_status == CS_COMPLETE &&
2341             scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2342                 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2343
2344         /*
2345          * Based on Host and scsi status generate status code for Linux
2346          */
2347         switch (le16_to_cpu(comp_status)) {
2348         case CS_COMPLETE:
2349         case CS_QUEUE_FULL:
2350                 if (scsi_status == 0) {
2351                         res = DID_OK << 16;
2352                         break;
2353                 }
2354                 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2355                     | (uint16_t)SS_RESIDUAL_OVER))) {
2356                         resid = resid_len;
2357                         scsi_set_resid(cp, resid);
2358
2359                         if (!lscsi_status &&
2360                             ((unsigned)(scsi_bufflen(cp) - resid) <
2361                              cp->underflow)) {
2362                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2363                                     "Mid-layer underflow "
2364                                     "detected (0x%x of 0x%x bytes).\n",
2365                                     resid, scsi_bufflen(cp));
2366
2367                                 res = DID_ERROR << 16;
2368                                 break;
2369                         }
2370                 }
2371                 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2372
2373                 if (lscsi_status ==
2374                     cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2375                         ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2376                             "QUEUE FULL detected.\n");
2377                         break;
2378                 }
2379                 logit = 0;
2380                 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2381                         break;
2382
2383                 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2384                 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2385                         break;
2386
2387                 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2388                     rsp, res);
2389                 break;
2390
2391         case CS_DATA_UNDERRUN:
2392                 /* Use F/W calculated residual length. */
2393                 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2394                         resid = fw_resid_len;
2395                 else
2396                         resid = resid_len;
2397                 scsi_set_resid(cp, resid);
2398                 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2399                         if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2400                             && fw_resid_len != resid_len) {
2401                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2402                                     "Dropped frame(s) detected "
2403                                     "(0x%x of 0x%x bytes).\n",
2404                                     resid, scsi_bufflen(cp));
2405
2406                                 res = DID_ERROR << 16 |
2407                                     le16_to_cpu(lscsi_status);
2408                                 goto check_scsi_status;
2409                         }
2410
2411                         if (!lscsi_status &&
2412                             ((unsigned)(scsi_bufflen(cp) - resid) <
2413                             cp->underflow)) {
2414                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2415                                     "Mid-layer underflow "
2416                                     "detected (0x%x of 0x%x bytes, "
2417                                     "cp->underflow: 0x%x).\n",
2418                                     resid, scsi_bufflen(cp), cp->underflow);
2419
2420                                 res = DID_ERROR << 16;
2421                                 break;
2422                         }
2423                 } else if (lscsi_status !=
2424                     cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2425                     lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2426                         /*
2427                          * scsi status of task set and busy are considered
2428                          * to be task not completed.
2429                          */
2430
2431                         ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2432                             "Dropped frame(s) detected (0x%x "
2433                             "of 0x%x bytes).\n", resid,
2434                             scsi_bufflen(cp));
2435
2436                         res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2437                         goto check_scsi_status;
2438                 } else {
2439                         ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2440                             "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2441                             scsi_status, lscsi_status);
2442                 }
2443
2444                 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2445                 logit = 0;
2446
2447 check_scsi_status:
2448                 /*
2449                  * Check to see if SCSI Status is non zero. If so report SCSI
2450                  * Status.
2451                  */
2452                 if (lscsi_status != 0) {
2453                         if (lscsi_status ==
2454                             cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2455                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2456                                     "QUEUE FULL detected.\n");
2457                                 logit = 1;
2458                                 break;
2459                         }
2460                         if (lscsi_status !=
2461                             cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2462                                 break;
2463
2464                         memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2465                         if (!(scsi_status &
2466                             cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2467                                 break;
2468
2469                         qlafx00_handle_sense(sp, sense_data, par_sense_len,
2470                             sense_len, rsp, res);
2471                 }
2472                 break;
2473
2474         case CS_PORT_LOGGED_OUT:
2475         case CS_PORT_CONFIG_CHG:
2476         case CS_PORT_BUSY:
2477         case CS_INCOMPLETE:
2478         case CS_PORT_UNAVAILABLE:
2479         case CS_TIMEOUT:
2480         case CS_RESET:
2481
2482                 /*
2483                  * We are going to have the fc class block the rport
2484                  * while we try to recover so instruct the mid layer
2485                  * to requeue until the class decides how to handle this.
2486                  */
2487                 res = DID_TRANSPORT_DISRUPTED << 16;
2488
2489                 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2490                     "Port down status: port-state=0x%x.\n",
2491                     atomic_read(&fcport->state));
2492
2493                 if (atomic_read(&fcport->state) == FCS_ONLINE)
2494                         qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2495                 break;
2496
2497         case CS_ABORTED:
2498                 res = DID_RESET << 16;
2499                 break;
2500
2501         default:
2502                 res = DID_ERROR << 16;
2503                 break;
2504         }
2505
2506         if (logit)
2507                 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2508                     "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
2509                     "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2510                     "rsp_info=%p resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2511                     "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2512                     comp_status, scsi_status, res, vha->host_no,
2513                     cp->device->id, cp->device->lun, fcport->tgt_id,
2514                     lscsi_status, cp->cmnd, scsi_bufflen(cp),
2515                     rsp_info, resid_len, fw_resid_len, sense_len,
2516                     par_sense_len, rsp_info_len);
2517
2518         if (rsp->status_srb == NULL)
2519                 sp->done(sp, res);
2520 }
2521
2522 /**
2523  * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2524  * @rsp: response queue
2525  * @pkt: Entry pointer
2526  *
2527  * Extended sense data.
2528  */
2529 static void
2530 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2531 {
2532         uint8_t sense_sz = 0;
2533         struct qla_hw_data *ha = rsp->hw;
2534         struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2535         srb_t *sp = rsp->status_srb;
2536         struct scsi_cmnd *cp;
2537         uint32_t sense_len;
2538         uint8_t *sense_ptr;
2539
2540         if (!sp) {
2541                 ql_dbg(ql_dbg_io, vha, 0x3037,
2542                     "no SP, sp = %p\n", sp);
2543                 return;
2544         }
2545
2546         if (!GET_FW_SENSE_LEN(sp)) {
2547                 ql_dbg(ql_dbg_io, vha, 0x304b,
2548                     "no fw sense data, sp = %p\n", sp);
2549                 return;
2550         }
2551         cp = GET_CMD_SP(sp);
2552         if (cp == NULL) {
2553                 ql_log(ql_log_warn, vha, 0x303b,
2554                     "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2555
2556                 rsp->status_srb = NULL;
2557                 return;
2558         }
2559
2560         if (!GET_CMD_SENSE_LEN(sp)) {
2561                 ql_dbg(ql_dbg_io, vha, 0x304c,
2562                     "no sense data, sp = %p\n", sp);
2563         } else {
2564                 sense_len = GET_CMD_SENSE_LEN(sp);
2565                 sense_ptr = GET_CMD_SENSE_PTR(sp);
2566                 ql_dbg(ql_dbg_io, vha, 0x304f,
2567                     "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2568                     sp, sense_len, sense_ptr);
2569
2570                 if (sense_len > sizeof(pkt->data))
2571                         sense_sz = sizeof(pkt->data);
2572                 else
2573                         sense_sz = sense_len;
2574
2575                 /* Move sense data. */
2576                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2577                     (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2578                 memcpy(sense_ptr, pkt->data, sense_sz);
2579                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2580                     sense_ptr, sense_sz);
2581
2582                 sense_len -= sense_sz;
2583                 sense_ptr += sense_sz;
2584
2585                 SET_CMD_SENSE_PTR(sp, sense_ptr);
2586                 SET_CMD_SENSE_LEN(sp, sense_len);
2587         }
2588         sense_len = GET_FW_SENSE_LEN(sp);
2589         sense_len = (sense_len > sizeof(pkt->data)) ?
2590             (sense_len - sizeof(pkt->data)) : 0;
2591         SET_FW_SENSE_LEN(sp, sense_len);
2592
2593         /* Place command on done queue. */
2594         if (sense_len == 0) {
2595                 rsp->status_srb = NULL;
2596                 sp->done(sp, cp->result);
2597         }
2598 }
2599
2600 /**
2601  * qlafx00_multistatus_entry() - Process Multi response queue entries.
2602  * @vha: SCSI driver HA context
2603  * @rsp: response queue
2604  * @pkt:
2605  */
2606 static void
2607 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2608         struct rsp_que *rsp, void *pkt)
2609 {
2610         srb_t           *sp;
2611         struct multi_sts_entry_fx00 *stsmfx;
2612         struct qla_hw_data *ha = vha->hw;
2613         uint32_t handle, hindex, handle_count, i;
2614         uint16_t que;
2615         struct req_que *req;
2616         __le32 *handle_ptr;
2617
2618         stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2619
2620         handle_count = stsmfx->handle_count;
2621
2622         if (handle_count > MAX_HANDLE_COUNT) {
2623                 ql_dbg(ql_dbg_io, vha, 0x3035,
2624                     "Invalid handle count (0x%x).\n", handle_count);
2625                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2626                 qla2xxx_wake_dpc(vha);
2627                 return;
2628         }
2629
2630         handle_ptr =  &stsmfx->handles[0];
2631
2632         for (i = 0; i < handle_count; i++) {
2633                 hindex = le32_to_cpu(*handle_ptr);
2634                 handle = LSW(hindex);
2635                 que = MSW(hindex);
2636                 req = ha->req_q_map[que];
2637
2638                 /* Validate handle. */
2639                 if (handle < req->num_outstanding_cmds)
2640                         sp = req->outstanding_cmds[handle];
2641                 else
2642                         sp = NULL;
2643
2644                 if (sp == NULL) {
2645                         ql_dbg(ql_dbg_io, vha, 0x3044,
2646                             "Invalid status handle (0x%x).\n", handle);
2647                         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2648                         qla2xxx_wake_dpc(vha);
2649                         return;
2650                 }
2651                 qla2x00_process_completed_request(vha, req, handle);
2652                 handle_ptr++;
2653         }
2654 }
2655
2656 /**
2657  * qlafx00_error_entry() - Process an error entry.
2658  * @vha: SCSI driver HA context
2659  * @rsp: response queue
2660  * @pkt: Entry pointer
2661  * @estatus:
2662  * @etype:
2663  */
2664 static void
2665 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2666                     struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2667 {
2668         srb_t *sp;
2669         struct qla_hw_data *ha = vha->hw;
2670         const char func[] = "ERROR-IOCB";
2671         uint16_t que = 0;
2672         struct req_que *req = NULL;
2673         int res = DID_ERROR << 16;
2674
2675         ql_dbg(ql_dbg_async, vha, 0x507f,
2676             "type of error status in response: 0x%x\n", estatus);
2677
2678         req = ha->req_q_map[que];
2679
2680         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2681         if (sp) {
2682                 sp->done(sp, res);
2683                 return;
2684         }
2685
2686         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2687         qla2xxx_wake_dpc(vha);
2688 }
2689
2690 /**
2691  * qlafx00_process_response_queue() - Process response queue entries.
2692  * @vha: SCSI driver HA context
2693  * @rsp: response queue
2694  */
2695 static void
2696 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2697         struct rsp_que *rsp)
2698 {
2699         struct sts_entry_fx00 *pkt;
2700         response_t *lptr;
2701         uint16_t lreq_q_in = 0;
2702         uint16_t lreq_q_out = 0;
2703
2704         lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
2705         lreq_q_out = rsp->ring_index;
2706
2707         while (lreq_q_in != lreq_q_out) {
2708                 lptr = rsp->ring_ptr;
2709                 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2710                     sizeof(rsp->rsp_pkt));
2711                 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2712
2713                 rsp->ring_index++;
2714                 lreq_q_out++;
2715                 if (rsp->ring_index == rsp->length) {
2716                         lreq_q_out = 0;
2717                         rsp->ring_index = 0;
2718                         rsp->ring_ptr = rsp->ring;
2719                 } else {
2720                         rsp->ring_ptr++;
2721                 }
2722
2723                 if (pkt->entry_status != 0 &&
2724                     pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2725                         qlafx00_error_entry(vha, rsp,
2726                             (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2727                             pkt->entry_type);
2728                         continue;
2729                 }
2730
2731                 switch (pkt->entry_type) {
2732                 case STATUS_TYPE_FX00:
2733                         qlafx00_status_entry(vha, rsp, pkt);
2734                         break;
2735
2736                 case STATUS_CONT_TYPE_FX00:
2737                         qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2738                         break;
2739
2740                 case MULTI_STATUS_TYPE_FX00:
2741                         qlafx00_multistatus_entry(vha, rsp, pkt);
2742                         break;
2743
2744                 case ABORT_IOCB_TYPE_FX00:
2745                         qlafx00_abort_iocb_entry(vha, rsp->req,
2746                            (struct abort_iocb_entry_fx00 *)pkt);
2747                         break;
2748
2749                 case IOCTL_IOSB_TYPE_FX00:
2750                         qlafx00_ioctl_iosb_entry(vha, rsp->req,
2751                             (struct ioctl_iocb_entry_fx00 *)pkt);
2752                         break;
2753                 default:
2754                         /* Type Not Supported. */
2755                         ql_dbg(ql_dbg_async, vha, 0x5081,
2756                             "Received unknown response pkt type %x "
2757                             "entry status=%x.\n",
2758                             pkt->entry_type, pkt->entry_status);
2759                         break;
2760                 }
2761         }
2762
2763         /* Adjust ring index */
2764         WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2765 }
2766
2767 /**
2768  * qlafx00_async_event() - Process aynchronous events.
2769  * @vha: SCSI driver HA context
2770  */
2771 static void
2772 qlafx00_async_event(scsi_qla_host_t *vha)
2773 {
2774         struct qla_hw_data *ha = vha->hw;
2775         struct device_reg_fx00 __iomem *reg;
2776         int data_size = 1;
2777
2778         reg = &ha->iobase->ispfx00;
2779         /* Setup to process RIO completion. */
2780         switch (ha->aenmb[0]) {
2781         case QLAFX00_MBA_SYSTEM_ERR:            /* System Error */
2782                 ql_log(ql_log_warn, vha, 0x5079,
2783                     "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2784                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2785                 break;
2786
2787         case QLAFX00_MBA_SHUTDOWN_RQSTD:        /* Shutdown requested */
2788                 ql_dbg(ql_dbg_async, vha, 0x5076,
2789                     "Asynchronous FW shutdown requested.\n");
2790                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2791                 qla2xxx_wake_dpc(vha);
2792                 break;
2793
2794         case QLAFX00_MBA_PORT_UPDATE:           /* Port database update */
2795                 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
2796                 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
2797                 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
2798                 ql_dbg(ql_dbg_async, vha, 0x5077,
2799                     "Asynchronous port Update received "
2800                     "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2801                     ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2802                 data_size = 4;
2803                 break;
2804
2805         case QLAFX00_MBA_TEMP_OVER:     /* Over temperature event */
2806                 ql_log(ql_log_info, vha, 0x5085,
2807                     "Asynchronous over temperature event received "
2808                     "aenmb[0]: %x\n",
2809                     ha->aenmb[0]);
2810                 break;
2811
2812         case QLAFX00_MBA_TEMP_NORM:     /* Normal temperature event */
2813                 ql_log(ql_log_info, vha, 0x5086,
2814                     "Asynchronous normal temperature event received "
2815                     "aenmb[0]: %x\n",
2816                     ha->aenmb[0]);
2817                 break;
2818
2819         case QLAFX00_MBA_TEMP_CRIT:     /* Critical temperature event */
2820                 ql_log(ql_log_info, vha, 0x5083,
2821                     "Asynchronous critical temperature event received "
2822                     "aenmb[0]: %x\n",
2823                 ha->aenmb[0]);
2824                 break;
2825
2826         default:
2827                 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2828                 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2829                 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2830                 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2831                 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2832                 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2833                 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2834                 ql_dbg(ql_dbg_async, vha, 0x5078,
2835                     "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2836                     ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2837                     ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2838                 break;
2839         }
2840         qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2841             (uint32_t *)ha->aenmb, data_size);
2842 }
2843
2844 /**
2845  * qlafx00x_mbx_completion() - Process mailbox command completions.
2846  * @vha: SCSI driver HA context
2847  * @mb0:
2848  */
2849 static void
2850 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2851 {
2852         uint16_t        cnt;
2853         uint32_t __iomem *wptr;
2854         struct qla_hw_data *ha = vha->hw;
2855         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2856
2857         if (!ha->mcp32)
2858                 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2859
2860         /* Load return mailbox registers. */
2861         ha->flags.mbox_int = 1;
2862         ha->mailbox_out32[0] = mb0;
2863         wptr = (uint32_t __iomem *)&reg->mailbox17;
2864
2865         for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2866                 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
2867                 wptr++;
2868         }
2869 }
2870
2871 /**
2872  * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2873  * @irq:
2874  * @dev_id: SCSI driver HA context
2875  *
2876  * Called by system whenever the host adapter generates an interrupt.
2877  *
2878  * Returns handled flag.
2879  */
2880 irqreturn_t
2881 qlafx00_intr_handler(int irq, void *dev_id)
2882 {
2883         scsi_qla_host_t *vha;
2884         struct qla_hw_data *ha;
2885         struct device_reg_fx00 __iomem *reg;
2886         int             status;
2887         unsigned long   iter;
2888         uint32_t        stat;
2889         uint32_t        mb[8];
2890         struct rsp_que *rsp;
2891         unsigned long   flags;
2892         uint32_t clr_intr = 0;
2893         uint32_t intr_stat = 0;
2894
2895         rsp = (struct rsp_que *) dev_id;
2896         if (!rsp) {
2897                 ql_log(ql_log_info, NULL, 0x507d,
2898                     "%s: NULL response queue pointer.\n", __func__);
2899                 return IRQ_NONE;
2900         }
2901
2902         ha = rsp->hw;
2903         reg = &ha->iobase->ispfx00;
2904         status = 0;
2905
2906         if (unlikely(pci_channel_offline(ha->pdev)))
2907                 return IRQ_HANDLED;
2908
2909         spin_lock_irqsave(&ha->hardware_lock, flags);
2910         vha = pci_get_drvdata(ha->pdev);
2911         for (iter = 50; iter--; clr_intr = 0) {
2912                 stat = QLAFX00_RD_INTR_REG(ha);
2913                 if (qla2x00_check_reg32_for_disconnect(vha, stat))
2914                         break;
2915                 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2916                 if (!intr_stat)
2917                         break;
2918
2919                 if (stat & QLAFX00_INTR_MB_CMPLT) {
2920                         mb[0] = RD_REG_WORD(&reg->mailbox16);
2921                         qlafx00_mbx_completion(vha, mb[0]);
2922                         status |= MBX_INTERRUPT;
2923                         clr_intr |= QLAFX00_INTR_MB_CMPLT;
2924                 }
2925                 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
2926                         ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2927                         qlafx00_async_event(vha);
2928                         clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2929                 }
2930                 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
2931                         qlafx00_process_response_queue(vha, rsp);
2932                         clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2933                 }
2934
2935                 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2936                 QLAFX00_RD_INTR_REG(ha);
2937         }
2938
2939         qla2x00_handle_mbx_completion(ha, status);
2940         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2941
2942         return IRQ_HANDLED;
2943 }
2944
2945 /** QLAFX00 specific IOCB implementation functions */
2946
2947 static inline cont_a64_entry_t *
2948 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2949                              cont_a64_entry_t *lcont_pkt)
2950 {
2951         cont_a64_entry_t *cont_pkt;
2952
2953         /* Adjust ring index. */
2954         req->ring_index++;
2955         if (req->ring_index == req->length) {
2956                 req->ring_index = 0;
2957                 req->ring_ptr = req->ring;
2958         } else {
2959                 req->ring_ptr++;
2960         }
2961
2962         cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2963
2964         /* Load packet defaults. */
2965         lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
2966
2967         return cont_pkt;
2968 }
2969
2970 static inline void
2971 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2972                          uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2973 {
2974         uint16_t        avail_dsds;
2975         __le32 *cur_dsd;
2976         scsi_qla_host_t *vha;
2977         struct scsi_cmnd *cmd;
2978         struct scatterlist *sg;
2979         int i, cont;
2980         struct req_que *req;
2981         cont_a64_entry_t lcont_pkt;
2982         cont_a64_entry_t *cont_pkt;
2983
2984         vha = sp->vha;
2985         req = vha->req;
2986
2987         cmd = GET_CMD_SP(sp);
2988         cont = 0;
2989         cont_pkt = NULL;
2990
2991         /* Update entry type to indicate Command Type 3 IOCB */
2992         lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
2993
2994         /* No data transfer */
2995         if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
2996                 lcmd_pkt->byte_count = cpu_to_le32(0);
2997                 return;
2998         }
2999
3000         /* Set transfer direction */
3001         if (cmd->sc_data_direction == DMA_TO_DEVICE) {
3002                 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
3003                 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3004         } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
3005                 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
3006                 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3007         }
3008
3009         /* One DSD is available in the Command Type 3 IOCB */
3010         avail_dsds = 1;
3011         cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
3012
3013         /* Load data segments */
3014         scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3015                 dma_addr_t      sle_dma;
3016
3017                 /* Allocate additional continuation packets? */
3018                 if (avail_dsds == 0) {
3019                         /*
3020                          * Five DSDs are available in the Continuation
3021                          * Type 1 IOCB.
3022                          */
3023                         memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3024                         cont_pkt =
3025                             qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3026                         cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
3027                         avail_dsds = 5;
3028                         cont = 1;
3029                 }
3030
3031                 sle_dma = sg_dma_address(sg);
3032                 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3033                 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3034                 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3035                 avail_dsds--;
3036                 if (avail_dsds == 0 && cont == 1) {
3037                         cont = 0;
3038                         memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3039                             REQUEST_ENTRY_SIZE);
3040                 }
3041
3042         }
3043         if (avail_dsds != 0 && cont == 1) {
3044                 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3045                     REQUEST_ENTRY_SIZE);
3046         }
3047 }
3048
3049 /**
3050  * qlafx00_start_scsi() - Send a SCSI command to the ISP
3051  * @sp: command to send to the ISP
3052  *
3053  * Returns non-zero if a failure occurred, else zero.
3054  */
3055 int
3056 qlafx00_start_scsi(srb_t *sp)
3057 {
3058         int             nseg;
3059         unsigned long   flags;
3060         uint32_t        index;
3061         uint32_t        handle;
3062         uint16_t        cnt;
3063         uint16_t        req_cnt;
3064         uint16_t        tot_dsds;
3065         struct req_que *req = NULL;
3066         struct rsp_que *rsp = NULL;
3067         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3068         struct scsi_qla_host *vha = sp->vha;
3069         struct qla_hw_data *ha = vha->hw;
3070         struct cmd_type_7_fx00 *cmd_pkt;
3071         struct cmd_type_7_fx00 lcmd_pkt;
3072         struct scsi_lun llun;
3073
3074         /* Setup device pointers. */
3075         rsp = ha->rsp_q_map[0];
3076         req = vha->req;
3077
3078         /* So we know we haven't pci_map'ed anything yet */
3079         tot_dsds = 0;
3080
3081         /* Acquire ring specific lock */
3082         spin_lock_irqsave(&ha->hardware_lock, flags);
3083
3084         /* Check for room in outstanding command list. */
3085         handle = req->current_outstanding_cmd;
3086         for (index = 1; index < req->num_outstanding_cmds; index++) {
3087                 handle++;
3088                 if (handle == req->num_outstanding_cmds)
3089                         handle = 1;
3090                 if (!req->outstanding_cmds[handle])
3091                         break;
3092         }
3093         if (index == req->num_outstanding_cmds)
3094                 goto queuing_error;
3095
3096         /* Map the sg table so we have an accurate count of sg entries needed */
3097         if (scsi_sg_count(cmd)) {
3098                 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3099                     scsi_sg_count(cmd), cmd->sc_data_direction);
3100                 if (unlikely(!nseg))
3101                         goto queuing_error;
3102         } else
3103                 nseg = 0;
3104
3105         tot_dsds = nseg;
3106         req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3107         if (req->cnt < (req_cnt + 2)) {
3108                 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3109
3110                 if (req->ring_index < cnt)
3111                         req->cnt = cnt - req->ring_index;
3112                 else
3113                         req->cnt = req->length -
3114                                 (req->ring_index - cnt);
3115                 if (req->cnt < (req_cnt + 2))
3116                         goto queuing_error;
3117         }
3118
3119         /* Build command packet. */
3120         req->current_outstanding_cmd = handle;
3121         req->outstanding_cmds[handle] = sp;
3122         sp->handle = handle;
3123         cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3124         req->cnt -= req_cnt;
3125
3126         cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3127
3128         memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3129
3130         lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3131         lcmd_pkt.reserved_0 = 0;
3132         lcmd_pkt.port_path_ctrl = 0;
3133         lcmd_pkt.reserved_1 = 0;
3134         lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3135         lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3136
3137         int_to_scsilun(cmd->device->lun, &llun);
3138         host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3139             sizeof(lcmd_pkt.lun));
3140
3141         /* Load SCSI command packet. */
3142         host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3143         lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3144
3145         /* Build IOCB segments */
3146         qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3147
3148         /* Set total data segment count. */
3149         lcmd_pkt.entry_count = (uint8_t)req_cnt;
3150
3151         /* Specify response queue number where completion should happen */
3152         lcmd_pkt.entry_status = (uint8_t) rsp->id;
3153
3154         ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3155             (uint8_t *)cmd->cmnd, cmd->cmd_len);
3156         ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3157             (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3158
3159         memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3160         wmb();
3161
3162         /* Adjust ring index. */
3163         req->ring_index++;
3164         if (req->ring_index == req->length) {
3165                 req->ring_index = 0;
3166                 req->ring_ptr = req->ring;
3167         } else
3168                 req->ring_ptr++;
3169
3170         sp->flags |= SRB_DMA_VALID;
3171
3172         /* Set chip new ring index. */
3173         WRT_REG_DWORD(req->req_q_in, req->ring_index);
3174         QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3175
3176         spin_unlock_irqrestore(&ha->hardware_lock, flags);
3177         return QLA_SUCCESS;
3178
3179 queuing_error:
3180         if (tot_dsds)
3181                 scsi_dma_unmap(cmd);
3182
3183         spin_unlock_irqrestore(&ha->hardware_lock, flags);
3184
3185         return QLA_FUNCTION_FAILED;
3186 }
3187
3188 void
3189 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3190 {
3191         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3192         scsi_qla_host_t *vha = sp->vha;
3193         struct req_que *req = vha->req;
3194         struct tsk_mgmt_entry_fx00 tm_iocb;
3195         struct scsi_lun llun;
3196
3197         memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3198         tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3199         tm_iocb.entry_count = 1;
3200         tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3201         tm_iocb.reserved_0 = 0;
3202         tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3203         tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3204         if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3205                 int_to_scsilun(fxio->u.tmf.lun, &llun);
3206                 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3207                     sizeof(struct scsi_lun));
3208         }
3209
3210         memcpy((void *)ptm_iocb, &tm_iocb,
3211             sizeof(struct tsk_mgmt_entry_fx00));
3212         wmb();
3213 }
3214
3215 void
3216 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3217 {
3218         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3219         scsi_qla_host_t *vha = sp->vha;
3220         struct req_que *req = vha->req;
3221         struct abort_iocb_entry_fx00 abt_iocb;
3222
3223         memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3224         abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3225         abt_iocb.entry_count = 1;
3226         abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3227         abt_iocb.abort_handle =
3228             cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3229         abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3230         abt_iocb.req_que_no = cpu_to_le16(req->id);
3231
3232         memcpy((void *)pabt_iocb, &abt_iocb,
3233             sizeof(struct abort_iocb_entry_fx00));
3234         wmb();
3235 }
3236
3237 void
3238 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3239 {
3240         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3241         struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3242         struct bsg_job *bsg_job;
3243         struct fc_bsg_request *bsg_request;
3244         struct fxdisc_entry_fx00 fx_iocb;
3245         uint8_t entry_cnt = 1;
3246
3247         memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3248         fx_iocb.entry_type = FX00_IOCB_TYPE;
3249         fx_iocb.handle = cpu_to_le32(sp->handle);
3250         fx_iocb.entry_count = entry_cnt;
3251
3252         if (sp->type == SRB_FXIOCB_DCMD) {
3253                 fx_iocb.func_num =
3254                     sp->u.iocb_cmd.u.fxiocb.req_func_type;
3255                 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3256                 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3257                 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3258                 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3259                 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3260
3261                 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3262                         fx_iocb.req_dsdcnt = cpu_to_le16(1);
3263                         fx_iocb.req_xfrcnt =
3264                             cpu_to_le16(fxio->u.fxiocb.req_len);
3265                         fx_iocb.dseg_rq_address[0] =
3266                             cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3267                         fx_iocb.dseg_rq_address[1] =
3268                             cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3269                         fx_iocb.dseg_rq_len =
3270                             cpu_to_le32(fxio->u.fxiocb.req_len);
3271                 }
3272
3273                 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3274                         fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3275                         fx_iocb.rsp_xfrcnt =
3276                             cpu_to_le16(fxio->u.fxiocb.rsp_len);
3277                         fx_iocb.dseg_rsp_address[0] =
3278                             cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3279                         fx_iocb.dseg_rsp_address[1] =
3280                             cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3281                         fx_iocb.dseg_rsp_len =
3282                             cpu_to_le32(fxio->u.fxiocb.rsp_len);
3283                 }
3284
3285                 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3286                         fx_iocb.dataword = fxio->u.fxiocb.req_data;
3287                 }
3288                 fx_iocb.flags = fxio->u.fxiocb.flags;
3289         } else {
3290                 struct scatterlist *sg;
3291                 bsg_job = sp->u.bsg_job;
3292                 bsg_request = bsg_job->request;
3293                 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3294                         &bsg_request->rqst_data.h_vendor.vendor_cmd[1];
3295
3296                 fx_iocb.func_num = piocb_rqst->func_type;
3297                 fx_iocb.adapid = piocb_rqst->adapid;
3298                 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3299                 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3300                 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3301                 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3302                 fx_iocb.dataword = piocb_rqst->dataword;
3303                 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3304                 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3305
3306                 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3307                         int avail_dsds, tot_dsds;
3308                         cont_a64_entry_t lcont_pkt;
3309                         cont_a64_entry_t *cont_pkt = NULL;
3310                         __le32 *cur_dsd;
3311                         int index = 0, cont = 0;
3312
3313                         fx_iocb.req_dsdcnt =
3314                             cpu_to_le16(bsg_job->request_payload.sg_cnt);
3315                         tot_dsds =
3316                             bsg_job->request_payload.sg_cnt;
3317                         cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
3318                         avail_dsds = 1;
3319                         for_each_sg(bsg_job->request_payload.sg_list, sg,
3320                             tot_dsds, index) {
3321                                 dma_addr_t sle_dma;
3322
3323                                 /* Allocate additional continuation packets? */
3324                                 if (avail_dsds == 0) {
3325                                         /*
3326                                          * Five DSDs are available in the Cont.
3327                                          * Type 1 IOCB.
3328                                          */
3329                                         memset(&lcont_pkt, 0,
3330                                             REQUEST_ENTRY_SIZE);
3331                                         cont_pkt =
3332                                             qlafx00_prep_cont_type1_iocb(
3333                                                 sp->vha->req, &lcont_pkt);
3334                                         cur_dsd = (__le32 *)
3335                                             lcont_pkt.dseg_0_address;
3336                                         avail_dsds = 5;
3337                                         cont = 1;
3338                                         entry_cnt++;
3339                                 }
3340
3341                                 sle_dma = sg_dma_address(sg);
3342                                 *cur_dsd++   = cpu_to_le32(LSD(sle_dma));
3343                                 *cur_dsd++   = cpu_to_le32(MSD(sle_dma));
3344                                 *cur_dsd++   = cpu_to_le32(sg_dma_len(sg));
3345                                 avail_dsds--;
3346
3347                                 if (avail_dsds == 0 && cont == 1) {
3348                                         cont = 0;
3349                                         memcpy_toio(
3350                                             (void __iomem *)cont_pkt,
3351                                             &lcont_pkt, REQUEST_ENTRY_SIZE);
3352                                         ql_dump_buffer(
3353                                             ql_dbg_user + ql_dbg_verbose,
3354                                             sp->vha, 0x3042,
3355                                             (uint8_t *)&lcont_pkt,
3356                                              REQUEST_ENTRY_SIZE);
3357                                 }
3358                         }
3359                         if (avail_dsds != 0 && cont == 1) {
3360                                 memcpy_toio((void __iomem *)cont_pkt,
3361                                     &lcont_pkt, REQUEST_ENTRY_SIZE);
3362                                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3363                                     sp->vha, 0x3043,
3364                                     (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3365                         }
3366                 }
3367
3368                 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3369                         int avail_dsds, tot_dsds;
3370                         cont_a64_entry_t lcont_pkt;
3371                         cont_a64_entry_t *cont_pkt = NULL;
3372                         __le32 *cur_dsd;
3373                         int index = 0, cont = 0;
3374
3375                         fx_iocb.rsp_dsdcnt =
3376                            cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3377                         tot_dsds = bsg_job->reply_payload.sg_cnt;
3378                         cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
3379                         avail_dsds = 1;
3380
3381                         for_each_sg(bsg_job->reply_payload.sg_list, sg,
3382                             tot_dsds, index) {
3383                                 dma_addr_t sle_dma;
3384
3385                                 /* Allocate additional continuation packets? */
3386                                 if (avail_dsds == 0) {
3387                                         /*
3388                                         * Five DSDs are available in the Cont.
3389                                         * Type 1 IOCB.
3390                                         */
3391                                         memset(&lcont_pkt, 0,
3392                                             REQUEST_ENTRY_SIZE);
3393                                         cont_pkt =
3394                                             qlafx00_prep_cont_type1_iocb(
3395                                                 sp->vha->req, &lcont_pkt);
3396                                         cur_dsd = (__le32 *)
3397                                             lcont_pkt.dseg_0_address;
3398                                         avail_dsds = 5;
3399                                         cont = 1;
3400                                         entry_cnt++;
3401                                 }
3402
3403                                 sle_dma = sg_dma_address(sg);
3404                                 *cur_dsd++   = cpu_to_le32(LSD(sle_dma));
3405                                 *cur_dsd++   = cpu_to_le32(MSD(sle_dma));
3406                                 *cur_dsd++   = cpu_to_le32(sg_dma_len(sg));
3407                                 avail_dsds--;
3408
3409                                 if (avail_dsds == 0 && cont == 1) {
3410                                         cont = 0;
3411                                         memcpy_toio((void __iomem *)cont_pkt,
3412                                             &lcont_pkt,
3413                                             REQUEST_ENTRY_SIZE);
3414                                         ql_dump_buffer(
3415                                             ql_dbg_user + ql_dbg_verbose,
3416                                             sp->vha, 0x3045,
3417                                             (uint8_t *)&lcont_pkt,
3418                                             REQUEST_ENTRY_SIZE);
3419                                 }
3420                         }
3421                         if (avail_dsds != 0 && cont == 1) {
3422                                 memcpy_toio((void __iomem *)cont_pkt,
3423                                     &lcont_pkt, REQUEST_ENTRY_SIZE);
3424                                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3425                                     sp->vha, 0x3046,
3426                                     (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3427                         }
3428                 }
3429
3430                 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3431                         fx_iocb.dataword = piocb_rqst->dataword;
3432                 fx_iocb.flags = piocb_rqst->flags;
3433                 fx_iocb.entry_count = entry_cnt;
3434         }
3435
3436         ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3437             sp->vha, 0x3047,
3438             (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3439
3440         memcpy_toio((void __iomem *)pfxiocb, &fx_iocb,
3441             sizeof(struct fxdisc_entry_fx00));
3442         wmb();
3443 }