drivers/scsi/qla2xxx/qla_mr.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8 #include <linux/delay.h>
   9 #include <linux/ktime.h>
  10 #include <linux/pci.h>
  11 #include <linux/ratelimit.h>
  12 #include <linux/vmalloc.h>
  13 #include <scsi/scsi_tcq.h>
  14 #include <linux/utsname.h>
  15
  16
  17 /* QLAFX00 specific Mailbox implementation functions */
  18
  19 /*
  20  * qlafx00_mailbox_command
  21  *      Issue mailbox command and waits for completion.
  22  *
  23  * Input:
  24  *      ha = adapter block pointer.
  25  *      mcp = driver internal mbx struct pointer.
  26  *
  27  * Output:
  28  *      mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  29  *
  30  * Returns:
  31  *      0 : QLA_SUCCESS = cmd performed success
  32  *      1 : QLA_FUNCTION_FAILED   (error encountered)
  33  *      6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  34  *
  35  * Context:
  36  *      Kernel context.
  37  */
  38 static int
  39 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
  40
  41 {
  42         int             rval;
  43         unsigned long    flags = 0;
  44         device_reg_t *reg;
  45         uint8_t         abort_active;
  46         uint8_t         io_lock_on;
  47         uint16_t        command = 0;
  48         uint32_t        *iptr;
  49         uint32_t __iomem *optr;
  50         uint32_t        cnt;
  51         uint32_t        mboxes;
  52         unsigned long   wait_time;
  53         struct qla_hw_data *ha = vha->hw;
  54         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  55
  56         if (ha->pdev->error_state > pci_channel_io_frozen) {
  57                 ql_log(ql_log_warn, vha, 0x115c,
  58                     "error_state is greater than pci_channel_io_frozen, "
  59                     "exiting.\n");
  60                 return QLA_FUNCTION_TIMEOUT;
  61         }
  62
  63         if (vha->device_flags & DFLG_DEV_FAILED) {
  64                 ql_log(ql_log_warn, vha, 0x115f,
  65                     "Device in failed state, exiting.\n");
  66                 return QLA_FUNCTION_TIMEOUT;
  67         }
  68
  69         reg = ha->iobase;
  70         io_lock_on = base_vha->flags.init_done;
  71
  72         rval = QLA_SUCCESS;
  73         abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  74
  75         if (ha->flags.pci_channel_io_perm_failure) {
  76                 ql_log(ql_log_warn, vha, 0x1175,
  77                     "Perm failure on EEH timeout MBX, exiting.\n");
  78                 return QLA_FUNCTION_TIMEOUT;
  79         }
  80
  81         if (ha->flags.isp82xx_fw_hung) {
  82                 /* Setting Link-Down error */
  83                 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
  84                 ql_log(ql_log_warn, vha, 0x1176,
  85                     "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
  86                 rval = QLA_FUNCTION_FAILED;
  87                 goto premature_exit;
  88         }
  89
  90         /*
  91          * Wait for active mailbox commands to finish by waiting at most tov
  92          * seconds. This is to serialize actual issuing of mailbox cmds during
  93          * non ISP abort time.
  94          */
  95         if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  96                 /* Timeout occurred. Return error. */
  97                 ql_log(ql_log_warn, vha, 0x1177,
  98                     "Cmd access timeout, cmd=0x%x, Exiting.\n",
  99                     mcp->mb[0]);
 100                 return QLA_FUNCTION_TIMEOUT;
 101         }
 102
 103         ha->flags.mbox_busy = 1;
 104         /* Save mailbox command for debug */
 105         ha->mcp32 = mcp;
 106
 107         ql_dbg(ql_dbg_mbx, vha, 0x1178,
 108             "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
 109
 110         spin_lock_irqsave(&ha->hardware_lock, flags);
 111
 112         /* Load mailbox registers. */
 113         optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
 114
 115         iptr = mcp->mb;
 116         command = mcp->mb[0];
 117         mboxes = mcp->out_mb;
 118
 119         for (cnt = 0; cnt < ha->mbx_count; cnt++) {
 120                 if (mboxes & BIT_0)
 121                         WRT_REG_DWORD(optr, *iptr);
 122
 123                 mboxes >>= 1;
 124                 optr++;
 125                 iptr++;
 126         }
 127
 128         /* Issue set host interrupt command to send cmd out. */
 129         ha->flags.mbox_int = 0;
 130         clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
 131
 132         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
 133             (uint8_t *)mcp->mb, 16);
 134         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
 135             ((uint8_t *)mcp->mb + 0x10), 16);
 136         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
 137             ((uint8_t *)mcp->mb + 0x20), 8);
 138
 139         /* Unlock mbx registers and wait for interrupt */
 140         ql_dbg(ql_dbg_mbx, vha, 0x1179,
 141             "Going to unlock irq & waiting for interrupts. "
 142             "jiffies=%lx.\n", jiffies);
 143
 144         /* Wait for mbx cmd completion until timeout */
 145         if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
 146                 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
 147
 148                 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
 149                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 150
 151                 WARN_ON_ONCE(wait_for_completion_timeout(&ha->mbx_intr_comp,
 152                                                          mcp->tov * HZ) != 0);
 153         } else {
 154                 ql_dbg(ql_dbg_mbx, vha, 0x112c,
 155                     "Cmd=%x Polling Mode.\n", command);
 156
 157                 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
 158                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 159
 160                 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
 161                 while (!ha->flags.mbox_int) {
 162                         if (time_after(jiffies, wait_time))
 163                                 break;
 164
 165                         /* Check for pending interrupts. */
 166                         qla2x00_poll(ha->rsp_q_map[0]);
 167
 168                         if (!ha->flags.mbox_int &&
 169                             !(IS_QLA2200(ha) &&
 170                             command == MBC_LOAD_RISC_RAM_EXTENDED))
 171                                 usleep_range(10000, 11000);
 172                 } /* while */
 173                 ql_dbg(ql_dbg_mbx, vha, 0x112d,
 174                     "Waited %d sec.\n",
 175                     (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
 176         }
 177
 178         /* Check whether we timed out */
 179         if (ha->flags.mbox_int) {
 180                 uint32_t *iptr2;
 181
 182                 ql_dbg(ql_dbg_mbx, vha, 0x112e,
 183                     "Cmd=%x completed.\n", command);
 184
 185                 /* Got interrupt. Clear the flag. */
 186                 ha->flags.mbox_int = 0;
 187                 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
 188
 189                 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
 190                         rval = QLA_FUNCTION_FAILED;
 191
 192                 /* Load return mailbox registers. */
 193                 iptr2 = mcp->mb;
 194                 iptr = (uint32_t *)&ha->mailbox_out32[0];
 195                 mboxes = mcp->in_mb;
 196                 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
 197                         if (mboxes & BIT_0)
 198                                 *iptr2 = *iptr;
 199
 200                         mboxes >>= 1;
 201                         iptr2++;
 202                         iptr++;
 203                 }
 204         } else {
 205
 206                 rval = QLA_FUNCTION_TIMEOUT;
 207         }
 208
 209         ha->flags.mbox_busy = 0;
 210
 211         /* Clean up */
 212         ha->mcp32 = NULL;
 213
 214         if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
 215                 ql_dbg(ql_dbg_mbx, vha, 0x113a,
 216                     "checking for additional resp interrupt.\n");
 217
 218                 /* polling mode for non isp_abort commands. */
 219                 qla2x00_poll(ha->rsp_q_map[0]);
 220         }
 221
 222         if (rval == QLA_FUNCTION_TIMEOUT &&
 223             mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
 224                 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
 225                     ha->flags.eeh_busy) {
 226                         /* not in dpc. schedule it for dpc to take over. */
 227                         ql_dbg(ql_dbg_mbx, vha, 0x115d,
 228                             "Timeout, schedule isp_abort_needed.\n");
 229
 230                         if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
 231                             !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
 232                             !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
 233
 234                                 ql_log(ql_log_info, base_vha, 0x115e,
 235                                     "Mailbox cmd timeout occurred, cmd=0x%x, "
 236                                     "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
 237                                     "abort.\n", command, mcp->mb[0],
 238                                     ha->flags.eeh_busy);
 239                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 240                                 qla2xxx_wake_dpc(vha);
 241                         }
 242                 } else if (!abort_active) {
 243                         /* call abort directly since we are in the DPC thread */
 244                         ql_dbg(ql_dbg_mbx, vha, 0x1160,
 245                             "Timeout, calling abort_isp.\n");
 246
 247                         if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
 248                             !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
 249                             !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
 250
 251                                 ql_log(ql_log_info, base_vha, 0x1161,
 252                                     "Mailbox cmd timeout occurred, cmd=0x%x, "
 253                                     "mb[0]=0x%x. Scheduling ISP abort ",
 254                                     command, mcp->mb[0]);
 255
 256                                 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
 257                                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
 258                                 if (ha->isp_ops->abort_isp(vha)) {
 259                                         /* Failed. retry later. */
 260                                         set_bit(ISP_ABORT_NEEDED,
 261                                             &vha->dpc_flags);
 262                                 }
 263                                 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
 264                                 ql_dbg(ql_dbg_mbx, vha, 0x1162,
 265                                     "Finished abort_isp.\n");
 266                         }
 267                 }
 268         }
 269
 270 premature_exit:
 271         /* Allow next mbx cmd to come in. */
 272         complete(&ha->mbx_cmd_comp);
 273
 274         if (rval) {
 275                 ql_log(ql_log_warn, base_vha, 0x1163,
 276                        "**** Failed=%x mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
 277                        rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
 278                        command);
 279         } else {
 280                 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
 281         }
 282
 283         return rval;
 284 }
 285
 286 /*
 287  * qlafx00_driver_shutdown
 288  *      Indicate a driver shutdown to firmware.
 289  *
 290  * Input:
 291  *      ha = adapter block pointer.
 292  *
 293  * Returns:
 294  *      local function return status code.
 295  *
 296  * Context:
 297  *      Kernel context.
 298  */
 299 int
 300 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
 301 {
 302         int rval;
 303         struct mbx_cmd_32 mc;
 304         struct mbx_cmd_32 *mcp = &mc;
 305
 306         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
 307             "Entered %s.\n", __func__);
 308
 309         mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
 310         mcp->out_mb = MBX_0;
 311         mcp->in_mb = MBX_0;
 312         if (tmo)
 313                 mcp->tov = tmo;
 314         else
 315                 mcp->tov = MBX_TOV_SECONDS;
 316         mcp->flags = 0;
 317         rval = qlafx00_mailbox_command(vha, mcp);
 318
 319         if (rval != QLA_SUCCESS) {
 320                 ql_dbg(ql_dbg_mbx, vha, 0x1167,
 321                     "Failed=%x.\n", rval);
 322         } else {
 323                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
 324                     "Done %s.\n", __func__);
 325         }
 326
 327         return rval;
 328 }
 329
 330 /*
 331  * qlafx00_get_firmware_state
 332  *      Get adapter firmware state.
 333  *
 334  * Input:
 335  *      ha = adapter block pointer.
 336  *      TARGET_QUEUE_LOCK must be released.
 337  *      ADAPTER_STATE_LOCK must be released.
 338  *
 339  * Returns:
 340  *      qla7xxx local function return status code.
 341  *
 342  * Context:
 343  *      Kernel context.
 344  */
 345 static int
 346 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
 347 {
 348         int rval;
 349         struct mbx_cmd_32 mc;
 350         struct mbx_cmd_32 *mcp = &mc;
 351
 352         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
 353             "Entered %s.\n", __func__);
 354
 355         mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
 356         mcp->out_mb = MBX_0;
 357         mcp->in_mb = MBX_1|MBX_0;
 358         mcp->tov = MBX_TOV_SECONDS;
 359         mcp->flags = 0;
 360         rval = qlafx00_mailbox_command(vha, mcp);
 361
 362         /* Return firmware states. */
 363         states[0] = mcp->mb[1];
 364
 365         if (rval != QLA_SUCCESS) {
 366                 ql_dbg(ql_dbg_mbx, vha, 0x116a,
 367                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
 368         } else {
 369                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
 370                     "Done %s.\n", __func__);
 371         }
 372         return rval;
 373 }
 374
 375 /*
 376  * qlafx00_init_firmware
 377  *      Initialize adapter firmware.
 378  *
 379  * Input:
 380  *      ha = adapter block pointer.
 381  *      dptr = Initialization control block pointer.
 382  *      size = size of initialization control block.
 383  *      TARGET_QUEUE_LOCK must be released.
 384  *      ADAPTER_STATE_LOCK must be released.
 385  *
 386  * Returns:
 387  *      qlafx00 local function return status code.
 388  *
 389  * Context:
 390  *      Kernel context.
 391  */
 392 int
 393 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
 394 {
 395         int rval;
 396         struct mbx_cmd_32 mc;
 397         struct mbx_cmd_32 *mcp = &mc;
 398         struct qla_hw_data *ha = vha->hw;
 399
 400         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
 401             "Entered %s.\n", __func__);
 402
 403         mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
 404
 405         mcp->mb[1] = 0;
 406         mcp->mb[2] = MSD(ha->init_cb_dma);
 407         mcp->mb[3] = LSD(ha->init_cb_dma);
 408
 409         mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
 410         mcp->in_mb = MBX_0;
 411         mcp->buf_size = size;
 412         mcp->flags = MBX_DMA_OUT;
 413         mcp->tov = MBX_TOV_SECONDS;
 414         rval = qlafx00_mailbox_command(vha, mcp);
 415
 416         if (rval != QLA_SUCCESS) {
 417                 ql_dbg(ql_dbg_mbx, vha, 0x116d,
 418                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
 419         } else {
 420                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
 421                     "Done %s.\n", __func__);
 422         }
 423         return rval;
 424 }
 425
 426 /*
 427  * qlafx00_mbx_reg_test
 428  */
 429 static int
 430 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
 431 {
 432         int rval;
 433         struct mbx_cmd_32 mc;
 434         struct mbx_cmd_32 *mcp = &mc;
 435
 436         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
 437             "Entered %s.\n", __func__);
 438
 439
 440         mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
 441         mcp->mb[1] = 0xAAAA;
 442         mcp->mb[2] = 0x5555;
 443         mcp->mb[3] = 0xAA55;
 444         mcp->mb[4] = 0x55AA;
 445         mcp->mb[5] = 0xA5A5;
 446         mcp->mb[6] = 0x5A5A;
 447         mcp->mb[7] = 0x2525;
 448         mcp->mb[8] = 0xBBBB;
 449         mcp->mb[9] = 0x6666;
 450         mcp->mb[10] = 0xBB66;
 451         mcp->mb[11] = 0x66BB;
 452         mcp->mb[12] = 0xB6B6;
 453         mcp->mb[13] = 0x6B6B;
 454         mcp->mb[14] = 0x3636;
 455         mcp->mb[15] = 0xCCCC;
 456
 457
 458         mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
 459                         MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
 460         mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
 461                         MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
 462         mcp->buf_size = 0;
 463         mcp->flags = MBX_DMA_OUT;
 464         mcp->tov = MBX_TOV_SECONDS;
 465         rval = qlafx00_mailbox_command(vha, mcp);
 466         if (rval == QLA_SUCCESS) {
 467                 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
 468                     mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
 469                         rval = QLA_FUNCTION_FAILED;
 470                 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
 471                     mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
 472                         rval = QLA_FUNCTION_FAILED;
 473                 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
 474                     mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
 475                         rval = QLA_FUNCTION_FAILED;
 476                 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
 477                     mcp->mb[31] != 0xCCCC)
 478                         rval = QLA_FUNCTION_FAILED;
 479         }
 480
 481         if (rval != QLA_SUCCESS) {
 482                 ql_dbg(ql_dbg_mbx, vha, 0x1170,
 483                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
 484         } else {
 485                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
 486                     "Done %s.\n", __func__);
 487         }
 488         return rval;
 489 }
 490
 491 /**
 492  * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
 493  * @vha: HA context
 494  *
 495  * Returns 0 on success.
 496  */
 497 int
 498 qlafx00_pci_config(scsi_qla_host_t *vha)
 499 {
 500         uint16_t w;
 501         struct qla_hw_data *ha = vha->hw;
 502
 503         pci_set_master(ha->pdev);
 504         pci_try_set_mwi(ha->pdev);
 505
 506         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
 507         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
 508         w &= ~PCI_COMMAND_INTX_DISABLE;
 509         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
 510
 511         /* PCIe -- adjust Maximum Read Request Size (2048). */
 512         if (pci_is_pcie(ha->pdev))
 513                 pcie_set_readrq(ha->pdev, 2048);
 514
 515         ha->chip_revision = ha->pdev->revision;
 516
 517         return QLA_SUCCESS;
 518 }
 519
 520 /**
 521  * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
 522  * @vha: HA context
 523  *
 524  */
 525 static inline void
 526 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
 527 {
 528         unsigned long flags = 0;
 529         struct qla_hw_data *ha = vha->hw;
 530         int i, core;
 531         uint32_t cnt;
 532         uint32_t reg_val;
 533
 534         spin_lock_irqsave(&ha->hardware_lock, flags);
 535
 536         QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0);
 537         QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0);
 538
 539         /* stop the XOR DMA engines */
 540         QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02);
 541         QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02);
 542         QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02);
 543         QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02);
 544
 545         /* stop the IDMA engines */
 546         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840);
 547         reg_val &= ~(1<<12);
 548         QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val);
 549
 550         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844);
 551         reg_val &= ~(1<<12);
 552         QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val);
 553
 554         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848);
 555         reg_val &= ~(1<<12);
 556         QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val);
 557
 558         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C);
 559         reg_val &= ~(1<<12);
 560         QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val);
 561
 562         for (i = 0; i < 100000; i++) {
 563                 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 &&
 564                     (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0)
 565                         break;
 566                 udelay(100);
 567         }
 568
 569         /* Set all 4 cores in reset */
 570         for (i = 0; i < 4; i++) {
 571                 QLAFX00_SET_HBA_SOC_REG(ha,
 572                     (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
 573                 QLAFX00_SET_HBA_SOC_REG(ha,
 574                     (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
 575         }
 576
 577         /* Reset all units in Fabric */
 578         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101));
 579
 580         /* */
 581         QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1);
 582         QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0);
 583
 584         /* Set all 4 core Memory Power Down Registers */
 585         for (i = 0; i < 5; i++) {
 586                 QLAFX00_SET_HBA_SOC_REG(ha,
 587                     (SOC_PWR_MANAGEMENT_PWR_DOWN_REG + 4*i), (0x0));
 588         }
 589
 590         /* Reset all interrupt control registers */
 591         for (i = 0; i < 115; i++) {
 592                 QLAFX00_SET_HBA_SOC_REG(ha,
 593                     (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
 594         }
 595
 596         /* Reset Timers control registers. per core */
 597         for (core = 0; core < 4; core++)
 598                 for (i = 0; i < 8; i++)
 599                         QLAFX00_SET_HBA_SOC_REG(ha,
 600                             (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
 601
 602         /* Reset per core IRQ ack register */
 603         for (core = 0; core < 4; core++)
 604                 QLAFX00_SET_HBA_SOC_REG(ha,
 605                     (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
 606
 607         /* Set Fabric control and config to defaults */
 608         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
 609         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
 610
 611         /* Kick in Fabric units */
 612         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
 613
 614         /* Kick in Core0 to start boot process */
 615         QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
 616
 617         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 618
 619         /* Wait 10secs for soft-reset to complete. */
 620         for (cnt = 10; cnt; cnt--) {
 621                 msleep(1000);
 622                 barrier();
 623         }
 624 }
 625
 626 /**
 627  * qlafx00_soft_reset() - Soft Reset ISPFx00.
 628  * @vha: HA context
 629  *
 630  * Returns 0 on success.
 631  */
 632 int
 633 qlafx00_soft_reset(scsi_qla_host_t *vha)
 634 {
 635         struct qla_hw_data *ha = vha->hw;
 636         int rval = QLA_FUNCTION_FAILED;
 637
 638         if (unlikely(pci_channel_offline(ha->pdev) &&
 639             ha->flags.pci_channel_io_perm_failure))
 640                 return rval;
 641
 642         ha->isp_ops->disable_intrs(ha);
 643         qlafx00_soc_cpu_reset(vha);
 644
 645         return QLA_SUCCESS;
 646 }
 647
 648 /**
 649  * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
 650  * @vha: HA context
 651  *
 652  * Returns 0 on success.
 653  */
 654 int
 655 qlafx00_chip_diag(scsi_qla_host_t *vha)
 656 {
 657         int rval = 0;
 658         struct qla_hw_data *ha = vha->hw;
 659         struct req_que *req = ha->req_q_map[0];
 660
 661         ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
 662
 663         rval = qlafx00_mbx_reg_test(vha);
 664         if (rval) {
 665                 ql_log(ql_log_warn, vha, 0x1165,
 666                     "Failed mailbox send register test\n");
 667         } else {
 668                 /* Flag a successful rval */
 669                 rval = QLA_SUCCESS;
 670         }
 671         return rval;
 672 }
 673
 674 void
 675 qlafx00_config_rings(struct scsi_qla_host *vha)
 676 {
 677         struct qla_hw_data *ha = vha->hw;
 678         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
 679
 680         WRT_REG_DWORD(&reg->req_q_in, 0);
 681         WRT_REG_DWORD(&reg->req_q_out, 0);
 682
 683         WRT_REG_DWORD(&reg->rsp_q_in, 0);
 684         WRT_REG_DWORD(&reg->rsp_q_out, 0);
 685
 686         /* PCI posting */
 687         RD_REG_DWORD(&reg->rsp_q_out);
 688 }
 689
 690 char *
 691 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 692 {
 693         struct qla_hw_data *ha = vha->hw;
 694
 695         if (pci_is_pcie(ha->pdev))
 696                 strlcpy(str, "PCIe iSA", str_len);
 697         return str;
 698 }
 699
 700 char *
 701 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 702 {
 703         struct qla_hw_data *ha = vha->hw;
 704
 705         snprintf(str, size, "%s", ha->mr.fw_version);
 706         return str;
 707 }
 708
 709 void
 710 qlafx00_enable_intrs(struct qla_hw_data *ha)
 711 {
 712         unsigned long flags = 0;
 713
 714         spin_lock_irqsave(&ha->hardware_lock, flags);
 715         ha->interrupts_on = 1;
 716         QLAFX00_ENABLE_ICNTRL_REG(ha);
 717         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 718 }
 719
 720 void
 721 qlafx00_disable_intrs(struct qla_hw_data *ha)
 722 {
 723         unsigned long flags = 0;
 724
 725         spin_lock_irqsave(&ha->hardware_lock, flags);
 726         ha->interrupts_on = 0;
 727         QLAFX00_DISABLE_ICNTRL_REG(ha);
 728         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 729 }
 730
 731 int
 732 qlafx00_abort_target(fc_port_t *fcport, uint64_t l, int tag)
 733 {
 734         return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
 735 }
 736
 737 int
 738 qlafx00_lun_reset(fc_port_t *fcport, uint64_t l, int tag)
 739 {
 740         return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
 741 }
 742
 743 int
 744 qlafx00_iospace_config(struct qla_hw_data *ha)
 745 {
 746         if (pci_request_selected_regions(ha->pdev, ha->bars,
 747             QLA2XXX_DRIVER_NAME)) {
 748                 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
 749                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
 750                     pci_name(ha->pdev));
 751                 goto iospace_error_exit;
 752         }
 753
 754         /* Use MMIO operations for all accesses. */
 755         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
 756                 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
 757                     "Invalid pci I/O region size (%s).\n",
 758                     pci_name(ha->pdev));
 759                 goto iospace_error_exit;
 760         }
 761         if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
 762                 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
 763                     "Invalid PCI mem BAR0 region size (%s), aborting\n",
 764                         pci_name(ha->pdev));
 765                 goto iospace_error_exit;
 766         }
 767
 768         ha->cregbase =
 769             ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
 770         if (!ha->cregbase) {
 771                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
 772                     "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
 773                 goto iospace_error_exit;
 774         }
 775
 776         if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
 777                 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
 778                     "region #2 not an MMIO resource (%s), aborting\n",
 779                     pci_name(ha->pdev));
 780                 goto iospace_error_exit;
 781         }
 782         if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
 783                 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
 784                     "Invalid PCI mem BAR2 region size (%s), aborting\n",
 785                         pci_name(ha->pdev));
 786                 goto iospace_error_exit;
 787         }
 788
 789         ha->iobase =
 790             ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
 791         if (!ha->iobase) {
 792                 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
 793                     "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
 794                 goto iospace_error_exit;
 795         }
 796
 797         /* Determine queue resources */
 798         ha->max_req_queues = ha->max_rsp_queues = 1;
 799
 800         ql_log_pci(ql_log_info, ha->pdev, 0x012c,
 801             "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
 802             ha->bars, ha->cregbase, ha->iobase);
 803
 804         return 0;
 805
 806 iospace_error_exit:
 807         return -ENOMEM;
 808 }
 809
 810 static void
 811 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
 812 {
 813         struct qla_hw_data *ha = vha->hw;
 814         struct req_que *req = ha->req_q_map[0];
 815         struct rsp_que *rsp = ha->rsp_q_map[0];
 816
 817         req->length_fx00 = req->length;
 818         req->ring_fx00 = req->ring;
 819         req->dma_fx00 = req->dma;
 820
 821         rsp->length_fx00 = rsp->length;
 822         rsp->ring_fx00 = rsp->ring;
 823         rsp->dma_fx00 = rsp->dma;
 824
 825         ql_dbg(ql_dbg_init, vha, 0x012d,
 826             "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
 827             "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
 828             req->length_fx00, (u64)req->dma_fx00);
 829
 830         ql_dbg(ql_dbg_init, vha, 0x012e,
 831             "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
 832             "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
 833             rsp->length_fx00, (u64)rsp->dma_fx00);
 834 }
 835
 836 static int
 837 qlafx00_config_queues(struct scsi_qla_host *vha)
 838 {
 839         struct qla_hw_data *ha = vha->hw;
 840         struct req_que *req = ha->req_q_map[0];
 841         struct rsp_que *rsp = ha->rsp_q_map[0];
 842         dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
 843
 844         req->length = ha->req_que_len;
 845         req->ring = (void __force *)ha->iobase + ha->req_que_off;
 846         req->dma = bar2_hdl + ha->req_que_off;
 847         if ((!req->ring) || (req->length == 0)) {
 848                 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
 849                     "Unable to allocate memory for req_ring\n");
 850                 return QLA_FUNCTION_FAILED;
 851         }
 852
 853         ql_dbg(ql_dbg_init, vha, 0x0130,
 854             "req: %p req_ring pointer %p req len 0x%x "
 855             "req off 0x%x\n, req->dma: 0x%llx",
 856             req, req->ring, req->length,
 857             ha->req_que_off, (u64)req->dma);
 858
 859         rsp->length = ha->rsp_que_len;
 860         rsp->ring = (void __force *)ha->iobase + ha->rsp_que_off;
 861         rsp->dma = bar2_hdl + ha->rsp_que_off;
 862         if ((!rsp->ring) || (rsp->length == 0)) {
 863                 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
 864                     "Unable to allocate memory for rsp_ring\n");
 865                 return QLA_FUNCTION_FAILED;
 866         }
 867
 868         ql_dbg(ql_dbg_init, vha, 0x0132,
 869             "rsp: %p rsp_ring pointer %p rsp len 0x%x "
 870             "rsp off 0x%x, rsp->dma: 0x%llx\n",
 871             rsp, rsp->ring, rsp->length,
 872             ha->rsp_que_off, (u64)rsp->dma);
 873
 874         return QLA_SUCCESS;
 875 }
 876
 877 static int
 878 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
 879 {
 880         int rval = 0;
 881         unsigned long wtime;
 882         uint16_t wait_time;     /* Wait time */
 883         struct qla_hw_data *ha = vha->hw;
 884         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
 885         uint32_t aenmbx, aenmbx7 = 0;
 886         uint32_t pseudo_aen;
 887         uint32_t state[5];
 888         bool done = false;
 889
 890         /* 30 seconds wait - Adjust if required */
 891         wait_time = 30;
 892
 893         pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
 894         if (pseudo_aen == 1) {
 895                 aenmbx7 = RD_REG_DWORD(&reg->initval7);
 896                 ha->mbx_intr_code = MSW(aenmbx7);
 897                 ha->rqstq_intr_code = LSW(aenmbx7);
 898                 rval = qlafx00_driver_shutdown(vha, 10);
 899                 if (rval != QLA_SUCCESS)
 900                         qlafx00_soft_reset(vha);
 901         }
 902
 903         /* wait time before firmware ready */
 904         wtime = jiffies + (wait_time * HZ);
 905         do {
 906                 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
 907                 barrier();
 908                 ql_dbg(ql_dbg_mbx, vha, 0x0133,
 909                     "aenmbx: 0x%x\n", aenmbx);
 910
 911                 switch (aenmbx) {
 912                 case MBA_FW_NOT_STARTED:
 913                 case MBA_FW_STARTING:
 914                         break;
 915
 916                 case MBA_SYSTEM_ERR:
 917                 case MBA_REQ_TRANSFER_ERR:
 918                 case MBA_RSP_TRANSFER_ERR:
 919                 case MBA_FW_INIT_FAILURE:
 920                         qlafx00_soft_reset(vha);
 921                         break;
 922
 923                 case MBA_FW_RESTART_CMPLT:
 924                         /* Set the mbx and rqstq intr code */
 925                         aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
 926                         ha->mbx_intr_code = MSW(aenmbx7);
 927                         ha->rqstq_intr_code = LSW(aenmbx7);
 928                         ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
 929                         ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
 930                         ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
 931                         ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
 932                         WRT_REG_DWORD(&reg->aenmailbox0, 0);
 933                         RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
 934                         ql_dbg(ql_dbg_init, vha, 0x0134,
 935                             "f/w returned mbx_intr_code: 0x%x, "
 936                             "rqstq_intr_code: 0x%x\n",
 937                             ha->mbx_intr_code, ha->rqstq_intr_code);
 938                         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
 939                         rval = QLA_SUCCESS;
 940                         done = true;
 941                         break;
 942
 943                 default:
 944                         if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
 945                                 break;
 946
 947                         /* If fw is apparently not ready. In order to continue,
 948                          * we might need to issue Mbox cmd, but the problem is
 949                          * that the DoorBell vector values that come with the
 950                          * 8060 AEN are most likely gone by now (and thus no
 951                          * bell would be rung on the fw side when mbox cmd is
 952                          * issued). We have to therefore grab the 8060 AEN
 953                          * shadow regs (filled in by FW when the last 8060
 954                          * AEN was being posted).
 955                          * Do the following to determine what is needed in
 956                          * order to get the FW ready:
 957                          * 1. reload the 8060 AEN values from the shadow regs
 958                          * 2. clear int status to get rid of possible pending
 959                          *    interrupts
 960                          * 3. issue Get FW State Mbox cmd to determine fw state
 961                          * Set the mbx and rqstq intr code from Shadow Regs
 962                          */
 963                         aenmbx7 = RD_REG_DWORD(&reg->initval7);
 964                         ha->mbx_intr_code = MSW(aenmbx7);
 965                         ha->rqstq_intr_code = LSW(aenmbx7);
 966                         ha->req_que_off = RD_REG_DWORD(&reg->initval1);
 967                         ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
 968                         ha->req_que_len = RD_REG_DWORD(&reg->initval5);
 969                         ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
 970                         ql_dbg(ql_dbg_init, vha, 0x0135,
 971                             "f/w returned mbx_intr_code: 0x%x, "
 972                             "rqstq_intr_code: 0x%x\n",
 973                             ha->mbx_intr_code, ha->rqstq_intr_code);
 974                         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
 975
 976                         /* Get the FW state */
 977                         rval = qlafx00_get_firmware_state(vha, state);
 978                         if (rval != QLA_SUCCESS) {
 979                                 /* Retry if timer has not expired */
 980                                 break;
 981                         }
 982
 983                         if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
 984                                 /* Firmware is waiting to be
 985                                  * initialized by driver
 986                                  */
 987                                 rval = QLA_SUCCESS;
 988                                 done = true;
 989                                 break;
 990                         }
 991
 992                         /* Issue driver shutdown and wait until f/w recovers.
 993                          * Driver should continue to poll until 8060 AEN is
 994                          * received indicating firmware recovery.
 995                          */
 996                         ql_dbg(ql_dbg_init, vha, 0x0136,
 997                             "Sending Driver shutdown fw_state 0x%x\n",
 998                             state[0]);
 999
1000                         rval = qlafx00_driver_shutdown(vha, 10);
1001                         if (rval != QLA_SUCCESS) {
1002                                 rval = QLA_FUNCTION_FAILED;
1003                                 break;
1004                         }
1005                         msleep(500);
1006
1007                         wtime = jiffies + (wait_time * HZ);
1008                         break;
1009                 }
1010
1011                 if (!done) {
1012                         if (time_after_eq(jiffies, wtime)) {
1013                                 ql_dbg(ql_dbg_init, vha, 0x0137,
1014                                     "Init f/w failed: aen[7]: 0x%x\n",
1015                                     RD_REG_DWORD(&reg->aenmailbox7));
1016                                 rval = QLA_FUNCTION_FAILED;
1017                                 done = true;
1018                                 break;
1019                         }
1020                         /* Delay for a while */
1021                         msleep(500);
1022                 }
1023         } while (!done);
1024
1025         if (rval)
1026                 ql_dbg(ql_dbg_init, vha, 0x0138,
1027                     "%s **** FAILED ****.\n", __func__);
1028         else
1029                 ql_dbg(ql_dbg_init, vha, 0x0139,
1030                     "%s **** SUCCESS ****.\n", __func__);
1031
1032         return rval;
1033 }
1034
1035 /*
1036  * qlafx00_fw_ready() - Waits for firmware ready.
1037  * @ha: HA context
1038  *
1039  * Returns 0 on success.
1040  */
1041 int
1042 qlafx00_fw_ready(scsi_qla_host_t *vha)
1043 {
1044         int             rval;
1045         unsigned long   wtime;
1046         uint16_t        wait_time;      /* Wait time if loop is coming ready */
1047         uint32_t        state[5];
1048
1049         rval = QLA_SUCCESS;
1050
1051         wait_time = 10;
1052
1053         /* wait time before firmware ready */
1054         wtime = jiffies + (wait_time * HZ);
1055
1056         /* Wait for ISP to finish init */
1057         if (!vha->flags.init_done)
1058                 ql_dbg(ql_dbg_init, vha, 0x013a,
1059                     "Waiting for init to complete...\n");
1060
1061         do {
1062                 rval = qlafx00_get_firmware_state(vha, state);
1063
1064                 if (rval == QLA_SUCCESS) {
1065                         if (state[0] == FSTATE_FX00_INITIALIZED) {
1066                                 ql_dbg(ql_dbg_init, vha, 0x013b,
1067                                     "fw_state=%x\n", state[0]);
1068                                 rval = QLA_SUCCESS;
1069                                         break;
1070                         }
1071                 }
1072                 rval = QLA_FUNCTION_FAILED;
1073
1074                 if (time_after_eq(jiffies, wtime))
1075                         break;
1076
1077                 /* Delay for a while */
1078                 msleep(500);
1079
1080                 ql_dbg(ql_dbg_init, vha, 0x013c,
1081                     "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1082         } while (1);
1083
1084
1085         if (rval)
1086                 ql_dbg(ql_dbg_init, vha, 0x013d,
1087                     "Firmware ready **** FAILED ****.\n");
1088         else
1089                 ql_dbg(ql_dbg_init, vha, 0x013e,
1090                     "Firmware ready **** SUCCESS ****.\n");
1091
1092         return rval;
1093 }
1094
1095 static int
1096 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1097         struct list_head *new_fcports)
1098 {
1099         int             rval;
1100         uint16_t        tgt_id;
1101         fc_port_t       *fcport, *new_fcport;
1102         int             found;
1103         struct qla_hw_data *ha = vha->hw;
1104
1105         rval = QLA_SUCCESS;
1106
1107         if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1108                 return QLA_FUNCTION_FAILED;
1109
1110         if ((atomic_read(&vha->loop_down_timer) ||
1111              STATE_TRANSITION(vha))) {
1112                 atomic_set(&vha->loop_down_timer, 0);
1113                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1114                 return QLA_FUNCTION_FAILED;
1115         }
1116
1117         ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1118             "Listing Target bit map...\n");
1119         ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, 0x2089,
1120             ha->gid_list, 32);
1121
1122         /* Allocate temporary rmtport for any new rmtports discovered. */
1123         new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1124         if (new_fcport == NULL)
1125                 return QLA_MEMORY_ALLOC_FAILED;
1126
1127         for_each_set_bit(tgt_id, (void *)ha->gid_list,
1128             QLAFX00_TGT_NODE_LIST_SIZE) {
1129
1130                 /* Send get target node info */
1131                 new_fcport->tgt_id = tgt_id;
1132                 rval = qlafx00_fx_disc(vha, new_fcport,
1133                     FXDISC_GET_TGT_NODE_INFO);
1134                 if (rval != QLA_SUCCESS) {
1135                         ql_log(ql_log_warn, vha, 0x208a,
1136                             "Target info scan failed -- assuming zero-entry "
1137                             "result...\n");
1138                         continue;
1139                 }
1140
1141                 /* Locate matching device in database. */
1142                 found = 0;
1143                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1144                         if (memcmp(new_fcport->port_name,
1145                             fcport->port_name, WWN_SIZE))
1146                                 continue;
1147
1148                         found++;
1149
1150                         /*
1151                          * If tgt_id is same and state FCS_ONLINE, nothing
1152                          * changed.
1153                          */
1154                         if (fcport->tgt_id == new_fcport->tgt_id &&
1155                             atomic_read(&fcport->state) == FCS_ONLINE)
1156                                 break;
1157
1158                         /*
1159                          * Tgt ID changed or device was marked to be updated.
1160                          */
1161                         ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1162                             "TGT-ID Change(%s): Present tgt id: "
1163                             "0x%x state: 0x%x "
1164                             "wwnn = %llx wwpn = %llx.\n",
1165                             __func__, fcport->tgt_id,
1166                             atomic_read(&fcport->state),
1167                             (unsigned long long)wwn_to_u64(fcport->node_name),
1168                             (unsigned long long)wwn_to_u64(fcport->port_name));
1169
1170                         ql_log(ql_log_info, vha, 0x208c,
1171                             "TGT-ID Announce(%s): Discovered tgt "
1172                             "id 0x%x wwnn = %llx "
1173                             "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1174                             (unsigned long long)
1175                             wwn_to_u64(new_fcport->node_name),
1176                             (unsigned long long)
1177                             wwn_to_u64(new_fcport->port_name));
1178
1179                         if (atomic_read(&fcport->state) != FCS_ONLINE) {
1180                                 fcport->old_tgt_id = fcport->tgt_id;
1181                                 fcport->tgt_id = new_fcport->tgt_id;
1182                                 ql_log(ql_log_info, vha, 0x208d,
1183                                    "TGT-ID: New fcport Added: %p\n", fcport);
1184                                 qla2x00_update_fcport(vha, fcport);
1185                         } else {
1186                                 ql_log(ql_log_info, vha, 0x208e,
1187                                     " Existing TGT-ID %x did not get "
1188                                     " offline event from firmware.\n",
1189                                     fcport->old_tgt_id);
1190                                 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1191                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1192                                 kfree(new_fcport);
1193                                 return rval;
1194                         }
1195                         break;
1196                 }
1197
1198                 if (found)
1199                         continue;
1200
1201                 /* If device was not in our fcports list, then add it. */
1202                 list_add_tail(&new_fcport->list, new_fcports);
1203
1204                 /* Allocate a new replacement fcport. */
1205                 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1206                 if (new_fcport == NULL)
1207                         return QLA_MEMORY_ALLOC_FAILED;
1208         }
1209
1210         kfree(new_fcport);
1211         return rval;
1212 }
1213
1214 /*
1215  * qlafx00_configure_all_targets
1216  *      Setup target devices with node ID's.
1217  *
1218  * Input:
1219  *      ha = adapter block pointer.
1220  *
1221  * Returns:
1222  *      0 = success.
1223  *      BIT_0 = error
1224  */
1225 static int
1226 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1227 {
1228         int rval;
1229         fc_port_t *fcport, *rmptemp;
1230         LIST_HEAD(new_fcports);
1231
1232         rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1233             FXDISC_GET_TGT_NODE_LIST);
1234         if (rval != QLA_SUCCESS) {
1235                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1236                 return rval;
1237         }
1238
1239         rval = qlafx00_find_all_targets(vha, &new_fcports);
1240         if (rval != QLA_SUCCESS) {
1241                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1242                 return rval;
1243         }
1244
1245         /*
1246          * Delete all previous devices marked lost.
1247          */
1248         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1249                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1250                         break;
1251
1252                 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1253                         if (fcport->port_type != FCT_INITIATOR)
1254                                 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1255                 }
1256         }
1257
1258         /*
1259          * Add the new devices to our devices list.
1260          */
1261         list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1262                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1263                         break;
1264
1265                 qla2x00_update_fcport(vha, fcport);
1266                 list_move_tail(&fcport->list, &vha->vp_fcports);
1267                 ql_log(ql_log_info, vha, 0x208f,
1268                     "Attach new target id 0x%x wwnn = %llx "
1269                     "wwpn = %llx.\n",
1270                     fcport->tgt_id,
1271                     (unsigned long long)wwn_to_u64(fcport->node_name),
1272                     (unsigned long long)wwn_to_u64(fcport->port_name));
1273         }
1274
1275         /* Free all new device structures not processed. */
1276         list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1277                 list_del(&fcport->list);
1278                 kfree(fcport);
1279         }
1280
1281         return rval;
1282 }
1283
1284 /*
1285  * qlafx00_configure_devices
1286  *      Updates Fibre Channel Device Database with what is actually on loop.
1287  *
1288  * Input:
1289  *      ha                = adapter block pointer.
1290  *
1291  * Returns:
1292  *      0 = success.
1293  *      1 = error.
1294  *      2 = database was full and device was not configured.
1295  */
1296 int
1297 qlafx00_configure_devices(scsi_qla_host_t *vha)
1298 {
1299         int  rval;
1300         unsigned long flags;
1301
1302         rval = QLA_SUCCESS;
1303
1304         flags = vha->dpc_flags;
1305
1306         ql_dbg(ql_dbg_disc, vha, 0x2090,
1307             "Configure devices -- dpc flags =0x%lx\n", flags);
1308
1309         rval = qlafx00_configure_all_targets(vha);
1310
1311         if (rval == QLA_SUCCESS) {
1312                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1313                         rval = QLA_FUNCTION_FAILED;
1314                 } else {
1315                         atomic_set(&vha->loop_state, LOOP_READY);
1316                         ql_log(ql_log_info, vha, 0x2091,
1317                             "Device Ready\n");
1318                 }
1319         }
1320
1321         if (rval) {
1322                 ql_dbg(ql_dbg_disc, vha, 0x2092,
1323                     "%s *** FAILED ***.\n", __func__);
1324         } else {
1325                 ql_dbg(ql_dbg_disc, vha, 0x2093,
1326                     "%s: exiting normally.\n", __func__);
1327         }
1328         return rval;
1329 }
1330
1331 static void
1332 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
1333 {
1334         struct qla_hw_data *ha = vha->hw;
1335         fc_port_t *fcport;
1336
1337         vha->flags.online = 0;
1338         ha->mr.fw_hbt_en = 0;
1339
1340         if (!critemp) {
1341                 ha->flags.chip_reset_done = 0;
1342                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1343                 vha->qla_stats.total_isp_aborts++;
1344                 ql_log(ql_log_info, vha, 0x013f,
1345                     "Performing ISP error recovery - ha = %p.\n", ha);
1346                 ha->isp_ops->reset_chip(vha);
1347         }
1348
1349         if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1350                 atomic_set(&vha->loop_state, LOOP_DOWN);
1351                 atomic_set(&vha->loop_down_timer,
1352                     QLAFX00_LOOP_DOWN_TIME);
1353         } else {
1354                 if (!atomic_read(&vha->loop_down_timer))
1355                         atomic_set(&vha->loop_down_timer,
1356                             QLAFX00_LOOP_DOWN_TIME);
1357         }
1358
1359         /* Clear all async request states across all VPs. */
1360         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1361                 fcport->flags = 0;
1362                 if (atomic_read(&fcport->state) == FCS_ONLINE)
1363                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1364         }
1365
1366         if (!ha->flags.eeh_busy) {
1367                 if (critemp) {
1368                         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1369                 } else {
1370                         /* Requeue all commands in outstanding command list. */
1371                         qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1372                 }
1373         }
1374
1375         qla2x00_free_irqs(vha);
1376         if (critemp)
1377                 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1378         else
1379                 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1380
1381         /* Clear the Interrupts */
1382         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1383
1384         ql_log(ql_log_info, vha, 0x0140,
1385             "%s Done done - ha=%p.\n", __func__, ha);
1386 }
1387
1388 /**
1389  * qlafx00_init_response_q_entries() - Initializes response queue entries.
1390  * @rsp: response queue
1391  *
1392  * Beginning of request ring has initialization control block already built
1393  * by nvram config routine.
1394  *
1395  * Returns 0 on success.
1396  */
1397 void
1398 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1399 {
1400         uint16_t cnt;
1401         response_t *pkt;
1402
1403         rsp->ring_ptr = rsp->ring;
1404         rsp->ring_index    = 0;
1405         rsp->status_srb = NULL;
1406         pkt = rsp->ring_ptr;
1407         for (cnt = 0; cnt < rsp->length; cnt++) {
1408                 pkt->signature = RESPONSE_PROCESSED;
1409                 WRT_REG_DWORD((void __force __iomem *)&pkt->signature,
1410                     RESPONSE_PROCESSED);
1411                 pkt++;
1412         }
1413 }
1414
1415 int
1416 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1417 {
1418         uint32_t status = QLA_FUNCTION_FAILED;
1419         struct qla_hw_data *ha = vha->hw;
1420         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1421         uint32_t aenmbx7;
1422
1423         qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1424
1425         aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1426         ha->mbx_intr_code = MSW(aenmbx7);
1427         ha->rqstq_intr_code = LSW(aenmbx7);
1428         ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1429         ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1430         ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1431         ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1432
1433         ql_dbg(ql_dbg_disc, vha, 0x2094,
1434             "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1435             " Req que offset 0x%x Rsp que offset 0x%x\n",
1436             ha->mbx_intr_code, ha->rqstq_intr_code,
1437             ha->req_que_off, ha->rsp_que_len);
1438
1439         /* Clear the Interrupts */
1440         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1441
1442         status = qla2x00_init_rings(vha);
1443         if (!status) {
1444                 vha->flags.online = 1;
1445
1446                 /* if no cable then assume it's good */
1447                 if ((vha->device_flags & DFLG_NO_CABLE))
1448                         status = 0;
1449                 /* Register system information */
1450                 if (qlafx00_fx_disc(vha,
1451                     &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1452                         ql_dbg(ql_dbg_disc, vha, 0x2095,
1453                             "failed to register host info\n");
1454         }
1455         scsi_unblock_requests(vha->host);
1456         return status;
1457 }
1458
1459 void
1460 qlafx00_timer_routine(scsi_qla_host_t *vha)
1461 {
1462         struct qla_hw_data *ha = vha->hw;
1463         uint32_t fw_heart_beat;
1464         uint32_t aenmbx0;
1465         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1466         uint32_t tempc;
1467
1468         /* Check firmware health */
1469         if (ha->mr.fw_hbt_cnt)
1470                 ha->mr.fw_hbt_cnt--;
1471         else {
1472                 if ((!ha->flags.mr_reset_hdlr_active) &&
1473                     (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1474                     (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1475                     (ha->mr.fw_hbt_en)) {
1476                         fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1477                         if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1478                                 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1479                                 ha->mr.fw_hbt_miss_cnt = 0;
1480                         } else {
1481                                 ha->mr.fw_hbt_miss_cnt++;
1482                                 if (ha->mr.fw_hbt_miss_cnt ==
1483                                     QLAFX00_HEARTBEAT_MISS_CNT) {
1484                                         set_bit(ISP_ABORT_NEEDED,
1485                                             &vha->dpc_flags);
1486                                         qla2xxx_wake_dpc(vha);
1487                                         ha->mr.fw_hbt_miss_cnt = 0;
1488                                 }
1489                         }
1490                 }
1491                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1492         }
1493
1494         if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1495                 /* Reset recovery to be performed in timer routine */
1496                 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1497                 if (ha->mr.fw_reset_timer_exp) {
1498                         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1499                         qla2xxx_wake_dpc(vha);
1500                         ha->mr.fw_reset_timer_exp = 0;
1501                 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1502                         /* Wake up DPC to rescan the targets */
1503                         set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1504                         clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1505                         qla2xxx_wake_dpc(vha);
1506                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1507                 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1508                     (!ha->mr.fw_hbt_en)) {
1509                         ha->mr.fw_hbt_en = 1;
1510                 } else if (!ha->mr.fw_reset_timer_tick) {
1511                         if (aenmbx0 == ha->mr.old_aenmbx0_state)
1512                                 ha->mr.fw_reset_timer_exp = 1;
1513                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1514                 } else if (aenmbx0 == 0xFFFFFFFF) {
1515                         uint32_t data0, data1;
1516
1517                         data0 = QLAFX00_RD_REG(ha,
1518                             QLAFX00_BAR1_BASE_ADDR_REG);
1519                         data1 = QLAFX00_RD_REG(ha,
1520                             QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1521
1522                         data0 &= 0xffff0000;
1523                         data1 &= 0x0000ffff;
1524
1525                         QLAFX00_WR_REG(ha,
1526                             QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1527                             (data0 | data1));
1528                 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1529                         ha->mr.fw_reset_timer_tick =
1530                             QLAFX00_MAX_RESET_INTERVAL;
1531                 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1532                         ha->mr.fw_reset_timer_tick =
1533                             QLAFX00_MAX_RESET_INTERVAL;
1534                 }
1535                 if (ha->mr.old_aenmbx0_state != aenmbx0) {
1536                         ha->mr.old_aenmbx0_state = aenmbx0;
1537                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1538                 }
1539                 ha->mr.fw_reset_timer_tick--;
1540         }
1541         if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1542                 /*
1543                  * Critical temperature recovery to be
1544                  * performed in timer routine
1545                  */
1546                 if (ha->mr.fw_critemp_timer_tick == 0) {
1547                         tempc = QLAFX00_GET_TEMPERATURE(ha);
1548                         ql_dbg(ql_dbg_timer, vha, 0x6012,
1549                             "ISPFx00(%s): Critical temp timer, "
1550                             "current SOC temperature: %d\n",
1551                             __func__, tempc);
1552                         if (tempc < ha->mr.critical_temperature) {
1553                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1554                                 clear_bit(FX00_CRITEMP_RECOVERY,
1555                                     &vha->dpc_flags);
1556                                 qla2xxx_wake_dpc(vha);
1557                         }
1558                         ha->mr.fw_critemp_timer_tick =
1559                             QLAFX00_CRITEMP_INTERVAL;
1560                 } else {
1561                         ha->mr.fw_critemp_timer_tick--;
1562                 }
1563         }
1564         if (ha->mr.host_info_resend) {
1565                 /*
1566                  * Incomplete host info might be sent to firmware
1567                  * durinng system boot - info should be resend
1568                  */
1569                 if (ha->mr.hinfo_resend_timer_tick == 0) {
1570                         ha->mr.host_info_resend = false;
1571                         set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1572                         ha->mr.hinfo_resend_timer_tick =
1573                             QLAFX00_HINFO_RESEND_INTERVAL;
1574                         qla2xxx_wake_dpc(vha);
1575                 } else {
1576                         ha->mr.hinfo_resend_timer_tick--;
1577                 }
1578         }
1579
1580 }
1581
1582 /*
1583  *  qlfx00a_reset_initialize
1584  *      Re-initialize after a iSA device reset.
1585  *
1586  * Input:
1587  *      ha  = adapter block pointer.
1588  *
1589  * Returns:
1590  *      0 = success
1591  */
1592 int
1593 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1594 {
1595         struct qla_hw_data *ha = vha->hw;
1596
1597         if (vha->device_flags & DFLG_DEV_FAILED) {
1598                 ql_dbg(ql_dbg_init, vha, 0x0142,
1599                     "Device in failed state\n");
1600                 return QLA_SUCCESS;
1601         }
1602
1603         ha->flags.mr_reset_hdlr_active = 1;
1604
1605         if (vha->flags.online) {
1606                 scsi_block_requests(vha->host);
1607                 qlafx00_abort_isp_cleanup(vha, false);
1608         }
1609
1610         ql_log(ql_log_info, vha, 0x0143,
1611             "(%s): succeeded.\n", __func__);
1612         ha->flags.mr_reset_hdlr_active = 0;
1613         return QLA_SUCCESS;
1614 }
1615
1616 /*
1617  *  qlafx00_abort_isp
1618  *      Resets ISP and aborts all outstanding commands.
1619  *
1620  * Input:
1621  *      ha  = adapter block pointer.
1622  *
1623  * Returns:
1624  *      0 = success
1625  */
1626 int
1627 qlafx00_abort_isp(scsi_qla_host_t *vha)
1628 {
1629         struct qla_hw_data *ha = vha->hw;
1630
1631         if (vha->flags.online) {
1632                 if (unlikely(pci_channel_offline(ha->pdev) &&
1633                     ha->flags.pci_channel_io_perm_failure)) {
1634                         clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1635                         return QLA_SUCCESS;
1636                 }
1637
1638                 scsi_block_requests(vha->host);
1639                 qlafx00_abort_isp_cleanup(vha, false);
1640         } else {
1641                 scsi_block_requests(vha->host);
1642                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1643                 vha->qla_stats.total_isp_aborts++;
1644                 ha->isp_ops->reset_chip(vha);
1645                 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1646                 /* Clear the Interrupts */
1647                 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1648         }
1649
1650         ql_log(ql_log_info, vha, 0x0145,
1651             "(%s): succeeded.\n", __func__);
1652
1653         return QLA_SUCCESS;
1654 }
1655
1656 static inline fc_port_t*
1657 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1658 {
1659         fc_port_t       *fcport;
1660
1661         /* Check for matching device in remote port list. */
1662         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1663                 if (fcport->tgt_id == tgt_id) {
1664                         ql_dbg(ql_dbg_async, vha, 0x5072,
1665                             "Matching fcport(%p) found with TGT-ID: 0x%x "
1666                             "and Remote TGT_ID: 0x%x\n",
1667                             fcport, fcport->tgt_id, tgt_id);
1668                         return fcport;
1669                 }
1670         }
1671         return NULL;
1672 }
1673
1674 static void
1675 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1676 {
1677         fc_port_t       *fcport;
1678
1679         ql_log(ql_log_info, vha, 0x5073,
1680             "Detach TGT-ID: 0x%x\n", tgt_id);
1681
1682         fcport = qlafx00_get_fcport(vha, tgt_id);
1683         if (!fcport)
1684                 return;
1685
1686         qla2x00_mark_device_lost(vha, fcport, 0, 0);
1687
1688         return;
1689 }
1690
1691 int
1692 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1693 {
1694         int rval = 0;
1695         uint32_t aen_code, aen_data;
1696
1697         aen_code = FCH_EVT_VENDOR_UNIQUE;
1698         aen_data = evt->u.aenfx.evtcode;
1699
1700         switch (evt->u.aenfx.evtcode) {
1701         case QLAFX00_MBA_PORT_UPDATE:           /* Port database update */
1702                 if (evt->u.aenfx.mbx[1] == 0) {
1703                         if (evt->u.aenfx.mbx[2] == 1) {
1704                                 if (!vha->flags.fw_tgt_reported)
1705                                         vha->flags.fw_tgt_reported = 1;
1706                                 atomic_set(&vha->loop_down_timer, 0);
1707                                 atomic_set(&vha->loop_state, LOOP_UP);
1708                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1709                                 qla2xxx_wake_dpc(vha);
1710                         } else if (evt->u.aenfx.mbx[2] == 2) {
1711                                 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1712                         }
1713                 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1714                         if (evt->u.aenfx.mbx[2] == 1) {
1715                                 if (!vha->flags.fw_tgt_reported)
1716                                         vha->flags.fw_tgt_reported = 1;
1717                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1718                         } else if (evt->u.aenfx.mbx[2] == 2) {
1719                                 vha->device_flags |= DFLG_NO_CABLE;
1720                                 qla2x00_mark_all_devices_lost(vha, 1);
1721                         }
1722                 }
1723                 break;
1724         case QLAFX00_MBA_LINK_UP:
1725                 aen_code = FCH_EVT_LINKUP;
1726                 aen_data = 0;
1727                 break;
1728         case QLAFX00_MBA_LINK_DOWN:
1729                 aen_code = FCH_EVT_LINKDOWN;
1730                 aen_data = 0;
1731                 break;
1732         case QLAFX00_MBA_TEMP_CRIT:     /* Critical temperature event */
1733                 ql_log(ql_log_info, vha, 0x5082,
1734                     "Process critical temperature event "
1735                     "aenmb[0]: %x\n",
1736                     evt->u.aenfx.evtcode);
1737                 scsi_block_requests(vha->host);
1738                 qlafx00_abort_isp_cleanup(vha, true);
1739                 scsi_unblock_requests(vha->host);
1740                 break;
1741         }
1742
1743         fc_host_post_event(vha->host, fc_get_event_number(),
1744             aen_code, aen_data);
1745
1746         return rval;
1747 }
1748
1749 static void
1750 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1751 {
1752         u64 port_name = 0, node_name = 0;
1753
1754         port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1755         node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1756
1757         fc_host_node_name(vha->host) = node_name;
1758         fc_host_port_name(vha->host) = port_name;
1759         if (!pinfo->port_type)
1760                 vha->hw->current_topology = ISP_CFG_F;
1761         if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1762                 atomic_set(&vha->loop_state, LOOP_READY);
1763         else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1764                 atomic_set(&vha->loop_state, LOOP_DOWN);
1765         vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1766 }
1767
1768 static void
1769 qla2x00_fxdisc_iocb_timeout(void *data)
1770 {
1771         srb_t *sp = data;
1772         struct srb_iocb *lio = &sp->u.iocb_cmd;
1773
1774         complete(&lio->u.fxiocb.fxiocb_comp);
1775 }
1776
1777 static void qla2x00_fxdisc_sp_done(srb_t *sp, int res)
1778 {
1779         struct srb_iocb *lio = &sp->u.iocb_cmd;
1780
1781         complete(&lio->u.fxiocb.fxiocb_comp);
1782 }
1783
1784 int
1785 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1786 {
1787         srb_t *sp;
1788         struct srb_iocb *fdisc;
1789         int rval = QLA_FUNCTION_FAILED;
1790         struct qla_hw_data *ha = vha->hw;
1791         struct host_system_info *phost_info;
1792         struct register_host_info *preg_hsi;
1793         struct new_utsname *p_sysid = NULL;
1794
1795         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1796         if (!sp)
1797                 goto done;
1798
1799         sp->type = SRB_FXIOCB_DCMD;
1800         sp->name = "fxdisc";
1801
1802         fdisc = &sp->u.iocb_cmd;
1803         fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1804         qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1805
1806         switch (fx_type) {
1807         case FXDISC_GET_CONFIG_INFO:
1808         fdisc->u.fxiocb.flags =
1809                     SRB_FXDISC_RESP_DMA_VALID;
1810                 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1811                 break;
1812         case FXDISC_GET_PORT_INFO:
1813                 fdisc->u.fxiocb.flags =
1814                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1815                 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1816                 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1817                 break;
1818         case FXDISC_GET_TGT_NODE_INFO:
1819                 fdisc->u.fxiocb.flags =
1820                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1821                 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1822                 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1823                 break;
1824         case FXDISC_GET_TGT_NODE_LIST:
1825                 fdisc->u.fxiocb.flags =
1826                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1827                 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1828                 break;
1829         case FXDISC_REG_HOST_INFO:
1830                 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1831                 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1832                 p_sysid = utsname();
1833                 if (!p_sysid) {
1834                         ql_log(ql_log_warn, vha, 0x303c,
1835                             "Not able to get the system information\n");
1836                         goto done_free_sp;
1837                 }
1838                 break;
1839         case FXDISC_ABORT_IOCTL:
1840         default:
1841                 break;
1842         }
1843
1844         if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1845                 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1846                     fdisc->u.fxiocb.req_len,
1847                     &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1848                 if (!fdisc->u.fxiocb.req_addr)
1849                         goto done_free_sp;
1850
1851                 if (fx_type == FXDISC_REG_HOST_INFO) {
1852                         preg_hsi = (struct register_host_info *)
1853                                 fdisc->u.fxiocb.req_addr;
1854                         phost_info = &preg_hsi->hsi;
1855                         memset(preg_hsi, 0, sizeof(struct register_host_info));
1856                         phost_info->os_type = OS_TYPE_LINUX;
1857                         strlcpy(phost_info->sysname, p_sysid->sysname,
1858                                 sizeof(phost_info->sysname));
1859                         strlcpy(phost_info->nodename, p_sysid->nodename,
1860                                 sizeof(phost_info->nodename));
1861                         if (!strcmp(phost_info->nodename, "(none)"))
1862                                 ha->mr.host_info_resend = true;
1863                         strlcpy(phost_info->release, p_sysid->release,
1864                                 sizeof(phost_info->release));
1865                         strlcpy(phost_info->version, p_sysid->version,
1866                                 sizeof(phost_info->version));
1867                         strlcpy(phost_info->machine, p_sysid->machine,
1868                                 sizeof(phost_info->machine));
1869                         strlcpy(phost_info->domainname, p_sysid->domainname,
1870                                 sizeof(phost_info->domainname));
1871                         strlcpy(phost_info->hostdriver, QLA2XXX_VERSION,
1872                                 sizeof(phost_info->hostdriver));
1873                         preg_hsi->utc = (uint64_t)ktime_get_real_seconds();
1874                         ql_dbg(ql_dbg_init, vha, 0x0149,
1875                             "ISP%04X: Host registration with firmware\n",
1876                             ha->pdev->device);
1877                         ql_dbg(ql_dbg_init, vha, 0x014a,
1878                             "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1879                             phost_info->os_type,
1880                             phost_info->sysname,
1881                             phost_info->nodename);
1882                         ql_dbg(ql_dbg_init, vha, 0x014b,
1883                             "release = '%s', version = '%s'\n",
1884                             phost_info->release,
1885                             phost_info->version);
1886                         ql_dbg(ql_dbg_init, vha, 0x014c,
1887                             "machine = '%s' "
1888                             "domainname = '%s', hostdriver = '%s'\n",
1889                             phost_info->machine,
1890                             phost_info->domainname,
1891                             phost_info->hostdriver);
1892                         ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1893                             phost_info, sizeof(*phost_info));
1894                 }
1895         }
1896
1897         if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1898                 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1899                     fdisc->u.fxiocb.rsp_len,
1900                     &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1901                 if (!fdisc->u.fxiocb.rsp_addr)
1902                         goto done_unmap_req;
1903         }
1904
1905         fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1906         sp->done = qla2x00_fxdisc_sp_done;
1907
1908         rval = qla2x00_start_sp(sp);
1909         if (rval != QLA_SUCCESS)
1910                 goto done_unmap_dma;
1911
1912         wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1913
1914         if (fx_type == FXDISC_GET_CONFIG_INFO) {
1915                 struct config_info_data *pinfo =
1916                     (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1917                 strlcpy(vha->hw->model_number, pinfo->model_num,
1918                         ARRAY_SIZE(vha->hw->model_number));
1919                 strlcpy(vha->hw->model_desc, pinfo->model_description,
1920                         ARRAY_SIZE(vha->hw->model_desc));
1921                 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1922                     sizeof(vha->hw->mr.symbolic_name));
1923                 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1924                     sizeof(vha->hw->mr.serial_num));
1925                 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1926                     sizeof(vha->hw->mr.hw_version));
1927                 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1928                     sizeof(vha->hw->mr.fw_version));
1929                 strim(vha->hw->mr.fw_version);
1930                 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1931                     sizeof(vha->hw->mr.uboot_version));
1932                 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1933                     sizeof(vha->hw->mr.fru_serial_num));
1934                 vha->hw->mr.critical_temperature =
1935                     (pinfo->nominal_temp_value) ?
1936                     pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1937                 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1938                     QLAFX00_EXTENDED_IO_EN_MASK) != 0;
1939         } else if (fx_type == FXDISC_GET_PORT_INFO) {
1940                 struct port_info_data *pinfo =
1941                     (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1942                 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1943                 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1944                 vha->d_id.b.domain = pinfo->port_id[0];
1945                 vha->d_id.b.area = pinfo->port_id[1];
1946                 vha->d_id.b.al_pa = pinfo->port_id[2];
1947                 qlafx00_update_host_attr(vha, pinfo);
1948                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1949                     pinfo, 16);
1950         } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1951                 struct qlafx00_tgt_node_info *pinfo =
1952                     (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1953                 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1954                 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1955                 fcport->port_type = FCT_TARGET;
1956                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1957                     pinfo, 16);
1958         } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1959                 struct qlafx00_tgt_node_info *pinfo =
1960                     (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1961                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1962                     pinfo, 16);
1963                 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1964         } else if (fx_type == FXDISC_ABORT_IOCTL)
1965                 fdisc->u.fxiocb.result =
1966                     (fdisc->u.fxiocb.result ==
1967                         cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
1968                     cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1969
1970         rval = le32_to_cpu(fdisc->u.fxiocb.result);
1971
1972 done_unmap_dma:
1973         if (fdisc->u.fxiocb.rsp_addr)
1974                 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1975                     fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1976
1977 done_unmap_req:
1978         if (fdisc->u.fxiocb.req_addr)
1979                 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1980                     fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1981 done_free_sp:
1982         sp->free(sp);
1983 done:
1984         return rval;
1985 }
1986
1987 /*
1988  * qlafx00_initialize_adapter
1989  *      Initialize board.
1990  *
1991  * Input:
1992  *      ha = adapter block pointer.
1993  *
1994  * Returns:
1995  *      0 = success
1996  */
1997 int
1998 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
1999 {
2000         int     rval;
2001         struct qla_hw_data *ha = vha->hw;
2002         uint32_t tempc;
2003
2004         /* Clear adapter flags. */
2005         vha->flags.online = 0;
2006         ha->flags.chip_reset_done = 0;
2007         vha->flags.reset_active = 0;
2008         ha->flags.pci_channel_io_perm_failure = 0;
2009         ha->flags.eeh_busy = 0;
2010         atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2011         atomic_set(&vha->loop_state, LOOP_DOWN);
2012         vha->device_flags = DFLG_NO_CABLE;
2013         vha->dpc_flags = 0;
2014         vha->flags.management_server_logged_in = 0;
2015         ha->isp_abort_cnt = 0;
2016         ha->beacon_blink_led = 0;
2017
2018         set_bit(0, ha->req_qid_map);
2019         set_bit(0, ha->rsp_qid_map);
2020
2021         ql_dbg(ql_dbg_init, vha, 0x0147,
2022             "Configuring PCI space...\n");
2023
2024         rval = ha->isp_ops->pci_config(vha);
2025         if (rval) {
2026                 ql_log(ql_log_warn, vha, 0x0148,
2027                     "Unable to configure PCI space.\n");
2028                 return rval;
2029         }
2030
2031         rval = qlafx00_init_fw_ready(vha);
2032         if (rval != QLA_SUCCESS)
2033                 return rval;
2034
2035         qlafx00_save_queue_ptrs(vha);
2036
2037         rval = qlafx00_config_queues(vha);
2038         if (rval != QLA_SUCCESS)
2039                 return rval;
2040
2041         /*
2042          * Allocate the array of outstanding commands
2043          * now that we know the firmware resources.
2044          */
2045         rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2046         if (rval != QLA_SUCCESS)
2047                 return rval;
2048
2049         rval = qla2x00_init_rings(vha);
2050         ha->flags.chip_reset_done = 1;
2051
2052         tempc = QLAFX00_GET_TEMPERATURE(ha);
2053         ql_dbg(ql_dbg_init, vha, 0x0152,
2054             "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2055             __func__, tempc);
2056
2057         return rval;
2058 }
2059
2060 uint32_t
2061 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2062                       char *buf)
2063 {
2064         scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2065         int rval = QLA_FUNCTION_FAILED;
2066         uint32_t state[1];
2067
2068         if (qla2x00_reset_active(vha))
2069                 ql_log(ql_log_warn, vha, 0x70ce,
2070                     "ISP reset active.\n");
2071         else if (!vha->hw->flags.eeh_busy) {
2072                 rval = qlafx00_get_firmware_state(vha, state);
2073         }
2074         if (rval != QLA_SUCCESS)
2075                 memset(state, -1, sizeof(state));
2076
2077         return state[0];
2078 }
2079
2080 void
2081 qlafx00_get_host_speed(struct Scsi_Host *shost)
2082 {
2083         struct qla_hw_data *ha = ((struct scsi_qla_host *)
2084                                         (shost_priv(shost)))->hw;
2085         u32 speed = FC_PORTSPEED_UNKNOWN;
2086
2087         switch (ha->link_data_rate) {
2088         case QLAFX00_PORT_SPEED_2G:
2089                 speed = FC_PORTSPEED_2GBIT;
2090                 break;
2091         case QLAFX00_PORT_SPEED_4G:
2092                 speed = FC_PORTSPEED_4GBIT;
2093                 break;
2094         case QLAFX00_PORT_SPEED_8G:
2095                 speed = FC_PORTSPEED_8GBIT;
2096                 break;
2097         case QLAFX00_PORT_SPEED_10G:
2098                 speed = FC_PORTSPEED_10GBIT;
2099                 break;
2100         }
2101         fc_host_speed(shost) = speed;
2102 }
2103
2104 /** QLAFX00 specific ISR implementation functions */
2105
2106 static inline void
2107 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2108                      uint32_t sense_len, struct rsp_que *rsp, int res)
2109 {
2110         struct scsi_qla_host *vha = sp->vha;
2111         struct scsi_cmnd *cp = GET_CMD_SP(sp);
2112         uint32_t track_sense_len;
2113
2114         SET_FW_SENSE_LEN(sp, sense_len);
2115
2116         if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2117                 sense_len = SCSI_SENSE_BUFFERSIZE;
2118
2119         SET_CMD_SENSE_LEN(sp, sense_len);
2120         SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2121         track_sense_len = sense_len;
2122
2123         if (sense_len > par_sense_len)
2124                 sense_len = par_sense_len;
2125
2126         memcpy(cp->sense_buffer, sense_data, sense_len);
2127
2128         SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2129
2130         SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2131         track_sense_len -= sense_len;
2132         SET_CMD_SENSE_LEN(sp, track_sense_len);
2133
2134         ql_dbg(ql_dbg_io, vha, 0x304d,
2135             "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2136             sense_len, par_sense_len, track_sense_len);
2137         if (GET_FW_SENSE_LEN(sp) > 0) {
2138                 rsp->status_srb = sp;
2139                 cp->result = res;
2140         }
2141
2142         if (sense_len) {
2143                 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2144                     "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2145                     sp->vha->host_no, cp->device->id, cp->device->lun,
2146                     cp);
2147                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2148                     cp->sense_buffer, sense_len);
2149         }
2150 }
2151
2152 static void
2153 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2154                       struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2155                       __le16 sstatus, __le16 cpstatus)
2156 {
2157         struct srb_iocb *tmf;
2158
2159         tmf = &sp->u.iocb_cmd;
2160         if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2161             (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2162                 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2163         tmf->u.tmf.comp_status = cpstatus;
2164         sp->done(sp, 0);
2165 }
2166
2167 static void
2168 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2169                          struct abort_iocb_entry_fx00 *pkt)
2170 {
2171         const char func[] = "ABT_IOCB";
2172         srb_t *sp;
2173         struct srb_iocb *abt;
2174
2175         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2176         if (!sp)
2177                 return;
2178
2179         abt = &sp->u.iocb_cmd;
2180         abt->u.abt.comp_status = pkt->tgt_id_sts;
2181         sp->done(sp, 0);
2182 }
2183
2184 static void
2185 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2186                          struct ioctl_iocb_entry_fx00 *pkt)
2187 {
2188         const char func[] = "IOSB_IOCB";
2189         srb_t *sp;
2190         struct bsg_job *bsg_job;
2191         struct fc_bsg_reply *bsg_reply;
2192         struct srb_iocb *iocb_job;
2193         int res = 0;
2194         struct qla_mt_iocb_rsp_fx00 fstatus;
2195         uint8_t *fw_sts_ptr;
2196
2197         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2198         if (!sp)
2199                 return;
2200
2201         if (sp->type == SRB_FXIOCB_DCMD) {
2202                 iocb_job = &sp->u.iocb_cmd;
2203                 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2204                 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2205                 iocb_job->u.fxiocb.result = pkt->status;
2206                 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2207                         iocb_job->u.fxiocb.req_data =
2208                             pkt->dataword_r;
2209         } else {
2210                 bsg_job = sp->u.bsg_job;
2211                 bsg_reply = bsg_job->reply;
2212
2213                 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2214
2215                 fstatus.reserved_1 = pkt->reserved_0;
2216                 fstatus.func_type = pkt->comp_func_num;
2217                 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2218                 fstatus.ioctl_data = pkt->dataword_r;
2219                 fstatus.adapid = pkt->adapid;
2220                 fstatus.reserved_2 = pkt->dataword_r_extra;
2221                 fstatus.res_count = pkt->residuallen;
2222                 fstatus.status = pkt->status;
2223                 fstatus.seq_number = pkt->seq_no;
2224                 memcpy(fstatus.reserved_3,
2225                     pkt->reserved_2, 20 * sizeof(uint8_t));
2226
2227                 fw_sts_ptr = bsg_job->reply + sizeof(struct fc_bsg_reply);
2228
2229                 memcpy(fw_sts_ptr, &fstatus, sizeof(fstatus));
2230                 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2231                         sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2232
2233                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2234                     sp->vha, 0x5080, pkt, sizeof(*pkt));
2235
2236                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2237                     sp->vha, 0x5074,
2238                     fw_sts_ptr, sizeof(fstatus));
2239
2240                 res = bsg_reply->result = DID_OK << 16;
2241                 bsg_reply->reply_payload_rcv_len =
2242                     bsg_job->reply_payload.payload_len;
2243         }
2244         sp->done(sp, res);
2245 }
2246
2247 /**
2248  * qlafx00_status_entry() - Process a Status IOCB entry.
2249  * @vha: SCSI driver HA context
2250  * @rsp: response queue
2251  * @pkt: Entry pointer
2252  */
2253 static void
2254 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2255 {
2256         srb_t           *sp;
2257         fc_port_t       *fcport;
2258         struct scsi_cmnd *cp;
2259         struct sts_entry_fx00 *sts;
2260         __le16          comp_status;
2261         __le16          scsi_status;
2262         __le16          lscsi_status;
2263         int32_t         resid;
2264         uint32_t        sense_len, par_sense_len, rsp_info_len, resid_len,
2265             fw_resid_len;
2266         uint8_t         *rsp_info = NULL, *sense_data = NULL;
2267         struct qla_hw_data *ha = vha->hw;
2268         uint32_t hindex, handle;
2269         uint16_t que;
2270         struct req_que *req;
2271         int logit = 1;
2272         int res = 0;
2273
2274         sts = (struct sts_entry_fx00 *) pkt;
2275
2276         comp_status = sts->comp_status;
2277         scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2278         hindex = sts->handle;
2279         handle = LSW(hindex);
2280
2281         que = MSW(hindex);
2282         req = ha->req_q_map[que];
2283
2284         /* Validate handle. */
2285         if (handle < req->num_outstanding_cmds)
2286                 sp = req->outstanding_cmds[handle];
2287         else
2288                 sp = NULL;
2289
2290         if (sp == NULL) {
2291                 ql_dbg(ql_dbg_io, vha, 0x3034,
2292                     "Invalid status handle (0x%x).\n", handle);
2293
2294                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2295                 qla2xxx_wake_dpc(vha);
2296                 return;
2297         }
2298
2299         if (sp->type == SRB_TM_CMD) {
2300                 req->outstanding_cmds[handle] = NULL;
2301                 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2302                     scsi_status, comp_status);
2303                 return;
2304         }
2305
2306         /* Fast path completion. */
2307         if (comp_status == CS_COMPLETE && scsi_status == 0) {
2308                 qla2x00_process_completed_request(vha, req, handle);
2309                 return;
2310         }
2311
2312         req->outstanding_cmds[handle] = NULL;
2313         cp = GET_CMD_SP(sp);
2314         if (cp == NULL) {
2315                 ql_dbg(ql_dbg_io, vha, 0x3048,
2316                     "Command already returned (0x%x/%p).\n",
2317                     handle, sp);
2318
2319                 return;
2320         }
2321
2322         lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2323
2324         fcport = sp->fcport;
2325
2326         sense_len = par_sense_len = rsp_info_len = resid_len =
2327                 fw_resid_len = 0;
2328         if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2329                 sense_len = sts->sense_len;
2330         if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2331             | (uint16_t)SS_RESIDUAL_OVER)))
2332                 resid_len = le32_to_cpu(sts->residual_len);
2333         if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2334                 fw_resid_len = le32_to_cpu(sts->residual_len);
2335         rsp_info = sense_data = sts->data;
2336         par_sense_len = sizeof(sts->data);
2337
2338         /* Check for overrun. */
2339         if (comp_status == CS_COMPLETE &&
2340             scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2341                 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2342
2343         /*
2344          * Based on Host and scsi status generate status code for Linux
2345          */
2346         switch (le16_to_cpu(comp_status)) {
2347         case CS_COMPLETE:
2348         case CS_QUEUE_FULL:
2349                 if (scsi_status == 0) {
2350                         res = DID_OK << 16;
2351                         break;
2352                 }
2353                 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2354                     | (uint16_t)SS_RESIDUAL_OVER))) {
2355                         resid = resid_len;
2356                         scsi_set_resid(cp, resid);
2357
2358                         if (!lscsi_status &&
2359                             ((unsigned)(scsi_bufflen(cp) - resid) <
2360                              cp->underflow)) {
2361                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2362                                     "Mid-layer underflow "
2363                                     "detected (0x%x of 0x%x bytes).\n",
2364                                     resid, scsi_bufflen(cp));
2365
2366                                 res = DID_ERROR << 16;
2367                                 break;
2368                         }
2369                 }
2370                 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2371
2372                 if (lscsi_status ==
2373                     cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2374                         ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2375                             "QUEUE FULL detected.\n");
2376                         break;
2377                 }
2378                 logit = 0;
2379                 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2380                         break;
2381
2382                 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2383                 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2384                         break;
2385
2386                 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2387                     rsp, res);
2388                 break;
2389
2390         case CS_DATA_UNDERRUN:
2391                 /* Use F/W calculated residual length. */
2392                 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2393                         resid = fw_resid_len;
2394                 else
2395                         resid = resid_len;
2396                 scsi_set_resid(cp, resid);
2397                 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2398                         if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2399                             && fw_resid_len != resid_len) {
2400                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2401                                     "Dropped frame(s) detected "
2402                                     "(0x%x of 0x%x bytes).\n",
2403                                     resid, scsi_bufflen(cp));
2404
2405                                 res = DID_ERROR << 16 |
2406                                     le16_to_cpu(lscsi_status);
2407                                 goto check_scsi_status;
2408                         }
2409
2410                         if (!lscsi_status &&
2411                             ((unsigned)(scsi_bufflen(cp) - resid) <
2412                             cp->underflow)) {
2413                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2414                                     "Mid-layer underflow "
2415                                     "detected (0x%x of 0x%x bytes, "
2416                                     "cp->underflow: 0x%x).\n",
2417                                     resid, scsi_bufflen(cp), cp->underflow);
2418
2419                                 res = DID_ERROR << 16;
2420                                 break;
2421                         }
2422                 } else if (lscsi_status !=
2423                     cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2424                     lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2425                         /*
2426                          * scsi status of task set and busy are considered
2427                          * to be task not completed.
2428                          */
2429
2430                         ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2431                             "Dropped frame(s) detected (0x%x "
2432                             "of 0x%x bytes).\n", resid,
2433                             scsi_bufflen(cp));
2434
2435                         res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2436                         goto check_scsi_status;
2437                 } else {
2438                         ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2439                             "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2440                             scsi_status, lscsi_status);
2441                 }
2442
2443                 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2444                 logit = 0;
2445
2446 check_scsi_status:
2447                 /*
2448                  * Check to see if SCSI Status is non zero. If so report SCSI
2449                  * Status.
2450                  */
2451                 if (lscsi_status != 0) {
2452                         if (lscsi_status ==
2453                             cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2454                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2455                                     "QUEUE FULL detected.\n");
2456                                 logit = 1;
2457                                 break;
2458                         }
2459                         if (lscsi_status !=
2460                             cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2461                                 break;
2462
2463                         memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2464                         if (!(scsi_status &
2465                             cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2466                                 break;
2467
2468                         qlafx00_handle_sense(sp, sense_data, par_sense_len,
2469                             sense_len, rsp, res);
2470                 }
2471                 break;
2472
2473         case CS_PORT_LOGGED_OUT:
2474         case CS_PORT_CONFIG_CHG:
2475         case CS_PORT_BUSY:
2476         case CS_INCOMPLETE:
2477         case CS_PORT_UNAVAILABLE:
2478         case CS_TIMEOUT:
2479         case CS_RESET:
2480
2481                 /*
2482                  * We are going to have the fc class block the rport
2483                  * while we try to recover so instruct the mid layer
2484                  * to requeue until the class decides how to handle this.
2485                  */
2486                 res = DID_TRANSPORT_DISRUPTED << 16;
2487
2488                 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2489                     "Port down status: port-state=0x%x.\n",
2490                     atomic_read(&fcport->state));
2491
2492                 if (atomic_read(&fcport->state) == FCS_ONLINE)
2493                         qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2494                 break;
2495
2496         case CS_ABORTED:
2497                 res = DID_RESET << 16;
2498                 break;
2499
2500         default:
2501                 res = DID_ERROR << 16;
2502                 break;
2503         }
2504
2505         if (logit)
2506                 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2507                     "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
2508                     "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2509                     "rsp_info=%p resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2510                     "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2511                     comp_status, scsi_status, res, vha->host_no,
2512                     cp->device->id, cp->device->lun, fcport->tgt_id,
2513                     lscsi_status, cp->cmnd, scsi_bufflen(cp),
2514                     rsp_info, resid_len, fw_resid_len, sense_len,
2515                     par_sense_len, rsp_info_len);
2516
2517         if (rsp->status_srb == NULL)
2518                 sp->done(sp, res);
2519         else
2520                 WARN_ON_ONCE(true);
2521 }
2522
2523 /**
2524  * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2525  * @rsp: response queue
2526  * @pkt: Entry pointer
2527  *
2528  * Extended sense data.
2529  */
2530 static void
2531 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2532 {
2533         uint8_t sense_sz = 0;
2534         struct qla_hw_data *ha = rsp->hw;
2535         struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2536         srb_t *sp = rsp->status_srb;
2537         struct scsi_cmnd *cp;
2538         uint32_t sense_len;
2539         uint8_t *sense_ptr;
2540
2541         if (!sp) {
2542                 ql_dbg(ql_dbg_io, vha, 0x3037,
2543                     "no SP, sp = %p\n", sp);
2544                 return;
2545         }
2546
2547         if (!GET_FW_SENSE_LEN(sp)) {
2548                 ql_dbg(ql_dbg_io, vha, 0x304b,
2549                     "no fw sense data, sp = %p\n", sp);
2550                 return;
2551         }
2552         cp = GET_CMD_SP(sp);
2553         if (cp == NULL) {
2554                 ql_log(ql_log_warn, vha, 0x303b,
2555                     "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2556
2557                 rsp->status_srb = NULL;
2558                 return;
2559         }
2560
2561         if (!GET_CMD_SENSE_LEN(sp)) {
2562                 ql_dbg(ql_dbg_io, vha, 0x304c,
2563                     "no sense data, sp = %p\n", sp);
2564         } else {
2565                 sense_len = GET_CMD_SENSE_LEN(sp);
2566                 sense_ptr = GET_CMD_SENSE_PTR(sp);
2567                 ql_dbg(ql_dbg_io, vha, 0x304f,
2568                     "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2569                     sp, sense_len, sense_ptr);
2570
2571                 if (sense_len > sizeof(pkt->data))
2572                         sense_sz = sizeof(pkt->data);
2573                 else
2574                         sense_sz = sense_len;
2575
2576                 /* Move sense data. */
2577                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2578                     pkt, sizeof(*pkt));
2579                 memcpy(sense_ptr, pkt->data, sense_sz);
2580                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2581                     sense_ptr, sense_sz);
2582
2583                 sense_len -= sense_sz;
2584                 sense_ptr += sense_sz;
2585
2586                 SET_CMD_SENSE_PTR(sp, sense_ptr);
2587                 SET_CMD_SENSE_LEN(sp, sense_len);
2588         }
2589         sense_len = GET_FW_SENSE_LEN(sp);
2590         sense_len = (sense_len > sizeof(pkt->data)) ?
2591             (sense_len - sizeof(pkt->data)) : 0;
2592         SET_FW_SENSE_LEN(sp, sense_len);
2593
2594         /* Place command on done queue. */
2595         if (sense_len == 0) {
2596                 rsp->status_srb = NULL;
2597                 sp->done(sp, cp->result);
2598         } else {
2599                 WARN_ON_ONCE(true);
2600         }
2601 }
2602
2603 /**
2604  * qlafx00_multistatus_entry() - Process Multi response queue entries.
2605  * @vha: SCSI driver HA context
2606  * @rsp: response queue
2607  * @pkt: received packet
2608  */
2609 static void
2610 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2611         struct rsp_que *rsp, void *pkt)
2612 {
2613         srb_t           *sp;
2614         struct multi_sts_entry_fx00 *stsmfx;
2615         struct qla_hw_data *ha = vha->hw;
2616         uint32_t handle, hindex, handle_count, i;
2617         uint16_t que;
2618         struct req_que *req;
2619         __le32 *handle_ptr;
2620
2621         stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2622
2623         handle_count = stsmfx->handle_count;
2624
2625         if (handle_count > MAX_HANDLE_COUNT) {
2626                 ql_dbg(ql_dbg_io, vha, 0x3035,
2627                     "Invalid handle count (0x%x).\n", handle_count);
2628                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2629                 qla2xxx_wake_dpc(vha);
2630                 return;
2631         }
2632
2633         handle_ptr =  &stsmfx->handles[0];
2634
2635         for (i = 0; i < handle_count; i++) {
2636                 hindex = le32_to_cpu(*handle_ptr);
2637                 handle = LSW(hindex);
2638                 que = MSW(hindex);
2639                 req = ha->req_q_map[que];
2640
2641                 /* Validate handle. */
2642                 if (handle < req->num_outstanding_cmds)
2643                         sp = req->outstanding_cmds[handle];
2644                 else
2645                         sp = NULL;
2646
2647                 if (sp == NULL) {
2648                         ql_dbg(ql_dbg_io, vha, 0x3044,
2649                             "Invalid status handle (0x%x).\n", handle);
2650                         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2651                         qla2xxx_wake_dpc(vha);
2652                         return;
2653                 }
2654                 qla2x00_process_completed_request(vha, req, handle);
2655                 handle_ptr++;
2656         }
2657 }
2658
2659 /**
2660  * qlafx00_error_entry() - Process an error entry.
2661  * @vha: SCSI driver HA context
2662  * @rsp: response queue
2663  * @pkt: Entry pointer
2664  */
2665 static void
2666 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2667                     struct sts_entry_fx00 *pkt)
2668 {
2669         srb_t *sp;
2670         struct qla_hw_data *ha = vha->hw;
2671         const char func[] = "ERROR-IOCB";
2672         uint16_t que = 0;
2673         struct req_que *req = NULL;
2674         int res = DID_ERROR << 16;
2675
2676         req = ha->req_q_map[que];
2677
2678         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2679         if (sp) {
2680                 sp->done(sp, res);
2681                 return;
2682         }
2683
2684         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2685         qla2xxx_wake_dpc(vha);
2686 }
2687
2688 /**
2689  * qlafx00_process_response_queue() - Process response queue entries.
2690  * @vha: SCSI driver HA context
2691  * @rsp: response queue
2692  */
2693 static void
2694 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2695         struct rsp_que *rsp)
2696 {
2697         struct sts_entry_fx00 *pkt;
2698         response_t *lptr;
2699         uint16_t lreq_q_in = 0;
2700         uint16_t lreq_q_out = 0;
2701
2702         lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
2703         lreq_q_out = rsp->ring_index;
2704
2705         while (lreq_q_in != lreq_q_out) {
2706                 lptr = rsp->ring_ptr;
2707                 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2708                     sizeof(rsp->rsp_pkt));
2709                 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2710
2711                 rsp->ring_index++;
2712                 lreq_q_out++;
2713                 if (rsp->ring_index == rsp->length) {
2714                         lreq_q_out = 0;
2715                         rsp->ring_index = 0;
2716                         rsp->ring_ptr = rsp->ring;
2717                 } else {
2718                         rsp->ring_ptr++;
2719                 }
2720
2721                 if (pkt->entry_status != 0 &&
2722                     pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2723                         ql_dbg(ql_dbg_async, vha, 0x507f,
2724                                "type of error status in response: 0x%x\n",
2725                                pkt->entry_status);
2726                         qlafx00_error_entry(vha, rsp,
2727                                             (struct sts_entry_fx00 *)pkt);
2728                         continue;
2729                 }
2730
2731                 switch (pkt->entry_type) {
2732                 case STATUS_TYPE_FX00:
2733                         qlafx00_status_entry(vha, rsp, pkt);
2734                         break;
2735
2736                 case STATUS_CONT_TYPE_FX00:
2737                         qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2738                         break;
2739
2740                 case MULTI_STATUS_TYPE_FX00:
2741                         qlafx00_multistatus_entry(vha, rsp, pkt);
2742                         break;
2743
2744                 case ABORT_IOCB_TYPE_FX00:
2745                         qlafx00_abort_iocb_entry(vha, rsp->req,
2746                            (struct abort_iocb_entry_fx00 *)pkt);
2747                         break;
2748
2749                 case IOCTL_IOSB_TYPE_FX00:
2750                         qlafx00_ioctl_iosb_entry(vha, rsp->req,
2751                             (struct ioctl_iocb_entry_fx00 *)pkt);
2752                         break;
2753                 default:
2754                         /* Type Not Supported. */
2755                         ql_dbg(ql_dbg_async, vha, 0x5081,
2756                             "Received unknown response pkt type %x "
2757                             "entry status=%x.\n",
2758                             pkt->entry_type, pkt->entry_status);
2759                         break;
2760                 }
2761         }
2762
2763         /* Adjust ring index */
2764         WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2765 }
2766
2767 /**
2768  * qlafx00_async_event() - Process aynchronous events.
2769  * @vha: SCSI driver HA context
2770  */
2771 static void
2772 qlafx00_async_event(scsi_qla_host_t *vha)
2773 {
2774         struct qla_hw_data *ha = vha->hw;
2775         struct device_reg_fx00 __iomem *reg;
2776         int data_size = 1;
2777
2778         reg = &ha->iobase->ispfx00;
2779         /* Setup to process RIO completion. */
2780         switch (ha->aenmb[0]) {
2781         case QLAFX00_MBA_SYSTEM_ERR:            /* System Error */
2782                 ql_log(ql_log_warn, vha, 0x5079,
2783                     "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2784                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2785                 break;
2786
2787         case QLAFX00_MBA_SHUTDOWN_RQSTD:        /* Shutdown requested */
2788                 ql_dbg(ql_dbg_async, vha, 0x5076,
2789                     "Asynchronous FW shutdown requested.\n");
2790                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2791                 qla2xxx_wake_dpc(vha);
2792                 break;
2793
2794         case QLAFX00_MBA_PORT_UPDATE:           /* Port database update */
2795                 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
2796                 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
2797                 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
2798                 ql_dbg(ql_dbg_async, vha, 0x5077,
2799                     "Asynchronous port Update received "
2800                     "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2801                     ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2802                 data_size = 4;
2803                 break;
2804
2805         case QLAFX00_MBA_TEMP_OVER:     /* Over temperature event */
2806                 ql_log(ql_log_info, vha, 0x5085,
2807                     "Asynchronous over temperature event received "
2808                     "aenmb[0]: %x\n",
2809                     ha->aenmb[0]);
2810                 break;
2811
2812         case QLAFX00_MBA_TEMP_NORM:     /* Normal temperature event */
2813                 ql_log(ql_log_info, vha, 0x5086,
2814                     "Asynchronous normal temperature event received "
2815                     "aenmb[0]: %x\n",
2816                     ha->aenmb[0]);
2817                 break;
2818
2819         case QLAFX00_MBA_TEMP_CRIT:     /* Critical temperature event */
2820                 ql_log(ql_log_info, vha, 0x5083,
2821                     "Asynchronous critical temperature event received "
2822                     "aenmb[0]: %x\n",
2823                 ha->aenmb[0]);
2824                 break;
2825
2826         default:
2827                 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2828                 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2829                 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2830                 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2831                 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2832                 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2833                 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2834                 ql_dbg(ql_dbg_async, vha, 0x5078,
2835                     "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2836                     ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2837                     ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2838                 break;
2839         }
2840         qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2841             (uint32_t *)ha->aenmb, data_size);
2842 }
2843
2844 /**
2845  * qlafx00x_mbx_completion() - Process mailbox command completions.
2846  * @vha: SCSI driver HA context
2847  * @mb0: value to be written into mailbox register 0
2848  */
2849 static void
2850 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2851 {
2852         uint16_t        cnt;
2853         uint32_t __iomem *wptr;
2854         struct qla_hw_data *ha = vha->hw;
2855         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2856
2857         if (!ha->mcp32)
2858                 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2859
2860         /* Load return mailbox registers. */
2861         ha->flags.mbox_int = 1;
2862         ha->mailbox_out32[0] = mb0;
2863         wptr = (uint32_t __iomem *)&reg->mailbox17;
2864
2865         for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2866                 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
2867                 wptr++;
2868         }
2869 }
2870
2871 /**
2872  * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2873  * @irq: interrupt number
2874  * @dev_id: SCSI driver HA context
2875  *
2876  * Called by system whenever the host adapter generates an interrupt.
2877  *
2878  * Returns handled flag.
2879  */
2880 irqreturn_t
2881 qlafx00_intr_handler(int irq, void *dev_id)
2882 {
2883         scsi_qla_host_t *vha;
2884         struct qla_hw_data *ha;
2885         struct device_reg_fx00 __iomem *reg;
2886         int             status;
2887         unsigned long   iter;
2888         uint32_t        stat;
2889         uint32_t        mb[8];
2890         struct rsp_que *rsp;
2891         unsigned long   flags;
2892         uint32_t clr_intr = 0;
2893         uint32_t intr_stat = 0;
2894
2895         rsp = (struct rsp_que *) dev_id;
2896         if (!rsp) {
2897                 ql_log(ql_log_info, NULL, 0x507d,
2898                     "%s: NULL response queue pointer.\n", __func__);
2899                 return IRQ_NONE;
2900         }
2901
2902         ha = rsp->hw;
2903         reg = &ha->iobase->ispfx00;
2904         status = 0;
2905
2906         if (unlikely(pci_channel_offline(ha->pdev)))
2907                 return IRQ_HANDLED;
2908
2909         spin_lock_irqsave(&ha->hardware_lock, flags);
2910         vha = pci_get_drvdata(ha->pdev);
2911         for (iter = 50; iter--; clr_intr = 0) {
2912                 stat = QLAFX00_RD_INTR_REG(ha);
2913                 if (qla2x00_check_reg32_for_disconnect(vha, stat))
2914                         break;
2915                 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2916                 if (!intr_stat)
2917                         break;
2918
2919                 if (stat & QLAFX00_INTR_MB_CMPLT) {
2920                         mb[0] = RD_REG_WORD(&reg->mailbox16);
2921                         qlafx00_mbx_completion(vha, mb[0]);
2922                         status |= MBX_INTERRUPT;
2923                         clr_intr |= QLAFX00_INTR_MB_CMPLT;
2924                 }
2925                 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
2926                         ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2927                         qlafx00_async_event(vha);
2928                         clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2929                 }
2930                 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
2931                         qlafx00_process_response_queue(vha, rsp);
2932                         clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2933                 }
2934
2935                 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2936                 QLAFX00_RD_INTR_REG(ha);
2937         }
2938
2939         qla2x00_handle_mbx_completion(ha, status);
2940         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2941
2942         return IRQ_HANDLED;
2943 }
2944
2945 /** QLAFX00 specific IOCB implementation functions */
2946
2947 static inline cont_a64_entry_t *
2948 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2949                              cont_a64_entry_t *lcont_pkt)
2950 {
2951         cont_a64_entry_t *cont_pkt;
2952
2953         /* Adjust ring index. */
2954         req->ring_index++;
2955         if (req->ring_index == req->length) {
2956                 req->ring_index = 0;
2957                 req->ring_ptr = req->ring;
2958         } else {
2959                 req->ring_ptr++;
2960         }
2961
2962         cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2963
2964         /* Load packet defaults. */
2965         lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
2966
2967         return cont_pkt;
2968 }
2969
2970 static inline void
2971 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2972                          uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2973 {
2974         uint16_t        avail_dsds;
2975         struct dsd64    *cur_dsd;
2976         scsi_qla_host_t *vha;
2977         struct scsi_cmnd *cmd;
2978         struct scatterlist *sg;
2979         int i, cont;
2980         struct req_que *req;
2981         cont_a64_entry_t lcont_pkt;
2982         cont_a64_entry_t *cont_pkt;
2983
2984         vha = sp->vha;
2985         req = vha->req;
2986
2987         cmd = GET_CMD_SP(sp);
2988         cont = 0;
2989         cont_pkt = NULL;
2990
2991         /* Update entry type to indicate Command Type 3 IOCB */
2992         lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
2993
2994         /* No data transfer */
2995         if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
2996                 lcmd_pkt->byte_count = cpu_to_le32(0);
2997                 return;
2998         }
2999
3000         /* Set transfer direction */
3001         if (cmd->sc_data_direction == DMA_TO_DEVICE) {
3002                 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
3003                 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3004         } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
3005                 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
3006                 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3007         }
3008
3009         /* One DSD is available in the Command Type 3 IOCB */
3010         avail_dsds = 1;
3011         cur_dsd = &lcmd_pkt->dsd;
3012
3013         /* Load data segments */
3014         scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3015                 /* Allocate additional continuation packets? */
3016                 if (avail_dsds == 0) {
3017                         /*
3018                          * Five DSDs are available in the Continuation
3019                          * Type 1 IOCB.
3020                          */
3021                         memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3022                         cont_pkt =
3023                             qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3024                         cur_dsd = lcont_pkt.dsd;
3025                         avail_dsds = 5;
3026                         cont = 1;
3027                 }
3028
3029                 append_dsd64(&cur_dsd, sg);
3030                 avail_dsds--;
3031                 if (avail_dsds == 0 && cont == 1) {
3032                         cont = 0;
3033                         memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3034                             sizeof(lcont_pkt));
3035                 }
3036
3037         }
3038         if (avail_dsds != 0 && cont == 1) {
3039                 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3040                     sizeof(lcont_pkt));
3041         }
3042 }
3043
3044 /**
3045  * qlafx00_start_scsi() - Send a SCSI command to the ISP
3046  * @sp: command to send to the ISP
3047  *
3048  * Returns non-zero if a failure occurred, else zero.
3049  */
3050 int
3051 qlafx00_start_scsi(srb_t *sp)
3052 {
3053         int             nseg;
3054         unsigned long   flags;
3055         uint32_t        handle;
3056         uint16_t        cnt;
3057         uint16_t        req_cnt;
3058         uint16_t        tot_dsds;
3059         struct req_que *req = NULL;
3060         struct rsp_que *rsp = NULL;
3061         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3062         struct scsi_qla_host *vha = sp->vha;
3063         struct qla_hw_data *ha = vha->hw;
3064         struct cmd_type_7_fx00 *cmd_pkt;
3065         struct cmd_type_7_fx00 lcmd_pkt;
3066         struct scsi_lun llun;
3067
3068         /* Setup device pointers. */
3069         rsp = ha->rsp_q_map[0];
3070         req = vha->req;
3071
3072         /* So we know we haven't pci_map'ed anything yet */
3073         tot_dsds = 0;
3074
3075         /* Acquire ring specific lock */
3076         spin_lock_irqsave(&ha->hardware_lock, flags);
3077
3078         handle = qla2xxx_get_next_handle(req);
3079         if (handle == 0)
3080                 goto queuing_error;
3081
3082         /* Map the sg table so we have an accurate count of sg entries needed */
3083         if (scsi_sg_count(cmd)) {
3084                 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3085                     scsi_sg_count(cmd), cmd->sc_data_direction);
3086                 if (unlikely(!nseg))
3087                         goto queuing_error;
3088         } else
3089                 nseg = 0;
3090
3091         tot_dsds = nseg;
3092         req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3093         if (req->cnt < (req_cnt + 2)) {
3094                 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3095
3096                 if (req->ring_index < cnt)
3097                         req->cnt = cnt - req->ring_index;
3098                 else
3099                         req->cnt = req->length -
3100                                 (req->ring_index - cnt);
3101                 if (req->cnt < (req_cnt + 2))
3102                         goto queuing_error;
3103         }
3104
3105         /* Build command packet. */
3106         req->current_outstanding_cmd = handle;
3107         req->outstanding_cmds[handle] = sp;
3108         sp->handle = handle;
3109         cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3110         req->cnt -= req_cnt;
3111
3112         cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3113
3114         memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3115
3116         lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3117         lcmd_pkt.reserved_0 = 0;
3118         lcmd_pkt.port_path_ctrl = 0;
3119         lcmd_pkt.reserved_1 = 0;
3120         lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3121         lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3122
3123         int_to_scsilun(cmd->device->lun, &llun);
3124         host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3125             sizeof(lcmd_pkt.lun));
3126
3127         /* Load SCSI command packet. */
3128         host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3129         lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3130
3131         /* Build IOCB segments */
3132         qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3133
3134         /* Set total data segment count. */
3135         lcmd_pkt.entry_count = (uint8_t)req_cnt;
3136
3137         /* Specify response queue number where completion should happen */
3138         lcmd_pkt.entry_status = (uint8_t) rsp->id;
3139
3140         ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3141             cmd->cmnd, cmd->cmd_len);
3142         ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3143             &lcmd_pkt, sizeof(lcmd_pkt));
3144
3145         memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3146         wmb();
3147
3148         /* Adjust ring index. */
3149         req->ring_index++;
3150         if (req->ring_index == req->length) {
3151                 req->ring_index = 0;
3152                 req->ring_ptr = req->ring;
3153         } else
3154                 req->ring_ptr++;
3155
3156         sp->flags |= SRB_DMA_VALID;
3157
3158         /* Set chip new ring index. */
3159         WRT_REG_DWORD(req->req_q_in, req->ring_index);
3160         QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3161
3162         spin_unlock_irqrestore(&ha->hardware_lock, flags);
3163         return QLA_SUCCESS;
3164
3165 queuing_error:
3166         if (tot_dsds)
3167                 scsi_dma_unmap(cmd);
3168
3169         spin_unlock_irqrestore(&ha->hardware_lock, flags);
3170
3171         return QLA_FUNCTION_FAILED;
3172 }
3173
3174 void
3175 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3176 {
3177         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3178         scsi_qla_host_t *vha = sp->vha;
3179         struct req_que *req = vha->req;
3180         struct tsk_mgmt_entry_fx00 tm_iocb;
3181         struct scsi_lun llun;
3182
3183         memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3184         tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3185         tm_iocb.entry_count = 1;
3186         tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3187         tm_iocb.reserved_0 = 0;
3188         tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3189         tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3190         if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3191                 int_to_scsilun(fxio->u.tmf.lun, &llun);
3192                 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3193                     sizeof(struct scsi_lun));
3194         }
3195
3196         memcpy((void *)ptm_iocb, &tm_iocb,
3197             sizeof(struct tsk_mgmt_entry_fx00));
3198         wmb();
3199 }
3200
3201 void
3202 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3203 {
3204         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3205         scsi_qla_host_t *vha = sp->vha;
3206         struct req_que *req = vha->req;
3207         struct abort_iocb_entry_fx00 abt_iocb;
3208
3209         memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3210         abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3211         abt_iocb.entry_count = 1;
3212         abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3213         abt_iocb.abort_handle =
3214             cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3215         abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3216         abt_iocb.req_que_no = cpu_to_le16(req->id);
3217
3218         memcpy((void *)pabt_iocb, &abt_iocb,
3219             sizeof(struct abort_iocb_entry_fx00));
3220         wmb();
3221 }
3222
3223 void
3224 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3225 {
3226         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3227         struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3228         struct bsg_job *bsg_job;
3229         struct fc_bsg_request *bsg_request;
3230         struct fxdisc_entry_fx00 fx_iocb;
3231         uint8_t entry_cnt = 1;
3232
3233         memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3234         fx_iocb.entry_type = FX00_IOCB_TYPE;
3235         fx_iocb.handle = cpu_to_le32(sp->handle);
3236         fx_iocb.entry_count = entry_cnt;
3237
3238         if (sp->type == SRB_FXIOCB_DCMD) {
3239                 fx_iocb.func_num =
3240                     sp->u.iocb_cmd.u.fxiocb.req_func_type;
3241                 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3242                 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3243                 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3244                 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3245                 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3246
3247                 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3248                         fx_iocb.req_dsdcnt = cpu_to_le16(1);
3249                         fx_iocb.req_xfrcnt =
3250                             cpu_to_le16(fxio->u.fxiocb.req_len);
3251                         put_unaligned_le64(fxio->u.fxiocb.req_dma_handle,
3252                                            &fx_iocb.dseg_rq.address);
3253                         fx_iocb.dseg_rq.length =
3254                             cpu_to_le32(fxio->u.fxiocb.req_len);
3255                 }
3256
3257                 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3258                         fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3259                         fx_iocb.rsp_xfrcnt =
3260                             cpu_to_le16(fxio->u.fxiocb.rsp_len);
3261                         put_unaligned_le64(fxio->u.fxiocb.rsp_dma_handle,
3262                                            &fx_iocb.dseg_rsp.address);
3263                         fx_iocb.dseg_rsp.length =
3264                             cpu_to_le32(fxio->u.fxiocb.rsp_len);
3265                 }
3266
3267                 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3268                         fx_iocb.dataword = fxio->u.fxiocb.req_data;
3269                 }
3270                 fx_iocb.flags = fxio->u.fxiocb.flags;
3271         } else {
3272                 struct scatterlist *sg;
3273
3274                 bsg_job = sp->u.bsg_job;
3275                 bsg_request = bsg_job->request;
3276                 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3277                         &bsg_request->rqst_data.h_vendor.vendor_cmd[1];
3278
3279                 fx_iocb.func_num = piocb_rqst->func_type;
3280                 fx_iocb.adapid = piocb_rqst->adapid;
3281                 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3282                 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3283                 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3284                 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3285                 fx_iocb.dataword = piocb_rqst->dataword;
3286                 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3287                 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3288
3289                 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3290                         int avail_dsds, tot_dsds;
3291                         cont_a64_entry_t lcont_pkt;
3292                         cont_a64_entry_t *cont_pkt = NULL;
3293                         struct dsd64 *cur_dsd;
3294                         int index = 0, cont = 0;
3295
3296                         fx_iocb.req_dsdcnt =
3297                             cpu_to_le16(bsg_job->request_payload.sg_cnt);
3298                         tot_dsds =
3299                             bsg_job->request_payload.sg_cnt;
3300                         cur_dsd = &fx_iocb.dseg_rq;
3301                         avail_dsds = 1;
3302                         for_each_sg(bsg_job->request_payload.sg_list, sg,
3303                             tot_dsds, index) {
3304                                 /* Allocate additional continuation packets? */
3305                                 if (avail_dsds == 0) {
3306                                         /*
3307                                          * Five DSDs are available in the Cont.
3308                                          * Type 1 IOCB.
3309                                          */
3310                                         memset(&lcont_pkt, 0,
3311                                             REQUEST_ENTRY_SIZE);
3312                                         cont_pkt =
3313                                             qlafx00_prep_cont_type1_iocb(
3314                                                 sp->vha->req, &lcont_pkt);
3315                                         cur_dsd = lcont_pkt.dsd;
3316                                         avail_dsds = 5;
3317                                         cont = 1;
3318                                         entry_cnt++;
3319                                 }
3320
3321                                 append_dsd64(&cur_dsd, sg);
3322                                 avail_dsds--;
3323
3324                                 if (avail_dsds == 0 && cont == 1) {
3325                                         cont = 0;
3326                                         memcpy_toio(
3327                                             (void __iomem *)cont_pkt,
3328                                             &lcont_pkt, REQUEST_ENTRY_SIZE);
3329                                         ql_dump_buffer(
3330                                             ql_dbg_user + ql_dbg_verbose,
3331                                             sp->vha, 0x3042,
3332                                             (uint8_t *)&lcont_pkt,
3333                                              REQUEST_ENTRY_SIZE);
3334                                 }
3335                         }
3336                         if (avail_dsds != 0 && cont == 1) {
3337                                 memcpy_toio((void __iomem *)cont_pkt,
3338                                     &lcont_pkt, REQUEST_ENTRY_SIZE);
3339                                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3340                                     sp->vha, 0x3043,
3341                                     (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3342                         }
3343                 }
3344
3345                 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3346                         int avail_dsds, tot_dsds;
3347                         cont_a64_entry_t lcont_pkt;
3348                         cont_a64_entry_t *cont_pkt = NULL;
3349                         struct dsd64 *cur_dsd;
3350                         int index = 0, cont = 0;
3351
3352                         fx_iocb.rsp_dsdcnt =
3353                            cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3354                         tot_dsds = bsg_job->reply_payload.sg_cnt;
3355                         cur_dsd = &fx_iocb.dseg_rsp;
3356                         avail_dsds = 1;
3357
3358                         for_each_sg(bsg_job->reply_payload.sg_list, sg,
3359                             tot_dsds, index) {
3360                                 /* Allocate additional continuation packets? */
3361                                 if (avail_dsds == 0) {
3362                                         /*
3363                                         * Five DSDs are available in the Cont.
3364                                         * Type 1 IOCB.
3365                                         */
3366                                         memset(&lcont_pkt, 0,
3367                                             REQUEST_ENTRY_SIZE);
3368                                         cont_pkt =
3369                                             qlafx00_prep_cont_type1_iocb(
3370                                                 sp->vha->req, &lcont_pkt);
3371                                         cur_dsd = lcont_pkt.dsd;
3372                                         avail_dsds = 5;
3373                                         cont = 1;
3374                                         entry_cnt++;
3375                                 }
3376
3377                                 append_dsd64(&cur_dsd, sg);
3378                                 avail_dsds--;
3379
3380                                 if (avail_dsds == 0 && cont == 1) {
3381                                         cont = 0;
3382                                         memcpy_toio((void __iomem *)cont_pkt,
3383                                             &lcont_pkt,
3384                                             REQUEST_ENTRY_SIZE);
3385                                         ql_dump_buffer(
3386                                             ql_dbg_user + ql_dbg_verbose,
3387                                             sp->vha, 0x3045,
3388                                             (uint8_t *)&lcont_pkt,
3389                                             REQUEST_ENTRY_SIZE);
3390                                 }
3391                         }
3392                         if (avail_dsds != 0 && cont == 1) {
3393                                 memcpy_toio((void __iomem *)cont_pkt,
3394                                     &lcont_pkt, REQUEST_ENTRY_SIZE);
3395                                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3396                                     sp->vha, 0x3046,
3397                                     (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3398                         }
3399                 }
3400
3401                 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3402                         fx_iocb.dataword = piocb_rqst->dataword;
3403                 fx_iocb.flags = piocb_rqst->flags;
3404                 fx_iocb.entry_count = entry_cnt;
3405         }
3406
3407         ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3408             sp->vha, 0x3047, &fx_iocb, sizeof(fx_iocb));
3409
3410         memcpy_toio((void __iomem *)pfxiocb, &fx_iocb, sizeof(fx_iocb));
3411         wmb();
3412 }