2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
37 unsigned long flags = 0;
43 uint16_t __iomem *optr;
46 uint16_t __iomem *mbx_reg;
47 unsigned long wait_time;
48 struct qla_hw_data *ha = vha->hw;
49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
52 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
54 if (ha->pdev->error_state > pci_channel_io_frozen) {
55 ql_log(ql_log_warn, vha, 0x1001,
56 "error_state is greater than pci_channel_io_frozen, "
58 return QLA_FUNCTION_TIMEOUT;
61 if (vha->device_flags & DFLG_DEV_FAILED) {
62 ql_log(ql_log_warn, vha, 0x1002,
63 "Device in failed state, exiting.\n");
64 return QLA_FUNCTION_TIMEOUT;
67 /* if PCI error, then avoid mbx processing.*/
68 if (test_bit(PCI_ERR, &base_vha->dpc_flags)) {
69 ql_log(ql_log_warn, vha, 0x1191,
70 "PCI error, exiting.\n");
71 return QLA_FUNCTION_TIMEOUT;
75 io_lock_on = base_vha->flags.init_done;
78 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
81 if (ha->flags.pci_channel_io_perm_failure) {
82 ql_log(ql_log_warn, vha, 0x1003,
83 "Perm failure on EEH timeout MBX, exiting.\n");
84 return QLA_FUNCTION_TIMEOUT;
87 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
88 /* Setting Link-Down error */
89 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
90 ql_log(ql_log_warn, vha, 0x1004,
91 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
92 return QLA_FUNCTION_TIMEOUT;
96 * Wait for active mailbox commands to finish by waiting at most tov
97 * seconds. This is to serialize actual issuing of mailbox cmds during
100 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
101 /* Timeout occurred. Return error. */
102 ql_log(ql_log_warn, vha, 0x1005,
103 "Cmd access timeout, cmd=0x%x, Exiting.\n",
105 return QLA_FUNCTION_TIMEOUT;
108 ha->flags.mbox_busy = 1;
109 /* Save mailbox command for debug */
112 ql_dbg(ql_dbg_mbx, vha, 0x1006,
113 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
115 spin_lock_irqsave(&ha->hardware_lock, flags);
117 /* Load mailbox registers. */
119 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
120 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
121 optr = (uint16_t __iomem *)®->isp24.mailbox0;
123 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
126 command = mcp->mb[0];
127 mboxes = mcp->out_mb;
129 ql_dbg(ql_dbg_mbx, vha, 0x1111,
130 "Mailbox registers (OUT):\n");
131 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
132 if (IS_QLA2200(ha) && cnt == 8)
134 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
135 if (mboxes & BIT_0) {
136 ql_dbg(ql_dbg_mbx, vha, 0x1112,
137 "mbox[%d]<-0x%04x\n", cnt, *iptr);
138 WRT_REG_WORD(optr, *iptr);
146 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
147 "I/O Address = %p.\n", optr);
149 /* Issue set host interrupt command to send cmd out. */
150 ha->flags.mbox_int = 0;
151 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
153 /* Unlock mbx registers and wait for interrupt */
154 ql_dbg(ql_dbg_mbx, vha, 0x100f,
155 "Going to unlock irq & waiting for interrupts. "
156 "jiffies=%lx.\n", jiffies);
158 /* Wait for mbx cmd completion until timeout */
160 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
161 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
163 if (IS_P3P_TYPE(ha)) {
164 if (RD_REG_DWORD(®->isp82.hint) &
165 HINT_MBX_INT_PENDING) {
166 spin_unlock_irqrestore(&ha->hardware_lock,
168 ha->flags.mbox_busy = 0;
169 ql_dbg(ql_dbg_mbx, vha, 0x1010,
170 "Pending mailbox timeout, exiting.\n");
171 rval = QLA_FUNCTION_TIMEOUT;
174 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
175 } else if (IS_FWI2_CAPABLE(ha))
176 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
178 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
179 spin_unlock_irqrestore(&ha->hardware_lock, flags);
181 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
183 ql_dbg(ql_dbg_mbx, vha, 0x117a,
184 "cmd=%x Timeout.\n", command);
185 spin_lock_irqsave(&ha->hardware_lock, flags);
186 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
187 spin_unlock_irqrestore(&ha->hardware_lock, flags);
190 ql_dbg(ql_dbg_mbx, vha, 0x1011,
191 "Cmd=%x Polling Mode.\n", command);
193 if (IS_P3P_TYPE(ha)) {
194 if (RD_REG_DWORD(®->isp82.hint) &
195 HINT_MBX_INT_PENDING) {
196 spin_unlock_irqrestore(&ha->hardware_lock,
198 ha->flags.mbox_busy = 0;
199 ql_dbg(ql_dbg_mbx, vha, 0x1012,
200 "Pending mailbox timeout, exiting.\n");
201 rval = QLA_FUNCTION_TIMEOUT;
204 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
205 } else if (IS_FWI2_CAPABLE(ha))
206 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
208 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
209 spin_unlock_irqrestore(&ha->hardware_lock, flags);
211 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
212 while (!ha->flags.mbox_int) {
213 if (time_after(jiffies, wait_time))
216 /* Check for pending interrupts. */
217 qla2x00_poll(ha->rsp_q_map[0]);
219 if (!ha->flags.mbox_int &&
221 command == MBC_LOAD_RISC_RAM_EXTENDED))
224 ql_dbg(ql_dbg_mbx, vha, 0x1013,
226 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
229 /* Check whether we timed out */
230 if (ha->flags.mbox_int) {
233 ql_dbg(ql_dbg_mbx, vha, 0x1014,
234 "Cmd=%x completed.\n", command);
236 /* Got interrupt. Clear the flag. */
237 ha->flags.mbox_int = 0;
238 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
240 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
241 ha->flags.mbox_busy = 0;
242 /* Setting Link-Down error */
243 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
245 rval = QLA_FUNCTION_FAILED;
246 ql_log(ql_log_warn, vha, 0x1015,
247 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
251 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
252 rval = QLA_FUNCTION_FAILED;
254 /* Load return mailbox registers. */
256 iptr = (uint16_t *)&ha->mailbox_out[0];
259 ql_dbg(ql_dbg_mbx, vha, 0x1113,
260 "Mailbox registers (IN):\n");
261 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
262 if (mboxes & BIT_0) {
264 ql_dbg(ql_dbg_mbx, vha, 0x1114,
265 "mbox[%d]->0x%04x\n", cnt, *iptr2);
278 if (IS_FWI2_CAPABLE(ha)) {
279 mb0 = RD_REG_WORD(®->isp24.mailbox0);
280 ictrl = RD_REG_DWORD(®->isp24.ictrl);
282 mb0 = RD_MAILBOX_REG(ha, ®->isp, 0);
283 ictrl = RD_REG_WORD(®->isp.ictrl);
285 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
286 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
287 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
288 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
290 /* Capture FW dump only, if PCI device active */
291 if (!pci_channel_offline(vha->hw->pdev)) {
292 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
293 if (w == 0xffff || ictrl == 0xffffffff) {
294 /* This is special case if there is unload
295 * of driver happening and if PCI device go
296 * into bad state due to PCI error condition
297 * then only PCI ERR flag would be set.
298 * we will do premature exit for above case.
300 if (test_bit(UNLOADING, &base_vha->dpc_flags))
301 set_bit(PCI_ERR, &base_vha->dpc_flags);
302 ha->flags.mbox_busy = 0;
303 rval = QLA_FUNCTION_TIMEOUT;
307 /* Attempt to capture firmware dump for further
308 * anallysis of the current formware state. we do not
309 * need to do this if we are intentionally generating
312 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
313 ha->isp_ops->fw_dump(vha, 0);
314 rval = QLA_FUNCTION_TIMEOUT;
318 ha->flags.mbox_busy = 0;
323 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
324 ql_dbg(ql_dbg_mbx, vha, 0x101a,
325 "Checking for additional resp interrupt.\n");
327 /* polling mode for non isp_abort commands. */
328 qla2x00_poll(ha->rsp_q_map[0]);
331 if (rval == QLA_FUNCTION_TIMEOUT &&
332 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
333 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
334 ha->flags.eeh_busy) {
335 /* not in dpc. schedule it for dpc to take over. */
336 ql_dbg(ql_dbg_mbx, vha, 0x101b,
337 "Timeout, schedule isp_abort_needed.\n");
339 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
340 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
341 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
342 if (IS_QLA82XX(ha)) {
343 ql_dbg(ql_dbg_mbx, vha, 0x112a,
344 "disabling pause transmit on port "
347 QLA82XX_CRB_NIU + 0x98,
348 CRB_NIU_XG_PAUSE_CTL_P0|
349 CRB_NIU_XG_PAUSE_CTL_P1);
351 ql_log(ql_log_info, base_vha, 0x101c,
352 "Mailbox cmd timeout occurred, cmd=0x%x, "
353 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
354 "abort.\n", command, mcp->mb[0],
356 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
357 qla2xxx_wake_dpc(vha);
359 } else if (!abort_active) {
360 /* call abort directly since we are in the DPC thread */
361 ql_dbg(ql_dbg_mbx, vha, 0x101d,
362 "Timeout, calling abort_isp.\n");
364 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
365 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
366 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
367 if (IS_QLA82XX(ha)) {
368 ql_dbg(ql_dbg_mbx, vha, 0x112b,
369 "disabling pause transmit on port "
372 QLA82XX_CRB_NIU + 0x98,
373 CRB_NIU_XG_PAUSE_CTL_P0|
374 CRB_NIU_XG_PAUSE_CTL_P1);
376 ql_log(ql_log_info, base_vha, 0x101e,
377 "Mailbox cmd timeout occurred, cmd=0x%x, "
378 "mb[0]=0x%x. Scheduling ISP abort ",
379 command, mcp->mb[0]);
380 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
381 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
382 /* Allow next mbx cmd to come in. */
383 complete(&ha->mbx_cmd_comp);
384 if (ha->isp_ops->abort_isp(vha)) {
385 /* Failed. retry later. */
386 set_bit(ISP_ABORT_NEEDED,
389 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
390 ql_dbg(ql_dbg_mbx, vha, 0x101f,
391 "Finished abort_isp.\n");
398 /* Allow next mbx cmd to come in. */
399 complete(&ha->mbx_cmd_comp);
403 ql_dbg(ql_dbg_disc, base_vha, 0x1020,
404 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
405 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
407 ql_dbg(ql_dbg_mbx, vha, 0x1198,
408 "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
409 RD_REG_DWORD(®->isp24.host_status),
410 ha->fw_dump_cap_flags,
411 RD_REG_DWORD(®->isp24.ictrl),
412 RD_REG_DWORD(®->isp24.istatus));
414 mbx_reg = ®->isp24.mailbox0;
415 for (i = 0; i < 6; i++)
416 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1199,
417 "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
419 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
426 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
427 uint32_t risc_code_size)
430 struct qla_hw_data *ha = vha->hw;
432 mbx_cmd_t *mcp = &mc;
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
435 "Entered %s.\n", __func__);
437 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
438 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
439 mcp->mb[8] = MSW(risc_addr);
440 mcp->out_mb = MBX_8|MBX_0;
442 mcp->mb[0] = MBC_LOAD_RISC_RAM;
445 mcp->mb[1] = LSW(risc_addr);
446 mcp->mb[2] = MSW(req_dma);
447 mcp->mb[3] = LSW(req_dma);
448 mcp->mb[6] = MSW(MSD(req_dma));
449 mcp->mb[7] = LSW(MSD(req_dma));
450 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
451 if (IS_FWI2_CAPABLE(ha)) {
452 mcp->mb[4] = MSW(risc_code_size);
453 mcp->mb[5] = LSW(risc_code_size);
454 mcp->out_mb |= MBX_5|MBX_4;
456 mcp->mb[4] = LSW(risc_code_size);
457 mcp->out_mb |= MBX_4;
461 mcp->tov = MBX_TOV_SECONDS;
463 rval = qla2x00_mailbox_command(vha, mcp);
465 if (rval != QLA_SUCCESS) {
466 ql_dbg(ql_dbg_mbx, vha, 0x1023,
467 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
469 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
470 "Done %s.\n", __func__);
476 #define EXTENDED_BB_CREDITS BIT_0
479 * Start adapter firmware.
482 * ha = adapter block pointer.
483 * TARGET_QUEUE_LOCK must be released.
484 * ADAPTER_STATE_LOCK must be released.
487 * qla2x00 local function return status code.
493 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
496 struct qla_hw_data *ha = vha->hw;
498 mbx_cmd_t *mcp = &mc;
500 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
501 "Entered %s.\n", __func__);
503 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
506 if (IS_FWI2_CAPABLE(ha)) {
507 mcp->mb[1] = MSW(risc_addr);
508 mcp->mb[2] = LSW(risc_addr);
510 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
512 struct nvram_81xx *nv = ha->nvram;
513 mcp->mb[4] = (nv->enhanced_features &
514 EXTENDED_BB_CREDITS);
518 if (ha->flags.exlogins_enabled)
519 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
521 if (ha->flags.exchoffld_enabled)
522 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
524 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
527 mcp->mb[1] = LSW(risc_addr);
528 mcp->out_mb |= MBX_1;
529 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
531 mcp->out_mb |= MBX_2;
535 mcp->tov = MBX_TOV_SECONDS;
537 rval = qla2x00_mailbox_command(vha, mcp);
539 if (rval != QLA_SUCCESS) {
540 ql_dbg(ql_dbg_mbx, vha, 0x1026,
541 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
543 if (IS_FWI2_CAPABLE(ha)) {
544 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
545 "Done exchanges=%x.\n", mcp->mb[1]);
547 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
548 "Done %s.\n", __func__);
556 * qla_get_exlogin_status
557 * Get extended login status
558 * uses the memory offload control/status Mailbox
561 * ha: adapter state pointer.
562 * fwopt: firmware options
565 * qla2x00 local function status
570 #define FETCH_XLOGINS_STAT 0x8
572 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
573 uint16_t *ex_logins_cnt)
577 mbx_cmd_t *mcp = &mc;
579 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
580 "Entered %s\n", __func__);
582 memset(mcp->mb, 0 , sizeof(mcp->mb));
583 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
584 mcp->mb[1] = FETCH_XLOGINS_STAT;
585 mcp->out_mb = MBX_1|MBX_0;
586 mcp->in_mb = MBX_10|MBX_4|MBX_0;
587 mcp->tov = MBX_TOV_SECONDS;
590 rval = qla2x00_mailbox_command(vha, mcp);
591 if (rval != QLA_SUCCESS) {
592 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
594 *buf_sz = mcp->mb[4];
595 *ex_logins_cnt = mcp->mb[10];
597 ql_log(ql_log_info, vha, 0x1190,
598 "buffer size 0x%x, exchange login count=%d\n",
599 mcp->mb[4], mcp->mb[10]);
601 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
602 "Done %s.\n", __func__);
609 * qla_set_exlogin_mem_cfg
610 * set extended login memory configuration
611 * Mbx needs to be issues before init_cb is set
614 * ha: adapter state pointer.
615 * buffer: buffer pointer
616 * phys_addr: physical address of buffer
617 * size: size of buffer
618 * TARGET_QUEUE_LOCK must be released
619 * ADAPTER_STATE_LOCK must be release
622 * qla2x00 local funxtion status code.
627 #define CONFIG_XLOGINS_MEM 0x3
629 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
633 mbx_cmd_t *mcp = &mc;
634 struct qla_hw_data *ha = vha->hw;
635 int configured_count;
637 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
638 "Entered %s.\n", __func__);
640 memset(mcp->mb, 0 , sizeof(mcp->mb));
641 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
642 mcp->mb[1] = CONFIG_XLOGINS_MEM;
643 mcp->mb[2] = MSW(phys_addr);
644 mcp->mb[3] = LSW(phys_addr);
645 mcp->mb[6] = MSW(MSD(phys_addr));
646 mcp->mb[7] = LSW(MSD(phys_addr));
647 mcp->mb[8] = MSW(ha->exlogin_size);
648 mcp->mb[9] = LSW(ha->exlogin_size);
649 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
650 mcp->in_mb = MBX_11|MBX_0;
651 mcp->tov = MBX_TOV_SECONDS;
653 rval = qla2x00_mailbox_command(vha, mcp);
654 if (rval != QLA_SUCCESS) {
656 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
658 configured_count = mcp->mb[11];
659 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
660 "Done %s.\n", __func__);
667 * qla_get_exchoffld_status
668 * Get exchange offload status
669 * uses the memory offload control/status Mailbox
672 * ha: adapter state pointer.
673 * fwopt: firmware options
676 * qla2x00 local function status
681 #define FETCH_XCHOFFLD_STAT 0x2
683 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
684 uint16_t *ex_logins_cnt)
688 mbx_cmd_t *mcp = &mc;
690 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
691 "Entered %s\n", __func__);
693 memset(mcp->mb, 0 , sizeof(mcp->mb));
694 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
695 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
696 mcp->out_mb = MBX_1|MBX_0;
697 mcp->in_mb = MBX_10|MBX_4|MBX_0;
698 mcp->tov = MBX_TOV_SECONDS;
701 rval = qla2x00_mailbox_command(vha, mcp);
702 if (rval != QLA_SUCCESS) {
703 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
705 *buf_sz = mcp->mb[4];
706 *ex_logins_cnt = mcp->mb[10];
708 ql_log(ql_log_info, vha, 0x118e,
709 "buffer size 0x%x, exchange offload count=%d\n",
710 mcp->mb[4], mcp->mb[10]);
712 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
713 "Done %s.\n", __func__);
720 * qla_set_exchoffld_mem_cfg
721 * Set exchange offload memory configuration
722 * Mbx needs to be issues before init_cb is set
725 * ha: adapter state pointer.
726 * buffer: buffer pointer
727 * phys_addr: physical address of buffer
728 * size: size of buffer
729 * TARGET_QUEUE_LOCK must be released
730 * ADAPTER_STATE_LOCK must be release
733 * qla2x00 local funxtion status code.
738 #define CONFIG_XCHOFFLD_MEM 0x3
740 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
744 mbx_cmd_t *mcp = &mc;
745 struct qla_hw_data *ha = vha->hw;
747 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
748 "Entered %s.\n", __func__);
750 memset(mcp->mb, 0 , sizeof(mcp->mb));
751 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
752 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
753 mcp->mb[2] = MSW(phys_addr);
754 mcp->mb[3] = LSW(phys_addr);
755 mcp->mb[6] = MSW(MSD(phys_addr));
756 mcp->mb[7] = LSW(MSD(phys_addr));
757 mcp->mb[8] = MSW(ha->exlogin_size);
758 mcp->mb[9] = LSW(ha->exlogin_size);
759 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
760 mcp->in_mb = MBX_11|MBX_0;
761 mcp->tov = MBX_TOV_SECONDS;
763 rval = qla2x00_mailbox_command(vha, mcp);
764 if (rval != QLA_SUCCESS) {
766 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
768 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
769 "Done %s.\n", __func__);
776 * qla2x00_get_fw_version
777 * Get firmware version.
780 * ha: adapter state pointer.
781 * major: pointer for major number.
782 * minor: pointer for minor number.
783 * subminor: pointer for subminor number.
786 * qla2x00 local function return status code.
792 qla2x00_get_fw_version(scsi_qla_host_t *vha)
796 mbx_cmd_t *mcp = &mc;
797 struct qla_hw_data *ha = vha->hw;
799 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
800 "Entered %s.\n", __func__);
802 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
804 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
805 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
806 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
807 if (IS_FWI2_CAPABLE(ha))
808 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
811 MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
812 MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8;
815 mcp->tov = MBX_TOV_SECONDS;
816 rval = qla2x00_mailbox_command(vha, mcp);
817 if (rval != QLA_SUCCESS)
820 /* Return mailbox data. */
821 ha->fw_major_version = mcp->mb[1];
822 ha->fw_minor_version = mcp->mb[2];
823 ha->fw_subminor_version = mcp->mb[3];
824 ha->fw_attributes = mcp->mb[6];
825 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
826 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
828 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
830 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
831 ha->mpi_version[0] = mcp->mb[10] & 0xff;
832 ha->mpi_version[1] = mcp->mb[11] >> 8;
833 ha->mpi_version[2] = mcp->mb[11] & 0xff;
834 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
835 ha->phy_version[0] = mcp->mb[8] & 0xff;
836 ha->phy_version[1] = mcp->mb[9] >> 8;
837 ha->phy_version[2] = mcp->mb[9] & 0xff;
840 if (IS_FWI2_CAPABLE(ha)) {
841 ha->fw_attributes_h = mcp->mb[15];
842 ha->fw_attributes_ext[0] = mcp->mb[16];
843 ha->fw_attributes_ext[1] = mcp->mb[17];
844 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
845 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
846 __func__, mcp->mb[15], mcp->mb[6]);
847 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
848 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
849 __func__, mcp->mb[17], mcp->mb[16]);
851 if (ha->fw_attributes_h & 0x4)
852 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
853 "%s: Firmware supports Extended Login 0x%x\n",
854 __func__, ha->fw_attributes_h);
856 if (ha->fw_attributes_h & 0x8)
857 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
858 "%s: Firmware supports Exchange Offload 0x%x\n",
859 __func__, ha->fw_attributes_h);
862 if (IS_QLA27XX(ha)) {
863 ha->mpi_version[0] = mcp->mb[10] & 0xff;
864 ha->mpi_version[1] = mcp->mb[11] >> 8;
865 ha->mpi_version[2] = mcp->mb[11] & 0xff;
866 ha->pep_version[0] = mcp->mb[13] & 0xff;
867 ha->pep_version[1] = mcp->mb[14] >> 8;
868 ha->pep_version[2] = mcp->mb[14] & 0xff;
869 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
870 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
871 ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
872 ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
876 if (rval != QLA_SUCCESS) {
878 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
881 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
882 "Done %s.\n", __func__);
888 * qla2x00_get_fw_options
889 * Set firmware options.
892 * ha = adapter block pointer.
893 * fwopt = pointer for firmware options.
896 * qla2x00 local function return status code.
902 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
906 mbx_cmd_t *mcp = &mc;
908 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
909 "Entered %s.\n", __func__);
911 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
913 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
914 mcp->tov = MBX_TOV_SECONDS;
916 rval = qla2x00_mailbox_command(vha, mcp);
918 if (rval != QLA_SUCCESS) {
920 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
922 fwopts[0] = mcp->mb[0];
923 fwopts[1] = mcp->mb[1];
924 fwopts[2] = mcp->mb[2];
925 fwopts[3] = mcp->mb[3];
927 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
928 "Done %s.\n", __func__);
936 * qla2x00_set_fw_options
937 * Set firmware options.
940 * ha = adapter block pointer.
941 * fwopt = pointer for firmware options.
944 * qla2x00 local function return status code.
950 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
954 mbx_cmd_t *mcp = &mc;
956 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
957 "Entered %s.\n", __func__);
959 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
960 mcp->mb[1] = fwopts[1];
961 mcp->mb[2] = fwopts[2];
962 mcp->mb[3] = fwopts[3];
963 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
965 if (IS_FWI2_CAPABLE(vha->hw)) {
968 mcp->mb[10] = fwopts[10];
969 mcp->mb[11] = fwopts[11];
970 mcp->mb[12] = 0; /* Undocumented, but used */
971 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
973 mcp->tov = MBX_TOV_SECONDS;
975 rval = qla2x00_mailbox_command(vha, mcp);
977 fwopts[0] = mcp->mb[0];
979 if (rval != QLA_SUCCESS) {
981 ql_dbg(ql_dbg_mbx, vha, 0x1030,
982 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
985 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
986 "Done %s.\n", __func__);
993 * qla2x00_mbx_reg_test
994 * Mailbox register wrap test.
997 * ha = adapter block pointer.
998 * TARGET_QUEUE_LOCK must be released.
999 * ADAPTER_STATE_LOCK must be released.
1002 * qla2x00 local function return status code.
1008 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
1012 mbx_cmd_t *mcp = &mc;
1014 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
1015 "Entered %s.\n", __func__);
1017 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
1018 mcp->mb[1] = 0xAAAA;
1019 mcp->mb[2] = 0x5555;
1020 mcp->mb[3] = 0xAA55;
1021 mcp->mb[4] = 0x55AA;
1022 mcp->mb[5] = 0xA5A5;
1023 mcp->mb[6] = 0x5A5A;
1024 mcp->mb[7] = 0x2525;
1025 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1026 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1027 mcp->tov = MBX_TOV_SECONDS;
1029 rval = qla2x00_mailbox_command(vha, mcp);
1031 if (rval == QLA_SUCCESS) {
1032 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1033 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1034 rval = QLA_FUNCTION_FAILED;
1035 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1036 mcp->mb[7] != 0x2525)
1037 rval = QLA_FUNCTION_FAILED;
1040 if (rval != QLA_SUCCESS) {
1042 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1045 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1046 "Done %s.\n", __func__);
1053 * qla2x00_verify_checksum
1054 * Verify firmware checksum.
1057 * ha = adapter block pointer.
1058 * TARGET_QUEUE_LOCK must be released.
1059 * ADAPTER_STATE_LOCK must be released.
1062 * qla2x00 local function return status code.
1068 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1072 mbx_cmd_t *mcp = &mc;
1074 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1075 "Entered %s.\n", __func__);
1077 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1078 mcp->out_mb = MBX_0;
1080 if (IS_FWI2_CAPABLE(vha->hw)) {
1081 mcp->mb[1] = MSW(risc_addr);
1082 mcp->mb[2] = LSW(risc_addr);
1083 mcp->out_mb |= MBX_2|MBX_1;
1084 mcp->in_mb |= MBX_2|MBX_1;
1086 mcp->mb[1] = LSW(risc_addr);
1087 mcp->out_mb |= MBX_1;
1088 mcp->in_mb |= MBX_1;
1091 mcp->tov = MBX_TOV_SECONDS;
1093 rval = qla2x00_mailbox_command(vha, mcp);
1095 if (rval != QLA_SUCCESS) {
1096 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1097 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1098 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1100 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1101 "Done %s.\n", __func__);
1108 * qla2x00_issue_iocb
1109 * Issue IOCB using mailbox command
1112 * ha = adapter state pointer.
1113 * buffer = buffer pointer.
1114 * phys_addr = physical address of buffer.
1115 * size = size of buffer.
1116 * TARGET_QUEUE_LOCK must be released.
1117 * ADAPTER_STATE_LOCK must be released.
1120 * qla2x00 local function return status code.
1126 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1127 dma_addr_t phys_addr, size_t size, uint32_t tov)
1131 mbx_cmd_t *mcp = &mc;
1133 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1134 "Entered %s.\n", __func__);
1136 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1138 mcp->mb[2] = MSW(phys_addr);
1139 mcp->mb[3] = LSW(phys_addr);
1140 mcp->mb[6] = MSW(MSD(phys_addr));
1141 mcp->mb[7] = LSW(MSD(phys_addr));
1142 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1143 mcp->in_mb = MBX_2|MBX_0;
1146 rval = qla2x00_mailbox_command(vha, mcp);
1148 if (rval != QLA_SUCCESS) {
1150 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1152 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
1154 /* Mask reserved bits. */
1155 sts_entry->entry_status &=
1156 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1157 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1158 "Done %s.\n", __func__);
1165 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1168 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1173 * qla2x00_abort_command
1174 * Abort command aborts a specified IOCB.
1177 * ha = adapter block pointer.
1178 * sp = SB structure pointer.
1181 * qla2x00 local function return status code.
1187 qla2x00_abort_command(srb_t *sp)
1189 unsigned long flags = 0;
1191 uint32_t handle = 0;
1193 mbx_cmd_t *mcp = &mc;
1194 fc_port_t *fcport = sp->fcport;
1195 scsi_qla_host_t *vha = fcport->vha;
1196 struct qla_hw_data *ha = vha->hw;
1197 struct req_que *req = vha->req;
1198 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1200 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1201 "Entered %s.\n", __func__);
1203 spin_lock_irqsave(&ha->hardware_lock, flags);
1204 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1205 if (req->outstanding_cmds[handle] == sp)
1208 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1210 if (handle == req->num_outstanding_cmds) {
1211 /* command not found */
1212 return QLA_FUNCTION_FAILED;
1215 mcp->mb[0] = MBC_ABORT_COMMAND;
1216 if (HAS_EXTENDED_IDS(ha))
1217 mcp->mb[1] = fcport->loop_id;
1219 mcp->mb[1] = fcport->loop_id << 8;
1220 mcp->mb[2] = (uint16_t)handle;
1221 mcp->mb[3] = (uint16_t)(handle >> 16);
1222 mcp->mb[6] = (uint16_t)cmd->device->lun;
1223 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1225 mcp->tov = MBX_TOV_SECONDS;
1227 rval = qla2x00_mailbox_command(vha, mcp);
1229 if (rval != QLA_SUCCESS) {
1230 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1232 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1233 "Done %s.\n", __func__);
1240 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1244 mbx_cmd_t *mcp = &mc;
1245 scsi_qla_host_t *vha;
1246 struct req_que *req;
1247 struct rsp_que *rsp;
1252 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1253 "Entered %s.\n", __func__);
1255 req = vha->hw->req_q_map[0];
1257 mcp->mb[0] = MBC_ABORT_TARGET;
1258 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1259 if (HAS_EXTENDED_IDS(vha->hw)) {
1260 mcp->mb[1] = fcport->loop_id;
1262 mcp->out_mb |= MBX_10;
1264 mcp->mb[1] = fcport->loop_id << 8;
1266 mcp->mb[2] = vha->hw->loop_reset_delay;
1267 mcp->mb[9] = vha->vp_idx;
1270 mcp->tov = MBX_TOV_SECONDS;
1272 rval = qla2x00_mailbox_command(vha, mcp);
1273 if (rval != QLA_SUCCESS) {
1274 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1275 "Failed=%x.\n", rval);
1278 /* Issue marker IOCB. */
1279 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
1281 if (rval2 != QLA_SUCCESS) {
1282 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1283 "Failed to issue marker IOCB (%x).\n", rval2);
1285 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1286 "Done %s.\n", __func__);
1293 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1297 mbx_cmd_t *mcp = &mc;
1298 scsi_qla_host_t *vha;
1299 struct req_que *req;
1300 struct rsp_que *rsp;
1304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1305 "Entered %s.\n", __func__);
1307 req = vha->hw->req_q_map[0];
1309 mcp->mb[0] = MBC_LUN_RESET;
1310 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1311 if (HAS_EXTENDED_IDS(vha->hw))
1312 mcp->mb[1] = fcport->loop_id;
1314 mcp->mb[1] = fcport->loop_id << 8;
1315 mcp->mb[2] = (u32)l;
1317 mcp->mb[9] = vha->vp_idx;
1320 mcp->tov = MBX_TOV_SECONDS;
1322 rval = qla2x00_mailbox_command(vha, mcp);
1323 if (rval != QLA_SUCCESS) {
1324 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1327 /* Issue marker IOCB. */
1328 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1330 if (rval2 != QLA_SUCCESS) {
1331 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1332 "Failed to issue marker IOCB (%x).\n", rval2);
1334 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1335 "Done %s.\n", __func__);
1342 * qla2x00_get_adapter_id
1343 * Get adapter ID and topology.
1346 * ha = adapter block pointer.
1347 * id = pointer for loop ID.
1348 * al_pa = pointer for AL_PA.
1349 * area = pointer for area.
1350 * domain = pointer for domain.
1351 * top = pointer for topology.
1352 * TARGET_QUEUE_LOCK must be released.
1353 * ADAPTER_STATE_LOCK must be released.
1356 * qla2x00 local function return status code.
1362 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1363 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1367 mbx_cmd_t *mcp = &mc;
1369 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1370 "Entered %s.\n", __func__);
1372 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1373 mcp->mb[9] = vha->vp_idx;
1374 mcp->out_mb = MBX_9|MBX_0;
1375 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1376 if (IS_CNA_CAPABLE(vha->hw))
1377 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1378 if (IS_FWI2_CAPABLE(vha->hw))
1379 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1380 if (IS_QLA27XX(vha->hw))
1381 mcp->in_mb |= MBX_15;
1382 mcp->tov = MBX_TOV_SECONDS;
1384 rval = qla2x00_mailbox_command(vha, mcp);
1385 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1386 rval = QLA_COMMAND_ERROR;
1387 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1388 rval = QLA_INVALID_COMMAND;
1392 *al_pa = LSB(mcp->mb[2]);
1393 *area = MSB(mcp->mb[2]);
1394 *domain = LSB(mcp->mb[3]);
1396 *sw_cap = mcp->mb[7];
1398 if (rval != QLA_SUCCESS) {
1400 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1402 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1403 "Done %s.\n", __func__);
1405 if (IS_CNA_CAPABLE(vha->hw)) {
1406 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1407 vha->fcoe_fcf_idx = mcp->mb[10];
1408 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1409 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1410 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1411 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1412 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1413 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1415 /* If FA-WWN supported */
1416 if (IS_FAWWN_CAPABLE(vha->hw)) {
1417 if (mcp->mb[7] & BIT_14) {
1418 vha->port_name[0] = MSB(mcp->mb[16]);
1419 vha->port_name[1] = LSB(mcp->mb[16]);
1420 vha->port_name[2] = MSB(mcp->mb[17]);
1421 vha->port_name[3] = LSB(mcp->mb[17]);
1422 vha->port_name[4] = MSB(mcp->mb[18]);
1423 vha->port_name[5] = LSB(mcp->mb[18]);
1424 vha->port_name[6] = MSB(mcp->mb[19]);
1425 vha->port_name[7] = LSB(mcp->mb[19]);
1426 fc_host_port_name(vha->host) =
1427 wwn_to_u64(vha->port_name);
1428 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1429 "FA-WWN acquired %016llx\n",
1430 wwn_to_u64(vha->port_name));
1434 if (IS_QLA27XX(vha->hw))
1435 vha->bbcr = mcp->mb[15];
1442 * qla2x00_get_retry_cnt
1443 * Get current firmware login retry count and delay.
1446 * ha = adapter block pointer.
1447 * retry_cnt = pointer to login retry count.
1448 * tov = pointer to login timeout value.
1451 * qla2x00 local function return status code.
1457 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1463 mbx_cmd_t *mcp = &mc;
1465 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1466 "Entered %s.\n", __func__);
1468 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1469 mcp->out_mb = MBX_0;
1470 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1471 mcp->tov = MBX_TOV_SECONDS;
1473 rval = qla2x00_mailbox_command(vha, mcp);
1475 if (rval != QLA_SUCCESS) {
1477 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1478 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1480 /* Convert returned data and check our values. */
1481 *r_a_tov = mcp->mb[3] / 2;
1482 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1483 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1484 /* Update to the larger values */
1485 *retry_cnt = (uint8_t)mcp->mb[1];
1489 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1490 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1497 * qla2x00_init_firmware
1498 * Initialize adapter firmware.
1501 * ha = adapter block pointer.
1502 * dptr = Initialization control block pointer.
1503 * size = size of initialization control block.
1504 * TARGET_QUEUE_LOCK must be released.
1505 * ADAPTER_STATE_LOCK must be released.
1508 * qla2x00 local function return status code.
1514 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1518 mbx_cmd_t *mcp = &mc;
1519 struct qla_hw_data *ha = vha->hw;
1521 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1522 "Entered %s.\n", __func__);
1524 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1525 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1526 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1528 if (ha->flags.npiv_supported)
1529 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1531 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1534 mcp->mb[2] = MSW(ha->init_cb_dma);
1535 mcp->mb[3] = LSW(ha->init_cb_dma);
1536 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1537 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1538 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1539 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1541 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1542 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1543 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1544 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1545 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1546 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1548 /* 1 and 2 should normally be captured. */
1549 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1550 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1551 /* mb3 is additional info about the installed SFP. */
1552 mcp->in_mb |= MBX_3;
1553 mcp->buf_size = size;
1554 mcp->flags = MBX_DMA_OUT;
1555 mcp->tov = MBX_TOV_SECONDS;
1556 rval = qla2x00_mailbox_command(vha, mcp);
1558 if (rval != QLA_SUCCESS) {
1560 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1561 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1562 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1565 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1566 "Done %s.\n", __func__);
1573 * qla2x00_get_node_name_list
1574 * Issue get node name list mailbox command, kmalloc()
1575 * and return the resulting list. Caller must kfree() it!
1578 * ha = adapter state pointer.
1579 * out_data = resulting list
1580 * out_len = length of the resulting list
1583 * qla2x00 local function return status code.
1589 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1591 struct qla_hw_data *ha = vha->hw;
1592 struct qla_port_24xx_data *list = NULL;
1595 dma_addr_t pmap_dma;
1601 dma_size = left * sizeof(*list);
1602 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1603 &pmap_dma, GFP_KERNEL);
1605 ql_log(ql_log_warn, vha, 0x113f,
1606 "%s(%ld): DMA Alloc failed of %ld\n",
1607 __func__, vha->host_no, dma_size);
1608 rval = QLA_MEMORY_ALLOC_FAILED;
1612 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1613 mc.mb[1] = BIT_1 | BIT_3;
1614 mc.mb[2] = MSW(pmap_dma);
1615 mc.mb[3] = LSW(pmap_dma);
1616 mc.mb[6] = MSW(MSD(pmap_dma));
1617 mc.mb[7] = LSW(MSD(pmap_dma));
1618 mc.mb[8] = dma_size;
1619 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1620 mc.in_mb = MBX_0|MBX_1;
1622 mc.flags = MBX_DMA_IN;
1624 rval = qla2x00_mailbox_command(vha, &mc);
1625 if (rval != QLA_SUCCESS) {
1626 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1627 (mc.mb[1] == 0xA)) {
1628 left += le16_to_cpu(mc.mb[2]) /
1629 sizeof(struct qla_port_24xx_data);
1637 list = kmemdup(pmap, dma_size, GFP_KERNEL);
1639 ql_log(ql_log_warn, vha, 0x1140,
1640 "%s(%ld): failed to allocate node names list "
1641 "structure.\n", __func__, vha->host_no);
1642 rval = QLA_MEMORY_ALLOC_FAILED;
1647 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1651 *out_len = dma_size;
1657 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1662 * qla2x00_get_port_database
1663 * Issue normal/enhanced get port database mailbox command
1664 * and copy device name as necessary.
1667 * ha = adapter state pointer.
1668 * dev = structure pointer.
1669 * opt = enhanced cmd option byte.
1672 * qla2x00 local function return status code.
1678 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1682 mbx_cmd_t *mcp = &mc;
1683 port_database_t *pd;
1684 struct port_database_24xx *pd24;
1686 struct qla_hw_data *ha = vha->hw;
1688 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1689 "Entered %s.\n", __func__);
1692 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1694 ql_log(ql_log_warn, vha, 0x1050,
1695 "Failed to allocate port database structure.\n");
1696 return QLA_MEMORY_ALLOC_FAILED;
1698 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1700 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1701 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1702 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1703 mcp->mb[2] = MSW(pd_dma);
1704 mcp->mb[3] = LSW(pd_dma);
1705 mcp->mb[6] = MSW(MSD(pd_dma));
1706 mcp->mb[7] = LSW(MSD(pd_dma));
1707 mcp->mb[9] = vha->vp_idx;
1708 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1710 if (IS_FWI2_CAPABLE(ha)) {
1711 mcp->mb[1] = fcport->loop_id;
1713 mcp->out_mb |= MBX_10|MBX_1;
1714 mcp->in_mb |= MBX_1;
1715 } else if (HAS_EXTENDED_IDS(ha)) {
1716 mcp->mb[1] = fcport->loop_id;
1718 mcp->out_mb |= MBX_10|MBX_1;
1720 mcp->mb[1] = fcport->loop_id << 8 | opt;
1721 mcp->out_mb |= MBX_1;
1723 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1724 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1725 mcp->flags = MBX_DMA_IN;
1726 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1727 rval = qla2x00_mailbox_command(vha, mcp);
1728 if (rval != QLA_SUCCESS)
1731 if (IS_FWI2_CAPABLE(ha)) {
1733 pd24 = (struct port_database_24xx *) pd;
1735 /* Check for logged in state. */
1736 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1737 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1738 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1739 "Unable to verify login-state (%x/%x) for "
1740 "loop_id %x.\n", pd24->current_login_state,
1741 pd24->last_login_state, fcport->loop_id);
1742 rval = QLA_FUNCTION_FAILED;
1746 if (fcport->loop_id == FC_NO_LOOP_ID ||
1747 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1748 memcmp(fcport->port_name, pd24->port_name, 8))) {
1749 /* We lost the device mid way. */
1750 rval = QLA_NOT_LOGGED_IN;
1754 /* Names are little-endian. */
1755 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1756 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1758 /* Get port_id of device. */
1759 fcport->d_id.b.domain = pd24->port_id[0];
1760 fcport->d_id.b.area = pd24->port_id[1];
1761 fcport->d_id.b.al_pa = pd24->port_id[2];
1762 fcport->d_id.b.rsvd_1 = 0;
1764 /* If not target must be initiator or unknown type. */
1765 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1766 fcport->port_type = FCT_INITIATOR;
1768 fcport->port_type = FCT_TARGET;
1770 /* Passback COS information. */
1771 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1772 FC_COS_CLASS2 : FC_COS_CLASS3;
1774 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1775 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1779 /* Check for logged in state. */
1780 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1781 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1782 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1783 "Unable to verify login-state (%x/%x) - "
1784 "portid=%02x%02x%02x.\n", pd->master_state,
1785 pd->slave_state, fcport->d_id.b.domain,
1786 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1787 rval = QLA_FUNCTION_FAILED;
1791 if (fcport->loop_id == FC_NO_LOOP_ID ||
1792 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1793 memcmp(fcport->port_name, pd->port_name, 8))) {
1794 /* We lost the device mid way. */
1795 rval = QLA_NOT_LOGGED_IN;
1799 /* Names are little-endian. */
1800 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1801 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1803 /* Get port_id of device. */
1804 fcport->d_id.b.domain = pd->port_id[0];
1805 fcport->d_id.b.area = pd->port_id[3];
1806 fcport->d_id.b.al_pa = pd->port_id[2];
1807 fcport->d_id.b.rsvd_1 = 0;
1809 /* If not target must be initiator or unknown type. */
1810 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1811 fcport->port_type = FCT_INITIATOR;
1813 fcport->port_type = FCT_TARGET;
1815 /* Passback COS information. */
1816 fcport->supported_classes = (pd->options & BIT_4) ?
1817 FC_COS_CLASS2: FC_COS_CLASS3;
1821 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1823 if (rval != QLA_SUCCESS) {
1824 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1825 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1826 mcp->mb[0], mcp->mb[1]);
1828 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1829 "Done %s.\n", __func__);
1836 * qla2x00_get_firmware_state
1837 * Get adapter firmware state.
1840 * ha = adapter block pointer.
1841 * dptr = pointer for firmware state.
1842 * TARGET_QUEUE_LOCK must be released.
1843 * ADAPTER_STATE_LOCK must be released.
1846 * qla2x00 local function return status code.
1852 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1856 mbx_cmd_t *mcp = &mc;
1858 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1859 "Entered %s.\n", __func__);
1861 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1862 mcp->out_mb = MBX_0;
1863 if (IS_FWI2_CAPABLE(vha->hw))
1864 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1866 mcp->in_mb = MBX_1|MBX_0;
1867 mcp->tov = MBX_TOV_SECONDS;
1869 rval = qla2x00_mailbox_command(vha, mcp);
1871 /* Return firmware states. */
1872 states[0] = mcp->mb[1];
1873 if (IS_FWI2_CAPABLE(vha->hw)) {
1874 states[1] = mcp->mb[2];
1875 states[2] = mcp->mb[3]; /* SFP info */
1876 states[3] = mcp->mb[4];
1877 states[4] = mcp->mb[5];
1878 states[5] = mcp->mb[6]; /* DPORT status */
1881 if (rval != QLA_SUCCESS) {
1883 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1886 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1887 "Done %s.\n", __func__);
1894 * qla2x00_get_port_name
1895 * Issue get port name mailbox command.
1896 * Returned name is in big endian format.
1899 * ha = adapter block pointer.
1900 * loop_id = loop ID of device.
1901 * name = pointer for name.
1902 * TARGET_QUEUE_LOCK must be released.
1903 * ADAPTER_STATE_LOCK must be released.
1906 * qla2x00 local function return status code.
1912 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1917 mbx_cmd_t *mcp = &mc;
1919 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1920 "Entered %s.\n", __func__);
1922 mcp->mb[0] = MBC_GET_PORT_NAME;
1923 mcp->mb[9] = vha->vp_idx;
1924 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1925 if (HAS_EXTENDED_IDS(vha->hw)) {
1926 mcp->mb[1] = loop_id;
1928 mcp->out_mb |= MBX_10;
1930 mcp->mb[1] = loop_id << 8 | opt;
1933 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1934 mcp->tov = MBX_TOV_SECONDS;
1936 rval = qla2x00_mailbox_command(vha, mcp);
1938 if (rval != QLA_SUCCESS) {
1940 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1943 /* This function returns name in big endian. */
1944 name[0] = MSB(mcp->mb[2]);
1945 name[1] = LSB(mcp->mb[2]);
1946 name[2] = MSB(mcp->mb[3]);
1947 name[3] = LSB(mcp->mb[3]);
1948 name[4] = MSB(mcp->mb[6]);
1949 name[5] = LSB(mcp->mb[6]);
1950 name[6] = MSB(mcp->mb[7]);
1951 name[7] = LSB(mcp->mb[7]);
1954 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1955 "Done %s.\n", __func__);
1962 * qla24xx_link_initialization
1963 * Issue link initialization mailbox command.
1966 * ha = adapter block pointer.
1967 * TARGET_QUEUE_LOCK must be released.
1968 * ADAPTER_STATE_LOCK must be released.
1971 * qla2x00 local function return status code.
1977 qla24xx_link_initialize(scsi_qla_host_t *vha)
1981 mbx_cmd_t *mcp = &mc;
1983 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1984 "Entered %s.\n", __func__);
1986 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1987 return QLA_FUNCTION_FAILED;
1989 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1991 if (vha->hw->operating_mode == LOOP)
1992 mcp->mb[1] |= BIT_6;
1994 mcp->mb[1] |= BIT_5;
1997 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1999 mcp->tov = MBX_TOV_SECONDS;
2001 rval = qla2x00_mailbox_command(vha, mcp);
2003 if (rval != QLA_SUCCESS) {
2004 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
2006 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
2007 "Done %s.\n", __func__);
2015 * Issue LIP reset mailbox command.
2018 * ha = adapter block pointer.
2019 * TARGET_QUEUE_LOCK must be released.
2020 * ADAPTER_STATE_LOCK must be released.
2023 * qla2x00 local function return status code.
2029 qla2x00_lip_reset(scsi_qla_host_t *vha)
2033 mbx_cmd_t *mcp = &mc;
2035 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
2036 "Entered %s.\n", __func__);
2038 if (IS_CNA_CAPABLE(vha->hw)) {
2039 /* Logout across all FCFs. */
2040 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2043 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2044 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2045 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2048 mcp->mb[3] = vha->hw->loop_reset_delay;
2049 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2051 mcp->mb[0] = MBC_LIP_RESET;
2052 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2053 if (HAS_EXTENDED_IDS(vha->hw)) {
2054 mcp->mb[1] = 0x00ff;
2056 mcp->out_mb |= MBX_10;
2058 mcp->mb[1] = 0xff00;
2060 mcp->mb[2] = vha->hw->loop_reset_delay;
2064 mcp->tov = MBX_TOV_SECONDS;
2066 rval = qla2x00_mailbox_command(vha, mcp);
2068 if (rval != QLA_SUCCESS) {
2070 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2073 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2074 "Done %s.\n", __func__);
2085 * ha = adapter block pointer.
2086 * sns = pointer for command.
2087 * cmd_size = command size.
2088 * buf_size = response/command size.
2089 * TARGET_QUEUE_LOCK must be released.
2090 * ADAPTER_STATE_LOCK must be released.
2093 * qla2x00 local function return status code.
2099 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2100 uint16_t cmd_size, size_t buf_size)
2104 mbx_cmd_t *mcp = &mc;
2106 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2107 "Entered %s.\n", __func__);
2109 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2110 "Retry cnt=%d ratov=%d total tov=%d.\n",
2111 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2113 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2114 mcp->mb[1] = cmd_size;
2115 mcp->mb[2] = MSW(sns_phys_address);
2116 mcp->mb[3] = LSW(sns_phys_address);
2117 mcp->mb[6] = MSW(MSD(sns_phys_address));
2118 mcp->mb[7] = LSW(MSD(sns_phys_address));
2119 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2120 mcp->in_mb = MBX_0|MBX_1;
2121 mcp->buf_size = buf_size;
2122 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2123 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2124 rval = qla2x00_mailbox_command(vha, mcp);
2126 if (rval != QLA_SUCCESS) {
2128 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2129 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2130 rval, mcp->mb[0], mcp->mb[1]);
2133 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2134 "Done %s.\n", __func__);
2141 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2142 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2146 struct logio_entry_24xx *lg;
2149 struct qla_hw_data *ha = vha->hw;
2150 struct req_que *req;
2152 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2153 "Entered %s.\n", __func__);
2155 if (ha->flags.cpu_affinity_enabled)
2156 req = ha->req_q_map[0];
2160 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2162 ql_log(ql_log_warn, vha, 0x1062,
2163 "Failed to allocate login IOCB.\n");
2164 return QLA_MEMORY_ALLOC_FAILED;
2166 memset(lg, 0, sizeof(struct logio_entry_24xx));
2168 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2169 lg->entry_count = 1;
2170 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2171 lg->nport_handle = cpu_to_le16(loop_id);
2172 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2174 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2176 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2177 lg->port_id[0] = al_pa;
2178 lg->port_id[1] = area;
2179 lg->port_id[2] = domain;
2180 lg->vp_index = vha->vp_idx;
2181 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2182 (ha->r_a_tov / 10 * 2) + 2);
2183 if (rval != QLA_SUCCESS) {
2184 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2185 "Failed to issue login IOCB (%x).\n", rval);
2186 } else if (lg->entry_status != 0) {
2187 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2188 "Failed to complete IOCB -- error status (%x).\n",
2190 rval = QLA_FUNCTION_FAILED;
2191 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2192 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2193 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2195 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2196 "Failed to complete IOCB -- completion status (%x) "
2197 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2201 case LSC_SCODE_PORTID_USED:
2202 mb[0] = MBS_PORT_ID_USED;
2203 mb[1] = LSW(iop[1]);
2205 case LSC_SCODE_NPORT_USED:
2206 mb[0] = MBS_LOOP_ID_USED;
2208 case LSC_SCODE_NOLINK:
2209 case LSC_SCODE_NOIOCB:
2210 case LSC_SCODE_NOXCB:
2211 case LSC_SCODE_CMD_FAILED:
2212 case LSC_SCODE_NOFABRIC:
2213 case LSC_SCODE_FW_NOT_READY:
2214 case LSC_SCODE_NOT_LOGGED_IN:
2215 case LSC_SCODE_NOPCB:
2216 case LSC_SCODE_ELS_REJECT:
2217 case LSC_SCODE_CMD_PARAM_ERR:
2218 case LSC_SCODE_NONPORT:
2219 case LSC_SCODE_LOGGED_IN:
2220 case LSC_SCODE_NOFLOGI_ACC:
2222 mb[0] = MBS_COMMAND_ERROR;
2226 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2227 "Done %s.\n", __func__);
2229 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2231 mb[0] = MBS_COMMAND_COMPLETE;
2233 if (iop[0] & BIT_4) {
2239 /* Passback COS information. */
2241 if (lg->io_parameter[7] || lg->io_parameter[8])
2242 mb[10] |= BIT_0; /* Class 2. */
2243 if (lg->io_parameter[9] || lg->io_parameter[10])
2244 mb[10] |= BIT_1; /* Class 3. */
2245 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2246 mb[10] |= BIT_7; /* Confirmed Completion
2251 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2257 * qla2x00_login_fabric
2258 * Issue login fabric port mailbox command.
2261 * ha = adapter block pointer.
2262 * loop_id = device loop ID.
2263 * domain = device domain.
2264 * area = device area.
2265 * al_pa = device AL_PA.
2266 * status = pointer for return status.
2267 * opt = command options.
2268 * TARGET_QUEUE_LOCK must be released.
2269 * ADAPTER_STATE_LOCK must be released.
2272 * qla2x00 local function return status code.
2278 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2279 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2283 mbx_cmd_t *mcp = &mc;
2284 struct qla_hw_data *ha = vha->hw;
2286 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2287 "Entered %s.\n", __func__);
2289 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2290 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2291 if (HAS_EXTENDED_IDS(ha)) {
2292 mcp->mb[1] = loop_id;
2294 mcp->out_mb |= MBX_10;
2296 mcp->mb[1] = (loop_id << 8) | opt;
2298 mcp->mb[2] = domain;
2299 mcp->mb[3] = area << 8 | al_pa;
2301 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2302 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2304 rval = qla2x00_mailbox_command(vha, mcp);
2306 /* Return mailbox statuses. */
2313 /* COS retrieved from Get-Port-Database mailbox command. */
2317 if (rval != QLA_SUCCESS) {
2318 /* RLU tmp code: need to change main mailbox_command function to
2319 * return ok even when the mailbox completion value is not
2320 * SUCCESS. The caller needs to be responsible to interpret
2321 * the return values of this mailbox command if we're not
2322 * to change too much of the existing code.
2324 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2325 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2326 mcp->mb[0] == 0x4006)
2330 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2331 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2332 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2335 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2336 "Done %s.\n", __func__);
2343 * qla2x00_login_local_device
2344 * Issue login loop port mailbox command.
2347 * ha = adapter block pointer.
2348 * loop_id = device loop ID.
2349 * opt = command options.
2352 * Return status code.
2359 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2360 uint16_t *mb_ret, uint8_t opt)
2364 mbx_cmd_t *mcp = &mc;
2365 struct qla_hw_data *ha = vha->hw;
2367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2368 "Entered %s.\n", __func__);
2370 if (IS_FWI2_CAPABLE(ha))
2371 return qla24xx_login_fabric(vha, fcport->loop_id,
2372 fcport->d_id.b.domain, fcport->d_id.b.area,
2373 fcport->d_id.b.al_pa, mb_ret, opt);
2375 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2376 if (HAS_EXTENDED_IDS(ha))
2377 mcp->mb[1] = fcport->loop_id;
2379 mcp->mb[1] = fcport->loop_id << 8;
2381 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2382 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2383 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2385 rval = qla2x00_mailbox_command(vha, mcp);
2387 /* Return mailbox statuses. */
2388 if (mb_ret != NULL) {
2389 mb_ret[0] = mcp->mb[0];
2390 mb_ret[1] = mcp->mb[1];
2391 mb_ret[6] = mcp->mb[6];
2392 mb_ret[7] = mcp->mb[7];
2395 if (rval != QLA_SUCCESS) {
2396 /* AV tmp code: need to change main mailbox_command function to
2397 * return ok even when the mailbox completion value is not
2398 * SUCCESS. The caller needs to be responsible to interpret
2399 * the return values of this mailbox command if we're not
2400 * to change too much of the existing code.
2402 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2405 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2406 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2407 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2410 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2411 "Done %s.\n", __func__);
2418 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2419 uint8_t area, uint8_t al_pa)
2422 struct logio_entry_24xx *lg;
2424 struct qla_hw_data *ha = vha->hw;
2425 struct req_que *req;
2427 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2428 "Entered %s.\n", __func__);
2430 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2432 ql_log(ql_log_warn, vha, 0x106e,
2433 "Failed to allocate logout IOCB.\n");
2434 return QLA_MEMORY_ALLOC_FAILED;
2436 memset(lg, 0, sizeof(struct logio_entry_24xx));
2438 if (ql2xmaxqueues > 1)
2439 req = ha->req_q_map[0];
2442 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2443 lg->entry_count = 1;
2444 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2445 lg->nport_handle = cpu_to_le16(loop_id);
2447 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2449 lg->port_id[0] = al_pa;
2450 lg->port_id[1] = area;
2451 lg->port_id[2] = domain;
2452 lg->vp_index = vha->vp_idx;
2453 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2454 (ha->r_a_tov / 10 * 2) + 2);
2455 if (rval != QLA_SUCCESS) {
2456 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2457 "Failed to issue logout IOCB (%x).\n", rval);
2458 } else if (lg->entry_status != 0) {
2459 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2460 "Failed to complete IOCB -- error status (%x).\n",
2462 rval = QLA_FUNCTION_FAILED;
2463 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2464 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2465 "Failed to complete IOCB -- completion status (%x) "
2466 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2467 le32_to_cpu(lg->io_parameter[0]),
2468 le32_to_cpu(lg->io_parameter[1]));
2471 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2472 "Done %s.\n", __func__);
2475 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2481 * qla2x00_fabric_logout
2482 * Issue logout fabric port mailbox command.
2485 * ha = adapter block pointer.
2486 * loop_id = device loop ID.
2487 * TARGET_QUEUE_LOCK must be released.
2488 * ADAPTER_STATE_LOCK must be released.
2491 * qla2x00 local function return status code.
2497 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2498 uint8_t area, uint8_t al_pa)
2502 mbx_cmd_t *mcp = &mc;
2504 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2505 "Entered %s.\n", __func__);
2507 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2508 mcp->out_mb = MBX_1|MBX_0;
2509 if (HAS_EXTENDED_IDS(vha->hw)) {
2510 mcp->mb[1] = loop_id;
2512 mcp->out_mb |= MBX_10;
2514 mcp->mb[1] = loop_id << 8;
2517 mcp->in_mb = MBX_1|MBX_0;
2518 mcp->tov = MBX_TOV_SECONDS;
2520 rval = qla2x00_mailbox_command(vha, mcp);
2522 if (rval != QLA_SUCCESS) {
2524 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2525 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2528 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2529 "Done %s.\n", __func__);
2536 * qla2x00_full_login_lip
2537 * Issue full login LIP mailbox command.
2540 * ha = adapter block pointer.
2541 * TARGET_QUEUE_LOCK must be released.
2542 * ADAPTER_STATE_LOCK must be released.
2545 * qla2x00 local function return status code.
2551 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2555 mbx_cmd_t *mcp = &mc;
2557 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2558 "Entered %s.\n", __func__);
2560 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2561 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2564 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2566 mcp->tov = MBX_TOV_SECONDS;
2568 rval = qla2x00_mailbox_command(vha, mcp);
2570 if (rval != QLA_SUCCESS) {
2572 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2575 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2576 "Done %s.\n", __func__);
2583 * qla2x00_get_id_list
2586 * ha = adapter block pointer.
2589 * qla2x00 local function return status code.
2595 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2600 mbx_cmd_t *mcp = &mc;
2602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2603 "Entered %s.\n", __func__);
2605 if (id_list == NULL)
2606 return QLA_FUNCTION_FAILED;
2608 mcp->mb[0] = MBC_GET_ID_LIST;
2609 mcp->out_mb = MBX_0;
2610 if (IS_FWI2_CAPABLE(vha->hw)) {
2611 mcp->mb[2] = MSW(id_list_dma);
2612 mcp->mb[3] = LSW(id_list_dma);
2613 mcp->mb[6] = MSW(MSD(id_list_dma));
2614 mcp->mb[7] = LSW(MSD(id_list_dma));
2616 mcp->mb[9] = vha->vp_idx;
2617 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2619 mcp->mb[1] = MSW(id_list_dma);
2620 mcp->mb[2] = LSW(id_list_dma);
2621 mcp->mb[3] = MSW(MSD(id_list_dma));
2622 mcp->mb[6] = LSW(MSD(id_list_dma));
2623 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2625 mcp->in_mb = MBX_1|MBX_0;
2626 mcp->tov = MBX_TOV_SECONDS;
2628 rval = qla2x00_mailbox_command(vha, mcp);
2630 if (rval != QLA_SUCCESS) {
2632 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2634 *entries = mcp->mb[1];
2635 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2636 "Done %s.\n", __func__);
2643 * qla2x00_get_resource_cnts
2644 * Get current firmware resource counts.
2647 * ha = adapter block pointer.
2650 * qla2x00 local function return status code.
2656 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2658 struct qla_hw_data *ha = vha->hw;
2661 mbx_cmd_t *mcp = &mc;
2663 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2664 "Entered %s.\n", __func__);
2666 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2667 mcp->out_mb = MBX_0;
2668 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2669 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2670 mcp->in_mb |= MBX_12;
2671 mcp->tov = MBX_TOV_SECONDS;
2673 rval = qla2x00_mailbox_command(vha, mcp);
2675 if (rval != QLA_SUCCESS) {
2677 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2678 "Failed mb[0]=%x.\n", mcp->mb[0]);
2680 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2681 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2682 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2683 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2684 mcp->mb[11], mcp->mb[12]);
2686 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2687 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2688 ha->cur_fw_xcb_count = mcp->mb[3];
2689 ha->orig_fw_xcb_count = mcp->mb[6];
2690 ha->cur_fw_iocb_count = mcp->mb[7];
2691 ha->orig_fw_iocb_count = mcp->mb[10];
2692 if (ha->flags.npiv_supported)
2693 ha->max_npiv_vports = mcp->mb[11];
2694 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
2695 ha->fw_max_fcf_count = mcp->mb[12];
2702 * qla2x00_get_fcal_position_map
2703 * Get FCAL (LILP) position map using mailbox command
2706 * ha = adapter state pointer.
2707 * pos_map = buffer pointer (can be NULL).
2710 * qla2x00 local function return status code.
2716 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2720 mbx_cmd_t *mcp = &mc;
2722 dma_addr_t pmap_dma;
2723 struct qla_hw_data *ha = vha->hw;
2725 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2726 "Entered %s.\n", __func__);
2728 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2730 ql_log(ql_log_warn, vha, 0x1080,
2731 "Memory alloc failed.\n");
2732 return QLA_MEMORY_ALLOC_FAILED;
2734 memset(pmap, 0, FCAL_MAP_SIZE);
2736 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2737 mcp->mb[2] = MSW(pmap_dma);
2738 mcp->mb[3] = LSW(pmap_dma);
2739 mcp->mb[6] = MSW(MSD(pmap_dma));
2740 mcp->mb[7] = LSW(MSD(pmap_dma));
2741 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2742 mcp->in_mb = MBX_1|MBX_0;
2743 mcp->buf_size = FCAL_MAP_SIZE;
2744 mcp->flags = MBX_DMA_IN;
2745 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2746 rval = qla2x00_mailbox_command(vha, mcp);
2748 if (rval == QLA_SUCCESS) {
2749 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2750 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2751 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2752 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2756 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2758 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2760 if (rval != QLA_SUCCESS) {
2761 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2763 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2764 "Done %s.\n", __func__);
2771 * qla2x00_get_link_status
2774 * ha = adapter block pointer.
2775 * loop_id = device loop ID.
2776 * ret_buf = pointer to link status return buffer.
2780 * BIT_0 = mem alloc error.
2781 * BIT_1 = mailbox error.
2784 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2785 struct link_statistics *stats, dma_addr_t stats_dma)
2789 mbx_cmd_t *mcp = &mc;
2790 uint32_t *iter = (void *)stats;
2791 ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
2792 struct qla_hw_data *ha = vha->hw;
2794 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2795 "Entered %s.\n", __func__);
2797 mcp->mb[0] = MBC_GET_LINK_STATUS;
2798 mcp->mb[2] = MSW(LSD(stats_dma));
2799 mcp->mb[3] = LSW(LSD(stats_dma));
2800 mcp->mb[6] = MSW(MSD(stats_dma));
2801 mcp->mb[7] = LSW(MSD(stats_dma));
2802 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2804 if (IS_FWI2_CAPABLE(ha)) {
2805 mcp->mb[1] = loop_id;
2808 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2809 mcp->in_mb |= MBX_1;
2810 } else if (HAS_EXTENDED_IDS(ha)) {
2811 mcp->mb[1] = loop_id;
2813 mcp->out_mb |= MBX_10|MBX_1;
2815 mcp->mb[1] = loop_id << 8;
2816 mcp->out_mb |= MBX_1;
2818 mcp->tov = MBX_TOV_SECONDS;
2819 mcp->flags = IOCTL_CMD;
2820 rval = qla2x00_mailbox_command(vha, mcp);
2822 if (rval == QLA_SUCCESS) {
2823 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2824 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2825 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2826 rval = QLA_FUNCTION_FAILED;
2828 /* Re-endianize - firmware data is le32. */
2829 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2830 "Done %s.\n", __func__);
2831 for ( ; dwords--; iter++)
2836 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2843 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2844 dma_addr_t stats_dma, uint options)
2848 mbx_cmd_t *mcp = &mc;
2849 uint32_t *iter, dwords;
2851 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2852 "Entered %s.\n", __func__);
2854 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2855 mcp->mb[2] = MSW(stats_dma);
2856 mcp->mb[3] = LSW(stats_dma);
2857 mcp->mb[6] = MSW(MSD(stats_dma));
2858 mcp->mb[7] = LSW(MSD(stats_dma));
2859 mcp->mb[8] = sizeof(struct link_statistics) / 4;
2860 mcp->mb[9] = vha->vp_idx;
2861 mcp->mb[10] = options;
2862 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2863 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2864 mcp->tov = MBX_TOV_SECONDS;
2865 mcp->flags = IOCTL_CMD;
2866 rval = qla2x00_mailbox_command(vha, mcp);
2868 if (rval == QLA_SUCCESS) {
2869 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2870 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2871 "Failed mb[0]=%x.\n", mcp->mb[0]);
2872 rval = QLA_FUNCTION_FAILED;
2874 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2875 "Done %s.\n", __func__);
2876 /* Re-endianize - firmware data is le32. */
2877 dwords = sizeof(struct link_statistics) / 4;
2878 iter = &stats->link_fail_cnt;
2879 for ( ; dwords--; iter++)
2884 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2891 qla24xx_abort_command(srb_t *sp)
2894 unsigned long flags = 0;
2896 struct abort_entry_24xx *abt;
2899 fc_port_t *fcport = sp->fcport;
2900 struct scsi_qla_host *vha = fcport->vha;
2901 struct qla_hw_data *ha = vha->hw;
2902 struct req_que *req = vha->req;
2904 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2905 "Entered %s.\n", __func__);
2907 if (ql2xasynctmfenable)
2908 return qla24xx_async_abort_command(sp);
2910 spin_lock_irqsave(&ha->hardware_lock, flags);
2911 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2912 if (req->outstanding_cmds[handle] == sp)
2915 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2916 if (handle == req->num_outstanding_cmds) {
2917 /* Command not found. */
2918 return QLA_FUNCTION_FAILED;
2921 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2923 ql_log(ql_log_warn, vha, 0x108d,
2924 "Failed to allocate abort IOCB.\n");
2925 return QLA_MEMORY_ALLOC_FAILED;
2927 memset(abt, 0, sizeof(struct abort_entry_24xx));
2929 abt->entry_type = ABORT_IOCB_TYPE;
2930 abt->entry_count = 1;
2931 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2932 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2933 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2934 abt->port_id[0] = fcport->d_id.b.al_pa;
2935 abt->port_id[1] = fcport->d_id.b.area;
2936 abt->port_id[2] = fcport->d_id.b.domain;
2937 abt->vp_index = fcport->vha->vp_idx;
2939 abt->req_que_no = cpu_to_le16(req->id);
2941 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2942 if (rval != QLA_SUCCESS) {
2943 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2944 "Failed to issue IOCB (%x).\n", rval);
2945 } else if (abt->entry_status != 0) {
2946 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2947 "Failed to complete IOCB -- error status (%x).\n",
2949 rval = QLA_FUNCTION_FAILED;
2950 } else if (abt->nport_handle != cpu_to_le16(0)) {
2951 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2952 "Failed to complete IOCB -- completion status (%x).\n",
2953 le16_to_cpu(abt->nport_handle));
2954 if (abt->nport_handle == CS_IOCB_ERROR)
2955 rval = QLA_FUNCTION_PARAMETER_ERROR;
2957 rval = QLA_FUNCTION_FAILED;
2959 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2960 "Done %s.\n", __func__);
2963 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2968 struct tsk_mgmt_cmd {
2970 struct tsk_mgmt_entry tsk;
2971 struct sts_entry_24xx sts;
2976 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2977 uint64_t l, int tag)
2980 struct tsk_mgmt_cmd *tsk;
2981 struct sts_entry_24xx *sts;
2983 scsi_qla_host_t *vha;
2984 struct qla_hw_data *ha;
2985 struct req_que *req;
2986 struct rsp_que *rsp;
2992 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2993 "Entered %s.\n", __func__);
2995 if (ha->flags.cpu_affinity_enabled)
2996 rsp = ha->rsp_q_map[tag + 1];
2999 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3001 ql_log(ql_log_warn, vha, 0x1093,
3002 "Failed to allocate task management IOCB.\n");
3003 return QLA_MEMORY_ALLOC_FAILED;
3005 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
3007 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
3008 tsk->p.tsk.entry_count = 1;
3009 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
3010 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3011 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3012 tsk->p.tsk.control_flags = cpu_to_le32(type);
3013 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
3014 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
3015 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3016 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3017 if (type == TCF_LUN_RESET) {
3018 int_to_scsilun(l, &tsk->p.tsk.lun);
3019 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
3020 sizeof(tsk->p.tsk.lun));
3024 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3025 if (rval != QLA_SUCCESS) {
3026 ql_dbg(ql_dbg_mbx, vha, 0x1094,
3027 "Failed to issue %s reset IOCB (%x).\n", name, rval);
3028 } else if (sts->entry_status != 0) {
3029 ql_dbg(ql_dbg_mbx, vha, 0x1095,
3030 "Failed to complete IOCB -- error status (%x).\n",
3032 rval = QLA_FUNCTION_FAILED;
3033 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3034 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3035 "Failed to complete IOCB -- completion status (%x).\n",
3036 le16_to_cpu(sts->comp_status));
3037 rval = QLA_FUNCTION_FAILED;
3038 } else if (le16_to_cpu(sts->scsi_status) &
3039 SS_RESPONSE_INFO_LEN_VALID) {
3040 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3041 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3042 "Ignoring inconsistent data length -- not enough "
3043 "response info (%d).\n",
3044 le32_to_cpu(sts->rsp_data_len));
3045 } else if (sts->data[3]) {
3046 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3047 "Failed to complete IOCB -- response (%x).\n",
3049 rval = QLA_FUNCTION_FAILED;
3053 /* Issue marker IOCB. */
3054 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
3055 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
3056 if (rval2 != QLA_SUCCESS) {
3057 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3058 "Failed to issue marker IOCB (%x).\n", rval2);
3060 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3061 "Done %s.\n", __func__);
3064 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3070 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3072 struct qla_hw_data *ha = fcport->vha->hw;
3074 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3075 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3077 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3081 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3083 struct qla_hw_data *ha = fcport->vha->hw;
3085 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3086 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3088 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3092 qla2x00_system_error(scsi_qla_host_t *vha)
3096 mbx_cmd_t *mcp = &mc;
3097 struct qla_hw_data *ha = vha->hw;
3099 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3100 return QLA_FUNCTION_FAILED;
3102 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3103 "Entered %s.\n", __func__);
3105 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3106 mcp->out_mb = MBX_0;
3110 rval = qla2x00_mailbox_command(vha, mcp);
3112 if (rval != QLA_SUCCESS) {
3113 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3115 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3116 "Done %s.\n", __func__);
3123 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3127 mbx_cmd_t *mcp = &mc;
3129 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3130 !IS_QLA27XX(vha->hw))
3131 return QLA_FUNCTION_FAILED;
3133 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3134 "Entered %s.\n", __func__);
3136 mcp->mb[0] = MBC_WRITE_SERDES;
3138 if (IS_QLA2031(vha->hw))
3139 mcp->mb[2] = data & 0xff;
3144 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3146 mcp->tov = MBX_TOV_SECONDS;
3148 rval = qla2x00_mailbox_command(vha, mcp);
3150 if (rval != QLA_SUCCESS) {
3151 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3152 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3154 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3155 "Done %s.\n", __func__);
3162 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3166 mbx_cmd_t *mcp = &mc;
3168 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3169 !IS_QLA27XX(vha->hw))
3170 return QLA_FUNCTION_FAILED;
3172 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3173 "Entered %s.\n", __func__);
3175 mcp->mb[0] = MBC_READ_SERDES;
3178 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3179 mcp->in_mb = MBX_1|MBX_0;
3180 mcp->tov = MBX_TOV_SECONDS;
3182 rval = qla2x00_mailbox_command(vha, mcp);
3184 if (IS_QLA2031(vha->hw))
3185 *data = mcp->mb[1] & 0xff;
3189 if (rval != QLA_SUCCESS) {
3190 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3191 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3193 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3194 "Done %s.\n", __func__);
3201 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3205 mbx_cmd_t *mcp = &mc;
3207 if (!IS_QLA8044(vha->hw))
3208 return QLA_FUNCTION_FAILED;
3210 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186,
3211 "Entered %s.\n", __func__);
3213 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3214 mcp->mb[1] = HCS_WRITE_SERDES;
3215 mcp->mb[3] = LSW(addr);
3216 mcp->mb[4] = MSW(addr);
3217 mcp->mb[5] = LSW(data);
3218 mcp->mb[6] = MSW(data);
3219 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3221 mcp->tov = MBX_TOV_SECONDS;
3223 rval = qla2x00_mailbox_command(vha, mcp);
3225 if (rval != QLA_SUCCESS) {
3226 ql_dbg(ql_dbg_mbx, vha, 0x1187,
3227 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3229 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3230 "Done %s.\n", __func__);
3237 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3241 mbx_cmd_t *mcp = &mc;
3243 if (!IS_QLA8044(vha->hw))
3244 return QLA_FUNCTION_FAILED;
3246 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3247 "Entered %s.\n", __func__);
3249 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3250 mcp->mb[1] = HCS_READ_SERDES;
3251 mcp->mb[3] = LSW(addr);
3252 mcp->mb[4] = MSW(addr);
3253 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3254 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3255 mcp->tov = MBX_TOV_SECONDS;
3257 rval = qla2x00_mailbox_command(vha, mcp);
3259 *data = mcp->mb[2] << 16 | mcp->mb[1];
3261 if (rval != QLA_SUCCESS) {
3262 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3263 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3265 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3266 "Done %s.\n", __func__);
3273 * qla2x00_set_serdes_params() -
3279 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3280 uint16_t sw_em_2g, uint16_t sw_em_4g)
3284 mbx_cmd_t *mcp = &mc;
3286 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3287 "Entered %s.\n", __func__);
3289 mcp->mb[0] = MBC_SERDES_PARAMS;
3291 mcp->mb[2] = sw_em_1g | BIT_15;
3292 mcp->mb[3] = sw_em_2g | BIT_15;
3293 mcp->mb[4] = sw_em_4g | BIT_15;
3294 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3296 mcp->tov = MBX_TOV_SECONDS;
3298 rval = qla2x00_mailbox_command(vha, mcp);
3300 if (rval != QLA_SUCCESS) {
3302 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3303 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3307 "Done %s.\n", __func__);
3314 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3318 mbx_cmd_t *mcp = &mc;
3320 if (!IS_FWI2_CAPABLE(vha->hw))
3321 return QLA_FUNCTION_FAILED;
3323 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3324 "Entered %s.\n", __func__);
3326 mcp->mb[0] = MBC_STOP_FIRMWARE;
3328 mcp->out_mb = MBX_1|MBX_0;
3332 rval = qla2x00_mailbox_command(vha, mcp);
3334 if (rval != QLA_SUCCESS) {
3335 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3336 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3337 rval = QLA_INVALID_COMMAND;
3339 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3340 "Done %s.\n", __func__);
3347 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3352 mbx_cmd_t *mcp = &mc;
3354 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3355 "Entered %s.\n", __func__);
3357 if (!IS_FWI2_CAPABLE(vha->hw))
3358 return QLA_FUNCTION_FAILED;
3360 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3361 return QLA_FUNCTION_FAILED;
3363 mcp->mb[0] = MBC_TRACE_CONTROL;
3364 mcp->mb[1] = TC_EFT_ENABLE;
3365 mcp->mb[2] = LSW(eft_dma);
3366 mcp->mb[3] = MSW(eft_dma);
3367 mcp->mb[4] = LSW(MSD(eft_dma));
3368 mcp->mb[5] = MSW(MSD(eft_dma));
3369 mcp->mb[6] = buffers;
3370 mcp->mb[7] = TC_AEN_DISABLE;
3371 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3372 mcp->in_mb = MBX_1|MBX_0;
3373 mcp->tov = MBX_TOV_SECONDS;
3375 rval = qla2x00_mailbox_command(vha, mcp);
3376 if (rval != QLA_SUCCESS) {
3377 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3378 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3379 rval, mcp->mb[0], mcp->mb[1]);
3381 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3382 "Done %s.\n", __func__);
3389 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3393 mbx_cmd_t *mcp = &mc;
3395 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3396 "Entered %s.\n", __func__);
3398 if (!IS_FWI2_CAPABLE(vha->hw))
3399 return QLA_FUNCTION_FAILED;
3401 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3402 return QLA_FUNCTION_FAILED;
3404 mcp->mb[0] = MBC_TRACE_CONTROL;
3405 mcp->mb[1] = TC_EFT_DISABLE;
3406 mcp->out_mb = MBX_1|MBX_0;
3407 mcp->in_mb = MBX_1|MBX_0;
3408 mcp->tov = MBX_TOV_SECONDS;
3410 rval = qla2x00_mailbox_command(vha, mcp);
3411 if (rval != QLA_SUCCESS) {
3412 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3413 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3414 rval, mcp->mb[0], mcp->mb[1]);
3416 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3417 "Done %s.\n", __func__);
3424 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3425 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3429 mbx_cmd_t *mcp = &mc;
3431 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3432 "Entered %s.\n", __func__);
3434 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3435 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3436 return QLA_FUNCTION_FAILED;
3438 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3439 return QLA_FUNCTION_FAILED;
3441 mcp->mb[0] = MBC_TRACE_CONTROL;
3442 mcp->mb[1] = TC_FCE_ENABLE;
3443 mcp->mb[2] = LSW(fce_dma);
3444 mcp->mb[3] = MSW(fce_dma);
3445 mcp->mb[4] = LSW(MSD(fce_dma));
3446 mcp->mb[5] = MSW(MSD(fce_dma));
3447 mcp->mb[6] = buffers;
3448 mcp->mb[7] = TC_AEN_DISABLE;
3450 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3451 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3452 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3454 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3455 mcp->tov = MBX_TOV_SECONDS;
3457 rval = qla2x00_mailbox_command(vha, mcp);
3458 if (rval != QLA_SUCCESS) {
3459 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3460 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3461 rval, mcp->mb[0], mcp->mb[1]);
3463 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3464 "Done %s.\n", __func__);
3467 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3476 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3480 mbx_cmd_t *mcp = &mc;
3482 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3483 "Entered %s.\n", __func__);
3485 if (!IS_FWI2_CAPABLE(vha->hw))
3486 return QLA_FUNCTION_FAILED;
3488 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3489 return QLA_FUNCTION_FAILED;
3491 mcp->mb[0] = MBC_TRACE_CONTROL;
3492 mcp->mb[1] = TC_FCE_DISABLE;
3493 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3494 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3495 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3497 mcp->tov = MBX_TOV_SECONDS;
3499 rval = qla2x00_mailbox_command(vha, mcp);
3500 if (rval != QLA_SUCCESS) {
3501 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3502 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3503 rval, mcp->mb[0], mcp->mb[1]);
3505 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3506 "Done %s.\n", __func__);
3509 *wr = (uint64_t) mcp->mb[5] << 48 |
3510 (uint64_t) mcp->mb[4] << 32 |
3511 (uint64_t) mcp->mb[3] << 16 |
3512 (uint64_t) mcp->mb[2];
3514 *rd = (uint64_t) mcp->mb[9] << 48 |
3515 (uint64_t) mcp->mb[8] << 32 |
3516 (uint64_t) mcp->mb[7] << 16 |
3517 (uint64_t) mcp->mb[6];
3524 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3525 uint16_t *port_speed, uint16_t *mb)
3529 mbx_cmd_t *mcp = &mc;
3531 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3532 "Entered %s.\n", __func__);
3534 if (!IS_IIDMA_CAPABLE(vha->hw))
3535 return QLA_FUNCTION_FAILED;
3537 mcp->mb[0] = MBC_PORT_PARAMS;
3538 mcp->mb[1] = loop_id;
3539 mcp->mb[2] = mcp->mb[3] = 0;
3540 mcp->mb[9] = vha->vp_idx;
3541 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3542 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3543 mcp->tov = MBX_TOV_SECONDS;
3545 rval = qla2x00_mailbox_command(vha, mcp);
3547 /* Return mailbox statuses. */
3554 if (rval != QLA_SUCCESS) {
3555 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3557 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3558 "Done %s.\n", __func__);
3560 *port_speed = mcp->mb[3];
3567 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3568 uint16_t port_speed, uint16_t *mb)
3572 mbx_cmd_t *mcp = &mc;
3574 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3575 "Entered %s.\n", __func__);
3577 if (!IS_IIDMA_CAPABLE(vha->hw))
3578 return QLA_FUNCTION_FAILED;
3580 mcp->mb[0] = MBC_PORT_PARAMS;
3581 mcp->mb[1] = loop_id;
3583 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3584 mcp->mb[9] = vha->vp_idx;
3585 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3586 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3587 mcp->tov = MBX_TOV_SECONDS;
3589 rval = qla2x00_mailbox_command(vha, mcp);
3591 /* Return mailbox statuses. */
3598 if (rval != QLA_SUCCESS) {
3599 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3600 "Failed=%x.\n", rval);
3602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3603 "Done %s.\n", __func__);
3610 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3611 struct vp_rpt_id_entry_24xx *rptid_entry)
3614 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3615 struct qla_hw_data *ha = vha->hw;
3616 scsi_qla_host_t *vp;
3617 unsigned long flags;
3620 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3621 "Entered %s.\n", __func__);
3623 if (rptid_entry->entry_status != 0)
3626 if (rptid_entry->format == 0) {
3627 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3628 "Format 0 : Number of VPs setup %d, number of "
3629 "VPs acquired %d.\n",
3630 MSB(le16_to_cpu(rptid_entry->vp_count)),
3631 LSB(le16_to_cpu(rptid_entry->vp_count)));
3632 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3633 "Primary port id %02x%02x%02x.\n",
3634 rptid_entry->port_id[2], rptid_entry->port_id[1],
3635 rptid_entry->port_id[0]);
3636 } else if (rptid_entry->format == 1) {
3638 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3639 "Format 1: VP[%d] enabled - status %d - with "
3640 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3641 rptid_entry->port_id[2], rptid_entry->port_id[1],
3642 rptid_entry->port_id[0]);
3644 /* buffer to buffer credit flag */
3645 vha->flags.bbcr_enable = (rptid_entry->bbcr & 0xf) != 0;
3647 /* FA-WWN is only for physical port */
3649 void *wwpn = ha->init_cb->port_name;
3652 if (rptid_entry->vp_idx_map[1] & BIT_6)
3653 wwpn = rptid_entry->reserved_4 + 8;
3655 memcpy(vha->port_name, wwpn, WWN_SIZE);
3656 fc_host_port_name(vha->host) =
3657 wwn_to_u64(vha->port_name);
3658 ql_dbg(ql_dbg_mbx, vha, 0x1018,
3659 "FA-WWN portname %016llx (%x)\n",
3660 fc_host_port_name(vha->host), MSB(stat));
3667 if (MSB(stat) != 0 && MSB(stat) != 2) {
3668 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3669 "Could not acquire ID for VP[%d].\n", vp_idx);
3674 spin_lock_irqsave(&ha->vport_slock, flags);
3675 list_for_each_entry(vp, &ha->vp_list, list) {
3676 if (vp_idx == vp->vp_idx) {
3681 spin_unlock_irqrestore(&ha->vport_slock, flags);
3686 vp->d_id.b.domain = rptid_entry->port_id[2];
3687 vp->d_id.b.area = rptid_entry->port_id[1];
3688 vp->d_id.b.al_pa = rptid_entry->port_id[0];
3691 * Cannot configure here as we are still sitting on the
3692 * response queue. Handle it in dpc context.
3694 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3697 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3698 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3699 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3700 qla2xxx_wake_dpc(vha);
3705 * qla24xx_modify_vp_config
3706 * Change VP configuration for vha
3709 * vha = adapter block pointer.
3712 * qla2xxx local function return status code.
3718 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3721 struct vp_config_entry_24xx *vpmod;
3722 dma_addr_t vpmod_dma;
3723 struct qla_hw_data *ha = vha->hw;
3724 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3726 /* This can be called by the parent */
3728 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3729 "Entered %s.\n", __func__);
3731 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3733 ql_log(ql_log_warn, vha, 0x10bc,
3734 "Failed to allocate modify VP IOCB.\n");
3735 return QLA_MEMORY_ALLOC_FAILED;
3738 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3739 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3740 vpmod->entry_count = 1;
3741 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3742 vpmod->vp_count = 1;
3743 vpmod->vp_index1 = vha->vp_idx;
3744 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3746 qlt_modify_vp_config(vha, vpmod);
3748 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3749 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3750 vpmod->entry_count = 1;
3752 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3753 if (rval != QLA_SUCCESS) {
3754 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3755 "Failed to issue VP config IOCB (%x).\n", rval);
3756 } else if (vpmod->comp_status != 0) {
3757 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3758 "Failed to complete IOCB -- error status (%x).\n",
3759 vpmod->comp_status);
3760 rval = QLA_FUNCTION_FAILED;
3761 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
3762 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3763 "Failed to complete IOCB -- completion status (%x).\n",
3764 le16_to_cpu(vpmod->comp_status));
3765 rval = QLA_FUNCTION_FAILED;
3768 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3769 "Done %s.\n", __func__);
3770 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3772 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3778 * qla24xx_control_vp
3779 * Enable a virtual port for given host
3782 * ha = adapter block pointer.
3783 * vhba = virtual adapter (unused)
3784 * index = index number for enabled VP
3787 * qla2xxx local function return status code.
3793 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3797 struct vp_ctrl_entry_24xx *vce;
3799 struct qla_hw_data *ha = vha->hw;
3800 int vp_index = vha->vp_idx;
3801 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3803 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3804 "Entered %s enabling index %d.\n", __func__, vp_index);
3806 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3807 return QLA_PARAMETER_ERROR;
3809 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3811 ql_log(ql_log_warn, vha, 0x10c2,
3812 "Failed to allocate VP control IOCB.\n");
3813 return QLA_MEMORY_ALLOC_FAILED;
3815 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3817 vce->entry_type = VP_CTRL_IOCB_TYPE;
3818 vce->entry_count = 1;
3819 vce->command = cpu_to_le16(cmd);
3820 vce->vp_count = cpu_to_le16(1);
3822 /* index map in firmware starts with 1; decrement index
3823 * this is ok as we never use index 0
3825 map = (vp_index - 1) / 8;
3826 pos = (vp_index - 1) & 7;
3827 mutex_lock(&ha->vport_lock);
3828 vce->vp_idx_map[map] |= 1 << pos;
3829 mutex_unlock(&ha->vport_lock);
3831 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3832 if (rval != QLA_SUCCESS) {
3833 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3834 "Failed to issue VP control IOCB (%x).\n", rval);
3835 } else if (vce->entry_status != 0) {
3836 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3837 "Failed to complete IOCB -- error status (%x).\n",
3839 rval = QLA_FUNCTION_FAILED;
3840 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
3841 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3842 "Failed to complet IOCB -- completion status (%x).\n",
3843 le16_to_cpu(vce->comp_status));
3844 rval = QLA_FUNCTION_FAILED;
3846 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3847 "Done %s.\n", __func__);
3850 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3856 * qla2x00_send_change_request
3857 * Receive or disable RSCN request from fabric controller
3860 * ha = adapter block pointer
3861 * format = registration format:
3863 * 1 - Fabric detected registration
3864 * 2 - N_port detected registration
3865 * 3 - Full registration
3866 * FF - clear registration
3867 * vp_idx = Virtual port index
3870 * qla2x00 local function return status code.
3877 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3882 mbx_cmd_t *mcp = &mc;
3884 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3885 "Entered %s.\n", __func__);
3887 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3888 mcp->mb[1] = format;
3889 mcp->mb[9] = vp_idx;
3890 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3891 mcp->in_mb = MBX_0|MBX_1;
3892 mcp->tov = MBX_TOV_SECONDS;
3894 rval = qla2x00_mailbox_command(vha, mcp);
3896 if (rval == QLA_SUCCESS) {
3897 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3907 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3912 mbx_cmd_t *mcp = &mc;
3914 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3915 "Entered %s.\n", __func__);
3917 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3918 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3919 mcp->mb[8] = MSW(addr);
3920 mcp->out_mb = MBX_8|MBX_0;
3922 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3923 mcp->out_mb = MBX_0;
3925 mcp->mb[1] = LSW(addr);
3926 mcp->mb[2] = MSW(req_dma);
3927 mcp->mb[3] = LSW(req_dma);
3928 mcp->mb[6] = MSW(MSD(req_dma));
3929 mcp->mb[7] = LSW(MSD(req_dma));
3930 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3931 if (IS_FWI2_CAPABLE(vha->hw)) {
3932 mcp->mb[4] = MSW(size);
3933 mcp->mb[5] = LSW(size);
3934 mcp->out_mb |= MBX_5|MBX_4;
3936 mcp->mb[4] = LSW(size);
3937 mcp->out_mb |= MBX_4;
3941 mcp->tov = MBX_TOV_SECONDS;
3943 rval = qla2x00_mailbox_command(vha, mcp);
3945 if (rval != QLA_SUCCESS) {
3946 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3947 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3949 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3950 "Done %s.\n", __func__);
3955 /* 84XX Support **************************************************************/
3957 struct cs84xx_mgmt_cmd {
3959 struct verify_chip_entry_84xx req;
3960 struct verify_chip_rsp_84xx rsp;
3965 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3968 struct cs84xx_mgmt_cmd *mn;
3971 unsigned long flags;
3972 struct qla_hw_data *ha = vha->hw;
3974 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3975 "Entered %s.\n", __func__);
3977 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3979 return QLA_MEMORY_ALLOC_FAILED;
3983 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3984 /* Diagnostic firmware? */
3985 /* options |= MENLO_DIAG_FW; */
3986 /* We update the firmware with only one data sequence. */
3987 options |= VCO_END_OF_DATA;
3991 memset(mn, 0, sizeof(*mn));
3992 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3993 mn->p.req.entry_count = 1;
3994 mn->p.req.options = cpu_to_le16(options);
3996 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3997 "Dump of Verify Request.\n");
3998 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3999 (uint8_t *)mn, sizeof(*mn));
4001 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4002 if (rval != QLA_SUCCESS) {
4003 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
4004 "Failed to issue verify IOCB (%x).\n", rval);
4008 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
4009 "Dump of Verify Response.\n");
4010 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
4011 (uint8_t *)mn, sizeof(*mn));
4013 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
4014 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
4015 le16_to_cpu(mn->p.rsp.failure_code) : 0;
4016 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4017 "cs=%x fc=%x.\n", status[0], status[1]);
4019 if (status[0] != CS_COMPLETE) {
4020 rval = QLA_FUNCTION_FAILED;
4021 if (!(options & VCO_DONT_UPDATE_FW)) {
4022 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
4023 "Firmware update failed. Retrying "
4024 "without update firmware.\n");
4025 options |= VCO_DONT_UPDATE_FW;
4026 options &= ~VCO_FORCE_UPDATE;
4030 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4031 "Firmware updated to %x.\n",
4032 le32_to_cpu(mn->p.rsp.fw_ver));
4034 /* NOTE: we only update OP firmware. */
4035 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4036 ha->cs84xx->op_fw_version =
4037 le32_to_cpu(mn->p.rsp.fw_ver);
4038 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4044 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4046 if (rval != QLA_SUCCESS) {
4047 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4048 "Failed=%x.\n", rval);
4050 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4051 "Done %s.\n", __func__);
4058 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4061 unsigned long flags;
4063 mbx_cmd_t *mcp = &mc;
4064 struct qla_hw_data *ha = vha->hw;
4066 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4067 "Entered %s.\n", __func__);
4069 if (IS_SHADOW_REG_CAPABLE(ha))
4070 req->options |= BIT_13;
4072 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4073 mcp->mb[1] = req->options;
4074 mcp->mb[2] = MSW(LSD(req->dma));
4075 mcp->mb[3] = LSW(LSD(req->dma));
4076 mcp->mb[6] = MSW(MSD(req->dma));
4077 mcp->mb[7] = LSW(MSD(req->dma));
4078 mcp->mb[5] = req->length;
4080 mcp->mb[10] = req->rsp->id;
4081 mcp->mb[12] = req->qos;
4082 mcp->mb[11] = req->vp_idx;
4083 mcp->mb[13] = req->rid;
4084 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4087 mcp->mb[4] = req->id;
4088 /* que in ptr index */
4090 /* que out ptr index */
4091 mcp->mb[9] = *req->out_ptr = 0;
4092 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4093 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4095 mcp->flags = MBX_DMA_OUT;
4096 mcp->tov = MBX_TOV_SECONDS * 2;
4098 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
4099 mcp->in_mb |= MBX_1;
4100 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4101 mcp->out_mb |= MBX_15;
4102 /* debug q create issue in SR-IOV */
4103 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4106 spin_lock_irqsave(&ha->hardware_lock, flags);
4107 if (!(req->options & BIT_0)) {
4108 WRT_REG_DWORD(req->req_q_in, 0);
4109 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4110 WRT_REG_DWORD(req->req_q_out, 0);
4112 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4114 rval = qla2x00_mailbox_command(vha, mcp);
4115 if (rval != QLA_SUCCESS) {
4116 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4117 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4119 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4120 "Done %s.\n", __func__);
4127 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4130 unsigned long flags;
4132 mbx_cmd_t *mcp = &mc;
4133 struct qla_hw_data *ha = vha->hw;
4135 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4136 "Entered %s.\n", __func__);
4138 if (IS_SHADOW_REG_CAPABLE(ha))
4139 rsp->options |= BIT_13;
4141 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4142 mcp->mb[1] = rsp->options;
4143 mcp->mb[2] = MSW(LSD(rsp->dma));
4144 mcp->mb[3] = LSW(LSD(rsp->dma));
4145 mcp->mb[6] = MSW(MSD(rsp->dma));
4146 mcp->mb[7] = LSW(MSD(rsp->dma));
4147 mcp->mb[5] = rsp->length;
4148 mcp->mb[14] = rsp->msix->entry;
4149 mcp->mb[13] = rsp->rid;
4150 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4153 mcp->mb[4] = rsp->id;
4154 /* que in ptr index */
4155 mcp->mb[8] = *rsp->in_ptr = 0;
4156 /* que out ptr index */
4158 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4159 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4161 mcp->flags = MBX_DMA_OUT;
4162 mcp->tov = MBX_TOV_SECONDS * 2;
4164 if (IS_QLA81XX(ha)) {
4165 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4166 mcp->in_mb |= MBX_1;
4167 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4168 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4169 mcp->in_mb |= MBX_1;
4170 /* debug q create issue in SR-IOV */
4171 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4174 spin_lock_irqsave(&ha->hardware_lock, flags);
4175 if (!(rsp->options & BIT_0)) {
4176 WRT_REG_DWORD(rsp->rsp_q_out, 0);
4177 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4178 WRT_REG_DWORD(rsp->rsp_q_in, 0);
4181 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4183 rval = qla2x00_mailbox_command(vha, mcp);
4184 if (rval != QLA_SUCCESS) {
4185 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4186 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4188 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4189 "Done %s.\n", __func__);
4196 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4200 mbx_cmd_t *mcp = &mc;
4202 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4203 "Entered %s.\n", __func__);
4205 mcp->mb[0] = MBC_IDC_ACK;
4206 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4207 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4209 mcp->tov = MBX_TOV_SECONDS;
4211 rval = qla2x00_mailbox_command(vha, mcp);
4213 if (rval != QLA_SUCCESS) {
4214 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4215 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4217 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4218 "Done %s.\n", __func__);
4225 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4229 mbx_cmd_t *mcp = &mc;
4231 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4232 "Entered %s.\n", __func__);
4234 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4235 !IS_QLA27XX(vha->hw))
4236 return QLA_FUNCTION_FAILED;
4238 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4239 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4240 mcp->out_mb = MBX_1|MBX_0;
4241 mcp->in_mb = MBX_1|MBX_0;
4242 mcp->tov = MBX_TOV_SECONDS;
4244 rval = qla2x00_mailbox_command(vha, mcp);
4246 if (rval != QLA_SUCCESS) {
4247 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4248 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4249 rval, mcp->mb[0], mcp->mb[1]);
4251 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4252 "Done %s.\n", __func__);
4253 *sector_size = mcp->mb[1];
4260 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4264 mbx_cmd_t *mcp = &mc;
4266 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4267 !IS_QLA27XX(vha->hw))
4268 return QLA_FUNCTION_FAILED;
4270 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4271 "Entered %s.\n", __func__);
4273 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4274 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4275 FAC_OPT_CMD_WRITE_PROTECT;
4276 mcp->out_mb = MBX_1|MBX_0;
4277 mcp->in_mb = MBX_1|MBX_0;
4278 mcp->tov = MBX_TOV_SECONDS;
4280 rval = qla2x00_mailbox_command(vha, mcp);
4282 if (rval != QLA_SUCCESS) {
4283 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4284 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4285 rval, mcp->mb[0], mcp->mb[1]);
4287 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4288 "Done %s.\n", __func__);
4295 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4299 mbx_cmd_t *mcp = &mc;
4301 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4302 !IS_QLA27XX(vha->hw))
4303 return QLA_FUNCTION_FAILED;
4305 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4306 "Entered %s.\n", __func__);
4308 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4309 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4310 mcp->mb[2] = LSW(start);
4311 mcp->mb[3] = MSW(start);
4312 mcp->mb[4] = LSW(finish);
4313 mcp->mb[5] = MSW(finish);
4314 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4315 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4316 mcp->tov = MBX_TOV_SECONDS;
4318 rval = qla2x00_mailbox_command(vha, mcp);
4320 if (rval != QLA_SUCCESS) {
4321 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4322 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4323 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4325 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4326 "Done %s.\n", __func__);
4333 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4337 mbx_cmd_t *mcp = &mc;
4339 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4340 "Entered %s.\n", __func__);
4342 mcp->mb[0] = MBC_RESTART_MPI_FW;
4343 mcp->out_mb = MBX_0;
4344 mcp->in_mb = MBX_0|MBX_1;
4345 mcp->tov = MBX_TOV_SECONDS;
4347 rval = qla2x00_mailbox_command(vha, mcp);
4349 if (rval != QLA_SUCCESS) {
4350 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4351 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4352 rval, mcp->mb[0], mcp->mb[1]);
4354 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4355 "Done %s.\n", __func__);
4362 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4366 mbx_cmd_t *mcp = &mc;
4370 struct qla_hw_data *ha = vha->hw;
4372 if (!IS_P3P_TYPE(ha))
4373 return QLA_FUNCTION_FAILED;
4375 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4376 "Entered %s.\n", __func__);
4378 str = (void *)version;
4379 len = strlen(version);
4381 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4382 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4383 mcp->out_mb = MBX_1|MBX_0;
4384 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4385 mcp->mb[i] = cpu_to_le16p(str);
4386 mcp->out_mb |= 1<<i;
4388 for (; i < 16; i++) {
4390 mcp->out_mb |= 1<<i;
4392 mcp->in_mb = MBX_1|MBX_0;
4393 mcp->tov = MBX_TOV_SECONDS;
4395 rval = qla2x00_mailbox_command(vha, mcp);
4397 if (rval != QLA_SUCCESS) {
4398 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4399 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4402 "Done %s.\n", __func__);
4409 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4413 mbx_cmd_t *mcp = &mc;
4418 struct qla_hw_data *ha = vha->hw;
4420 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4422 return QLA_FUNCTION_FAILED;
4424 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4425 "Entered %s.\n", __func__);
4427 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4429 ql_log(ql_log_warn, vha, 0x117f,
4430 "Failed to allocate driver version param.\n");
4431 return QLA_MEMORY_ALLOC_FAILED;
4434 memcpy(str, "\x7\x3\x11\x0", 4);
4436 len = dwlen * 4 - 4;
4437 memset(str + 4, 0, len);
4438 if (len > strlen(version))
4439 len = strlen(version);
4440 memcpy(str + 4, version, len);
4442 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4443 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4444 mcp->mb[2] = MSW(LSD(str_dma));
4445 mcp->mb[3] = LSW(LSD(str_dma));
4446 mcp->mb[6] = MSW(MSD(str_dma));
4447 mcp->mb[7] = LSW(MSD(str_dma));
4448 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4449 mcp->in_mb = MBX_1|MBX_0;
4450 mcp->tov = MBX_TOV_SECONDS;
4452 rval = qla2x00_mailbox_command(vha, mcp);
4454 if (rval != QLA_SUCCESS) {
4455 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4456 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4458 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4459 "Done %s.\n", __func__);
4462 dma_pool_free(ha->s_dma_pool, str, str_dma);
4468 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4472 mbx_cmd_t *mcp = &mc;
4474 if (!IS_FWI2_CAPABLE(vha->hw))
4475 return QLA_FUNCTION_FAILED;
4477 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4478 "Entered %s.\n", __func__);
4480 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4481 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4482 mcp->out_mb = MBX_1|MBX_0;
4483 mcp->in_mb = MBX_1|MBX_0;
4484 mcp->tov = MBX_TOV_SECONDS;
4486 rval = qla2x00_mailbox_command(vha, mcp);
4489 if (rval != QLA_SUCCESS) {
4490 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4491 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4493 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4494 "Done %s.\n", __func__);
4501 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4502 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4506 mbx_cmd_t *mcp = &mc;
4507 struct qla_hw_data *ha = vha->hw;
4509 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4510 "Entered %s.\n", __func__);
4512 if (!IS_FWI2_CAPABLE(ha))
4513 return QLA_FUNCTION_FAILED;
4518 mcp->mb[0] = MBC_READ_SFP;
4520 mcp->mb[2] = MSW(sfp_dma);
4521 mcp->mb[3] = LSW(sfp_dma);
4522 mcp->mb[6] = MSW(MSD(sfp_dma));
4523 mcp->mb[7] = LSW(MSD(sfp_dma));
4527 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4528 mcp->in_mb = MBX_1|MBX_0;
4529 mcp->tov = MBX_TOV_SECONDS;
4531 rval = qla2x00_mailbox_command(vha, mcp);
4536 if (rval != QLA_SUCCESS) {
4537 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4538 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4540 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4541 "Done %s.\n", __func__);
4548 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4549 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4553 mbx_cmd_t *mcp = &mc;
4554 struct qla_hw_data *ha = vha->hw;
4556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4557 "Entered %s.\n", __func__);
4559 if (!IS_FWI2_CAPABLE(ha))
4560 return QLA_FUNCTION_FAILED;
4568 mcp->mb[0] = MBC_WRITE_SFP;
4570 mcp->mb[2] = MSW(sfp_dma);
4571 mcp->mb[3] = LSW(sfp_dma);
4572 mcp->mb[6] = MSW(MSD(sfp_dma));
4573 mcp->mb[7] = LSW(MSD(sfp_dma));
4577 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4578 mcp->in_mb = MBX_1|MBX_0;
4579 mcp->tov = MBX_TOV_SECONDS;
4581 rval = qla2x00_mailbox_command(vha, mcp);
4583 if (rval != QLA_SUCCESS) {
4584 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4585 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4587 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4588 "Done %s.\n", __func__);
4595 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4596 uint16_t size_in_bytes, uint16_t *actual_size)
4600 mbx_cmd_t *mcp = &mc;
4602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4603 "Entered %s.\n", __func__);
4605 if (!IS_CNA_CAPABLE(vha->hw))
4606 return QLA_FUNCTION_FAILED;
4608 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4609 mcp->mb[2] = MSW(stats_dma);
4610 mcp->mb[3] = LSW(stats_dma);
4611 mcp->mb[6] = MSW(MSD(stats_dma));
4612 mcp->mb[7] = LSW(MSD(stats_dma));
4613 mcp->mb[8] = size_in_bytes >> 2;
4614 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4615 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4616 mcp->tov = MBX_TOV_SECONDS;
4618 rval = qla2x00_mailbox_command(vha, mcp);
4620 if (rval != QLA_SUCCESS) {
4621 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4622 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4623 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4625 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4626 "Done %s.\n", __func__);
4629 *actual_size = mcp->mb[2] << 2;
4636 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4641 mbx_cmd_t *mcp = &mc;
4643 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4644 "Entered %s.\n", __func__);
4646 if (!IS_CNA_CAPABLE(vha->hw))
4647 return QLA_FUNCTION_FAILED;
4649 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4651 mcp->mb[2] = MSW(tlv_dma);
4652 mcp->mb[3] = LSW(tlv_dma);
4653 mcp->mb[6] = MSW(MSD(tlv_dma));
4654 mcp->mb[7] = LSW(MSD(tlv_dma));
4656 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4657 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4658 mcp->tov = MBX_TOV_SECONDS;
4660 rval = qla2x00_mailbox_command(vha, mcp);
4662 if (rval != QLA_SUCCESS) {
4663 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4664 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4665 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4667 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4668 "Done %s.\n", __func__);
4675 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4679 mbx_cmd_t *mcp = &mc;
4681 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4682 "Entered %s.\n", __func__);
4684 if (!IS_FWI2_CAPABLE(vha->hw))
4685 return QLA_FUNCTION_FAILED;
4687 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4688 mcp->mb[1] = LSW(risc_addr);
4689 mcp->mb[8] = MSW(risc_addr);
4690 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4691 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4694 rval = qla2x00_mailbox_command(vha, mcp);
4695 if (rval != QLA_SUCCESS) {
4696 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4697 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4699 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4700 "Done %s.\n", __func__);
4701 *data = mcp->mb[3] << 16 | mcp->mb[2];
4708 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4713 mbx_cmd_t *mcp = &mc;
4715 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4716 "Entered %s.\n", __func__);
4718 memset(mcp->mb, 0 , sizeof(mcp->mb));
4719 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4720 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4722 /* transfer count */
4723 mcp->mb[10] = LSW(mreq->transfer_size);
4724 mcp->mb[11] = MSW(mreq->transfer_size);
4726 /* send data address */
4727 mcp->mb[14] = LSW(mreq->send_dma);
4728 mcp->mb[15] = MSW(mreq->send_dma);
4729 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4730 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4732 /* receive data address */
4733 mcp->mb[16] = LSW(mreq->rcv_dma);
4734 mcp->mb[17] = MSW(mreq->rcv_dma);
4735 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4736 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4738 /* Iteration count */
4739 mcp->mb[18] = LSW(mreq->iteration_count);
4740 mcp->mb[19] = MSW(mreq->iteration_count);
4742 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4743 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4744 if (IS_CNA_CAPABLE(vha->hw))
4745 mcp->out_mb |= MBX_2;
4746 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4748 mcp->buf_size = mreq->transfer_size;
4749 mcp->tov = MBX_TOV_SECONDS;
4750 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4752 rval = qla2x00_mailbox_command(vha, mcp);
4754 if (rval != QLA_SUCCESS) {
4755 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4756 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4757 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4758 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4760 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4761 "Done %s.\n", __func__);
4764 /* Copy mailbox information */
4765 memcpy( mresp, mcp->mb, 64);
4770 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4775 mbx_cmd_t *mcp = &mc;
4776 struct qla_hw_data *ha = vha->hw;
4778 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4779 "Entered %s.\n", __func__);
4781 memset(mcp->mb, 0 , sizeof(mcp->mb));
4782 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4783 /* BIT_6 specifies 64bit address */
4784 mcp->mb[1] = mreq->options | BIT_15 | BIT_6;
4785 if (IS_CNA_CAPABLE(ha)) {
4786 mcp->mb[2] = vha->fcoe_fcf_idx;
4788 mcp->mb[16] = LSW(mreq->rcv_dma);
4789 mcp->mb[17] = MSW(mreq->rcv_dma);
4790 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4791 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4793 mcp->mb[10] = LSW(mreq->transfer_size);
4795 mcp->mb[14] = LSW(mreq->send_dma);
4796 mcp->mb[15] = MSW(mreq->send_dma);
4797 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4798 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4800 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4801 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4802 if (IS_CNA_CAPABLE(ha))
4803 mcp->out_mb |= MBX_2;
4806 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4807 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4808 mcp->in_mb |= MBX_1;
4809 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4810 mcp->in_mb |= MBX_3;
4812 mcp->tov = MBX_TOV_SECONDS;
4813 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4814 mcp->buf_size = mreq->transfer_size;
4816 rval = qla2x00_mailbox_command(vha, mcp);
4818 if (rval != QLA_SUCCESS) {
4819 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4820 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4821 rval, mcp->mb[0], mcp->mb[1]);
4823 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4824 "Done %s.\n", __func__);
4827 /* Copy mailbox information */
4828 memcpy(mresp, mcp->mb, 64);
4833 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4837 mbx_cmd_t *mcp = &mc;
4839 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4840 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4842 mcp->mb[0] = MBC_ISP84XX_RESET;
4843 mcp->mb[1] = enable_diagnostic;
4844 mcp->out_mb = MBX_1|MBX_0;
4845 mcp->in_mb = MBX_1|MBX_0;
4846 mcp->tov = MBX_TOV_SECONDS;
4847 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4848 rval = qla2x00_mailbox_command(vha, mcp);
4850 if (rval != QLA_SUCCESS)
4851 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4854 "Done %s.\n", __func__);
4860 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4864 mbx_cmd_t *mcp = &mc;
4866 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4867 "Entered %s.\n", __func__);
4869 if (!IS_FWI2_CAPABLE(vha->hw))
4870 return QLA_FUNCTION_FAILED;
4872 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4873 mcp->mb[1] = LSW(risc_addr);
4874 mcp->mb[2] = LSW(data);
4875 mcp->mb[3] = MSW(data);
4876 mcp->mb[8] = MSW(risc_addr);
4877 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4881 rval = qla2x00_mailbox_command(vha, mcp);
4882 if (rval != QLA_SUCCESS) {
4883 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4884 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4886 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4887 "Done %s.\n", __func__);
4894 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4897 uint32_t stat, timer;
4899 struct qla_hw_data *ha = vha->hw;
4900 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4904 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4905 "Entered %s.\n", __func__);
4907 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4909 /* Write the MBC data to the registers */
4910 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
4911 WRT_REG_WORD(®->mailbox1, mb[0]);
4912 WRT_REG_WORD(®->mailbox2, mb[1]);
4913 WRT_REG_WORD(®->mailbox3, mb[2]);
4914 WRT_REG_WORD(®->mailbox4, mb[3]);
4916 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
4918 /* Poll for MBC interrupt */
4919 for (timer = 6000000; timer; timer--) {
4920 /* Check for pending interrupts. */
4921 stat = RD_REG_DWORD(®->host_status);
4922 if (stat & HSRX_RISC_INT) {
4925 if (stat == 0x1 || stat == 0x2 ||
4926 stat == 0x10 || stat == 0x11) {
4927 set_bit(MBX_INTERRUPT,
4928 &ha->mbx_cmd_flags);
4929 mb0 = RD_REG_WORD(®->mailbox0);
4930 WRT_REG_DWORD(®->hccr,
4931 HCCRX_CLR_RISC_INT);
4932 RD_REG_DWORD(®->hccr);
4939 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4940 rval = mb0 & MBS_MASK;
4942 rval = QLA_FUNCTION_FAILED;
4944 if (rval != QLA_SUCCESS) {
4945 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4946 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4948 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4949 "Done %s.\n", __func__);
4956 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4960 mbx_cmd_t *mcp = &mc;
4961 struct qla_hw_data *ha = vha->hw;
4963 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4964 "Entered %s.\n", __func__);
4966 if (!IS_FWI2_CAPABLE(ha))
4967 return QLA_FUNCTION_FAILED;
4969 mcp->mb[0] = MBC_DATA_RATE;
4971 mcp->out_mb = MBX_1|MBX_0;
4972 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4973 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4974 mcp->in_mb |= MBX_3;
4975 mcp->tov = MBX_TOV_SECONDS;
4977 rval = qla2x00_mailbox_command(vha, mcp);
4978 if (rval != QLA_SUCCESS) {
4979 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4980 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4982 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4983 "Done %s.\n", __func__);
4984 if (mcp->mb[1] != 0x7)
4985 ha->link_data_rate = mcp->mb[1];
4992 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4996 mbx_cmd_t *mcp = &mc;
4997 struct qla_hw_data *ha = vha->hw;
4999 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
5000 "Entered %s.\n", __func__);
5002 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
5004 return QLA_FUNCTION_FAILED;
5005 mcp->mb[0] = MBC_GET_PORT_CONFIG;
5006 mcp->out_mb = MBX_0;
5007 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5008 mcp->tov = MBX_TOV_SECONDS;
5011 rval = qla2x00_mailbox_command(vha, mcp);
5013 if (rval != QLA_SUCCESS) {
5014 ql_dbg(ql_dbg_mbx, vha, 0x110a,
5015 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5017 /* Copy all bits to preserve original value */
5018 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
5020 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
5021 "Done %s.\n", __func__);
5027 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5031 mbx_cmd_t *mcp = &mc;
5033 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5034 "Entered %s.\n", __func__);
5036 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5037 /* Copy all bits to preserve original setting */
5038 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5039 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5041 mcp->tov = MBX_TOV_SECONDS;
5043 rval = qla2x00_mailbox_command(vha, mcp);
5045 if (rval != QLA_SUCCESS) {
5046 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5047 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5049 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5050 "Done %s.\n", __func__);
5057 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5062 mbx_cmd_t *mcp = &mc;
5063 struct qla_hw_data *ha = vha->hw;
5065 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5066 "Entered %s.\n", __func__);
5068 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5069 return QLA_FUNCTION_FAILED;
5071 mcp->mb[0] = MBC_PORT_PARAMS;
5072 mcp->mb[1] = loop_id;
5073 if (ha->flags.fcp_prio_enabled)
5077 mcp->mb[4] = priority & 0xf;
5078 mcp->mb[9] = vha->vp_idx;
5079 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5080 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5083 rval = qla2x00_mailbox_command(vha, mcp);
5091 if (rval != QLA_SUCCESS) {
5092 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5094 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5095 "Done %s.\n", __func__);
5102 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5104 int rval = QLA_FUNCTION_FAILED;
5105 struct qla_hw_data *ha = vha->hw;
5108 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5109 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5110 "Thermal not supported by this card.\n");
5114 if (IS_QLA25XX(ha)) {
5115 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5116 ha->pdev->subsystem_device == 0x0175) {
5117 rval = qla2x00_read_sfp(vha, 0, &byte,
5118 0x98, 0x1, 1, BIT_13|BIT_0);
5122 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5123 ha->pdev->subsystem_device == 0x338e) {
5124 rval = qla2x00_read_sfp(vha, 0, &byte,
5125 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5129 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5130 "Thermal not supported by this card.\n");
5134 if (IS_QLA82XX(ha)) {
5135 *temp = qla82xx_read_temperature(vha);
5138 } else if (IS_QLA8044(ha)) {
5139 *temp = qla8044_read_temperature(vha);
5144 rval = qla2x00_read_asic_temperature(vha, temp);
5149 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5152 struct qla_hw_data *ha = vha->hw;
5154 mbx_cmd_t *mcp = &mc;
5156 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5157 "Entered %s.\n", __func__);
5159 if (!IS_FWI2_CAPABLE(ha))
5160 return QLA_FUNCTION_FAILED;
5162 memset(mcp, 0, sizeof(mbx_cmd_t));
5163 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5166 mcp->out_mb = MBX_1|MBX_0;
5171 rval = qla2x00_mailbox_command(vha, mcp);
5172 if (rval != QLA_SUCCESS) {
5173 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5174 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5176 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5177 "Done %s.\n", __func__);
5184 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5187 struct qla_hw_data *ha = vha->hw;
5189 mbx_cmd_t *mcp = &mc;
5191 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5192 "Entered %s.\n", __func__);
5194 if (!IS_P3P_TYPE(ha))
5195 return QLA_FUNCTION_FAILED;
5197 memset(mcp, 0, sizeof(mbx_cmd_t));
5198 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5201 mcp->out_mb = MBX_1|MBX_0;
5206 rval = qla2x00_mailbox_command(vha, mcp);
5207 if (rval != QLA_SUCCESS) {
5208 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5209 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5211 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5212 "Done %s.\n", __func__);
5219 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5221 struct qla_hw_data *ha = vha->hw;
5223 mbx_cmd_t *mcp = &mc;
5224 int rval = QLA_FUNCTION_FAILED;
5226 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5227 "Entered %s.\n", __func__);
5229 memset(mcp->mb, 0 , sizeof(mcp->mb));
5230 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5231 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5232 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5233 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5235 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5236 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5237 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5239 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5240 mcp->tov = MBX_TOV_SECONDS;
5241 rval = qla2x00_mailbox_command(vha, mcp);
5243 /* Always copy back return mailbox values. */
5244 if (rval != QLA_SUCCESS) {
5245 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5246 "mailbox command FAILED=0x%x, subcode=%x.\n",
5247 (mcp->mb[1] << 16) | mcp->mb[0],
5248 (mcp->mb[3] << 16) | mcp->mb[2]);
5250 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5251 "Done %s.\n", __func__);
5252 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5253 if (!ha->md_template_size) {
5254 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5255 "Null template size obtained.\n");
5256 rval = QLA_FUNCTION_FAILED;
5263 qla82xx_md_get_template(scsi_qla_host_t *vha)
5265 struct qla_hw_data *ha = vha->hw;
5267 mbx_cmd_t *mcp = &mc;
5268 int rval = QLA_FUNCTION_FAILED;
5270 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5271 "Entered %s.\n", __func__);
5273 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5274 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5275 if (!ha->md_tmplt_hdr) {
5276 ql_log(ql_log_warn, vha, 0x1124,
5277 "Unable to allocate memory for Minidump template.\n");
5281 memset(mcp->mb, 0 , sizeof(mcp->mb));
5282 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5283 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5284 mcp->mb[2] = LSW(RQST_TMPLT);
5285 mcp->mb[3] = MSW(RQST_TMPLT);
5286 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5287 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5288 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5289 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5290 mcp->mb[8] = LSW(ha->md_template_size);
5291 mcp->mb[9] = MSW(ha->md_template_size);
5293 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5294 mcp->tov = MBX_TOV_SECONDS;
5295 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5296 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5297 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5298 rval = qla2x00_mailbox_command(vha, mcp);
5300 if (rval != QLA_SUCCESS) {
5301 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5302 "mailbox command FAILED=0x%x, subcode=%x.\n",
5303 ((mcp->mb[1] << 16) | mcp->mb[0]),
5304 ((mcp->mb[3] << 16) | mcp->mb[2]));
5306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5307 "Done %s.\n", __func__);
5312 qla8044_md_get_template(scsi_qla_host_t *vha)
5314 struct qla_hw_data *ha = vha->hw;
5316 mbx_cmd_t *mcp = &mc;
5317 int rval = QLA_FUNCTION_FAILED;
5318 int offset = 0, size = MINIDUMP_SIZE_36K;
5319 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5320 "Entered %s.\n", __func__);
5322 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5323 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5324 if (!ha->md_tmplt_hdr) {
5325 ql_log(ql_log_warn, vha, 0xb11b,
5326 "Unable to allocate memory for Minidump template.\n");
5330 memset(mcp->mb, 0 , sizeof(mcp->mb));
5331 while (offset < ha->md_template_size) {
5332 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5333 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5334 mcp->mb[2] = LSW(RQST_TMPLT);
5335 mcp->mb[3] = MSW(RQST_TMPLT);
5336 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5337 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5338 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5339 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5340 mcp->mb[8] = LSW(size);
5341 mcp->mb[9] = MSW(size);
5342 mcp->mb[10] = offset & 0x0000FFFF;
5343 mcp->mb[11] = offset & 0xFFFF0000;
5344 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5345 mcp->tov = MBX_TOV_SECONDS;
5346 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5347 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5348 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5349 rval = qla2x00_mailbox_command(vha, mcp);
5351 if (rval != QLA_SUCCESS) {
5352 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5353 "mailbox command FAILED=0x%x, subcode=%x.\n",
5354 ((mcp->mb[1] << 16) | mcp->mb[0]),
5355 ((mcp->mb[3] << 16) | mcp->mb[2]));
5358 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5359 "Done %s.\n", __func__);
5360 offset = offset + size;
5366 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5369 struct qla_hw_data *ha = vha->hw;
5371 mbx_cmd_t *mcp = &mc;
5373 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5374 return QLA_FUNCTION_FAILED;
5376 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5377 "Entered %s.\n", __func__);
5379 memset(mcp, 0, sizeof(mbx_cmd_t));
5380 mcp->mb[0] = MBC_SET_LED_CONFIG;
5381 mcp->mb[1] = led_cfg[0];
5382 mcp->mb[2] = led_cfg[1];
5383 if (IS_QLA8031(ha)) {
5384 mcp->mb[3] = led_cfg[2];
5385 mcp->mb[4] = led_cfg[3];
5386 mcp->mb[5] = led_cfg[4];
5387 mcp->mb[6] = led_cfg[5];
5390 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5392 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5397 rval = qla2x00_mailbox_command(vha, mcp);
5398 if (rval != QLA_SUCCESS) {
5399 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5400 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5402 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5403 "Done %s.\n", __func__);
5410 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5413 struct qla_hw_data *ha = vha->hw;
5415 mbx_cmd_t *mcp = &mc;
5417 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5418 return QLA_FUNCTION_FAILED;
5420 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5421 "Entered %s.\n", __func__);
5423 memset(mcp, 0, sizeof(mbx_cmd_t));
5424 mcp->mb[0] = MBC_GET_LED_CONFIG;
5426 mcp->out_mb = MBX_0;
5427 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5429 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5433 rval = qla2x00_mailbox_command(vha, mcp);
5434 if (rval != QLA_SUCCESS) {
5435 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5436 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5438 led_cfg[0] = mcp->mb[1];
5439 led_cfg[1] = mcp->mb[2];
5440 if (IS_QLA8031(ha)) {
5441 led_cfg[2] = mcp->mb[3];
5442 led_cfg[3] = mcp->mb[4];
5443 led_cfg[4] = mcp->mb[5];
5444 led_cfg[5] = mcp->mb[6];
5446 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5447 "Done %s.\n", __func__);
5454 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5457 struct qla_hw_data *ha = vha->hw;
5459 mbx_cmd_t *mcp = &mc;
5461 if (!IS_P3P_TYPE(ha))
5462 return QLA_FUNCTION_FAILED;
5464 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5465 "Entered %s.\n", __func__);
5467 memset(mcp, 0, sizeof(mbx_cmd_t));
5468 mcp->mb[0] = MBC_SET_LED_CONFIG;
5474 mcp->out_mb = MBX_7|MBX_0;
5476 mcp->tov = MBX_TOV_SECONDS;
5479 rval = qla2x00_mailbox_command(vha, mcp);
5480 if (rval != QLA_SUCCESS) {
5481 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5482 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5484 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5485 "Done %s.\n", __func__);
5492 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5495 struct qla_hw_data *ha = vha->hw;
5497 mbx_cmd_t *mcp = &mc;
5499 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5500 return QLA_FUNCTION_FAILED;
5502 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5503 "Entered %s.\n", __func__);
5505 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5506 mcp->mb[1] = LSW(reg);
5507 mcp->mb[2] = MSW(reg);
5508 mcp->mb[3] = LSW(data);
5509 mcp->mb[4] = MSW(data);
5510 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5512 mcp->in_mb = MBX_1|MBX_0;
5513 mcp->tov = MBX_TOV_SECONDS;
5515 rval = qla2x00_mailbox_command(vha, mcp);
5517 if (rval != QLA_SUCCESS) {
5518 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5519 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5521 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5522 "Done %s.\n", __func__);
5529 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5532 struct qla_hw_data *ha = vha->hw;
5534 mbx_cmd_t *mcp = &mc;
5536 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5537 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5538 "Implicit LOGO Unsupported.\n");
5539 return QLA_FUNCTION_FAILED;
5543 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5544 "Entering %s.\n", __func__);
5546 /* Perform Implicit LOGO. */
5547 mcp->mb[0] = MBC_PORT_LOGOUT;
5548 mcp->mb[1] = fcport->loop_id;
5549 mcp->mb[10] = BIT_15;
5550 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5552 mcp->tov = MBX_TOV_SECONDS;
5554 rval = qla2x00_mailbox_command(vha, mcp);
5555 if (rval != QLA_SUCCESS)
5556 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5557 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5559 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5560 "Done %s.\n", __func__);
5566 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5570 mbx_cmd_t *mcp = &mc;
5571 struct qla_hw_data *ha = vha->hw;
5572 unsigned long retry_max_time = jiffies + (2 * HZ);
5574 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5575 return QLA_FUNCTION_FAILED;
5577 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5580 mcp->mb[0] = MBC_READ_REMOTE_REG;
5581 mcp->mb[1] = LSW(reg);
5582 mcp->mb[2] = MSW(reg);
5583 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5584 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5585 mcp->tov = MBX_TOV_SECONDS;
5587 rval = qla2x00_mailbox_command(vha, mcp);
5589 if (rval != QLA_SUCCESS) {
5590 ql_dbg(ql_dbg_mbx, vha, 0x114c,
5591 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5592 rval, mcp->mb[0], mcp->mb[1]);
5594 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
5595 if (*data == QLA8XXX_BAD_VALUE) {
5597 * During soft-reset CAMRAM register reads might
5598 * return 0xbad0bad0. So retry for MAX of 2 sec
5599 * while reading camram registers.
5601 if (time_after(jiffies, retry_max_time)) {
5602 ql_dbg(ql_dbg_mbx, vha, 0x1141,
5603 "Failure to read CAMRAM register. "
5604 "data=0x%x.\n", *data);
5605 return QLA_FUNCTION_FAILED;
5610 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5617 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5621 mbx_cmd_t *mcp = &mc;
5622 struct qla_hw_data *ha = vha->hw;
5624 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5625 return QLA_FUNCTION_FAILED;
5627 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5629 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5630 mcp->out_mb = MBX_0;
5631 mcp->in_mb = MBX_1|MBX_0;
5632 mcp->tov = MBX_TOV_SECONDS;
5634 rval = qla2x00_mailbox_command(vha, mcp);
5636 if (rval != QLA_SUCCESS) {
5637 ql_dbg(ql_dbg_mbx, vha, 0x1144,
5638 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5639 rval, mcp->mb[0], mcp->mb[1]);
5640 ha->isp_ops->fw_dump(vha, 0);
5642 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5649 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5650 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5654 mbx_cmd_t *mcp = &mc;
5655 uint8_t subcode = (uint8_t)options;
5656 struct qla_hw_data *ha = vha->hw;
5658 if (!IS_QLA8031(ha))
5659 return QLA_FUNCTION_FAILED;
5661 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5663 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5664 mcp->mb[1] = options;
5665 mcp->out_mb = MBX_1|MBX_0;
5666 if (subcode & BIT_2) {
5667 mcp->mb[2] = LSW(start_addr);
5668 mcp->mb[3] = MSW(start_addr);
5669 mcp->mb[4] = LSW(end_addr);
5670 mcp->mb[5] = MSW(end_addr);
5671 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5673 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5674 if (!(subcode & (BIT_2 | BIT_5)))
5675 mcp->in_mb |= MBX_4|MBX_3;
5676 mcp->tov = MBX_TOV_SECONDS;
5678 rval = qla2x00_mailbox_command(vha, mcp);
5680 if (rval != QLA_SUCCESS) {
5681 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5682 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5683 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5685 ha->isp_ops->fw_dump(vha, 0);
5687 if (subcode & BIT_5)
5688 *sector_size = mcp->mb[1];
5689 else if (subcode & (BIT_6 | BIT_7)) {
5690 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5691 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5692 } else if (subcode & (BIT_3 | BIT_4)) {
5693 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5694 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5696 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5703 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5708 mbx_cmd_t *mcp = &mc;
5710 if (!IS_MCTP_CAPABLE(vha->hw))
5711 return QLA_FUNCTION_FAILED;
5713 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5714 "Entered %s.\n", __func__);
5716 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5717 mcp->mb[1] = LSW(addr);
5718 mcp->mb[2] = MSW(req_dma);
5719 mcp->mb[3] = LSW(req_dma);
5720 mcp->mb[4] = MSW(size);
5721 mcp->mb[5] = LSW(size);
5722 mcp->mb[6] = MSW(MSD(req_dma));
5723 mcp->mb[7] = LSW(MSD(req_dma));
5724 mcp->mb[8] = MSW(addr);
5725 /* Setting RAM ID to valid */
5726 /* For MCTP RAM ID is 0x40 */
5727 mcp->mb[10] = BIT_7 | 0x40;
5729 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5733 mcp->tov = MBX_TOV_SECONDS;
5735 rval = qla2x00_mailbox_command(vha, mcp);
5737 if (rval != QLA_SUCCESS) {
5738 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5739 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5741 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5742 "Done %s.\n", __func__);
5749 qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
5750 void *dd_buf, uint size, uint options)
5754 mbx_cmd_t *mcp = &mc;
5757 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
5758 return QLA_FUNCTION_FAILED;
5760 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
5761 "Entered %s.\n", __func__);
5763 dd_dma = dma_map_single(&vha->hw->pdev->dev,
5764 dd_buf, size, DMA_FROM_DEVICE);
5766 ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
5767 return QLA_MEMORY_ALLOC_FAILED;
5770 memset(dd_buf, 0, size);
5772 mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
5773 mcp->mb[1] = options;
5774 mcp->mb[2] = MSW(LSD(dd_dma));
5775 mcp->mb[3] = LSW(LSD(dd_dma));
5776 mcp->mb[6] = MSW(MSD(dd_dma));
5777 mcp->mb[7] = LSW(MSD(dd_dma));
5779 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5780 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5781 mcp->buf_size = size;
5782 mcp->flags = MBX_DMA_IN;
5783 mcp->tov = MBX_TOV_SECONDS * 4;
5784 rval = qla2x00_mailbox_command(vha, mcp);
5786 if (rval != QLA_SUCCESS) {
5787 ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
5789 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
5790 "Done %s.\n", __func__);
5793 dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
5794 size, DMA_FROM_DEVICE);