1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
9 /* BSG Vendor specific commands */
10 #define QL_VND_LOOPBACK 0x01
11 #define QL_VND_A84_RESET 0x02
12 #define QL_VND_A84_UPDATE_FW 0x03
13 #define QL_VND_A84_MGMT_CMD 0x04
14 #define QL_VND_IIDMA 0x05
15 #define QL_VND_FCP_PRIO_CFG_CMD 0x06
16 #define QL_VND_READ_FLASH 0x07
17 #define QL_VND_UPDATE_FLASH 0x08
18 #define QL_VND_SET_FRU_VERSION 0x0B
19 #define QL_VND_READ_FRU_STATUS 0x0C
20 #define QL_VND_WRITE_FRU_STATUS 0x0D
21 #define QL_VND_DIAG_IO_CMD 0x0A
22 #define QL_VND_WRITE_I2C 0x10
23 #define QL_VND_READ_I2C 0x11
24 #define QL_VND_FX00_MGMT_CMD 0x12
25 #define QL_VND_SERDES_OP 0x13
26 #define QL_VND_SERDES_OP_EX 0x14
27 #define QL_VND_GET_FLASH_UPDATE_CAPS 0x15
28 #define QL_VND_SET_FLASH_UPDATE_CAPS 0x16
29 #define QL_VND_GET_BBCR_DATA 0x17
30 #define QL_VND_GET_PRIV_STATS 0x18
31 #define QL_VND_DPORT_DIAGNOSTICS 0x19
32 #define QL_VND_GET_PRIV_STATS_EX 0x1A
33 #define QL_VND_SS_GET_FLASH_IMAGE_STATUS 0x1E
34 #define QL_VND_EDIF_MGMT 0X1F
35 #define QL_VND_MANAGE_HOST_STATS 0x23
36 #define QL_VND_GET_HOST_STATS 0x24
37 #define QL_VND_GET_TGT_STATS 0x25
38 #define QL_VND_MANAGE_HOST_PORT 0x26
39 #define QL_VND_MBX_PASSTHRU 0x2B
41 /* BSG Vendor specific subcode returns */
42 #define EXT_STATUS_OK 0
43 #define EXT_STATUS_ERR 1
44 #define EXT_STATUS_BUSY 2
45 #define EXT_STATUS_INVALID_PARAM 6
46 #define EXT_STATUS_DATA_OVERRUN 7
47 #define EXT_STATUS_DATA_UNDERRUN 8
48 #define EXT_STATUS_MAILBOX 11
49 #define EXT_STATUS_BUFFER_TOO_SMALL 16
50 #define EXT_STATUS_NO_MEMORY 17
51 #define EXT_STATUS_DEVICE_OFFLINE 22
54 * To support bidirectional iocb
55 * BSG Vendor specific returns
57 #define EXT_STATUS_NOT_SUPPORTED 27
58 #define EXT_STATUS_INVALID_CFG 28
59 #define EXT_STATUS_DMA_ERR 29
60 #define EXT_STATUS_TIMEOUT 30
61 #define EXT_STATUS_THREAD_FAILED 31
62 #define EXT_STATUS_DATA_CMP_FAILED 32
64 /* BSG definations for interpreting CommandSent field */
65 #define INT_DEF_LB_LOOPBACK_CMD 0
66 #define INT_DEF_LB_ECHO_CMD 1
68 /* Loopback related definations */
69 #define INTERNAL_LOOPBACK 0xF1
70 #define EXTERNAL_LOOPBACK 0xF2
71 #define ENABLE_INTERNAL_LOOPBACK 0x02
72 #define ENABLE_EXTERNAL_LOOPBACK 0x04
73 #define INTERNAL_LOOPBACK_MASK 0x000E
74 #define MAX_ELS_FRAME_PAYLOAD 252
75 #define ELS_OPCODE_BYTE 0x10
77 /* BSG Vendor specific definations */
78 #define A84_ISSUE_WRITE_TYPE_CMD 0
79 #define A84_ISSUE_READ_TYPE_CMD 1
80 #define A84_CLEANUP_CMD 2
81 #define A84_ISSUE_RESET_OP_FW 3
82 #define A84_ISSUE_RESET_DIAG_FW 4
83 #define A84_ISSUE_UPDATE_OPFW_CMD 5
84 #define A84_ISSUE_UPDATE_DIAGFW_CMD 6
86 struct qla84_mgmt_param {
90 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
93 #define QLA84_MGMT_CONFIG_ID_UIF 1
94 #define QLA84_MGMT_CONFIG_ID_FCOE_COS 2
95 #define QLA84_MGMT_CONFIG_ID_PAUSE 3
96 #define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4
100 } config; /* for QLA84_MGMT_CHNG_CONFIG */
104 #define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */
105 #define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */
106 #define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */
107 #define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */
108 #define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */
109 #define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */
110 #define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */
114 * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
116 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0
117 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1
118 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2
119 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3
120 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4
121 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5
122 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6
123 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7
124 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8
125 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9
128 * context definitions for QLA84_MGMT_INFO_PORT_STAT
130 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0
131 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1
132 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2
133 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3
134 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4
135 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5
139 * context definitions for QLA84_MGMT_INFO_LIF_STAT
141 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0
142 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1
143 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2
144 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3
145 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6
147 } info; /* for QLA84_MGMT_GET_INFO */
151 struct qla84_msg_mgmt {
153 #define QLA84_MGMT_READ_MEM 0x00
154 #define QLA84_MGMT_WRITE_MEM 0x01
155 #define QLA84_MGMT_CHNG_CONFIG 0x02
156 #define QLA84_MGMT_GET_INFO 0x03
158 struct qla84_mgmt_param mgmtp;/* parameters for cmd */
159 uint32_t len; /* bytes in payload following this struct */
160 uint8_t payload[]; /* payload for cmd */
163 struct qla_bsg_a84_mgmt {
164 struct qla84_msg_mgmt mgmt;
165 } __attribute__ ((packed));
167 struct qla_scsi_addr {
170 } __attribute__ ((packed));
172 struct qla_ext_dest_addr {
177 struct qla_scsi_addr scsi_addr;
180 #define EXT_DEF_TYPE_WWPN 2
183 } __attribute__ ((packed));
185 struct qla_port_param {
186 struct qla_ext_dest_addr fc_scsi_addr;
189 } __attribute__ ((packed));
191 struct qla_mbx_passthru {
192 uint16_t reserved1[2];
194 uint16_t mbx_out[32];
195 uint32_t reserved2[16];
200 #define MAX_FRU_SIZE 36
202 struct qla_field_address {
208 struct qla_field_info {
209 uint8_t version[MAX_FRU_SIZE];
212 struct qla_image_version {
213 struct qla_field_address field_address;
214 struct qla_field_info field_info;
217 struct qla_image_version_list {
219 struct qla_image_version version[];
222 struct qla_status_reg {
223 struct qla_field_address field_address;
228 struct qla_i2c_access {
233 uint8_t buffer[0x40];
236 /* 26xx serdes register interface */
238 /* serdes reg commands */
239 #define INT_SC_SERDES_READ_REG 1
240 #define INT_SC_SERDES_WRITE_REG 2
242 struct qla_serdes_reg {
248 struct qla_serdes_reg_ex {
254 struct qla_flash_update_caps {
255 uint64_t capabilities;
256 uint32_t outage_duration;
257 uint8_t reserved[20];
261 #define QLA_BBCR_STATUS_DISABLED 0
262 #define QLA_BBCR_STATUS_ENABLED 1
263 #define QLA_BBCR_STATUS_UNKNOWN 2
266 #define QLA_BBCR_STATE_OFFLINE 0
267 #define QLA_BBCR_STATE_ONLINE 1
269 /* BB_CR Offline Reason Code */
270 #define QLA_BBCR_REASON_PORT_SPEED 1
271 #define QLA_BBCR_REASON_PEER_PORT 2
272 #define QLA_BBCR_REASON_SWITCH 3
273 #define QLA_BBCR_REASON_LOGIN_REJECT 4
275 struct qla_bbcr_data {
276 uint8_t status; /* 1 - enabled, 0 - Disabled */
277 uint8_t state; /* 1 - online, 0 - offline */
278 uint8_t configured_bbscn; /* 0-15 */
279 uint8_t negotiated_bbscn; /* 0-15 */
280 uint8_t offline_reason_code;
281 uint16_t mbx1; /* Port state */
285 struct qla_dport_diag {
292 #define QLA_DPORT_RESULT 0x0
293 #define QLA_DPORT_START 0x2
295 /* active images in flash */
296 struct qla_active_regions {
297 uint8_t global_image;
298 uint8_t board_config;
300 uint8_t npiv_config_0_1;
301 uint8_t npiv_config_2_3;
302 uint8_t reserved[32];
305 #include "qla_edif_bsg.h"