1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
4 * Copyright (C) 2001, 2002, 2003
5 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
6 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
9 * 1.0: Initial Release.
10 * 1.1: Add /proc SDTR status.
11 * Remove obsolete error handler nsp32_reset.
13 * 1.2: PowerPC (big endian) support.
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/timer.h>
21 #include <linux/ioport.h>
22 #include <linux/major.h>
23 #include <linux/blkdev.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/delay.h>
27 #include <linux/ctype.h>
28 #include <linux/dma-mapping.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
35 #include <scsi/scsi_device.h>
36 #include <scsi/scsi_host.h>
37 #include <scsi/scsi_ioctl.h>
42 /***********************************************************************
45 static int trans_mode = 0; /* default: BIOS */
46 module_param (trans_mode, int, 0);
47 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
49 #define ULTRA20M_MODE 2
51 static bool auto_param = 0; /* default: ON */
52 module_param (auto_param, bool, 0);
53 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
55 static bool disc_priv = 1; /* default: OFF */
56 module_param (disc_priv, bool, 0);
57 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
59 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
60 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
61 MODULE_LICENSE("GPL");
63 static const char *nsp32_release_version = "1.2";
66 /****************************************************************************
69 static struct pci_device_id nsp32_pci_table[] = {
71 .vendor = PCI_VENDOR_ID_IODATA,
72 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
73 .subvendor = PCI_ANY_ID,
74 .subdevice = PCI_ANY_ID,
75 .driver_data = MODEL_IODATA,
78 .vendor = PCI_VENDOR_ID_WORKBIT,
79 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
80 .subvendor = PCI_ANY_ID,
81 .subdevice = PCI_ANY_ID,
82 .driver_data = MODEL_KME,
85 .vendor = PCI_VENDOR_ID_WORKBIT,
86 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
87 .subvendor = PCI_ANY_ID,
88 .subdevice = PCI_ANY_ID,
89 .driver_data = MODEL_WORKBIT,
92 .vendor = PCI_VENDOR_ID_WORKBIT,
93 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
94 .subvendor = PCI_ANY_ID,
95 .subdevice = PCI_ANY_ID,
96 .driver_data = MODEL_PCI_WORKBIT,
99 .vendor = PCI_VENDOR_ID_WORKBIT,
100 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID,
103 .driver_data = MODEL_LOGITEC,
106 .vendor = PCI_VENDOR_ID_WORKBIT,
107 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
108 .subvendor = PCI_ANY_ID,
109 .subdevice = PCI_ANY_ID,
110 .driver_data = MODEL_PCI_LOGITEC,
113 .vendor = PCI_VENDOR_ID_WORKBIT,
114 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
115 .subvendor = PCI_ANY_ID,
116 .subdevice = PCI_ANY_ID,
117 .driver_data = MODEL_PCI_MELCO,
120 .vendor = PCI_VENDOR_ID_WORKBIT,
121 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
122 .subvendor = PCI_ANY_ID,
123 .subdevice = PCI_ANY_ID,
124 .driver_data = MODEL_PCI_MELCO,
128 MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
130 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
134 * Period/AckWidth speed conversion table
136 * Note: This period/ackwidth speed table must be in descending order.
138 static nsp32_sync_table nsp32_sync_table_40M[] = {
139 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
140 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
141 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
142 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
143 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
144 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
145 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
146 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
147 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
148 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
151 static nsp32_sync_table nsp32_sync_table_20M[] = {
152 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
153 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
154 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
155 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
156 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
157 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
158 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
159 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
160 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
163 static nsp32_sync_table nsp32_sync_table_pci[] = {
164 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
165 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
166 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
167 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
168 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
169 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
170 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
171 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
172 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
176 * function declaration
178 /* module entry point */
179 static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
180 static void nsp32_remove(struct pci_dev *);
181 static int __init init_nsp32 (void);
182 static void __exit exit_nsp32 (void);
184 /* struct struct scsi_host_template */
185 static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
187 static int nsp32_detect (struct pci_dev *pdev);
188 static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
189 static const char *nsp32_info (struct Scsi_Host *);
190 static int nsp32_release (struct Scsi_Host *);
192 /* SCSI error handler */
193 static int nsp32_eh_abort (struct scsi_cmnd *);
194 static int nsp32_eh_host_reset(struct scsi_cmnd *);
196 /* generate SCSI message */
197 static void nsp32_build_identify(struct scsi_cmnd *);
198 static void nsp32_build_nop (struct scsi_cmnd *);
199 static void nsp32_build_reject (struct scsi_cmnd *);
200 static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char,
203 /* SCSI message handler */
204 static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
205 static void nsp32_msgout_occur (struct scsi_cmnd *);
206 static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long,
209 static int nsp32_setup_sg_table (struct scsi_cmnd *);
210 static int nsp32_selection_autopara(struct scsi_cmnd *);
211 static int nsp32_selection_autoscsi(struct scsi_cmnd *);
212 static void nsp32_scsi_done (struct scsi_cmnd *);
213 static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
214 static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
215 static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
216 static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
219 static void nsp32_analyze_sdtr (struct scsi_cmnd *);
220 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *,
222 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
223 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *,
224 unsigned char *, unsigned char *);
225 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *,
228 /* SCSI bus status handler */
229 static void nsp32_wait_req (nsp32_hw_data *, int);
230 static void nsp32_wait_sack (nsp32_hw_data *, int);
231 static void nsp32_sack_assert (nsp32_hw_data *);
232 static void nsp32_sack_negate (nsp32_hw_data *);
233 static void nsp32_do_bus_reset(nsp32_hw_data *);
235 /* hardware interrupt handler */
236 static irqreturn_t do_nsp32_isr(int, void *);
238 /* initialize hardware */
239 static int nsp32hw_init(nsp32_hw_data *);
242 static int nsp32_getprom_param (nsp32_hw_data *);
243 static int nsp32_getprom_at24 (nsp32_hw_data *);
244 static int nsp32_getprom_c16 (nsp32_hw_data *);
245 static void nsp32_prom_start (nsp32_hw_data *);
246 static void nsp32_prom_stop (nsp32_hw_data *);
247 static int nsp32_prom_read (nsp32_hw_data *, int);
248 static int nsp32_prom_read_bit (nsp32_hw_data *);
249 static void nsp32_prom_write_bit(nsp32_hw_data *, int);
250 static void nsp32_prom_set (nsp32_hw_data *, int, int);
251 static int nsp32_prom_get (nsp32_hw_data *, int);
253 /* debug/warning/info message */
254 static void nsp32_message (const char *, int, char *, char *, ...);
256 static void nsp32_dmessage(const char *, int, int, char *, ...);
260 * max_sectors is currently limited up to 128.
262 static struct scsi_host_template nsp32_template = {
263 .proc_name = "nsp32",
264 .name = "Workbit NinjaSCSI-32Bi/UDE",
265 .show_info = nsp32_show_info,
267 .queuecommand = nsp32_queuecommand,
269 .sg_tablesize = NSP32_SG_SIZE,
271 .this_id = NSP32_HOST_SCSIID,
272 .dma_boundary = PAGE_SIZE - 1,
273 .eh_abort_handler = nsp32_eh_abort,
274 .eh_host_reset_handler = nsp32_eh_host_reset,
275 /* .highmem_io = 1, */
276 .cmd_size = sizeof(struct nsp32_cmd_priv),
279 #include "nsp32_io.h"
281 /***********************************************************************
285 # define NSP32_DEBUG_MASK 0x000000
286 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
287 # define nsp32_dbg(mask, args...) /* */
289 # define NSP32_DEBUG_MASK 0xffffff
290 # define nsp32_msg(type, args...) \
291 nsp32_message (__func__, __LINE__, (type), args)
292 # define nsp32_dbg(mask, args...) \
293 nsp32_dmessage(__func__, __LINE__, (mask), args)
296 #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
297 #define NSP32_DEBUG_REGISTER BIT(1)
298 #define NSP32_DEBUG_AUTOSCSI BIT(2)
299 #define NSP32_DEBUG_INTR BIT(3)
300 #define NSP32_DEBUG_SGLIST BIT(4)
301 #define NSP32_DEBUG_BUSFREE BIT(5)
302 #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
303 #define NSP32_DEBUG_RESELECTION BIT(7)
304 #define NSP32_DEBUG_MSGINOCCUR BIT(8)
305 #define NSP32_DEBUG_EEPROM BIT(9)
306 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
307 #define NSP32_DEBUG_BUSRESET BIT(11)
308 #define NSP32_DEBUG_RESTART BIT(12)
309 #define NSP32_DEBUG_SYNC BIT(13)
310 #define NSP32_DEBUG_WAIT BIT(14)
311 #define NSP32_DEBUG_TARGETFLAG BIT(15)
312 #define NSP32_DEBUG_PROC BIT(16)
313 #define NSP32_DEBUG_INIT BIT(17)
314 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
316 #define NSP32_DEBUG_BUF_LEN 100
319 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
322 char buf[NSP32_DEBUG_BUF_LEN];
325 vsnprintf(buf, sizeof(buf), fmt, args);
329 printk("%snsp32: %s\n", type, buf);
331 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
336 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
339 char buf[NSP32_DEBUG_BUF_LEN];
342 vsnprintf(buf, sizeof(buf), fmt, args);
345 if (mask & NSP32_DEBUG_MASK) {
346 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
352 # include "nsp32_debug.c"
354 # define show_command(arg) /* */
355 # define show_busphase(arg) /* */
356 # define show_autophase(arg) /* */
362 static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
364 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
365 int pos = data->msgout_len;
368 /* XXX: Auto DiscPriv detection is progressing... */
369 if (disc_priv == 0) {
373 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
375 data->msgout_len = pos;
379 * SDTR Message Routine
381 static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
382 unsigned char period,
383 unsigned char offset)
385 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
386 int pos = data->msgout_len;
388 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
389 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
390 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
391 data->msgoutbuf[pos] = period; pos++;
392 data->msgoutbuf[pos] = offset; pos++;
394 data->msgout_len = pos;
398 * No Operation Message
400 static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
402 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
403 int pos = data->msgout_len;
406 nsp32_msg(KERN_WARNING,
407 "Some messages are already contained!");
411 data->msgoutbuf[pos] = NOP; pos++;
412 data->msgout_len = pos;
418 static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
420 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
421 int pos = data->msgout_len;
423 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
424 data->msgout_len = pos;
431 static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
433 unsigned int base = SCpnt->host->io_port;
435 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
437 if (time & (~TIMER_CNT_MASK)) {
438 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
441 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
447 * set SCSI command and other parameter to asic, and start selection phase
449 static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
451 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
452 unsigned int base = SCpnt->device->host->io_port;
453 unsigned int host_id = SCpnt->device->host->this_id;
454 unsigned char target = scmd_id(SCpnt);
455 nsp32_autoparam *param = data->autoparam;
461 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
466 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
467 if (phase != BUSMON_BUS_FREE) {
468 nsp32_msg(KERN_WARNING, "bus busy");
469 show_busphase(phase & BUSMON_PHASE_MASK);
470 SCpnt->result = DID_BUS_BUSY << 16;
477 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
478 * over 3 messages needs another routine.
480 if (data->msgout_len == 0) {
481 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
482 SCpnt->result = DID_ERROR << 16;
484 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
486 for (i = 0; i < data->msgout_len; i++) {
488 * the sending order of the message is:
489 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
490 * MCNT 2: MSG#1 -> MSG#2
494 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
496 msgout |= MV_VALID; /* MV valid */
497 msgout |= (unsigned int)data->msgout_len; /* len */
499 /* data->msgout_len > 3 */
503 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n",
504 // nsp32_read2(base, SEL_TIME_OUT));
505 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
508 * setup asic parameter
510 memset(param, 0, sizeof(nsp32_autoparam));
513 for (i = 0; i < SCpnt->cmd_len; i++) {
514 param->cdb[4 * i] = SCpnt->cmnd[i];
517 /* outgoing messages */
518 param->msgout = cpu_to_le32(msgout);
520 /* syncreg, ackwidth, target id, SREQ sampling rate */
521 param->syncreg = data->cur_target->syncreg;
522 param->ackwidth = data->cur_target->ackwidth;
523 param->target_id = BIT(host_id) | BIT(target);
524 param->sample_reg = data->cur_target->sample_reg;
526 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
528 /* command control */
529 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
531 AUTO_MSGIN_00_OR_04 |
536 /* transfer control */
538 switch (data->trans_method) {
539 case NSP32_TRANSFER_BUSMASTER:
542 case NSP32_TRANSFER_MMIO:
545 case NSP32_TRANSFER_PIO:
549 nsp32_msg(KERN_ERR, "unknown trans_method");
553 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
554 * For bus master transfer, it's taken off.
556 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
557 param->transfer_control = cpu_to_le16(s);
560 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
563 * transfer parameter to ASIC
565 nsp32_write4(base, SGT_ADR, data->auto_paddr);
566 nsp32_write2(base, COMMAND_CONTROL,
567 CLEAR_CDB_FIFO_POINTER | AUTO_PARAMETER );
572 ret = nsp32_arbitration(SCpnt, base);
579 * Selection with AUTO SCSI (without AUTO PARAMETER)
581 static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
583 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
584 unsigned int base = SCpnt->device->host->io_port;
585 unsigned int host_id = SCpnt->device->host->this_id;
586 unsigned char target = scmd_id(SCpnt);
589 unsigned short command = 0;
590 unsigned int msgout = 0;
593 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
598 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
603 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
604 if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
605 nsp32_msg(KERN_WARNING, "bus busy");
606 SCpnt->result = DID_BUS_BUSY << 16;
614 nsp32_read2(base, SCSI_EXECUTE_PHASE);
617 * clear FIFO counter to set CDBs
619 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
624 for (i = 0; i < SCpnt->cmd_len; i++) {
625 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
627 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
630 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
632 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID,
633 BIT(host_id) | BIT(target));
636 * set SCSI MSGOUT REG
638 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
639 * over 3 messages needs another routine.
641 if (data->msgout_len == 0) {
642 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
643 SCpnt->result = DID_ERROR << 16;
646 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
648 for (i = 0; i < data->msgout_len; i++) {
650 * the sending order of the message is:
651 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
652 * MCNT 2: MSG#1 -> MSG#2
656 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
658 msgout |= MV_VALID; /* MV valid */
659 msgout |= (unsigned int)data->msgout_len; /* len */
660 nsp32_write4(base, SCSI_MSG_OUT, msgout);
662 /* data->msgout_len > 3 */
663 nsp32_write4(base, SCSI_MSG_OUT, 0);
667 * set selection timeout(= 250ms)
669 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
672 * set SREQ hazard killer sampling rate
674 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
675 * check other internal clock!
677 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
682 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
686 * Don't set BM_START_ADR before setting this register.
688 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
693 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
695 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
696 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
697 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
698 nsp32_read4(base, SGT_ADR),
699 nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
700 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
701 data->msgout_len, msgout);
704 * set SGT ADDR (physical address)
706 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
709 * set TRANSFER CONTROL REG
712 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
713 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
714 if (scsi_bufflen(SCpnt) > 0) {
717 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
718 command |= CB_MMIO_MODE;
719 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
720 command |= CB_IO_MODE;
722 nsp32_write2(base, TRANSFER_CONTROL, command);
725 * start AUTO SCSI, kick off arbitration
727 command = (CLEAR_CDB_FIFO_POINTER |
729 AUTO_MSGIN_00_OR_04 |
732 nsp32_write2(base, COMMAND_CONTROL, command);
737 status = nsp32_arbitration(SCpnt, base);
743 nsp32_write2(base, IRQ_CONTROL, 0);
750 * Arbitration Status Check
752 * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
753 * Using udelay(1) consumes CPU time and system time, but
754 * arbitration delay time is defined minimal 2.4us in SCSI
755 * specification, thus udelay works as coarse grained wait timer.
757 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
764 arbit = nsp32_read1(base, ARBIT_STATUS);
766 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
767 (time <= ARBIT_TIMEOUT_TIME));
769 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
770 "arbit: 0x%x, delay time: %d", arbit, time);
772 if (arbit & ARBIT_WIN) {
773 /* Arbitration succeeded */
774 SCpnt->result = DID_OK << 16;
775 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
776 } else if (arbit & ARBIT_FAIL) {
777 /* Arbitration failed */
778 SCpnt->result = DID_BUS_BUSY << 16;
782 * unknown error or ARBIT_GO timeout,
783 * something lock up! guess no connection.
785 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
786 SCpnt->result = DID_NO_CONNECT << 16;
793 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
802 * Note: This reselection routine is called from msgin_occur,
803 * reselection target id&lun must be already set.
804 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
806 static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
808 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
809 unsigned int host_id = SCpnt->device->host->this_id;
810 unsigned int base = SCpnt->device->host->io_port;
811 unsigned char tmpid, newid;
813 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
816 * calculate reselected SCSI ID
818 tmpid = nsp32_read1(base, RESELECT_ID);
819 tmpid &= (~BIT(host_id));
830 * If reselected New ID:LUN is not existed
831 * or current nexus is not existed, unexpected
832 * reselection is occurred. Send reject message.
834 if (newid >= ARRAY_SIZE(data->lunt) ||
835 newlun >= ARRAY_SIZE(data->lunt[0])) {
836 nsp32_msg(KERN_WARNING, "unknown id/lun");
838 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
839 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
843 data->cur_id = newid;
844 data->cur_lun = newlun;
845 data->cur_target = &(data->target[newid]);
846 data->cur_lunt = &(data->lunt[newid][newlun]);
848 /* reset SACK/SavedACK counter (or ALL clear?) */
849 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
856 * nsp32_setup_sg_table - build scatter gather list for transfer data
859 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
861 static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
863 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
864 struct scatterlist *sg;
865 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
870 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
874 num = scsi_dma_map(SCpnt);
880 scsi_for_each_sg(SCpnt, sg, num, i) {
882 * Build nsp32_sglist, substitute sg dma addresses.
884 sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
885 sgt[i].len = cpu_to_le32(sg_dma_len(sg));
887 if (le32_to_cpu(sgt[i].len) > 0x10000) {
889 "can't transfer over 64KB at a time, "
890 "size=0x%x", le32_to_cpu(sgt[i].len));
893 nsp32_dbg(NSP32_DEBUG_SGLIST,
894 "num 0x%x : addr 0x%lx len 0x%lx",
896 le32_to_cpu(sgt[i].addr),
897 le32_to_cpu(sgt[i].len ));
901 l = le32_to_cpu(sgt[num-1].len);
902 sgt[num-1].len = cpu_to_le32(l | SGTEND);
908 static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt)
910 void (*done)(struct scsi_cmnd *) = scsi_done;
911 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
912 nsp32_target *target;
913 nsp32_lunt *cur_lunt;
916 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
917 "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
918 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
919 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0],
920 SCpnt->cmd_len, scsi_sg_count(SCpnt), scsi_sglist(SCpnt),
921 scsi_bufflen(SCpnt));
923 if (data->CurrentSC != NULL) {
924 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
925 data->CurrentSC = NULL;
926 SCpnt->result = DID_NO_CONNECT << 16;
931 /* check target ID is not same as this initiator ID */
932 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
933 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
934 SCpnt->result = DID_BAD_TARGET << 16;
939 /* check target LUN is allowable value */
940 if (SCpnt->device->lun >= MAX_LUN) {
941 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
942 SCpnt->result = DID_BAD_TARGET << 16;
949 data->CurrentSC = SCpnt;
950 nsp32_priv(SCpnt)->status = SAM_STAT_CHECK_CONDITION;
951 scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
953 /* initialize data */
954 data->msgout_len = 0;
956 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
957 cur_lunt->SCpnt = SCpnt;
958 cur_lunt->save_datp = 0;
959 cur_lunt->msgin03 = FALSE;
960 data->cur_lunt = cur_lunt;
961 data->cur_id = SCpnt->device->id;
962 data->cur_lun = SCpnt->device->lun;
964 ret = nsp32_setup_sg_table(SCpnt);
966 nsp32_msg(KERN_ERR, "SGT fail");
967 SCpnt->result = DID_ERROR << 16;
968 nsp32_scsi_done(SCpnt);
973 nsp32_build_identify(SCpnt);
976 * If target is the first time to transfer after the reset
977 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
978 * message SDTR is needed to do synchronous transfer.
980 target = &data->target[scmd_id(SCpnt)];
981 data->cur_target = target;
983 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
984 unsigned char period, offset;
986 if (trans_mode != ASYNC_MODE) {
987 nsp32_set_max_sync(data, target, &period, &offset);
988 nsp32_build_sdtr(SCpnt, period, offset);
989 target->sync_flag |= SDTR_INITIATOR;
991 nsp32_set_async(data, target);
992 target->sync_flag |= SDTR_DONE;
995 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
996 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
997 target->limit_entry, period, offset);
998 } else if (target->sync_flag & SDTR_INITIATOR) {
1000 * It was negotiating SDTR with target, sending from the
1001 * initiator, but there are no chance to remove this flag.
1002 * Set async because we don't get proper negotiation.
1004 nsp32_set_async(data, target);
1005 target->sync_flag &= ~SDTR_INITIATOR;
1006 target->sync_flag |= SDTR_DONE;
1008 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1009 "SDTR_INITIATOR: fall back to async");
1010 } else if (target->sync_flag & SDTR_TARGET) {
1012 * It was negotiating SDTR with target, sending from target,
1013 * but there are no chance to remove this flag. Set async
1014 * because we don't get proper negotiation.
1016 nsp32_set_async(data, target);
1017 target->sync_flag &= ~SDTR_TARGET;
1018 target->sync_flag |= SDTR_DONE;
1020 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1021 "Unknown SDTR from target is reached, fall back to async.");
1024 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1025 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1026 SCpnt->device->id, target->sync_flag, target->syncreg,
1030 if (auto_param == 0) {
1031 ret = nsp32_selection_autopara(SCpnt);
1033 ret = nsp32_selection_autoscsi(SCpnt);
1037 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1038 nsp32_scsi_done(SCpnt);
1044 static DEF_SCSI_QCMD(nsp32_queuecommand)
1046 /* initialize asic */
1047 static int nsp32hw_init(nsp32_hw_data *data)
1049 unsigned int base = data->BaseAddress;
1050 unsigned short irq_stat;
1051 unsigned long lc_reg;
1052 unsigned char power;
1054 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1055 if ((lc_reg & 0xff00) == 0) {
1056 lc_reg |= (0x20 << 8);
1057 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1060 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1061 nsp32_write2(base, TRANSFER_CONTROL, 0);
1062 nsp32_write4(base, BM_CNT, 0);
1063 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1066 irq_stat = nsp32_read2(base, IRQ_STATUS);
1067 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1068 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1071 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1072 * designated by specification.
1074 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1075 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1076 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1077 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1078 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1079 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1080 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1082 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1085 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1086 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1087 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1089 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1090 nsp32_index_write1(base, BM_CYCLE,
1091 MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1092 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1095 * initialize MISC_WRRD register
1097 * Note: Designated parameters is obeyed as following:
1098 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1099 * MISC_MASTER_TERMINATION_SELECT: It must be set.
1100 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1101 * MISC_AUTOSEL_TIMING_SEL: It should be set.
1102 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1103 * MISC_DELAYED_BMSTART: It's selected for safety.
1105 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1106 * we have to set TRANSFERCONTROL_BM_START as 0 and set
1107 * appropriate value before restarting bus master transfer.
1109 nsp32_index_write2(base, MISC_WR,
1110 (SCSI_DIRECTION_DETECTOR_SELECT |
1112 MASTER_TERMINATION_SELECT |
1113 BMREQ_NEGATE_TIMING_SEL |
1114 AUTOSEL_TIMING_SEL |
1115 BMSTOP_CHANGE2_NONDATA_PHASE));
1117 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1118 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1119 if (!(power & SENSE)) {
1120 nsp32_msg(KERN_INFO, "term power on");
1121 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1124 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1125 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1127 nsp32_write1(base, SYNC_REG, 0);
1128 nsp32_write1(base, ACK_WIDTH, 0);
1129 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1132 * enable to select designated IRQ (except for
1133 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1135 nsp32_index_write2(base, IRQ_SELECT,
1136 IRQSELECT_TIMER_IRQ |
1137 IRQSELECT_SCSIRESET_IRQ |
1138 IRQSELECT_FIFO_SHLD_IRQ |
1139 IRQSELECT_RESELECT_IRQ |
1140 IRQSELECT_PHASE_CHANGE_IRQ |
1141 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1142 // IRQSELECT_BMCNTERR_IRQ |
1143 IRQSELECT_TARGET_ABORT_IRQ |
1144 IRQSELECT_MASTER_ABORT_IRQ );
1145 nsp32_write2(base, IRQ_CONTROL, 0);
1148 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1149 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1155 /* interrupt routine */
1156 static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1158 nsp32_hw_data *data = dev_id;
1159 unsigned int base = data->BaseAddress;
1160 struct scsi_cmnd *SCpnt = data->CurrentSC;
1161 unsigned short auto_stat, irq_stat, trans_stat;
1162 unsigned char busmon, busphase;
1163 unsigned long flags;
1166 struct Scsi_Host *host = data->Host;
1168 spin_lock_irqsave(host->host_lock, flags);
1171 * IRQ check, then enable IRQ mask
1173 irq_stat = nsp32_read2(base, IRQ_STATUS);
1174 nsp32_dbg(NSP32_DEBUG_INTR,
1175 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1176 /* is this interrupt comes from Ninja asic? */
1177 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1178 nsp32_dbg(NSP32_DEBUG_INTR,
1179 "shared interrupt: irq other 0x%x", irq_stat);
1183 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1185 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1186 busphase = busmon & BUSMON_PHASE_MASK;
1188 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1189 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1190 nsp32_msg(KERN_INFO, "card disconnect");
1191 if (data->CurrentSC != NULL) {
1192 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1193 SCpnt->result = DID_BAD_TARGET << 16;
1194 nsp32_scsi_done(SCpnt);
1200 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1201 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1202 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1207 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1208 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1209 nsp32_do_bus_reset(data);
1210 if (SCpnt != NULL) {
1211 SCpnt->result = DID_RESET << 16;
1212 nsp32_scsi_done(SCpnt);
1217 if (SCpnt == NULL) {
1218 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1219 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x",
1220 irq_stat, trans_stat);
1225 * AutoSCSI Interrupt.
1226 * Note: This interrupt is occurred when AutoSCSI is finished. Then
1227 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1228 * recorded when AutoSCSI sequencer has been processed.
1230 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1231 /* getting SCSI executed phase */
1232 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1233 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1235 /* Selection Timeout, go busfree phase. */
1236 if (auto_stat & SELECTION_TIMEOUT) {
1237 nsp32_dbg(NSP32_DEBUG_INTR,
1238 "selection timeout occurred");
1240 SCpnt->result = DID_TIME_OUT << 16;
1241 nsp32_scsi_done(SCpnt);
1245 if (auto_stat & MSGOUT_PHASE) {
1247 * MsgOut phase was processed.
1248 * If MSG_IN_OCCUER is not set, then MsgOut phase is
1249 * completed. Thus, msgout_len must reset. Otherwise,
1250 * nothing to do here. If MSG_OUT_OCCUER is occurred,
1251 * then we will encounter the condition and check.
1253 if (!(auto_stat & MSG_IN_OCCUER) &&
1254 (data->msgout_len <= 3)) {
1256 * !MSG_IN_OCCUER && msgout_len <=3
1257 * ---> AutoSCSI with MSGOUTreg is processed.
1259 data->msgout_len = 0;
1262 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1265 if ((auto_stat & DATA_IN_PHASE) &&
1266 (scsi_get_resid(SCpnt) > 0) &&
1267 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1268 printk( "auto+fifo\n");
1269 //nsp32_pio_read(SCpnt);
1272 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1273 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1274 nsp32_dbg(NSP32_DEBUG_INTR,
1275 "Data in/out phase processed");
1277 /* read BMCNT, SGT pointer addr */
1278 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1279 nsp32_read4(base, BM_CNT));
1280 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1281 nsp32_read4(base, SGT_ADR));
1282 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1283 nsp32_read4(base, SACK_CNT));
1284 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1285 nsp32_read4(base, SAVED_SACK_CNT));
1287 scsi_set_resid(SCpnt, 0); /* all data transferred! */
1293 if (auto_stat & MSG_IN_OCCUER) {
1294 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1300 if (auto_stat & MSG_OUT_OCCUER) {
1301 nsp32_msgout_occur(SCpnt);
1307 if (auto_stat & BUS_FREE_OCCUER) {
1308 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1314 if (auto_stat & STATUS_PHASE) {
1316 * Read CSB and substitute CSB for SCpnt->result
1317 * to save status phase stutas byte.
1318 * scsi error handler checks host_byte (DID_*:
1319 * low level driver to indicate status), then checks
1320 * status_byte (SCSI status byte).
1322 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1325 if (auto_stat & ILLEGAL_PHASE) {
1326 /* Illegal phase is detected. SACK is not back. */
1327 nsp32_msg(KERN_WARNING,
1328 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1330 /* TODO: currently we don't have any action... bus reset? */
1333 * To send back SACK, assert, wait, and negate.
1335 nsp32_sack_assert(data);
1336 nsp32_wait_req(data, NEGATE);
1337 nsp32_sack_negate(data);
1341 if (auto_stat & COMMAND_PHASE) {
1343 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1346 if (auto_stat & AUTOSCSI_BUSY) {
1347 /* AutoSCSI is running */
1350 show_autophase(auto_stat);
1354 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1355 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1358 case BUSPHASE_DATA_OUT:
1359 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1361 //nsp32_pio_write(SCpnt);
1365 case BUSPHASE_DATA_IN:
1366 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1368 //nsp32_pio_read(SCpnt);
1372 case BUSPHASE_STATUS:
1373 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1375 nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
1379 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1380 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x",
1381 irq_stat, trans_stat);
1382 show_busphase(busphase);
1389 /* Phase Change IRQ */
1390 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1391 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1394 case BUSPHASE_MESSAGE_IN:
1395 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1396 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1399 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1400 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1401 irq_stat, trans_stat);
1402 show_busphase(busphase);
1409 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1410 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1415 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1416 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1418 * TODO: To be implemented improving bus master
1419 * transfer reliability when BMCNTERR is occurred in
1420 * AutoSCSI phase described in specification.
1425 nsp32_dbg(NSP32_DEBUG_INTR,
1426 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1427 show_busphase(busphase);
1431 /* disable IRQ mask */
1432 nsp32_write2(base, IRQ_CONTROL, 0);
1435 spin_unlock_irqrestore(host->host_lock, flags);
1437 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1439 return IRQ_RETVAL(handled);
1443 static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
1445 unsigned long flags;
1446 nsp32_hw_data *data;
1449 unsigned char mode_reg;
1453 hostno = host->host_no;
1454 data = (nsp32_hw_data *)host->hostdata;
1455 base = host->io_port;
1457 seq_puts(m, "NinjaSCSI-32 status\n\n");
1458 seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n",
1459 nsp32_release_version);
1460 seq_printf(m, "SCSI host No.: %d\n", hostno);
1461 seq_printf(m, "IRQ: %d\n", host->irq);
1462 seq_printf(m, "IO: 0x%lx-0x%lx\n",
1463 host->io_port, host->io_port + host->n_io_port - 1);
1464 seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n",
1465 host->base, host->base + data->MmioLength - 1);
1466 seq_printf(m, "sg_tablesize: %d\n",
1467 host->sg_tablesize);
1468 seq_printf(m, "Chip revision: 0x%x\n",
1469 (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1471 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1472 model = data->pci_devid->driver_data;
1475 seq_printf(m, "Power Management: %s\n",
1476 (mode_reg & OPTF) ? "yes" : "no");
1478 seq_printf(m, "OEM: %ld, %s\n",
1479 (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1481 spin_lock_irqsave(&(data->Lock), flags);
1482 seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
1483 spin_unlock_irqrestore(&(data->Lock), flags);
1486 seq_puts(m, "SDTR status\n");
1487 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1489 seq_printf(m, "id %d: ", id);
1491 if (id == host->this_id) {
1492 seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
1496 if (data->target[id].sync_flag == SDTR_DONE) {
1497 if (data->target[id].period == 0 &&
1498 data->target[id].offset == ASYNC_OFFSET ) {
1499 seq_puts(m, "async");
1501 seq_puts(m, " sync");
1504 seq_puts(m, " none");
1507 if (data->target[id].period != 0) {
1509 speed = 1000000 / (data->target[id].period * 4);
1511 seq_printf(m, " transfer %d.%dMB/s, offset %d",
1514 data->target[id].offset
1525 * Reset parameters and call scsi_done for data->cur_lunt.
1526 * Be careful setting SCpnt->result = DID_* before calling this function.
1528 static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1530 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1531 unsigned int base = SCpnt->device->host->io_port;
1533 scsi_dma_unmap(SCpnt);
1536 * clear TRANSFERCONTROL_BM_START
1538 nsp32_write2(base, TRANSFER_CONTROL, 0);
1539 nsp32_write4(base, BM_CNT, 0);
1549 data->cur_lunt->SCpnt = NULL;
1550 data->cur_lunt = NULL;
1551 data->cur_target = NULL;
1552 data->CurrentSC = NULL;
1559 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1560 * with ACK reply when below condition is matched:
1561 * MsgIn 00: Command Complete.
1562 * MsgIn 02: Save Data Pointer.
1563 * MsgIn 04: Disconnect.
1564 * In other case, unexpected BUSFREE is detected.
1566 static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1568 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1569 unsigned int base = SCpnt->device->host->io_port;
1571 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1572 show_autophase(execph);
1574 nsp32_write4(base, BM_CNT, 0);
1575 nsp32_write2(base, TRANSFER_CONTROL, 0);
1578 * MsgIn 02: Save Data Pointer
1581 * Save Data Pointer is received. Adjust pointer.
1584 * SCSI-3 says if Save Data Pointer is not received, then we restart
1585 * processing and we can't adjust any SCSI data pointer in next data
1588 if (execph & MSGIN_02_VALID) {
1589 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1592 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1595 if (!(execph & MSGIN_00_VALID) &&
1596 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1597 unsigned int sacklen, s_sacklen;
1600 * Read SACK count and SAVEDSACK count, then compare.
1602 sacklen = nsp32_read4(base, SACK_CNT );
1603 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1606 * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1607 * come after data transferring.
1609 if (s_sacklen > 0) {
1611 * Comparing between sack and savedsack to
1612 * check the condition of AutoMsgIn03.
1614 * If they are same, set msgin03 == TRUE,
1615 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1616 * reselection. On the other hand, if they
1617 * aren't same, set msgin03 == FALSE, and
1618 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1621 if (sacklen != s_sacklen) {
1622 data->cur_lunt->msgin03 = FALSE;
1624 data->cur_lunt->msgin03 = TRUE;
1627 nsp32_adjust_busfree(SCpnt, s_sacklen);
1631 /* This value has not substitude with valid value yet... */
1632 //data->cur_lunt->save_datp = data->cur_datp;
1639 if (execph & MSGIN_03_VALID) {
1640 /* MsgIn03 was valid to be processed. No need processing. */
1646 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1648 * SDTR negotiation pulled by the initiator has not
1649 * finished yet. Fall back to ASYNC mode.
1651 nsp32_set_async(data, data->cur_target);
1652 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1653 data->cur_target->sync_flag |= SDTR_DONE;
1654 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1656 * SDTR negotiation pulled by the target has been
1659 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1661 * If valid message is received, then
1662 * negotiation is succeeded.
1666 * On the contrary, if unexpected bus free is
1667 * occurred, then negotiation is failed. Fall
1668 * back to ASYNC mode.
1670 nsp32_set_async(data, data->cur_target);
1672 data->cur_target->sync_flag &= ~SDTR_TARGET;
1673 data->cur_target->sync_flag |= SDTR_DONE;
1677 * It is always ensured by SCSI standard that initiator
1678 * switches into Bus Free Phase after
1679 * receiving message 00 (Command Complete), 04 (Disconnect).
1680 * It's the reason that processing here is valid.
1682 if (execph & MSGIN_00_VALID) {
1683 /* MsgIn 00: Command Complete */
1684 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1686 nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
1687 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1688 "normal end stat=0x%x resid=0x%x\n",
1689 nsp32_priv(SCpnt)->status, scsi_get_resid(SCpnt));
1690 SCpnt->result = (DID_OK << 16) |
1691 (nsp32_priv(SCpnt)->status << 0);
1692 nsp32_scsi_done(SCpnt);
1693 /* All operation is done */
1695 } else if (execph & MSGIN_04_VALID) {
1696 /* MsgIn 04: Disconnect */
1697 nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
1699 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1702 /* Unexpected bus free */
1703 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1705 SCpnt->result = DID_ERROR << 16;
1706 nsp32_scsi_done(SCpnt);
1714 * nsp32_adjust_busfree - adjusting SG table
1716 * Note: This driver adjust the SG table using SCSI ACK
1717 * counter instead of BMCNT counter!
1719 static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1721 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1722 int old_entry = data->cur_entry;
1724 int sg_num = data->cur_lunt->sg_num;
1725 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1726 unsigned int restlen, sentlen;
1729 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
1731 /* adjust saved SACK count with 4 byte start address boundary */
1732 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1735 * calculate new_entry from sack count and each sgt[].len
1736 * calculate the byte which is intent to send
1739 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1740 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1741 if (sentlen > s_sacklen) {
1746 /* all sgt is processed */
1747 if (new_entry == sg_num) {
1751 if (sentlen == s_sacklen) {
1752 /* XXX: confirm it's ok or not */
1753 /* In this case, it's ok because we are at
1754 * the head element of the sg. restlen is correctly
1759 /* calculate the rest length for transferring */
1760 restlen = sentlen - s_sacklen;
1762 /* update adjusting current SG table entry */
1763 len = le32_to_cpu(sgt[new_entry].len);
1764 addr = le32_to_cpu(sgt[new_entry].addr);
1765 addr += (len - restlen);
1766 sgt[new_entry].addr = cpu_to_le32(addr);
1767 sgt[new_entry].len = cpu_to_le32(restlen);
1769 /* set cur_entry with new_entry */
1770 data->cur_entry = new_entry;
1775 if (scsi_get_resid(SCpnt) < sentlen) {
1776 nsp32_msg(KERN_ERR, "resid underflow");
1779 scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
1780 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
1782 /* update hostdata and lun */
1789 * It's called MsgOut phase occur.
1790 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1791 * message out phase. It, however, has more than 3 messages,
1792 * HBA creates the interrupt and we have to process by hand.
1794 static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1796 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1797 unsigned int base = SCpnt->device->host->io_port;
1800 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1801 "enter: msgout_len: 0x%x", data->msgout_len);
1804 * If MsgOut phase is occurred without having any
1805 * message, then No_Operation is sent (SCSI-2).
1807 if (data->msgout_len == 0) {
1808 nsp32_build_nop(SCpnt);
1814 for (i = 0; i < data->msgout_len; i++) {
1815 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1816 "%d : 0x%x", i, data->msgoutbuf[i]);
1819 * Check REQ is asserted.
1821 nsp32_wait_req(data, ASSERT);
1823 if (i == (data->msgout_len - 1)) {
1825 * If the last message, set the AutoSCSI restart
1826 * before send back the ack message. AutoSCSI
1827 * restart automatically negate ATN signal.
1829 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1830 //nsp32_restart_autoscsi(SCpnt, command);
1831 nsp32_write2(base, COMMAND_CONTROL,
1832 (CLEAR_CDB_FIFO_POINTER |
1833 AUTO_COMMAND_PHASE |
1835 AUTO_MSGIN_00_OR_04 |
1839 * Write data with SACK, then wait sack is
1840 * automatically negated.
1842 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1843 nsp32_wait_sack(data, NEGATE);
1845 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1846 nsp32_read1(base, SCSI_BUS_MONITOR));
1849 data->msgout_len = 0;
1851 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1857 * Note: Restarting AutoSCSI needs set:
1858 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
1860 static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1862 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1863 unsigned int base = data->BaseAddress;
1864 unsigned short transfer = 0;
1866 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1868 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1869 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1874 * Don't set BM_START_ADR before setting this register.
1876 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1881 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1884 * set SREQ hazard killer sampling rate
1886 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1889 * set SGT ADDR (physical address)
1891 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1894 * set TRANSFER CONTROL REG
1897 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
1898 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1899 if (scsi_bufflen(SCpnt) > 0) {
1900 transfer |= BM_START;
1902 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1903 transfer |= CB_MMIO_MODE;
1904 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1905 transfer |= CB_IO_MODE;
1907 nsp32_write2(base, TRANSFER_CONTROL, transfer);
1912 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
1914 command |= (CLEAR_CDB_FIFO_POINTER |
1915 AUTO_COMMAND_PHASE |
1917 nsp32_write2(base, COMMAND_CONTROL, command);
1919 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
1924 * cannot run automatically message in occur
1926 static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
1927 unsigned long irq_status,
1928 unsigned short execph)
1930 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1931 unsigned int base = SCpnt->device->host->io_port;
1933 unsigned char msgtype;
1934 unsigned char newlun;
1935 unsigned short command = 0;
1936 int msgclear = TRUE;
1941 * read first message
1942 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
1943 * of Message-In have to be processed before sending back SCSI ACK.
1945 msg = nsp32_read1(base, SCSI_DATA_IN);
1946 data->msginbuf[(unsigned char)data->msgin_len] = msg;
1947 msgtype = data->msginbuf[0];
1948 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
1949 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
1950 data->msgin_len, msg, msgtype);
1953 * TODO: We need checking whether bus phase is message in?
1959 nsp32_sack_assert(data);
1962 * processing IDENTIFY
1964 if (msgtype & 0x80) {
1965 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
1966 /* Invalid (non reselect) phase */
1970 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
1971 ret = nsp32_reselection(SCpnt, newlun);
1980 * processing messages except for IDENTIFY
1982 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
1988 case COMMAND_COMPLETE:
1991 * These messages should not be occurred.
1992 * They should be processed on AutoSCSI sequencer.
1994 nsp32_msg(KERN_WARNING,
1995 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
1998 case RESTORE_POINTERS:
2000 * AutoMsgIn03 is disabled, and HBA gets this message.
2003 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2004 unsigned int s_sacklen;
2006 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2007 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2008 nsp32_adjust_busfree(SCpnt, s_sacklen);
2010 /* No need to rewrite SGT */
2013 data->cur_lunt->msgin03 = FALSE;
2015 /* Update with the new value */
2017 /* reset SACK/SavedACK counter (or ALL clear?) */
2018 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2021 * set new sg pointer
2023 new_sgtp = data->cur_lunt->sglun_paddr +
2024 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2025 nsp32_write4(base, SGT_ADR, new_sgtp);
2031 * These messages should not be occurred.
2032 * They should be processed on AutoSCSI sequencer.
2034 nsp32_msg (KERN_WARNING,
2035 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2039 case MESSAGE_REJECT:
2040 /* If previous message_out is sending SDTR, and get
2041 message_reject from target, SDTR negotiation is failed */
2042 if (data->cur_target->sync_flag &
2043 (SDTR_INITIATOR | SDTR_TARGET)) {
2045 * Current target is negotiating SDTR, but it's
2046 * failed. Fall back to async transfer mode, and set
2049 nsp32_set_async(data, data->cur_target);
2050 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2051 data->cur_target->sync_flag |= SDTR_DONE;
2056 case LINKED_CMD_COMPLETE:
2057 case LINKED_FLG_CMD_COMPLETE:
2058 /* queue tag is not supported currently */
2059 nsp32_msg (KERN_WARNING,
2060 "unsupported message: 0x%x", msgtype);
2063 case INITIATE_RECOVERY:
2064 /* staring ECA (Extended Contingent Allegiance) state. */
2065 /* This message is declined in SPI2 or later. */
2072 case SIMPLE_QUEUE_TAG:
2075 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2076 * No support is needed.
2078 if (data->msgin_len >= 1) {
2082 /* current position is 1-byte of 2 byte */
2090 case EXTENDED_MESSAGE:
2091 if (data->msgin_len < 1) {
2093 * Current position does not reach 2-byte
2094 * (2-byte is extended message length).
2100 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2102 * Current extended message has msginbuf[1] + 2
2103 * (msgin_len starts counting from 0, so buf[1] + 1).
2104 * If current message position is not finished,
2105 * continue receiving message.
2112 * Reach here means regular length of each type of
2113 * extended messages.
2115 switch (data->msginbuf[2]) {
2116 case EXTENDED_MODIFY_DATA_POINTER:
2118 goto reject; /* not implemented yet */
2123 * Exchange this message between initiator and target.
2125 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2127 * received inappropriate message.
2133 nsp32_analyze_sdtr(SCpnt);
2137 case EXTENDED_EXTENDED_IDENTIFY:
2138 /* SCSI-I only, not supported. */
2139 goto reject; /* not implemented yet */
2144 goto reject; /* not implemented yet */
2158 if (msgclear == TRUE) {
2159 data->msgin_len = 0;
2162 * If restarting AutoSCSI, but there are some message to out
2163 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2164 * (MV_VALID = 0). When commandcontrol is written with
2165 * AutoSCSI restart, at the same time MsgOutOccur should be
2166 * happened (however, such situation is really possible...?).
2168 if (data->msgout_len > 0) {
2169 nsp32_write4(base, SCSI_MSG_OUT, 0);
2170 command |= AUTO_ATN;
2175 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2177 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2180 * If current msgin03 is TRUE, then flag on.
2182 if (data->cur_lunt->msgin03 == TRUE) {
2183 command |= AUTO_MSGIN_03;
2185 data->cur_lunt->msgin03 = FALSE;
2193 nsp32_restart_autoscsi(SCpnt, command);
2196 * wait SCSI REQ negate for REQ-ACK handshake
2198 nsp32_wait_req(data, NEGATE);
2203 nsp32_sack_negate(data);
2205 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2210 nsp32_msg(KERN_WARNING,
2211 "invalid or unsupported MessageIn, rejected. "
2212 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2213 msg, data->msgin_len, msgtype);
2214 nsp32_build_reject(SCpnt);
2215 data->msgin_len = 0;
2223 static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2225 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2226 nsp32_target *target = data->cur_target;
2227 unsigned char get_period = data->msginbuf[3];
2228 unsigned char get_offset = data->msginbuf[4];
2231 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2234 * If this inititor sent the SDTR message, then target responds SDTR,
2235 * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2236 * Messages are not appropriate, then send back reject message.
2237 * If initiator did not send the SDTR, but target sends SDTR,
2238 * initiator calculator the appropriate parameter and send back SDTR.
2240 if (target->sync_flag & SDTR_INITIATOR) {
2242 * Initiator sent SDTR, the target responds and
2243 * send back negotiation SDTR.
2245 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2247 target->sync_flag &= ~SDTR_INITIATOR;
2248 target->sync_flag |= SDTR_DONE;
2253 if (get_offset > SYNC_OFFSET) {
2255 * Negotiation is failed, the target send back
2256 * unexpected offset value.
2261 if (get_offset == ASYNC_OFFSET) {
2263 * Negotiation is succeeded, the target want
2264 * to fall back into asynchronous transfer mode.
2271 * Check whether sync period is too short. If too short,
2272 * fall back to async mode. If it's ok, then investigate
2273 * the received sync period. If sync period is acceptable
2274 * between sync table start_period and end_period, then
2275 * set this I_T nexus as sent offset and period.
2276 * If it's not acceptable, send back reject and fall back
2279 if (get_period < data->synct[0].period_num) {
2281 * Negotiation is failed, the target send back
2282 * unexpected period value.
2287 entry = nsp32_search_period_entry(data, target, get_period);
2291 * Target want to use long period which is not
2292 * acceptable NinjaSCSI-32Bi/UDE.
2298 * Set new sync table and offset in this I_T nexus.
2300 nsp32_set_sync_entry(data, target, entry, get_offset);
2302 /* Target send SDTR to initiator. */
2303 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2305 target->sync_flag |= SDTR_INITIATOR;
2308 if (get_offset > SYNC_OFFSET) {
2309 /* send back as SYNC_OFFSET */
2310 get_offset = SYNC_OFFSET;
2314 if (get_period < data->synct[0].period_num) {
2315 get_period = data->synct[0].period_num;
2318 entry = nsp32_search_period_entry(data, target, get_period);
2320 if (get_offset == ASYNC_OFFSET || entry < 0) {
2321 nsp32_set_async(data, target);
2322 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2324 nsp32_set_sync_entry(data, target, entry, get_offset);
2325 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2329 target->period = get_period;
2330 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2335 * If the current message is unacceptable, send back to the target
2336 * with reject message.
2338 nsp32_build_reject(SCpnt);
2341 nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2344 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2350 * Search config entry number matched in sync_table from given
2351 * target and speed period value. If failed to search, return negative value.
2353 static int nsp32_search_period_entry(nsp32_hw_data *data,
2354 nsp32_target *target,
2355 unsigned char period)
2359 if (target->limit_entry >= data->syncnum) {
2360 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2361 target->limit_entry = 0;
2364 for (i = target->limit_entry; i < data->syncnum; i++) {
2365 if (period >= data->synct[i].start_period &&
2366 period <= data->synct[i].end_period) {
2372 * Check given period value is over the sync_table value.
2373 * If so, return max value.
2375 if (i == data->syncnum) {
2384 * target <-> initiator use ASYNC transfer
2386 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2388 unsigned char period = data->synct[target->limit_entry].period_num;
2390 target->offset = ASYNC_OFFSET;
2392 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2393 target->ackwidth = 0;
2394 target->sample_reg = 0;
2396 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2401 * target <-> initiator use maximum SYNC transfer
2403 static void nsp32_set_max_sync(nsp32_hw_data *data,
2404 nsp32_target *target,
2405 unsigned char *period,
2406 unsigned char *offset)
2408 unsigned char period_num, ackwidth;
2410 period_num = data->synct[target->limit_entry].period_num;
2411 *period = data->synct[target->limit_entry].start_period;
2412 ackwidth = data->synct[target->limit_entry].ackwidth;
2413 *offset = SYNC_OFFSET;
2415 target->syncreg = TO_SYNCREG(period_num, *offset);
2416 target->ackwidth = ackwidth;
2417 target->offset = *offset;
2418 target->sample_reg = 0; /* disable SREQ sampling */
2423 * target <-> initiator use entry number speed
2425 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2426 nsp32_target *target,
2428 unsigned char offset)
2430 unsigned char period, ackwidth, sample_rate;
2432 period = data->synct[entry].period_num;
2433 ackwidth = data->synct[entry].ackwidth;
2434 sample_rate = data->synct[entry].sample_rate;
2436 target->syncreg = TO_SYNCREG(period, offset);
2437 target->ackwidth = ackwidth;
2438 target->offset = offset;
2439 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2441 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2446 * It waits until SCSI REQ becomes assertion or negation state.
2448 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2449 * connected target responds SCSI REQ negation. We have to wait
2450 * SCSI REQ becomes negation in order to negate SCSI ACK signal for
2451 * REQ-ACK handshake.
2453 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2455 unsigned int base = data->BaseAddress;
2457 unsigned char bus, req_bit;
2459 if (!((state == ASSERT) || (state == NEGATE))) {
2460 nsp32_msg(KERN_ERR, "unknown state designation");
2463 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2466 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2467 if ((bus & BUSMON_REQ) == req_bit) {
2468 nsp32_dbg(NSP32_DEBUG_WAIT,
2469 "wait_time: %d", wait_time);
2474 } while (wait_time < REQSACK_TIMEOUT_TIME);
2476 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2480 * It waits until SCSI SACK becomes assertion or negation state.
2482 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2484 unsigned int base = data->BaseAddress;
2486 unsigned char bus, ack_bit;
2488 if (!((state == ASSERT) || (state == NEGATE))) {
2489 nsp32_msg(KERN_ERR, "unknown state designation");
2492 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2495 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2496 if ((bus & BUSMON_ACK) == ack_bit) {
2497 nsp32_dbg(NSP32_DEBUG_WAIT,
2498 "wait_time: %d", wait_time);
2503 } while (wait_time < REQSACK_TIMEOUT_TIME);
2505 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2511 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2513 static void nsp32_sack_assert(nsp32_hw_data *data)
2515 unsigned int base = data->BaseAddress;
2516 unsigned char busctrl;
2518 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2519 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2520 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2526 static void nsp32_sack_negate(nsp32_hw_data *data)
2528 unsigned int base = data->BaseAddress;
2529 unsigned char busctrl;
2531 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2532 busctrl &= ~BUSCTL_ACK;
2533 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2539 * Note: n_io_port is defined as 0x7f because I/O register port is
2541 * 0x800-0x8ff: memory mapped I/O port
2542 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2543 * 0xc00-0xfff: CardBus status registers
2545 static int nsp32_detect(struct pci_dev *pdev)
2547 struct Scsi_Host *host; /* registered host structure */
2548 struct resource *res;
2549 nsp32_hw_data *data;
2553 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2556 * register this HBA as SCSI device
2558 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2560 nsp32_msg (KERN_ERR, "failed to scsi register");
2567 data = (nsp32_hw_data *)host->hostdata;
2569 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2571 host->irq = data->IrqNumber;
2572 host->io_port = data->BaseAddress;
2573 host->unique_id = data->BaseAddress;
2574 host->n_io_port = data->NumAddress;
2575 host->base = (unsigned long)data->MmioAddress;
2578 spin_lock_init(&(data->Lock));
2580 data->cur_lunt = NULL;
2581 data->cur_target = NULL;
2584 * Bus master transfer mode is supported currently.
2586 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2589 * Set clock div, CLOCK_4 (HBA has own external clock, and
2590 * dividing * 100ns/4).
2591 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2593 data->clock = CLOCK_4;
2596 * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2598 switch (data->clock) {
2600 /* If data->clock is CLOCK_4, then select 40M sync table. */
2601 data->synct = nsp32_sync_table_40M;
2602 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2605 /* If data->clock is CLOCK_2, then select 20M sync table. */
2606 data->synct = nsp32_sync_table_20M;
2607 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2610 /* If data->clock is PCICLK, then select pci sync table. */
2611 data->synct = nsp32_sync_table_pci;
2612 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2615 nsp32_msg(KERN_WARNING,
2616 "Invalid clock div is selected, set CLOCK_4.");
2617 /* Use default value CLOCK_4 */
2618 data->clock = CLOCK_4;
2619 data->synct = nsp32_sync_table_40M;
2620 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2630 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
2631 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2632 goto scsi_unregister;
2636 * allocate autoparam DMA resource.
2638 data->autoparam = dma_alloc_coherent(&pdev->dev,
2639 sizeof(nsp32_autoparam), &(data->auto_paddr),
2641 if (data->autoparam == NULL) {
2642 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2643 goto scsi_unregister;
2647 * allocate scatter-gather DMA resource.
2649 data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2650 &data->sg_paddr, GFP_KERNEL);
2651 if (data->sg_list == NULL) {
2652 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2653 goto free_autoparam;
2656 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2657 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2658 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2665 .sglun = &(data->sg_list[offset]),
2666 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2669 data->lunt[i][j] = tmp;
2676 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2677 nsp32_target *target = &(data->target[i]);
2679 target->limit_entry = 0;
2680 target->sync_flag = 0;
2681 nsp32_set_async(data, target);
2687 ret = nsp32_getprom_param(data);
2689 data->resettime = 3; /* default 3 */
2697 snprintf(data->info_str, sizeof(data->info_str),
2698 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2699 host->irq, host->io_port, host->n_io_port);
2704 * Note: It's important to reset SCSI bus in initialization phase.
2705 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2706 * system is coming up, so SCSI devices connected to HBA is set as
2707 * un-asynchronous mode. It brings the merit that this HBA is
2708 * ready to start synchronous transfer without any preparation,
2709 * but we are difficult to control transfer speed. In addition,
2710 * it prevents device transfer speed from effecting EEPROM start-up
2711 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2712 * Auto Mode, then FAST-10M is selected when SCSI devices are
2713 * connected same or more than 4 devices. It should be avoided
2714 * depending on this specification. Thus, resetting the SCSI bus
2715 * restores all connected SCSI devices to asynchronous mode, then
2716 * this driver set SDTR safely later, and we can control all SCSI
2717 * device transfer mode.
2719 nsp32_do_bus_reset(data);
2721 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2723 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2724 "SCSI PCI controller. Interrupt: %d", host->irq);
2731 res = request_region(host->io_port, host->n_io_port, "nsp32");
2734 "I/O region 0x%x+0x%x is already used",
2735 data->BaseAddress, data->NumAddress);
2739 ret = scsi_add_host(host, &pdev->dev);
2741 nsp32_msg(KERN_ERR, "failed to add scsi host");
2744 scsi_scan_host(host);
2745 pci_set_drvdata(pdev, host);
2749 release_region(host->io_port, host->n_io_port);
2752 free_irq(host->irq, data);
2755 dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2756 data->sg_list, data->sg_paddr);
2759 dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
2760 data->autoparam, data->auto_paddr);
2763 scsi_host_put(host);
2769 static int nsp32_release(struct Scsi_Host *host)
2771 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2773 if (data->autoparam) {
2774 dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
2775 data->autoparam, data->auto_paddr);
2778 if (data->sg_list) {
2779 dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
2780 data->sg_list, data->sg_paddr);
2784 free_irq(host->irq, data);
2787 if (host->io_port && host->n_io_port) {
2788 release_region(host->io_port, host->n_io_port);
2791 if (data->MmioAddress) {
2792 iounmap(data->MmioAddress);
2798 static const char *nsp32_info(struct Scsi_Host *shpnt)
2800 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2802 return data->info_str;
2806 /****************************************************************************
2809 static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2811 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2812 unsigned int base = SCpnt->device->host->io_port;
2814 nsp32_msg(KERN_WARNING, "abort");
2816 if (data->cur_lunt->SCpnt == NULL) {
2817 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2821 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2822 /* reset SDTR negotiation */
2823 data->cur_target->sync_flag = 0;
2824 nsp32_set_async(data, data->cur_target);
2827 nsp32_write2(base, TRANSFER_CONTROL, 0);
2828 nsp32_write2(base, BM_CNT, 0);
2830 SCpnt->result = DID_ABORT << 16;
2831 nsp32_scsi_done(SCpnt);
2833 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2837 static void nsp32_do_bus_reset(nsp32_hw_data *data)
2839 unsigned int base = data->BaseAddress;
2841 unsigned short __maybe_unused intrdat;
2843 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
2847 * clear TRANSFERCONTROL_BM_START
2850 nsp32_write2(base, TRANSFER_CONTROL, 0);
2851 nsp32_write4(base, BM_CNT, 0);
2852 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2855 * fall back to asynchronous transfer mode
2856 * initialize SDTR negotiation flag
2858 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2859 nsp32_target *target = &data->target[i];
2861 target->sync_flag = 0;
2862 nsp32_set_async(data, target);
2868 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
2869 mdelay(RESET_HOLD_TIME / 1000);
2870 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
2871 for(i = 0; i < 5; i++) {
2872 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
2873 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
2876 data->CurrentSC = NULL;
2879 static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
2881 struct Scsi_Host *host = SCpnt->device->host;
2882 unsigned int base = SCpnt->device->host->io_port;
2883 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2885 nsp32_msg(KERN_INFO, "Host Reset");
2886 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2888 spin_lock_irq(SCpnt->device->host->host_lock);
2891 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2892 nsp32_do_bus_reset(data);
2893 nsp32_write2(base, IRQ_CONTROL, 0);
2895 spin_unlock_irq(SCpnt->device->host->host_lock);
2896 return SUCCESS; /* Host reset is succeeded at any time. */
2900 /**************************************************************************
2905 * getting EEPROM parameter
2907 static int nsp32_getprom_param(nsp32_hw_data *data)
2909 int vendor = data->pci_devid->vendor;
2910 int device = data->pci_devid->device;
2912 int __maybe_unused val;
2917 ret = nsp32_prom_read(data, 0x7e);
2919 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
2922 ret = nsp32_prom_read(data, 0x7f);
2924 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
2931 if (vendor == PCI_VENDOR_ID_WORKBIT &&
2932 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
2933 ret = nsp32_getprom_c16(data);
2934 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2935 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
2936 ret = nsp32_getprom_at24(data);
2937 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2938 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
2939 ret = nsp32_getprom_at24(data);
2941 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
2945 /* for debug : SPROM data full checking */
2946 for (i = 0; i <= 0x1f; i++) {
2947 val = nsp32_prom_read(data, i);
2948 nsp32_dbg(NSP32_DEBUG_EEPROM,
2949 "rom address 0x%x : 0x%x", i, val);
2957 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
2960 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
2961 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
2962 * 0x07 : HBA Synchronous Transfer Period
2963 * Value 0: AutoSync, 1: Manual Setting
2964 * 0x08 - 0x0f : Not Used? (0x0)
2965 * 0x10 : Bus Termination
2966 * Value 0: Auto[ON], 1: ON, 2: OFF
2967 * 0x11 : Not Used? (0)
2968 * 0x12 : Bus Reset Delay Time (0x03)
2969 * 0x13 : Bootable CD Support
2970 * Value 0: Disable, 1: Enable
2971 * 0x14 : Device Scan
2972 * Bit 7 6 5 4 3 2 1 0
2973 * | <----------------->
2974 * | SCSI ID: Value 0: Skip, 1: YES
2975 * |-> Value 0: ALL scan, Value 1: Manual
2976 * 0x15 - 0x1b : Not Used? (0)
2977 * 0x1c : Constant? (0x01) (clock div?)
2978 * 0x1d - 0x7c : Not Used (0xff)
2979 * 0x7d : Not Used? (0xff)
2980 * 0x7e : Constant (0x55), Validity signature
2981 * 0x7f : Constant (0xaa), Validity signature
2983 static int nsp32_getprom_at24(nsp32_hw_data *data)
2987 nsp32_target *target;
2991 * Reset time which is designated by EEPROM.
2993 * TODO: Not used yet.
2995 data->resettime = nsp32_prom_read(data, 0x12);
2998 * HBA Synchronous Transfer Period
3000 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3001 * that if auto_sync is 0 (auto), and connected SCSI devices are
3002 * same or lower than 3, then transfer speed is set as ULTRA-20M.
3003 * On the contrary if connected SCSI devices are same or higher
3004 * than 4, then transfer speed is set as FAST-10M.
3006 * I break this rule. The number of connected SCSI devices are
3007 * only ignored. If auto_sync is 0 (auto), then transfer speed is
3008 * forced as ULTRA-20M.
3010 ret = nsp32_prom_read(data, 0x07);
3019 nsp32_msg(KERN_WARNING,
3020 "Unsupported Auto Sync mode. Fall back to manual mode.");
3024 if (trans_mode == ULTRA20M_MODE) {
3029 * each device Synchronous Transfer Period
3031 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3032 target = &data->target[i];
3033 if (auto_sync == TRUE) {
3034 target->limit_entry = 0; /* set as ULTRA20M */
3036 ret = nsp32_prom_read(data, i);
3037 entry = nsp32_search_period_entry(data, target, ret);
3039 /* search failed... set maximum speed */
3042 target->limit_entry = entry;
3051 * C16 110 (I-O Data: SC-NBD) data map:
3054 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3055 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3056 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3057 * 0x08 - 0x0f : Not Used? (0x0)
3058 * 0x10 : Transfer Mode
3059 * Value 0: PIO, 1: Busmater
3060 * 0x11 : Bus Reset Delay Time (0x00-0x20)
3061 * 0x12 : Bus Termination
3062 * Value 0: Disable, 1: Enable
3063 * 0x13 - 0x19 : Disconnection
3064 * Value 0: Disable, 1: Enable
3065 * 0x1a - 0x7c : Not Used? (0)
3066 * 0x7d : Not Used? (0xf8)
3067 * 0x7e : Constant (0x55), Validity signature
3068 * 0x7f : Constant (0xaa), Validity signature
3070 static int nsp32_getprom_c16(nsp32_hw_data *data)
3073 nsp32_target *target;
3077 * Reset time which is designated by EEPROM.
3079 * TODO: Not used yet.
3081 data->resettime = nsp32_prom_read(data, 0x11);
3084 * each device Synchronous Transfer Period
3086 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3087 target = &data->target[i];
3088 ret = nsp32_prom_read(data, i);
3090 case 0: /* 20MB/s */
3093 case 1: /* 10MB/s */
3102 default: /* default 20MB/s */
3106 entry = nsp32_search_period_entry(data, target, val);
3107 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3108 /* search failed... set maximum speed */
3111 target->limit_entry = entry;
3119 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3121 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3125 /* start condition */
3126 nsp32_prom_start(data);
3128 /* device address */
3129 nsp32_prom_write_bit(data, 1); /* 1 */
3130 nsp32_prom_write_bit(data, 0); /* 0 */
3131 nsp32_prom_write_bit(data, 1); /* 1 */
3132 nsp32_prom_write_bit(data, 0); /* 0 */
3133 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3134 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3135 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3137 /* R/W: W for dummy write */
3138 nsp32_prom_write_bit(data, 0);
3141 nsp32_prom_write_bit(data, 0);
3144 for (i = 7; i >= 0; i--) {
3145 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3149 nsp32_prom_write_bit(data, 0);
3151 /* start condition */
3152 nsp32_prom_start(data);
3154 /* device address */
3155 nsp32_prom_write_bit(data, 1); /* 1 */
3156 nsp32_prom_write_bit(data, 0); /* 0 */
3157 nsp32_prom_write_bit(data, 1); /* 1 */
3158 nsp32_prom_write_bit(data, 0); /* 0 */
3159 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3160 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3161 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3164 nsp32_prom_write_bit(data, 1);
3167 nsp32_prom_write_bit(data, 0);
3171 for (i = 7; i >= 0; i--) {
3172 val += (nsp32_prom_read_bit(data) << i);
3176 nsp32_prom_write_bit(data, 1);
3178 /* stop condition */
3179 nsp32_prom_stop(data);
3184 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3186 int base = data->BaseAddress;
3189 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3197 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3202 static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3204 int base = data->BaseAddress;
3208 nsp32_msg(KERN_ERR, "return value is not appropriate");
3213 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3226 static void nsp32_prom_start (nsp32_hw_data *data)
3228 /* start condition */
3229 nsp32_prom_set(data, SCL, 1);
3230 nsp32_prom_set(data, SDA, 1);
3231 nsp32_prom_set(data, ENA, 1); /* output mode */
3232 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
3233 * SDA 1->0 is start condition */
3234 nsp32_prom_set(data, SCL, 0);
3237 static void nsp32_prom_stop (nsp32_hw_data *data)
3239 /* stop condition */
3240 nsp32_prom_set(data, SCL, 1);
3241 nsp32_prom_set(data, SDA, 0);
3242 nsp32_prom_set(data, ENA, 1); /* output mode */
3243 nsp32_prom_set(data, SDA, 1);
3244 nsp32_prom_set(data, SCL, 0);
3247 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3250 nsp32_prom_set(data, SDA, val);
3251 nsp32_prom_set(data, SCL, 1 );
3252 nsp32_prom_set(data, SCL, 0 );
3255 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3260 nsp32_prom_set(data, ENA, 0); /* input mode */
3261 nsp32_prom_set(data, SCL, 1);
3263 val = nsp32_prom_get(data, SDA);
3265 nsp32_prom_set(data, SCL, 0);
3266 nsp32_prom_set(data, ENA, 1); /* output mode */
3272 /**************************************************************************
3277 /* Device suspended */
3278 static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3280 struct Scsi_Host *host = pci_get_drvdata(pdev);
3282 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state.event=%x, slot=%s, host=0x%p",
3283 pdev, state.event, pci_name(pdev), host);
3285 pci_save_state (pdev);
3286 pci_disable_device (pdev);
3287 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3292 /* Device woken up */
3293 static int nsp32_resume(struct pci_dev *pdev)
3295 struct Scsi_Host *host = pci_get_drvdata(pdev);
3296 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3299 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p",
3300 pdev, pci_name(pdev), host);
3302 pci_set_power_state(pdev, PCI_D0);
3303 pci_enable_wake (pdev, PCI_D0, 0);
3304 pci_restore_state (pdev);
3306 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3308 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3310 if (reg == 0xffff) {
3311 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3315 nsp32hw_init (data);
3316 nsp32_do_bus_reset(data);
3318 nsp32_msg(KERN_INFO, "resume success");
3325 /************************************************************************
3326 * PCI/Cardbus probe/remove routine
3328 static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3331 nsp32_hw_data *data = &nsp32_data_base;
3333 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3335 ret = pci_enable_device(pdev);
3337 nsp32_msg(KERN_ERR, "failed to enable pci device");
3342 data->pci_devid = id;
3343 data->IrqNumber = pdev->irq;
3344 data->BaseAddress = pci_resource_start(pdev, 0);
3345 data->NumAddress = pci_resource_len (pdev, 0);
3346 data->MmioAddress = pci_ioremap_bar(pdev, 1);
3347 data->MmioLength = pci_resource_len (pdev, 1);
3349 pci_set_master(pdev);
3351 ret = nsp32_detect(pdev);
3353 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3355 data->MmioAddress, data->MmioLength,
3357 nsp32_model[id->driver_data]);
3359 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3364 static void nsp32_remove(struct pci_dev *pdev)
3366 struct Scsi_Host *host = pci_get_drvdata(pdev);
3368 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3370 scsi_remove_host(host);
3372 nsp32_release(host);
3374 scsi_host_put(host);
3377 static struct pci_driver nsp32_driver = {
3379 .id_table = nsp32_pci_table,
3380 .probe = nsp32_probe,
3381 .remove = nsp32_remove,
3383 .suspend = nsp32_suspend,
3384 .resume = nsp32_resume,
3388 /*********************************************************************
3391 static int __init init_nsp32(void) {
3392 nsp32_msg(KERN_INFO, "loading...");
3393 return pci_register_driver(&nsp32_driver);
3396 static void __exit exit_nsp32(void) {
3397 nsp32_msg(KERN_INFO, "unloading...");
3398 pci_unregister_driver(&nsp32_driver);
3401 module_init(init_nsp32);
3402 module_exit(exit_nsp32);