drivers/scsi/ips.c

   1 /*****************************************************************************/
   2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller                */
   3 /*                                                                           */
   4 /* Written By: Keith Mitchell, IBM Corporation                               */
   5 /*             Jack Hammer, Adaptec, Inc.                                    */
   6 /*             David Jeffery, Adaptec, Inc.                                  */
   7 /*                                                                           */
   8 /* Copyright (C) 2000 IBM Corporation                                        */
   9 /* Copyright (C) 2002,2003 Adaptec, Inc.                                     */
  10 /*                                                                           */
  11 /* This program is free software; you can redistribute it and/or modify      */
  12 /* it under the terms of the GNU General Public License as published by      */
  13 /* the Free Software Foundation; either version 2 of the License, or         */
  14 /* (at your option) any later version.                                       */
  15 /*                                                                           */
  16 /* This program is distributed in the hope that it will be useful,           */
  17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of            */
  18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             */
  19 /* GNU General Public License for more details.                              */
  20 /*                                                                           */
  21 /* NO WARRANTY                                                               */
  22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        */
  23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      */
  24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      */
  25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    */
  26 /* solely responsible for determining the appropriateness of using and       */
  27 /* distributing the Program and assumes all risks associated with its        */
  28 /* exercise of rights under this Agreement, including but not limited to     */
  29 /* the risks and costs of program errors, damage to or loss of data,         */
  30 /* programs or equipment, and unavailability or interruption of operations.  */
  31 /*                                                                           */
  32 /* DISCLAIMER OF LIABILITY                                                   */
  33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   */
  34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        */
  35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   */
  36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     */
  37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    */
  38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  */
  39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             */
  40 /*                                                                           */
  41 /* You should have received a copy of the GNU General Public License         */
  42 /* along with this program; if not, write to the Free Software               */
  43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */
  44 /*                                                                           */
  45 /* Bugs/Comments/Suggestions about this driver should be mailed to:          */
  46 /*      ipslinux@adaptec.com                                                 */
  47 /*                                                                           */
  48 /* For system support issues, contact your local IBM Customer support.       */
  49 /* Directions to find IBM Customer Support for each country can be found at: */
  50 /*      http://www.ibm.com/planetwide/                                       */
  51 /*                                                                           */
  52 /*****************************************************************************/
  53
  54 /*****************************************************************************/
  55 /* Change Log                                                                */
  56 /*                                                                           */
  57 /* 0.99.02  - Breakup commands that are bigger than 8 * the stripe size      */
  58 /* 0.99.03  - Make interrupt routine handle all completed request on the     */
  59 /*            adapter not just the first one                                 */
  60 /*          - Make sure passthru commands get woken up if we run out of      */
  61 /*            SCBs                                                           */
  62 /*          - Send all of the commands on the queue at once rather than      */
  63 /*            one at a time since the card will support it.                  */
  64 /* 0.99.04  - Fix race condition in the passthru mechanism -- this required  */
  65 /*            the interface to the utilities to change                       */
  66 /*          - Fix error recovery code                                        */
  67 /* 0.99.05  - Fix an oops when we get certain passthru commands              */
  68 /* 1.00.00  - Initial Public Release                                         */
  69 /*            Functionally equivalent to 0.99.05                             */
  70 /* 3.60.00  - Bump max commands to 128 for use with firmware 3.60            */
  71 /*          - Change version to 3.60 to coincide with release numbering.     */
  72 /* 3.60.01  - Remove bogus error check in passthru routine                   */
  73 /* 3.60.02  - Make DCDB direction based on lookup table                      */
  74 /*          - Only allow one DCDB command to a SCSI ID at a time             */
  75 /* 4.00.00  - Add support for ServeRAID 4                                    */
  76 /* 4.00.01  - Add support for First Failure Data Capture                     */
  77 /* 4.00.02  - Fix problem with PT DCDB with no buffer                        */
  78 /* 4.00.03  - Add alternative passthru interface                             */
  79 /*          - Add ability to flash BIOS                                      */
  80 /* 4.00.04  - Rename structures/constants to be prefixed with IPS_           */
  81 /* 4.00.05  - Remove wish_block from init routine                            */
  82 /*          - Use linux/spinlock.h instead of asm/spinlock.h for kernels     */
  83 /*            2.3.18 and later                                               */
  84 /*          - Sync with other changes from the 2.3 kernels                   */
  85 /* 4.00.06  - Fix timeout with initial FFDC command                          */
  86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
  87 /* 4.10.00  - Add support for ServeRAID 4M/4L                                */
  88 /* 4.10.13  - Fix for dynamic unload and proc file system                    */
  89 /* 4.20.03  - Rename version to coincide with new release schedules          */
  90 /*            Performance fixes                                              */
  91 /*            Fix truncation of /proc files with cat                         */
  92 /*            Merge in changes through kernel 2.4.0test1ac21                 */
  93 /* 4.20.13  - Fix some failure cases / reset code                            */
  94 /*          - Hook into the reboot_notifier to flush the controller cache    */
  95 /* 4.50.01  - Fix problem when there is a hole in logical drive numbering    */
  96 /* 4.70.09  - Use a Common ( Large Buffer ) for Flashing from the JCRM CD    */
  97 /*          - Add IPSSEND Flash Support                                      */
  98 /*          - Set Sense Data for Unknown SCSI Command                        */
  99 /*          - Use Slot Number from NVRAM Page 5                              */
 100 /*          - Restore caller's DCDB Structure                                */
 101 /* 4.70.12  - Corrective actions for bad controller ( during initialization )*/
 102 /* 4.70.13  - Don't Send CDB's if we already know the device is not present  */
 103 /*          - Don't release HA Lock in ips_next() until SC taken off queue   */
 104 /*          - Unregister SCSI device in ips_release()                        */
 105 /* 4.70.15  - Fix Breakup for very large ( non-SG ) requests in ips_done()   */
 106 /* 4.71.00  - Change all memory allocations to not use GFP_DMA flag          */
 107 /*            Code Clean-Up for 2.4.x kernel                                 */
 108 /* 4.72.00  - Allow for a Scatter-Gather Element to exceed MAX_XFER Size     */
 109 /* 4.72.01  - I/O Mapped Memory release ( so "insmod ips" does not Fail )    */
 110 /*          - Don't Issue Internal FFDC Command if there are Active Commands */
 111 /*          - Close Window for getting too many IOCTL's active               */
 112 /* 4.80.00  - Make ia64 Safe                                                 */
 113 /* 4.80.04  - Eliminate calls to strtok() if 2.4.x or greater                */
 114 /*          - Adjustments to Device Queue Depth                              */
 115 /* 4.80.14  - Take all semaphores off stack                                  */
 116 /*          - Clean Up New_IOCTL path                                        */
 117 /* 4.80.20  - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel )  */
 118 /*          - 5 second delay needed after resetting an i960 adapter          */
 119 /* 4.80.26  - Clean up potential code problems ( Arjan's recommendations )   */
 120 /* 4.90.01  - Version Matching for FirmWare, BIOS, and Driver                */
 121 /* 4.90.05  - Use New PCI Architecture to facilitate Hot Plug Development    */
 122 /* 4.90.08  - Increase Delays in Flashing ( Trombone Only - 4H )             */
 123 /* 4.90.08  - Data Corruption if First Scatter Gather Element is > 64K       */
 124 /* 4.90.11  - Don't actually RESET unless it's physically required           */
 125 /*          - Remove unused compile options                                  */
 126 /* 5.00.01  - Sarasota ( 5i ) adapters must always be scanned first          */
 127 /*          - Get rid on IOCTL_NEW_COMMAND code                              */
 128 /*          - Add Extended DCDB Commands for Tape Support in 5I              */
 129 /* 5.10.12  - use pci_dma interfaces, update for 2.5 kernel changes          */
 130 /* 5.10.15  - remove unused code (sem, macros, etc.)                         */
 131 /* 5.30.00  - use __devexit_p()                                              */
 132 /* 6.00.00  - Add 6x Adapters and Battery Flash                              */
 133 /* 6.10.00  - Remove 1G Addressing Limitations                               */
 134 /* 6.11.xx  - Get VersionInfo buffer off the stack !              DDTS 60401 */
 135 /* 6.11.xx  - Make Logical Drive Info structure safe for DMA      DDTS 60639 */
 136 /* 7.10.18  - Add highmem_io flag in SCSI Templete for 2.4 kernels           */
 137 /*          - Fix path/name for scsi_hosts.h include for 2.6 kernels         */
 138 /*          - Fix sort order of 7k                                           */
 139 /*          - Remove 3 unused "inline" functions                             */
 140 /* 7.12.xx  - Use STATIC functions wherever possible                        */
 141 /*          - Clean up deprecated MODULE_PARM calls                          */
 142 /* 7.12.05  - Remove Version Matching per IBM request                        */
 143 /*****************************************************************************/
 144
 145 /*
 146  * Conditional Compilation directives for this driver:
 147  *
 148  * IPS_DEBUG            - Turn on debugging info
 149  *
 150  * Parameters:
 151  *
 152  * debug:<number>       - Set debug level to <number>
 153  *                        NOTE: only works when IPS_DEBUG compile directive is used.
 154  *       1              - Normal debug messages
 155  *       2              - Verbose debug messages
 156  *       11             - Method trace (non interrupt)
 157  *       12             - Method trace (includes interrupt)
 158  *
 159  * noi2o                - Don't use I2O Queues (ServeRAID 4 only)
 160  * nommap               - Don't use memory mapped I/O
 161  * ioctlsize            - Initial size of the IOCTL buffer
 162  */
 163
 164 #include <asm/io.h>
 165 #include <asm/byteorder.h>
 166 #include <asm/page.h>
 167 #include <linux/stddef.h>
 168 #include <linux/string.h>
 169 #include <linux/errno.h>
 170 #include <linux/kernel.h>
 171 #include <linux/ioport.h>
 172 #include <linux/slab.h>
 173 #include <linux/delay.h>
 174 #include <linux/pci.h>
 175 #include <linux/proc_fs.h>
 176 #include <linux/reboot.h>
 177 #include <linux/interrupt.h>
 178
 179 #include <linux/blkdev.h>
 180 #include <linux/types.h>
 181 #include <linux/dma-mapping.h>
 182
 183 #include <scsi/sg.h>
 184 #include "scsi.h"
 185 #include <scsi/scsi_host.h>
 186
 187 #include "ips.h"
 188
 189 #include <linux/module.h>
 190
 191 #include <linux/stat.h>
 192
 193 #include <linux/spinlock.h>
 194 #include <linux/init.h>
 195
 196 #include <linux/smp.h>
 197
 198 #ifdef MODULE
 199 static char *ips = NULL;
 200 module_param(ips, charp, 0);
 201 #endif
 202
 203 /*
 204  * DRIVER_VER
 205  */
 206 #define IPS_VERSION_HIGH        IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
 207 #define IPS_VERSION_LOW         "." IPS_VER_BUILD_STRING " "
 208
 209 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
 210                          DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
 211                          PCI_DMA_BIDIRECTIONAL : \
 212                          scb->scsi_cmd->sc_data_direction)
 213
 214 #ifdef IPS_DEBUG
 215 #define METHOD_TRACE(s, i)    if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
 216 #define DEBUG(i, s)           if (ips_debug >= i) printk(KERN_NOTICE s "\n");
 217 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
 218 #else
 219 #define METHOD_TRACE(s, i)
 220 #define DEBUG(i, s)
 221 #define DEBUG_VAR(i, s, v...)
 222 #endif
 223
 224 /*
 225  * Function prototypes
 226  */
 227 static int ips_detect(struct scsi_host_template *);
 228 static int ips_release(struct Scsi_Host *);
 229 static int ips_eh_abort(struct scsi_cmnd *);
 230 static int ips_eh_reset(struct scsi_cmnd *);
 231 static int ips_queue(struct Scsi_Host *, struct scsi_cmnd *);
 232 static const char *ips_info(struct Scsi_Host *);
 233 static irqreturn_t do_ipsintr(int, void *);
 234 static int ips_hainit(ips_ha_t *);
 235 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
 236 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
 237 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
 238 static int ips_online(ips_ha_t *, ips_scb_t *);
 239 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
 240 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
 241 static int ips_msense(ips_ha_t *, ips_scb_t *);
 242 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
 243 static int ips_deallocatescbs(ips_ha_t *, int);
 244 static int ips_allocatescbs(ips_ha_t *);
 245 static int ips_reset_copperhead(ips_ha_t *);
 246 static int ips_reset_copperhead_memio(ips_ha_t *);
 247 static int ips_reset_morpheus(ips_ha_t *);
 248 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
 249 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
 250 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
 251 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
 252 static int ips_isintr_copperhead(ips_ha_t *);
 253 static int ips_isintr_copperhead_memio(ips_ha_t *);
 254 static int ips_isintr_morpheus(ips_ha_t *);
 255 static int ips_wait(ips_ha_t *, int, int);
 256 static int ips_write_driver_status(ips_ha_t *, int);
 257 static int ips_read_adapter_status(ips_ha_t *, int);
 258 static int ips_read_subsystem_parameters(ips_ha_t *, int);
 259 static int ips_read_config(ips_ha_t *, int);
 260 static int ips_clear_adapter(ips_ha_t *, int);
 261 static int ips_readwrite_page5(ips_ha_t *, int, int);
 262 static int ips_init_copperhead(ips_ha_t *);
 263 static int ips_init_copperhead_memio(ips_ha_t *);
 264 static int ips_init_morpheus(ips_ha_t *);
 265 static int ips_isinit_copperhead(ips_ha_t *);
 266 static int ips_isinit_copperhead_memio(ips_ha_t *);
 267 static int ips_isinit_morpheus(ips_ha_t *);
 268 static int ips_erase_bios(ips_ha_t *);
 269 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 270 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 271 static int ips_erase_bios_memio(ips_ha_t *);
 272 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 273 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 274 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 275 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 276 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 277 static void ips_free_flash_copperhead(ips_ha_t * ha);
 278 static void ips_get_bios_version(ips_ha_t *, int);
 279 static void ips_identify_controller(ips_ha_t *);
 280 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
 281 static void ips_enable_int_copperhead(ips_ha_t *);
 282 static void ips_enable_int_copperhead_memio(ips_ha_t *);
 283 static void ips_enable_int_morpheus(ips_ha_t *);
 284 static int ips_intr_copperhead(ips_ha_t *);
 285 static int ips_intr_morpheus(ips_ha_t *);
 286 static void ips_next(ips_ha_t *, int);
 287 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
 288 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
 289 static void ips_done(ips_ha_t *, ips_scb_t *);
 290 static void ips_free(ips_ha_t *);
 291 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
 292 static void ips_freescb(ips_ha_t *, ips_scb_t *);
 293 static void ips_setup_funclist(ips_ha_t *);
 294 static void ips_statinit(ips_ha_t *);
 295 static void ips_statinit_memio(ips_ha_t *);
 296 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
 297 static void ips_ffdc_reset(ips_ha_t *, int);
 298 static void ips_ffdc_time(ips_ha_t *);
 299 static uint32_t ips_statupd_copperhead(ips_ha_t *);
 300 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
 301 static uint32_t ips_statupd_morpheus(ips_ha_t *);
 302 static ips_scb_t *ips_getscb(ips_ha_t *);
 303 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
 304 static void ips_putq_wait_tail(ips_wait_queue_t *, struct scsi_cmnd *);
 305 static void ips_putq_copp_tail(ips_copp_queue_t *,
 306                                       ips_copp_wait_item_t *);
 307 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
 308 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
 309 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
 310 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *,
 311                                           struct scsi_cmnd *);
 312 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
 313                                                      ips_copp_wait_item_t *);
 314 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
 315
 316 static int ips_is_passthru(struct scsi_cmnd *);
 317 static int ips_make_passthru(ips_ha_t *, struct scsi_cmnd *, ips_scb_t *, int);
 318 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 319 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
 320 static void ips_scmd_buf_write(struct scsi_cmnd * scmd, void *data,
 321                                unsigned int count);
 322 static void ips_scmd_buf_read(struct scsi_cmnd * scmd, void *data,
 323                               unsigned int count);
 324
 325 static int ips_write_info(struct Scsi_Host *, char *, int);
 326 static int ips_show_info(struct seq_file *, struct Scsi_Host *);
 327 static int ips_host_info(ips_ha_t *, struct seq_file *);
 328 static int ips_abort_init(ips_ha_t * ha, int index);
 329 static int ips_init_phase2(int index);
 330
 331 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
 332 static int ips_register_scsi(int index);
 333
 334 static int  ips_poll_for_flush_complete(ips_ha_t * ha);
 335 static void ips_flush_and_reset(ips_ha_t *ha);
 336
 337 /*
 338  * global variables
 339  */
 340 static const char ips_name[] = "ips";
 341 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS];      /* Array of host controller structures */
 342 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS];      /* Array of HA structures */
 343 static unsigned int ips_next_controller;
 344 static unsigned int ips_num_controllers;
 345 static unsigned int ips_released_controllers;
 346 static int ips_hotplug;
 347 static int ips_cmd_timeout = 60;
 348 static int ips_reset_timeout = 60 * 5;
 349 static int ips_force_memio = 1;         /* Always use Memory Mapped I/O    */
 350 static int ips_force_i2o = 1;   /* Always use I2O command delivery */
 351 static int ips_ioctlsize = IPS_IOCTL_SIZE;      /* Size of the ioctl buffer        */
 352 static int ips_cd_boot;                 /* Booting from Manager CD         */
 353 static char *ips_FlashData = NULL;      /* CD Boot - Flash Data Buffer      */
 354 static dma_addr_t ips_flashbusaddr;
 355 static long ips_FlashDataInUse;         /* CD Boot - Flash Data In Use Flag */
 356 static uint32_t MaxLiteCmds = 32;       /* Max Active Cmds for a Lite Adapter */
 357 static struct scsi_host_template ips_driver_template = {
 358         .detect                 = ips_detect,
 359         .release                = ips_release,
 360         .info                   = ips_info,
 361         .queuecommand           = ips_queue,
 362         .eh_abort_handler       = ips_eh_abort,
 363         .eh_host_reset_handler  = ips_eh_reset,
 364         .proc_name              = "ips",
 365         .show_info              = ips_show_info,
 366         .write_info             = ips_write_info,
 367         .slave_configure        = ips_slave_configure,
 368         .bios_param             = ips_biosparam,
 369         .this_id                = -1,
 370         .sg_tablesize           = IPS_MAX_SG,
 371         .cmd_per_lun            = 3,
 372         .use_clustering         = ENABLE_CLUSTERING,
 373         .no_write_same          = 1,
 374 };
 375
 376
 377 /* This table describes all ServeRAID Adapters */
 378 static struct  pci_device_id  ips_pci_table[] = {
 379         { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 380         { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 381         { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 382         { 0, }
 383 };
 384
 385 MODULE_DEVICE_TABLE( pci, ips_pci_table );
 386
 387 static char ips_hot_plug_name[] = "ips";
 388
 389 static int  ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
 390 static void ips_remove_device(struct pci_dev *pci_dev);
 391
 392 static struct pci_driver ips_pci_driver = {
 393         .name           = ips_hot_plug_name,
 394         .id_table       = ips_pci_table,
 395         .probe          = ips_insert_device,
 396         .remove         = ips_remove_device,
 397 };
 398
 399
 400 /*
 401  * Necessary forward function protoypes
 402  */
 403 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
 404
 405 #define MAX_ADAPTER_NAME 15
 406
 407 static char ips_adapter_name[][30] = {
 408         "ServeRAID",
 409         "ServeRAID II",
 410         "ServeRAID on motherboard",
 411         "ServeRAID on motherboard",
 412         "ServeRAID 3H",
 413         "ServeRAID 3L",
 414         "ServeRAID 4H",
 415         "ServeRAID 4M",
 416         "ServeRAID 4L",
 417         "ServeRAID 4Mx",
 418         "ServeRAID 4Lx",
 419         "ServeRAID 5i",
 420         "ServeRAID 5i",
 421         "ServeRAID 6M",
 422         "ServeRAID 6i",
 423         "ServeRAID 7t",
 424         "ServeRAID 7k",
 425         "ServeRAID 7M"
 426 };
 427
 428 static struct notifier_block ips_notifier = {
 429         ips_halt, NULL, 0
 430 };
 431
 432 /*
 433  * Direction table
 434  */
 435 static char ips_command_direction[] = {
 436         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
 437         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
 438         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 439         IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 440         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
 441         IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 442         IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
 443         IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 444         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
 445         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 446         IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
 447         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 448         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
 449         IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
 450         IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
 451         IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 452         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 453         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 454         IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 455         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 456         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 457         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 458         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 459         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 460         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 461         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 462         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 463         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 464         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 465         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 466         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 467         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 468         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 469         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
 470         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
 471         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
 472         IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
 473         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 474         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 475         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 476         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 477         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 478         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 479         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 480         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 481         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 482         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
 483         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 484         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 485         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 486         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
 487 };
 488
 489
 490 /****************************************************************************/
 491 /*                                                                          */
 492 /* Routine Name: ips_setup                                                  */
 493 /*                                                                          */
 494 /* Routine Description:                                                     */
 495 /*                                                                          */
 496 /*   setup parameters to the driver                                         */
 497 /*                                                                          */
 498 /****************************************************************************/
 499 static int
 500 ips_setup(char *ips_str)
 501 {
 502
 503         int i;
 504         char *key;
 505         char *value;
 506         IPS_OPTION options[] = {
 507                 {"noi2o", &ips_force_i2o, 0},
 508                 {"nommap", &ips_force_memio, 0},
 509                 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
 510                 {"cdboot", &ips_cd_boot, 0},
 511                 {"maxcmds", &MaxLiteCmds, 32},
 512         };
 513
 514         /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
 515         /* Search for value */
 516         while ((key = strsep(&ips_str, ",."))) {
 517                 if (!*key)
 518                         continue;
 519                 value = strchr(key, ':');
 520                 if (value)
 521                         *value++ = '\0';
 522                 /*
 523                  * We now have key/value pairs.
 524                  * Update the variables
 525                  */
 526                 for (i = 0; i < ARRAY_SIZE(options); i++) {
 527                         if (strncasecmp
 528                             (key, options[i].option_name,
 529                              strlen(options[i].option_name)) == 0) {
 530                                 if (value)
 531                                         *options[i].option_flag =
 532                                             simple_strtoul(value, NULL, 0);
 533                                 else
 534                                         *options[i].option_flag =
 535                                             options[i].option_value;
 536                                 break;
 537                         }
 538                 }
 539         }
 540
 541         return (1);
 542 }
 543
 544 __setup("ips=", ips_setup);
 545
 546 /****************************************************************************/
 547 /*                                                                          */
 548 /* Routine Name: ips_detect                                                 */
 549 /*                                                                          */
 550 /* Routine Description:                                                     */
 551 /*                                                                          */
 552 /*   Detect and initialize the driver                                       */
 553 /*                                                                          */
 554 /* NOTE: this routine is called under the io_request_lock spinlock          */
 555 /*                                                                          */
 556 /****************************************************************************/
 557 static int
 558 ips_detect(struct scsi_host_template * SHT)
 559 {
 560         int i;
 561
 562         METHOD_TRACE("ips_detect", 1);
 563
 564 #ifdef MODULE
 565         if (ips)
 566                 ips_setup(ips);
 567 #endif
 568
 569         for (i = 0; i < ips_num_controllers; i++) {
 570                 if (ips_register_scsi(i))
 571                         ips_free(ips_ha[i]);
 572                 ips_released_controllers++;
 573         }
 574         ips_hotplug = 1;
 575         return (ips_num_controllers);
 576 }
 577
 578 /****************************************************************************/
 579 /*   configure the function pointers to use the functions that will work    */
 580 /*   with the found version of the adapter                                  */
 581 /****************************************************************************/
 582 static void
 583 ips_setup_funclist(ips_ha_t * ha)
 584 {
 585
 586         /*
 587          * Setup Functions
 588          */
 589         if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
 590                 /* morpheus / marco / sebring */
 591                 ha->func.isintr = ips_isintr_morpheus;
 592                 ha->func.isinit = ips_isinit_morpheus;
 593                 ha->func.issue = ips_issue_i2o_memio;
 594                 ha->func.init = ips_init_morpheus;
 595                 ha->func.statupd = ips_statupd_morpheus;
 596                 ha->func.reset = ips_reset_morpheus;
 597                 ha->func.intr = ips_intr_morpheus;
 598                 ha->func.enableint = ips_enable_int_morpheus;
 599         } else if (IPS_USE_MEMIO(ha)) {
 600                 /* copperhead w/MEMIO */
 601                 ha->func.isintr = ips_isintr_copperhead_memio;
 602                 ha->func.isinit = ips_isinit_copperhead_memio;
 603                 ha->func.init = ips_init_copperhead_memio;
 604                 ha->func.statupd = ips_statupd_copperhead_memio;
 605                 ha->func.statinit = ips_statinit_memio;
 606                 ha->func.reset = ips_reset_copperhead_memio;
 607                 ha->func.intr = ips_intr_copperhead;
 608                 ha->func.erasebios = ips_erase_bios_memio;
 609                 ha->func.programbios = ips_program_bios_memio;
 610                 ha->func.verifybios = ips_verify_bios_memio;
 611                 ha->func.enableint = ips_enable_int_copperhead_memio;
 612                 if (IPS_USE_I2O_DELIVER(ha))
 613                         ha->func.issue = ips_issue_i2o_memio;
 614                 else
 615                         ha->func.issue = ips_issue_copperhead_memio;
 616         } else {
 617                 /* copperhead */
 618                 ha->func.isintr = ips_isintr_copperhead;
 619                 ha->func.isinit = ips_isinit_copperhead;
 620                 ha->func.init = ips_init_copperhead;
 621                 ha->func.statupd = ips_statupd_copperhead;
 622                 ha->func.statinit = ips_statinit;
 623                 ha->func.reset = ips_reset_copperhead;
 624                 ha->func.intr = ips_intr_copperhead;
 625                 ha->func.erasebios = ips_erase_bios;
 626                 ha->func.programbios = ips_program_bios;
 627                 ha->func.verifybios = ips_verify_bios;
 628                 ha->func.enableint = ips_enable_int_copperhead;
 629
 630                 if (IPS_USE_I2O_DELIVER(ha))
 631                         ha->func.issue = ips_issue_i2o;
 632                 else
 633                         ha->func.issue = ips_issue_copperhead;
 634         }
 635 }
 636
 637 /****************************************************************************/
 638 /*                                                                          */
 639 /* Routine Name: ips_release                                                */
 640 /*                                                                          */
 641 /* Routine Description:                                                     */
 642 /*                                                                          */
 643 /*   Remove a driver                                                        */
 644 /*                                                                          */
 645 /****************************************************************************/
 646 static int
 647 ips_release(struct Scsi_Host *sh)
 648 {
 649         ips_scb_t *scb;
 650         ips_ha_t *ha;
 651         int i;
 652
 653         METHOD_TRACE("ips_release", 1);
 654
 655         scsi_remove_host(sh);
 656
 657         for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
 658
 659         if (i == IPS_MAX_ADAPTERS) {
 660                 printk(KERN_WARNING
 661                        "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
 662                 BUG();
 663                 return (FALSE);
 664         }
 665
 666         ha = IPS_HA(sh);
 667
 668         if (!ha)
 669                 return (FALSE);
 670
 671         /* flush the cache on the controller */
 672         scb = &ha->scbs[ha->max_cmds - 1];
 673
 674         ips_init_scb(ha, scb);
 675
 676         scb->timeout = ips_cmd_timeout;
 677         scb->cdb[0] = IPS_CMD_FLUSH;
 678
 679         scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 680         scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 681         scb->cmd.flush_cache.state = IPS_NORM_STATE;
 682         scb->cmd.flush_cache.reserved = 0;
 683         scb->cmd.flush_cache.reserved2 = 0;
 684         scb->cmd.flush_cache.reserved3 = 0;
 685         scb->cmd.flush_cache.reserved4 = 0;
 686
 687         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 688
 689         /* send command */
 690         if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
 691                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
 692
 693         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
 694
 695         ips_sh[i] = NULL;
 696         ips_ha[i] = NULL;
 697
 698         /* free extra memory */
 699         ips_free(ha);
 700
 701         /* free IRQ */
 702         free_irq(ha->pcidev->irq, ha);
 703
 704         scsi_host_put(sh);
 705
 706         ips_released_controllers++;
 707
 708         return (FALSE);
 709 }
 710
 711 /****************************************************************************/
 712 /*                                                                          */
 713 /* Routine Name: ips_halt                                                   */
 714 /*                                                                          */
 715 /* Routine Description:                                                     */
 716 /*                                                                          */
 717 /*   Perform cleanup when the system reboots                                */
 718 /*                                                                          */
 719 /****************************************************************************/
 720 static int
 721 ips_halt(struct notifier_block *nb, ulong event, void *buf)
 722 {
 723         ips_scb_t *scb;
 724         ips_ha_t *ha;
 725         int i;
 726
 727         if ((event != SYS_RESTART) && (event != SYS_HALT) &&
 728             (event != SYS_POWER_OFF))
 729                 return (NOTIFY_DONE);
 730
 731         for (i = 0; i < ips_next_controller; i++) {
 732                 ha = (ips_ha_t *) ips_ha[i];
 733
 734                 if (!ha)
 735                         continue;
 736
 737                 if (!ha->active)
 738                         continue;
 739
 740                 /* flush the cache on the controller */
 741                 scb = &ha->scbs[ha->max_cmds - 1];
 742
 743                 ips_init_scb(ha, scb);
 744
 745                 scb->timeout = ips_cmd_timeout;
 746                 scb->cdb[0] = IPS_CMD_FLUSH;
 747
 748                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 749                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 750                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 751                 scb->cmd.flush_cache.reserved = 0;
 752                 scb->cmd.flush_cache.reserved2 = 0;
 753                 scb->cmd.flush_cache.reserved3 = 0;
 754                 scb->cmd.flush_cache.reserved4 = 0;
 755
 756                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 757
 758                 /* send command */
 759                 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
 760                     IPS_FAILURE)
 761                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 762                                    "Incomplete Flush.\n");
 763                 else
 764                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 765                                    "Flushing Complete.\n");
 766         }
 767
 768         return (NOTIFY_OK);
 769 }
 770
 771 /****************************************************************************/
 772 /*                                                                          */
 773 /* Routine Name: ips_eh_abort                                               */
 774 /*                                                                          */
 775 /* Routine Description:                                                     */
 776 /*                                                                          */
 777 /*   Abort a command (using the new error code stuff)                       */
 778 /* Note: this routine is called under the io_request_lock                   */
 779 /****************************************************************************/
 780 int ips_eh_abort(struct scsi_cmnd *SC)
 781 {
 782         ips_ha_t *ha;
 783         ips_copp_wait_item_t *item;
 784         int ret;
 785         struct Scsi_Host *host;
 786
 787         METHOD_TRACE("ips_eh_abort", 1);
 788
 789         if (!SC)
 790                 return (FAILED);
 791
 792         host = SC->device->host;
 793         ha = (ips_ha_t *) SC->device->host->hostdata;
 794
 795         if (!ha)
 796                 return (FAILED);
 797
 798         if (!ha->active)
 799                 return (FAILED);
 800
 801         spin_lock(host->host_lock);
 802
 803         /* See if the command is on the copp queue */
 804         item = ha->copp_waitlist.head;
 805         while ((item) && (item->scsi_cmd != SC))
 806                 item = item->next;
 807
 808         if (item) {
 809                 /* Found it */
 810                 ips_removeq_copp(&ha->copp_waitlist, item);
 811                 ret = (SUCCESS);
 812
 813                 /* See if the command is on the wait queue */
 814         } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 815                 /* command not sent yet */
 816                 ret = (SUCCESS);
 817         } else {
 818                 /* command must have already been sent */
 819                 ret = (FAILED);
 820         }
 821
 822         spin_unlock(host->host_lock);
 823         return ret;
 824 }
 825
 826 /****************************************************************************/
 827 /*                                                                          */
 828 /* Routine Name: ips_eh_reset                                               */
 829 /*                                                                          */
 830 /* Routine Description:                                                     */
 831 /*                                                                          */
 832 /*   Reset the controller (with new eh error code)                          */
 833 /*                                                                          */
 834 /* NOTE: this routine is called under the io_request_lock spinlock          */
 835 /*                                                                          */
 836 /****************************************************************************/
 837 static int __ips_eh_reset(struct scsi_cmnd *SC)
 838 {
 839         int ret;
 840         int i;
 841         ips_ha_t *ha;
 842         ips_scb_t *scb;
 843         ips_copp_wait_item_t *item;
 844
 845         METHOD_TRACE("ips_eh_reset", 1);
 846
 847 #ifdef NO_IPS_RESET
 848         return (FAILED);
 849 #else
 850
 851         if (!SC) {
 852                 DEBUG(1, "Reset called with NULL scsi command");
 853
 854                 return (FAILED);
 855         }
 856
 857         ha = (ips_ha_t *) SC->device->host->hostdata;
 858
 859         if (!ha) {
 860                 DEBUG(1, "Reset called with NULL ha struct");
 861
 862                 return (FAILED);
 863         }
 864
 865         if (!ha->active)
 866                 return (FAILED);
 867
 868         /* See if the command is on the copp queue */
 869         item = ha->copp_waitlist.head;
 870         while ((item) && (item->scsi_cmd != SC))
 871                 item = item->next;
 872
 873         if (item) {
 874                 /* Found it */
 875                 ips_removeq_copp(&ha->copp_waitlist, item);
 876                 return (SUCCESS);
 877         }
 878
 879         /* See if the command is on the wait queue */
 880         if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 881                 /* command not sent yet */
 882                 return (SUCCESS);
 883         }
 884
 885         /* An explanation for the casual observer:                              */
 886         /* Part of the function of a RAID controller is automatic error         */
 887         /* detection and recovery.  As such, the only problem that physically   */
 888         /* resetting an adapter will ever fix is when, for some reason,         */
 889         /* the driver is not successfully communicating with the adapter.       */
 890         /* Therefore, we will attempt to flush this adapter.  If that succeeds, */
 891         /* then there's no real purpose in a physical reset. This will complete */
 892         /* much faster and avoids any problems that might be caused by a        */
 893         /* physical reset ( such as having to fail all the outstanding I/O's ). */
 894
 895         if (ha->ioctl_reset == 0) {     /* IF Not an IOCTL Requested Reset */
 896                 scb = &ha->scbs[ha->max_cmds - 1];
 897
 898                 ips_init_scb(ha, scb);
 899
 900                 scb->timeout = ips_cmd_timeout;
 901                 scb->cdb[0] = IPS_CMD_FLUSH;
 902
 903                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 904                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 905                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 906                 scb->cmd.flush_cache.reserved = 0;
 907                 scb->cmd.flush_cache.reserved2 = 0;
 908                 scb->cmd.flush_cache.reserved3 = 0;
 909                 scb->cmd.flush_cache.reserved4 = 0;
 910
 911                 /* Attempt the flush command */
 912                 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
 913                 if (ret == IPS_SUCCESS) {
 914                         IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 915                                    "Reset Request - Flushed Cache\n");
 916                         return (SUCCESS);
 917                 }
 918         }
 919
 920         /* Either we can't communicate with the adapter or it's an IOCTL request */
 921         /* from a utility.  A physical reset is needed at this point.            */
 922
 923         ha->ioctl_reset = 0;    /* Reset the IOCTL Requested Reset Flag */
 924
 925         /*
 926          * command must have already been sent
 927          * reset the controller
 928          */
 929         IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
 930         ret = (*ha->func.reset) (ha);
 931
 932         if (!ret) {
 933                 struct scsi_cmnd *scsi_cmd;
 934
 935                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 936                            "Controller reset failed - controller now offline.\n");
 937
 938                 /* Now fail all of the active commands */
 939                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 940                           ips_name, ha->host_num);
 941
 942                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 943                         scb->scsi_cmd->result = DID_ERROR << 16;
 944                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 945                         ips_freescb(ha, scb);
 946                 }
 947
 948                 /* Now fail all of the pending commands */
 949                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 950                           ips_name, ha->host_num);
 951
 952                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 953                         scsi_cmd->result = DID_ERROR;
 954                         scsi_cmd->scsi_done(scsi_cmd);
 955                 }
 956
 957                 ha->active = FALSE;
 958                 return (FAILED);
 959         }
 960
 961         if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
 962                 struct scsi_cmnd *scsi_cmd;
 963
 964                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 965                            "Controller reset failed - controller now offline.\n");
 966
 967                 /* Now fail all of the active commands */
 968                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 969                           ips_name, ha->host_num);
 970
 971                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 972                         scb->scsi_cmd->result = DID_ERROR << 16;
 973                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 974                         ips_freescb(ha, scb);
 975                 }
 976
 977                 /* Now fail all of the pending commands */
 978                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 979                           ips_name, ha->host_num);
 980
 981                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 982                         scsi_cmd->result = DID_ERROR << 16;
 983                         scsi_cmd->scsi_done(scsi_cmd);
 984                 }
 985
 986                 ha->active = FALSE;
 987                 return (FAILED);
 988         }
 989
 990         /* FFDC */
 991         if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
 992                 struct timeval tv;
 993
 994                 do_gettimeofday(&tv);
 995                 ha->last_ffdc = tv.tv_sec;
 996                 ha->reset_count++;
 997                 ips_ffdc_reset(ha, IPS_INTR_IORL);
 998         }
 999
1000         /* Now fail all of the active commands */
1001         DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1002
1003         while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1004                 scb->scsi_cmd->result = DID_RESET << 16;
1005                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1006                 ips_freescb(ha, scb);
1007         }
1008
1009         /* Reset DCDB active command bits */
1010         for (i = 1; i < ha->nbus; i++)
1011                 ha->dcdb_active[i - 1] = 0;
1012
1013         /* Reset the number of active IOCTLs */
1014         ha->num_ioctl = 0;
1015
1016         ips_next(ha, IPS_INTR_IORL);
1017
1018         return (SUCCESS);
1019 #endif                          /* NO_IPS_RESET */
1020
1021 }
1022
1023 static int ips_eh_reset(struct scsi_cmnd *SC)
1024 {
1025         int rc;
1026
1027         spin_lock_irq(SC->device->host->host_lock);
1028         rc = __ips_eh_reset(SC);
1029         spin_unlock_irq(SC->device->host->host_lock);
1030
1031         return rc;
1032 }
1033
1034 /****************************************************************************/
1035 /*                                                                          */
1036 /* Routine Name: ips_queue                                                  */
1037 /*                                                                          */
1038 /* Routine Description:                                                     */
1039 /*                                                                          */
1040 /*   Send a command to the controller                                       */
1041 /*                                                                          */
1042 /* NOTE:                                                                    */
1043 /*    Linux obtains io_request_lock before calling this function            */
1044 /*                                                                          */
1045 /****************************************************************************/
1046 static int ips_queue_lck(struct scsi_cmnd *SC, void (*done) (struct scsi_cmnd *))
1047 {
1048         ips_ha_t *ha;
1049         ips_passthru_t *pt;
1050
1051         METHOD_TRACE("ips_queue", 1);
1052
1053         ha = (ips_ha_t *) SC->device->host->hostdata;
1054
1055         if (!ha)
1056                 return (1);
1057
1058         if (!ha->active)
1059                 return (DID_ERROR);
1060
1061         if (ips_is_passthru(SC)) {
1062                 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1063                         SC->result = DID_BUS_BUSY << 16;
1064                         done(SC);
1065
1066                         return (0);
1067                 }
1068         } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1069                 SC->result = DID_BUS_BUSY << 16;
1070                 done(SC);
1071
1072                 return (0);
1073         }
1074
1075         SC->scsi_done = done;
1076
1077         DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1078                   ips_name,
1079                   ha->host_num,
1080                   SC->cmnd[0],
1081                   SC->device->channel, SC->device->id, SC->device->lun);
1082
1083         /* Check for command to initiator IDs */
1084         if ((scmd_channel(SC) > 0)
1085             && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1086                 SC->result = DID_NO_CONNECT << 16;
1087                 done(SC);
1088
1089                 return (0);
1090         }
1091
1092         if (ips_is_passthru(SC)) {
1093
1094                 ips_copp_wait_item_t *scratch;
1095
1096                 /* A Reset IOCTL is only sent by the boot CD in extreme cases.           */
1097                 /* There can never be any system activity ( network or disk ), but check */
1098                 /* anyway just as a good practice.                                       */
1099                 pt = (ips_passthru_t *) scsi_sglist(SC);
1100                 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1101                     (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1102                         if (ha->scb_activelist.count != 0) {
1103                                 SC->result = DID_BUS_BUSY << 16;
1104                                 done(SC);
1105                                 return (0);
1106                         }
1107                         ha->ioctl_reset = 1;    /* This reset request is from an IOCTL */
1108                         __ips_eh_reset(SC);
1109                         SC->result = DID_OK << 16;
1110                         SC->scsi_done(SC);
1111                         return (0);
1112                 }
1113
1114                 /* allocate space for the scribble */
1115                 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1116
1117                 if (!scratch) {
1118                         SC->result = DID_ERROR << 16;
1119                         done(SC);
1120
1121                         return (0);
1122                 }
1123
1124                 scratch->scsi_cmd = SC;
1125                 scratch->next = NULL;
1126
1127                 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1128         } else {
1129                 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1130         }
1131
1132         ips_next(ha, IPS_INTR_IORL);
1133
1134         return (0);
1135 }
1136
1137 static DEF_SCSI_QCMD(ips_queue)
1138
1139 /****************************************************************************/
1140 /*                                                                          */
1141 /* Routine Name: ips_biosparam                                              */
1142 /*                                                                          */
1143 /* Routine Description:                                                     */
1144 /*                                                                          */
1145 /*   Set bios geometry for the controller                                   */
1146 /*                                                                          */
1147 /****************************************************************************/
1148 static int ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1149                          sector_t capacity, int geom[])
1150 {
1151         ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1152         int heads;
1153         int sectors;
1154         int cylinders;
1155
1156         METHOD_TRACE("ips_biosparam", 1);
1157
1158         if (!ha)
1159                 /* ?!?! host adater info invalid */
1160                 return (0);
1161
1162         if (!ha->active)
1163                 return (0);
1164
1165         if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1166                 /* ?!?! Enquiry command failed */
1167                 return (0);
1168
1169         if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1170                 heads = IPS_NORM_HEADS;
1171                 sectors = IPS_NORM_SECTORS;
1172         } else {
1173                 heads = IPS_COMP_HEADS;
1174                 sectors = IPS_COMP_SECTORS;
1175         }
1176
1177         cylinders = (unsigned long) capacity / (heads * sectors);
1178
1179         DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1180                   heads, sectors, cylinders);
1181
1182         geom[0] = heads;
1183         geom[1] = sectors;
1184         geom[2] = cylinders;
1185
1186         return (0);
1187 }
1188
1189 /****************************************************************************/
1190 /*                                                                          */
1191 /* Routine Name: ips_slave_configure                                        */
1192 /*                                                                          */
1193 /* Routine Description:                                                     */
1194 /*                                                                          */
1195 /*   Set queue depths on devices once scan is complete                      */
1196 /*                                                                          */
1197 /****************************************************************************/
1198 static int
1199 ips_slave_configure(struct scsi_device * SDptr)
1200 {
1201         ips_ha_t *ha;
1202         int min;
1203
1204         ha = IPS_HA(SDptr->host);
1205         if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1206                 min = ha->max_cmds / 2;
1207                 if (ha->enq->ucLogDriveCount <= 2)
1208                         min = ha->max_cmds - 1;
1209                 scsi_change_queue_depth(SDptr, min);
1210         }
1211
1212         SDptr->skip_ms_page_8 = 1;
1213         SDptr->skip_ms_page_3f = 1;
1214         return 0;
1215 }
1216
1217 /****************************************************************************/
1218 /*                                                                          */
1219 /* Routine Name: do_ipsintr                                                 */
1220 /*                                                                          */
1221 /* Routine Description:                                                     */
1222 /*                                                                          */
1223 /*   Wrapper for the interrupt handler                                      */
1224 /*                                                                          */
1225 /****************************************************************************/
1226 static irqreturn_t
1227 do_ipsintr(int irq, void *dev_id)
1228 {
1229         ips_ha_t *ha;
1230         struct Scsi_Host *host;
1231         int irqstatus;
1232
1233         METHOD_TRACE("do_ipsintr", 2);
1234
1235         ha = (ips_ha_t *) dev_id;
1236         if (!ha)
1237                 return IRQ_NONE;
1238         host = ips_sh[ha->host_num];
1239         /* interrupt during initialization */
1240         if (!host) {
1241                 (*ha->func.intr) (ha);
1242                 return IRQ_HANDLED;
1243         }
1244
1245         spin_lock(host->host_lock);
1246
1247         if (!ha->active) {
1248                 spin_unlock(host->host_lock);
1249                 return IRQ_HANDLED;
1250         }
1251
1252         irqstatus = (*ha->func.intr) (ha);
1253
1254         spin_unlock(host->host_lock);
1255
1256         /* start the next command */
1257         ips_next(ha, IPS_INTR_ON);
1258         return IRQ_RETVAL(irqstatus);
1259 }
1260
1261 /****************************************************************************/
1262 /*                                                                          */
1263 /* Routine Name: ips_intr_copperhead                                        */
1264 /*                                                                          */
1265 /* Routine Description:                                                     */
1266 /*                                                                          */
1267 /*   Polling interrupt handler                                              */
1268 /*                                                                          */
1269 /*   ASSUMES interrupts are disabled                                        */
1270 /*                                                                          */
1271 /****************************************************************************/
1272 int
1273 ips_intr_copperhead(ips_ha_t * ha)
1274 {
1275         ips_stat_t *sp;
1276         ips_scb_t *scb;
1277         IPS_STATUS cstatus;
1278         int intrstatus;
1279
1280         METHOD_TRACE("ips_intr", 2);
1281
1282         if (!ha)
1283                 return 0;
1284
1285         if (!ha->active)
1286                 return 0;
1287
1288         intrstatus = (*ha->func.isintr) (ha);
1289
1290         if (!intrstatus) {
1291                 /*
1292                  * Unexpected/Shared interrupt
1293                  */
1294
1295                 return 0;
1296         }
1297
1298         while (TRUE) {
1299                 sp = &ha->sp;
1300
1301                 intrstatus = (*ha->func.isintr) (ha);
1302
1303                 if (!intrstatus)
1304                         break;
1305                 else
1306                         cstatus.value = (*ha->func.statupd) (ha);
1307
1308                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1309                         /* Spurious Interrupt ? */
1310                         continue;
1311                 }
1312
1313                 ips_chkstatus(ha, &cstatus);
1314                 scb = (ips_scb_t *) sp->scb_addr;
1315
1316                 /*
1317                  * use the callback function to finish things up
1318                  * NOTE: interrupts are OFF for this
1319                  */
1320                 (*scb->callback) (ha, scb);
1321         }                       /* end while */
1322         return 1;
1323 }
1324
1325 /****************************************************************************/
1326 /*                                                                          */
1327 /* Routine Name: ips_intr_morpheus                                          */
1328 /*                                                                          */
1329 /* Routine Description:                                                     */
1330 /*                                                                          */
1331 /*   Polling interrupt handler                                              */
1332 /*                                                                          */
1333 /*   ASSUMES interrupts are disabled                                        */
1334 /*                                                                          */
1335 /****************************************************************************/
1336 int
1337 ips_intr_morpheus(ips_ha_t * ha)
1338 {
1339         ips_stat_t *sp;
1340         ips_scb_t *scb;
1341         IPS_STATUS cstatus;
1342         int intrstatus;
1343
1344         METHOD_TRACE("ips_intr_morpheus", 2);
1345
1346         if (!ha)
1347                 return 0;
1348
1349         if (!ha->active)
1350                 return 0;
1351
1352         intrstatus = (*ha->func.isintr) (ha);
1353
1354         if (!intrstatus) {
1355                 /*
1356                  * Unexpected/Shared interrupt
1357                  */
1358
1359                 return 0;
1360         }
1361
1362         while (TRUE) {
1363                 sp = &ha->sp;
1364
1365                 intrstatus = (*ha->func.isintr) (ha);
1366
1367                 if (!intrstatus)
1368                         break;
1369                 else
1370                         cstatus.value = (*ha->func.statupd) (ha);
1371
1372                 if (cstatus.value == 0xffffffff)
1373                         /* No more to process */
1374                         break;
1375
1376                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1377                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1378                                    "Spurious interrupt; no ccb.\n");
1379
1380                         continue;
1381                 }
1382
1383                 ips_chkstatus(ha, &cstatus);
1384                 scb = (ips_scb_t *) sp->scb_addr;
1385
1386                 /*
1387                  * use the callback function to finish things up
1388                  * NOTE: interrupts are OFF for this
1389                  */
1390                 (*scb->callback) (ha, scb);
1391         }                       /* end while */
1392         return 1;
1393 }
1394
1395 /****************************************************************************/
1396 /*                                                                          */
1397 /* Routine Name: ips_info                                                   */
1398 /*                                                                          */
1399 /* Routine Description:                                                     */
1400 /*                                                                          */
1401 /*   Return info about the driver                                           */
1402 /*                                                                          */
1403 /****************************************************************************/
1404 static const char *
1405 ips_info(struct Scsi_Host *SH)
1406 {
1407         static char buffer[256];
1408         char *bp;
1409         ips_ha_t *ha;
1410
1411         METHOD_TRACE("ips_info", 1);
1412
1413         ha = IPS_HA(SH);
1414
1415         if (!ha)
1416                 return (NULL);
1417
1418         bp = &buffer[0];
1419         memset(bp, 0, sizeof (buffer));
1420
1421         sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1422                 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1423
1424         if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1425                 strcat(bp, " <");
1426                 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1427                 strcat(bp, ">");
1428         }
1429
1430         return (bp);
1431 }
1432
1433 static int
1434 ips_write_info(struct Scsi_Host *host, char *buffer, int length)
1435 {
1436         int i;
1437         ips_ha_t *ha = NULL;
1438
1439         /* Find our host structure */
1440         for (i = 0; i < ips_next_controller; i++) {
1441                 if (ips_sh[i]) {
1442                         if (ips_sh[i] == host) {
1443                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1444                                 break;
1445                         }
1446                 }
1447         }
1448
1449         if (!ha)
1450                 return (-EINVAL);
1451
1452         return 0;
1453 }
1454
1455 static int
1456 ips_show_info(struct seq_file *m, struct Scsi_Host *host)
1457 {
1458         int i;
1459         ips_ha_t *ha = NULL;
1460
1461         /* Find our host structure */
1462         for (i = 0; i < ips_next_controller; i++) {
1463                 if (ips_sh[i]) {
1464                         if (ips_sh[i] == host) {
1465                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1466                                 break;
1467                         }
1468                 }
1469         }
1470
1471         if (!ha)
1472                 return (-EINVAL);
1473
1474         return ips_host_info(ha, m);
1475 }
1476
1477 /*--------------------------------------------------------------------------*/
1478 /* Helper Functions                                                         */
1479 /*--------------------------------------------------------------------------*/
1480
1481 /****************************************************************************/
1482 /*                                                                          */
1483 /* Routine Name: ips_is_passthru                                            */
1484 /*                                                                          */
1485 /* Routine Description:                                                     */
1486 /*                                                                          */
1487 /*   Determine if the specified SCSI command is really a passthru command   */
1488 /*                                                                          */
1489 /****************************************************************************/
1490 static int ips_is_passthru(struct scsi_cmnd *SC)
1491 {
1492         unsigned long flags;
1493
1494         METHOD_TRACE("ips_is_passthru", 1);
1495
1496         if (!SC)
1497                 return (0);
1498
1499         if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1500             (SC->device->channel == 0) &&
1501             (SC->device->id == IPS_ADAPTER_ID) &&
1502             (SC->device->lun == 0) && scsi_sglist(SC)) {
1503                 struct scatterlist *sg = scsi_sglist(SC);
1504                 char  *buffer;
1505
1506                 /* kmap_atomic() ensures addressability of the user buffer.*/
1507                 /* local_irq_save() protects the KM_IRQ0 address slot.     */
1508                 local_irq_save(flags);
1509                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
1510                 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1511                     buffer[2] == 'P' && buffer[3] == 'P') {
1512                         kunmap_atomic(buffer - sg->offset);
1513                         local_irq_restore(flags);
1514                         return 1;
1515                 }
1516                 kunmap_atomic(buffer - sg->offset);
1517                 local_irq_restore(flags);
1518         }
1519         return 0;
1520 }
1521
1522 /****************************************************************************/
1523 /*                                                                          */
1524 /* Routine Name: ips_alloc_passthru_buffer                                  */
1525 /*                                                                          */
1526 /* Routine Description:                                                     */
1527 /*   allocate a buffer large enough for the ioctl data if the ioctl buffer  */
1528 /*   is too small or doesn't exist                                          */
1529 /****************************************************************************/
1530 static int
1531 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1532 {
1533         void *bigger_buf;
1534         dma_addr_t dma_busaddr;
1535
1536         if (ha->ioctl_data && length <= ha->ioctl_len)
1537                 return 0;
1538         /* there is no buffer or it's not big enough, allocate a new one */
1539         bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1540         if (bigger_buf) {
1541                 /* free the old memory */
1542                 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1543                                     ha->ioctl_busaddr);
1544                 /* use the new memory */
1545                 ha->ioctl_data = (char *) bigger_buf;
1546                 ha->ioctl_len = length;
1547                 ha->ioctl_busaddr = dma_busaddr;
1548         } else {
1549                 return -1;
1550         }
1551         return 0;
1552 }
1553
1554 /****************************************************************************/
1555 /*                                                                          */
1556 /* Routine Name: ips_make_passthru                                          */
1557 /*                                                                          */
1558 /* Routine Description:                                                     */
1559 /*                                                                          */
1560 /*   Make a passthru command out of the info in the Scsi block              */
1561 /*                                                                          */
1562 /****************************************************************************/
1563 static int
1564 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)
1565 {
1566         ips_passthru_t *pt;
1567         int length = 0;
1568         int i, ret;
1569         struct scatterlist *sg = scsi_sglist(SC);
1570
1571         METHOD_TRACE("ips_make_passthru", 1);
1572
1573         scsi_for_each_sg(SC, sg, scsi_sg_count(SC), i)
1574                 length += sg->length;
1575
1576         if (length < sizeof (ips_passthru_t)) {
1577                 /* wrong size */
1578                 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1579                           ips_name, ha->host_num);
1580                 return (IPS_FAILURE);
1581         }
1582         if (ips_alloc_passthru_buffer(ha, length)) {
1583                 /* allocation failure!  If ha->ioctl_data exists, use it to return
1584                    some error codes.  Return a failed command to the scsi layer. */
1585                 if (ha->ioctl_data) {
1586                         pt = (ips_passthru_t *) ha->ioctl_data;
1587                         ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1588                         pt->BasicStatus = 0x0B;
1589                         pt->ExtendedStatus = 0x00;
1590                         ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1591                 }
1592                 return IPS_FAILURE;
1593         }
1594         ha->ioctl_datasize = length;
1595
1596         ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1597         pt = (ips_passthru_t *) ha->ioctl_data;
1598
1599         /*
1600          * Some notes about the passthru interface used
1601          *
1602          * IF the scsi op_code == 0x0d then we assume
1603          * that the data came along with/goes with the
1604          * packet we received from the sg driver. In this
1605          * case the CmdBSize field of the pt structure is
1606          * used for the size of the buffer.
1607          */
1608
1609         switch (pt->CoppCmd) {
1610         case IPS_NUMCTRLS:
1611                 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1612                        &ips_num_controllers, sizeof (int));
1613                 ips_scmd_buf_write(SC, ha->ioctl_data,
1614                                    sizeof (ips_passthru_t) + sizeof (int));
1615                 SC->result = DID_OK << 16;
1616
1617                 return (IPS_SUCCESS_IMM);
1618
1619         case IPS_COPPUSRCMD:
1620         case IPS_COPPIOCCMD:
1621                 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1622                         if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1623                                 /* wrong size */
1624                                 DEBUG_VAR(1,
1625                                           "(%s%d) Passthru structure wrong size",
1626                                           ips_name, ha->host_num);
1627
1628                                 return (IPS_FAILURE);
1629                         }
1630
1631                         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
1632                             pt->CoppCP.cmd.flashfw.op_code ==
1633                             IPS_CMD_RW_BIOSFW) {
1634                                 ret = ips_flash_copperhead(ha, pt, scb);
1635                                 ips_scmd_buf_write(SC, ha->ioctl_data,
1636                                                    sizeof (ips_passthru_t));
1637                                 return ret;
1638                         }
1639                         if (ips_usrcmd(ha, pt, scb))
1640                                 return (IPS_SUCCESS);
1641                         else
1642                                 return (IPS_FAILURE);
1643                 }
1644
1645                 break;
1646
1647         }                       /* end switch */
1648
1649         return (IPS_FAILURE);
1650 }
1651
1652 /****************************************************************************/
1653 /* Routine Name: ips_flash_copperhead                                       */
1654 /* Routine Description:                                                     */
1655 /*   Flash the BIOS/FW on a Copperhead style controller                     */
1656 /****************************************************************************/
1657 static int
1658 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1659 {
1660         int datasize;
1661
1662         /* Trombone is the only copperhead that can do packet flash, but only
1663          * for firmware. No one said it had to make sense. */
1664         if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1665                 if (ips_usrcmd(ha, pt, scb))
1666                         return IPS_SUCCESS;
1667                 else
1668                         return IPS_FAILURE;
1669         }
1670         pt->BasicStatus = 0x0B;
1671         pt->ExtendedStatus = 0;
1672         scb->scsi_cmd->result = DID_OK << 16;
1673         /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can     */
1674         /* avoid allocating a huge buffer per adapter ( which can fail ). */
1675         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1676             pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1677                 pt->BasicStatus = 0;
1678                 return ips_flash_bios(ha, pt, scb);
1679         } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1680                 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1681                         ha->flash_data = ips_FlashData;
1682                         ha->flash_busaddr = ips_flashbusaddr;
1683                         ha->flash_len = PAGE_SIZE << 7;
1684                         ha->flash_datasize = 0;
1685                 } else if (!ha->flash_data) {
1686                         datasize = pt->CoppCP.cmd.flashfw.total_packets *
1687                             pt->CoppCP.cmd.flashfw.count;
1688                         ha->flash_data = pci_alloc_consistent(ha->pcidev,
1689                                                               datasize,
1690                                                               &ha->flash_busaddr);
1691                         if (!ha->flash_data){
1692                                 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1693                                 return IPS_FAILURE;
1694                         }
1695                         ha->flash_datasize = 0;
1696                         ha->flash_len = datasize;
1697                 } else
1698                         return IPS_FAILURE;
1699         } else {
1700                 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1701                     ha->flash_len) {
1702                         ips_free_flash_copperhead(ha);
1703                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1704                                    "failed size sanity check\n");
1705                         return IPS_FAILURE;
1706                 }
1707         }
1708         if (!ha->flash_data)
1709                 return IPS_FAILURE;
1710         pt->BasicStatus = 0;
1711         memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1712                pt->CoppCP.cmd.flashfw.count);
1713         ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1714         if (pt->CoppCP.cmd.flashfw.packet_num ==
1715             pt->CoppCP.cmd.flashfw.total_packets - 1) {
1716                 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1717                         return ips_flash_bios(ha, pt, scb);
1718                 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1719                         return ips_flash_firmware(ha, pt, scb);
1720         }
1721         return IPS_SUCCESS_IMM;
1722 }
1723
1724 /****************************************************************************/
1725 /* Routine Name: ips_flash_bios                                             */
1726 /* Routine Description:                                                     */
1727 /*   flashes the bios of a copperhead adapter                               */
1728 /****************************************************************************/
1729 static int
1730 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1731 {
1732
1733         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1734             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1735                 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1736                     (!ha->func.verifybios))
1737                         goto error;
1738                 if ((*ha->func.erasebios) (ha)) {
1739                         DEBUG_VAR(1,
1740                                   "(%s%d) flash bios failed - unable to erase flash",
1741                                   ips_name, ha->host_num);
1742                         goto error;
1743                 } else
1744                     if ((*ha->func.programbios) (ha,
1745                                                  ha->flash_data +
1746                                                  IPS_BIOS_HEADER,
1747                                                  ha->flash_datasize -
1748                                                  IPS_BIOS_HEADER, 0)) {
1749                         DEBUG_VAR(1,
1750                                   "(%s%d) flash bios failed - unable to flash",
1751                                   ips_name, ha->host_num);
1752                         goto error;
1753                 } else
1754                     if ((*ha->func.verifybios) (ha,
1755                                                 ha->flash_data +
1756                                                 IPS_BIOS_HEADER,
1757                                                 ha->flash_datasize -
1758                                                 IPS_BIOS_HEADER, 0)) {
1759                         DEBUG_VAR(1,
1760                                   "(%s%d) flash bios failed - unable to verify flash",
1761                                   ips_name, ha->host_num);
1762                         goto error;
1763                 }
1764                 ips_free_flash_copperhead(ha);
1765                 return IPS_SUCCESS_IMM;
1766         } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1767                    pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1768                 if (!ha->func.erasebios)
1769                         goto error;
1770                 if ((*ha->func.erasebios) (ha)) {
1771                         DEBUG_VAR(1,
1772                                   "(%s%d) flash bios failed - unable to erase flash",
1773                                   ips_name, ha->host_num);
1774                         goto error;
1775                 }
1776                 return IPS_SUCCESS_IMM;
1777         }
1778       error:
1779         pt->BasicStatus = 0x0B;
1780         pt->ExtendedStatus = 0x00;
1781         ips_free_flash_copperhead(ha);
1782         return IPS_FAILURE;
1783 }
1784
1785 /****************************************************************************/
1786 /*                                                                          */
1787 /* Routine Name: ips_fill_scb_sg_single                                     */
1788 /*                                                                          */
1789 /* Routine Description:                                                     */
1790 /*   Fill in a single scb sg_list element from an address                   */
1791 /*   return a -1 if a breakup occurred                                      */
1792 /****************************************************************************/
1793 static int
1794 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1795                        ips_scb_t * scb, int indx, unsigned int e_len)
1796 {
1797
1798         int ret_val = 0;
1799
1800         if ((scb->data_len + e_len) > ha->max_xfer) {
1801                 e_len = ha->max_xfer - scb->data_len;
1802                 scb->breakup = indx;
1803                 ++scb->sg_break;
1804                 ret_val = -1;
1805         } else {
1806                 scb->breakup = 0;
1807                 scb->sg_break = 0;
1808         }
1809         if (IPS_USE_ENH_SGLIST(ha)) {
1810                 scb->sg_list.enh_list[indx].address_lo =
1811                     cpu_to_le32(pci_dma_lo32(busaddr));
1812                 scb->sg_list.enh_list[indx].address_hi =
1813                     cpu_to_le32(pci_dma_hi32(busaddr));
1814                 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1815         } else {
1816                 scb->sg_list.std_list[indx].address =
1817                     cpu_to_le32(pci_dma_lo32(busaddr));
1818                 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1819         }
1820
1821         ++scb->sg_len;
1822         scb->data_len += e_len;
1823         return ret_val;
1824 }
1825
1826 /****************************************************************************/
1827 /* Routine Name: ips_flash_firmware                                         */
1828 /* Routine Description:                                                     */
1829 /*   flashes the firmware of a copperhead adapter                           */
1830 /****************************************************************************/
1831 static int
1832 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1833 {
1834         IPS_SG_LIST sg_list;
1835         uint32_t cmd_busaddr;
1836
1837         if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1838             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1839                 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1840                 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1841                 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1842         } else {
1843                 pt->BasicStatus = 0x0B;
1844                 pt->ExtendedStatus = 0x00;
1845                 ips_free_flash_copperhead(ha);
1846                 return IPS_FAILURE;
1847         }
1848         /* Save the S/G list pointer so it doesn't get clobbered */
1849         sg_list.list = scb->sg_list.list;
1850         cmd_busaddr = scb->scb_busaddr;
1851         /* copy in the CP */
1852         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1853         /* FIX stuff that might be wrong */
1854         scb->sg_list.list = sg_list.list;
1855         scb->scb_busaddr = cmd_busaddr;
1856         scb->bus = scb->scsi_cmd->device->channel;
1857         scb->target_id = scb->scsi_cmd->device->id;
1858         scb->lun = scb->scsi_cmd->device->lun;
1859         scb->sg_len = 0;
1860         scb->data_len = 0;
1861         scb->flags = 0;
1862         scb->op_code = 0;
1863         scb->callback = ipsintr_done;
1864         scb->timeout = ips_cmd_timeout;
1865
1866         scb->data_len = ha->flash_datasize;
1867         scb->data_busaddr =
1868             pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1869                            IPS_DMA_DIR(scb));
1870         scb->flags |= IPS_SCB_MAP_SINGLE;
1871         scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
1872         scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
1873         if (pt->TimeOut)
1874                 scb->timeout = pt->TimeOut;
1875         scb->scsi_cmd->result = DID_OK << 16;
1876         return IPS_SUCCESS;
1877 }
1878
1879 /****************************************************************************/
1880 /* Routine Name: ips_free_flash_copperhead                                  */
1881 /* Routine Description:                                                     */
1882 /*   release the memory resources used to hold the flash image              */
1883 /****************************************************************************/
1884 static void
1885 ips_free_flash_copperhead(ips_ha_t * ha)
1886 {
1887         if (ha->flash_data == ips_FlashData)
1888                 test_and_clear_bit(0, &ips_FlashDataInUse);
1889         else if (ha->flash_data)
1890                 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
1891                                     ha->flash_busaddr);
1892         ha->flash_data = NULL;
1893 }
1894
1895 /****************************************************************************/
1896 /*                                                                          */
1897 /* Routine Name: ips_usrcmd                                                 */
1898 /*                                                                          */
1899 /* Routine Description:                                                     */
1900 /*                                                                          */
1901 /*   Process a user command and make it ready to send                       */
1902 /*                                                                          */
1903 /****************************************************************************/
1904 static int
1905 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1906 {
1907         IPS_SG_LIST sg_list;
1908         uint32_t cmd_busaddr;
1909
1910         METHOD_TRACE("ips_usrcmd", 1);
1911
1912         if ((!scb) || (!pt) || (!ha))
1913                 return (0);
1914
1915         /* Save the S/G list pointer so it doesn't get clobbered */
1916         sg_list.list = scb->sg_list.list;
1917         cmd_busaddr = scb->scb_busaddr;
1918         /* copy in the CP */
1919         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1920         memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
1921
1922         /* FIX stuff that might be wrong */
1923         scb->sg_list.list = sg_list.list;
1924         scb->scb_busaddr = cmd_busaddr;
1925         scb->bus = scb->scsi_cmd->device->channel;
1926         scb->target_id = scb->scsi_cmd->device->id;
1927         scb->lun = scb->scsi_cmd->device->lun;
1928         scb->sg_len = 0;
1929         scb->data_len = 0;
1930         scb->flags = 0;
1931         scb->op_code = 0;
1932         scb->callback = ipsintr_done;
1933         scb->timeout = ips_cmd_timeout;
1934         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
1935
1936         /* we don't support DCDB/READ/WRITE Scatter Gather */
1937         if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
1938             (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
1939             (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
1940                 return (0);
1941
1942         if (pt->CmdBSize) {
1943                 scb->data_len = pt->CmdBSize;
1944                 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
1945         } else {
1946                 scb->data_busaddr = 0L;
1947         }
1948
1949         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1950                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
1951                                                          (unsigned long) &scb->
1952                                                          dcdb -
1953                                                          (unsigned long) scb);
1954
1955         if (pt->CmdBSize) {
1956                 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1957                         scb->dcdb.buffer_pointer =
1958                             cpu_to_le32(scb->data_busaddr);
1959                 else
1960                         scb->cmd.basic_io.sg_addr =
1961                             cpu_to_le32(scb->data_busaddr);
1962         }
1963
1964         /* set timeouts */
1965         if (pt->TimeOut) {
1966                 scb->timeout = pt->TimeOut;
1967
1968                 if (pt->TimeOut <= 10)
1969                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
1970                 else if (pt->TimeOut <= 60)
1971                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
1972                 else
1973                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
1974         }
1975
1976         /* assume success */
1977         scb->scsi_cmd->result = DID_OK << 16;
1978
1979         /* success */
1980         return (1);
1981 }
1982
1983 /****************************************************************************/
1984 /*                                                                          */
1985 /* Routine Name: ips_cleanup_passthru                                       */
1986 /*                                                                          */
1987 /* Routine Description:                                                     */
1988 /*                                                                          */
1989 /*   Cleanup after a passthru command                                       */
1990 /*                                                                          */
1991 /****************************************************************************/
1992 static void
1993 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
1994 {
1995         ips_passthru_t *pt;
1996
1997         METHOD_TRACE("ips_cleanup_passthru", 1);
1998
1999         if ((!scb) || (!scb->scsi_cmd) || (!scsi_sglist(scb->scsi_cmd))) {
2000                 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2001                           ips_name, ha->host_num);
2002
2003                 return;
2004         }
2005         pt = (ips_passthru_t *) ha->ioctl_data;
2006
2007         /* Copy data back to the user */
2008         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)      /* Copy DCDB Back to Caller's Area */
2009                 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2010
2011         pt->BasicStatus = scb->basic_status;
2012         pt->ExtendedStatus = scb->extended_status;
2013         pt->AdapterType = ha->ad_type;
2014
2015         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
2016             (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2017              scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2018                 ips_free_flash_copperhead(ha);
2019
2020         ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2021 }
2022
2023 /****************************************************************************/
2024 /*                                                                          */
2025 /* Routine Name: ips_host_info                                              */
2026 /*                                                                          */
2027 /* Routine Description:                                                     */
2028 /*                                                                          */
2029 /*   The passthru interface for the driver                                  */
2030 /*                                                                          */
2031 /****************************************************************************/
2032 static int
2033 ips_host_info(ips_ha_t *ha, struct seq_file *m)
2034 {
2035         METHOD_TRACE("ips_host_info", 1);
2036
2037         seq_puts(m, "\nIBM ServeRAID General Information:\n\n");
2038
2039         if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2040             (le16_to_cpu(ha->nvram->adapter_type) != 0))
2041                 seq_printf(m, "\tController Type                   : %s\n",
2042                           ips_adapter_name[ha->ad_type - 1]);
2043         else
2044                 seq_puts(m, "\tController Type                   : Unknown\n");
2045
2046         if (ha->io_addr)
2047                 seq_printf(m,
2048                           "\tIO region                         : 0x%x (%d bytes)\n",
2049                           ha->io_addr, ha->io_len);
2050
2051         if (ha->mem_addr) {
2052                 seq_printf(m,
2053                           "\tMemory region                     : 0x%x (%d bytes)\n",
2054                           ha->mem_addr, ha->mem_len);
2055                 seq_printf(m,
2056                           "\tShared memory address             : 0x%lx\n",
2057                           (unsigned long)ha->mem_ptr);
2058         }
2059
2060         seq_printf(m, "\tIRQ number                        : %d\n", ha->pcidev->irq);
2061
2062     /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2063     /* That keeps everything happy for "text" operations on the proc file.                    */
2064
2065         if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2066         if (ha->nvram->bios_low[3] == 0) {
2067                 seq_printf(m,
2068                           "\tBIOS Version                      : %c%c%c%c%c%c%c\n",
2069                           ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2070                           ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2071                           ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2072                           ha->nvram->bios_low[2]);
2073
2074         } else {
2075                 seq_printf(m,
2076                           "\tBIOS Version                      : %c%c%c%c%c%c%c%c\n",
2077                           ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2078                           ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2079                           ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2080                           ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2081         }
2082
2083     }
2084
2085     if (ha->enq->CodeBlkVersion[7] == 0) {
2086         seq_printf(m,
2087                   "\tFirmware Version                  : %c%c%c%c%c%c%c\n",
2088                   ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2089                   ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2090                   ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2091                   ha->enq->CodeBlkVersion[6]);
2092     } else {
2093         seq_printf(m,
2094                   "\tFirmware Version                  : %c%c%c%c%c%c%c%c\n",
2095                   ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2096                   ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2097                   ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2098                   ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2099     }
2100
2101     if (ha->enq->BootBlkVersion[7] == 0) {
2102         seq_printf(m,
2103                   "\tBoot Block Version                : %c%c%c%c%c%c%c\n",
2104                   ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2105                   ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2106                   ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2107                   ha->enq->BootBlkVersion[6]);
2108     } else {
2109         seq_printf(m,
2110                   "\tBoot Block Version                : %c%c%c%c%c%c%c%c\n",
2111                   ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2112                   ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2113                   ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2114                   ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2115     }
2116
2117         seq_printf(m, "\tDriver Version                    : %s%s\n",
2118                   IPS_VERSION_HIGH, IPS_VERSION_LOW);
2119
2120         seq_printf(m, "\tDriver Build                      : %d\n",
2121                   IPS_BUILD_IDENT);
2122
2123         seq_printf(m, "\tMax Physical Devices              : %d\n",
2124                   ha->enq->ucMaxPhysicalDevices);
2125         seq_printf(m, "\tMax Active Commands               : %d\n",
2126                   ha->max_cmds);
2127         seq_printf(m, "\tCurrent Queued Commands           : %d\n",
2128                   ha->scb_waitlist.count);
2129         seq_printf(m, "\tCurrent Active Commands           : %d\n",
2130                   ha->scb_activelist.count - ha->num_ioctl);
2131         seq_printf(m, "\tCurrent Queued PT Commands        : %d\n",
2132                   ha->copp_waitlist.count);
2133         seq_printf(m, "\tCurrent Active PT Commands        : %d\n",
2134                   ha->num_ioctl);
2135
2136         seq_putc(m, '\n');
2137
2138         return 0;
2139 }
2140
2141 /****************************************************************************/
2142 /*                                                                          */
2143 /* Routine Name: ips_identify_controller                                    */
2144 /*                                                                          */
2145 /* Routine Description:                                                     */
2146 /*                                                                          */
2147 /*   Identify this controller                                               */
2148 /*                                                                          */
2149 /****************************************************************************/
2150 static void
2151 ips_identify_controller(ips_ha_t * ha)
2152 {
2153         METHOD_TRACE("ips_identify_controller", 1);
2154
2155         switch (ha->pcidev->device) {
2156         case IPS_DEVICEID_COPPERHEAD:
2157                 if (ha->pcidev->revision <= IPS_REVID_SERVERAID) {
2158                         ha->ad_type = IPS_ADTYPE_SERVERAID;
2159                 } else if (ha->pcidev->revision == IPS_REVID_SERVERAID2) {
2160                         ha->ad_type = IPS_ADTYPE_SERVERAID2;
2161                 } else if (ha->pcidev->revision == IPS_REVID_NAVAJO) {
2162                         ha->ad_type = IPS_ADTYPE_NAVAJO;
2163                 } else if ((ha->pcidev->revision == IPS_REVID_SERVERAID2)
2164                            && (ha->slot_num == 0)) {
2165                         ha->ad_type = IPS_ADTYPE_KIOWA;
2166                 } else if ((ha->pcidev->revision >= IPS_REVID_CLARINETP1) &&
2167                            (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) {
2168                         if (ha->enq->ucMaxPhysicalDevices == 15)
2169                                 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2170                         else
2171                                 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2172                 } else if ((ha->pcidev->revision >= IPS_REVID_TROMBONE32) &&
2173                            (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) {
2174                         ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2175                 }
2176                 break;
2177
2178         case IPS_DEVICEID_MORPHEUS:
2179                 switch (ha->pcidev->subsystem_device) {
2180                 case IPS_SUBDEVICEID_4L:
2181                         ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2182                         break;
2183
2184                 case IPS_SUBDEVICEID_4M:
2185                         ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2186                         break;
2187
2188                 case IPS_SUBDEVICEID_4MX:
2189                         ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2190                         break;
2191
2192                 case IPS_SUBDEVICEID_4LX:
2193                         ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2194                         break;
2195
2196                 case IPS_SUBDEVICEID_5I2:
2197                         ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2198                         break;
2199
2200                 case IPS_SUBDEVICEID_5I1:
2201                         ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2202                         break;
2203                 }
2204
2205                 break;
2206
2207         case IPS_DEVICEID_MARCO:
2208                 switch (ha->pcidev->subsystem_device) {
2209                 case IPS_SUBDEVICEID_6M:
2210                         ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2211                         break;
2212                 case IPS_SUBDEVICEID_6I:
2213                         ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2214                         break;
2215                 case IPS_SUBDEVICEID_7k:
2216                         ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2217                         break;
2218                 case IPS_SUBDEVICEID_7M:
2219                         ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2220                         break;
2221                 }
2222                 break;
2223         }
2224 }
2225
2226 /****************************************************************************/
2227 /*                                                                          */
2228 /* Routine Name: ips_get_bios_version                                       */
2229 /*                                                                          */
2230 /* Routine Description:                                                     */
2231 /*                                                                          */
2232 /*   Get the BIOS revision number                                           */
2233 /*                                                                          */
2234 /****************************************************************************/
2235 static void
2236 ips_get_bios_version(ips_ha_t * ha, int intr)
2237 {
2238         ips_scb_t *scb;
2239         int ret;
2240         uint8_t major;
2241         uint8_t minor;
2242         uint8_t subminor;
2243         uint8_t *buffer;
2244         char hexDigits[] =
2245             { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2246      'D', 'E', 'F' };
2247
2248         METHOD_TRACE("ips_get_bios_version", 1);
2249
2250         major = 0;
2251         minor = 0;
2252
2253         strncpy(ha->bios_version, "       ?", 8);
2254
2255         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) {
2256                 if (IPS_USE_MEMIO(ha)) {
2257                         /* Memory Mapped I/O */
2258
2259                         /* test 1st byte */
2260                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
2261                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2262                                 udelay(25);     /* 25 us */
2263
2264                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2265                                 return;
2266
2267                         writel(1, ha->mem_ptr + IPS_REG_FLAP);
2268                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2269                                 udelay(25);     /* 25 us */
2270
2271                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2272                                 return;
2273
2274                         /* Get Major version */
2275                         writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2276                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2277                                 udelay(25);     /* 25 us */
2278
2279                         major = readb(ha->mem_ptr + IPS_REG_FLDP);
2280
2281                         /* Get Minor version */
2282                         writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2283                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2284                                 udelay(25);     /* 25 us */
2285                         minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2286
2287                         /* Get SubMinor version */
2288                         writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2289                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2290                                 udelay(25);     /* 25 us */
2291                         subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2292
2293                 } else {
2294                         /* Programmed I/O */
2295
2296                         /* test 1st byte */
2297                         outl(0, ha->io_addr + IPS_REG_FLAP);
2298                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2299                                 udelay(25);     /* 25 us */
2300
2301                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2302                                 return;
2303
2304                         outl(1, ha->io_addr + IPS_REG_FLAP);
2305                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2306                                 udelay(25);     /* 25 us */
2307
2308                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2309                                 return;
2310
2311                         /* Get Major version */
2312                         outl(0x1FF, ha->io_addr + IPS_REG_FLAP);
2313                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2314                                 udelay(25);     /* 25 us */
2315
2316                         major = inb(ha->io_addr + IPS_REG_FLDP);
2317
2318                         /* Get Minor version */
2319                         outl(0x1FE, ha->io_addr + IPS_REG_FLAP);
2320                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2321                                 udelay(25);     /* 25 us */
2322
2323                         minor = inb(ha->io_addr + IPS_REG_FLDP);
2324
2325                         /* Get SubMinor version */
2326                         outl(0x1FD, ha->io_addr + IPS_REG_FLAP);
2327                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2328                                 udelay(25);     /* 25 us */
2329
2330                         subminor = inb(ha->io_addr + IPS_REG_FLDP);
2331
2332                 }
2333         } else {
2334                 /* Morpheus Family - Send Command to the card */
2335
2336                 buffer = ha->ioctl_data;
2337
2338                 memset(buffer, 0, 0x1000);
2339
2340                 scb = &ha->scbs[ha->max_cmds - 1];
2341
2342                 ips_init_scb(ha, scb);
2343
2344                 scb->timeout = ips_cmd_timeout;
2345                 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2346
2347                 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2348                 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2349                 scb->cmd.flashfw.type = 1;
2350                 scb->cmd.flashfw.direction = 0;
2351                 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2352                 scb->cmd.flashfw.total_packets = 1;
2353                 scb->cmd.flashfw.packet_num = 0;
2354                 scb->data_len = 0x1000;
2355                 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2356
2357                 /* issue the command */
2358                 if (((ret =
2359                       ips_send_wait(ha, scb, ips_cmd_timeout,
2360                                     intr)) == IPS_FAILURE)
2361                     || (ret == IPS_SUCCESS_IMM)
2362                     || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2363                         /* Error occurred */
2364
2365                         return;
2366                 }
2367
2368                 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2369                         major = buffer[0x1ff + 0xC0];   /* Offset 0x1ff after the header (0xc0) */
2370                         minor = buffer[0x1fe + 0xC0];   /* Offset 0x1fe after the header (0xc0) */
2371                         subminor = buffer[0x1fd + 0xC0];        /* Offset 0x1fd after the header (0xc0) */
2372                 } else {
2373                         return;
2374                 }
2375         }
2376
2377         ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2378         ha->bios_version[1] = '.';
2379         ha->bios_version[2] = hexDigits[major & 0x0F];
2380         ha->bios_version[3] = hexDigits[subminor];
2381         ha->bios_version[4] = '.';
2382         ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2383         ha->bios_version[6] = hexDigits[minor & 0x0F];
2384         ha->bios_version[7] = 0;
2385 }
2386
2387 /****************************************************************************/
2388 /*                                                                          */
2389 /* Routine Name: ips_hainit                                                 */
2390 /*                                                                          */
2391 /* Routine Description:                                                     */
2392 /*                                                                          */
2393 /*   Initialize the controller                                              */
2394 /*                                                                          */
2395 /* NOTE: Assumes to be called from with a lock                              */
2396 /*                                                                          */
2397 /****************************************************************************/
2398 static int
2399 ips_hainit(ips_ha_t * ha)
2400 {
2401         int i;
2402         struct timeval tv;
2403
2404         METHOD_TRACE("ips_hainit", 1);
2405
2406         if (!ha)
2407                 return (0);
2408
2409         if (ha->func.statinit)
2410                 (*ha->func.statinit) (ha);
2411
2412         if (ha->func.enableint)
2413                 (*ha->func.enableint) (ha);
2414
2415         /* Send FFDC */
2416         ha->reset_count = 1;
2417         do_gettimeofday(&tv);
2418         ha->last_ffdc = tv.tv_sec;
2419         ips_ffdc_reset(ha, IPS_INTR_IORL);
2420
2421         if (!ips_read_config(ha, IPS_INTR_IORL)) {
2422                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2423                            "unable to read config from controller.\n");
2424
2425                 return (0);
2426         }
2427         /* end if */
2428         if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2429                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2430                            "unable to read controller status.\n");
2431
2432                 return (0);
2433         }
2434
2435         /* Identify this controller */
2436         ips_identify_controller(ha);
2437
2438         if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2439                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2440                            "unable to read subsystem parameters.\n");
2441
2442                 return (0);
2443         }
2444
2445         /* write nvram user page 5 */
2446         if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2447                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2448                            "unable to write driver info to controller.\n");
2449
2450                 return (0);
2451         }
2452
2453         /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2454         if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2455                 ips_clear_adapter(ha, IPS_INTR_IORL);
2456
2457         /* set limits on SID, LUN, BUS */
2458         ha->ntargets = IPS_MAX_TARGETS + 1;
2459         ha->nlun = 1;
2460         ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2461
2462         switch (ha->conf->logical_drive[0].ucStripeSize) {
2463         case 4:
2464                 ha->max_xfer = 0x10000;
2465                 break;
2466
2467         case 5:
2468                 ha->max_xfer = 0x20000;
2469                 break;
2470
2471         case 6:
2472                 ha->max_xfer = 0x40000;
2473                 break;
2474
2475         case 7:
2476         default:
2477                 ha->max_xfer = 0x80000;
2478                 break;
2479         }
2480
2481         /* setup max concurrent commands */
2482         if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2483                 /* Use the new method */
2484                 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2485         } else {
2486                 /* use the old method */
2487                 switch (ha->conf->logical_drive[0].ucStripeSize) {
2488                 case 4:
2489                         ha->max_cmds = 32;
2490                         break;
2491
2492                 case 5:
2493                         ha->max_cmds = 16;
2494                         break;
2495
2496                 case 6:
2497                         ha->max_cmds = 8;
2498                         break;
2499
2500                 case 7:
2501                 default:
2502                         ha->max_cmds = 4;
2503                         break;
2504                 }
2505         }
2506
2507         /* Limit the Active Commands on a Lite Adapter */
2508         if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2509             (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2510             (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2511                 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2512                         ha->max_cmds = MaxLiteCmds;
2513         }
2514
2515         /* set controller IDs */
2516         ha->ha_id[0] = IPS_ADAPTER_ID;
2517         for (i = 1; i < ha->nbus; i++) {
2518                 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2519                 ha->dcdb_active[i - 1] = 0;
2520         }
2521
2522         return (1);
2523 }
2524
2525 /****************************************************************************/
2526 /*                                                                          */
2527 /* Routine Name: ips_next                                                   */
2528 /*                                                                          */
2529 /* Routine Description:                                                     */
2530 /*                                                                          */
2531 /*   Take the next command off the queue and send it to the controller      */
2532 /*                                                                          */
2533 /****************************************************************************/
2534 static void
2535 ips_next(ips_ha_t * ha, int intr)
2536 {
2537         ips_scb_t *scb;
2538         struct scsi_cmnd *SC;
2539         struct scsi_cmnd *p;
2540         struct scsi_cmnd *q;
2541         ips_copp_wait_item_t *item;
2542         int ret;
2543         struct Scsi_Host *host;
2544         METHOD_TRACE("ips_next", 1);
2545
2546         if (!ha)
2547                 return;
2548         host = ips_sh[ha->host_num];
2549         /*
2550          * Block access to the queue function so
2551          * this command won't time out
2552          */
2553         if (intr == IPS_INTR_ON)
2554                 spin_lock(host->host_lock);
2555
2556         if ((ha->subsys->param[3] & 0x300000)
2557             && (ha->scb_activelist.count == 0)) {
2558                 struct timeval tv;
2559
2560                 do_gettimeofday(&tv);
2561
2562                 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2563                         ha->last_ffdc = tv.tv_sec;
2564                         ips_ffdc_time(ha);
2565                 }
2566         }
2567
2568         /*
2569          * Send passthru commands
2570          * These have priority over normal I/O
2571          * but shouldn't affect performance too much
2572          * since we limit the number that can be active
2573          * on the card at any one time
2574          */
2575         while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2576                (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2577
2578                 item = ips_removeq_copp_head(&ha->copp_waitlist);
2579                 ha->num_ioctl++;
2580                 if (intr == IPS_INTR_ON)
2581                         spin_unlock(host->host_lock);
2582                 scb->scsi_cmd = item->scsi_cmd;
2583                 kfree(item);
2584
2585                 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2586
2587                 if (intr == IPS_INTR_ON)
2588                         spin_lock(host->host_lock);
2589                 switch (ret) {
2590                 case IPS_FAILURE:
2591                         if (scb->scsi_cmd) {
2592                                 scb->scsi_cmd->result = DID_ERROR << 16;
2593                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2594                         }
2595
2596                         ips_freescb(ha, scb);
2597                         break;
2598                 case IPS_SUCCESS_IMM:
2599                         if (scb->scsi_cmd) {
2600                                 scb->scsi_cmd->result = DID_OK << 16;
2601                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2602                         }
2603
2604                         ips_freescb(ha, scb);
2605                         break;
2606                 default:
2607                         break;
2608                 }               /* end case */
2609
2610                 if (ret != IPS_SUCCESS) {
2611                         ha->num_ioctl--;
2612                         continue;
2613                 }
2614
2615                 ret = ips_send_cmd(ha, scb);
2616
2617                 if (ret == IPS_SUCCESS)
2618                         ips_putq_scb_head(&ha->scb_activelist, scb);
2619                 else
2620                         ha->num_ioctl--;
2621
2622                 switch (ret) {
2623                 case IPS_FAILURE:
2624                         if (scb->scsi_cmd) {
2625                                 scb->scsi_cmd->result = DID_ERROR << 16;
2626                         }
2627
2628                         ips_freescb(ha, scb);
2629                         break;
2630                 case IPS_SUCCESS_IMM:
2631                         ips_freescb(ha, scb);
2632                         break;
2633                 default:
2634                         break;
2635                 }               /* end case */
2636
2637         }
2638
2639         /*
2640          * Send "Normal" I/O commands
2641          */
2642
2643         p = ha->scb_waitlist.head;
2644         while ((p) && (scb = ips_getscb(ha))) {
2645                 if ((scmd_channel(p) > 0)
2646                     && (ha->
2647                         dcdb_active[scmd_channel(p) -
2648                                     1] & (1 << scmd_id(p)))) {
2649                         ips_freescb(ha, scb);
2650                         p = (struct scsi_cmnd *) p->host_scribble;
2651                         continue;
2652                 }
2653
2654                 q = p;
2655                 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2656
2657                 if (intr == IPS_INTR_ON)
2658                         spin_unlock(host->host_lock);   /* Unlock HA after command is taken off queue */
2659
2660                 SC->result = DID_OK;
2661                 SC->host_scribble = NULL;
2662
2663                 scb->target_id = SC->device->id;
2664                 scb->lun = SC->device->lun;
2665                 scb->bus = SC->device->channel;
2666                 scb->scsi_cmd = SC;
2667                 scb->breakup = 0;
2668                 scb->data_len = 0;
2669                 scb->callback = ipsintr_done;
2670                 scb->timeout = ips_cmd_timeout;
2671                 memset(&scb->cmd, 0, 16);
2672
2673                 /* copy in the CDB */
2674                 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2675
2676                 scb->sg_count = scsi_dma_map(SC);
2677                 BUG_ON(scb->sg_count < 0);
2678                 if (scb->sg_count) {
2679                         struct scatterlist *sg;
2680                         int i;
2681
2682                         scb->flags |= IPS_SCB_MAP_SG;
2683
2684                         scsi_for_each_sg(SC, sg, scb->sg_count, i) {
2685                                 if (ips_fill_scb_sg_single
2686                                     (ha, sg_dma_address(sg), scb, i,
2687                                      sg_dma_len(sg)) < 0)
2688                                         break;
2689                         }
2690                         scb->dcdb.transfer_length = scb->data_len;
2691                 } else {
2692                         scb->data_busaddr = 0L;
2693                         scb->sg_len = 0;
2694                         scb->data_len = 0;
2695                         scb->dcdb.transfer_length = 0;
2696                 }
2697
2698                 scb->dcdb.cmd_attribute =
2699                     ips_command_direction[scb->scsi_cmd->cmnd[0]];
2700
2701                 /* Allow a WRITE BUFFER Command to Have no Data */
2702                 /* This is Used by Tape Flash Utilites          */
2703                 if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) &&
2704                                 (scb->data_len == 0))
2705                         scb->dcdb.cmd_attribute = 0;
2706
2707                 if (!(scb->dcdb.cmd_attribute & 0x3))
2708                         scb->dcdb.transfer_length = 0;
2709
2710                 if (scb->data_len >= IPS_MAX_XFER) {
2711                         scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2712                         scb->dcdb.transfer_length = 0;
2713                 }
2714                 if (intr == IPS_INTR_ON)
2715                         spin_lock(host->host_lock);
2716
2717                 ret = ips_send_cmd(ha, scb);
2718
2719                 switch (ret) {
2720                 case IPS_SUCCESS:
2721                         ips_putq_scb_head(&ha->scb_activelist, scb);
2722                         break;
2723                 case IPS_FAILURE:
2724                         if (scb->scsi_cmd) {
2725                                 scb->scsi_cmd->result = DID_ERROR << 16;
2726                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2727                         }
2728
2729                         if (scb->bus)
2730                                 ha->dcdb_active[scb->bus - 1] &=
2731                                     ~(1 << scb->target_id);
2732
2733                         ips_freescb(ha, scb);
2734                         break;
2735                 case IPS_SUCCESS_IMM:
2736                         if (scb->scsi_cmd)
2737                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2738
2739                         if (scb->bus)
2740                                 ha->dcdb_active[scb->bus - 1] &=
2741                                     ~(1 << scb->target_id);
2742
2743                         ips_freescb(ha, scb);
2744                         break;
2745                 default:
2746                         break;
2747                 }               /* end case */
2748
2749                 p = (struct scsi_cmnd *) p->host_scribble;
2750
2751         }                       /* end while */
2752
2753         if (intr == IPS_INTR_ON)
2754                 spin_unlock(host->host_lock);
2755 }
2756
2757 /****************************************************************************/
2758 /*                                                                          */
2759 /* Routine Name: ips_putq_scb_head                                          */
2760 /*                                                                          */
2761 /* Routine Description:                                                     */
2762 /*                                                                          */
2763 /*   Add an item to the head of the queue                                   */
2764 /*                                                                          */
2765 /* ASSUMED to be called from within the HA lock                             */
2766 /*                                                                          */
2767 /****************************************************************************/
2768 static void
2769 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2770 {
2771         METHOD_TRACE("ips_putq_scb_head", 1);
2772
2773         if (!item)
2774                 return;
2775
2776         item->q_next = queue->head;
2777         queue->head = item;
2778
2779         if (!queue->tail)
2780                 queue->tail = item;
2781
2782         queue->count++;
2783 }
2784
2785 /****************************************************************************/
2786 /*                                                                          */
2787 /* Routine Name: ips_removeq_scb_head                                       */
2788 /*                                                                          */
2789 /* Routine Description:                                                     */
2790 /*                                                                          */
2791 /*   Remove the head of the queue                                           */
2792 /*                                                                          */
2793 /* ASSUMED to be called from within the HA lock                             */
2794 /*                                                                          */
2795 /****************************************************************************/
2796 static ips_scb_t *
2797 ips_removeq_scb_head(ips_scb_queue_t * queue)
2798 {
2799         ips_scb_t *item;
2800
2801         METHOD_TRACE("ips_removeq_scb_head", 1);
2802
2803         item = queue->head;
2804
2805         if (!item) {
2806                 return (NULL);
2807         }
2808
2809         queue->head = item->q_next;
2810         item->q_next = NULL;
2811
2812         if (queue->tail == item)
2813                 queue->tail = NULL;
2814
2815         queue->count--;
2816
2817         return (item);
2818 }
2819
2820 /****************************************************************************/
2821 /*                                                                          */
2822 /* Routine Name: ips_removeq_scb                                            */
2823 /*                                                                          */
2824 /* Routine Description:                                                     */
2825 /*                                                                          */
2826 /*   Remove an item from a queue                                            */
2827 /*                                                                          */
2828 /* ASSUMED to be called from within the HA lock                             */
2829 /*                                                                          */
2830 /****************************************************************************/
2831 static ips_scb_t *
2832 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
2833 {
2834         ips_scb_t *p;
2835
2836         METHOD_TRACE("ips_removeq_scb", 1);
2837
2838         if (!item)
2839                 return (NULL);
2840
2841         if (item == queue->head) {
2842                 return (ips_removeq_scb_head(queue));
2843         }
2844
2845         p = queue->head;
2846
2847         while ((p) && (item != p->q_next))
2848                 p = p->q_next;
2849
2850         if (p) {
2851                 /* found a match */
2852                 p->q_next = item->q_next;
2853
2854                 if (!item->q_next)
2855                         queue->tail = p;
2856
2857                 item->q_next = NULL;
2858                 queue->count--;
2859
2860                 return (item);
2861         }
2862
2863         return (NULL);
2864 }
2865
2866 /****************************************************************************/
2867 /*                                                                          */
2868 /* Routine Name: ips_putq_wait_tail                                         */
2869 /*                                                                          */
2870 /* Routine Description:                                                     */
2871 /*                                                                          */
2872 /*   Add an item to the tail of the queue                                   */
2873 /*                                                                          */
2874 /* ASSUMED to be called from within the HA lock                             */
2875 /*                                                                          */
2876 /****************************************************************************/
2877 static void ips_putq_wait_tail(ips_wait_queue_t *queue, struct scsi_cmnd *item)
2878 {
2879         METHOD_TRACE("ips_putq_wait_tail", 1);
2880
2881         if (!item)
2882                 return;
2883
2884         item->host_scribble = NULL;
2885
2886         if (queue->tail)
2887                 queue->tail->host_scribble = (char *) item;
2888
2889         queue->tail = item;
2890
2891         if (!queue->head)
2892                 queue->head = item;
2893
2894         queue->count++;
2895 }
2896
2897 /****************************************************************************/
2898 /*                                                                          */
2899 /* Routine Name: ips_removeq_wait_head                                      */
2900 /*                                                                          */
2901 /* Routine Description:                                                     */
2902 /*                                                                          */
2903 /*   Remove the head of the queue                                           */
2904 /*                                                                          */
2905 /* ASSUMED to be called from within the HA lock                             */
2906 /*                                                                          */
2907 /****************************************************************************/
2908 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *queue)
2909 {
2910         struct scsi_cmnd *item;
2911
2912         METHOD_TRACE("ips_removeq_wait_head", 1);
2913
2914         item = queue->head;
2915
2916         if (!item) {
2917                 return (NULL);
2918         }
2919
2920         queue->head = (struct scsi_cmnd *) item->host_scribble;
2921         item->host_scribble = NULL;
2922
2923         if (queue->tail == item)
2924                 queue->tail = NULL;
2925
2926         queue->count--;
2927
2928         return (item);
2929 }
2930
2931 /****************************************************************************/
2932 /*                                                                          */
2933 /* Routine Name: ips_removeq_wait                                           */
2934 /*                                                                          */
2935 /* Routine Description:                                                     */
2936 /*                                                                          */
2937 /*   Remove an item from a queue                                            */
2938 /*                                                                          */
2939 /* ASSUMED to be called from within the HA lock                             */
2940 /*                                                                          */
2941 /****************************************************************************/
2942 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *queue,
2943                                           struct scsi_cmnd *item)
2944 {
2945         struct scsi_cmnd *p;
2946
2947         METHOD_TRACE("ips_removeq_wait", 1);
2948
2949         if (!item)
2950                 return (NULL);
2951
2952         if (item == queue->head) {
2953                 return (ips_removeq_wait_head(queue));
2954         }
2955
2956         p = queue->head;
2957
2958         while ((p) && (item != (struct scsi_cmnd *) p->host_scribble))
2959                 p = (struct scsi_cmnd *) p->host_scribble;
2960
2961         if (p) {
2962                 /* found a match */
2963                 p->host_scribble = item->host_scribble;
2964
2965                 if (!item->host_scribble)
2966                         queue->tail = p;
2967
2968                 item->host_scribble = NULL;
2969                 queue->count--;
2970
2971                 return (item);
2972         }
2973
2974         return (NULL);
2975 }
2976
2977 /****************************************************************************/
2978 /*                                                                          */
2979 /* Routine Name: ips_putq_copp_tail                                         */
2980 /*                                                                          */
2981 /* Routine Description:                                                     */
2982 /*                                                                          */
2983 /*   Add an item to the tail of the queue                                   */
2984 /*                                                                          */
2985 /* ASSUMED to be called from within the HA lock                             */
2986 /*                                                                          */
2987 /****************************************************************************/
2988 static void
2989 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
2990 {
2991         METHOD_TRACE("ips_putq_copp_tail", 1);
2992
2993         if (!item)
2994                 return;
2995
2996         item->next = NULL;
2997
2998         if (queue->tail)
2999                 queue->tail->next = item;
3000
3001         queue->tail = item;
3002
3003         if (!queue->head)
3004                 queue->head = item;
3005
3006         queue->count++;
3007 }
3008
3009 /****************************************************************************/
3010 /*                                                                          */
3011 /* Routine Name: ips_removeq_copp_head                                      */
3012 /*                                                                          */
3013 /* Routine Description:                                                     */
3014 /*                                                                          */
3015 /*   Remove the head of the queue                                           */
3016 /*                                                                          */
3017 /* ASSUMED to be called from within the HA lock                             */
3018 /*                                                                          */
3019 /****************************************************************************/
3020 static ips_copp_wait_item_t *
3021 ips_removeq_copp_head(ips_copp_queue_t * queue)
3022 {
3023         ips_copp_wait_item_t *item;
3024
3025         METHOD_TRACE("ips_removeq_copp_head", 1);
3026
3027         item = queue->head;
3028
3029         if (!item) {
3030                 return (NULL);
3031         }
3032
3033         queue->head = item->next;
3034         item->next = NULL;
3035
3036         if (queue->tail == item)
3037                 queue->tail = NULL;
3038
3039         queue->count--;
3040
3041         return (item);
3042 }
3043
3044 /****************************************************************************/
3045 /*                                                                          */
3046 /* Routine Name: ips_removeq_copp                                           */
3047 /*                                                                          */
3048 /* Routine Description:                                                     */
3049 /*                                                                          */
3050 /*   Remove an item from a queue                                            */
3051 /*                                                                          */
3052 /* ASSUMED to be called from within the HA lock                             */
3053 /*                                                                          */
3054 /****************************************************************************/
3055 static ips_copp_wait_item_t *
3056 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3057 {
3058         ips_copp_wait_item_t *p;
3059
3060         METHOD_TRACE("ips_removeq_copp", 1);
3061
3062         if (!item)
3063                 return (NULL);
3064
3065         if (item == queue->head) {
3066                 return (ips_removeq_copp_head(queue));
3067         }
3068
3069         p = queue->head;
3070
3071         while ((p) && (item != p->next))
3072                 p = p->next;
3073
3074         if (p) {
3075                 /* found a match */
3076                 p->next = item->next;
3077
3078                 if (!item->next)
3079                         queue->tail = p;
3080
3081                 item->next = NULL;
3082                 queue->count--;
3083
3084                 return (item);
3085         }
3086
3087         return (NULL);
3088 }
3089
3090 /****************************************************************************/
3091 /*                                                                          */
3092 /* Routine Name: ipsintr_blocking                                           */
3093 /*                                                                          */
3094 /* Routine Description:                                                     */
3095 /*                                                                          */
3096 /*   Finalize an interrupt for internal commands                            */
3097 /*                                                                          */
3098 /****************************************************************************/
3099 static void
3100 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3101 {
3102         METHOD_TRACE("ipsintr_blocking", 2);
3103
3104         ips_freescb(ha, scb);
3105         if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3106                 ha->waitflag = FALSE;
3107
3108                 return;
3109         }
3110 }
3111
3112 /****************************************************************************/
3113 /*                                                                          */
3114 /* Routine Name: ipsintr_done                                               */
3115 /*                                                                          */
3116 /* Routine Description:                                                     */
3117 /*                                                                          */
3118 /*   Finalize an interrupt for non-internal commands                        */
3119 /*                                                                          */
3120 /****************************************************************************/
3121 static void
3122 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3123 {
3124         METHOD_TRACE("ipsintr_done", 2);
3125
3126         if (!scb) {
3127                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3128                            "Spurious interrupt; scb NULL.\n");
3129
3130                 return;
3131         }
3132
3133         if (scb->scsi_cmd == NULL) {
3134                 /* unexpected interrupt */
3135                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3136                            "Spurious interrupt; scsi_cmd not set.\n");
3137
3138                 return;
3139         }
3140
3141         ips_done(ha, scb);
3142 }
3143
3144 /****************************************************************************/
3145 /*                                                                          */
3146 /* Routine Name: ips_done                                                   */
3147 /*                                                                          */
3148 /* Routine Description:                                                     */
3149 /*                                                                          */
3150 /*   Do housekeeping on completed commands                                  */
3151 /*  ASSUMED to be called form within the request lock                       */
3152 /****************************************************************************/
3153 static void
3154 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3155 {
3156         int ret;
3157
3158         METHOD_TRACE("ips_done", 1);
3159
3160         if (!scb)
3161                 return;
3162
3163         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3164                 ips_cleanup_passthru(ha, scb);
3165                 ha->num_ioctl--;
3166         } else {
3167                 /*
3168                  * Check to see if this command had too much
3169                  * data and had to be broke up.  If so, queue
3170                  * the rest of the data and continue.
3171                  */
3172                 if ((scb->breakup) || (scb->sg_break)) {
3173                         struct scatterlist *sg;
3174                         int i, sg_dma_index, ips_sg_index = 0;
3175
3176                         /* we had a data breakup */
3177                         scb->data_len = 0;
3178
3179                         sg = scsi_sglist(scb->scsi_cmd);
3180
3181                         /* Spin forward to last dma chunk */
3182                         sg_dma_index = scb->breakup;
3183                         for (i = 0; i < scb->breakup; i++)
3184                                 sg = sg_next(sg);
3185
3186                         /* Take care of possible partial on last chunk */
3187                         ips_fill_scb_sg_single(ha,
3188                                                sg_dma_address(sg),
3189                                                scb, ips_sg_index++,
3190                                                sg_dma_len(sg));
3191
3192                         for (; sg_dma_index < scsi_sg_count(scb->scsi_cmd);
3193                              sg_dma_index++, sg = sg_next(sg)) {
3194                                 if (ips_fill_scb_sg_single
3195                                     (ha,
3196                                      sg_dma_address(sg),
3197                                      scb, ips_sg_index++,
3198                                      sg_dma_len(sg)) < 0)
3199                                         break;
3200                         }
3201
3202                         scb->dcdb.transfer_length = scb->data_len;
3203                         scb->dcdb.cmd_attribute |=
3204                             ips_command_direction[scb->scsi_cmd->cmnd[0]];
3205
3206                         if (!(scb->dcdb.cmd_attribute & 0x3))
3207                                 scb->dcdb.transfer_length = 0;
3208
3209                         if (scb->data_len >= IPS_MAX_XFER) {
3210                                 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3211                                 scb->dcdb.transfer_length = 0;
3212                         }
3213
3214                         ret = ips_send_cmd(ha, scb);
3215
3216                         switch (ret) {
3217                         case IPS_FAILURE:
3218                                 if (scb->scsi_cmd) {
3219                                         scb->scsi_cmd->result = DID_ERROR << 16;
3220                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3221                                 }
3222
3223                                 ips_freescb(ha, scb);
3224                                 break;
3225                         case IPS_SUCCESS_IMM:
3226                                 if (scb->scsi_cmd) {
3227                                         scb->scsi_cmd->result = DID_ERROR << 16;
3228                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3229                                 }
3230
3231                                 ips_freescb(ha, scb);
3232                                 break;
3233                         default:
3234                                 break;
3235                         }       /* end case */
3236
3237                         return;
3238                 }
3239         }                       /* end if passthru */
3240
3241         if (scb->bus) {
3242                 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3243         }
3244
3245         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3246
3247         ips_freescb(ha, scb);
3248 }
3249
3250 /****************************************************************************/
3251 /*                                                                          */
3252 /* Routine Name: ips_map_status                                             */
3253 /*                                                                          */
3254 /* Routine Description:                                                     */
3255 /*                                                                          */
3256 /*   Map Controller Error codes to Linux Error Codes                        */
3257 /*                                                                          */
3258 /****************************************************************************/
3259 static int
3260 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3261 {
3262         int errcode;
3263         int device_error;
3264         uint32_t transfer_len;
3265         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3266         IPS_SCSI_INQ_DATA inquiryData;
3267
3268         METHOD_TRACE("ips_map_status", 1);
3269
3270         if (scb->bus) {
3271                 DEBUG_VAR(2,
3272                           "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3273                           ips_name, ha->host_num,
3274                           scb->scsi_cmd->device->channel,
3275                           scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3276                           scb->basic_status, scb->extended_status,
3277                           scb->extended_status ==
3278                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3279                           scb->extended_status ==
3280                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3281                           scb->extended_status ==
3282                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3283         }
3284
3285         /* default driver error */
3286         errcode = DID_ERROR;
3287         device_error = 0;
3288
3289         switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3290         case IPS_CMD_TIMEOUT:
3291                 errcode = DID_TIME_OUT;
3292                 break;
3293
3294         case IPS_INVAL_OPCO:
3295         case IPS_INVAL_CMD_BLK:
3296         case IPS_INVAL_PARM_BLK:
3297         case IPS_LD_ERROR:
3298         case IPS_CMD_CMPLT_WERROR:
3299                 break;
3300
3301         case IPS_PHYS_DRV_ERROR:
3302                 switch (scb->extended_status) {
3303                 case IPS_ERR_SEL_TO:
3304                         if (scb->bus)
3305                                 errcode = DID_NO_CONNECT;
3306
3307                         break;
3308
3309                 case IPS_ERR_OU_RUN:
3310                         if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3311                             (scb->cmd.dcdb.op_code ==
3312                              IPS_CMD_EXTENDED_DCDB_SG)) {
3313                                 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3314                                 transfer_len = tapeDCDB->transfer_length;
3315                         } else {
3316                                 transfer_len =
3317                                     (uint32_t) scb->dcdb.transfer_length;
3318                         }
3319
3320                         if ((scb->bus) && (transfer_len < scb->data_len)) {
3321                                 /* Underrun - set default to no error */
3322                                 errcode = DID_OK;
3323
3324                                 /* Restrict access to physical DASD */
3325                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3326                                     ips_scmd_buf_read(scb->scsi_cmd,
3327                                       &inquiryData, sizeof (inquiryData));
3328                                     if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
3329                                         errcode = DID_TIME_OUT;
3330                                         break;
3331                                     }
3332                                 }
3333                         } else
3334                                 errcode = DID_ERROR;
3335
3336                         break;
3337
3338                 case IPS_ERR_RECOVERY:
3339                         /* don't fail recovered errors */
3340                         if (scb->bus)
3341                                 errcode = DID_OK;
3342
3343                         break;
3344
3345                 case IPS_ERR_HOST_RESET:
3346                 case IPS_ERR_DEV_RESET:
3347                         errcode = DID_RESET;
3348                         break;
3349
3350                 case IPS_ERR_CKCOND:
3351                         if (scb->bus) {
3352                                 if ((scb->cmd.dcdb.op_code ==
3353                                      IPS_CMD_EXTENDED_DCDB)
3354                                     || (scb->cmd.dcdb.op_code ==
3355                                         IPS_CMD_EXTENDED_DCDB_SG)) {
3356                                         tapeDCDB =
3357                                             (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3358                                         memcpy(scb->scsi_cmd->sense_buffer,
3359                                                tapeDCDB->sense_info,
3360                                                SCSI_SENSE_BUFFERSIZE);
3361                                 } else {
3362                                         memcpy(scb->scsi_cmd->sense_buffer,
3363                                                scb->dcdb.sense_info,
3364                                                SCSI_SENSE_BUFFERSIZE);
3365                                 }
3366                                 device_error = 2;       /* check condition */
3367                         }
3368
3369                         errcode = DID_OK;
3370
3371                         break;
3372
3373                 default:
3374                         errcode = DID_ERROR;
3375                         break;
3376
3377                 }               /* end switch */
3378         }                       /* end switch */
3379
3380         scb->scsi_cmd->result = device_error | (errcode << 16);
3381
3382         return (1);
3383 }
3384
3385 /****************************************************************************/
3386 /*                                                                          */
3387 /* Routine Name: ips_send_wait                                              */
3388 /*                                                                          */
3389 /* Routine Description:                                                     */
3390 /*                                                                          */
3391 /*   Send a command to the controller and wait for it to return             */
3392 /*                                                                          */
3393 /*   The FFDC Time Stamp use this function for the callback, but doesn't    */
3394 /*   actually need to wait.                                                 */
3395 /****************************************************************************/
3396 static int
3397 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3398 {
3399         int ret;
3400
3401         METHOD_TRACE("ips_send_wait", 1);
3402
3403         if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3404                 ha->waitflag = TRUE;
3405                 ha->cmd_in_progress = scb->cdb[0];
3406         }
3407         scb->callback = ipsintr_blocking;
3408         ret = ips_send_cmd(ha, scb);
3409
3410         if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3411                 return (ret);
3412
3413         if (intr != IPS_FFDC)   /* Don't Wait around if this is a Time Stamp */
3414                 ret = ips_wait(ha, timeout, intr);
3415
3416         return (ret);
3417 }
3418
3419 /****************************************************************************/
3420 /*                                                                          */
3421 /* Routine Name: ips_scmd_buf_write                                         */
3422 /*                                                                          */
3423 /* Routine Description:                                                     */
3424 /*  Write data to struct scsi_cmnd request_buffer at proper offsets         */
3425 /****************************************************************************/
3426 static void
3427 ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count)
3428 {
3429         unsigned long flags;
3430
3431         local_irq_save(flags);
3432         scsi_sg_copy_from_buffer(scmd, data, count);
3433         local_irq_restore(flags);
3434 }
3435
3436 /****************************************************************************/
3437 /*                                                                          */
3438 /* Routine Name: ips_scmd_buf_read                                          */
3439 /*                                                                          */
3440 /* Routine Description:                                                     */
3441 /*  Copy data from a struct scsi_cmnd to a new, linear buffer               */
3442 /****************************************************************************/
3443 static void
3444 ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count)
3445 {
3446         unsigned long flags;
3447
3448         local_irq_save(flags);
3449         scsi_sg_copy_to_buffer(scmd, data, count);
3450         local_irq_restore(flags);
3451 }
3452
3453 /****************************************************************************/
3454 /*                                                                          */
3455 /* Routine Name: ips_send_cmd                                               */
3456 /*                                                                          */
3457 /* Routine Description:                                                     */
3458 /*                                                                          */
3459 /*   Map SCSI commands to ServeRAID commands for logical drives             */
3460 /*                                                                          */
3461 /****************************************************************************/
3462 static int
3463 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3464 {
3465         int ret;
3466         char *sp;
3467         int device_error;
3468         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3469         int TimeOut;
3470
3471         METHOD_TRACE("ips_send_cmd", 1);
3472
3473         ret = IPS_SUCCESS;
3474
3475         if (!scb->scsi_cmd) {
3476                 /* internal command */
3477
3478                 if (scb->bus > 0) {
3479                         /* Controller commands can't be issued */
3480                         /* to real devices -- fail them        */
3481                         if ((ha->waitflag == TRUE) &&
3482                             (ha->cmd_in_progress == scb->cdb[0])) {
3483                                 ha->waitflag = FALSE;
3484                         }
3485
3486                         return (1);
3487                 }
3488         } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3489                 /* command to logical bus -- interpret */
3490                 ret = IPS_SUCCESS_IMM;
3491
3492                 switch (scb->scsi_cmd->cmnd[0]) {
3493                 case ALLOW_MEDIUM_REMOVAL:
3494                 case REZERO_UNIT:
3495                 case ERASE:
3496                 case WRITE_FILEMARKS:
3497                 case SPACE:
3498                         scb->scsi_cmd->result = DID_ERROR << 16;
3499                         break;
3500
3501                 case START_STOP:
3502                         scb->scsi_cmd->result = DID_OK << 16;
3503                         break;
3504
3505                 case TEST_UNIT_READY:
3506                 case INQUIRY:
3507                         if (scb->target_id == IPS_ADAPTER_ID) {
3508                                 /*
3509                                  * Either we have a TUR
3510                                  * or we have a SCSI inquiry
3511                                  */
3512                                 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3513                                         scb->scsi_cmd->result = DID_OK << 16;
3514
3515                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3516                                         IPS_SCSI_INQ_DATA inquiry;
3517
3518                                         memset(&inquiry, 0,
3519                                                sizeof (IPS_SCSI_INQ_DATA));
3520
3521                                         inquiry.DeviceType =
3522                                             IPS_SCSI_INQ_TYPE_PROCESSOR;
3523                                         inquiry.DeviceTypeQualifier =
3524                                             IPS_SCSI_INQ_LU_CONNECTED;
3525                                         inquiry.Version = IPS_SCSI_INQ_REV2;
3526                                         inquiry.ResponseDataFormat =
3527                                             IPS_SCSI_INQ_RD_REV2;
3528                                         inquiry.AdditionalLength = 31;
3529                                         inquiry.Flags[0] =
3530                                             IPS_SCSI_INQ_Address16;
3531                                         inquiry.Flags[1] =
3532                                             IPS_SCSI_INQ_WBus16 |
3533                                             IPS_SCSI_INQ_Sync;
3534                                         strncpy(inquiry.VendorId, "IBM     ",
3535                                                 8);
3536                                         strncpy(inquiry.ProductId,
3537                                                 "SERVERAID       ", 16);
3538                                         strncpy(inquiry.ProductRevisionLevel,
3539                                                 "1.00", 4);
3540
3541                                         ips_scmd_buf_write(scb->scsi_cmd,
3542                                                            &inquiry,
3543                                                            sizeof (inquiry));
3544
3545                                         scb->scsi_cmd->result = DID_OK << 16;
3546                                 }
3547                         } else {
3548                                 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3549                                 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3550                                 scb->cmd.logical_info.reserved = 0;
3551                                 scb->cmd.logical_info.reserved2 = 0;
3552                                 scb->data_len = sizeof (IPS_LD_INFO);
3553                                 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3554                                 scb->flags = 0;
3555                                 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3556                                 ret = IPS_SUCCESS;
3557                         }
3558
3559                         break;
3560
3561                 case REQUEST_SENSE:
3562                         ips_reqsen(ha, scb);
3563                         scb->scsi_cmd->result = DID_OK << 16;
3564                         break;
3565
3566                 case READ_6:
3567                 case WRITE_6:
3568                         if (!scb->sg_len) {
3569                                 scb->cmd.basic_io.op_code =
3570                                     (scb->scsi_cmd->cmnd[0] ==
3571                                      READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3572                                 scb->cmd.basic_io.enhanced_sg = 0;
3573                                 scb->cmd.basic_io.sg_addr =
3574                                     cpu_to_le32(scb->data_busaddr);
3575                         } else {
3576                                 scb->cmd.basic_io.op_code =
3577                                     (scb->scsi_cmd->cmnd[0] ==
3578                                      READ_6) ? IPS_CMD_READ_SG :
3579                                     IPS_CMD_WRITE_SG;
3580                                 scb->cmd.basic_io.enhanced_sg =
3581                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3582                                 scb->cmd.basic_io.sg_addr =
3583                                     cpu_to_le32(scb->sg_busaddr);
3584                         }
3585
3586                         scb->cmd.basic_io.segment_4G = 0;
3587                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3588                         scb->cmd.basic_io.log_drv = scb->target_id;
3589                         scb->cmd.basic_io.sg_count = scb->sg_len;
3590
3591                         if (scb->cmd.basic_io.lba)
3592                                 le32_add_cpu(&scb->cmd.basic_io.lba,
3593                                                 le16_to_cpu(scb->cmd.basic_io.
3594                                                             sector_count));
3595                         else
3596                                 scb->cmd.basic_io.lba =
3597                                     (((scb->scsi_cmd->
3598                                        cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3599                                                                  cmnd[2] << 8) |
3600                                      (scb->scsi_cmd->cmnd[3]));
3601
3602                         scb->cmd.basic_io.sector_count =
3603                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3604
3605                         if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3606                                 scb->cmd.basic_io.sector_count =
3607                                     cpu_to_le16(256);
3608
3609                         ret = IPS_SUCCESS;
3610                         break;
3611
3612                 case READ_10:
3613                 case WRITE_10:
3614                         if (!scb->sg_len) {
3615                                 scb->cmd.basic_io.op_code =
3616                                     (scb->scsi_cmd->cmnd[0] ==
3617                                      READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3618                                 scb->cmd.basic_io.enhanced_sg = 0;
3619                                 scb->cmd.basic_io.sg_addr =
3620                                     cpu_to_le32(scb->data_busaddr);
3621                         } else {
3622                                 scb->cmd.basic_io.op_code =
3623                                     (scb->scsi_cmd->cmnd[0] ==
3624                                      READ_10) ? IPS_CMD_READ_SG :
3625                                     IPS_CMD_WRITE_SG;
3626                                 scb->cmd.basic_io.enhanced_sg =
3627                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3628                                 scb->cmd.basic_io.sg_addr =
3629                                     cpu_to_le32(scb->sg_busaddr);
3630                         }
3631
3632                         scb->cmd.basic_io.segment_4G = 0;
3633                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3634                         scb->cmd.basic_io.log_drv = scb->target_id;
3635                         scb->cmd.basic_io.sg_count = scb->sg_len;
3636
3637                         if (scb->cmd.basic_io.lba)
3638                                 le32_add_cpu(&scb->cmd.basic_io.lba,
3639                                                 le16_to_cpu(scb->cmd.basic_io.
3640                                                             sector_count));
3641                         else
3642                                 scb->cmd.basic_io.lba =
3643                                     ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3644                                                                        scsi_cmd->
3645                                                                        cmnd[3]
3646                                                                        << 16) |
3647                                      (scb->scsi_cmd->cmnd[4] << 8) | scb->
3648                                      scsi_cmd->cmnd[5]);
3649
3650                         scb->cmd.basic_io.sector_count =
3651                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3652
3653                         if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3654                                 /*
3655                                  * This is a null condition
3656                                  * we don't have to do anything
3657                                  * so just return
3658                                  */
3659                                 scb->scsi_cmd->result = DID_OK << 16;
3660                         } else
3661                                 ret = IPS_SUCCESS;
3662
3663                         break;
3664
3665                 case RESERVE:
3666                 case RELEASE:
3667                         scb->scsi_cmd->result = DID_OK << 16;
3668                         break;
3669
3670                 case MODE_SENSE:
3671                         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3672                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3673                         scb->cmd.basic_io.segment_4G = 0;
3674                         scb->cmd.basic_io.enhanced_sg = 0;
3675                         scb->data_len = sizeof (*ha->enq);
3676                         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3677                         ret = IPS_SUCCESS;
3678                         break;
3679
3680                 case READ_CAPACITY:
3681                         scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3682                         scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3683                         scb->cmd.logical_info.reserved = 0;
3684                         scb->cmd.logical_info.reserved2 = 0;
3685                         scb->cmd.logical_info.reserved3 = 0;
3686                         scb->data_len = sizeof (IPS_LD_INFO);
3687                         scb->data_busaddr = ha->logical_drive_info_dma_addr;
3688                         scb->flags = 0;
3689                         scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3690                         ret = IPS_SUCCESS;
3691                         break;
3692
3693                 case SEND_DIAGNOSTIC:
3694                 case REASSIGN_BLOCKS:
3695                 case FORMAT_UNIT:
3696                 case SEEK_10:
3697                 case VERIFY:
3698                 case READ_DEFECT_DATA:
3699                 case READ_BUFFER:
3700                 case WRITE_BUFFER:
3701                         scb->scsi_cmd->result = DID_OK << 16;
3702                         break;
3703
3704                 default:
3705                         /* Set the Return Info to appear like the Command was */
3706                         /* attempted, a Check Condition occurred, and Sense   */
3707                         /* Data indicating an Invalid CDB OpCode is returned. */
3708                         sp = (char *) scb->scsi_cmd->sense_buffer;
3709
3710                         sp[0] = 0x70;   /* Error Code               */
3711                         sp[2] = ILLEGAL_REQUEST;        /* Sense Key 5 Illegal Req. */
3712                         sp[7] = 0x0A;   /* Additional Sense Length  */
3713                         sp[12] = 0x20;  /* ASC = Invalid OpCode     */
3714                         sp[13] = 0x00;  /* ASCQ                     */
3715
3716                         device_error = 2;       /* Indicate Check Condition */
3717                         scb->scsi_cmd->result = device_error | (DID_OK << 16);
3718                         break;
3719                 }               /* end switch */
3720         }
3721         /* end if */
3722         if (ret == IPS_SUCCESS_IMM)
3723                 return (ret);
3724
3725         /* setup DCDB */
3726         if (scb->bus > 0) {
3727
3728                 /* If we already know the Device is Not there, no need to attempt a Command   */
3729                 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3730                 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
3731                         scb->scsi_cmd->result = DID_NO_CONNECT << 16;
3732                         return (IPS_SUCCESS_IMM);
3733                 }
3734
3735                 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
3736                 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
3737                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
3738                                                          (unsigned long) &scb->
3739                                                          dcdb -
3740                                                          (unsigned long) scb);
3741                 scb->cmd.dcdb.reserved = 0;
3742                 scb->cmd.dcdb.reserved2 = 0;
3743                 scb->cmd.dcdb.reserved3 = 0;
3744                 scb->cmd.dcdb.segment_4G = 0;
3745                 scb->cmd.dcdb.enhanced_sg = 0;
3746
3747                 TimeOut = scb->scsi_cmd->request->timeout;
3748
3749                 if (ha->subsys->param[4] & 0x00100000) {        /* If NEW Tape DCDB is Supported */
3750                         if (!scb->sg_len) {
3751                                 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
3752                         } else {
3753                                 scb->cmd.dcdb.op_code =
3754                                     IPS_CMD_EXTENDED_DCDB_SG;
3755                                 scb->cmd.dcdb.enhanced_sg =
3756                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3757                         }
3758
3759                         tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
3760                         tapeDCDB->device_address =
3761                             ((scb->bus - 1) << 4) | scb->target_id;
3762                         tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3763                         tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K;    /* Always Turn OFF 64K Size Flag */
3764
3765                         if (TimeOut) {
3766                                 if (TimeOut < (10 * HZ))
3767                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3768                                 else if (TimeOut < (60 * HZ))
3769                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3770                                 else if (TimeOut < (1200 * HZ))
3771                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3772                         }
3773
3774                         tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
3775                         tapeDCDB->reserved_for_LUN = 0;
3776                         tapeDCDB->transfer_length = scb->data_len;
3777                         if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
3778                                 tapeDCDB->buffer_pointer =
3779                                     cpu_to_le32(scb->sg_busaddr);
3780                         else
3781                                 tapeDCDB->buffer_pointer =
3782                                     cpu_to_le32(scb->data_busaddr);
3783                         tapeDCDB->sg_count = scb->sg_len;
3784                         tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
3785                         tapeDCDB->scsi_status = 0;
3786                         tapeDCDB->reserved = 0;
3787                         memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
3788                                scb->scsi_cmd->cmd_len);
3789                 } else {
3790                         if (!scb->sg_len) {
3791                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
3792                         } else {
3793                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
3794                                 scb->cmd.dcdb.enhanced_sg =
3795                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3796                         }
3797
3798                         scb->dcdb.device_address =
3799                             ((scb->bus - 1) << 4) | scb->target_id;
3800                         scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3801
3802                         if (TimeOut) {
3803                                 if (TimeOut < (10 * HZ))
3804                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3805                                 else if (TimeOut < (60 * HZ))
3806                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3807                                 else if (TimeOut < (1200 * HZ))
3808                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3809                         }
3810
3811                         scb->dcdb.transfer_length = scb->data_len;
3812                         if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
3813                                 scb->dcdb.transfer_length = 0;
3814                         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
3815                                 scb->dcdb.buffer_pointer =
3816                                     cpu_to_le32(scb->sg_busaddr);
3817                         else
3818                                 scb->dcdb.buffer_pointer =
3819                                     cpu_to_le32(scb->data_busaddr);
3820                         scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
3821                         scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
3822                         scb->dcdb.sg_count = scb->sg_len;
3823                         scb->dcdb.reserved = 0;
3824                         memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
3825                                scb->scsi_cmd->cmd_len);
3826                         scb->dcdb.scsi_status = 0;
3827                         scb->dcdb.reserved2[0] = 0;
3828                         scb->dcdb.reserved2[1] = 0;
3829                         scb->dcdb.reserved2[2] = 0;
3830                 }
3831         }
3832
3833         return ((*ha->func.issue) (ha, scb));
3834 }
3835
3836 /****************************************************************************/
3837 /*                                                                          */
3838 /* Routine Name: ips_chk_status                                             */
3839 /*                                                                          */
3840 /* Routine Description:                                                     */
3841 /*                                                                          */
3842 /*   Check the status of commands to logical drives                         */
3843 /*   Assumed to be called with the HA lock                                  */
3844 /****************************************************************************/
3845 static void
3846 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
3847 {
3848         ips_scb_t *scb;
3849         ips_stat_t *sp;
3850         uint8_t basic_status;
3851         uint8_t ext_status;
3852         int errcode;
3853         IPS_SCSI_INQ_DATA inquiryData;
3854
3855         METHOD_TRACE("ips_chkstatus", 1);
3856
3857         scb = &ha->scbs[pstatus->fields.command_id];
3858         scb->basic_status = basic_status =
3859             pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
3860         scb->extended_status = ext_status = pstatus->fields.extended_status;
3861
3862         sp = &ha->sp;
3863         sp->residue_len = 0;
3864         sp->scb_addr = (void *) scb;
3865
3866         /* Remove the item from the active queue */
3867         ips_removeq_scb(&ha->scb_activelist, scb);
3868
3869         if (!scb->scsi_cmd)
3870                 /* internal commands are handled in do_ipsintr */
3871                 return;
3872
3873         DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3874                   ips_name,
3875                   ha->host_num,
3876                   scb->cdb[0],
3877                   scb->cmd.basic_io.command_id,
3878                   scb->bus, scb->target_id, scb->lun);
3879
3880         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
3881                 /* passthru - just returns the raw result */
3882                 return;
3883
3884         errcode = DID_OK;
3885
3886         if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
3887             ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
3888
3889                 if (scb->bus == 0) {
3890                         if ((basic_status & IPS_GSC_STATUS_MASK) ==
3891                             IPS_CMD_RECOVERED_ERROR) {
3892                                 DEBUG_VAR(1,
3893                                           "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3894                                           ips_name, ha->host_num,
3895                                           scb->cmd.basic_io.op_code,
3896                                           basic_status, ext_status);
3897                         }
3898
3899                         switch (scb->scsi_cmd->cmnd[0]) {
3900                         case ALLOW_MEDIUM_REMOVAL:
3901                         case REZERO_UNIT:
3902                         case ERASE:
3903                         case WRITE_FILEMARKS:
3904                         case SPACE:
3905                                 errcode = DID_ERROR;
3906                                 break;
3907
3908                         case START_STOP:
3909                                 break;
3910
3911                         case TEST_UNIT_READY:
3912                                 if (!ips_online(ha, scb)) {
3913                                         errcode = DID_TIME_OUT;
3914                                 }
3915                                 break;
3916
3917                         case INQUIRY:
3918                                 if (ips_online(ha, scb)) {
3919                                         ips_inquiry(ha, scb);
3920                                 } else {
3921                                         errcode = DID_TIME_OUT;
3922                                 }
3923                                 break;
3924
3925                         case REQUEST_SENSE:
3926                                 ips_reqsen(ha, scb);
3927                                 break;
3928
3929                         case READ_6:
3930                         case WRITE_6:
3931                         case READ_10:
3932                         case WRITE_10:
3933                         case RESERVE:
3934                         case RELEASE:
3935                                 break;
3936
3937                         case MODE_SENSE:
3938                                 if (!ips_online(ha, scb)
3939                                     || !ips_msense(ha, scb)) {
3940                                         errcode = DID_ERROR;
3941                                 }
3942                                 break;
3943
3944                         case READ_CAPACITY:
3945                                 if (ips_online(ha, scb))
3946                                         ips_rdcap(ha, scb);
3947                                 else {
3948                                         errcode = DID_TIME_OUT;
3949                                 }
3950                                 break;
3951
3952                         case SEND_DIAGNOSTIC:
3953                         case REASSIGN_BLOCKS:
3954                                 break;
3955
3956                         case FORMAT_UNIT:
3957                                 errcode = DID_ERROR;
3958                                 break;
3959
3960                         case SEEK_10:
3961                         case VERIFY:
3962                         case READ_DEFECT_DATA:
3963                         case READ_BUFFER:
3964                         case WRITE_BUFFER:
3965                                 break;
3966
3967                         default:
3968                                 errcode = DID_ERROR;
3969                         }       /* end switch */
3970
3971                         scb->scsi_cmd->result = errcode << 16;
3972                 } else {        /* bus == 0 */
3973                         /* restrict access to physical drives */
3974                         if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3975                             ips_scmd_buf_read(scb->scsi_cmd,
3976                                   &inquiryData, sizeof (inquiryData));
3977                             if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
3978                                 scb->scsi_cmd->result = DID_TIME_OUT << 16;
3979                         }
3980                 }               /* else */
3981         } else {                /* recovered error / success */
3982                 if (scb->bus == 0) {
3983                         DEBUG_VAR(1,
3984                                   "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3985                                   ips_name, ha->host_num,
3986                                   scb->cmd.basic_io.op_code, basic_status,
3987                                   ext_status);
3988                 }
3989
3990                 ips_map_status(ha, scb, sp);
3991         }                       /* else */
3992 }
3993
3994 /****************************************************************************/
3995 /*                                                                          */
3996 /* Routine Name: ips_online                                                 */
3997 /*                                                                          */
3998 /* Routine Description:                                                     */
3999 /*                                                                          */
4000 /*   Determine if a logical drive is online                                 */
4001 /*                                                                          */
4002 /****************************************************************************/
4003 static int
4004 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4005 {
4006         METHOD_TRACE("ips_online", 1);
4007
4008         if (scb->target_id >= IPS_MAX_LD)
4009                 return (0);
4010
4011         if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4012                 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4013                 return (0);
4014         }
4015
4016         if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4017             IPS_LD_OFFLINE
4018             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4019             IPS_LD_FREE
4020             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4021             IPS_LD_CRS
4022             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4023             IPS_LD_SYS)
4024                 return (1);
4025         else
4026                 return (0);
4027 }
4028
4029 /****************************************************************************/
4030 /*                                                                          */
4031 /* Routine Name: ips_inquiry                                                */
4032 /*                                                                          */
4033 /* Routine Description:                                                     */
4034 /*                                                                          */
4035 /*   Simulate an inquiry command to a logical drive                         */
4036 /*                                                                          */
4037 /****************************************************************************/
4038 static int
4039 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4040 {
4041         IPS_SCSI_INQ_DATA inquiry;
4042
4043         METHOD_TRACE("ips_inquiry", 1);
4044
4045         memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4046
4047         inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4048         inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4049         inquiry.Version = IPS_SCSI_INQ_REV2;
4050         inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4051         inquiry.AdditionalLength = 31;
4052         inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4053         inquiry.Flags[1] =
4054             IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4055         strncpy(inquiry.VendorId, "IBM     ", 8);
4056         strncpy(inquiry.ProductId, "SERVERAID       ", 16);
4057         strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4058
4059         ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4060
4061         return (1);
4062 }
4063
4064 /****************************************************************************/
4065 /*                                                                          */
4066 /* Routine Name: ips_rdcap                                                  */
4067 /*                                                                          */
4068 /* Routine Description:                                                     */
4069 /*                                                                          */
4070 /*   Simulate a read capacity command to a logical drive                    */
4071 /*                                                                          */
4072 /****************************************************************************/
4073 static int
4074 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4075 {
4076         IPS_SCSI_CAPACITY cap;
4077
4078         METHOD_TRACE("ips_rdcap", 1);
4079
4080         if (scsi_bufflen(scb->scsi_cmd) < 8)
4081                 return (0);
4082
4083         cap.lba =
4084             cpu_to_be32(le32_to_cpu
4085                         (ha->logical_drive_info->
4086                          drive_info[scb->target_id].sector_count) - 1);
4087         cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4088
4089         ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4090
4091         return (1);
4092 }
4093
4094 /****************************************************************************/
4095 /*                                                                          */
4096 /* Routine Name: ips_msense                                                 */
4097 /*                                                                          */
4098 /* Routine Description:                                                     */
4099 /*                                                                          */
4100 /*   Simulate a mode sense command to a logical drive                       */
4101 /*                                                                          */
4102 /****************************************************************************/
4103 static int
4104 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4105 {
4106         uint16_t heads;
4107         uint16_t sectors;
4108         uint32_t cylinders;
4109         IPS_SCSI_MODE_PAGE_DATA mdata;
4110
4111         METHOD_TRACE("ips_msense", 1);
4112
4113         if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4114             (ha->enq->ucMiscFlag & 0x8) == 0) {
4115                 heads = IPS_NORM_HEADS;
4116                 sectors = IPS_NORM_SECTORS;
4117         } else {
4118                 heads = IPS_COMP_HEADS;
4119                 sectors = IPS_COMP_SECTORS;
4120         }
4121
4122         cylinders =
4123             (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4124              1) / (heads * sectors);
4125
4126         memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4127
4128         mdata.hdr.BlockDescLength = 8;
4129
4130         switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4131         case 0x03:              /* page 3 */
4132                 mdata.pdata.pg3.PageCode = 3;
4133                 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4134                 mdata.hdr.DataLength =
4135                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4136                 mdata.pdata.pg3.TracksPerZone = 0;
4137                 mdata.pdata.pg3.AltSectorsPerZone = 0;
4138                 mdata.pdata.pg3.AltTracksPerZone = 0;
4139                 mdata.pdata.pg3.AltTracksPerVolume = 0;
4140                 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4141                 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4142                 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4143                 mdata.pdata.pg3.TrackSkew = 0;
4144                 mdata.pdata.pg3.CylinderSkew = 0;
4145                 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4146                 break;
4147
4148         case 0x4:
4149                 mdata.pdata.pg4.PageCode = 4;
4150                 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4151                 mdata.hdr.DataLength =
4152                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4153                 mdata.pdata.pg4.CylindersHigh =
4154                     cpu_to_be16((cylinders >> 8) & 0xFFFF);
4155                 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4156                 mdata.pdata.pg4.Heads = heads;
4157                 mdata.pdata.pg4.WritePrecompHigh = 0;
4158                 mdata.pdata.pg4.WritePrecompLow = 0;
4159                 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4160                 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4161                 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4162                 mdata.pdata.pg4.LandingZoneHigh = 0;
4163                 mdata.pdata.pg4.LandingZoneLow = 0;
4164                 mdata.pdata.pg4.flags = 0;
4165                 mdata.pdata.pg4.RotationalOffset = 0;
4166                 mdata.pdata.pg4.MediumRotationRate = 0;
4167                 break;
4168         case 0x8:
4169                 mdata.pdata.pg8.PageCode = 8;
4170                 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4171                 mdata.hdr.DataLength =
4172                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4173                 /* everything else is left set to 0 */
4174                 break;
4175
4176         default:
4177                 return (0);
4178         }                       /* end switch */
4179
4180         ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4181
4182         return (1);
4183 }
4184
4185 /****************************************************************************/
4186 /*                                                                          */
4187 /* Routine Name: ips_reqsen                                                 */
4188 /*                                                                          */
4189 /* Routine Description:                                                     */
4190 /*                                                                          */
4191 /*   Simulate a request sense command to a logical drive                    */
4192 /*                                                                          */
4193 /****************************************************************************/
4194 static int
4195 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4196 {
4197         IPS_SCSI_REQSEN reqsen;
4198
4199         METHOD_TRACE("ips_reqsen", 1);
4200
4201         memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4202
4203         reqsen.ResponseCode =
4204             IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4205         reqsen.AdditionalLength = 10;
4206         reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4207         reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4208
4209         ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4210
4211         return (1);
4212 }
4213
4214 /****************************************************************************/
4215 /*                                                                          */
4216 /* Routine Name: ips_free                                                   */
4217 /*                                                                          */
4218 /* Routine Description:                                                     */
4219 /*                                                                          */
4220 /*   Free any allocated space for this controller                           */
4221 /*                                                                          */
4222 /****************************************************************************/
4223 static void
4224 ips_free(ips_ha_t * ha)
4225 {
4226
4227         METHOD_TRACE("ips_free", 1);
4228
4229         if (ha) {
4230                 if (ha->enq) {
4231                         pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4232                                             ha->enq, ha->enq_busaddr);
4233                         ha->enq = NULL;
4234                 }
4235
4236                 kfree(ha->conf);
4237                 ha->conf = NULL;
4238
4239                 if (ha->adapt) {
4240                         pci_free_consistent(ha->pcidev,
4241                                             sizeof (IPS_ADAPTER) +
4242                                             sizeof (IPS_IO_CMD), ha->adapt,
4243                                             ha->adapt->hw_status_start);
4244                         ha->adapt = NULL;
4245                 }
4246
4247                 if (ha->logical_drive_info) {
4248                         pci_free_consistent(ha->pcidev,
4249                                             sizeof (IPS_LD_INFO),
4250                                             ha->logical_drive_info,
4251                                             ha->logical_drive_info_dma_addr);
4252                         ha->logical_drive_info = NULL;
4253                 }
4254
4255                 kfree(ha->nvram);
4256                 ha->nvram = NULL;
4257
4258                 kfree(ha->subsys);
4259                 ha->subsys = NULL;
4260
4261                 if (ha->ioctl_data) {
4262                         pci_free_consistent(ha->pcidev, ha->ioctl_len,
4263                                             ha->ioctl_data, ha->ioctl_busaddr);
4264                         ha->ioctl_data = NULL;
4265                         ha->ioctl_datasize = 0;
4266                         ha->ioctl_len = 0;
4267                 }
4268                 ips_deallocatescbs(ha, ha->max_cmds);
4269
4270                 /* free memory mapped (if applicable) */
4271                 if (ha->mem_ptr) {
4272                         iounmap(ha->ioremap_ptr);
4273                         ha->ioremap_ptr = NULL;
4274                         ha->mem_ptr = NULL;
4275                 }
4276
4277                 ha->mem_addr = 0;
4278
4279         }
4280 }
4281
4282 /****************************************************************************/
4283 /*                                                                          */
4284 /* Routine Name: ips_deallocatescbs                                         */
4285 /*                                                                          */
4286 /* Routine Description:                                                     */
4287 /*                                                                          */
4288 /*   Free the command blocks                                                */
4289 /*                                                                          */
4290 /****************************************************************************/
4291 static int
4292 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4293 {
4294         if (ha->scbs) {
4295                 pci_free_consistent(ha->pcidev,
4296                                     IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4297                                     ha->scbs->sg_list.list,
4298                                     ha->scbs->sg_busaddr);
4299                 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4300                                     ha->scbs, ha->scbs->scb_busaddr);
4301                 ha->scbs = NULL;
4302         }                       /* end if */
4303         return 1;
4304 }
4305
4306 /****************************************************************************/
4307 /*                                                                          */
4308 /* Routine Name: ips_allocatescbs                                           */
4309 /*                                                                          */
4310 /* Routine Description:                                                     */
4311 /*                                                                          */
4312 /*   Allocate the command blocks                                            */
4313 /*                                                                          */
4314 /****************************************************************************/
4315 static int
4316 ips_allocatescbs(ips_ha_t * ha)
4317 {
4318         ips_scb_t *scb_p;
4319         IPS_SG_LIST ips_sg;
4320         int i;
4321         dma_addr_t command_dma, sg_dma;
4322
4323         METHOD_TRACE("ips_allocatescbs", 1);
4324
4325         /* Allocate memory for the SCBs */
4326         ha->scbs =
4327             pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4328                                  &command_dma);
4329         if (ha->scbs == NULL)
4330                 return 0;
4331         ips_sg.list =
4332             pci_alloc_consistent(ha->pcidev,
4333                                  IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4334                                  ha->max_cmds, &sg_dma);
4335         if (ips_sg.list == NULL) {
4336                 pci_free_consistent(ha->pcidev,
4337                                     ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4338                                     command_dma);
4339                 return 0;
4340         }
4341
4342         memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4343
4344         for (i = 0; i < ha->max_cmds; i++) {
4345                 scb_p = &ha->scbs[i];
4346                 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4347                 /* set up S/G list */
4348                 if (IPS_USE_ENH_SGLIST(ha)) {
4349                         scb_p->sg_list.enh_list =
4350                             ips_sg.enh_list + i * IPS_MAX_SG;
4351                         scb_p->sg_busaddr =
4352                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4353                 } else {
4354                         scb_p->sg_list.std_list =
4355                             ips_sg.std_list + i * IPS_MAX_SG;
4356                         scb_p->sg_busaddr =
4357                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4358                 }
4359
4360                 /* add to the free list */
4361                 if (i < ha->max_cmds - 1) {
4362                         scb_p->q_next = ha->scb_freelist;
4363                         ha->scb_freelist = scb_p;
4364                 }
4365         }
4366
4367         /* success */
4368         return (1);
4369 }
4370
4371 /****************************************************************************/
4372 /*                                                                          */
4373 /* Routine Name: ips_init_scb                                               */
4374 /*                                                                          */
4375 /* Routine Description:                                                     */
4376 /*                                                                          */
4377 /*   Initialize a CCB to default values                                     */
4378 /*                                                                          */
4379 /****************************************************************************/
4380 static void
4381 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4382 {
4383         IPS_SG_LIST sg_list;
4384         uint32_t cmd_busaddr, sg_busaddr;
4385         METHOD_TRACE("ips_init_scb", 1);
4386
4387         if (scb == NULL)
4388                 return;
4389
4390         sg_list.list = scb->sg_list.list;
4391         cmd_busaddr = scb->scb_busaddr;
4392         sg_busaddr = scb->sg_busaddr;
4393         /* zero fill */
4394         memset(scb, 0, sizeof (ips_scb_t));
4395         memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4396
4397         /* Initialize dummy command bucket */
4398         ha->dummy->op_code = 0xFF;
4399         ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4400                                        + sizeof (IPS_ADAPTER));
4401         ha->dummy->command_id = IPS_MAX_CMDS;
4402
4403         /* set bus address of scb */
4404         scb->scb_busaddr = cmd_busaddr;
4405         scb->sg_busaddr = sg_busaddr;
4406         scb->sg_list.list = sg_list.list;
4407
4408         /* Neptune Fix */
4409         scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4410         scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4411                                               + sizeof (IPS_ADAPTER));
4412 }
4413
4414 /****************************************************************************/
4415 /*                                                                          */
4416 /* Routine Name: ips_get_scb                                                */
4417 /*                                                                          */
4418 /* Routine Description:                                                     */
4419 /*                                                                          */
4420 /*   Initialize a CCB to default values                                     */
4421 /*                                                                          */
4422 /* ASSUMED to be called from within a lock                                 */
4423 /*                                                                          */
4424 /****************************************************************************/
4425 static ips_scb_t *
4426 ips_getscb(ips_ha_t * ha)
4427 {
4428         ips_scb_t *scb;
4429
4430         METHOD_TRACE("ips_getscb", 1);
4431
4432         if ((scb = ha->scb_freelist) == NULL) {
4433
4434                 return (NULL);
4435         }
4436
4437         ha->scb_freelist = scb->q_next;
4438         scb->flags = 0;
4439         scb->q_next = NULL;
4440
4441         ips_init_scb(ha, scb);
4442
4443         return (scb);
4444 }
4445
4446 /****************************************************************************/
4447 /*                                                                          */
4448 /* Routine Name: ips_free_scb                                               */
4449 /*                                                                          */
4450 /* Routine Description:                                                     */
4451 /*                                                                          */
4452 /*   Return an unused CCB back to the free list                             */
4453 /*                                                                          */
4454 /* ASSUMED to be called from within a lock                                  */
4455 /*                                                                          */
4456 /****************************************************************************/
4457 static void
4458 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4459 {
4460
4461         METHOD_TRACE("ips_freescb", 1);
4462         if (scb->flags & IPS_SCB_MAP_SG)
4463                 scsi_dma_unmap(scb->scsi_cmd);
4464         else if (scb->flags & IPS_SCB_MAP_SINGLE)
4465                 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4466                                  IPS_DMA_DIR(scb));
4467
4468         /* check to make sure this is not our "special" scb */
4469         if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4470                 scb->q_next = ha->scb_freelist;
4471                 ha->scb_freelist = scb;
4472         }
4473 }
4474
4475 /****************************************************************************/
4476 /*                                                                          */
4477 /* Routine Name: ips_isinit_copperhead                                      */
4478 /*                                                                          */
4479 /* Routine Description:                                                     */
4480 /*                                                                          */
4481 /*   Is controller initialized ?                                            */
4482 /*                                                                          */
4483 /****************************************************************************/
4484 static int
4485 ips_isinit_copperhead(ips_ha_t * ha)
4486 {
4487         uint8_t scpr;
4488         uint8_t isr;
4489
4490         METHOD_TRACE("ips_isinit_copperhead", 1);
4491
4492         isr = inb(ha->io_addr + IPS_REG_HISR);
4493         scpr = inb(ha->io_addr + IPS_REG_SCPR);
4494
4495         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4496                 return (0);
4497         else
4498                 return (1);
4499 }
4500
4501 /****************************************************************************/
4502 /*                                                                          */
4503 /* Routine Name: ips_isinit_copperhead_memio                                */
4504 /*                                                                          */
4505 /* Routine Description:                                                     */
4506 /*                                                                          */
4507 /*   Is controller initialized ?                                            */
4508 /*                                                                          */
4509 /****************************************************************************/
4510 static int
4511 ips_isinit_copperhead_memio(ips_ha_t * ha)
4512 {
4513         uint8_t isr = 0;
4514         uint8_t scpr;
4515
4516         METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4517
4518         isr = readb(ha->mem_ptr + IPS_REG_HISR);
4519         scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4520
4521         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4522                 return (0);
4523         else
4524                 return (1);
4525 }
4526
4527 /****************************************************************************/
4528 /*                                                                          */
4529 /* Routine Name: ips_isinit_morpheus                                        */
4530 /*                                                                          */
4531 /* Routine Description:                                                     */
4532 /*                                                                          */
4533 /*   Is controller initialized ?                                            */
4534 /*                                                                          */
4535 /****************************************************************************/
4536 static int
4537 ips_isinit_morpheus(ips_ha_t * ha)
4538 {
4539         uint32_t post;
4540         uint32_t bits;
4541
4542         METHOD_TRACE("ips_is_init_morpheus", 1);
4543
4544         if (ips_isintr_morpheus(ha))
4545             ips_flush_and_reset(ha);
4546
4547         post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4548         bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4549
4550         if (post == 0)
4551                 return (0);
4552         else if (bits & 0x3)
4553                 return (0);
4554         else
4555                 return (1);
4556 }
4557
4558 /****************************************************************************/
4559 /*                                                                          */
4560 /* Routine Name: ips_flush_and_reset                                        */
4561 /*                                                                          */
4562 /* Routine Description:                                                     */
4563 /*                                                                          */
4564 /*   Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown  */
4565 /*   state ( was trying to INIT and an interrupt was already pending ) ...  */
4566 /*                                                                          */
4567 /****************************************************************************/
4568 static void
4569 ips_flush_and_reset(ips_ha_t *ha)
4570 {
4571         ips_scb_t *scb;
4572         int  ret;
4573         int  time;
4574         int  done;
4575         dma_addr_t command_dma;
4576
4577         /* Create a usuable SCB */
4578         scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4579         if (scb) {
4580             memset(scb, 0, sizeof(ips_scb_t));
4581             ips_init_scb(ha, scb);
4582             scb->scb_busaddr = command_dma;
4583
4584             scb->timeout = ips_cmd_timeout;
4585             scb->cdb[0] = IPS_CMD_FLUSH;
4586
4587             scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4588             scb->cmd.flush_cache.command_id = IPS_MAX_CMDS;   /* Use an ID that would otherwise not exist */
4589             scb->cmd.flush_cache.state = IPS_NORM_STATE;
4590             scb->cmd.flush_cache.reserved = 0;
4591             scb->cmd.flush_cache.reserved2 = 0;
4592             scb->cmd.flush_cache.reserved3 = 0;
4593             scb->cmd.flush_cache.reserved4 = 0;
4594
4595             ret = ips_send_cmd(ha, scb);                      /* Send the Flush Command */
4596
4597             if (ret == IPS_SUCCESS) {
4598                 time = 60 * IPS_ONE_SEC;                      /* Max Wait time is 60 seconds */
4599                 done = 0;
4600
4601                 while ((time > 0) && (!done)) {
4602                    done = ips_poll_for_flush_complete(ha);
4603                    /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4604                    udelay(1000);
4605                    time--;
4606                 }
4607         }
4608         }
4609
4610         /* Now RESET and INIT the adapter */
4611         (*ha->func.reset) (ha);
4612
4613         pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4614         return;
4615 }
4616
4617 /****************************************************************************/
4618 /*                                                                          */
4619 /* Routine Name: ips_poll_for_flush_complete                                */
4620 /*                                                                          */
4621 /* Routine Description:                                                     */
4622 /*                                                                          */
4623 /*   Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4624 /*   All other responses are just taken off the queue and ignored           */
4625 /*                                                                          */
4626 /****************************************************************************/
4627 static int
4628 ips_poll_for_flush_complete(ips_ha_t * ha)
4629 {
4630         IPS_STATUS cstatus;
4631
4632         while (TRUE) {
4633             cstatus.value = (*ha->func.statupd) (ha);
4634
4635             if (cstatus.value == 0xffffffff)      /* If No Interrupt to process */
4636                         break;
4637
4638             /* Success is when we see the Flush Command ID */
4639             if (cstatus.fields.command_id == IPS_MAX_CMDS)
4640                 return 1;
4641          }
4642
4643         return 0;
4644 }
4645
4646 /****************************************************************************/
4647 /*                                                                          */
4648 /* Routine Name: ips_enable_int_copperhead                                  */
4649 /*                                                                          */
4650 /* Routine Description:                                                     */
4651 /*   Turn on interrupts                                                     */
4652 /*                                                                          */
4653 /****************************************************************************/
4654 static void
4655 ips_enable_int_copperhead(ips_ha_t * ha)
4656 {
4657         METHOD_TRACE("ips_enable_int_copperhead", 1);
4658
4659         outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4660         inb(ha->io_addr + IPS_REG_HISR);        /*Ensure PCI Posting Completes*/
4661 }
4662
4663 /****************************************************************************/
4664 /*                                                                          */
4665 /* Routine Name: ips_enable_int_copperhead_memio                            */
4666 /*                                                                          */
4667 /* Routine Description:                                                     */
4668 /*   Turn on interrupts                                                     */
4669 /*                                                                          */
4670 /****************************************************************************/
4671 static void
4672 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4673 {
4674         METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4675
4676         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4677         readb(ha->mem_ptr + IPS_REG_HISR);      /*Ensure PCI Posting Completes*/
4678 }
4679
4680 /****************************************************************************/
4681 /*                                                                          */
4682 /* Routine Name: ips_enable_int_morpheus                                    */
4683 /*                                                                          */
4684 /* Routine Description:                                                     */
4685 /*   Turn on interrupts                                                     */
4686 /*                                                                          */
4687 /****************************************************************************/
4688 static void
4689 ips_enable_int_morpheus(ips_ha_t * ha)
4690 {
4691         uint32_t Oimr;
4692
4693         METHOD_TRACE("ips_enable_int_morpheus", 1);
4694
4695         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4696         Oimr &= ~0x08;
4697         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4698         readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4699 }
4700
4701 /****************************************************************************/
4702 /*                                                                          */
4703 /* Routine Name: ips_init_copperhead                                        */
4704 /*                                                                          */
4705 /* Routine Description:                                                     */
4706 /*                                                                          */
4707 /*   Initialize a copperhead controller                                     */
4708 /*                                                                          */
4709 /****************************************************************************/
4710 static int
4711 ips_init_copperhead(ips_ha_t * ha)
4712 {
4713         uint8_t Isr;
4714         uint8_t Cbsp;
4715         uint8_t PostByte[IPS_MAX_POST_BYTES];
4716         uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4717         int i, j;
4718
4719         METHOD_TRACE("ips_init_copperhead", 1);
4720
4721         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4722                 for (j = 0; j < 45; j++) {
4723                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4724                         if (Isr & IPS_BIT_GHI)
4725                                 break;
4726
4727                         /* Delay for 1 Second */
4728                         MDELAY(IPS_ONE_SEC);
4729                 }
4730
4731                 if (j >= 45)
4732                         /* error occurred */
4733                         return (0);
4734
4735                 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4736                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4737         }
4738
4739         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4740                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4741                            "reset controller fails (post status %x %x).\n",
4742                            PostByte[0], PostByte[1]);
4743
4744                 return (0);
4745         }
4746
4747         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4748                 for (j = 0; j < 240; j++) {
4749                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4750                         if (Isr & IPS_BIT_GHI)
4751                                 break;
4752
4753                         /* Delay for 1 Second */
4754                         MDELAY(IPS_ONE_SEC);
4755                 }
4756
4757                 if (j >= 240)
4758                         /* error occurred */
4759                         return (0);
4760
4761                 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4762                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4763         }
4764
4765         for (i = 0; i < 240; i++) {
4766                 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
4767
4768                 if ((Cbsp & IPS_BIT_OP) == 0)
4769                         break;
4770
4771                 /* Delay for 1 Second */
4772                 MDELAY(IPS_ONE_SEC);
4773         }
4774
4775         if (i >= 240)
4776                 /* reset failed */
4777                 return (0);
4778
4779         /* setup CCCR */
4780         outl(0x1010, ha->io_addr + IPS_REG_CCCR);
4781
4782         /* Enable busmastering */
4783         outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
4784
4785         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4786                 /* fix for anaconda64 */
4787                 outl(0, ha->io_addr + IPS_REG_NDAE);
4788
4789         /* Enable interrupts */
4790         outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
4791
4792         return (1);
4793 }
4794
4795 /****************************************************************************/
4796 /*                                                                          */
4797 /* Routine Name: ips_init_copperhead_memio                                  */
4798 /*                                                                          */
4799 /* Routine Description:                                                     */
4800 /*                                                                          */
4801 /*   Initialize a copperhead controller with memory mapped I/O              */
4802 /*                                                                          */
4803 /****************************************************************************/
4804 static int
4805 ips_init_copperhead_memio(ips_ha_t * ha)
4806 {
4807         uint8_t Isr = 0;
4808         uint8_t Cbsp;
4809         uint8_t PostByte[IPS_MAX_POST_BYTES];
4810         uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4811         int i, j;
4812
4813         METHOD_TRACE("ips_init_copperhead_memio", 1);
4814
4815         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4816                 for (j = 0; j < 45; j++) {
4817                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4818                         if (Isr & IPS_BIT_GHI)
4819                                 break;
4820
4821                         /* Delay for 1 Second */
4822                         MDELAY(IPS_ONE_SEC);
4823                 }
4824
4825                 if (j >= 45)
4826                         /* error occurred */
4827                         return (0);
4828
4829                 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4830                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4831         }
4832
4833         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4834                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4835                            "reset controller fails (post status %x %x).\n",
4836                            PostByte[0], PostByte[1]);
4837
4838                 return (0);
4839         }
4840
4841         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4842                 for (j = 0; j < 240; j++) {
4843                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4844                         if (Isr & IPS_BIT_GHI)
4845                                 break;
4846
4847                         /* Delay for 1 Second */
4848                         MDELAY(IPS_ONE_SEC);
4849                 }
4850
4851                 if (j >= 240)
4852                         /* error occurred */
4853                         return (0);
4854
4855                 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4856                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4857         }
4858
4859         for (i = 0; i < 240; i++) {
4860                 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
4861
4862                 if ((Cbsp & IPS_BIT_OP) == 0)
4863                         break;
4864
4865                 /* Delay for 1 Second */
4866                 MDELAY(IPS_ONE_SEC);
4867         }
4868
4869         if (i >= 240)
4870                 /* error occurred */
4871                 return (0);
4872
4873         /* setup CCCR */
4874         writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
4875
4876         /* Enable busmastering */
4877         writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
4878
4879         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4880                 /* fix for anaconda64 */
4881                 writel(0, ha->mem_ptr + IPS_REG_NDAE);
4882
4883         /* Enable interrupts */
4884         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4885
4886         /* if we get here then everything went OK */
4887         return (1);
4888 }
4889
4890 /****************************************************************************/
4891 /*                                                                          */
4892 /* Routine Name: ips_init_morpheus                                          */
4893 /*                                                                          */
4894 /* Routine Description:                                                     */
4895 /*                                                                          */
4896 /*   Initialize a morpheus controller                                       */
4897 /*                                                                          */
4898 /****************************************************************************/
4899 static int
4900 ips_init_morpheus(ips_ha_t * ha)
4901 {
4902         uint32_t Post;
4903         uint32_t Config;
4904         uint32_t Isr;
4905         uint32_t Oimr;
4906         int i;
4907
4908         METHOD_TRACE("ips_init_morpheus", 1);
4909
4910         /* Wait up to 45 secs for Post */
4911         for (i = 0; i < 45; i++) {
4912                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4913
4914                 if (Isr & IPS_BIT_I960_MSG0I)
4915                         break;
4916
4917                 /* Delay for 1 Second */
4918                 MDELAY(IPS_ONE_SEC);
4919         }
4920
4921         if (i >= 45) {
4922                 /* error occurred */
4923                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4924                            "timeout waiting for post.\n");
4925
4926                 return (0);
4927         }
4928
4929         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4930
4931         if (Post == 0x4F00) {   /* If Flashing the Battery PIC         */
4932                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4933                            "Flashing Battery PIC, Please wait ...\n");
4934
4935                 /* Clear the interrupt bit */
4936                 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
4937                 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4938
4939                 for (i = 0; i < 120; i++) {     /*    Wait Up to 2 Min. for Completion */
4940                         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4941                         if (Post != 0x4F00)
4942                                 break;
4943                         /* Delay for 1 Second */
4944                         MDELAY(IPS_ONE_SEC);
4945                 }
4946
4947                 if (i >= 120) {
4948                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
4949                                    "timeout waiting for Battery PIC Flash\n");
4950                         return (0);
4951                 }
4952
4953         }
4954
4955         /* Clear the interrupt bit */
4956         Isr = (uint32_t) IPS_BIT_I960_MSG0I;
4957         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4958
4959         if (Post < (IPS_GOOD_POST_STATUS << 8)) {
4960                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4961                            "reset controller fails (post status %x).\n", Post);
4962
4963                 return (0);
4964         }
4965
4966         /* Wait up to 240 secs for config bytes */
4967         for (i = 0; i < 240; i++) {
4968                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4969
4970                 if (Isr & IPS_BIT_I960_MSG1I)
4971                         break;
4972
4973                 /* Delay for 1 Second */
4974                 MDELAY(IPS_ONE_SEC);
4975         }
4976
4977         if (i >= 240) {
4978                 /* error occurred */
4979                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4980                            "timeout waiting for config.\n");
4981
4982                 return (0);
4983         }
4984
4985         Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
4986
4987         /* Clear interrupt bit */
4988         Isr = (uint32_t) IPS_BIT_I960_MSG1I;
4989         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4990
4991         /* Turn on the interrupts */
4992         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4993         Oimr &= ~0x8;
4994         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4995
4996         /* if we get here then everything went OK */
4997
4998         /* Since we did a RESET, an EraseStripeLock may be needed */
4999         if (Post == 0xEF10) {
5000                 if ((Config == 0x000F) || (Config == 0x0009))
5001                         ha->requires_esl = 1;
5002         }
5003
5004         return (1);
5005 }
5006
5007 /****************************************************************************/
5008 /*                                                                          */
5009 /* Routine Name: ips_reset_copperhead                                       */
5010 /*                                                                          */
5011 /* Routine Description:                                                     */
5012 /*                                                                          */
5013 /*   Reset the controller                                                   */
5014 /*                                                                          */
5015 /****************************************************************************/
5016 static int
5017 ips_reset_copperhead(ips_ha_t * ha)
5018 {
5019         int reset_counter;
5020
5021         METHOD_TRACE("ips_reset_copperhead", 1);
5022
5023         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5024                   ips_name, ha->host_num, ha->io_addr, ha->pcidev->irq);
5025
5026         reset_counter = 0;
5027
5028         while (reset_counter < 2) {
5029                 reset_counter++;
5030
5031                 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5032
5033                 /* Delay for 1 Second */
5034                 MDELAY(IPS_ONE_SEC);
5035
5036                 outb(0, ha->io_addr + IPS_REG_SCPR);
5037
5038                 /* Delay for 1 Second */
5039                 MDELAY(IPS_ONE_SEC);
5040
5041                 if ((*ha->func.init) (ha))
5042                         break;
5043                 else if (reset_counter >= 2) {
5044
5045                         return (0);
5046                 }
5047         }
5048
5049         return (1);
5050 }
5051
5052 /****************************************************************************/
5053 /*                                                                          */
5054 /* Routine Name: ips_reset_copperhead_memio                                 */
5055 /*                                                                          */
5056 /* Routine Description:                                                     */
5057 /*                                                                          */
5058 /*   Reset the controller                                                   */
5059 /*                                                                          */
5060 /****************************************************************************/
5061 static int
5062 ips_reset_copperhead_memio(ips_ha_t * ha)
5063 {
5064         int reset_counter;
5065
5066         METHOD_TRACE("ips_reset_copperhead_memio", 1);
5067
5068         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5069                   ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5070
5071         reset_counter = 0;
5072
5073         while (reset_counter < 2) {
5074                 reset_counter++;
5075
5076                 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5077
5078                 /* Delay for 1 Second */
5079                 MDELAY(IPS_ONE_SEC);
5080
5081                 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5082
5083                 /* Delay for 1 Second */
5084                 MDELAY(IPS_ONE_SEC);
5085
5086                 if ((*ha->func.init) (ha))
5087                         break;
5088                 else if (reset_counter >= 2) {
5089
5090                         return (0);
5091                 }
5092         }
5093
5094         return (1);
5095 }
5096
5097 /****************************************************************************/
5098 /*                                                                          */
5099 /* Routine Name: ips_reset_morpheus                                         */
5100 /*                                                                          */
5101 /* Routine Description:                                                     */
5102 /*                                                                          */
5103 /*   Reset the controller                                                   */
5104 /*                                                                          */
5105 /****************************************************************************/
5106 static int
5107 ips_reset_morpheus(ips_ha_t * ha)
5108 {
5109         int reset_counter;
5110         uint8_t junk;
5111
5112         METHOD_TRACE("ips_reset_morpheus", 1);
5113
5114         DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5115                   ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5116
5117         reset_counter = 0;
5118
5119         while (reset_counter < 2) {
5120                 reset_counter++;
5121
5122                 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5123
5124                 /* Delay for 5 Seconds */
5125                 MDELAY(5 * IPS_ONE_SEC);
5126
5127                 /* Do a PCI config read to wait for adapter */
5128                 pci_read_config_byte(ha->pcidev, 4, &junk);
5129
5130                 if ((*ha->func.init) (ha))
5131                         break;
5132                 else if (reset_counter >= 2) {
5133
5134                         return (0);
5135                 }
5136         }
5137
5138         return (1);
5139 }
5140
5141 /****************************************************************************/
5142 /*                                                                          */
5143 /* Routine Name: ips_statinit                                               */
5144 /*                                                                          */
5145 /* Routine Description:                                                     */
5146 /*                                                                          */
5147 /*   Initialize the status queues on the controller                         */
5148 /*                                                                          */
5149 /****************************************************************************/
5150 static void
5151 ips_statinit(ips_ha_t * ha)
5152 {
5153         uint32_t phys_status_start;
5154
5155         METHOD_TRACE("ips_statinit", 1);
5156
5157         ha->adapt->p_status_start = ha->adapt->status;
5158         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5159         ha->adapt->p_status_tail = ha->adapt->status;
5160
5161         phys_status_start = ha->adapt->hw_status_start;
5162         outl(phys_status_start, ha->io_addr + IPS_REG_SQSR);
5163         outl(phys_status_start + IPS_STATUS_Q_SIZE,
5164              ha->io_addr + IPS_REG_SQER);
5165         outl(phys_status_start + IPS_STATUS_SIZE,
5166              ha->io_addr + IPS_REG_SQHR);
5167         outl(phys_status_start, ha->io_addr + IPS_REG_SQTR);
5168
5169         ha->adapt->hw_status_tail = phys_status_start;
5170 }
5171
5172 /****************************************************************************/
5173 /*                                                                          */
5174 /* Routine Name: ips_statinit_memio                                         */
5175 /*                                                                          */
5176 /* Routine Description:                                                     */
5177 /*                                                                          */
5178 /*   Initialize the status queues on the controller                         */
5179 /*                                                                          */
5180 /****************************************************************************/
5181 static void
5182 ips_statinit_memio(ips_ha_t * ha)
5183 {
5184         uint32_t phys_status_start;
5185
5186         METHOD_TRACE("ips_statinit_memio", 1);
5187
5188         ha->adapt->p_status_start = ha->adapt->status;
5189         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5190         ha->adapt->p_status_tail = ha->adapt->status;
5191
5192         phys_status_start = ha->adapt->hw_status_start;
5193         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5194         writel(phys_status_start + IPS_STATUS_Q_SIZE,
5195                ha->mem_ptr + IPS_REG_SQER);
5196         writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5197         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5198
5199         ha->adapt->hw_status_tail = phys_status_start;
5200 }
5201
5202 /****************************************************************************/
5203 /*                                                                          */
5204 /* Routine Name: ips_statupd_copperhead                                     */
5205 /*                                                                          */
5206 /* Routine Description:                                                     */
5207 /*                                                                          */
5208 /*   Remove an element from the status queue                                */
5209 /*                                                                          */
5210 /****************************************************************************/
5211 static uint32_t
5212 ips_statupd_copperhead(ips_ha_t * ha)
5213 {
5214         METHOD_TRACE("ips_statupd_copperhead", 1);
5215
5216         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5217                 ha->adapt->p_status_tail++;
5218                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5219         } else {
5220                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5221                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5222         }
5223
5224         outl(ha->adapt->hw_status_tail,
5225              ha->io_addr + IPS_REG_SQTR);
5226
5227         return (ha->adapt->p_status_tail->value);
5228 }
5229
5230 /****************************************************************************/
5231 /*                                                                          */
5232 /* Routine Name: ips_statupd_copperhead_memio                               */
5233 /*                                                                          */
5234 /* Routine Description:                                                     */
5235 /*                                                                          */
5236 /*   Remove an element from the status queue                                */
5237 /*                                                                          */
5238 /****************************************************************************/
5239 static uint32_t
5240 ips_statupd_copperhead_memio(ips_ha_t * ha)
5241 {
5242         METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5243
5244         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5245                 ha->adapt->p_status_tail++;
5246                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5247         } else {
5248                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5249                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5250         }
5251
5252         writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5253
5254         return (ha->adapt->p_status_tail->value);
5255 }
5256
5257 /****************************************************************************/
5258 /*                                                                          */
5259 /* Routine Name: ips_statupd_morpheus                                       */
5260 /*                                                                          */
5261 /* Routine Description:                                                     */
5262 /*                                                                          */
5263 /*   Remove an element from the status queue                                */
5264 /*                                                                          */
5265 /****************************************************************************/
5266 static uint32_t
5267 ips_statupd_morpheus(ips_ha_t * ha)
5268 {
5269         uint32_t val;
5270
5271         METHOD_TRACE("ips_statupd_morpheus", 1);
5272
5273         val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5274
5275         return (val);
5276 }
5277
5278 /****************************************************************************/
5279 /*                                                                          */
5280 /* Routine Name: ips_issue_copperhead                                       */
5281 /*                                                                          */
5282 /* Routine Description:                                                     */
5283 /*                                                                          */
5284 /*   Send a command down to the controller                                  */
5285 /*                                                                          */
5286 /****************************************************************************/
5287 static int
5288 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5289 {
5290         uint32_t TimeOut;
5291         uint32_t val;
5292
5293         METHOD_TRACE("ips_issue_copperhead", 1);
5294
5295         if (scb->scsi_cmd) {
5296                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5297                           ips_name,
5298                           ha->host_num,
5299                           scb->cdb[0],
5300                           scb->cmd.basic_io.command_id,
5301                           scb->bus, scb->target_id, scb->lun);
5302         } else {
5303                 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5304                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5305         }
5306
5307         TimeOut = 0;
5308
5309         while ((val =
5310                 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5311                 udelay(1000);
5312
5313                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5314                         if (!(val & IPS_BIT_START_STOP))
5315                                 break;
5316
5317                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5318                                    "ips_issue val [0x%x].\n", val);
5319                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5320                                    "ips_issue semaphore chk timeout.\n");
5321
5322                         return (IPS_FAILURE);
5323                 }               /* end if */
5324         }                       /* end while */
5325
5326         outl(scb->scb_busaddr, ha->io_addr + IPS_REG_CCSAR);
5327         outw(IPS_BIT_START_CMD, ha->io_addr + IPS_REG_CCCR);
5328
5329         return (IPS_SUCCESS);
5330 }
5331
5332 /****************************************************************************/
5333 /*                                                                          */
5334 /* Routine Name: ips_issue_copperhead_memio                                 */
5335 /*                                                                          */
5336 /* Routine Description:                                                     */
5337 /*                                                                          */
5338 /*   Send a command down to the controller                                  */
5339 /*                                                                          */
5340 /****************************************************************************/
5341 static int
5342 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5343 {
5344         uint32_t TimeOut;
5345         uint32_t val;
5346
5347         METHOD_TRACE("ips_issue_copperhead_memio", 1);
5348
5349         if (scb->scsi_cmd) {
5350                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5351                           ips_name,
5352                           ha->host_num,
5353                           scb->cdb[0],
5354                           scb->cmd.basic_io.command_id,
5355                           scb->bus, scb->target_id, scb->lun);
5356         } else {
5357                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5358                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5359         }
5360
5361         TimeOut = 0;
5362
5363         while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5364                 udelay(1000);
5365
5366                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5367                         if (!(val & IPS_BIT_START_STOP))
5368                                 break;
5369
5370                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5371                                    "ips_issue val [0x%x].\n", val);
5372                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5373                                    "ips_issue semaphore chk timeout.\n");
5374
5375                         return (IPS_FAILURE);
5376                 }               /* end if */
5377         }                       /* end while */
5378
5379         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5380         writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5381
5382         return (IPS_SUCCESS);
5383 }
5384
5385 /****************************************************************************/
5386 /*                                                                          */
5387 /* Routine Name: ips_issue_i2o                                              */
5388 /*                                                                          */
5389 /* Routine Description:                                                     */
5390 /*                                                                          */
5391 /*   Send a command down to the controller                                  */
5392 /*                                                                          */
5393 /****************************************************************************/
5394 static int
5395 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5396 {
5397
5398         METHOD_TRACE("ips_issue_i2o", 1);
5399
5400         if (scb->scsi_cmd) {
5401                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5402                           ips_name,
5403                           ha->host_num,
5404                           scb->cdb[0],
5405                           scb->cmd.basic_io.command_id,
5406                           scb->bus, scb->target_id, scb->lun);
5407         } else {
5408                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5409                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5410         }
5411
5412         outl(scb->scb_busaddr, ha->io_addr + IPS_REG_I2O_INMSGQ);
5413
5414         return (IPS_SUCCESS);
5415 }
5416
5417 /****************************************************************************/
5418 /*                                                                          */
5419 /* Routine Name: ips_issue_i2o_memio                                        */
5420 /*                                                                          */
5421 /* Routine Description:                                                     */
5422 /*                                                                          */
5423 /*   Send a command down to the controller                                  */
5424 /*                                                                          */
5425 /****************************************************************************/
5426 static int
5427 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5428 {
5429
5430         METHOD_TRACE("ips_issue_i2o_memio", 1);
5431
5432         if (scb->scsi_cmd) {
5433                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5434                           ips_name,
5435                           ha->host_num,
5436                           scb->cdb[0],
5437                           scb->cmd.basic_io.command_id,
5438                           scb->bus, scb->target_id, scb->lun);
5439         } else {
5440                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5441                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5442         }
5443
5444         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5445
5446         return (IPS_SUCCESS);
5447 }
5448
5449 /****************************************************************************/
5450 /*                                                                          */
5451 /* Routine Name: ips_isintr_copperhead                                      */
5452 /*                                                                          */
5453 /* Routine Description:                                                     */
5454 /*                                                                          */
5455 /*   Test to see if an interrupt is for us                                  */
5456 /*                                                                          */
5457 /****************************************************************************/
5458 static int
5459 ips_isintr_copperhead(ips_ha_t * ha)
5460 {
5461         uint8_t Isr;
5462
5463         METHOD_TRACE("ips_isintr_copperhead", 2);
5464
5465         Isr = inb(ha->io_addr + IPS_REG_HISR);
5466
5467         if (Isr == 0xFF)
5468                 /* ?!?! Nothing really there */
5469                 return (0);
5470
5471         if (Isr & IPS_BIT_SCE)
5472                 return (1);
5473         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5474                 /* status queue overflow or GHI */
5475                 /* just clear the interrupt */
5476                 outb(Isr, ha->io_addr + IPS_REG_HISR);
5477         }
5478
5479         return (0);
5480 }
5481
5482 /****************************************************************************/
5483 /*                                                                          */
5484 /* Routine Name: ips_isintr_copperhead_memio                                */
5485 /*                                                                          */
5486 /* Routine Description:                                                     */
5487 /*                                                                          */
5488 /*   Test to see if an interrupt is for us                                  */
5489 /*                                                                          */
5490 /****************************************************************************/
5491 static int
5492 ips_isintr_copperhead_memio(ips_ha_t * ha)
5493 {
5494         uint8_t Isr;
5495
5496         METHOD_TRACE("ips_isintr_memio", 2);
5497
5498         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5499
5500         if (Isr == 0xFF)
5501                 /* ?!?! Nothing really there */
5502                 return (0);
5503
5504         if (Isr & IPS_BIT_SCE)
5505                 return (1);
5506         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5507                 /* status queue overflow or GHI */
5508                 /* just clear the interrupt */
5509                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5510         }
5511
5512         return (0);
5513 }
5514
5515 /****************************************************************************/
5516 /*                                                                          */
5517 /* Routine Name: ips_isintr_morpheus                                        */
5518 /*                                                                          */
5519 /* Routine Description:                                                     */
5520 /*                                                                          */
5521 /*   Test to see if an interrupt is for us                                  */
5522 /*                                                                          */
5523 /****************************************************************************/
5524 static int
5525 ips_isintr_morpheus(ips_ha_t * ha)
5526 {
5527         uint32_t Isr;
5528
5529         METHOD_TRACE("ips_isintr_morpheus", 2);
5530
5531         Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5532
5533         if (Isr & IPS_BIT_I2O_OPQI)
5534                 return (1);
5535         else
5536                 return (0);
5537 }
5538
5539 /****************************************************************************/
5540 /*                                                                          */
5541 /* Routine Name: ips_wait                                                   */
5542 /*                                                                          */
5543 /* Routine Description:                                                     */
5544 /*                                                                          */
5545 /*   Wait for a command to complete                                         */
5546 /*                                                                          */
5547 /****************************************************************************/
5548 static int
5549 ips_wait(ips_ha_t * ha, int time, int intr)
5550 {
5551         int ret;
5552         int done;
5553
5554         METHOD_TRACE("ips_wait", 1);
5555
5556         ret = IPS_FAILURE;
5557         done = FALSE;
5558
5559         time *= IPS_ONE_SEC;    /* convert seconds */
5560
5561         while ((time > 0) && (!done)) {
5562                 if (intr == IPS_INTR_ON) {
5563                         if (ha->waitflag == FALSE) {
5564                                 ret = IPS_SUCCESS;
5565                                 done = TRUE;
5566                                 break;
5567                         }
5568                 } else if (intr == IPS_INTR_IORL) {
5569                         if (ha->waitflag == FALSE) {
5570                                 /*
5571                                  * controller generated an interrupt to
5572                                  * acknowledge completion of the command
5573                                  * and ips_intr() has serviced the interrupt.
5574                                  */
5575                                 ret = IPS_SUCCESS;
5576                                 done = TRUE;
5577                                 break;
5578                         }
5579
5580                         /*
5581                          * NOTE: we already have the io_request_lock so
5582                          * even if we get an interrupt it won't get serviced
5583                          * until after we finish.
5584                          */
5585
5586                         (*ha->func.intr) (ha);
5587                 }
5588
5589                 /* This looks like a very evil loop, but it only does this during start-up */
5590                 udelay(1000);
5591                 time--;
5592         }
5593
5594         return (ret);
5595 }
5596
5597 /****************************************************************************/
5598 /*                                                                          */
5599 /* Routine Name: ips_write_driver_status                                    */
5600 /*                                                                          */
5601 /* Routine Description:                                                     */
5602 /*                                                                          */
5603 /*   Write OS/Driver version to Page 5 of the nvram on the controller       */
5604 /*                                                                          */
5605 /****************************************************************************/
5606 static int
5607 ips_write_driver_status(ips_ha_t * ha, int intr)
5608 {
5609         METHOD_TRACE("ips_write_driver_status", 1);
5610
5611         if (!ips_readwrite_page5(ha, FALSE, intr)) {
5612                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5613                            "unable to read NVRAM page 5.\n");
5614
5615                 return (0);
5616         }
5617
5618         /* check to make sure the page has a valid */
5619         /* signature */
5620         if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5621                 DEBUG_VAR(1,
5622                           "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5623                           ips_name, ha->host_num, ha->nvram->signature);
5624                 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5625         }
5626
5627         DEBUG_VAR(2,
5628                   "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5629                   ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5630                   ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5631                   ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5632                   ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5633                   ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5634                   ha->nvram->bios_low[3]);
5635
5636         ips_get_bios_version(ha, intr);
5637
5638         /* change values (as needed) */
5639         ha->nvram->operating_system = IPS_OS_LINUX;
5640         ha->nvram->adapter_type = ha->ad_type;
5641         strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5642         strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5643         strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5644         strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5645
5646         ha->nvram->versioning = 0;      /* Indicate the Driver Does Not Support Versioning */
5647
5648         /* now update the page */
5649         if (!ips_readwrite_page5(ha, TRUE, intr)) {
5650                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5651                            "unable to write NVRAM page 5.\n");
5652
5653                 return (0);
5654         }
5655
5656         /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5657         ha->slot_num = ha->nvram->adapter_slot;
5658
5659         return (1);
5660 }
5661
5662 /****************************************************************************/
5663 /*                                                                          */
5664 /* Routine Name: ips_read_adapter_status                                    */
5665 /*                                                                          */
5666 /* Routine Description:                                                     */
5667 /*                                                                          */
5668 /*   Do an Inquiry command to the adapter                                   */
5669 /*                                                                          */
5670 /****************************************************************************/
5671 static int
5672 ips_read_adapter_status(ips_ha_t * ha, int intr)
5673 {
5674         ips_scb_t *scb;
5675         int ret;
5676
5677         METHOD_TRACE("ips_read_adapter_status", 1);
5678
5679         scb = &ha->scbs[ha->max_cmds - 1];
5680
5681         ips_init_scb(ha, scb);
5682
5683         scb->timeout = ips_cmd_timeout;
5684         scb->cdb[0] = IPS_CMD_ENQUIRY;
5685
5686         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5687         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5688         scb->cmd.basic_io.sg_count = 0;
5689         scb->cmd.basic_io.lba = 0;
5690         scb->cmd.basic_io.sector_count = 0;
5691         scb->cmd.basic_io.log_drv = 0;
5692         scb->data_len = sizeof (*ha->enq);
5693         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5694
5695         /* send command */
5696         if (((ret =
5697               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5698             || (ret == IPS_SUCCESS_IMM)
5699             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5700                 return (0);
5701
5702         return (1);
5703 }
5704
5705 /****************************************************************************/
5706 /*                                                                          */
5707 /* Routine Name: ips_read_subsystem_parameters                              */
5708 /*                                                                          */
5709 /* Routine Description:                                                     */
5710 /*                                                                          */
5711 /*   Read subsystem parameters from the adapter                             */
5712 /*                                                                          */
5713 /****************************************************************************/
5714 static int
5715 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
5716 {
5717         ips_scb_t *scb;
5718         int ret;
5719
5720         METHOD_TRACE("ips_read_subsystem_parameters", 1);
5721
5722         scb = &ha->scbs[ha->max_cmds - 1];
5723
5724         ips_init_scb(ha, scb);
5725
5726         scb->timeout = ips_cmd_timeout;
5727         scb->cdb[0] = IPS_CMD_GET_SUBSYS;
5728
5729         scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
5730         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5731         scb->cmd.basic_io.sg_count = 0;
5732         scb->cmd.basic_io.lba = 0;
5733         scb->cmd.basic_io.sector_count = 0;
5734         scb->cmd.basic_io.log_drv = 0;
5735         scb->data_len = sizeof (*ha->subsys);
5736         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5737
5738         /* send command */
5739         if (((ret =
5740               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5741             || (ret == IPS_SUCCESS_IMM)
5742             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5743                 return (0);
5744
5745         memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
5746         return (1);
5747 }
5748
5749 /****************************************************************************/
5750 /*                                                                          */
5751 /* Routine Name: ips_read_config                                            */
5752 /*                                                                          */
5753 /* Routine Description:                                                     */
5754 /*                                                                          */
5755 /*   Read the configuration on the adapter                                  */
5756 /*                                                                          */
5757 /****************************************************************************/
5758 static int
5759 ips_read_config(ips_ha_t * ha, int intr)
5760 {
5761         ips_scb_t *scb;
5762         int i;
5763         int ret;
5764
5765         METHOD_TRACE("ips_read_config", 1);
5766
5767         /* set defaults for initiator IDs */
5768         for (i = 0; i < 4; i++)
5769                 ha->conf->init_id[i] = 7;
5770
5771         scb = &ha->scbs[ha->max_cmds - 1];
5772
5773         ips_init_scb(ha, scb);
5774
5775         scb->timeout = ips_cmd_timeout;
5776         scb->cdb[0] = IPS_CMD_READ_CONF;
5777
5778         scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
5779         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5780         scb->data_len = sizeof (*ha->conf);
5781         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5782
5783         /* send command */
5784         if (((ret =
5785               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5786             || (ret == IPS_SUCCESS_IMM)
5787             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5788
5789                 memset(ha->conf, 0, sizeof (IPS_CONF));
5790
5791                 /* reset initiator IDs */
5792                 for (i = 0; i < 4; i++)
5793                         ha->conf->init_id[i] = 7;
5794
5795                 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5796                 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
5797                     IPS_CMD_CMPLT_WERROR)
5798                         return (1);
5799
5800                 return (0);
5801         }
5802
5803         memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
5804         return (1);
5805 }
5806
5807 /****************************************************************************/
5808 /*                                                                          */
5809 /* Routine Name: ips_readwrite_page5                                        */
5810 /*                                                                          */
5811 /* Routine Description:                                                     */
5812 /*                                                                          */
5813 /*   Read nvram page 5 from the adapter                                     */
5814 /*                                                                          */
5815 /****************************************************************************/
5816 static int
5817 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
5818 {
5819         ips_scb_t *scb;
5820         int ret;
5821
5822         METHOD_TRACE("ips_readwrite_page5", 1);
5823
5824         scb = &ha->scbs[ha->max_cmds - 1];
5825
5826         ips_init_scb(ha, scb);
5827
5828         scb->timeout = ips_cmd_timeout;
5829         scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
5830
5831         scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
5832         scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
5833         scb->cmd.nvram.page = 5;
5834         scb->cmd.nvram.write = write;
5835         scb->cmd.nvram.reserved = 0;
5836         scb->cmd.nvram.reserved2 = 0;
5837         scb->data_len = sizeof (*ha->nvram);
5838         scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
5839         if (write)
5840                 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
5841
5842         /* issue the command */
5843         if (((ret =
5844               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5845             || (ret == IPS_SUCCESS_IMM)
5846             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5847
5848                 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
5849
5850                 return (0);
5851         }
5852         if (!write)
5853                 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
5854         return (1);
5855 }
5856
5857 /****************************************************************************/
5858 /*                                                                          */
5859 /* Routine Name: ips_clear_adapter                                          */
5860 /*                                                                          */
5861 /* Routine Description:                                                     */
5862 /*                                                                          */
5863 /*   Clear the stripe lock tables                                           */
5864 /*                                                                          */
5865 /****************************************************************************/
5866 static int
5867 ips_clear_adapter(ips_ha_t * ha, int intr)
5868 {
5869         ips_scb_t *scb;
5870         int ret;
5871
5872         METHOD_TRACE("ips_clear_adapter", 1);
5873
5874         scb = &ha->scbs[ha->max_cmds - 1];
5875
5876         ips_init_scb(ha, scb);
5877
5878         scb->timeout = ips_reset_timeout;
5879         scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
5880
5881         scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
5882         scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
5883         scb->cmd.config_sync.channel = 0;
5884         scb->cmd.config_sync.source_target = IPS_POCL;
5885         scb->cmd.config_sync.reserved = 0;
5886         scb->cmd.config_sync.reserved2 = 0;
5887         scb->cmd.config_sync.reserved3 = 0;
5888
5889         /* issue command */
5890         if (((ret =
5891               ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
5892             || (ret == IPS_SUCCESS_IMM)
5893             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5894                 return (0);
5895
5896         /* send unlock stripe command */
5897         ips_init_scb(ha, scb);
5898
5899         scb->cdb[0] = IPS_CMD_ERROR_TABLE;
5900         scb->timeout = ips_reset_timeout;
5901
5902         scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
5903         scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
5904         scb->cmd.unlock_stripe.log_drv = 0;
5905         scb->cmd.unlock_stripe.control = IPS_CSL;
5906         scb->cmd.unlock_stripe.reserved = 0;
5907         scb->cmd.unlock_stripe.reserved2 = 0;
5908         scb->cmd.unlock_stripe.reserved3 = 0;
5909
5910         /* issue command */
5911         if (((ret =
5912               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5913             || (ret == IPS_SUCCESS_IMM)
5914             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5915                 return (0);
5916
5917         return (1);
5918 }
5919
5920 /****************************************************************************/
5921 /*                                                                          */
5922 /* Routine Name: ips_ffdc_reset                                             */
5923 /*                                                                          */
5924 /* Routine Description:                                                     */
5925 /*                                                                          */
5926 /*   FFDC: write reset info                                                 */
5927 /*                                                                          */
5928 /****************************************************************************/
5929 static void
5930 ips_ffdc_reset(ips_ha_t * ha, int intr)
5931 {
5932         ips_scb_t *scb;
5933
5934         METHOD_TRACE("ips_ffdc_reset", 1);
5935
5936         scb = &ha->scbs[ha->max_cmds - 1];
5937
5938         ips_init_scb(ha, scb);
5939
5940         scb->timeout = ips_cmd_timeout;
5941         scb->cdb[0] = IPS_CMD_FFDC;
5942         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
5943         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
5944         scb->cmd.ffdc.reset_count = ha->reset_count;
5945         scb->cmd.ffdc.reset_type = 0x80;
5946
5947         /* convert time to what the card wants */
5948         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
5949
5950         /* issue command */
5951         ips_send_wait(ha, scb, ips_cmd_timeout, intr);
5952 }
5953
5954 /****************************************************************************/
5955 /*                                                                          */
5956 /* Routine Name: ips_ffdc_time                                              */
5957 /*                                                                          */
5958 /* Routine Description:                                                     */
5959 /*                                                                          */
5960 /*   FFDC: write time info                                                  */
5961 /*                                                                          */
5962 /****************************************************************************/
5963 static void
5964 ips_ffdc_time(ips_ha_t * ha)
5965 {
5966         ips_scb_t *scb;
5967
5968         METHOD_TRACE("ips_ffdc_time", 1);
5969
5970         DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
5971
5972         scb = &ha->scbs[ha->max_cmds - 1];
5973
5974         ips_init_scb(ha, scb);
5975
5976         scb->timeout = ips_cmd_timeout;
5977         scb->cdb[0] = IPS_CMD_FFDC;
5978         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
5979         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
5980         scb->cmd.ffdc.reset_count = 0;
5981         scb->cmd.ffdc.reset_type = 0;
5982
5983         /* convert time to what the card wants */
5984         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
5985
5986         /* issue command */
5987         ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
5988 }
5989
5990 /****************************************************************************/
5991 /*                                                                          */
5992 /* Routine Name: ips_fix_ffdc_time                                          */
5993 /*                                                                          */
5994 /* Routine Description:                                                     */
5995 /*   Adjust time_t to what the card wants                                   */
5996 /*                                                                          */
5997 /****************************************************************************/
5998 static void
5999 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6000 {
6001         long days;
6002         long rem;
6003         int i;
6004         int year;
6005         int yleap;
6006         int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6007         int month_lengths[12][2] = { {31, 31},
6008         {28, 29},
6009         {31, 31},
6010         {30, 30},
6011         {31, 31},
6012         {30, 30},
6013         {31, 31},
6014         {31, 31},
6015         {30, 30},
6016         {31, 31},
6017         {30, 30},
6018         {31, 31}
6019         };
6020
6021         METHOD_TRACE("ips_fix_ffdc_time", 1);
6022
6023         days = current_time / IPS_SECS_DAY;
6024         rem = current_time % IPS_SECS_DAY;
6025
6026         scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6027         rem = rem % IPS_SECS_HOUR;
6028         scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6029         scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6030
6031         year = IPS_EPOCH_YEAR;
6032         while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6033                 int newy;
6034
6035                 newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6036                 if (days < 0)
6037                         --newy;
6038                 days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6039                     IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6040                     IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6041                 year = newy;
6042         }
6043
6044         scb->cmd.ffdc.yearH = year / 100;
6045         scb->cmd.ffdc.yearL = year % 100;
6046
6047         for (i = 0; days >= month_lengths[i][yleap]; ++i)
6048                 days -= month_lengths[i][yleap];
6049
6050         scb->cmd.ffdc.month = i + 1;
6051         scb->cmd.ffdc.day = days + 1;
6052 }
6053
6054 /****************************************************************************
6055  * BIOS Flash Routines                                                      *
6056  ****************************************************************************/
6057
6058 /****************************************************************************/
6059 /*                                                                          */
6060 /* Routine Name: ips_erase_bios                                             */
6061 /*                                                                          */
6062 /* Routine Description:                                                     */
6063 /*   Erase the BIOS on the adapter                                          */
6064 /*                                                                          */
6065 /****************************************************************************/
6066 static int
6067 ips_erase_bios(ips_ha_t * ha)
6068 {
6069         int timeout;
6070         uint8_t status = 0;
6071
6072         METHOD_TRACE("ips_erase_bios", 1);
6073
6074         status = 0;
6075
6076         /* Clear the status register */
6077         outl(0, ha->io_addr + IPS_REG_FLAP);
6078         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6079                 udelay(25);     /* 25 us */
6080
6081         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6082         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6083                 udelay(25);     /* 25 us */
6084
6085         /* Erase Setup */
6086         outb(0x20, ha->io_addr + IPS_REG_FLDP);
6087         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6088                 udelay(25);     /* 25 us */
6089
6090         /* Erase Confirm */
6091         outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6092         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6093                 udelay(25);     /* 25 us */
6094
6095         /* Erase Status */
6096         outb(0x70, ha->io_addr + IPS_REG_FLDP);
6097         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6098                 udelay(25);     /* 25 us */
6099
6100         timeout = 80000;        /* 80 seconds */
6101
6102         while (timeout > 0) {
6103                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6104                         outl(0, ha->io_addr + IPS_REG_FLAP);
6105                         udelay(25);     /* 25 us */
6106                 }
6107
6108                 status = inb(ha->io_addr + IPS_REG_FLDP);
6109
6110                 if (status & 0x80)
6111                         break;
6112
6113                 MDELAY(1);
6114                 timeout--;
6115         }
6116
6117         /* check for timeout */
6118         if (timeout <= 0) {
6119                 /* timeout */
6120
6121                 /* try to suspend the erase */
6122                 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6123                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6124                         udelay(25);     /* 25 us */
6125
6126                 /* wait for 10 seconds */
6127                 timeout = 10000;
6128                 while (timeout > 0) {
6129                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6130                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6131                                 udelay(25);     /* 25 us */
6132                         }
6133
6134                         status = inb(ha->io_addr + IPS_REG_FLDP);
6135
6136                         if (status & 0xC0)
6137                                 break;
6138
6139                         MDELAY(1);
6140                         timeout--;
6141                 }
6142
6143                 return (1);
6144         }
6145
6146         /* check for valid VPP */
6147         if (status & 0x08)
6148                 /* VPP failure */
6149                 return (1);
6150
6151         /* check for successful flash */
6152         if (status & 0x30)
6153                 /* sequence error */
6154                 return (1);
6155
6156         /* Otherwise, we were successful */
6157         /* clear status */
6158         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6159         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6160                 udelay(25);     /* 25 us */
6161
6162         /* enable reads */
6163         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6164         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6165                 udelay(25);     /* 25 us */
6166
6167         return (0);
6168 }
6169
6170 /****************************************************************************/
6171 /*                                                                          */
6172 /* Routine Name: ips_erase_bios_memio                                       */
6173 /*                                                                          */
6174 /* Routine Description:                                                     */
6175 /*   Erase the BIOS on the adapter                                          */
6176 /*                                                                          */
6177 /****************************************************************************/
6178 static int
6179 ips_erase_bios_memio(ips_ha_t * ha)
6180 {
6181         int timeout;
6182         uint8_t status;
6183
6184         METHOD_TRACE("ips_erase_bios_memio", 1);
6185
6186         status = 0;
6187
6188         /* Clear the status register */
6189         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6190         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6191                 udelay(25);     /* 25 us */
6192
6193         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6194         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6195                 udelay(25);     /* 25 us */
6196
6197         /* Erase Setup */
6198         writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6199         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6200                 udelay(25);     /* 25 us */
6201
6202         /* Erase Confirm */
6203         writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6204         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6205                 udelay(25);     /* 25 us */
6206
6207         /* Erase Status */
6208         writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6209         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6210                 udelay(25);     /* 25 us */
6211
6212         timeout = 80000;        /* 80 seconds */
6213
6214         while (timeout > 0) {
6215                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6216                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6217                         udelay(25);     /* 25 us */
6218                 }
6219
6220                 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6221
6222                 if (status & 0x80)
6223                         break;
6224
6225                 MDELAY(1);
6226                 timeout--;
6227         }
6228
6229         /* check for timeout */
6230         if (timeout <= 0) {
6231                 /* timeout */
6232
6233                 /* try to suspend the erase */
6234                 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6235                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6236                         udelay(25);     /* 25 us */
6237
6238                 /* wait for 10 seconds */
6239                 timeout = 10000;
6240                 while (timeout > 0) {
6241                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6242                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6243                                 udelay(25);     /* 25 us */
6244                         }
6245
6246                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6247
6248                         if (status & 0xC0)
6249                                 break;
6250
6251                         MDELAY(1);
6252                         timeout--;
6253                 }
6254
6255                 return (1);
6256         }
6257
6258         /* check for valid VPP */
6259         if (status & 0x08)
6260                 /* VPP failure */
6261                 return (1);
6262
6263         /* check for successful flash */
6264         if (status & 0x30)
6265                 /* sequence error */
6266                 return (1);
6267
6268         /* Otherwise, we were successful */
6269         /* clear status */
6270         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6271         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6272                 udelay(25);     /* 25 us */
6273
6274         /* enable reads */
6275         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6276         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6277                 udelay(25);     /* 25 us */
6278
6279         return (0);
6280 }
6281
6282 /****************************************************************************/
6283 /*                                                                          */
6284 /* Routine Name: ips_program_bios                                           */
6285 /*                                                                          */
6286 /* Routine Description:                                                     */
6287 /*   Program the BIOS on the adapter                                        */
6288 /*                                                                          */
6289 /****************************************************************************/
6290 static int
6291 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6292                  uint32_t offset)
6293 {
6294         int i;
6295         int timeout;
6296         uint8_t status = 0;
6297
6298         METHOD_TRACE("ips_program_bios", 1);
6299
6300         status = 0;
6301
6302         for (i = 0; i < buffersize; i++) {
6303                 /* write a byte */
6304                 outl(i + offset, ha->io_addr + IPS_REG_FLAP);
6305                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6306                         udelay(25);     /* 25 us */
6307
6308                 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6309                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6310                         udelay(25);     /* 25 us */
6311
6312                 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6313                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6314                         udelay(25);     /* 25 us */
6315
6316                 /* wait up to one second */
6317                 timeout = 1000;
6318                 while (timeout > 0) {
6319                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6320                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6321                                 udelay(25);     /* 25 us */
6322                         }
6323
6324                         status = inb(ha->io_addr + IPS_REG_FLDP);
6325
6326                         if (status & 0x80)
6327                                 break;
6328
6329                         MDELAY(1);
6330                         timeout--;
6331                 }
6332
6333                 if (timeout == 0) {
6334                         /* timeout error */
6335                         outl(0, ha->io_addr + IPS_REG_FLAP);
6336                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6337                                 udelay(25);     /* 25 us */
6338
6339                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6340                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6341                                 udelay(25);     /* 25 us */
6342
6343                         return (1);
6344                 }
6345
6346                 /* check the status */
6347                 if (status & 0x18) {
6348                         /* programming error */
6349                         outl(0, ha->io_addr + IPS_REG_FLAP);
6350                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6351                                 udelay(25);     /* 25 us */
6352
6353                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6354                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6355                                 udelay(25);     /* 25 us */
6356
6357                         return (1);
6358                 }
6359         }                       /* end for */
6360
6361         /* Enable reading */
6362         outl(0, ha->io_addr + IPS_REG_FLAP);
6363         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6364                 udelay(25);     /* 25 us */
6365
6366         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6367         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6368                 udelay(25);     /* 25 us */
6369
6370         return (0);
6371 }
6372
6373 /****************************************************************************/
6374 /*                                                                          */
6375 /* Routine Name: ips_program_bios_memio                                     */
6376 /*                                                                          */
6377 /* Routine Description:                                                     */
6378 /*   Program the BIOS on the adapter                                        */
6379 /*                                                                          */
6380 /****************************************************************************/
6381 static int
6382 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6383                        uint32_t offset)
6384 {
6385         int i;
6386         int timeout;
6387         uint8_t status = 0;
6388
6389         METHOD_TRACE("ips_program_bios_memio", 1);
6390
6391         status = 0;
6392
6393         for (i = 0; i < buffersize; i++) {
6394                 /* write a byte */
6395                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6396                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6397                         udelay(25);     /* 25 us */
6398
6399                 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6400                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6401                         udelay(25);     /* 25 us */
6402
6403                 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6404                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6405                         udelay(25);     /* 25 us */
6406
6407                 /* wait up to one second */
6408                 timeout = 1000;
6409                 while (timeout > 0) {
6410                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6411                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6412                                 udelay(25);     /* 25 us */
6413                         }
6414
6415                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6416
6417                         if (status & 0x80)
6418                                 break;
6419
6420                         MDELAY(1);
6421                         timeout--;
6422                 }
6423
6424                 if (timeout == 0) {
6425                         /* timeout error */
6426                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6427                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6428                                 udelay(25);     /* 25 us */
6429
6430                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6431                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6432                                 udelay(25);     /* 25 us */
6433
6434                         return (1);
6435                 }
6436
6437                 /* check the status */
6438                 if (status & 0x18) {
6439                         /* programming error */
6440                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6441                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6442                                 udelay(25);     /* 25 us */
6443
6444                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6445                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6446                                 udelay(25);     /* 25 us */
6447
6448                         return (1);
6449                 }
6450         }                       /* end for */
6451
6452         /* Enable reading */
6453         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6454         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6455                 udelay(25);     /* 25 us */
6456
6457         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6458         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6459                 udelay(25);     /* 25 us */
6460
6461         return (0);
6462 }
6463
6464 /****************************************************************************/
6465 /*                                                                          */
6466 /* Routine Name: ips_verify_bios                                            */
6467 /*                                                                          */
6468 /* Routine Description:                                                     */
6469 /*   Verify the BIOS on the adapter                                         */
6470 /*                                                                          */
6471 /****************************************************************************/
6472 static int
6473 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6474                 uint32_t offset)
6475 {
6476         uint8_t checksum;
6477         int i;
6478
6479         METHOD_TRACE("ips_verify_bios", 1);
6480
6481         /* test 1st byte */
6482         outl(0, ha->io_addr + IPS_REG_FLAP);
6483         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6484                 udelay(25);     /* 25 us */
6485
6486         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6487                 return (1);
6488
6489         outl(1, ha->io_addr + IPS_REG_FLAP);
6490         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6491                 udelay(25);     /* 25 us */
6492         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6493                 return (1);
6494
6495         checksum = 0xff;
6496         for (i = 2; i < buffersize; i++) {
6497
6498                 outl(i + offset, ha->io_addr + IPS_REG_FLAP);
6499                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6500                         udelay(25);     /* 25 us */
6501
6502                 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6503         }
6504
6505         if (checksum != 0)
6506                 /* failure */
6507                 return (1);
6508         else
6509                 /* success */
6510                 return (0);
6511 }
6512
6513 /****************************************************************************/
6514 /*                                                                          */
6515 /* Routine Name: ips_verify_bios_memio                                      */
6516 /*                                                                          */
6517 /* Routine Description:                                                     */
6518 /*   Verify the BIOS on the adapter                                         */
6519 /*                                                                          */
6520 /****************************************************************************/
6521 static int
6522 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6523                       uint32_t offset)
6524 {
6525         uint8_t checksum;
6526         int i;
6527
6528         METHOD_TRACE("ips_verify_bios_memio", 1);
6529
6530         /* test 1st byte */
6531         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6532         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6533                 udelay(25);     /* 25 us */
6534
6535         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6536                 return (1);
6537
6538         writel(1, ha->mem_ptr + IPS_REG_FLAP);
6539         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6540                 udelay(25);     /* 25 us */
6541         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6542                 return (1);
6543
6544         checksum = 0xff;
6545         for (i = 2; i < buffersize; i++) {
6546
6547                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6548                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6549                         udelay(25);     /* 25 us */
6550
6551                 checksum =
6552                     (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6553         }
6554
6555         if (checksum != 0)
6556                 /* failure */
6557                 return (1);
6558         else
6559                 /* success */
6560                 return (0);
6561 }
6562
6563 /****************************************************************************/
6564 /*                                                                          */
6565 /* Routine Name: ips_abort_init                                             */
6566 /*                                                                          */
6567 /* Routine Description:                                                     */
6568 /*   cleanup routine for a failed adapter initialization                    */
6569 /****************************************************************************/
6570 static int
6571 ips_abort_init(ips_ha_t * ha, int index)
6572 {
6573         ha->active = 0;
6574         ips_free(ha);
6575         ips_ha[index] = NULL;
6576         ips_sh[index] = NULL;
6577         return -1;
6578 }
6579
6580 /****************************************************************************/
6581 /*                                                                          */
6582 /* Routine Name: ips_shift_controllers                                      */
6583 /*                                                                          */
6584 /* Routine Description:                                                     */
6585 /*   helper function for ordering adapters                                  */
6586 /****************************************************************************/
6587 static void
6588 ips_shift_controllers(int lowindex, int highindex)
6589 {
6590         ips_ha_t *ha_sav = ips_ha[highindex];
6591         struct Scsi_Host *sh_sav = ips_sh[highindex];
6592         int i;
6593
6594         for (i = highindex; i > lowindex; i--) {
6595                 ips_ha[i] = ips_ha[i - 1];
6596                 ips_sh[i] = ips_sh[i - 1];
6597                 ips_ha[i]->host_num = i;
6598         }
6599         ha_sav->host_num = lowindex;
6600         ips_ha[lowindex] = ha_sav;
6601         ips_sh[lowindex] = sh_sav;
6602 }
6603
6604 /****************************************************************************/
6605 /*                                                                          */
6606 /* Routine Name: ips_order_controllers                                      */
6607 /*                                                                          */
6608 /* Routine Description:                                                     */
6609 /*   place controllers is the "proper" boot order                           */
6610 /****************************************************************************/
6611 static void
6612 ips_order_controllers(void)
6613 {
6614         int i, j, tmp, position = 0;
6615         IPS_NVRAM_P5 *nvram;
6616         if (!ips_ha[0])
6617                 return;
6618         nvram = ips_ha[0]->nvram;
6619
6620         if (nvram->adapter_order[0]) {
6621                 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6622                         for (j = position; j < ips_num_controllers; j++) {
6623                                 switch (ips_ha[j]->ad_type) {
6624                                 case IPS_ADTYPE_SERVERAID6M:
6625                                 case IPS_ADTYPE_SERVERAID7M:
6626                                         if (nvram->adapter_order[i] == 'M') {
6627                                                 ips_shift_controllers(position,
6628                                                                       j);
6629                                                 position++;
6630                                         }
6631                                         break;
6632                                 case IPS_ADTYPE_SERVERAID4L:
6633                                 case IPS_ADTYPE_SERVERAID4M:
6634                                 case IPS_ADTYPE_SERVERAID4MX:
6635                                 case IPS_ADTYPE_SERVERAID4LX:
6636                                         if (nvram->adapter_order[i] == 'N') {
6637                                                 ips_shift_controllers(position,
6638                                                                       j);
6639                                                 position++;
6640                                         }
6641                                         break;
6642                                 case IPS_ADTYPE_SERVERAID6I:
6643                                 case IPS_ADTYPE_SERVERAID5I2:
6644                                 case IPS_ADTYPE_SERVERAID5I1:
6645                                 case IPS_ADTYPE_SERVERAID7k:
6646                                         if (nvram->adapter_order[i] == 'S') {
6647                                                 ips_shift_controllers(position,
6648                                                                       j);
6649                                                 position++;
6650                                         }
6651                                         break;
6652                                 case IPS_ADTYPE_SERVERAID:
6653                                 case IPS_ADTYPE_SERVERAID2:
6654                                 case IPS_ADTYPE_NAVAJO:
6655                                 case IPS_ADTYPE_KIOWA:
6656                                 case IPS_ADTYPE_SERVERAID3L:
6657                                 case IPS_ADTYPE_SERVERAID3:
6658                                 case IPS_ADTYPE_SERVERAID4H:
6659                                         if (nvram->adapter_order[i] == 'A') {
6660                                                 ips_shift_controllers(position,
6661                                                                       j);
6662                                                 position++;
6663                                         }
6664                                         break;
6665                                 default:
6666                                         break;
6667                                 }
6668                         }
6669                 }
6670                 /* if adapter_order[0], then ordering is complete */
6671                 return;
6672         }
6673         /* old bios, use older ordering */
6674         tmp = 0;
6675         for (i = position; i < ips_num_controllers; i++) {
6676                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6677                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6678                         ips_shift_controllers(position, i);
6679                         position++;
6680                         tmp = 1;
6681                 }
6682         }
6683         /* if there were no 5I cards, then don't do any extra ordering */
6684         if (!tmp)
6685                 return;
6686         for (i = position; i < ips_num_controllers; i++) {
6687                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6688                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6689                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6690                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6691                         ips_shift_controllers(position, i);
6692                         position++;
6693                 }
6694         }
6695
6696         return;
6697 }
6698
6699 /****************************************************************************/
6700 /*                                                                          */
6701 /* Routine Name: ips_register_scsi                                          */
6702 /*                                                                          */
6703 /* Routine Description:                                                     */
6704 /*   perform any registration and setup with the scsi layer                 */
6705 /****************************************************************************/
6706 static int
6707 ips_register_scsi(int index)
6708 {
6709         struct Scsi_Host *sh;
6710         ips_ha_t *ha, *oldha = ips_ha[index];
6711         sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
6712         if (!sh) {
6713                 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
6714                            "Unable to register controller with SCSI subsystem\n");
6715                 return -1;
6716         }
6717         ha = IPS_HA(sh);
6718         memcpy(ha, oldha, sizeof (ips_ha_t));
6719         free_irq(oldha->pcidev->irq, oldha);
6720         /* Install the interrupt handler with the new ha */
6721         if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
6722                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
6723                            "Unable to install interrupt handler\n");
6724                 goto err_out_sh;
6725         }
6726
6727         kfree(oldha);
6728
6729         /* Store away needed values for later use */
6730         sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
6731         sh->sg_tablesize = sh->hostt->sg_tablesize;
6732         sh->can_queue = sh->hostt->can_queue;
6733         sh->cmd_per_lun = sh->hostt->cmd_per_lun;
6734         sh->use_clustering = sh->hostt->use_clustering;
6735         sh->max_sectors = 128;
6736
6737         sh->max_id = ha->ntargets;
6738         sh->max_lun = ha->nlun;
6739         sh->max_channel = ha->nbus - 1;
6740         sh->can_queue = ha->max_cmds - 1;
6741
6742         if (scsi_add_host(sh, &ha->pcidev->dev))
6743                 goto err_out;
6744
6745         ips_sh[index] = sh;
6746         ips_ha[index] = ha;
6747
6748         scsi_scan_host(sh);
6749
6750         return 0;
6751
6752 err_out:
6753         free_irq(ha->pcidev->irq, ha);
6754 err_out_sh:
6755         scsi_host_put(sh);
6756         return -1;
6757 }
6758
6759 /*---------------------------------------------------------------------------*/
6760 /*   Routine Name: ips_remove_device                                         */
6761 /*                                                                           */
6762 /*   Routine Description:                                                    */
6763 /*     Remove one Adapter ( Hot Plugging )                                   */
6764 /*---------------------------------------------------------------------------*/
6765 static void
6766 ips_remove_device(struct pci_dev *pci_dev)
6767 {
6768         struct Scsi_Host *sh = pci_get_drvdata(pci_dev);
6769
6770         pci_set_drvdata(pci_dev, NULL);
6771
6772         ips_release(sh);
6773
6774         pci_release_regions(pci_dev);
6775         pci_disable_device(pci_dev);
6776 }
6777
6778 /****************************************************************************/
6779 /*                                                                          */
6780 /* Routine Name: ips_module_init                                            */
6781 /*                                                                          */
6782 /* Routine Description:                                                     */
6783 /*   function called on module load                                         */
6784 /****************************************************************************/
6785 static int __init
6786 ips_module_init(void)
6787 {
6788 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
6789         printk(KERN_ERR "ips: This driver has only been tested on the x86/ia64/x86_64 platforms\n");
6790         add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
6791 #endif
6792
6793         if (pci_register_driver(&ips_pci_driver) < 0)
6794                 return -ENODEV;
6795         ips_driver_template.module = THIS_MODULE;
6796         ips_order_controllers();
6797         if (!ips_detect(&ips_driver_template)) {
6798                 pci_unregister_driver(&ips_pci_driver);
6799                 return -ENODEV;
6800         }
6801         register_reboot_notifier(&ips_notifier);
6802         return 0;
6803 }
6804
6805 /****************************************************************************/
6806 /*                                                                          */
6807 /* Routine Name: ips_module_exit                                            */
6808 /*                                                                          */
6809 /* Routine Description:                                                     */
6810 /*   function called on module unload                                       */
6811 /****************************************************************************/
6812 static void __exit
6813 ips_module_exit(void)
6814 {
6815         pci_unregister_driver(&ips_pci_driver);
6816         unregister_reboot_notifier(&ips_notifier);
6817 }
6818
6819 module_init(ips_module_init);
6820 module_exit(ips_module_exit);
6821
6822 /*---------------------------------------------------------------------------*/
6823 /*   Routine Name: ips_insert_device                                         */
6824 /*                                                                           */
6825 /*   Routine Description:                                                    */
6826 /*     Add One Adapter ( Hot Plug )                                          */
6827 /*                                                                           */
6828 /*   Return Value:                                                           */
6829 /*     0 if Successful, else non-zero                                        */
6830 /*---------------------------------------------------------------------------*/
6831 static int
6832 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
6833 {
6834         int index = -1;
6835         int rc;
6836
6837         METHOD_TRACE("ips_insert_device", 1);
6838         rc = pci_enable_device(pci_dev);
6839         if (rc)
6840                 return rc;
6841
6842         rc = pci_request_regions(pci_dev, "ips");
6843         if (rc)
6844                 goto err_out;
6845
6846         rc = ips_init_phase1(pci_dev, &index);
6847         if (rc == SUCCESS)
6848                 rc = ips_init_phase2(index);
6849
6850         if (ips_hotplug)
6851                 if (ips_register_scsi(index)) {
6852                         ips_free(ips_ha[index]);
6853                         rc = -1;
6854                 }
6855
6856         if (rc == SUCCESS)
6857                 ips_num_controllers++;
6858
6859         ips_next_controller = ips_num_controllers;
6860
6861         if (rc < 0) {
6862                 rc = -ENODEV;
6863                 goto err_out_regions;
6864         }
6865
6866         pci_set_drvdata(pci_dev, ips_sh[index]);
6867         return 0;
6868
6869 err_out_regions:
6870         pci_release_regions(pci_dev);
6871 err_out:
6872         pci_disable_device(pci_dev);
6873         return rc;
6874 }
6875
6876 /*---------------------------------------------------------------------------*/
6877 /*   Routine Name: ips_init_phase1                                           */
6878 /*                                                                           */
6879 /*   Routine Description:                                                    */
6880 /*     Adapter Initialization                                                */
6881 /*                                                                           */
6882 /*   Return Value:                                                           */
6883 /*     0 if Successful, else non-zero                                        */
6884 /*---------------------------------------------------------------------------*/
6885 static int
6886 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
6887 {
6888         ips_ha_t *ha;
6889         uint32_t io_addr;
6890         uint32_t mem_addr;
6891         uint32_t io_len;
6892         uint32_t mem_len;
6893         uint8_t bus;
6894         uint8_t func;
6895         int j;
6896         int index;
6897         dma_addr_t dma_address;
6898         char __iomem *ioremap_ptr;
6899         char __iomem *mem_ptr;
6900         uint32_t IsDead;
6901
6902         METHOD_TRACE("ips_init_phase1", 1);
6903         index = IPS_MAX_ADAPTERS;
6904         for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
6905                 if (ips_ha[j] == NULL) {
6906                         index = j;
6907                         break;
6908                 }
6909         }
6910
6911         if (index >= IPS_MAX_ADAPTERS)
6912                 return -1;
6913
6914         /* stuff that we get in dev */
6915         bus = pci_dev->bus->number;
6916         func = pci_dev->devfn;
6917
6918         /* Init MEM/IO addresses to 0 */
6919         mem_addr = 0;
6920         io_addr = 0;
6921         mem_len = 0;
6922         io_len = 0;
6923
6924         for (j = 0; j < 2; j++) {
6925                 if (!pci_resource_start(pci_dev, j))
6926                         break;
6927
6928                 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
6929                         io_addr = pci_resource_start(pci_dev, j);
6930                         io_len = pci_resource_len(pci_dev, j);
6931                 } else {
6932                         mem_addr = pci_resource_start(pci_dev, j);
6933                         mem_len = pci_resource_len(pci_dev, j);
6934                 }
6935         }
6936
6937         /* setup memory mapped area (if applicable) */
6938         if (mem_addr) {
6939                 uint32_t base;
6940                 uint32_t offs;
6941
6942                 base = mem_addr & PAGE_MASK;
6943                 offs = mem_addr - base;
6944                 ioremap_ptr = ioremap(base, PAGE_SIZE);
6945                 if (!ioremap_ptr)
6946                         return -1;
6947                 mem_ptr = ioremap_ptr + offs;
6948         } else {
6949                 ioremap_ptr = NULL;
6950                 mem_ptr = NULL;
6951         }
6952
6953         /* found a controller */
6954         ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL);
6955         if (ha == NULL) {
6956                 IPS_PRINTK(KERN_WARNING, pci_dev,
6957                            "Unable to allocate temporary ha struct\n");
6958                 return -1;
6959         }
6960
6961         ips_sh[index] = NULL;
6962         ips_ha[index] = ha;
6963         ha->active = 1;
6964
6965         /* Store info in HA structure */
6966         ha->io_addr = io_addr;
6967         ha->io_len = io_len;
6968         ha->mem_addr = mem_addr;
6969         ha->mem_len = mem_len;
6970         ha->mem_ptr = mem_ptr;
6971         ha->ioremap_ptr = ioremap_ptr;
6972         ha->host_num = (uint32_t) index;
6973         ha->slot_num = PCI_SLOT(pci_dev->devfn);
6974         ha->pcidev = pci_dev;
6975
6976         /*
6977          * Set the pci_dev's dma_mask.  Not all adapters support 64bit
6978          * addressing so don't enable it if the adapter can't support
6979          * it!  Also, don't use 64bit addressing if dma addresses
6980          * are guaranteed to be < 4G.
6981          */
6982         if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
6983             !pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(64))) {
6984                 (ha)->flags |= IPS_HA_ENH_SG;
6985         } else {
6986                 if (pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(32)) != 0) {
6987                         printk(KERN_WARNING "Unable to set DMA Mask\n");
6988                         return ips_abort_init(ha, index);
6989                 }
6990         }
6991         if(ips_cd_boot && !ips_FlashData){
6992                 ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
6993                                                      &ips_flashbusaddr);
6994         }
6995
6996         ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
6997                                        &ha->enq_busaddr);
6998         if (!ha->enq) {
6999                 IPS_PRINTK(KERN_WARNING, pci_dev,
7000                            "Unable to allocate host inquiry structure\n");
7001                 return ips_abort_init(ha, index);
7002         }
7003
7004         ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7005                                          sizeof (IPS_IO_CMD), &dma_address);
7006         if (!ha->adapt) {
7007                 IPS_PRINTK(KERN_WARNING, pci_dev,
7008                            "Unable to allocate host adapt & dummy structures\n");
7009                 return ips_abort_init(ha, index);
7010         }
7011         ha->adapt->hw_status_start = dma_address;
7012         ha->dummy = (void *) (ha->adapt + 1);
7013
7014
7015
7016         ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7017         if (!ha->logical_drive_info) {
7018                 IPS_PRINTK(KERN_WARNING, pci_dev,
7019                            "Unable to allocate logical drive info structure\n");
7020                 return ips_abort_init(ha, index);
7021         }
7022         ha->logical_drive_info_dma_addr = dma_address;
7023
7024
7025         ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7026
7027         if (!ha->conf) {
7028                 IPS_PRINTK(KERN_WARNING, pci_dev,
7029                            "Unable to allocate host conf structure\n");
7030                 return ips_abort_init(ha, index);
7031         }
7032
7033         ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7034
7035         if (!ha->nvram) {
7036                 IPS_PRINTK(KERN_WARNING, pci_dev,
7037                            "Unable to allocate host NVRAM structure\n");
7038                 return ips_abort_init(ha, index);
7039         }
7040
7041         ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7042
7043         if (!ha->subsys) {
7044                 IPS_PRINTK(KERN_WARNING, pci_dev,
7045                            "Unable to allocate host subsystem structure\n");
7046                 return ips_abort_init(ha, index);
7047         }
7048
7049         /* the ioctl buffer is now used during adapter initialization, so its
7050          * successful allocation is now required */
7051         if (ips_ioctlsize < PAGE_SIZE)
7052                 ips_ioctlsize = PAGE_SIZE;
7053
7054         ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7055                                               &ha->ioctl_busaddr);
7056         ha->ioctl_len = ips_ioctlsize;
7057         if (!ha->ioctl_data) {
7058                 IPS_PRINTK(KERN_WARNING, pci_dev,
7059                            "Unable to allocate IOCTL data\n");
7060                 return ips_abort_init(ha, index);
7061         }
7062
7063         /*
7064          * Setup Functions
7065          */
7066         ips_setup_funclist(ha);
7067
7068         if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7069                 /* If Morpheus appears dead, reset it */
7070                 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7071                 if (IsDead == 0xDEADBEEF) {
7072                         ips_reset_morpheus(ha);
7073                 }
7074         }
7075
7076         /*
7077          * Initialize the card if it isn't already
7078          */
7079
7080         if (!(*ha->func.isinit) (ha)) {
7081                 if (!(*ha->func.init) (ha)) {
7082                         /*
7083                          * Initialization failed
7084                          */
7085                         IPS_PRINTK(KERN_WARNING, pci_dev,
7086                                    "Unable to initialize controller\n");
7087                         return ips_abort_init(ha, index);
7088                 }
7089         }
7090
7091         *indexPtr = index;
7092         return SUCCESS;
7093 }
7094
7095 /*---------------------------------------------------------------------------*/
7096 /*   Routine Name: ips_init_phase2                                           */
7097 /*                                                                           */
7098 /*   Routine Description:                                                    */
7099 /*     Adapter Initialization Phase 2                                        */
7100 /*                                                                           */
7101 /*   Return Value:                                                           */
7102 /*     0 if Successful, else non-zero                                        */
7103 /*---------------------------------------------------------------------------*/
7104 static int
7105 ips_init_phase2(int index)
7106 {
7107         ips_ha_t *ha;
7108
7109         ha = ips_ha[index];
7110
7111         METHOD_TRACE("ips_init_phase2", 1);
7112         if (!ha->active) {
7113                 ips_ha[index] = NULL;
7114                 return -1;
7115         }
7116
7117         /* Install the interrupt handler */
7118         if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
7119                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7120                            "Unable to install interrupt handler\n");
7121                 return ips_abort_init(ha, index);
7122         }
7123
7124         /*
7125          * Allocate a temporary SCB for initialization
7126          */
7127         ha->max_cmds = 1;
7128         if (!ips_allocatescbs(ha)) {
7129                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7130                            "Unable to allocate a CCB\n");
7131                 free_irq(ha->pcidev->irq, ha);
7132                 return ips_abort_init(ha, index);
7133         }
7134
7135         if (!ips_hainit(ha)) {
7136                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7137                            "Unable to initialize controller\n");
7138                 free_irq(ha->pcidev->irq, ha);
7139                 return ips_abort_init(ha, index);
7140         }
7141         /* Free the temporary SCB */
7142         ips_deallocatescbs(ha, 1);
7143
7144         /* allocate CCBs */
7145         if (!ips_allocatescbs(ha)) {
7146                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7147                            "Unable to allocate CCBs\n");
7148                 free_irq(ha->pcidev->irq, ha);
7149                 return ips_abort_init(ha, index);
7150         }
7151
7152         return SUCCESS;
7153 }
7154
7155 MODULE_LICENSE("GPL");
7156 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7157 MODULE_VERSION(IPS_VER_STRING);
7158
7159
7160 /*
7161  * Overrides for Emacs so that we almost follow Linus's tabbing style.
7162  * Emacs will notice this stuff at the end of the file and automatically
7163  * adjust the settings for this buffer only.  This must remain at the end
7164  * of the file.
7165  * ---------------------------------------------------------------------------
7166  * Local variables:
7167  * c-indent-level: 2
7168  * c-brace-imaginary-offset: 0
7169  * c-brace-offset: -2
7170  * c-argdecl-indent: 2
7171  * c-label-offset: -2
7172  * c-continued-statement-offset: 2
7173  * c-continued-brace-offset: 0
7174  * indent-tabs-mode: nil
7175  * tab-width: 8
7176  * End:
7177  */