1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2015 Linaro Ltd.
4 * Copyright (c) 2015 Hisilicon Limited.
10 #include <linux/acpi.h>
11 #include <linux/blk-mq.h>
12 #include <linux/blk-mq-pci.h>
13 #include <linux/clk.h>
14 #include <linux/debugfs.h>
15 #include <linux/dmapool.h>
16 #include <linux/iopoll.h>
17 #include <linux/irq.h>
18 #include <linux/lcm.h>
19 #include <linux/libata.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/module.h>
22 #include <linux/of_address.h>
23 #include <linux/pci.h>
24 #include <linux/platform_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/property.h>
27 #include <linux/regmap.h>
28 #include <linux/timer.h>
29 #include <scsi/sas_ata.h>
30 #include <scsi/libsas.h>
32 #define HISI_SAS_MAX_PHYS 9
33 #define HISI_SAS_MAX_QUEUES 32
34 #define HISI_SAS_QUEUE_SLOTS 4096
35 #define HISI_SAS_MAX_ITCT_ENTRIES 1024
36 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
37 #define HISI_SAS_RESETTING_BIT 0
38 #define HISI_SAS_REJECT_CMD_BIT 1
39 #define HISI_SAS_PM_BIT 2
40 #define HISI_SAS_HW_FAULT_BIT 3
41 #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS)
42 #define HISI_SAS_RESERVED_IPTT 96
43 #define HISI_SAS_UNRESERVED_IPTT \
44 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT)
46 #define HISI_SAS_IOST_ITCT_CACHE_NUM 64
47 #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10
48 #define HISI_SAS_FIFO_DATA_DW_SIZE 32
50 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
51 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
53 #define hisi_sas_status_buf_addr(buf) \
54 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
55 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf)
56 #define hisi_sas_status_buf_addr_dma(slot) \
57 hisi_sas_status_buf_addr((slot)->buf_dma)
59 #define hisi_sas_cmd_hdr_addr(buf) \
60 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header))
61 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf)
62 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma)
64 #define hisi_sas_sge_addr(buf) \
65 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page))
66 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf)
67 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma)
69 #define hisi_sas_sge_dif_addr(buf) \
70 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page))
71 #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf)
72 #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma)
74 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
75 #define HISI_SAS_MAX_SMP_RESP_SZ 1028
76 #define HISI_SAS_MAX_STP_RESP_SZ 28
78 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
79 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2
80 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4
81 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
82 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
84 #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \
85 SHOST_DIF_TYPE2_PROTECTION | \
86 SHOST_DIF_TYPE3_PROTECTION)
88 #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \
89 SHOST_DIX_TYPE2_PROTECTION | \
90 SHOST_DIX_TYPE3_PROTECTION)
92 #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK)
94 #define HISI_SAS_WAIT_PHYUP_TIMEOUT (30 * HZ)
95 #define HISI_SAS_CLEAR_ITCT_TIMEOUT (20 * HZ)
100 PORT_TYPE_SAS = (1U << 1),
101 PORT_TYPE_SATA = (1U << 0),
107 HISI_SAS_DEV_NCQ_ERR,
111 HISI_SAS_INT_ABT_CMD = 0,
112 HISI_SAS_INT_ABT_DEV = 1,
115 enum hisi_sas_dev_type {
116 HISI_SAS_DEV_TYPE_STP = 0,
117 HISI_SAS_DEV_TYPE_SSP,
118 HISI_SAS_DEV_TYPE_SATA,
121 struct hisi_sas_hw_error {
127 const struct hisi_sas_hw_error *sub;
130 struct hisi_sas_rst {
131 struct hisi_hba *hisi_hba;
132 struct completion *completion;
133 struct work_struct work;
137 #define HISI_SAS_RST_WORK_INIT(r, c) \
138 { .hisi_hba = hisi_hba, \
140 .work = __WORK_INITIALIZER(r.work, \
141 hisi_sas_sync_rst_work_handler), \
145 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
146 DECLARE_COMPLETION_ONSTACK(c); \
147 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)
149 enum hisi_sas_bit_err_type {
150 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
151 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
154 enum hisi_sas_phy_event {
155 HISI_PHYE_PHY_UP = 0U,
156 HISI_PHYE_LINK_RESET,
161 struct hisi_sas_debugfs_fifo {
168 u32 rd_data[HISI_SAS_FIFO_DATA_DW_SIZE];
171 struct hisi_sas_phy {
172 struct work_struct works[HISI_PHYES_NUM];
173 struct hisi_hba *hisi_hba;
174 struct hisi_sas_port *port;
175 struct asd_sas_phy sas_phy;
176 struct sas_identify identify;
177 struct completion *reset_completion;
178 struct timer_list timer;
180 u64 port_id; /* from hw */
187 u32 code_violation_err_count;
188 enum sas_linkrate minimum_linkrate;
189 enum sas_linkrate maximum_linkrate;
195 struct hisi_sas_debugfs_fifo fifo;
198 struct hisi_sas_port {
199 struct asd_sas_port sas_port;
205 struct hisi_hba *hisi_hba;
206 const struct cpumask *irq_mask;
210 spinlock_t poll_lock;
214 struct hisi_hba *hisi_hba;
215 struct list_head list;
221 struct hisi_sas_device {
222 struct hisi_hba *hisi_hba;
223 struct domain_device *sas_device;
224 struct completion *completion;
225 struct hisi_sas_dq *dq;
226 struct list_head list;
227 enum sas_device_type dev_type;
228 enum dev_status dev_status;
231 spinlock_t lock; /* For protecting slots */
234 struct hisi_sas_slot {
235 struct list_head entry;
236 struct list_head delivery;
237 struct sas_task *task;
238 struct hisi_sas_port *port;
242 int dlvry_queue_slot;
244 int cmplt_queue_slot;
249 dma_addr_t cmd_hdr_dma;
250 struct timer_list internal_abort_timer;
252 struct sas_tmf_task *tmf;
253 /* Do not reorder/change members after here */
259 struct hisi_sas_iost_itct_cache {
260 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ];
263 enum hisi_sas_debugfs_reg_array_member {
270 enum hisi_sas_debugfs_cache_type {
275 enum hisi_sas_debugfs_bist_ffe_cfg {
287 enum hisi_sas_debugfs_bist_fixed_code {
294 HISI_SAS_BIST_CODE_MODE_PRBS7,
295 HISI_SAS_BIST_CODE_MODE_PRBS23,
296 HISI_SAS_BIST_CODE_MODE_PRBS31,
297 HISI_SAS_BIST_CODE_MODE_JTPAT,
298 HISI_SAS_BIST_CODE_MODE_CJTPAT,
299 HISI_SAS_BIST_CODE_MODE_SCRAMBED_0,
300 HISI_SAS_BIST_CODE_MODE_TRAIN,
301 HISI_SAS_BIST_CODE_MODE_TRAIN_DONE,
302 HISI_SAS_BIST_CODE_MODE_HFTP,
303 HISI_SAS_BIST_CODE_MODE_MFTP,
304 HISI_SAS_BIST_CODE_MODE_LFTP,
305 HISI_SAS_BIST_CODE_MODE_FIXED_DATA,
309 int (*hw_init)(struct hisi_hba *hisi_hba);
310 int (*interrupt_preinit)(struct hisi_hba *hisi_hba);
311 void (*setup_itct)(struct hisi_hba *hisi_hba,
312 struct hisi_sas_device *device);
313 int (*slot_index_alloc)(struct hisi_hba *hisi_hba,
314 struct domain_device *device);
315 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
316 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no);
317 void (*start_delivery)(struct hisi_sas_dq *dq);
318 void (*prep_ssp)(struct hisi_hba *hisi_hba,
319 struct hisi_sas_slot *slot);
320 void (*prep_smp)(struct hisi_hba *hisi_hba,
321 struct hisi_sas_slot *slot);
322 void (*prep_stp)(struct hisi_hba *hisi_hba,
323 struct hisi_sas_slot *slot);
324 void (*prep_abort)(struct hisi_hba *hisi_hba,
325 struct hisi_sas_slot *slot);
326 void (*phys_init)(struct hisi_hba *hisi_hba);
327 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
328 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
329 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
330 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
331 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
332 struct sas_phy_linkrates *linkrates);
333 enum sas_linkrate (*phy_get_max_linkrate)(void);
334 int (*clear_itct)(struct hisi_hba *hisi_hba,
335 struct hisi_sas_device *dev);
336 void (*free_device)(struct hisi_sas_device *sas_dev);
337 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
338 void (*dereg_device)(struct hisi_hba *hisi_hba,
339 struct domain_device *device);
340 int (*soft_reset)(struct hisi_hba *hisi_hba);
341 u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
342 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
343 u8 reg_index, u8 reg_count, u8 *write_data);
344 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba,
345 int delay_ms, int timeout_ms);
346 int (*debugfs_snapshot_regs)(struct hisi_hba *hisi_hba);
347 int complete_hdr_size;
348 const struct scsi_host_template *sht;
351 #define HISI_SAS_MAX_DEBUGFS_DUMP (50)
353 struct hisi_sas_debugfs_cq {
354 struct hisi_sas_cq *cq;
358 struct hisi_sas_debugfs_dq {
359 struct hisi_sas_dq *dq;
360 struct hisi_sas_cmd_hdr *hdr;
363 struct hisi_sas_debugfs_regs {
364 struct hisi_hba *hisi_hba;
368 struct hisi_sas_debugfs_port {
369 struct hisi_sas_phy *phy;
373 struct hisi_sas_debugfs_iost {
374 struct hisi_sas_iost *iost;
377 struct hisi_sas_debugfs_itct {
378 struct hisi_sas_itct *itct;
381 struct hisi_sas_debugfs_iost_cache {
382 struct hisi_sas_iost_itct_cache *cache;
385 struct hisi_sas_debugfs_itct_cache {
386 struct hisi_sas_iost_itct_cache *cache;
390 /* This must be the first element, used by SHOST_TO_SAS_HA */
391 struct sas_ha_struct *p;
393 struct platform_device *platform_dev;
394 struct pci_dev *pci_dev;
400 void __iomem *sgpio_regs;
403 u32 ctrl_reset_sts_reg;
404 u32 ctrl_clock_ena_reg;
405 u32 refclk_frequency_mhz;
406 u8 sas_addr[SAS_ADDR_SIZE];
408 int *irq_map; /* v2 hw */
412 struct semaphore sem;
414 struct timer_list timer;
415 struct workqueue_struct *wq;
417 int slot_index_count;
420 unsigned long *slot_index_tags;
421 unsigned long reject_stp_links_msk;
424 struct sas_ha_struct sha;
425 struct Scsi_Host *shost;
427 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
428 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
429 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
430 struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
434 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
435 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
436 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
437 void *complete_hdr[HISI_SAS_MAX_QUEUES];
438 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
439 struct hisi_sas_initial_fis *initial_fis;
440 dma_addr_t initial_fis_dma;
441 struct hisi_sas_itct *itct;
443 struct hisi_sas_iost *iost;
445 struct hisi_sas_breakpoint *breakpoint;
446 dma_addr_t breakpoint_dma;
447 struct hisi_sas_breakpoint *sata_breakpoint;
448 dma_addr_t sata_breakpoint_dma;
449 struct hisi_sas_slot *slot_info;
451 const struct hisi_sas_hw *hw; /* Low level hw interface */
452 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
453 struct work_struct rst_work;
455 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */
456 u32 intr_coal_count; /* Interrupt count to coalesce */
461 enum sas_linkrate debugfs_bist_linkrate;
462 int debugfs_bist_code_mode;
463 int debugfs_bist_phy_no;
464 int debugfs_bist_mode;
465 u32 debugfs_bist_cnt;
466 int debugfs_bist_enable;
467 u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX];
468 u32 debugfs_bist_fixed_code[FIXED_CODE_MAX];
470 /* debugfs memories */
471 /* Put Global AXI and RAS Register into register array */
472 struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM];
473 struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS];
474 struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES];
475 struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES];
476 struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP];
477 struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP];
478 struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP];
479 struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP];
481 u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP];
482 int debugfs_dump_index;
483 struct dentry *debugfs_dir;
484 struct dentry *debugfs_dump_dentry;
485 struct dentry *debugfs_bist_dentry;
486 struct dentry *debugfs_fifo_dentry;
491 /* Generic HW DMA host memory structures */
492 /* Delivery queue header */
493 struct hisi_sas_cmd_hdr {
504 __le32 transfer_tags;
507 __le32 data_transfer_len;
510 __le32 first_burst_num;
519 __le64 cmd_table_addr;
522 __le64 sts_buffer_addr;
525 __le64 prd_table_addr;
528 __le64 dif_prd_table_addr;
531 struct hisi_sas_itct {
539 struct hisi_sas_iost {
546 struct hisi_sas_err_record {
550 struct hisi_sas_initial_fis {
551 struct hisi_sas_err_record err_record;
552 struct dev_to_host_fis fis;
556 struct hisi_sas_breakpoint {
560 struct hisi_sas_sata_breakpoint {
561 struct hisi_sas_breakpoint tag[32];
564 struct hisi_sas_sge {
572 struct hisi_sas_command_table_smp {
576 struct hisi_sas_command_table_stp {
577 struct host_to_dev_fis command_fis;
579 u8 atapi_cdb[ATAPI_CDB_LEN];
582 #define HISI_SAS_SGE_PAGE_CNT (124)
583 struct hisi_sas_sge_page {
584 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
587 #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT
588 struct hisi_sas_sge_dif_page {
589 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT];
592 struct hisi_sas_command_table_ssp {
593 struct ssp_frame_hdr hdr;
596 struct ssp_command_iu task;
599 struct ssp_tmf_iu ssp_task;
600 struct xfer_rdy_iu xfer_rdy;
601 struct ssp_response_iu ssp_res;
605 union hisi_sas_command_table {
606 struct hisi_sas_command_table_ssp ssp;
607 struct hisi_sas_command_table_smp smp;
608 struct hisi_sas_command_table_stp stp;
611 struct hisi_sas_status_buffer {
612 struct hisi_sas_err_record err;
616 struct hisi_sas_slot_buf_table {
617 struct hisi_sas_status_buffer status_buffer;
618 union hisi_sas_command_table command_header;
619 struct hisi_sas_sge_page sge_page;
622 struct hisi_sas_slot_dif_buf_table {
623 struct hisi_sas_slot_buf_table slot_buf;
624 struct hisi_sas_sge_dif_page sge_dif_page;
627 extern struct scsi_transport_template *hisi_sas_stt;
629 extern bool hisi_sas_debugfs_enable;
630 extern u32 hisi_sas_debugfs_dump_count;
631 extern struct dentry *hisi_sas_debugfs_dir;
633 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
634 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba);
635 extern void hisi_sas_free(struct hisi_hba *hisi_hba);
636 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
638 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
639 extern void hisi_sas_sata_done(struct sas_task *task,
640 struct hisi_sas_slot *slot);
641 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
642 extern int hisi_sas_probe(struct platform_device *pdev,
643 const struct hisi_sas_hw *ops);
644 extern void hisi_sas_remove(struct platform_device *pdev);
646 extern int hisi_sas_slave_configure(struct scsi_device *sdev);
647 extern int hisi_sas_slave_alloc(struct scsi_device *sdev);
648 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time);
649 extern void hisi_sas_scan_start(struct Scsi_Host *shost);
650 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type);
651 extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no,
653 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
655 extern void hisi_sas_phy_bcast(struct hisi_sas_phy *phy);
656 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
657 struct sas_task *task,
658 struct hisi_sas_slot *slot,
660 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
661 extern void hisi_sas_rst_work_handler(struct work_struct *work);
662 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
663 extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no);
664 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
665 enum hisi_sas_phy_event event);
666 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
667 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max);
668 extern void hisi_sas_sync_cqs(struct hisi_hba *hisi_hba);
669 extern void hisi_sas_sync_poll_cqs(struct hisi_hba *hisi_hba);
670 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba);
671 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba);