2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
15 #include <linux/acpi.h>
16 #include <linux/clk.h>
17 #include <linux/dmapool.h>
18 #include <linux/iopoll.h>
19 #include <linux/mfd/syscon.h>
20 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/pci.h>
23 #include <linux/platform_device.h>
24 #include <linux/property.h>
25 #include <linux/regmap.h>
26 #include <scsi/sas_ata.h>
27 #include <scsi/libsas.h>
29 #define HISI_SAS_MAX_PHYS 9
30 #define HISI_SAS_MAX_QUEUES 32
31 #define HISI_SAS_QUEUE_SLOTS 512
32 #define HISI_SAS_MAX_ITCT_ENTRIES 2048
33 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
34 #define HISI_SAS_RESET_BIT 0
35 #define HISI_SAS_REJECT_CMD_BIT 1
37 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
38 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
40 #define hisi_sas_status_buf_addr(buf) \
41 (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
42 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
43 #define hisi_sas_status_buf_addr_dma(slot) \
44 hisi_sas_status_buf_addr(slot->buf_dma)
46 #define hisi_sas_cmd_hdr_addr(buf) \
47 (buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
48 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
49 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
51 #define hisi_sas_sge_addr(buf) \
52 (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
53 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
54 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
56 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
57 #define HISI_SAS_MAX_SMP_RESP_SZ 1028
58 #define HISI_SAS_MAX_STP_RESP_SZ 28
60 #define DEV_IS_EXPANDER(type) \
61 ((type == SAS_EDGE_EXPANDER_DEVICE) || \
62 (type == SAS_FANOUT_EXPANDER_DEVICE))
64 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
65 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2
66 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4
67 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
68 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
73 PORT_TYPE_SAS = (1U << 1),
74 PORT_TYPE_SATA = (1U << 0),
83 HISI_SAS_INT_ABT_CMD = 0,
84 HISI_SAS_INT_ABT_DEV = 1,
87 enum hisi_sas_dev_type {
88 HISI_SAS_DEV_TYPE_STP = 0,
89 HISI_SAS_DEV_TYPE_SSP,
90 HISI_SAS_DEV_TYPE_SATA,
93 struct hisi_sas_hw_error {
101 struct hisi_sas_phy {
102 struct hisi_hba *hisi_hba;
103 struct hisi_sas_port *port;
104 struct asd_sas_phy sas_phy;
105 struct sas_identify identify;
106 struct timer_list timer;
107 struct work_struct phyup_ws;
108 u64 port_id; /* from hw */
115 enum sas_linkrate minimum_linkrate;
116 enum sas_linkrate maximum_linkrate;
119 struct hisi_sas_port {
120 struct asd_sas_port sas_port;
126 struct hisi_hba *hisi_hba;
127 struct tasklet_struct tasklet;
133 struct hisi_hba *hisi_hba;
134 struct hisi_sas_slot *slot_prep;
140 struct hisi_sas_device {
141 struct hisi_hba *hisi_hba;
142 struct domain_device *sas_device;
143 struct completion *completion;
144 struct hisi_sas_dq *dq;
145 struct list_head list;
147 atomic64_t running_req;
148 enum sas_device_type dev_type;
154 struct hisi_sas_slot {
155 struct list_head entry;
156 struct sas_task *task;
157 struct hisi_sas_port *port;
160 int dlvry_queue_slot;
162 int cmplt_queue_slot;
168 dma_addr_t cmd_hdr_dma;
169 struct work_struct abort_slot;
170 struct timer_list internal_abort_timer;
173 struct hisi_sas_tmf_task {
175 u16 tag_of_task_to_be_managed;
179 int (*hw_init)(struct hisi_hba *hisi_hba);
180 void (*setup_itct)(struct hisi_hba *hisi_hba,
181 struct hisi_sas_device *device);
182 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
183 struct domain_device *device);
184 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
185 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
186 int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
187 void (*start_delivery)(struct hisi_sas_dq *dq);
188 int (*prep_ssp)(struct hisi_hba *hisi_hba,
189 struct hisi_sas_slot *slot, int is_tmf,
190 struct hisi_sas_tmf_task *tmf);
191 int (*prep_smp)(struct hisi_hba *hisi_hba,
192 struct hisi_sas_slot *slot);
193 int (*prep_stp)(struct hisi_hba *hisi_hba,
194 struct hisi_sas_slot *slot);
195 int (*prep_abort)(struct hisi_hba *hisi_hba,
196 struct hisi_sas_slot *slot,
197 int device_id, int abort_flag, int tag_to_abort);
198 int (*slot_complete)(struct hisi_hba *hisi_hba,
199 struct hisi_sas_slot *slot);
200 void (*phys_init)(struct hisi_hba *hisi_hba);
201 void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
202 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
203 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
204 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
205 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
206 struct sas_phy_linkrates *linkrates);
207 enum sas_linkrate (*phy_get_max_linkrate)(void);
208 void (*free_device)(struct hisi_hba *hisi_hba,
209 struct hisi_sas_device *dev);
210 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
211 void (*dereg_device)(struct hisi_hba *hisi_hba,
212 struct domain_device *device);
213 int (*soft_reset)(struct hisi_hba *hisi_hba);
214 u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
215 int max_command_entries;
216 int complete_hdr_size;
220 /* This must be the first element, used by SHOST_TO_SAS_HA */
221 struct sas_ha_struct *p;
223 struct platform_device *platform_dev;
224 struct pci_dev *pci_dev;
230 u32 ctrl_reset_sts_reg;
231 u32 ctrl_clock_ena_reg;
232 u32 refclk_frequency_mhz;
233 u8 sas_addr[SAS_ADDR_SIZE];
238 struct timer_list timer;
239 struct workqueue_struct *wq;
241 int slot_index_count;
242 unsigned long *slot_index_tags;
243 unsigned long reject_stp_links_msk;
246 struct sas_ha_struct sha;
247 struct Scsi_Host *shost;
249 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
250 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
251 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
252 struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
256 struct dma_pool *buffer_pool;
257 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
258 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
259 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
260 void *complete_hdr[HISI_SAS_MAX_QUEUES];
261 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
262 struct hisi_sas_initial_fis *initial_fis;
263 dma_addr_t initial_fis_dma;
264 struct hisi_sas_itct *itct;
266 struct hisi_sas_iost *iost;
268 struct hisi_sas_breakpoint *breakpoint;
269 dma_addr_t breakpoint_dma;
270 struct hisi_sas_breakpoint *sata_breakpoint;
271 dma_addr_t sata_breakpoint_dma;
272 struct hisi_sas_slot *slot_info;
274 const struct hisi_sas_hw *hw; /* Low level hw interface */
275 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
276 struct work_struct rst_work;
279 /* Generic HW DMA host memory structures */
280 /* Delivery queue header */
281 struct hisi_sas_cmd_hdr {
292 __le32 transfer_tags;
295 __le32 data_transfer_len;
298 __le32 first_burst_num;
307 __le64 cmd_table_addr;
310 __le64 sts_buffer_addr;
313 __le64 prd_table_addr;
316 __le64 dif_prd_table_addr;
319 struct hisi_sas_itct {
327 struct hisi_sas_iost {
334 struct hisi_sas_err_record {
338 struct hisi_sas_initial_fis {
339 struct hisi_sas_err_record err_record;
340 struct dev_to_host_fis fis;
344 struct hisi_sas_breakpoint {
345 u8 data[128]; /*io128 byte*/
348 struct hisi_sas_sge {
356 struct hisi_sas_command_table_smp {
360 struct hisi_sas_command_table_stp {
361 struct host_to_dev_fis command_fis;
363 u8 atapi_cdb[ATAPI_CDB_LEN];
366 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
367 struct hisi_sas_sge_page {
368 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
371 struct hisi_sas_command_table_ssp {
372 struct ssp_frame_hdr hdr;
375 struct ssp_command_iu task;
378 struct ssp_tmf_iu ssp_task;
379 struct xfer_rdy_iu xfer_rdy;
380 struct ssp_response_iu ssp_res;
384 union hisi_sas_command_table {
385 struct hisi_sas_command_table_ssp ssp;
386 struct hisi_sas_command_table_smp smp;
387 struct hisi_sas_command_table_stp stp;
390 struct hisi_sas_status_buffer {
391 struct hisi_sas_err_record err;
395 struct hisi_sas_slot_buf_table {
396 struct hisi_sas_status_buffer status_buffer;
397 union hisi_sas_command_table command_header;
398 struct hisi_sas_sge_page sge_page;
401 extern struct scsi_transport_template *hisi_sas_stt;
402 extern struct scsi_host_template *hisi_sas_sht;
404 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
405 extern void hisi_sas_init_add(struct hisi_hba *hisi_hba);
406 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
407 extern void hisi_sas_free(struct hisi_hba *hisi_hba);
408 extern u8 hisi_sas_get_ata_protocol(u8 cmd, int direction);
409 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
410 extern void hisi_sas_sata_done(struct sas_task *task,
411 struct hisi_sas_slot *slot);
412 extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
413 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
414 extern int hisi_sas_probe(struct platform_device *pdev,
415 const struct hisi_sas_hw *ops);
416 extern int hisi_sas_remove(struct platform_device *pdev);
418 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
419 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
420 struct sas_task *task,
421 struct hisi_sas_slot *slot);
422 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);