drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.6.x supported                                         *
  31  *                                                                      *
  32  ************************************************************************/
  33
  34 /* All GDT Disk Array Controllers are fully supported by this driver.
  35  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
  36  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
  37  * list of all controller types.
  38  *
  39  * If you have one or more GDT3000/3020 EISA controllers with
  40  * controller BIOS disabled, you have to set the IRQ values with the
  41  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
  42  * the IRQ values for the EISA controllers.
  43  *
  44  * After the optional list of IRQ values, other possible
  45  * command line options are:
  46  * disable:Y                    disable driver
  47  * disable:N                    enable driver
  48  * reserve_mode:0               reserve no drives for the raw service
  49  * reserve_mode:1               reserve all not init., removable drives
  50  * reserve_mode:2               reserve all not init. drives
  51  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
  52  *                              h- controller no., b- channel no.,
  53  *                              t- target ID, l- LUN
  54  * reverse_scan:Y               reverse scan order for PCI controllers
  55  * reverse_scan:N               scan PCI controllers like BIOS
  56  * max_ids:x                    x - target ID count per channel (1..MAXID)
  57  * rescan:Y                     rescan all channels/IDs
  58  * rescan:N                     use all devices found until now
  59  * hdr_channel:x                x - number of virtual bus for host drives
  60  * shared_access:Y              disable driver reserve/release protocol to
  61  *                              access a shared resource from several nodes,
  62  *                              appropriate controller firmware required
  63  * shared_access:N              enable driver reserve/release protocol
  64  * probe_eisa_isa:Y             scan for EISA/ISA controllers
  65  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
  66  * force_dma32:Y                use only 32 bit DMA mode
  67  * force_dma32:N                use 64 bit DMA mode, if supported
  68  *
  69  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
  70  *                          max_ids:127,rescan:N,hdr_channel:0,
  71  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
  72  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
  73  *
  74  * When loading the gdth driver as a module, the same options are available.
  75  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
  76  * options changes slightly. You must replace all ',' between options
  77  * with ' ' and all ':' with '=' and you must use
  78  * '1' in place of 'Y' and '0' in place of 'N'.
  79  *
  80  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
  81  *           max_ids=127 rescan=0 hdr_channel=0 shared_access=0
  82  *           probe_eisa_isa=0 force_dma32=0"
  83  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
  84  */
  85
  86 /* The meaning of the Scsi_Pointer members in this driver is as follows:
  87  * ptr:                     Chaining
  88  * this_residual:           unused
  89  * buffer:                  unused
  90  * dma_handle:              unused
  91  * buffers_residual:        unused
  92  * Status:                  unused
  93  * Message:                 unused
  94  * have_data_in:            unused
  95  * sent_command:            unused
  96  * phase:                   unused
  97  */
  98
  99
 100 /* interrupt coalescing */
 101 /* #define INT_COAL */
 102
 103 /* statistics */
 104 #define GDTH_STATISTICS
 105
 106 #include <linux/module.h>
 107
 108 #include <linux/version.h>
 109 #include <linux/kernel.h>
 110 #include <linux/types.h>
 111 #include <linux/pci.h>
 112 #include <linux/string.h>
 113 #include <linux/ctype.h>
 114 #include <linux/ioport.h>
 115 #include <linux/delay.h>
 116 #include <linux/interrupt.h>
 117 #include <linux/in.h>
 118 #include <linux/proc_fs.h>
 119 #include <linux/time.h>
 120 #include <linux/timer.h>
 121 #include <linux/dma-mapping.h>
 122 #include <linux/list.h>
 123 #include <linux/mutex.h>
 124 #include <linux/slab.h>
 125
 126 #ifdef GDTH_RTC
 127 #include <linux/mc146818rtc.h>
 128 #endif
 129 #include <linux/reboot.h>
 130
 131 #include <asm/dma.h>
 132 #include <asm/io.h>
 133 #include <linux/uaccess.h>
 134 #include <linux/spinlock.h>
 135 #include <linux/blkdev.h>
 136 #include <linux/scatterlist.h>
 137
 138 #include "scsi.h"
 139 #include <scsi/scsi_host.h>
 140 #include "gdth.h"
 141
 142 static DEFINE_MUTEX(gdth_mutex);
 143 static void gdth_delay(int milliseconds);
 144 static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs);
 145 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 146 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
 147                                     int gdth_from_wait, int* pIndex);
 148 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
 149                                                                struct scsi_cmnd *scp);
 150 static int gdth_async_event(gdth_ha_str *ha);
 151 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 152
 153 static void gdth_putq(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 priority);
 154 static void gdth_next(gdth_ha_str *ha);
 155 static int gdth_fill_raw_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 b);
 156 static int gdth_special_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp);
 157 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
 158                                       u16 idx, gdth_evt_data *evt);
 159 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 160 static void gdth_readapp_event(gdth_ha_str *ha, u8 application,
 161                                gdth_evt_str *estr);
 162 static void gdth_clear_events(void);
 163
 164 static void gdth_copy_internal_data(gdth_ha_str *ha, struct scsi_cmnd *scp,
 165                                     char *buffer, u16 count);
 166 static int gdth_internal_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp);
 167 static int gdth_fill_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp,
 168                                u16 hdrive);
 169
 170 static void gdth_enable_int(gdth_ha_str *ha);
 171 static int gdth_test_busy(gdth_ha_str *ha);
 172 static int gdth_get_cmd_index(gdth_ha_str *ha);
 173 static void gdth_release_event(gdth_ha_str *ha);
 174 static int gdth_wait(gdth_ha_str *ha, int index,u32 time);
 175 static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode,
 176                                              u32 p1, u64 p2,u64 p3);
 177 static int gdth_search_drives(gdth_ha_str *ha);
 178 static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive);
 179
 180 static const char *gdth_ctr_name(gdth_ha_str *ha);
 181
 182 static int gdth_open(struct inode *inode, struct file *filep);
 183 static int gdth_close(struct inode *inode, struct file *filep);
 184 static long gdth_unlocked_ioctl(struct file *filep, unsigned int cmd,
 185                                 unsigned long arg);
 186
 187 static void gdth_flush(gdth_ha_str *ha);
 188 static int gdth_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 189 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
 190                                 struct gdth_cmndinfo *cmndinfo);
 191 static void gdth_scsi_done(struct scsi_cmnd *scp);
 192
 193 #ifdef DEBUG_GDTH
 194 static u8   DebugState = DEBUG_GDTH;
 195
 196 #ifdef __SERIAL__
 197 #define MAX_SERBUF 160
 198 static void ser_init(void);
 199 static void ser_puts(char *str);
 200 static void ser_putc(char c);
 201 static int  ser_printk(const char *fmt, ...);
 202 static char strbuf[MAX_SERBUF+1];
 203 #ifdef __COM2__
 204 #define COM_BASE 0x2f8
 205 #else
 206 #define COM_BASE 0x3f8
 207 #endif
 208 static void ser_init()
 209 {
 210     unsigned port=COM_BASE;
 211
 212     outb(0x80,port+3);
 213     outb(0,port+1);
 214     /* 19200 Baud, if 9600: outb(12,port) */
 215     outb(6, port);
 216     outb(3,port+3);
 217     outb(0,port+1);
 218     /*
 219     ser_putc('I');
 220     ser_putc(' ');
 221     */
 222 }
 223
 224 static void ser_puts(char *str)
 225 {
 226     char *ptr;
 227
 228     ser_init();
 229     for (ptr=str;*ptr;++ptr)
 230         ser_putc(*ptr);
 231 }
 232
 233 static void ser_putc(char c)
 234 {
 235     unsigned port=COM_BASE;
 236
 237     while ((inb(port+5) & 0x20)==0);
 238     outb(c,port);
 239     if (c==0x0a)
 240     {
 241         while ((inb(port+5) & 0x20)==0);
 242         outb(0x0d,port);
 243     }
 244 }
 245
 246 static int ser_printk(const char *fmt, ...)
 247 {
 248     va_list args;
 249     int i;
 250
 251     va_start(args,fmt);
 252     i = vsprintf(strbuf,fmt,args);
 253     ser_puts(strbuf);
 254     va_end(args);
 255     return i;
 256 }
 257
 258 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 259 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 260 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 261
 262 #else /* !__SERIAL__ */
 263 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 264 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 265 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 266 #endif
 267
 268 #else /* !DEBUG */
 269 #define TRACE(a)
 270 #define TRACE2(a)
 271 #define TRACE3(a)
 272 #endif
 273
 274 #ifdef GDTH_STATISTICS
 275 static u32 max_rq=0, max_index=0, max_sg=0;
 276 #ifdef INT_COAL
 277 static u32 max_int_coal=0;
 278 #endif
 279 static u32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 280 static struct timer_list gdth_timer;
 281 #endif
 282
 283 #define PTR2USHORT(a)   (u16)(unsigned long)(a)
 284 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 285 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 286
 287 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 288
 289 #ifdef CONFIG_ISA
 290 static u8   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 291 #endif
 292 #if defined(CONFIG_EISA) || defined(CONFIG_ISA)
 293 static u8   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 294 #endif
 295 static u8   gdth_polling;                           /* polling if TRUE */
 296 static int      gdth_ctr_count  = 0;                    /* controller count */
 297 static LIST_HEAD(gdth_instances);                       /* controller list */
 298 static u8   gdth_write_through = FALSE;             /* write through */
 299 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 300 static int elastidx;
 301 static int eoldidx;
 302 static int major;
 303
 304 #define DIN     1                               /* IN data direction */
 305 #define DOU     2                               /* OUT data direction */
 306 #define DNO     DIN                             /* no data transfer */
 307 #define DUN     DIN                             /* unknown data direction */
 308 static u8 gdth_direction_tab[0x100] = {
 309     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 310     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 311     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 312     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 313     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 314     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 315     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 316     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 317     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 318     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 319     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 320     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 321     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 322     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 323     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 324     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 325 };
 326
 327 /* LILO and modprobe/insmod parameters */
 328 /* IRQ list for GDT3000/3020 EISA controllers */
 329 static int irq[MAXHA] __initdata =
 330 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 331  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 332 /* disable driver flag */
 333 static int disable __initdata = 0;
 334 /* reserve flag */
 335 static int reserve_mode = 1;
 336 /* reserve list */
 337 static int reserve_list[MAX_RES_ARGS] =
 338 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 339  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 340  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 341 /* scan order for PCI controllers */
 342 static int reverse_scan = 0;
 343 /* virtual channel for the host drives */
 344 static int hdr_channel = 0;
 345 /* max. IDs per channel */
 346 static int max_ids = MAXID;
 347 /* rescan all IDs */
 348 static int rescan = 0;
 349 /* shared access */
 350 static int shared_access = 1;
 351 /* enable support for EISA and ISA controllers */
 352 static int probe_eisa_isa = 0;
 353 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 354 static int force_dma32 = 0;
 355
 356 /* parameters for modprobe/insmod */
 357 module_param_hw_array(irq, int, irq, NULL, 0);
 358 module_param(disable, int, 0);
 359 module_param(reserve_mode, int, 0);
 360 module_param_array(reserve_list, int, NULL, 0);
 361 module_param(reverse_scan, int, 0);
 362 module_param(hdr_channel, int, 0);
 363 module_param(max_ids, int, 0);
 364 module_param(rescan, int, 0);
 365 module_param(shared_access, int, 0);
 366 module_param(probe_eisa_isa, int, 0);
 367 module_param(force_dma32, int, 0);
 368 MODULE_AUTHOR("Achim Leubner");
 369 MODULE_LICENSE("GPL");
 370
 371 /* ioctl interface */
 372 static const struct file_operations gdth_fops = {
 373     .unlocked_ioctl   = gdth_unlocked_ioctl,
 374     .open    = gdth_open,
 375     .release = gdth_close,
 376     .llseek = noop_llseek,
 377 };
 378
 379 #include "gdth_proc.h"
 380 #include "gdth_proc.c"
 381
 382 static gdth_ha_str *gdth_find_ha(int hanum)
 383 {
 384         gdth_ha_str *ha;
 385
 386         list_for_each_entry(ha, &gdth_instances, list)
 387                 if (hanum == ha->hanum)
 388                         return ha;
 389
 390         return NULL;
 391 }
 392
 393 static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha)
 394 {
 395         struct gdth_cmndinfo *priv = NULL;
 396         unsigned long flags;
 397         int i;
 398
 399         spin_lock_irqsave(&ha->smp_lock, flags);
 400
 401         for (i=0; i<GDTH_MAXCMDS; ++i) {
 402                 if (ha->cmndinfo[i].index == 0) {
 403                         priv = &ha->cmndinfo[i];
 404                         memset(priv, 0, sizeof(*priv));
 405                         priv->index = i+1;
 406                         break;
 407                 }
 408         }
 409
 410         spin_unlock_irqrestore(&ha->smp_lock, flags);
 411
 412         return priv;
 413 }
 414
 415 static void gdth_put_cmndinfo(struct gdth_cmndinfo *priv)
 416 {
 417         BUG_ON(!priv);
 418         priv->index = 0;
 419 }
 420
 421 static void gdth_delay(int milliseconds)
 422 {
 423     if (milliseconds == 0) {
 424         udelay(1);
 425     } else {
 426         mdelay(milliseconds);
 427     }
 428 }
 429
 430 static void gdth_scsi_done(struct scsi_cmnd *scp)
 431 {
 432         struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
 433         int internal_command = cmndinfo->internal_command;
 434
 435         TRACE2(("gdth_scsi_done()\n"));
 436
 437         gdth_put_cmndinfo(cmndinfo);
 438         scp->host_scribble = NULL;
 439
 440         if (internal_command)
 441                 complete((struct completion *)scp->request);
 442         else
 443                 scp->scsi_done(scp);
 444 }
 445
 446 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 447                    int timeout, u32 *info)
 448 {
 449     gdth_ha_str *ha = shost_priv(sdev->host);
 450     struct scsi_cmnd *scp;
 451     struct gdth_cmndinfo cmndinfo;
 452     DECLARE_COMPLETION_ONSTACK(wait);
 453     int rval;
 454
 455     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 456     if (!scp)
 457         return -ENOMEM;
 458
 459     scp->sense_buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
 460     if (!scp->sense_buffer) {
 461         kfree(scp);
 462         return -ENOMEM;
 463     }
 464
 465     scp->device = sdev;
 466     memset(&cmndinfo, 0, sizeof(cmndinfo));
 467
 468     /* use request field to save the ptr. to completion struct. */
 469     scp->request = (struct request *)&wait;
 470     scp->cmd_len = 12;
 471     scp->cmnd = cmnd;
 472     cmndinfo.priority = IOCTL_PRI;
 473     cmndinfo.internal_cmd_str = gdtcmd;
 474     cmndinfo.internal_command = 1;
 475
 476     TRACE(("__gdth_execute() cmd 0x%x\n", scp->cmnd[0]));
 477     __gdth_queuecommand(ha, scp, &cmndinfo);
 478
 479     wait_for_completion(&wait);
 480
 481     rval = cmndinfo.status;
 482     if (info)
 483         *info = cmndinfo.info;
 484     kfree(scp->sense_buffer);
 485     kfree(scp);
 486     return rval;
 487 }
 488
 489 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 490                  int timeout, u32 *info)
 491 {
 492     struct scsi_device *sdev = scsi_get_host_dev(shost);
 493     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 494
 495     scsi_free_host_dev(sdev);
 496     return rval;
 497 }
 498
 499 static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs)
 500 {
 501     *cyls = size /HEADS/SECS;
 502     if (*cyls <= MAXCYLS) {
 503         *heads = HEADS;
 504         *secs = SECS;
 505     } else {                                        /* too high for 64*32 */
 506         *cyls = size /MEDHEADS/MEDSECS;
 507         if (*cyls <= MAXCYLS) {
 508             *heads = MEDHEADS;
 509             *secs = MEDSECS;
 510         } else {                                    /* too high for 127*63 */
 511             *cyls = size /BIGHEADS/BIGSECS;
 512             *heads = BIGHEADS;
 513             *secs = BIGSECS;
 514         }
 515     }
 516 }
 517
 518 /* controller search and initialization functions */
 519 #ifdef CONFIG_EISA
 520 static int __init gdth_search_eisa(u16 eisa_adr)
 521 {
 522     u32 id;
 523
 524     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 525     id = inl(eisa_adr+ID0REG);
 526     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 527         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 528             return 0;                           /* not EISA configured */
 529         return 1;
 530     }
 531     if (id == GDT3_ID)                          /* GDT3000 */
 532         return 1;
 533
 534     return 0;
 535 }
 536 #endif /* CONFIG_EISA */
 537
 538 #ifdef CONFIG_ISA
 539 static int __init gdth_search_isa(u32 bios_adr)
 540 {
 541     void __iomem *addr;
 542     u32 id;
 543
 544     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 545     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(u32))) != NULL) {
 546         id = readl(addr);
 547         iounmap(addr);
 548         if (id == GDT2_ID)                          /* GDT2000 */
 549             return 1;
 550     }
 551     return 0;
 552 }
 553 #endif /* CONFIG_ISA */
 554
 555 #ifdef CONFIG_PCI
 556
 557 static bool gdth_search_vortex(u16 device)
 558 {
 559         if (device <= PCI_DEVICE_ID_VORTEX_GDT6555)
 560                 return true;
 561         if (device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP &&
 562             device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP)
 563                 return true;
 564         if (device == PCI_DEVICE_ID_VORTEX_GDTNEWRX ||
 565             device == PCI_DEVICE_ID_VORTEX_GDTNEWRX2)
 566                 return true;
 567         return false;
 568 }
 569
 570 static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out);
 571 static int gdth_pci_init_one(struct pci_dev *pdev,
 572                              const struct pci_device_id *ent);
 573 static void gdth_pci_remove_one(struct pci_dev *pdev);
 574 static void gdth_remove_one(gdth_ha_str *ha);
 575
 576 /* Vortex only makes RAID controllers.
 577  * We do not really want to specify all 550 ids here, so wildcard match.
 578  */
 579 static const struct pci_device_id gdthtable[] = {
 580         { PCI_VDEVICE(VORTEX, PCI_ANY_ID) },
 581         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC) },
 582         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC_XSCALE) },
 583         { }     /* terminate list */
 584 };
 585 MODULE_DEVICE_TABLE(pci, gdthtable);
 586
 587 static struct pci_driver gdth_pci_driver = {
 588         .name           = "gdth",
 589         .id_table       = gdthtable,
 590         .probe          = gdth_pci_init_one,
 591         .remove         = gdth_pci_remove_one,
 592 };
 593
 594 static void gdth_pci_remove_one(struct pci_dev *pdev)
 595 {
 596         gdth_ha_str *ha = pci_get_drvdata(pdev);
 597
 598         list_del(&ha->list);
 599         gdth_remove_one(ha);
 600
 601         pci_disable_device(pdev);
 602 }
 603
 604 static int gdth_pci_init_one(struct pci_dev *pdev,
 605                              const struct pci_device_id *ent)
 606 {
 607         u16 vendor = pdev->vendor;
 608         u16 device = pdev->device;
 609         unsigned long base0, base1, base2;
 610         int rc;
 611         gdth_pci_str gdth_pcistr;
 612         gdth_ha_str *ha = NULL;
 613
 614         TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 615                gdth_ctr_count, vendor, device));
 616
 617         memset(&gdth_pcistr, 0, sizeof(gdth_pcistr));
 618
 619         if (vendor == PCI_VENDOR_ID_VORTEX && !gdth_search_vortex(device))
 620                 return -ENODEV;
 621
 622         rc = pci_enable_device(pdev);
 623         if (rc)
 624                 return rc;
 625
 626         if (gdth_ctr_count >= MAXHA)
 627                 return -EBUSY;
 628
 629         /* GDT PCI controller found, resources are already in pdev */
 630         gdth_pcistr.pdev = pdev;
 631         base0 = pci_resource_flags(pdev, 0);
 632         base1 = pci_resource_flags(pdev, 1);
 633         base2 = pci_resource_flags(pdev, 2);
 634         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 635             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 636             if (!(base0 & IORESOURCE_MEM))
 637                 return -ENODEV;
 638             gdth_pcistr.dpmem = pci_resource_start(pdev, 0);
 639         } else {                                  /* GDT6110, GDT6120, .. */
 640             if (!(base0 & IORESOURCE_MEM) ||
 641                 !(base2 & IORESOURCE_MEM) ||
 642                 !(base1 & IORESOURCE_IO))
 643                 return -ENODEV;
 644             gdth_pcistr.dpmem = pci_resource_start(pdev, 2);
 645             gdth_pcistr.io    = pci_resource_start(pdev, 1);
 646         }
 647         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 648                 gdth_pcistr.pdev->bus->number,
 649                 PCI_SLOT(gdth_pcistr.pdev->devfn),
 650                 gdth_pcistr.irq,
 651                 gdth_pcistr.dpmem));
 652
 653         rc = gdth_pci_probe_one(&gdth_pcistr, &ha);
 654         if (rc)
 655                 return rc;
 656
 657         return 0;
 658 }
 659 #endif /* CONFIG_PCI */
 660
 661 #ifdef CONFIG_EISA
 662 static int __init gdth_init_eisa(u16 eisa_adr,gdth_ha_str *ha)
 663 {
 664     u32 retries,id;
 665     u8 prot_ver,eisacf,i,irq_found;
 666
 667     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 668
 669     /* disable board interrupts, deinitialize services */
 670     outb(0xff,eisa_adr+EDOORREG);
 671     outb(0x00,eisa_adr+EDENABREG);
 672     outb(0x00,eisa_adr+EINTENABREG);
 673
 674     outb(0xff,eisa_adr+LDOORREG);
 675     retries = INIT_RETRIES;
 676     gdth_delay(20);
 677     while (inb(eisa_adr+EDOORREG) != 0xff) {
 678         if (--retries == 0) {
 679             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 680             return 0;
 681         }
 682         gdth_delay(1);
 683         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 684     }
 685     prot_ver = inb(eisa_adr+MAILBOXREG);
 686     outb(0xff,eisa_adr+EDOORREG);
 687     if (prot_ver != PROTOCOL_VERSION) {
 688         printk("GDT-EISA: Illegal protocol version\n");
 689         return 0;
 690     }
 691     ha->bmic = eisa_adr;
 692     ha->brd_phys = (u32)eisa_adr >> 12;
 693
 694     outl(0,eisa_adr+MAILBOXREG);
 695     outl(0,eisa_adr+MAILBOXREG+4);
 696     outl(0,eisa_adr+MAILBOXREG+8);
 697     outl(0,eisa_adr+MAILBOXREG+12);
 698
 699     /* detect IRQ */
 700     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 701         ha->oem_id = OEM_ID_ICP;
 702         ha->type = GDT_EISA;
 703         ha->stype = id;
 704         outl(1,eisa_adr+MAILBOXREG+8);
 705         outb(0xfe,eisa_adr+LDOORREG);
 706         retries = INIT_RETRIES;
 707         gdth_delay(20);
 708         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 709             if (--retries == 0) {
 710                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 711                 return 0;
 712             }
 713             gdth_delay(1);
 714         }
 715         ha->irq = inb(eisa_adr+MAILBOXREG);
 716         outb(0xff,eisa_adr+EDOORREG);
 717         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 718         /* check the result */
 719         if (ha->irq == 0) {
 720                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 721                 for (i = 0, irq_found = FALSE;
 722                      i < MAXHA && irq[i] != 0xff; ++i) {
 723                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 724                     irq_found = TRUE;
 725                     break;
 726                 }
 727                 }
 728             if (irq_found) {
 729                 ha->irq = irq[i];
 730                 irq[i] = 0;
 731                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 732                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 733                        ha->irq);
 734             } else {
 735                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 736                 printk("the controller BIOS or use command line parameters\n");
 737                 return 0;
 738             }
 739         }
 740     } else {
 741         eisacf = inb(eisa_adr+EISAREG) & 7;
 742         if (eisacf > 4)                         /* level triggered */
 743             eisacf -= 4;
 744         ha->irq = gdth_irq_tab[eisacf];
 745         ha->oem_id = OEM_ID_ICP;
 746         ha->type = GDT_EISA;
 747         ha->stype = id;
 748     }
 749
 750     ha->dma64_support = 0;
 751     return 1;
 752 }
 753 #endif /* CONFIG_EISA */
 754
 755 #ifdef CONFIG_ISA
 756 static int __init gdth_init_isa(u32 bios_adr,gdth_ha_str *ha)
 757 {
 758     register gdt2_dpram_str __iomem *dp2_ptr;
 759     int i;
 760     u8 irq_drq,prot_ver;
 761     u32 retries;
 762
 763     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 764
 765     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 766     if (ha->brd == NULL) {
 767         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 768         return 0;
 769     }
 770     dp2_ptr = ha->brd;
 771     writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 772     /* reset interface area */
 773     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 774     if (readl(&dp2_ptr->u) != 0) {
 775         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 776         iounmap(ha->brd);
 777         return 0;
 778     }
 779
 780     /* disable board interrupts, read DRQ and IRQ */
 781     writeb(0xff, &dp2_ptr->io.irqdel);
 782     writeb(0x00, &dp2_ptr->io.irqen);
 783     writeb(0x00, &dp2_ptr->u.ic.S_Status);
 784     writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 785
 786     irq_drq = readb(&dp2_ptr->io.rq);
 787     for (i=0; i<3; ++i) {
 788         if ((irq_drq & 1)==0)
 789             break;
 790         irq_drq >>= 1;
 791     }
 792     ha->drq = gdth_drq_tab[i];
 793
 794     irq_drq = readb(&dp2_ptr->io.rq) >> 3;
 795     for (i=1; i<5; ++i) {
 796         if ((irq_drq & 1)==0)
 797             break;
 798         irq_drq >>= 1;
 799     }
 800     ha->irq = gdth_irq_tab[i];
 801
 802     /* deinitialize services */
 803     writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
 804     writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
 805     writeb(0, &dp2_ptr->io.event);
 806     retries = INIT_RETRIES;
 807     gdth_delay(20);
 808     while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
 809         if (--retries == 0) {
 810             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
 811             iounmap(ha->brd);
 812             return 0;
 813         }
 814         gdth_delay(1);
 815     }
 816     prot_ver = (u8)readl(&dp2_ptr->u.ic.S_Info[0]);
 817     writeb(0, &dp2_ptr->u.ic.Status);
 818     writeb(0xff, &dp2_ptr->io.irqdel);
 819     if (prot_ver != PROTOCOL_VERSION) {
 820         printk("GDT-ISA: Illegal protocol version\n");
 821         iounmap(ha->brd);
 822         return 0;
 823     }
 824
 825     ha->oem_id = OEM_ID_ICP;
 826     ha->type = GDT_ISA;
 827     ha->ic_all_size = sizeof(dp2_ptr->u);
 828     ha->stype= GDT2_ID;
 829     ha->brd_phys = bios_adr >> 4;
 830
 831     /* special request to controller BIOS */
 832     writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
 833     writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
 834     writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
 835     writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
 836     writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
 837     writeb(0, &dp2_ptr->io.event);
 838     retries = INIT_RETRIES;
 839     gdth_delay(20);
 840     while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
 841         if (--retries == 0) {
 842             printk("GDT-ISA: Initialization error\n");
 843             iounmap(ha->brd);
 844             return 0;
 845         }
 846         gdth_delay(1);
 847     }
 848     writeb(0, &dp2_ptr->u.ic.Status);
 849     writeb(0xff, &dp2_ptr->io.irqdel);
 850
 851     ha->dma64_support = 0;
 852     return 1;
 853 }
 854 #endif /* CONFIG_ISA */
 855
 856 #ifdef CONFIG_PCI
 857 static int gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
 858                          gdth_ha_str *ha)
 859 {
 860     register gdt6_dpram_str __iomem *dp6_ptr;
 861     register gdt6c_dpram_str __iomem *dp6c_ptr;
 862     register gdt6m_dpram_str __iomem *dp6m_ptr;
 863     u32 retries;
 864     u8 prot_ver;
 865     u16 command;
 866     int i, found = FALSE;
 867
 868     TRACE(("gdth_init_pci()\n"));
 869
 870     if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 871         ha->oem_id = OEM_ID_INTEL;
 872     else
 873         ha->oem_id = OEM_ID_ICP;
 874     ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8);
 875     ha->stype = (u32)pdev->device;
 876     ha->irq = pdev->irq;
 877     ha->pdev = pdev;
 878
 879     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
 880         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
 881         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
 882         if (ha->brd == NULL) {
 883             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 884             return 0;
 885         }
 886         /* check and reset interface area */
 887         dp6_ptr = ha->brd;
 888         writel(DPMEM_MAGIC, &dp6_ptr->u);
 889         if (readl(&dp6_ptr->u) != DPMEM_MAGIC) {
 890             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 891                    pcistr->dpmem);
 892             found = FALSE;
 893             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 894                 iounmap(ha->brd);
 895                 ha->brd = ioremap(i, sizeof(u16));
 896                 if (ha->brd == NULL) {
 897                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 898                     return 0;
 899                 }
 900                 if (readw(ha->brd) != 0xffff) {
 901                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
 902                     continue;
 903                 }
 904                 iounmap(ha->brd);
 905                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
 906                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
 907                 if (ha->brd == NULL) {
 908                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 909                     return 0;
 910                 }
 911                 dp6_ptr = ha->brd;
 912                 writel(DPMEM_MAGIC, &dp6_ptr->u);
 913                 if (readl(&dp6_ptr->u) == DPMEM_MAGIC) {
 914                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 915                     found = TRUE;
 916                     break;
 917                 }
 918             }
 919             if (!found) {
 920                 printk("GDT-PCI: No free address found!\n");
 921                 iounmap(ha->brd);
 922                 return 0;
 923             }
 924         }
 925         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
 926         if (readl(&dp6_ptr->u) != 0) {
 927             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
 928             iounmap(ha->brd);
 929             return 0;
 930         }
 931
 932         /* disable board interrupts, deinit services */
 933         writeb(0xff, &dp6_ptr->io.irqdel);
 934         writeb(0x00, &dp6_ptr->io.irqen);
 935         writeb(0x00, &dp6_ptr->u.ic.S_Status);
 936         writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
 937
 938         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
 939         writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
 940         writeb(0, &dp6_ptr->io.event);
 941         retries = INIT_RETRIES;
 942         gdth_delay(20);
 943         while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
 944             if (--retries == 0) {
 945                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
 946                 iounmap(ha->brd);
 947                 return 0;
 948             }
 949             gdth_delay(1);
 950         }
 951         prot_ver = (u8)readl(&dp6_ptr->u.ic.S_Info[0]);
 952         writeb(0, &dp6_ptr->u.ic.S_Status);
 953         writeb(0xff, &dp6_ptr->io.irqdel);
 954         if (prot_ver != PROTOCOL_VERSION) {
 955             printk("GDT-PCI: Illegal protocol version\n");
 956             iounmap(ha->brd);
 957             return 0;
 958         }
 959
 960         ha->type = GDT_PCI;
 961         ha->ic_all_size = sizeof(dp6_ptr->u);
 962
 963         /* special command to controller BIOS */
 964         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
 965         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
 966         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
 967         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
 968         writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
 969         writeb(0, &dp6_ptr->io.event);
 970         retries = INIT_RETRIES;
 971         gdth_delay(20);
 972         while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
 973             if (--retries == 0) {
 974                 printk("GDT-PCI: Initialization error\n");
 975                 iounmap(ha->brd);
 976                 return 0;
 977             }
 978             gdth_delay(1);
 979         }
 980         writeb(0, &dp6_ptr->u.ic.S_Status);
 981         writeb(0xff, &dp6_ptr->io.irqdel);
 982
 983         ha->dma64_support = 0;
 984
 985     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
 986         ha->plx = (gdt6c_plx_regs *)pcistr->io;
 987         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
 988             pcistr->dpmem,ha->irq));
 989         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
 990         if (ha->brd == NULL) {
 991             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 992             iounmap(ha->brd);
 993             return 0;
 994         }
 995         /* check and reset interface area */
 996         dp6c_ptr = ha->brd;
 997         writel(DPMEM_MAGIC, &dp6c_ptr->u);
 998         if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
 999             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1000                    pcistr->dpmem);
1001             found = FALSE;
1002             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1003                 iounmap(ha->brd);
1004                 ha->brd = ioremap(i, sizeof(u16));
1005                 if (ha->brd == NULL) {
1006                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1007                     return 0;
1008                 }
1009                 if (readw(ha->brd) != 0xffff) {
1010                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1011                     continue;
1012                 }
1013                 iounmap(ha->brd);
1014                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_2, i);
1015                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1016                 if (ha->brd == NULL) {
1017                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1018                     return 0;
1019                 }
1020                 dp6c_ptr = ha->brd;
1021                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
1022                 if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1023                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1024                     found = TRUE;
1025                     break;
1026                 }
1027             }
1028             if (!found) {
1029                 printk("GDT-PCI: No free address found!\n");
1030                 iounmap(ha->brd);
1031                 return 0;
1032             }
1033         }
1034         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1035         if (readl(&dp6c_ptr->u) != 0) {
1036             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1037             iounmap(ha->brd);
1038             return 0;
1039         }
1040
1041         /* disable board interrupts, deinit services */
1042         outb(0x00,PTR2USHORT(&ha->plx->control1));
1043         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1044
1045         writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1046         writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1047
1048         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1049         writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1050
1051         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1052
1053         retries = INIT_RETRIES;
1054         gdth_delay(20);
1055         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1056             if (--retries == 0) {
1057                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1058                 iounmap(ha->brd);
1059                 return 0;
1060             }
1061             gdth_delay(1);
1062         }
1063         prot_ver = (u8)readl(&dp6c_ptr->u.ic.S_Info[0]);
1064         writeb(0, &dp6c_ptr->u.ic.Status);
1065         if (prot_ver != PROTOCOL_VERSION) {
1066             printk("GDT-PCI: Illegal protocol version\n");
1067             iounmap(ha->brd);
1068             return 0;
1069         }
1070
1071         ha->type = GDT_PCINEW;
1072         ha->ic_all_size = sizeof(dp6c_ptr->u);
1073
1074         /* special command to controller BIOS */
1075         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1076         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1077         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1078         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1079         writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1080
1081         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1082
1083         retries = INIT_RETRIES;
1084         gdth_delay(20);
1085         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1086             if (--retries == 0) {
1087                 printk("GDT-PCI: Initialization error\n");
1088                 iounmap(ha->brd);
1089                 return 0;
1090             }
1091             gdth_delay(1);
1092         }
1093         writeb(0, &dp6c_ptr->u.ic.S_Status);
1094
1095         ha->dma64_support = 0;
1096
1097     } else {                                            /* MPR */
1098         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1099         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1100         if (ha->brd == NULL) {
1101             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1102             return 0;
1103         }
1104
1105         /* manipulate config. space to enable DPMEM, start RP controller */
1106         pci_read_config_word(pdev, PCI_COMMAND, &command);
1107         command |= 6;
1108         pci_write_config_word(pdev, PCI_COMMAND, command);
1109         gdth_delay(1);
1110
1111         dp6m_ptr = ha->brd;
1112
1113         /* Ensure that it is safe to access the non HW portions of DPMEM.
1114          * Aditional check needed for Xscale based RAID controllers */
1115         while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1116             gdth_delay(1);
1117
1118         /* check and reset interface area */
1119         writel(DPMEM_MAGIC, &dp6m_ptr->u);
1120         if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1121             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1122                    pcistr->dpmem);
1123             found = FALSE;
1124             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1125                 iounmap(ha->brd);
1126                 ha->brd = ioremap(i, sizeof(u16));
1127                 if (ha->brd == NULL) {
1128                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1129                     return 0;
1130                 }
1131                 if (readw(ha->brd) != 0xffff) {
1132                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1133                     continue;
1134                 }
1135                 iounmap(ha->brd);
1136                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
1137                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1138                 if (ha->brd == NULL) {
1139                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1140                     return 0;
1141                 }
1142                 dp6m_ptr = ha->brd;
1143                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
1144                 if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1145                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1146                     found = TRUE;
1147                     break;
1148                 }
1149             }
1150             if (!found) {
1151                 printk("GDT-PCI: No free address found!\n");
1152                 iounmap(ha->brd);
1153                 return 0;
1154             }
1155         }
1156         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1157
1158         /* disable board interrupts, deinit services */
1159         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1160                     &dp6m_ptr->i960r.edoor_en_reg);
1161         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1162         writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1163         writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1164
1165         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1166         writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1167         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1168         retries = INIT_RETRIES;
1169         gdth_delay(20);
1170         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1171             if (--retries == 0) {
1172                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1173                 iounmap(ha->brd);
1174                 return 0;
1175             }
1176             gdth_delay(1);
1177         }
1178         prot_ver = (u8)readl(&dp6m_ptr->u.ic.S_Info[0]);
1179         writeb(0, &dp6m_ptr->u.ic.S_Status);
1180         if (prot_ver != PROTOCOL_VERSION) {
1181             printk("GDT-PCI: Illegal protocol version\n");
1182             iounmap(ha->brd);
1183             return 0;
1184         }
1185
1186         ha->type = GDT_PCIMPR;
1187         ha->ic_all_size = sizeof(dp6m_ptr->u);
1188
1189         /* special command to controller BIOS */
1190         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1191         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1192         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1193         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1194         writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1195         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1196         retries = INIT_RETRIES;
1197         gdth_delay(20);
1198         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1199             if (--retries == 0) {
1200                 printk("GDT-PCI: Initialization error\n");
1201                 iounmap(ha->brd);
1202                 return 0;
1203             }
1204             gdth_delay(1);
1205         }
1206         writeb(0, &dp6m_ptr->u.ic.S_Status);
1207
1208         /* read FW version to detect 64-bit DMA support */
1209         writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1210         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1211         retries = INIT_RETRIES;
1212         gdth_delay(20);
1213         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1214             if (--retries == 0) {
1215                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1216                 iounmap(ha->brd);
1217                 return 0;
1218             }
1219             gdth_delay(1);
1220         }
1221         prot_ver = (u8)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1222         writeb(0, &dp6m_ptr->u.ic.S_Status);
1223         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1224             ha->dma64_support = 0;
1225         else
1226             ha->dma64_support = 1;
1227     }
1228
1229     return 1;
1230 }
1231 #endif /* CONFIG_PCI */
1232
1233 /* controller protocol functions */
1234
1235 static void gdth_enable_int(gdth_ha_str *ha)
1236 {
1237     unsigned long flags;
1238     gdt2_dpram_str __iomem *dp2_ptr;
1239     gdt6_dpram_str __iomem *dp6_ptr;
1240     gdt6m_dpram_str __iomem *dp6m_ptr;
1241
1242     TRACE(("gdth_enable_int() hanum %d\n",ha->hanum));
1243     spin_lock_irqsave(&ha->smp_lock, flags);
1244
1245     if (ha->type == GDT_EISA) {
1246         outb(0xff, ha->bmic + EDOORREG);
1247         outb(0xff, ha->bmic + EDENABREG);
1248         outb(0x01, ha->bmic + EINTENABREG);
1249     } else if (ha->type == GDT_ISA) {
1250         dp2_ptr = ha->brd;
1251         writeb(1, &dp2_ptr->io.irqdel);
1252         writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1253         writeb(1, &dp2_ptr->io.irqen);
1254     } else if (ha->type == GDT_PCI) {
1255         dp6_ptr = ha->brd;
1256         writeb(1, &dp6_ptr->io.irqdel);
1257         writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1258         writeb(1, &dp6_ptr->io.irqen);
1259     } else if (ha->type == GDT_PCINEW) {
1260         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1261         outb(0x03, PTR2USHORT(&ha->plx->control1));
1262     } else if (ha->type == GDT_PCIMPR) {
1263         dp6m_ptr = ha->brd;
1264         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1265         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1266                     &dp6m_ptr->i960r.edoor_en_reg);
1267     }
1268     spin_unlock_irqrestore(&ha->smp_lock, flags);
1269 }
1270
1271 /* return IStatus if interrupt was from this card else 0 */
1272 static u8 gdth_get_status(gdth_ha_str *ha)
1273 {
1274     u8 IStatus = 0;
1275
1276     TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count));
1277
1278         if (ha->type == GDT_EISA)
1279             IStatus = inb((u16)ha->bmic + EDOORREG);
1280         else if (ha->type == GDT_ISA)
1281             IStatus =
1282                 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1283         else if (ha->type == GDT_PCI)
1284             IStatus =
1285                 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1286         else if (ha->type == GDT_PCINEW)
1287             IStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1288         else if (ha->type == GDT_PCIMPR)
1289             IStatus =
1290                 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1291
1292         return IStatus;
1293 }
1294
1295 static int gdth_test_busy(gdth_ha_str *ha)
1296 {
1297     register int gdtsema0 = 0;
1298
1299     TRACE(("gdth_test_busy() hanum %d\n", ha->hanum));
1300
1301     if (ha->type == GDT_EISA)
1302         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1303     else if (ha->type == GDT_ISA)
1304         gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1305     else if (ha->type == GDT_PCI)
1306         gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1307     else if (ha->type == GDT_PCINEW)
1308         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1309     else if (ha->type == GDT_PCIMPR)
1310         gdtsema0 =
1311             (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1312
1313     return (gdtsema0 & 1);
1314 }
1315
1316
1317 static int gdth_get_cmd_index(gdth_ha_str *ha)
1318 {
1319     int i;
1320
1321     TRACE(("gdth_get_cmd_index() hanum %d\n", ha->hanum));
1322
1323     for (i=0; i<GDTH_MAXCMDS; ++i) {
1324         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1325             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1326             ha->cmd_tab[i].service = ha->pccb->Service;
1327             ha->pccb->CommandIndex = (u32)i+2;
1328             return (i+2);
1329         }
1330     }
1331     return 0;
1332 }
1333
1334
1335 static void gdth_set_sema0(gdth_ha_str *ha)
1336 {
1337     TRACE(("gdth_set_sema0() hanum %d\n", ha->hanum));
1338
1339     if (ha->type == GDT_EISA) {
1340         outb(1, ha->bmic + SEMA0REG);
1341     } else if (ha->type == GDT_ISA) {
1342         writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1343     } else if (ha->type == GDT_PCI) {
1344         writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1345     } else if (ha->type == GDT_PCINEW) {
1346         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1347     } else if (ha->type == GDT_PCIMPR) {
1348         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1349     }
1350 }
1351
1352
1353 static void gdth_copy_command(gdth_ha_str *ha)
1354 {
1355     register gdth_cmd_str *cmd_ptr;
1356     register gdt6m_dpram_str __iomem *dp6m_ptr;
1357     register gdt6c_dpram_str __iomem *dp6c_ptr;
1358     gdt6_dpram_str __iomem *dp6_ptr;
1359     gdt2_dpram_str __iomem *dp2_ptr;
1360     u16 cp_count,dp_offset,cmd_no;
1361
1362     TRACE(("gdth_copy_command() hanum %d\n", ha->hanum));
1363
1364     cp_count = ha->cmd_len;
1365     dp_offset= ha->cmd_offs_dpmem;
1366     cmd_no   = ha->cmd_cnt;
1367     cmd_ptr  = ha->pccb;
1368
1369     ++ha->cmd_cnt;
1370     if (ha->type == GDT_EISA)
1371         return;                                 /* no DPMEM, no copy */
1372
1373     /* set cpcount dword aligned */
1374     if (cp_count & 3)
1375         cp_count += (4 - (cp_count & 3));
1376
1377     ha->cmd_offs_dpmem += cp_count;
1378
1379     /* set offset and service, copy command to DPMEM */
1380     if (ha->type == GDT_ISA) {
1381         dp2_ptr = ha->brd;
1382         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1383                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1384         writew((u16)cmd_ptr->Service,
1385                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1386         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1387     } else if (ha->type == GDT_PCI) {
1388         dp6_ptr = ha->brd;
1389         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1390                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1391         writew((u16)cmd_ptr->Service,
1392                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1393         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1394     } else if (ha->type == GDT_PCINEW) {
1395         dp6c_ptr = ha->brd;
1396         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1397                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1398         writew((u16)cmd_ptr->Service,
1399                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1400         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1401     } else if (ha->type == GDT_PCIMPR) {
1402         dp6m_ptr = ha->brd;
1403         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1404                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1405         writew((u16)cmd_ptr->Service,
1406                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1407         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1408     }
1409 }
1410
1411
1412 static void gdth_release_event(gdth_ha_str *ha)
1413 {
1414     TRACE(("gdth_release_event() hanum %d\n", ha->hanum));
1415
1416 #ifdef GDTH_STATISTICS
1417     {
1418         u32 i,j;
1419         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1420             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1421                 ++i;
1422         }
1423         if (max_index < i) {
1424             max_index = i;
1425             TRACE3(("GDT: max_index = %d\n",(u16)i));
1426         }
1427     }
1428 #endif
1429
1430     if (ha->pccb->OpCode == GDT_INIT)
1431         ha->pccb->Service |= 0x80;
1432
1433     if (ha->type == GDT_EISA) {
1434         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1435             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1436         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1437     } else if (ha->type == GDT_ISA) {
1438         writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1439     } else if (ha->type == GDT_PCI) {
1440         writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1441     } else if (ha->type == GDT_PCINEW) {
1442         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1443     } else if (ha->type == GDT_PCIMPR) {
1444         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1445     }
1446 }
1447
1448 static int gdth_wait(gdth_ha_str *ha, int index, u32 time)
1449 {
1450     int answer_found = FALSE;
1451     int wait_index = 0;
1452
1453     TRACE(("gdth_wait() hanum %d index %d time %d\n", ha->hanum, index, time));
1454
1455     if (index == 0)
1456         return 1;                               /* no wait required */
1457
1458     do {
1459         __gdth_interrupt(ha, true, &wait_index);
1460         if (wait_index == index) {
1461             answer_found = TRUE;
1462             break;
1463         }
1464         gdth_delay(1);
1465     } while (--time);
1466
1467     while (gdth_test_busy(ha))
1468         gdth_delay(0);
1469
1470     return (answer_found);
1471 }
1472
1473
1474 static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode,
1475                                             u32 p1, u64 p2, u64 p3)
1476 {
1477     register gdth_cmd_str *cmd_ptr;
1478     int retries,index;
1479
1480     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1481
1482     cmd_ptr = ha->pccb;
1483     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1484
1485     /* make command  */
1486     for (retries = INIT_RETRIES;;) {
1487         cmd_ptr->Service          = service;
1488         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1489         if (!(index=gdth_get_cmd_index(ha))) {
1490             TRACE(("GDT: No free command index found\n"));
1491             return 0;
1492         }
1493         gdth_set_sema0(ha);
1494         cmd_ptr->OpCode           = opcode;
1495         cmd_ptr->BoardNode        = LOCALBOARD;
1496         if (service == CACHESERVICE) {
1497             if (opcode == GDT_IOCTL) {
1498                 cmd_ptr->u.ioctl.subfunc = p1;
1499                 cmd_ptr->u.ioctl.channel = (u32)p2;
1500                 cmd_ptr->u.ioctl.param_size = (u16)p3;
1501                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1502             } else {
1503                 if (ha->cache_feat & GDT_64BIT) {
1504                     cmd_ptr->u.cache64.DeviceNo = (u16)p1;
1505                     cmd_ptr->u.cache64.BlockNo  = p2;
1506                 } else {
1507                     cmd_ptr->u.cache.DeviceNo = (u16)p1;
1508                     cmd_ptr->u.cache.BlockNo  = (u32)p2;
1509                 }
1510             }
1511         } else if (service == SCSIRAWSERVICE) {
1512             if (ha->raw_feat & GDT_64BIT) {
1513                 cmd_ptr->u.raw64.direction  = p1;
1514                 cmd_ptr->u.raw64.bus        = (u8)p2;
1515                 cmd_ptr->u.raw64.target     = (u8)p3;
1516                 cmd_ptr->u.raw64.lun        = (u8)(p3 >> 8);
1517             } else {
1518                 cmd_ptr->u.raw.direction  = p1;
1519                 cmd_ptr->u.raw.bus        = (u8)p2;
1520                 cmd_ptr->u.raw.target     = (u8)p3;
1521                 cmd_ptr->u.raw.lun        = (u8)(p3 >> 8);
1522             }
1523         } else if (service == SCREENSERVICE) {
1524             if (opcode == GDT_REALTIME) {
1525                 *(u32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1526                 *(u32 *)&cmd_ptr->u.screen.su.data[4] = (u32)p2;
1527                 *(u32 *)&cmd_ptr->u.screen.su.data[8] = (u32)p3;
1528             }
1529         }
1530         ha->cmd_len          = sizeof(gdth_cmd_str);
1531         ha->cmd_offs_dpmem   = 0;
1532         ha->cmd_cnt          = 0;
1533         gdth_copy_command(ha);
1534         gdth_release_event(ha);
1535         gdth_delay(20);
1536         if (!gdth_wait(ha, index, INIT_TIMEOUT)) {
1537             printk("GDT: Initialization error (timeout service %d)\n",service);
1538             return 0;
1539         }
1540         if (ha->status != S_BSY || --retries == 0)
1541             break;
1542         gdth_delay(1);
1543     }
1544
1545     return (ha->status != S_OK ? 0:1);
1546 }
1547
1548
1549 /* search for devices */
1550
1551 static int gdth_search_drives(gdth_ha_str *ha)
1552 {
1553     u16 cdev_cnt, i;
1554     int ok;
1555     u32 bus_no, drv_cnt, drv_no, j;
1556     gdth_getch_str *chn;
1557     gdth_drlist_str *drl;
1558     gdth_iochan_str *ioc;
1559     gdth_raw_iochan_str *iocr;
1560     gdth_arcdl_str *alst;
1561     gdth_alist_str *alst2;
1562     gdth_oem_str_ioctl *oemstr;
1563 #ifdef INT_COAL
1564     gdth_perf_modes *pmod;
1565 #endif
1566
1567 #ifdef GDTH_RTC
1568     u8 rtc[12];
1569     unsigned long flags;
1570 #endif
1571
1572     TRACE(("gdth_search_drives() hanum %d\n", ha->hanum));
1573     ok = 0;
1574
1575     /* initialize controller services, at first: screen service */
1576     ha->screen_feat = 0;
1577     if (!force_dma32) {
1578         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_X_INIT_SCR, 0, 0, 0);
1579         if (ok)
1580             ha->screen_feat = GDT_64BIT;
1581     }
1582     if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1583         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0);
1584     if (!ok) {
1585         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1586                ha->hanum, ha->status);
1587         return 0;
1588     }
1589     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1590
1591 #ifdef GDTH_RTC
1592     /* read realtime clock info, send to controller */
1593     /* 1. wait for the falling edge of update flag */
1594     spin_lock_irqsave(&rtc_lock, flags);
1595     for (j = 0; j < 1000000; ++j)
1596         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1597             break;
1598     for (j = 0; j < 1000000; ++j)
1599         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1600             break;
1601     /* 2. read info */
1602     do {
1603         for (j = 0; j < 12; ++j)
1604             rtc[j] = CMOS_READ(j);
1605     } while (rtc[0] != CMOS_READ(0));
1606     spin_unlock_irqrestore(&rtc_lock, flags);
1607     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(u32 *)&rtc[0],
1608             *(u32 *)&rtc[4], *(u32 *)&rtc[8]));
1609     /* 3. send to controller firmware */
1610     gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(u32 *)&rtc[0],
1611                       *(u32 *)&rtc[4], *(u32 *)&rtc[8]);
1612 #endif
1613
1614     /* unfreeze all IOs */
1615     gdth_internal_cmd(ha, CACHESERVICE, GDT_UNFREEZE_IO, 0, 0, 0);
1616
1617     /* initialize cache service */
1618     ha->cache_feat = 0;
1619     if (!force_dma32) {
1620         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INIT_HOST, LINUX_OS,
1621                                                                          0, 0);
1622         if (ok)
1623             ha->cache_feat = GDT_64BIT;
1624     }
1625     if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1626         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0);
1627     if (!ok) {
1628         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1629                ha->hanum, ha->status);
1630         return 0;
1631     }
1632     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1633     cdev_cnt = (u16)ha->info;
1634     ha->fw_vers = ha->service;
1635
1636 #ifdef INT_COAL
1637     if (ha->type == GDT_PCIMPR) {
1638         /* set perf. modes */
1639         pmod = (gdth_perf_modes *)ha->pscratch;
1640         pmod->version          = 1;
1641         pmod->st_mode          = 1;    /* enable one status buffer */
1642         *((u64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1643         pmod->st_buff_indx1    = COALINDEX;
1644         pmod->st_buff_addr2    = 0;
1645         pmod->st_buff_u_addr2  = 0;
1646         pmod->st_buff_indx2    = 0;
1647         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1648         pmod->cmd_mode         = 0;    // disable all cmd buffers
1649         pmod->cmd_buff_addr1   = 0;
1650         pmod->cmd_buff_u_addr1 = 0;
1651         pmod->cmd_buff_indx1   = 0;
1652         pmod->cmd_buff_addr2   = 0;
1653         pmod->cmd_buff_u_addr2 = 0;
1654         pmod->cmd_buff_indx2   = 0;
1655         pmod->cmd_buff_size    = 0;
1656         pmod->reserved1        = 0;
1657         pmod->reserved2        = 0;
1658         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, SET_PERF_MODES,
1659                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1660             printk("GDT-HA %d: Interrupt coalescing activated\n", ha->hanum);
1661         }
1662     }
1663 #endif
1664
1665     /* detect number of buses - try new IOCTL */
1666     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1667     iocr->hdr.version        = 0xffffffff;
1668     iocr->hdr.list_entries   = MAXBUS;
1669     iocr->hdr.first_chan     = 0;
1670     iocr->hdr.last_chan      = MAXBUS-1;
1671     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1672     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_RAW_DESC,
1673                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1674         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1675         ha->bus_cnt = iocr->hdr.chan_count;
1676         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1677             if (iocr->list[bus_no].proc_id < MAXID)
1678                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1679             else
1680                 ha->bus_id[bus_no] = 0xff;
1681         }
1682     } else {
1683         /* old method */
1684         chn = (gdth_getch_str *)ha->pscratch;
1685         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1686             chn->channel_no = bus_no;
1687             if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1688                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1689                                    IO_CHANNEL | INVALID_CHANNEL,
1690                                    sizeof(gdth_getch_str))) {
1691                 if (bus_no == 0) {
1692                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1693                            ha->hanum, ha->status);
1694                     return 0;
1695                 }
1696                 break;
1697             }
1698             if (chn->siop_id < MAXID)
1699                 ha->bus_id[bus_no] = chn->siop_id;
1700             else
1701                 ha->bus_id[bus_no] = 0xff;
1702         }
1703         ha->bus_cnt = (u8)bus_no;
1704     }
1705     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1706
1707     /* read cache configuration */
1708     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_INFO,
1709                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1710         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1711                ha->hanum, ha->status);
1712         return 0;
1713     }
1714     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1715     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1716             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1717             ha->cpar.write_back,ha->cpar.block_size));
1718
1719     /* read board info and features */
1720     ha->more_proc = FALSE;
1721     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_INFO,
1722                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1723         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1724                sizeof(gdth_binfo_str));
1725         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_FEATURES,
1726                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1727             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1728             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1729             ha->more_proc = TRUE;
1730         }
1731     } else {
1732         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1733         strcpy(ha->binfo.type_string, gdth_ctr_name(ha));
1734     }
1735     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1736
1737     /* read more informations */
1738     if (ha->more_proc) {
1739         /* physical drives, channel addresses */
1740         ioc = (gdth_iochan_str *)ha->pscratch;
1741         ioc->hdr.version        = 0xffffffff;
1742         ioc->hdr.list_entries   = MAXBUS;
1743         ioc->hdr.first_chan     = 0;
1744         ioc->hdr.last_chan      = MAXBUS-1;
1745         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1746         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_DESC,
1747                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1748             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1749                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1750                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1751             }
1752         } else {
1753             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1754                 ha->raw[bus_no].address = IO_CHANNEL;
1755                 ha->raw[bus_no].local_no = bus_no;
1756             }
1757         }
1758         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1759             chn = (gdth_getch_str *)ha->pscratch;
1760             chn->channel_no = ha->raw[bus_no].local_no;
1761             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1762                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
1763                                   ha->raw[bus_no].address | INVALID_CHANNEL,
1764                                   sizeof(gdth_getch_str))) {
1765                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
1766                 TRACE2(("Channel %d: %d phys. drives\n",
1767                         bus_no,chn->drive_cnt));
1768             }
1769             if (ha->raw[bus_no].pdev_cnt > 0) {
1770                 drl = (gdth_drlist_str *)ha->pscratch;
1771                 drl->sc_no = ha->raw[bus_no].local_no;
1772                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
1773                 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1774                                       SCSI_DR_LIST | L_CTRL_PATTERN,
1775                                       ha->raw[bus_no].address | INVALID_CHANNEL,
1776                                       sizeof(gdth_drlist_str))) {
1777                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
1778                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
1779                 } else {
1780                     ha->raw[bus_no].pdev_cnt = 0;
1781                 }
1782             }
1783         }
1784
1785         /* logical drives */
1786         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT,
1787                               INVALID_CHANNEL,sizeof(u32))) {
1788             drv_cnt = *(u32 *)ha->pscratch;
1789             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST,
1790                                   INVALID_CHANNEL,drv_cnt * sizeof(u32))) {
1791                 for (j = 0; j < drv_cnt; ++j) {
1792                     drv_no = ((u32 *)ha->pscratch)[j];
1793                     if (drv_no < MAX_LDRIVES) {
1794                         ha->hdr[drv_no].is_logdrv = TRUE;
1795                         TRACE2(("Drive %d is log. drive\n",drv_no));
1796                     }
1797                 }
1798             }
1799             alst = (gdth_arcdl_str *)ha->pscratch;
1800             alst->entries_avail = MAX_LDRIVES;
1801             alst->first_entry = 0;
1802             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
1803             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1804                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
1805                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
1806                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
1807                 for (j = 0; j < alst->entries_init; ++j) {
1808                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
1809                     ha->hdr[j].is_master = alst->list[j].is_master;
1810                     ha->hdr[j].is_parity = alst->list[j].is_parity;
1811                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
1812                     ha->hdr[j].master_no = alst->list[j].cd_handle;
1813                 }
1814             } else if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1815                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
1816                                          0, 35 * sizeof(gdth_alist_str))) {
1817                 for (j = 0; j < 35; ++j) {
1818                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
1819                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
1820                     ha->hdr[j].is_master = alst2->is_master;
1821                     ha->hdr[j].is_parity = alst2->is_parity;
1822                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
1823                     ha->hdr[j].master_no = alst2->cd_handle;
1824                 }
1825             }
1826         }
1827     }
1828
1829     /* initialize raw service */
1830     ha->raw_feat = 0;
1831     if (!force_dma32) {
1832         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_X_INIT_RAW, 0, 0, 0);
1833         if (ok)
1834             ha->raw_feat = GDT_64BIT;
1835     }
1836     if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1837         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0);
1838     if (!ok) {
1839         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1840                ha->hanum, ha->status);
1841         return 0;
1842     }
1843     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1844
1845     /* set/get features raw service (scatter/gather) */
1846     if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_SET_FEAT, SCATTER_GATHER,
1847                           0, 0)) {
1848         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1849         if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1850             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1851                     ha->info));
1852             ha->raw_feat |= (u16)ha->info;
1853         }
1854     }
1855
1856     /* set/get features cache service (equal to raw service) */
1857     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_SET_FEAT, 0,
1858                           SCATTER_GATHER,0)) {
1859         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1860         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1861             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1862                     ha->info));
1863             ha->cache_feat |= (u16)ha->info;
1864         }
1865     }
1866
1867     /* reserve drives for raw service */
1868     if (reserve_mode != 0) {
1869         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE_ALL,
1870                           reserve_mode == 1 ? 1 : 3, 0, 0);
1871         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1872                 ha->status));
1873     }
1874     for (i = 0; i < MAX_RES_ARGS; i += 4) {
1875         if (reserve_list[i] == ha->hanum && reserve_list[i+1] < ha->bus_cnt &&
1876             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
1877             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1878                     reserve_list[i], reserve_list[i+1],
1879                     reserve_list[i+2], reserve_list[i+3]));
1880             if (!gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE, 0,
1881                                    reserve_list[i+1], reserve_list[i+2] |
1882                                    (reserve_list[i+3] << 8))) {
1883                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1884                        ha->hanum, ha->status);
1885              }
1886         }
1887     }
1888
1889     /* Determine OEM string using IOCTL */
1890     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
1891     oemstr->params.ctl_version = 0x01;
1892     oemstr->params.buffer_size = sizeof(oemstr->text);
1893     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1894                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
1895                           sizeof(gdth_oem_str_ioctl))) {
1896         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1897         printk("GDT-HA %d: Vendor: %s Name: %s\n",
1898                ha->hanum, oemstr->text.oem_company_name, ha->binfo.type_string);
1899         /* Save the Host Drive inquiry data */
1900         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
1901                 sizeof(ha->oem_name));
1902     } else {
1903         /* Old method, based on PCI ID */
1904         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1905         printk("GDT-HA %d: Name: %s\n",
1906                ha->hanum, ha->binfo.type_string);
1907         if (ha->oem_id == OEM_ID_INTEL)
1908             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
1909         else
1910             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
1911     }
1912
1913     /* scanning for host drives */
1914     for (i = 0; i < cdev_cnt; ++i)
1915         gdth_analyse_hdrive(ha, i);
1916
1917     TRACE(("gdth_search_drives() OK\n"));
1918     return 1;
1919 }
1920
1921 static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive)
1922 {
1923     u32 drv_cyls;
1924     int drv_hds, drv_secs;
1925
1926     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive));
1927     if (hdrive >= MAX_HDRIVES)
1928         return 0;
1929
1930     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_INFO, hdrive, 0, 0))
1931         return 0;
1932     ha->hdr[hdrive].present = TRUE;
1933     ha->hdr[hdrive].size = ha->info;
1934
1935     /* evaluate mapping (sectors per head, heads per cylinder) */
1936     ha->hdr[hdrive].size &= ~SECS32;
1937     if (ha->info2 == 0) {
1938         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
1939     } else {
1940         drv_hds = ha->info2 & 0xff;
1941         drv_secs = (ha->info2 >> 8) & 0xff;
1942         drv_cyls = (u32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1943     }
1944     ha->hdr[hdrive].heads = (u8)drv_hds;
1945     ha->hdr[hdrive].secs  = (u8)drv_secs;
1946     /* round size */
1947     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
1948
1949     if (ha->cache_feat & GDT_64BIT) {
1950         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0)
1951             && ha->info2 != 0) {
1952             ha->hdr[hdrive].size = ((u64)ha->info2 << 32) | ha->info;
1953         }
1954     }
1955     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
1956             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
1957
1958     /* get informations about device */
1959     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) {
1960         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1961                 hdrive,ha->info));
1962         ha->hdr[hdrive].devtype = (u16)ha->info;
1963     }
1964
1965     /* cluster info */
1966     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_CLUST_INFO, hdrive, 0, 0)) {
1967         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1968                 hdrive,ha->info));
1969         if (!shared_access)
1970             ha->hdr[hdrive].cluster_type = (u8)ha->info;
1971     }
1972
1973     /* R/W attributes */
1974     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) {
1975         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1976                 hdrive,ha->info));
1977         ha->hdr[hdrive].rw_attribs = (u8)ha->info;
1978     }
1979
1980     return 1;
1981 }
1982
1983
1984 /* command queueing/sending functions */
1985
1986 static void gdth_putq(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 priority)
1987 {
1988     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
1989     register struct scsi_cmnd *pscp;
1990     register struct scsi_cmnd *nscp;
1991     unsigned long flags;
1992
1993     TRACE(("gdth_putq() priority %d\n",priority));
1994     spin_lock_irqsave(&ha->smp_lock, flags);
1995
1996     if (!cmndinfo->internal_command)
1997         cmndinfo->priority = priority;
1998
1999     if (ha->req_first==NULL) {
2000         ha->req_first = scp;                    /* queue was empty */
2001         scp->SCp.ptr = NULL;
2002     } else {                                    /* queue not empty */
2003         pscp = ha->req_first;
2004         nscp = (struct scsi_cmnd *)pscp->SCp.ptr;
2005         /* priority: 0-highest,..,0xff-lowest */
2006         while (nscp && gdth_cmnd_priv(nscp)->priority <= priority) {
2007             pscp = nscp;
2008             nscp = (struct scsi_cmnd *)pscp->SCp.ptr;
2009         }
2010         pscp->SCp.ptr = (char *)scp;
2011         scp->SCp.ptr  = (char *)nscp;
2012     }
2013     spin_unlock_irqrestore(&ha->smp_lock, flags);
2014
2015 #ifdef GDTH_STATISTICS
2016     flags = 0;
2017     for (nscp=ha->req_first; nscp; nscp=(struct scsi_cmnd*)nscp->SCp.ptr)
2018         ++flags;
2019     if (max_rq < flags) {
2020         max_rq = flags;
2021         TRACE3(("GDT: max_rq = %d\n",(u16)max_rq));
2022     }
2023 #endif
2024 }
2025
2026 static void gdth_next(gdth_ha_str *ha)
2027 {
2028     register struct scsi_cmnd *pscp;
2029     register struct scsi_cmnd *nscp;
2030     u8 b, t, l, firsttime;
2031     u8 this_cmd, next_cmd;
2032     unsigned long flags = 0;
2033     int cmd_index;
2034
2035     TRACE(("gdth_next() hanum %d\n", ha->hanum));
2036     if (!gdth_polling)
2037         spin_lock_irqsave(&ha->smp_lock, flags);
2038
2039     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2040     this_cmd = firsttime = TRUE;
2041     next_cmd = gdth_polling ? FALSE:TRUE;
2042     cmd_index = 0;
2043
2044     for (nscp = pscp = ha->req_first; nscp; nscp = (struct scsi_cmnd *)nscp->SCp.ptr) {
2045         struct gdth_cmndinfo *nscp_cmndinfo = gdth_cmnd_priv(nscp);
2046         if (nscp != pscp && nscp != (struct scsi_cmnd *)pscp->SCp.ptr)
2047             pscp = (struct scsi_cmnd *)pscp->SCp.ptr;
2048         if (!nscp_cmndinfo->internal_command) {
2049             b = nscp->device->channel;
2050             t = nscp->device->id;
2051             l = nscp->device->lun;
2052             if (nscp_cmndinfo->priority >= DEFAULT_PRI) {
2053                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2054                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2055                     continue;
2056             }
2057         } else
2058             b = t = l = 0;
2059
2060         if (firsttime) {
2061             if (gdth_test_busy(ha)) {        /* controller busy ? */
2062                 TRACE(("gdth_next() controller %d busy !\n", ha->hanum));
2063                 if (!gdth_polling) {
2064                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2065                     return;
2066                 }
2067                 while (gdth_test_busy(ha))
2068                     gdth_delay(1);
2069             }
2070             firsttime = FALSE;
2071         }
2072
2073         if (!nscp_cmndinfo->internal_command) {
2074         if (nscp_cmndinfo->phase == -1) {
2075             nscp_cmndinfo->phase = CACHESERVICE;           /* default: cache svc. */
2076             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2077                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2078                         b, t, l));
2079                 /* TEST_UNIT_READY -> set scan mode */
2080                 if ((ha->scan_mode & 0x0f) == 0) {
2081                     if (b == 0 && t == 0 && l == 0) {
2082                         ha->scan_mode |= 1;
2083                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2084                     }
2085                 } else if ((ha->scan_mode & 0x0f) == 1) {
2086                     if (b == 0 && ((t == 0 && l == 1) ||
2087                          (t == 1 && l == 0))) {
2088                         nscp_cmndinfo->OpCode = GDT_SCAN_START;
2089                         nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2090                             | SCSIRAWSERVICE;
2091                         ha->scan_mode = 0x12;
2092                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2093                                 ha->scan_mode));
2094                     } else {
2095                         ha->scan_mode &= 0x10;
2096                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2097                     }
2098                 } else if (ha->scan_mode == 0x12) {
2099                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2100                         nscp_cmndinfo->phase = SCSIRAWSERVICE;
2101                         nscp_cmndinfo->OpCode = GDT_SCAN_END;
2102                         ha->scan_mode &= 0x10;
2103                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2104                                 ha->scan_mode));
2105                     }
2106                 }
2107             }
2108             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2109                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2110                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2111                 /* always GDT_CLUST_INFO! */
2112                 nscp_cmndinfo->OpCode = GDT_CLUST_INFO;
2113             }
2114         }
2115         }
2116
2117         if (nscp_cmndinfo->OpCode != -1) {
2118             if ((nscp_cmndinfo->phase & 0xff) == CACHESERVICE) {
2119                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2120                     this_cmd = FALSE;
2121                 next_cmd = FALSE;
2122             } else if ((nscp_cmndinfo->phase & 0xff) == SCSIRAWSERVICE) {
2123                 if (!(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2124                     this_cmd = FALSE;
2125                 next_cmd = FALSE;
2126             } else {
2127                 memset((char*)nscp->sense_buffer,0,16);
2128                 nscp->sense_buffer[0] = 0x70;
2129                 nscp->sense_buffer[2] = NOT_READY;
2130                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2131                 if (!nscp_cmndinfo->wait_for_completion)
2132                     nscp_cmndinfo->wait_for_completion++;
2133                 else
2134                     gdth_scsi_done(nscp);
2135             }
2136         } else if (gdth_cmnd_priv(nscp)->internal_command) {
2137             if (!(cmd_index=gdth_special_cmd(ha, nscp)))
2138                 this_cmd = FALSE;
2139             next_cmd = FALSE;
2140         } else if (b != ha->virt_bus) {
2141             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2142                 !(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2143                 this_cmd = FALSE;
2144             else
2145                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2146         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2147             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2148                     nscp->cmnd[0], b, t, l));
2149             nscp->result = DID_BAD_TARGET << 16;
2150             if (!nscp_cmndinfo->wait_for_completion)
2151                 nscp_cmndinfo->wait_for_completion++;
2152             else
2153                 gdth_scsi_done(nscp);
2154         } else {
2155             switch (nscp->cmnd[0]) {
2156               case TEST_UNIT_READY:
2157               case INQUIRY:
2158               case REQUEST_SENSE:
2159               case READ_CAPACITY:
2160               case VERIFY:
2161               case START_STOP:
2162               case MODE_SENSE:
2163               case SERVICE_ACTION_IN_16:
2164                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2165                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2166                        nscp->cmnd[4],nscp->cmnd[5]));
2167                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2168                     /* return UNIT_ATTENTION */
2169                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2170                              nscp->cmnd[0], t));
2171                     ha->hdr[t].media_changed = FALSE;
2172                     memset((char*)nscp->sense_buffer,0,16);
2173                     nscp->sense_buffer[0] = 0x70;
2174                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2175                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2176                     if (!nscp_cmndinfo->wait_for_completion)
2177                         nscp_cmndinfo->wait_for_completion++;
2178                     else
2179                         gdth_scsi_done(nscp);
2180                 } else if (gdth_internal_cache_cmd(ha, nscp))
2181                     gdth_scsi_done(nscp);
2182                 break;
2183
2184               case ALLOW_MEDIUM_REMOVAL:
2185                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2186                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2187                        nscp->cmnd[4],nscp->cmnd[5]));
2188                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2189                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2190                     nscp->result = DID_OK << 16;
2191                     nscp->sense_buffer[0] = 0;
2192                     if (!nscp_cmndinfo->wait_for_completion)
2193                         nscp_cmndinfo->wait_for_completion++;
2194                     else
2195                         gdth_scsi_done(nscp);
2196                 } else {
2197                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2198                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2199                            nscp->cmnd[4],nscp->cmnd[3]));
2200                     if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2201                         this_cmd = FALSE;
2202                 }
2203                 break;
2204
2205               case RESERVE:
2206               case RELEASE:
2207                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2208                         "RESERVE" : "RELEASE"));
2209                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2210                     this_cmd = FALSE;
2211                 break;
2212
2213               case READ_6:
2214               case WRITE_6:
2215               case READ_10:
2216               case WRITE_10:
2217               case READ_16:
2218               case WRITE_16:
2219                 if (ha->hdr[t].media_changed) {
2220                     /* return UNIT_ATTENTION */
2221                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2222                              nscp->cmnd[0], t));
2223                     ha->hdr[t].media_changed = FALSE;
2224                     memset((char*)nscp->sense_buffer,0,16);
2225                     nscp->sense_buffer[0] = 0x70;
2226                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2227                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2228                     if (!nscp_cmndinfo->wait_for_completion)
2229                         nscp_cmndinfo->wait_for_completion++;
2230                     else
2231                         gdth_scsi_done(nscp);
2232                 } else if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2233                     this_cmd = FALSE;
2234                 break;
2235
2236               default:
2237                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2238                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2239                         nscp->cmnd[4],nscp->cmnd[5]));
2240                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2241                        ha->hanum, nscp->cmnd[0]);
2242                 nscp->result = DID_ABORT << 16;
2243                 if (!nscp_cmndinfo->wait_for_completion)
2244                     nscp_cmndinfo->wait_for_completion++;
2245                 else
2246                     gdth_scsi_done(nscp);
2247                 break;
2248             }
2249         }
2250
2251         if (!this_cmd)
2252             break;
2253         if (nscp == ha->req_first)
2254             ha->req_first = pscp = (struct scsi_cmnd *)nscp->SCp.ptr;
2255         else
2256             pscp->SCp.ptr = nscp->SCp.ptr;
2257         if (!next_cmd)
2258             break;
2259     }
2260
2261     if (ha->cmd_cnt > 0) {
2262         gdth_release_event(ha);
2263     }
2264
2265     if (!gdth_polling)
2266         spin_unlock_irqrestore(&ha->smp_lock, flags);
2267
2268     if (gdth_polling && ha->cmd_cnt > 0) {
2269         if (!gdth_wait(ha, cmd_index, POLL_TIMEOUT))
2270             printk("GDT-HA %d: Command %d timed out !\n",
2271                    ha->hanum, cmd_index);
2272     }
2273 }
2274
2275 /*
2276  * gdth_copy_internal_data() - copy to/from a buffer onto a scsi_cmnd's
2277  * buffers, kmap_atomic() as needed.
2278  */
2279 static void gdth_copy_internal_data(gdth_ha_str *ha, struct scsi_cmnd *scp,
2280                                     char *buffer, u16 count)
2281 {
2282     u16 cpcount,i, max_sg = scsi_sg_count(scp);
2283     u16 cpsum,cpnow;
2284     struct scatterlist *sl;
2285     char *address;
2286
2287     cpcount = min_t(u16, count, scsi_bufflen(scp));
2288
2289     if (cpcount) {
2290         cpsum=0;
2291         scsi_for_each_sg(scp, sl, max_sg, i) {
2292             unsigned long flags;
2293             cpnow = (u16)sl->length;
2294             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2295                           cpnow, cpsum, cpcount, scsi_bufflen(scp)));
2296             if (cpsum+cpnow > cpcount)
2297                 cpnow = cpcount - cpsum;
2298             cpsum += cpnow;
2299             if (!sg_page(sl)) {
2300                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2301                        ha->hanum);
2302                 return;
2303             }
2304             local_irq_save(flags);
2305             address = kmap_atomic(sg_page(sl)) + sl->offset;
2306             memcpy(address, buffer, cpnow);
2307             flush_dcache_page(sg_page(sl));
2308             kunmap_atomic(address);
2309             local_irq_restore(flags);
2310             if (cpsum == cpcount)
2311                 break;
2312             buffer += cpnow;
2313         }
2314     } else if (count) {
2315         printk("GDT-HA %d: SCSI command with no buffers but data transfer expected!\n",
2316                ha->hanum);
2317         WARN_ON(1);
2318     }
2319 }
2320
2321 static int gdth_internal_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp)
2322 {
2323     u8 t;
2324     gdth_inq_data inq;
2325     gdth_rdcap_data rdc;
2326     gdth_sense_data sd;
2327     gdth_modep_data mpd;
2328     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2329
2330     t  = scp->device->id;
2331     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2332            scp->cmnd[0],t));
2333
2334     scp->result = DID_OK << 16;
2335     scp->sense_buffer[0] = 0;
2336
2337     switch (scp->cmnd[0]) {
2338       case TEST_UNIT_READY:
2339       case VERIFY:
2340       case START_STOP:
2341         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2342         break;
2343
2344       case INQUIRY:
2345         TRACE2(("Inquiry hdrive %d devtype %d\n",
2346                 t,ha->hdr[t].devtype));
2347         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2348         /* you can here set all disks to removable, if you want to do
2349            a flush using the ALLOW_MEDIUM_REMOVAL command */
2350         inq.modif_rmb = 0x00;
2351         if ((ha->hdr[t].devtype & 1) ||
2352             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2353             inq.modif_rmb = 0x80;
2354         inq.version   = 2;
2355         inq.resp_aenc = 2;
2356         inq.add_length= 32;
2357         strcpy(inq.vendor,ha->oem_name);
2358         snprintf(inq.product, sizeof(inq.product), "Host Drive  #%02d",t);
2359         strcpy(inq.revision,"   ");
2360         gdth_copy_internal_data(ha, scp, (char*)&inq, sizeof(gdth_inq_data));
2361         break;
2362
2363       case REQUEST_SENSE:
2364         TRACE2(("Request sense hdrive %d\n",t));
2365         sd.errorcode = 0x70;
2366         sd.segno     = 0x00;
2367         sd.key       = NO_SENSE;
2368         sd.info      = 0;
2369         sd.add_length= 0;
2370         gdth_copy_internal_data(ha, scp, (char*)&sd, sizeof(gdth_sense_data));
2371         break;
2372
2373       case MODE_SENSE:
2374         TRACE2(("Mode sense hdrive %d\n",t));
2375         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2376         mpd.hd.data_length = sizeof(gdth_modep_data);
2377         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2378         mpd.hd.bd_length   = sizeof(mpd.bd);
2379         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2380         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2381         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2382         gdth_copy_internal_data(ha, scp, (char*)&mpd, sizeof(gdth_modep_data));
2383         break;
2384
2385       case READ_CAPACITY:
2386         TRACE2(("Read capacity hdrive %d\n",t));
2387         if (ha->hdr[t].size > (u64)0xffffffff)
2388             rdc.last_block_no = 0xffffffff;
2389         else
2390             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2391         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2392         gdth_copy_internal_data(ha, scp, (char*)&rdc, sizeof(gdth_rdcap_data));
2393         break;
2394
2395       case SERVICE_ACTION_IN_16:
2396         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2397             (ha->cache_feat & GDT_64BIT)) {
2398             gdth_rdcap16_data rdc16;
2399
2400             TRACE2(("Read capacity (16) hdrive %d\n",t));
2401             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2402             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2403             gdth_copy_internal_data(ha, scp, (char*)&rdc16,
2404                                                  sizeof(gdth_rdcap16_data));
2405         } else {
2406             scp->result = DID_ABORT << 16;
2407         }
2408         break;
2409
2410       default:
2411         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2412         break;
2413     }
2414
2415     if (!cmndinfo->wait_for_completion)
2416         cmndinfo->wait_for_completion++;
2417     else
2418         return 1;
2419
2420     return 0;
2421 }
2422
2423 static int gdth_fill_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp,
2424                                u16 hdrive)
2425 {
2426     register gdth_cmd_str *cmdp;
2427     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2428     u32 cnt, blockcnt;
2429     u64 no, blockno;
2430     int i, cmd_index, read_write, sgcnt, mode64;
2431
2432     cmdp = ha->pccb;
2433     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2434                  scp->cmnd[0],scp->cmd_len,hdrive));
2435
2436     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2437         return 0;
2438
2439     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2440     /* test for READ_16, WRITE_16 if !mode64 ? ---
2441        not required, should not occur due to error return on
2442        READ_CAPACITY_16 */
2443
2444     cmdp->Service = CACHESERVICE;
2445     cmdp->RequestBuffer = scp;
2446     /* search free command index */
2447     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2448         TRACE(("GDT: No free command index found\n"));
2449         return 0;
2450     }
2451     /* if it's the first command, set command semaphore */
2452     if (ha->cmd_cnt == 0)
2453         gdth_set_sema0(ha);
2454
2455     /* fill command */
2456     read_write = 0;
2457     if (cmndinfo->OpCode != -1)
2458         cmdp->OpCode = cmndinfo->OpCode;   /* special cache cmd. */
2459     else if (scp->cmnd[0] == RESERVE)
2460         cmdp->OpCode = GDT_RESERVE_DRV;
2461     else if (scp->cmnd[0] == RELEASE)
2462         cmdp->OpCode = GDT_RELEASE_DRV;
2463     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2464         if (scp->cmnd[4] & 1)                   /* prevent ? */
2465             cmdp->OpCode = GDT_MOUNT;
2466         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2467             cmdp->OpCode = GDT_UNMOUNT;
2468         else
2469             cmdp->OpCode = GDT_FLUSH;
2470     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2471                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2472     ) {
2473         read_write = 1;
2474         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2475                                    (ha->cache_feat & GDT_WR_THROUGH)))
2476             cmdp->OpCode = GDT_WRITE_THR;
2477         else
2478             cmdp->OpCode = GDT_WRITE;
2479     } else {
2480         read_write = 2;
2481         cmdp->OpCode = GDT_READ;
2482     }
2483
2484     cmdp->BoardNode = LOCALBOARD;
2485     if (mode64) {
2486         cmdp->u.cache64.DeviceNo = hdrive;
2487         cmdp->u.cache64.BlockNo  = 1;
2488         cmdp->u.cache64.sg_canz  = 0;
2489     } else {
2490         cmdp->u.cache.DeviceNo = hdrive;
2491         cmdp->u.cache.BlockNo  = 1;
2492         cmdp->u.cache.sg_canz  = 0;
2493     }
2494
2495     if (read_write) {
2496         if (scp->cmd_len == 16) {
2497             memcpy(&no, &scp->cmnd[2], sizeof(u64));
2498             blockno = be64_to_cpu(no);
2499             memcpy(&cnt, &scp->cmnd[10], sizeof(u32));
2500             blockcnt = be32_to_cpu(cnt);
2501         } else if (scp->cmd_len == 10) {
2502             memcpy(&no, &scp->cmnd[2], sizeof(u32));
2503             blockno = be32_to_cpu(no);
2504             memcpy(&cnt, &scp->cmnd[7], sizeof(u16));
2505             blockcnt = be16_to_cpu(cnt);
2506         } else {
2507             memcpy(&no, &scp->cmnd[0], sizeof(u32));
2508             blockno = be32_to_cpu(no) & 0x001fffffUL;
2509             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2510         }
2511         if (mode64) {
2512             cmdp->u.cache64.BlockNo = blockno;
2513             cmdp->u.cache64.BlockCnt = blockcnt;
2514         } else {
2515             cmdp->u.cache.BlockNo = (u32)blockno;
2516             cmdp->u.cache.BlockCnt = blockcnt;
2517         }
2518
2519         if (scsi_bufflen(scp)) {
2520             cmndinfo->dma_dir = (read_write == 1 ?
2521                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2522             sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
2523                                cmndinfo->dma_dir);
2524             if (mode64) {
2525                 struct scatterlist *sl;
2526
2527                 cmdp->u.cache64.DestAddr= (u64)-1;
2528                 cmdp->u.cache64.sg_canz = sgcnt;
2529                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2530                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2531 #ifdef GDTH_DMA_STATISTICS
2532                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (u64)0xffffffff)
2533                         ha->dma64_cnt++;
2534                     else
2535                         ha->dma32_cnt++;
2536 #endif
2537                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2538                 }
2539             } else {
2540                 struct scatterlist *sl;
2541
2542                 cmdp->u.cache.DestAddr= 0xffffffff;
2543                 cmdp->u.cache.sg_canz = sgcnt;
2544                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2545                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2546 #ifdef GDTH_DMA_STATISTICS
2547                     ha->dma32_cnt++;
2548 #endif
2549                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2550                 }
2551             }
2552
2553 #ifdef GDTH_STATISTICS
2554             if (max_sg < (u32)sgcnt) {
2555                 max_sg = (u32)sgcnt;
2556                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2557             }
2558 #endif
2559
2560         }
2561     }
2562     /* evaluate command size, check space */
2563     if (mode64) {
2564         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2565                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2566                cmdp->u.cache64.sg_lst[0].sg_ptr,
2567                cmdp->u.cache64.sg_lst[0].sg_len));
2568         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2569                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2570         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2571             (u16)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2572     } else {
2573         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2574                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2575                cmdp->u.cache.sg_lst[0].sg_ptr,
2576                cmdp->u.cache.sg_lst[0].sg_len));
2577         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2578                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2579         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2580             (u16)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2581     }
2582     if (ha->cmd_len & 3)
2583         ha->cmd_len += (4 - (ha->cmd_len & 3));
2584
2585     if (ha->cmd_cnt > 0) {
2586         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2587             ha->ic_all_size) {
2588             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2589             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2590             return 0;
2591         }
2592     }
2593
2594     /* copy command */
2595     gdth_copy_command(ha);
2596     return cmd_index;
2597 }
2598
2599 static int gdth_fill_raw_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 b)
2600 {
2601     register gdth_cmd_str *cmdp;
2602     u16 i;
2603     dma_addr_t sense_paddr;
2604     int cmd_index, sgcnt, mode64;
2605     u8 t,l;
2606     struct page *page;
2607     unsigned long offset;
2608     struct gdth_cmndinfo *cmndinfo;
2609
2610     t = scp->device->id;
2611     l = scp->device->lun;
2612     cmdp = ha->pccb;
2613     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2614            scp->cmnd[0],b,t,l));
2615
2616     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2617         return 0;
2618
2619     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2620
2621     cmdp->Service = SCSIRAWSERVICE;
2622     cmdp->RequestBuffer = scp;
2623     /* search free command index */
2624     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2625         TRACE(("GDT: No free command index found\n"));
2626         return 0;
2627     }
2628     /* if it's the first command, set command semaphore */
2629     if (ha->cmd_cnt == 0)
2630         gdth_set_sema0(ha);
2631
2632     cmndinfo = gdth_cmnd_priv(scp);
2633     /* fill command */
2634     if (cmndinfo->OpCode != -1) {
2635         cmdp->OpCode           = cmndinfo->OpCode; /* special raw cmd. */
2636         cmdp->BoardNode        = LOCALBOARD;
2637         if (mode64) {
2638             cmdp->u.raw64.direction = (cmndinfo->phase >> 8);
2639             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2640                     cmdp->OpCode, cmdp->u.raw64.direction));
2641             /* evaluate command size */
2642             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2643         } else {
2644             cmdp->u.raw.direction  = (cmndinfo->phase >> 8);
2645             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2646                     cmdp->OpCode, cmdp->u.raw.direction));
2647             /* evaluate command size */
2648             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2649         }
2650
2651     } else {
2652         page = virt_to_page(scp->sense_buffer);
2653         offset = (unsigned long)scp->sense_buffer & ~PAGE_MASK;
2654         sense_paddr = pci_map_page(ha->pdev,page,offset,
2655                                    16,PCI_DMA_FROMDEVICE);
2656
2657         cmndinfo->sense_paddr  = sense_paddr;
2658         cmdp->OpCode           = GDT_WRITE;             /* always */
2659         cmdp->BoardNode        = LOCALBOARD;
2660         if (mode64) {
2661             cmdp->u.raw64.reserved   = 0;
2662             cmdp->u.raw64.mdisc_time = 0;
2663             cmdp->u.raw64.mcon_time  = 0;
2664             cmdp->u.raw64.clen       = scp->cmd_len;
2665             cmdp->u.raw64.target     = t;
2666             cmdp->u.raw64.lun        = l;
2667             cmdp->u.raw64.bus        = b;
2668             cmdp->u.raw64.priority   = 0;
2669             cmdp->u.raw64.sdlen      = scsi_bufflen(scp);
2670             cmdp->u.raw64.sense_len  = 16;
2671             cmdp->u.raw64.sense_data = sense_paddr;
2672             cmdp->u.raw64.direction  =
2673                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2674             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2675             cmdp->u.raw64.sg_ranz    = 0;
2676         } else {
2677             cmdp->u.raw.reserved   = 0;
2678             cmdp->u.raw.mdisc_time = 0;
2679             cmdp->u.raw.mcon_time  = 0;
2680             cmdp->u.raw.clen       = scp->cmd_len;
2681             cmdp->u.raw.target     = t;
2682             cmdp->u.raw.lun        = l;
2683             cmdp->u.raw.bus        = b;
2684             cmdp->u.raw.priority   = 0;
2685             cmdp->u.raw.link_p     = 0;
2686             cmdp->u.raw.sdlen      = scsi_bufflen(scp);
2687             cmdp->u.raw.sense_len  = 16;
2688             cmdp->u.raw.sense_data = sense_paddr;
2689             cmdp->u.raw.direction  =
2690                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2691             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2692             cmdp->u.raw.sg_ranz    = 0;
2693         }
2694
2695         if (scsi_bufflen(scp)) {
2696             cmndinfo->dma_dir = PCI_DMA_BIDIRECTIONAL;
2697             sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
2698                                cmndinfo->dma_dir);
2699             if (mode64) {
2700                 struct scatterlist *sl;
2701
2702                 cmdp->u.raw64.sdata = (u64)-1;
2703                 cmdp->u.raw64.sg_ranz = sgcnt;
2704                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2705                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2706 #ifdef GDTH_DMA_STATISTICS
2707                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (u64)0xffffffff)
2708                         ha->dma64_cnt++;
2709                     else
2710                         ha->dma32_cnt++;
2711 #endif
2712                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
2713                 }
2714             } else {
2715                 struct scatterlist *sl;
2716
2717                 cmdp->u.raw.sdata = 0xffffffff;
2718                 cmdp->u.raw.sg_ranz = sgcnt;
2719                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2720                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
2721 #ifdef GDTH_DMA_STATISTICS
2722                     ha->dma32_cnt++;
2723 #endif
2724                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
2725                 }
2726             }
2727
2728 #ifdef GDTH_STATISTICS
2729             if (max_sg < sgcnt) {
2730                 max_sg = sgcnt;
2731                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
2732             }
2733 #endif
2734
2735         }
2736         if (mode64) {
2737             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2738                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
2739                    cmdp->u.raw64.sg_lst[0].sg_ptr,
2740                    cmdp->u.raw64.sg_lst[0].sg_len));
2741             /* evaluate command size */
2742             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2743                 (u16)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2744         } else {
2745             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2746                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2747                    cmdp->u.raw.sg_lst[0].sg_ptr,
2748                    cmdp->u.raw.sg_lst[0].sg_len));
2749             /* evaluate command size */
2750             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2751                 (u16)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2752         }
2753     }
2754     /* check space */
2755     if (ha->cmd_len & 3)
2756         ha->cmd_len += (4 - (ha->cmd_len & 3));
2757
2758     if (ha->cmd_cnt > 0) {
2759         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2760             ha->ic_all_size) {
2761             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2762             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2763             return 0;
2764         }
2765     }
2766
2767     /* copy command */
2768     gdth_copy_command(ha);
2769     return cmd_index;
2770 }
2771
2772 static int gdth_special_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp)
2773 {
2774     register gdth_cmd_str *cmdp;
2775     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2776     int cmd_index;
2777
2778     cmdp= ha->pccb;
2779     TRACE2(("gdth_special_cmd(): "));
2780
2781     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2782         return 0;
2783
2784     *cmdp = *cmndinfo->internal_cmd_str;
2785     cmdp->RequestBuffer = scp;
2786
2787     /* search free command index */
2788     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2789         TRACE(("GDT: No free command index found\n"));
2790         return 0;
2791     }
2792
2793     /* if it's the first command, set command semaphore */
2794     if (ha->cmd_cnt == 0)
2795        gdth_set_sema0(ha);
2796
2797     /* evaluate command size, check space */
2798     if (cmdp->OpCode == GDT_IOCTL) {
2799         TRACE2(("IOCTL\n"));
2800         ha->cmd_len =
2801             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(u64);
2802     } else if (cmdp->Service == CACHESERVICE) {
2803         TRACE2(("cache command %d\n",cmdp->OpCode));
2804         if (ha->cache_feat & GDT_64BIT)
2805             ha->cmd_len =
2806                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
2807         else
2808             ha->cmd_len =
2809                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
2810     } else if (cmdp->Service == SCSIRAWSERVICE) {
2811         TRACE2(("raw command %d\n",cmdp->OpCode));
2812         if (ha->raw_feat & GDT_64BIT)
2813             ha->cmd_len =
2814                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
2815         else
2816             ha->cmd_len =
2817                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
2818     }
2819
2820     if (ha->cmd_len & 3)
2821         ha->cmd_len += (4 - (ha->cmd_len & 3));
2822
2823     if (ha->cmd_cnt > 0) {
2824         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2825             ha->ic_all_size) {
2826             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2827             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2828             return 0;
2829         }
2830     }
2831
2832     /* copy command */
2833     gdth_copy_command(ha);
2834     return cmd_index;
2835 }
2836
2837
2838 /* Controller event handling functions */
2839 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
2840                                       u16 idx, gdth_evt_data *evt)
2841 {
2842     gdth_evt_str *e;
2843
2844     /* no GDTH_LOCK_HA() ! */
2845     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
2846     if (source == 0)                        /* no source -> no event */
2847         return NULL;
2848
2849     if (ebuffer[elastidx].event_source == source &&
2850         ebuffer[elastidx].event_idx == idx &&
2851         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
2852             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
2853             (char *)&evt->eu, evt->size)) ||
2854         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
2855             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
2856             (char *)&evt->event_string)))) {
2857         e = &ebuffer[elastidx];
2858         e->last_stamp = (u32)ktime_get_real_seconds();
2859         ++e->same_count;
2860     } else {
2861         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
2862             ++elastidx;
2863             if (elastidx == MAX_EVENTS)
2864                 elastidx = 0;
2865             if (elastidx == eoldidx) {              /* reached mark ? */
2866                 ++eoldidx;
2867                 if (eoldidx == MAX_EVENTS)
2868                     eoldidx = 0;
2869             }
2870         }
2871         e = &ebuffer[elastidx];
2872         e->event_source = source;
2873         e->event_idx = idx;
2874         e->first_stamp = e->last_stamp = (u32)ktime_get_real_seconds();
2875         e->same_count = 1;
2876         e->event_data = *evt;
2877         e->application = 0;
2878     }
2879     return e;
2880 }
2881
2882 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2883 {
2884     gdth_evt_str *e;
2885     int eindex;
2886     unsigned long flags;
2887
2888     TRACE2(("gdth_read_event() handle %d\n", handle));
2889     spin_lock_irqsave(&ha->smp_lock, flags);
2890     if (handle == -1)
2891         eindex = eoldidx;
2892     else
2893         eindex = handle;
2894     estr->event_source = 0;
2895
2896     if (eindex < 0 || eindex >= MAX_EVENTS) {
2897         spin_unlock_irqrestore(&ha->smp_lock, flags);
2898         return eindex;
2899     }
2900     e = &ebuffer[eindex];
2901     if (e->event_source != 0) {
2902         if (eindex != elastidx) {
2903             if (++eindex == MAX_EVENTS)
2904                 eindex = 0;
2905         } else {
2906             eindex = -1;
2907         }
2908         memcpy(estr, e, sizeof(gdth_evt_str));
2909     }
2910     spin_unlock_irqrestore(&ha->smp_lock, flags);
2911     return eindex;
2912 }
2913
2914 static void gdth_readapp_event(gdth_ha_str *ha,
2915                                u8 application, gdth_evt_str *estr)
2916 {
2917     gdth_evt_str *e;
2918     int eindex;
2919     unsigned long flags;
2920     u8 found = FALSE;
2921
2922     TRACE2(("gdth_readapp_event() app. %d\n", application));
2923     spin_lock_irqsave(&ha->smp_lock, flags);
2924     eindex = eoldidx;
2925     for (;;) {
2926         e = &ebuffer[eindex];
2927         if (e->event_source == 0)
2928             break;
2929         if ((e->application & application) == 0) {
2930             e->application |= application;
2931             found = TRUE;
2932             break;
2933         }
2934         if (eindex == elastidx)
2935             break;
2936         if (++eindex == MAX_EVENTS)
2937             eindex = 0;
2938     }
2939     if (found)
2940         memcpy(estr, e, sizeof(gdth_evt_str));
2941     else
2942         estr->event_source = 0;
2943     spin_unlock_irqrestore(&ha->smp_lock, flags);
2944 }
2945
2946 static void gdth_clear_events(void)
2947 {
2948     TRACE(("gdth_clear_events()"));
2949
2950     eoldidx = elastidx = 0;
2951     ebuffer[0].event_source = 0;
2952 }
2953
2954
2955 /* SCSI interface functions */
2956
2957 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
2958                                     int gdth_from_wait, int* pIndex)
2959 {
2960     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
2961     gdt6_dpram_str __iomem *dp6_ptr;
2962     gdt2_dpram_str __iomem *dp2_ptr;
2963     struct scsi_cmnd *scp;
2964     int rval, i;
2965     u8 IStatus;
2966     u16 Service;
2967     unsigned long flags = 0;
2968 #ifdef INT_COAL
2969     int coalesced = FALSE;
2970     int next = FALSE;
2971     gdth_coal_status *pcs = NULL;
2972     int act_int_coal = 0;
2973 #endif
2974
2975     TRACE(("gdth_interrupt() IRQ %d\n", ha->irq));
2976
2977     /* if polling and not from gdth_wait() -> return */
2978     if (gdth_polling) {
2979         if (!gdth_from_wait) {
2980             return IRQ_HANDLED;
2981         }
2982     }
2983
2984     if (!gdth_polling)
2985         spin_lock_irqsave(&ha->smp_lock, flags);
2986
2987     /* search controller */
2988     IStatus = gdth_get_status(ha);
2989     if (IStatus == 0) {
2990         /* spurious interrupt */
2991         if (!gdth_polling)
2992             spin_unlock_irqrestore(&ha->smp_lock, flags);
2993         return IRQ_HANDLED;
2994     }
2995
2996 #ifdef GDTH_STATISTICS
2997     ++act_ints;
2998 #endif
2999
3000 #ifdef INT_COAL
3001     /* See if the fw is returning coalesced status */
3002     if (IStatus == COALINDEX) {
3003         /* Coalesced status.  Setup the initial status
3004            buffer pointer and flags */
3005         pcs = ha->coal_stat;
3006         coalesced = TRUE;
3007         next = TRUE;
3008     }
3009
3010     do {
3011         if (coalesced) {
3012             /* For coalesced requests all status
3013                information is found in the status buffer */
3014             IStatus = (u8)(pcs->status & 0xff);
3015         }
3016 #endif
3017
3018         if (ha->type == GDT_EISA) {
3019             if (IStatus & 0x80) {                       /* error flag */
3020                 IStatus &= ~0x80;
3021                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3022                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3023             } else                                      /* no error */
3024                 ha->status = S_OK;
3025             ha->info = inl(ha->bmic + MAILBOXREG+12);
3026             ha->service = inw(ha->bmic + MAILBOXREG+10);
3027             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3028
3029             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3030             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3031         } else if (ha->type == GDT_ISA) {
3032             dp2_ptr = ha->brd;
3033             if (IStatus & 0x80) {                       /* error flag */
3034                 IStatus &= ~0x80;
3035                 ha->status = readw(&dp2_ptr->u.ic.Status);
3036                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3037             } else                                      /* no error */
3038                 ha->status = S_OK;
3039             ha->info = readl(&dp2_ptr->u.ic.Info[0]);
3040             ha->service = readw(&dp2_ptr->u.ic.Service);
3041             ha->info2 = readl(&dp2_ptr->u.ic.Info[1]);
3042
3043             writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3044             writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3045             writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3046         } else if (ha->type == GDT_PCI) {
3047             dp6_ptr = ha->brd;
3048             if (IStatus & 0x80) {                       /* error flag */
3049                 IStatus &= ~0x80;
3050                 ha->status = readw(&dp6_ptr->u.ic.Status);
3051                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3052             } else                                      /* no error */
3053                 ha->status = S_OK;
3054             ha->info = readl(&dp6_ptr->u.ic.Info[0]);
3055             ha->service = readw(&dp6_ptr->u.ic.Service);
3056             ha->info2 = readl(&dp6_ptr->u.ic.Info[1]);
3057
3058             writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3059             writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3060             writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3061         } else if (ha->type == GDT_PCINEW) {
3062             if (IStatus & 0x80) {                       /* error flag */
3063                 IStatus &= ~0x80;
3064                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3065                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3066             } else
3067                 ha->status = S_OK;
3068             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3069             ha->service = inw(PTR2USHORT(&ha->plx->service));
3070             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3071
3072             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3073             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3074         } else if (ha->type == GDT_PCIMPR) {
3075             dp6m_ptr = ha->brd;
3076             if (IStatus & 0x80) {                       /* error flag */
3077                 IStatus &= ~0x80;
3078 #ifdef INT_COAL
3079                 if (coalesced)
3080                     ha->status = pcs->ext_status & 0xffff;
3081                 else
3082 #endif
3083                     ha->status = readw(&dp6m_ptr->i960r.status);
3084                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3085             } else                                      /* no error */
3086                 ha->status = S_OK;
3087 #ifdef INT_COAL
3088             /* get information */
3089             if (coalesced) {
3090                 ha->info = pcs->info0;
3091                 ha->info2 = pcs->info1;
3092                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3093             } else
3094 #endif
3095             {
3096                 ha->info = readl(&dp6m_ptr->i960r.info[0]);
3097                 ha->service = readw(&dp6m_ptr->i960r.service);
3098                 ha->info2 = readl(&dp6m_ptr->i960r.info[1]);
3099             }
3100             /* event string */
3101             if (IStatus == ASYNCINDEX) {
3102                 if (ha->service != SCREENSERVICE &&
3103                     (ha->fw_vers & 0xff) >= 0x1a) {
3104                     ha->dvr.severity = readb
3105                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3106                     for (i = 0; i < 256; ++i) {
3107                         ha->dvr.event_string[i] = readb
3108                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3109                         if (ha->dvr.event_string[i] == 0)
3110                             break;
3111                     }
3112                 }
3113             }
3114 #ifdef INT_COAL
3115             /* Make sure that non coalesced interrupts get cleared
3116                before being handled by gdth_async_event/gdth_sync_event */
3117             if (!coalesced)
3118 #endif
3119             {
3120                 writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3121                 writeb(0, &dp6m_ptr->i960r.sema1_reg);
3122             }
3123         } else {
3124             TRACE2(("gdth_interrupt() unknown controller type\n"));
3125             if (!gdth_polling)
3126                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3127             return IRQ_HANDLED;
3128         }
3129
3130         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3131                IStatus,ha->status,ha->info));
3132
3133         if (gdth_from_wait) {
3134             *pIndex = (int)IStatus;
3135         }
3136
3137         if (IStatus == ASYNCINDEX) {
3138             TRACE2(("gdth_interrupt() async. event\n"));
3139             gdth_async_event(ha);
3140             if (!gdth_polling)
3141                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3142             gdth_next(ha);
3143             return IRQ_HANDLED;
3144         }
3145
3146         if (IStatus == SPEZINDEX) {
3147             TRACE2(("Service unknown or not initialized !\n"));
3148             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3149             ha->dvr.eu.driver.ionode = ha->hanum;
3150             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3151             if (!gdth_polling)
3152                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3153             return IRQ_HANDLED;
3154         }
3155         scp     = ha->cmd_tab[IStatus-2].cmnd;
3156         Service = ha->cmd_tab[IStatus-2].service;
3157         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3158         if (scp == UNUSED_CMND) {
3159             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3160             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3161             ha->dvr.eu.driver.ionode = ha->hanum;
3162             ha->dvr.eu.driver.index = IStatus;
3163             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3164             if (!gdth_polling)
3165                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3166             return IRQ_HANDLED;
3167         }
3168         if (scp == INTERNAL_CMND) {
3169             TRACE(("gdth_interrupt() answer to internal command\n"));
3170             if (!gdth_polling)
3171                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3172             return IRQ_HANDLED;
3173         }
3174
3175         TRACE(("gdth_interrupt() sync. status\n"));
3176         rval = gdth_sync_event(ha,Service,IStatus,scp);
3177         if (!gdth_polling)
3178             spin_unlock_irqrestore(&ha->smp_lock, flags);
3179         if (rval == 2) {
3180             gdth_putq(ha, scp, gdth_cmnd_priv(scp)->priority);
3181         } else if (rval == 1) {
3182             gdth_scsi_done(scp);
3183         }
3184
3185 #ifdef INT_COAL
3186         if (coalesced) {
3187             /* go to the next status in the status buffer */
3188             ++pcs;
3189 #ifdef GDTH_STATISTICS
3190             ++act_int_coal;
3191             if (act_int_coal > max_int_coal) {
3192                 max_int_coal = act_int_coal;
3193                 printk("GDT: max_int_coal = %d\n",(u16)max_int_coal);
3194             }
3195 #endif
3196             /* see if there is another status */
3197             if (pcs->status == 0)
3198                 /* Stop the coalesce loop */
3199                 next = FALSE;
3200         }
3201     } while (next);
3202
3203     /* coalescing only for new GDT_PCIMPR controllers available */
3204     if (ha->type == GDT_PCIMPR && coalesced) {
3205         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3206         writeb(0, &dp6m_ptr->i960r.sema1_reg);
3207     }
3208 #endif
3209
3210     gdth_next(ha);
3211     return IRQ_HANDLED;
3212 }
3213
3214 static irqreturn_t gdth_interrupt(int irq, void *dev_id)
3215 {
3216         gdth_ha_str *ha = dev_id;
3217
3218         return __gdth_interrupt(ha, false, NULL);
3219 }
3220
3221 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
3222                                                               struct scsi_cmnd *scp)
3223 {
3224     gdth_msg_str *msg;
3225     gdth_cmd_str *cmdp;
3226     u8 b, t;
3227     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3228
3229     cmdp = ha->pccb;
3230     TRACE(("gdth_sync_event() serv %d status %d\n",
3231            service,ha->status));
3232
3233     if (service == SCREENSERVICE) {
3234         msg  = ha->pmsg;
3235         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3236                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3237         if (msg->msg_len > MSGLEN+1)
3238             msg->msg_len = MSGLEN+1;
3239         if (msg->msg_len)
3240             if (!(msg->msg_answer && msg->msg_ext)) {
3241                 msg->msg_text[msg->msg_len] = '\0';
3242                 printk("%s",msg->msg_text);
3243             }
3244
3245         if (msg->msg_ext && !msg->msg_answer) {
3246             while (gdth_test_busy(ha))
3247                 gdth_delay(0);
3248             cmdp->Service       = SCREENSERVICE;
3249             cmdp->RequestBuffer = SCREEN_CMND;
3250             gdth_get_cmd_index(ha);
3251             gdth_set_sema0(ha);
3252             cmdp->OpCode        = GDT_READ;
3253             cmdp->BoardNode     = LOCALBOARD;
3254             cmdp->u.screen.reserved  = 0;
3255             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3256             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3257             ha->cmd_offs_dpmem = 0;
3258             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3259                 + sizeof(u64);
3260             ha->cmd_cnt = 0;
3261             gdth_copy_command(ha);
3262             gdth_release_event(ha);
3263             return 0;
3264         }
3265
3266         if (msg->msg_answer && msg->msg_alen) {
3267             /* default answers (getchar() not possible) */
3268             if (msg->msg_alen == 1) {
3269                 msg->msg_alen = 0;
3270                 msg->msg_len = 1;
3271                 msg->msg_text[0] = 0;
3272             } else {
3273                 msg->msg_alen -= 2;
3274                 msg->msg_len = 2;
3275                 msg->msg_text[0] = 1;
3276                 msg->msg_text[1] = 0;
3277             }
3278             msg->msg_ext    = 0;
3279             msg->msg_answer = 0;
3280             while (gdth_test_busy(ha))
3281                 gdth_delay(0);
3282             cmdp->Service       = SCREENSERVICE;
3283             cmdp->RequestBuffer = SCREEN_CMND;
3284             gdth_get_cmd_index(ha);
3285             gdth_set_sema0(ha);
3286             cmdp->OpCode        = GDT_WRITE;
3287             cmdp->BoardNode     = LOCALBOARD;
3288             cmdp->u.screen.reserved  = 0;
3289             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3290             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3291             ha->cmd_offs_dpmem = 0;
3292             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3293                 + sizeof(u64);
3294             ha->cmd_cnt = 0;
3295             gdth_copy_command(ha);
3296             gdth_release_event(ha);
3297             return 0;
3298         }
3299         printk("\n");
3300
3301     } else {
3302         b = scp->device->channel;
3303         t = scp->device->id;
3304         if (cmndinfo->OpCode == -1 && b != ha->virt_bus) {
3305             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3306         }
3307         /* cache or raw service */
3308         if (ha->status == S_BSY) {
3309             TRACE2(("Controller busy -> retry !\n"));
3310             if (cmndinfo->OpCode == GDT_MOUNT)
3311                 cmndinfo->OpCode = GDT_CLUST_INFO;
3312             /* retry */
3313             return 2;
3314         }
3315         if (scsi_bufflen(scp))
3316             pci_unmap_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
3317                          cmndinfo->dma_dir);
3318
3319         if (cmndinfo->sense_paddr)
3320             pci_unmap_page(ha->pdev, cmndinfo->sense_paddr, 16,
3321                                                            PCI_DMA_FROMDEVICE);
3322
3323         if (ha->status == S_OK) {
3324             cmndinfo->status = S_OK;
3325             cmndinfo->info = ha->info;
3326             if (cmndinfo->OpCode != -1) {
3327                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3328                         cmndinfo->OpCode));
3329                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3330                 if (cmndinfo->OpCode == GDT_CLUST_INFO) {
3331                     ha->hdr[t].cluster_type = (u8)ha->info;
3332                     if (!(ha->hdr[t].cluster_type &
3333                         CLUSTER_MOUNTED)) {
3334                         /* NOT MOUNTED -> MOUNT */
3335                         cmndinfo->OpCode = GDT_MOUNT;
3336                         if (ha->hdr[t].cluster_type &
3337                             CLUSTER_RESERVED) {
3338                             /* cluster drive RESERVED (on the other node) */
3339                             cmndinfo->phase = -2;      /* reservation conflict */
3340                         }
3341                     } else {
3342                         cmndinfo->OpCode = -1;
3343                     }
3344                 } else {
3345                     if (cmndinfo->OpCode == GDT_MOUNT) {
3346                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3347                         ha->hdr[t].media_changed = TRUE;
3348                     } else if (cmndinfo->OpCode == GDT_UNMOUNT) {
3349                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3350                         ha->hdr[t].media_changed = TRUE;
3351                     }
3352                     cmndinfo->OpCode = -1;
3353                 }
3354                 /* retry */
3355                 cmndinfo->priority = HIGH_PRI;
3356                 return 2;
3357             } else {
3358                 /* RESERVE/RELEASE ? */
3359                 if (scp->cmnd[0] == RESERVE) {
3360                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3361                 } else if (scp->cmnd[0] == RELEASE) {
3362                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3363                 }
3364                 scp->result = DID_OK << 16;
3365                 scp->sense_buffer[0] = 0;
3366             }
3367         } else {
3368             cmndinfo->status = ha->status;
3369             cmndinfo->info = ha->info;
3370
3371             if (cmndinfo->OpCode != -1) {
3372                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3373                         cmndinfo->OpCode, ha->status));
3374                 if (cmndinfo->OpCode == GDT_SCAN_START ||
3375                     cmndinfo->OpCode == GDT_SCAN_END) {
3376                     cmndinfo->OpCode = -1;
3377                     /* retry */
3378                     cmndinfo->priority = HIGH_PRI;
3379                     return 2;
3380                 }
3381                 memset((char*)scp->sense_buffer,0,16);
3382                 scp->sense_buffer[0] = 0x70;
3383                 scp->sense_buffer[2] = NOT_READY;
3384                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3385             } else if (service == CACHESERVICE) {
3386                 if (ha->status == S_CACHE_UNKNOWN &&
3387                     (ha->hdr[t].cluster_type &
3388                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3389                     /* bus reset -> force GDT_CLUST_INFO */
3390                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3391                 }
3392                 memset((char*)scp->sense_buffer,0,16);
3393                 if (ha->status == (u16)S_CACHE_RESERV) {
3394                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3395                 } else {
3396                     scp->sense_buffer[0] = 0x70;
3397                     scp->sense_buffer[2] = NOT_READY;
3398                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3399                 }
3400                 if (!cmndinfo->internal_command) {
3401                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3402                     ha->dvr.eu.sync.ionode  = ha->hanum;
3403                     ha->dvr.eu.sync.service = service;
3404                     ha->dvr.eu.sync.status  = ha->status;
3405                     ha->dvr.eu.sync.info    = ha->info;
3406                     ha->dvr.eu.sync.hostdrive = t;
3407                     if (ha->status >= 0x8000)
3408                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3409                     else
3410                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3411                 }
3412             } else {
3413                 /* sense buffer filled from controller firmware (DMA) */
3414                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3415                     scp->result = DID_BAD_TARGET << 16;
3416                 } else {
3417                     scp->result = (DID_OK << 16) | ha->info;
3418                 }
3419             }
3420         }
3421         if (!cmndinfo->wait_for_completion)
3422             cmndinfo->wait_for_completion++;
3423         else
3424             return 1;
3425     }
3426
3427     return 0;
3428 }
3429
3430 static char *async_cache_tab[] = {
3431 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3432         "GDT HA %u, service %u, async. status %u/%lu unknown",
3433 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3434         "GDT HA %u, service %u, async. status %u/%lu unknown",
3435 /* 2*/  "\005\000\002\006\004"
3436         "GDT HA %u, Host Drive %lu not ready",
3437 /* 3*/  "\005\000\002\006\004"
3438         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3439 /* 4*/  "\005\000\002\006\004"
3440         "GDT HA %u, mirror update on Host Drive %lu failed",
3441 /* 5*/  "\005\000\002\006\004"
3442         "GDT HA %u, Mirror Drive %lu failed",
3443 /* 6*/  "\005\000\002\006\004"
3444         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3445 /* 7*/  "\005\000\002\006\004"
3446         "GDT HA %u, Host Drive %lu write protected",
3447 /* 8*/  "\005\000\002\006\004"
3448         "GDT HA %u, media changed in Host Drive %lu",
3449 /* 9*/  "\005\000\002\006\004"
3450         "GDT HA %u, Host Drive %lu is offline",
3451 /*10*/  "\005\000\002\006\004"
3452         "GDT HA %u, media change of Mirror Drive %lu",
3453 /*11*/  "\005\000\002\006\004"
3454         "GDT HA %u, Mirror Drive %lu is write protected",
3455 /*12*/  "\005\000\002\006\004"
3456         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3457 /*13*/  "\007\000\002\006\002\010\002"
3458         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3459 /*14*/  "\005\000\002\006\002"
3460         "GDT HA %u, Array Drive %u: FAIL state entered",
3461 /*15*/  "\005\000\002\006\002"
3462         "GDT HA %u, Array Drive %u: error",
3463 /*16*/  "\007\000\002\006\002\010\002"
3464         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3465 /*17*/  "\005\000\002\006\002"
3466         "GDT HA %u, Array Drive %u: parity build failed",
3467 /*18*/  "\005\000\002\006\002"
3468         "GDT HA %u, Array Drive %u: drive rebuild failed",
3469 /*19*/  "\005\000\002\010\002"
3470         "GDT HA %u, Test of Hot Fix %u failed",
3471 /*20*/  "\005\000\002\006\002"
3472         "GDT HA %u, Array Drive %u: drive build finished successfully",
3473 /*21*/  "\005\000\002\006\002"
3474         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3475 /*22*/  "\007\000\002\006\002\010\002"
3476         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3477 /*23*/  "\005\000\002\006\002"
3478         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3479 /*24*/  "\005\000\002\010\002"
3480         "GDT HA %u, mirror update on Cache Drive %u completed",
3481 /*25*/  "\005\000\002\010\002"
3482         "GDT HA %u, mirror update on Cache Drive %lu failed",
3483 /*26*/  "\005\000\002\006\002"
3484         "GDT HA %u, Array Drive %u: drive rebuild started",
3485 /*27*/  "\005\000\002\012\001"
3486         "GDT HA %u, Fault bus %u: SHELF OK detected",
3487 /*28*/  "\005\000\002\012\001"
3488         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3489 /*29*/  "\007\000\002\012\001\013\001"
3490         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3491 /*30*/  "\007\000\002\012\001\013\001"
3492         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3493 /*31*/  "\007\000\002\012\001\013\001"
3494         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3495 /*32*/  "\007\000\002\012\001\013\001"
3496         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3497 /*33*/  "\007\000\002\012\001\013\001"
3498         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3499 /*34*/  "\011\000\002\012\001\013\001\006\004"
3500         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3501 /*35*/  "\007\000\002\012\001\013\001"
3502         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3503 /*36*/  "\007\000\002\012\001\013\001"
3504         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3505 /*37*/  "\007\000\002\012\001\006\004"
3506         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3507 /*38*/  "\007\000\002\012\001\013\001"
3508         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3509 /*39*/  "\007\000\002\012\001\013\001"
3510         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3511 /*40*/  "\007\000\002\012\001\013\001"
3512         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3513 /*41*/  "\007\000\002\012\001\013\001"
3514         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3515 /*42*/  "\005\000\002\006\002"
3516         "GDT HA %u, Array Drive %u: drive build started",
3517 /*43*/  "\003\000\002"
3518         "GDT HA %u, DRAM parity error detected",
3519 /*44*/  "\005\000\002\006\002"
3520         "GDT HA %u, Mirror Drive %u: update started",
3521 /*45*/  "\007\000\002\006\002\010\002"
3522         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3523 /*46*/  "\005\000\002\006\002"
3524         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3525 /*47*/  "\005\000\002\006\002"
3526         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3527 /*48*/  "\005\000\002\006\002"
3528         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3529 /*49*/  "\005\000\002\006\002"
3530         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3531 /*50*/  "\007\000\002\012\001\013\001"
3532         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3533 /*51*/  "\005\000\002\006\002"
3534         "GDT HA %u, Array Drive %u: expand started",
3535 /*52*/  "\005\000\002\006\002"
3536         "GDT HA %u, Array Drive %u: expand finished successfully",
3537 /*53*/  "\005\000\002\006\002"
3538         "GDT HA %u, Array Drive %u: expand failed",
3539 /*54*/  "\003\000\002"
3540         "GDT HA %u, CPU temperature critical",
3541 /*55*/  "\003\000\002"
3542         "GDT HA %u, CPU temperature OK",
3543 /*56*/  "\005\000\002\006\004"
3544         "GDT HA %u, Host drive %lu created",
3545 /*57*/  "\005\000\002\006\002"
3546         "GDT HA %u, Array Drive %u: expand restarted",
3547 /*58*/  "\005\000\002\006\002"
3548         "GDT HA %u, Array Drive %u: expand stopped",
3549 /*59*/  "\005\000\002\010\002"
3550         "GDT HA %u, Mirror Drive %u: drive build quited",
3551 /*60*/  "\005\000\002\006\002"
3552         "GDT HA %u, Array Drive %u: parity build quited",
3553 /*61*/  "\005\000\002\006\002"
3554         "GDT HA %u, Array Drive %u: drive rebuild quited",
3555 /*62*/  "\005\000\002\006\002"
3556         "GDT HA %u, Array Drive %u: parity verify started",
3557 /*63*/  "\005\000\002\006\002"
3558         "GDT HA %u, Array Drive %u: parity verify done",
3559 /*64*/  "\005\000\002\006\002"
3560         "GDT HA %u, Array Drive %u: parity verify failed",
3561 /*65*/  "\005\000\002\006\002"
3562         "GDT HA %u, Array Drive %u: parity error detected",
3563 /*66*/  "\005\000\002\006\002"
3564         "GDT HA %u, Array Drive %u: parity verify quited",
3565 /*67*/  "\005\000\002\006\002"
3566         "GDT HA %u, Host Drive %u reserved",
3567 /*68*/  "\005\000\002\006\002"
3568         "GDT HA %u, Host Drive %u mounted and released",
3569 /*69*/  "\005\000\002\006\002"
3570         "GDT HA %u, Host Drive %u released",
3571 /*70*/  "\003\000\002"
3572         "GDT HA %u, DRAM error detected and corrected with ECC",
3573 /*71*/  "\003\000\002"
3574         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3575 /*72*/  "\011\000\002\012\001\013\001\014\001"
3576         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3577 /*73*/  "\005\000\002\006\002"
3578         "GDT HA %u, Host drive %u resetted locally",
3579 /*74*/  "\005\000\002\006\002"
3580         "GDT HA %u, Host drive %u resetted remotely",
3581 /*75*/  "\003\000\002"
3582         "GDT HA %u, async. status 75 unknown",
3583 };
3584
3585
3586 static int gdth_async_event(gdth_ha_str *ha)
3587 {
3588     gdth_cmd_str *cmdp;
3589     int cmd_index;
3590
3591     cmdp= ha->pccb;
3592     TRACE2(("gdth_async_event() ha %d serv %d\n",
3593             ha->hanum, ha->service));
3594
3595     if (ha->service == SCREENSERVICE) {
3596         if (ha->status == MSG_REQUEST) {
3597             while (gdth_test_busy(ha))
3598                 gdth_delay(0);
3599             cmdp->Service       = SCREENSERVICE;
3600             cmdp->RequestBuffer = SCREEN_CMND;
3601             cmd_index = gdth_get_cmd_index(ha);
3602             gdth_set_sema0(ha);
3603             cmdp->OpCode        = GDT_READ;
3604             cmdp->BoardNode     = LOCALBOARD;
3605             cmdp->u.screen.reserved  = 0;
3606             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3607             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3608             ha->cmd_offs_dpmem = 0;
3609             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3610                 + sizeof(u64);
3611             ha->cmd_cnt = 0;
3612             gdth_copy_command(ha);
3613             if (ha->type == GDT_EISA)
3614                 printk("[EISA slot %d] ",(u16)ha->brd_phys);
3615             else if (ha->type == GDT_ISA)
3616                 printk("[DPMEM 0x%4X] ",(u16)ha->brd_phys);
3617             else
3618                 printk("[PCI %d/%d] ",(u16)(ha->brd_phys>>8),
3619                        (u16)((ha->brd_phys>>3)&0x1f));
3620             gdth_release_event(ha);
3621         }
3622
3623     } else {
3624         if (ha->type == GDT_PCIMPR &&
3625             (ha->fw_vers & 0xff) >= 0x1a) {
3626             ha->dvr.size = 0;
3627             ha->dvr.eu.async.ionode = ha->hanum;
3628             ha->dvr.eu.async.status  = ha->status;
3629             /* severity and event_string already set! */
3630         } else {
3631             ha->dvr.size = sizeof(ha->dvr.eu.async);
3632             ha->dvr.eu.async.ionode   = ha->hanum;
3633             ha->dvr.eu.async.service = ha->service;
3634             ha->dvr.eu.async.status  = ha->status;
3635             ha->dvr.eu.async.info    = ha->info;
3636             *(u32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3637         }
3638         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3639         gdth_log_event( &ha->dvr, NULL );
3640
3641         /* new host drive from expand? */
3642         if (ha->service == CACHESERVICE && ha->status == 56) {
3643             TRACE2(("gdth_async_event(): new host drive %d created\n",
3644                     (u16)ha->info));
3645             /* gdth_analyse_hdrive(hanum, (u16)ha->info); */
3646         }
3647     }
3648     return 1;
3649 }
3650
3651 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3652 {
3653     gdth_stackframe stack;
3654     char *f = NULL;
3655     int i,j;
3656
3657     TRACE2(("gdth_log_event()\n"));
3658     if (dvr->size == 0) {
3659         if (buffer == NULL) {
3660             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3661         } else {
3662             sprintf(buffer,"Adapter %d: %s\n",
3663                 dvr->eu.async.ionode,dvr->event_string);
3664         }
3665     } else if (dvr->eu.async.service == CACHESERVICE &&
3666         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3667         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3668                 dvr->eu.async.status));
3669
3670         f = async_cache_tab[dvr->eu.async.status];
3671
3672         /* i: parameter to push, j: stack element to fill */
3673         for (j=0,i=1; i < f[0]; i+=2) {
3674             switch (f[i+1]) {
3675               case 4:
3676                 stack.b[j++] = *(u32*)&dvr->eu.stream[(int)f[i]];
3677                 break;
3678               case 2:
3679                 stack.b[j++] = *(u16*)&dvr->eu.stream[(int)f[i]];
3680                 break;
3681               case 1:
3682                 stack.b[j++] = *(u8*)&dvr->eu.stream[(int)f[i]];
3683                 break;
3684               default:
3685                 break;
3686             }
3687         }
3688
3689         if (buffer == NULL) {
3690             printk(&f[(int)f[0]],stack);
3691             printk("\n");
3692         } else {
3693             sprintf(buffer,&f[(int)f[0]],stack);
3694         }
3695
3696     } else {
3697         if (buffer == NULL) {
3698             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3699                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3700         } else {
3701             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3702                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3703         }
3704     }
3705 }
3706
3707 #ifdef GDTH_STATISTICS
3708 static u8       gdth_timer_running;
3709
3710 static void gdth_timeout(struct timer_list *unused)
3711 {
3712     u32 i;
3713     struct scsi_cmnd *nscp;
3714     gdth_ha_str *ha;
3715     unsigned long flags;
3716
3717     if(unlikely(list_empty(&gdth_instances))) {
3718             gdth_timer_running = 0;
3719             return;
3720     }
3721
3722     ha = list_first_entry(&gdth_instances, gdth_ha_str, list);
3723     spin_lock_irqsave(&ha->smp_lock, flags);
3724
3725     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3726         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3727             ++act_stats;
3728
3729     for (act_rq=0,
3730          nscp=ha->req_first; nscp; nscp=(struct scsi_cmnd*)nscp->SCp.ptr)
3731         ++act_rq;
3732
3733     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3734             act_ints, act_ios, act_stats, act_rq));
3735     act_ints = act_ios = 0;
3736
3737     gdth_timer.expires = jiffies + 30 * HZ;
3738     add_timer(&gdth_timer);
3739     spin_unlock_irqrestore(&ha->smp_lock, flags);
3740 }
3741
3742 static void gdth_timer_init(void)
3743 {
3744         if (gdth_timer_running)
3745                 return;
3746         gdth_timer_running = 1;
3747         TRACE2(("gdth_detect(): Initializing timer !\n"));
3748         gdth_timer.expires = jiffies + HZ;
3749         add_timer(&gdth_timer);
3750 }
3751 #else
3752 static inline void gdth_timer_init(void)
3753 {
3754 }
3755 #endif
3756
3757 static void __init internal_setup(char *str,int *ints)
3758 {
3759     int i, argc;
3760     char *cur_str, *argv;
3761
3762     TRACE2(("internal_setup() str %s ints[0] %d\n",
3763             str ? str:"NULL", ints ? ints[0]:0));
3764
3765     /* read irq[] from ints[] */
3766     if (ints) {
3767         argc = ints[0];
3768         if (argc > 0) {
3769             if (argc > MAXHA)
3770                 argc = MAXHA;
3771             for (i = 0; i < argc; ++i)
3772                 irq[i] = ints[i+1];
3773         }
3774     }
3775
3776     /* analyse string */
3777     argv = str;
3778     while (argv && (cur_str = strchr(argv, ':'))) {
3779         int val = 0, c = *++cur_str;
3780
3781         if (c == 'n' || c == 'N')
3782             val = 0;
3783         else if (c == 'y' || c == 'Y')
3784             val = 1;
3785         else
3786             val = (int)simple_strtoul(cur_str, NULL, 0);
3787
3788         if (!strncmp(argv, "disable:", 8))
3789             disable = val;
3790         else if (!strncmp(argv, "reserve_mode:", 13))
3791             reserve_mode = val;
3792         else if (!strncmp(argv, "reverse_scan:", 13))
3793             reverse_scan = val;
3794         else if (!strncmp(argv, "hdr_channel:", 12))
3795             hdr_channel = val;
3796         else if (!strncmp(argv, "max_ids:", 8))
3797             max_ids = val;
3798         else if (!strncmp(argv, "rescan:", 7))
3799             rescan = val;
3800         else if (!strncmp(argv, "shared_access:", 14))
3801             shared_access = val;
3802         else if (!strncmp(argv, "probe_eisa_isa:", 15))
3803             probe_eisa_isa = val;
3804         else if (!strncmp(argv, "reserve_list:", 13)) {
3805             reserve_list[0] = val;
3806             for (i = 1; i < MAX_RES_ARGS; i++) {
3807                 cur_str = strchr(cur_str, ',');
3808                 if (!cur_str)
3809                     break;
3810                 if (!isdigit((int)*++cur_str)) {
3811                     --cur_str;
3812                     break;
3813                 }
3814                 reserve_list[i] =
3815                     (int)simple_strtoul(cur_str, NULL, 0);
3816             }
3817             if (!cur_str)
3818                 break;
3819             argv = ++cur_str;
3820             continue;
3821         }
3822
3823         if ((argv = strchr(argv, ',')))
3824             ++argv;
3825     }
3826 }
3827
3828 int __init option_setup(char *str)
3829 {
3830     int ints[MAXHA];
3831     char *cur = str;
3832     int i = 1;
3833
3834     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3835
3836     while (cur && isdigit(*cur) && i < MAXHA) {
3837         ints[i++] = simple_strtoul(cur, NULL, 0);
3838         if ((cur = strchr(cur, ',')) != NULL) cur++;
3839     }
3840
3841     ints[0] = i - 1;
3842     internal_setup(cur, ints);
3843     return 1;
3844 }
3845
3846 static const char *gdth_ctr_name(gdth_ha_str *ha)
3847 {
3848     TRACE2(("gdth_ctr_name()\n"));
3849
3850     if (ha->type == GDT_EISA) {
3851         switch (ha->stype) {
3852           case GDT3_ID:
3853             return("GDT3000/3020");
3854           case GDT3A_ID:
3855             return("GDT3000A/3020A/3050A");
3856           case GDT3B_ID:
3857             return("GDT3000B/3010A");
3858         }
3859     } else if (ha->type == GDT_ISA) {
3860         return("GDT2000/2020");
3861     } else if (ha->type == GDT_PCI) {
3862         switch (ha->pdev->device) {
3863           case PCI_DEVICE_ID_VORTEX_GDT60x0:
3864             return("GDT6000/6020/6050");
3865           case PCI_DEVICE_ID_VORTEX_GDT6000B:
3866             return("GDT6000B/6010");
3867         }
3868     }
3869     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
3870
3871     return("");
3872 }
3873
3874 static const char *gdth_info(struct Scsi_Host *shp)
3875 {
3876     gdth_ha_str *ha = shost_priv(shp);
3877
3878     TRACE2(("gdth_info()\n"));
3879     return ((const char *)ha->binfo.type_string);
3880 }
3881
3882 static enum blk_eh_timer_return gdth_timed_out(struct scsi_cmnd *scp)
3883 {
3884         gdth_ha_str *ha = shost_priv(scp->device->host);
3885         struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3886         u8 b, t;
3887         unsigned long flags;
3888         enum blk_eh_timer_return retval = BLK_EH_DONE;
3889
3890         TRACE(("%s() cmd 0x%x\n", scp->cmnd[0], __func__));
3891         b = scp->device->channel;
3892         t = scp->device->id;
3893
3894         /*
3895          * We don't really honor the command timeout, but we try to
3896          * honor 6 times of the actual command timeout! So reset the
3897          * timer if this is less than 6th timeout on this command!
3898          */
3899         if (++cmndinfo->timeout_count < 6)
3900                 retval = BLK_EH_RESET_TIMER;
3901
3902         /* Reset the timeout if it is locked IO */
3903         spin_lock_irqsave(&ha->smp_lock, flags);
3904         if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha, b)].lock) ||
3905             (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) {
3906                 TRACE2(("%s(): locked IO, reset timeout\n", __func__));
3907                 retval = BLK_EH_RESET_TIMER;
3908         }
3909         spin_unlock_irqrestore(&ha->smp_lock, flags);
3910
3911         return retval;
3912 }
3913
3914
3915 static int gdth_eh_bus_reset(struct scsi_cmnd *scp)
3916 {
3917     gdth_ha_str *ha = shost_priv(scp->device->host);
3918     int i;
3919     unsigned long flags;
3920     struct scsi_cmnd *cmnd;
3921     u8 b;
3922
3923     TRACE2(("gdth_eh_bus_reset()\n"));
3924
3925     b = scp->device->channel;
3926
3927     /* clear command tab */
3928     spin_lock_irqsave(&ha->smp_lock, flags);
3929     for (i = 0; i < GDTH_MAXCMDS; ++i) {
3930         cmnd = ha->cmd_tab[i].cmnd;
3931         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
3932             ha->cmd_tab[i].cmnd = UNUSED_CMND;
3933     }
3934     spin_unlock_irqrestore(&ha->smp_lock, flags);
3935
3936     if (b == ha->virt_bus) {
3937         /* host drives */
3938         for (i = 0; i < MAX_HDRIVES; ++i) {
3939             if (ha->hdr[i].present) {
3940                 spin_lock_irqsave(&ha->smp_lock, flags);
3941                 gdth_polling = TRUE;
3942                 while (gdth_test_busy(ha))
3943                     gdth_delay(0);
3944                 if (gdth_internal_cmd(ha, CACHESERVICE,
3945                                       GDT_CLUST_RESET, i, 0, 0))
3946                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
3947                 gdth_polling = FALSE;
3948                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3949             }
3950         }
3951     } else {
3952         /* raw devices */
3953         spin_lock_irqsave(&ha->smp_lock, flags);
3954         for (i = 0; i < MAXID; ++i)
3955             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
3956         gdth_polling = TRUE;
3957         while (gdth_test_busy(ha))
3958             gdth_delay(0);
3959         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESET_BUS,
3960                           BUS_L2P(ha,b), 0, 0);
3961         gdth_polling = FALSE;
3962         spin_unlock_irqrestore(&ha->smp_lock, flags);
3963     }
3964     return SUCCESS;
3965 }
3966
3967 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
3968 {
3969     u8 b, t;
3970     gdth_ha_str *ha = shost_priv(sdev->host);
3971     struct scsi_device *sd;
3972     unsigned capacity;
3973
3974     sd = sdev;
3975     capacity = cap;
3976     b = sd->channel;
3977     t = sd->id;
3978     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", ha->hanum, b, t));
3979
3980     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
3981         /* raw device or host drive without mapping information */
3982         TRACE2(("Evaluate mapping\n"));
3983         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
3984     } else {
3985         ip[0] = ha->hdr[t].heads;
3986         ip[1] = ha->hdr[t].secs;
3987         ip[2] = capacity / ip[0] / ip[1];
3988     }
3989
3990     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
3991             ip[0],ip[1],ip[2]));
3992     return 0;
3993 }
3994
3995
3996 static int gdth_queuecommand_lck(struct scsi_cmnd *scp,
3997                                 void (*done)(struct scsi_cmnd *))
3998 {
3999     gdth_ha_str *ha = shost_priv(scp->device->host);
4000     struct gdth_cmndinfo *cmndinfo;
4001
4002     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4003
4004     cmndinfo = gdth_get_cmndinfo(ha);
4005     BUG_ON(!cmndinfo);
4006
4007     scp->scsi_done = done;
4008     cmndinfo->timeout_count = 0;
4009     cmndinfo->priority = DEFAULT_PRI;
4010
4011     return __gdth_queuecommand(ha, scp, cmndinfo);
4012 }
4013
4014 static DEF_SCSI_QCMD(gdth_queuecommand)
4015
4016 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
4017                                 struct gdth_cmndinfo *cmndinfo)
4018 {
4019     scp->host_scribble = (unsigned char *)cmndinfo;
4020     cmndinfo->wait_for_completion = 1;
4021     cmndinfo->phase = -1;
4022     cmndinfo->OpCode = -1;
4023
4024 #ifdef GDTH_STATISTICS
4025     ++act_ios;
4026 #endif
4027
4028     gdth_putq(ha, scp, cmndinfo->priority);
4029     gdth_next(ha);
4030     return 0;
4031 }
4032
4033
4034 static int gdth_open(struct inode *inode, struct file *filep)
4035 {
4036     gdth_ha_str *ha;
4037
4038     mutex_lock(&gdth_mutex);
4039     list_for_each_entry(ha, &gdth_instances, list) {
4040         if (!ha->sdev)
4041             ha->sdev = scsi_get_host_dev(ha->shost);
4042     }
4043     mutex_unlock(&gdth_mutex);
4044
4045     TRACE(("gdth_open()\n"));
4046     return 0;
4047 }
4048
4049 static int gdth_close(struct inode *inode, struct file *filep)
4050 {
4051     TRACE(("gdth_close()\n"));
4052     return 0;
4053 }
4054
4055 static int ioc_event(void __user *arg)
4056 {
4057     gdth_ioctl_event evt;
4058     gdth_ha_str *ha;
4059     unsigned long flags;
4060
4061     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)))
4062         return -EFAULT;
4063     ha = gdth_find_ha(evt.ionode);
4064     if (!ha)
4065         return -EFAULT;
4066
4067     if (evt.erase == 0xff) {
4068         if (evt.event.event_source == ES_TEST)
4069             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4070         else if (evt.event.event_source == ES_DRIVER)
4071             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4072         else if (evt.event.event_source == ES_SYNC)
4073             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4074         else
4075             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4076         spin_lock_irqsave(&ha->smp_lock, flags);
4077         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4078                          &evt.event.event_data);
4079         spin_unlock_irqrestore(&ha->smp_lock, flags);
4080     } else if (evt.erase == 0xfe) {
4081         gdth_clear_events();
4082     } else if (evt.erase == 0) {
4083         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4084     } else {
4085         gdth_readapp_event(ha, evt.erase, &evt.event);
4086     }
4087     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4088         return -EFAULT;
4089     return 0;
4090 }
4091
4092 static int ioc_lockdrv(void __user *arg)
4093 {
4094     gdth_ioctl_lockdrv ldrv;
4095     u8 i, j;
4096     unsigned long flags;
4097     gdth_ha_str *ha;
4098
4099     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)))
4100         return -EFAULT;
4101     ha = gdth_find_ha(ldrv.ionode);
4102     if (!ha)
4103         return -EFAULT;
4104
4105     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4106         j = ldrv.drives[i];
4107         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4108             continue;
4109         if (ldrv.lock) {
4110             spin_lock_irqsave(&ha->smp_lock, flags);
4111             ha->hdr[j].lock = 1;
4112             spin_unlock_irqrestore(&ha->smp_lock, flags);
4113             gdth_wait_completion(ha, ha->bus_cnt, j);
4114         } else {
4115             spin_lock_irqsave(&ha->smp_lock, flags);
4116             ha->hdr[j].lock = 0;
4117             spin_unlock_irqrestore(&ha->smp_lock, flags);
4118             gdth_next(ha);
4119         }
4120     }
4121     return 0;
4122 }
4123
4124 static int ioc_resetdrv(void __user *arg, char *cmnd)
4125 {
4126     gdth_ioctl_reset res;
4127     gdth_cmd_str cmd;
4128     gdth_ha_str *ha;
4129     int rval;
4130
4131     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4132         res.number >= MAX_HDRIVES)
4133         return -EFAULT;
4134     ha = gdth_find_ha(res.ionode);
4135     if (!ha)
4136         return -EFAULT;
4137
4138     if (!ha->hdr[res.number].present)
4139         return 0;
4140     memset(&cmd, 0, sizeof(gdth_cmd_str));
4141     cmd.Service = CACHESERVICE;
4142     cmd.OpCode = GDT_CLUST_RESET;
4143     if (ha->cache_feat & GDT_64BIT)
4144         cmd.u.cache64.DeviceNo = res.number;
4145     else
4146         cmd.u.cache.DeviceNo = res.number;
4147
4148     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4149     if (rval < 0)
4150         return rval;
4151     res.status = rval;
4152
4153     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4154         return -EFAULT;
4155     return 0;
4156 }
4157
4158 static int ioc_general(void __user *arg, char *cmnd)
4159 {
4160     gdth_ioctl_general gen;
4161     char *buf = NULL;
4162     u64 paddr;
4163     gdth_ha_str *ha;
4164     int rval;
4165
4166     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)))
4167         return -EFAULT;
4168     ha = gdth_find_ha(gen.ionode);
4169     if (!ha)
4170         return -EFAULT;
4171
4172     if (gen.data_len > INT_MAX)
4173         return -EINVAL;
4174     if (gen.sense_len > INT_MAX)
4175         return -EINVAL;
4176     if (gen.data_len + gen.sense_len > INT_MAX)
4177         return -EINVAL;
4178
4179     if (gen.data_len + gen.sense_len != 0) {
4180         if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len,
4181                                      FALSE, &paddr)))
4182             return -EFAULT;
4183         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4184                            gen.data_len + gen.sense_len)) {
4185             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4186             return -EFAULT;
4187         }
4188
4189         if (gen.command.OpCode == GDT_IOCTL) {
4190             gen.command.u.ioctl.p_param = paddr;
4191         } else if (gen.command.Service == CACHESERVICE) {
4192             if (ha->cache_feat & GDT_64BIT) {
4193                 /* copy elements from 32-bit IOCTL structure */
4194                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4195                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4196                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4197                 /* addresses */
4198                 if (ha->cache_feat & SCATTER_GATHER) {
4199                     gen.command.u.cache64.DestAddr = (u64)-1;
4200                     gen.command.u.cache64.sg_canz = 1;
4201                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4202                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4203                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
4204                 } else {
4205                     gen.command.u.cache64.DestAddr = paddr;
4206                     gen.command.u.cache64.sg_canz = 0;
4207                 }
4208             } else {
4209                 if (ha->cache_feat & SCATTER_GATHER) {
4210                     gen.command.u.cache.DestAddr = 0xffffffff;
4211                     gen.command.u.cache.sg_canz = 1;
4212                     gen.command.u.cache.sg_lst[0].sg_ptr = (u32)paddr;
4213                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4214                     gen.command.u.cache.sg_lst[1].sg_len = 0;
4215                 } else {
4216                     gen.command.u.cache.DestAddr = paddr;
4217                     gen.command.u.cache.sg_canz = 0;
4218                 }
4219             }
4220         } else if (gen.command.Service == SCSIRAWSERVICE) {
4221             if (ha->raw_feat & GDT_64BIT) {
4222                 /* copy elements from 32-bit IOCTL structure */
4223                 char cmd[16];
4224                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4225                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4226                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4227                 gen.command.u.raw64.target = gen.command.u.raw.target;
4228                 memcpy(cmd, gen.command.u.raw.cmd, 16);
4229                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4230                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4231                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4232                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4233                 /* addresses */
4234                 if (ha->raw_feat & SCATTER_GATHER) {
4235                     gen.command.u.raw64.sdata = (u64)-1;
4236                     gen.command.u.raw64.sg_ranz = 1;
4237                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4238                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4239                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
4240                 } else {
4241                     gen.command.u.raw64.sdata = paddr;
4242                     gen.command.u.raw64.sg_ranz = 0;
4243                 }
4244                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4245             } else {
4246                 if (ha->raw_feat & SCATTER_GATHER) {
4247                     gen.command.u.raw.sdata = 0xffffffff;
4248                     gen.command.u.raw.sg_ranz = 1;
4249                     gen.command.u.raw.sg_lst[0].sg_ptr = (u32)paddr;
4250                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4251                     gen.command.u.raw.sg_lst[1].sg_len = 0;
4252                 } else {
4253                     gen.command.u.raw.sdata = paddr;
4254                     gen.command.u.raw.sg_ranz = 0;
4255                 }
4256                 gen.command.u.raw.sense_data = (u32)paddr + gen.data_len;
4257             }
4258         } else {
4259             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4260             return -EFAULT;
4261         }
4262     }
4263
4264     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4265     if (rval < 0) {
4266         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4267         return rval;
4268     }
4269     gen.status = rval;
4270
4271     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4272                      gen.data_len + gen.sense_len)) {
4273         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4274         return -EFAULT;
4275     }
4276     if (copy_to_user(arg, &gen,
4277         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4278         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4279         return -EFAULT;
4280     }
4281     gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4282     return 0;
4283 }
4284
4285 static int ioc_hdrlist(void __user *arg, char *cmnd)
4286 {
4287     gdth_ioctl_rescan *rsc;
4288     gdth_cmd_str *cmd;
4289     gdth_ha_str *ha;
4290     u8 i;
4291     int rc = -ENOMEM;
4292     u32 cluster_type = 0;
4293
4294     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4295     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4296     if (!rsc || !cmd)
4297         goto free_fail;
4298
4299     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4300         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4301         rc = -EFAULT;
4302         goto free_fail;
4303     }
4304     memset(cmd, 0, sizeof(gdth_cmd_str));
4305
4306     for (i = 0; i < MAX_HDRIVES; ++i) {
4307         if (!ha->hdr[i].present) {
4308             rsc->hdr_list[i].bus = 0xff;
4309             continue;
4310         }
4311         rsc->hdr_list[i].bus = ha->virt_bus;
4312         rsc->hdr_list[i].target = i;
4313         rsc->hdr_list[i].lun = 0;
4314         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4315         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4316             cmd->Service = CACHESERVICE;
4317             cmd->OpCode = GDT_CLUST_INFO;
4318             if (ha->cache_feat & GDT_64BIT)
4319                 cmd->u.cache64.DeviceNo = i;
4320             else
4321                 cmd->u.cache.DeviceNo = i;
4322             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4323                 rsc->hdr_list[i].cluster_type = cluster_type;
4324         }
4325     }
4326
4327     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4328         rc = -EFAULT;
4329     else
4330         rc = 0;
4331
4332 free_fail:
4333     kfree(rsc);
4334     kfree(cmd);
4335     return rc;
4336 }
4337
4338 static int ioc_rescan(void __user *arg, char *cmnd)
4339 {
4340     gdth_ioctl_rescan *rsc;
4341     gdth_cmd_str *cmd;
4342     u16 i, status, hdr_cnt;
4343     u32 info;
4344     int cyls, hds, secs;
4345     int rc = -ENOMEM;
4346     unsigned long flags;
4347     gdth_ha_str *ha;
4348
4349     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4350     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4351     if (!cmd || !rsc)
4352         goto free_fail;
4353
4354     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4355         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4356         rc = -EFAULT;
4357         goto free_fail;
4358     }
4359     memset(cmd, 0, sizeof(gdth_cmd_str));
4360
4361     if (rsc->flag == 0) {
4362         /* old method: re-init. cache service */
4363         cmd->Service = CACHESERVICE;
4364         if (ha->cache_feat & GDT_64BIT) {
4365             cmd->OpCode = GDT_X_INIT_HOST;
4366             cmd->u.cache64.DeviceNo = LINUX_OS;
4367         } else {
4368             cmd->OpCode = GDT_INIT;
4369             cmd->u.cache.DeviceNo = LINUX_OS;
4370         }
4371
4372         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4373         i = 0;
4374         hdr_cnt = (status == S_OK ? (u16)info : 0);
4375     } else {
4376         i = rsc->hdr_no;
4377         hdr_cnt = i + 1;
4378     }
4379
4380     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4381         cmd->Service = CACHESERVICE;
4382         cmd->OpCode = GDT_INFO;
4383         if (ha->cache_feat & GDT_64BIT)
4384             cmd->u.cache64.DeviceNo = i;
4385         else
4386             cmd->u.cache.DeviceNo = i;
4387
4388         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4389
4390         spin_lock_irqsave(&ha->smp_lock, flags);
4391         rsc->hdr_list[i].bus = ha->virt_bus;
4392         rsc->hdr_list[i].target = i;
4393         rsc->hdr_list[i].lun = 0;
4394         if (status != S_OK) {
4395             ha->hdr[i].present = FALSE;
4396         } else {
4397             ha->hdr[i].present = TRUE;
4398             ha->hdr[i].size = info;
4399             /* evaluate mapping */
4400             ha->hdr[i].size &= ~SECS32;
4401             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4402             ha->hdr[i].heads = hds;
4403             ha->hdr[i].secs = secs;
4404             /* round size */
4405             ha->hdr[i].size = cyls * hds * secs;
4406         }
4407         spin_unlock_irqrestore(&ha->smp_lock, flags);
4408         if (status != S_OK)
4409             continue;
4410
4411         /* extended info, if GDT_64BIT, for drives > 2 TB */
4412         /* but we need ha->info2, not yet stored in scp->SCp */
4413
4414         /* devtype, cluster info, R/W attribs */
4415         cmd->Service = CACHESERVICE;
4416         cmd->OpCode = GDT_DEVTYPE;
4417         if (ha->cache_feat & GDT_64BIT)
4418             cmd->u.cache64.DeviceNo = i;
4419         else
4420             cmd->u.cache.DeviceNo = i;
4421
4422         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4423
4424         spin_lock_irqsave(&ha->smp_lock, flags);
4425         ha->hdr[i].devtype = (status == S_OK ? (u16)info : 0);
4426         spin_unlock_irqrestore(&ha->smp_lock, flags);
4427
4428         cmd->Service = CACHESERVICE;
4429         cmd->OpCode = GDT_CLUST_INFO;
4430         if (ha->cache_feat & GDT_64BIT)
4431             cmd->u.cache64.DeviceNo = i;
4432         else
4433             cmd->u.cache.DeviceNo = i;
4434
4435         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4436
4437         spin_lock_irqsave(&ha->smp_lock, flags);
4438         ha->hdr[i].cluster_type =
4439             ((status == S_OK && !shared_access) ? (u16)info : 0);
4440         spin_unlock_irqrestore(&ha->smp_lock, flags);
4441         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4442
4443         cmd->Service = CACHESERVICE;
4444         cmd->OpCode = GDT_RW_ATTRIBS;
4445         if (ha->cache_feat & GDT_64BIT)
4446             cmd->u.cache64.DeviceNo = i;
4447         else
4448             cmd->u.cache.DeviceNo = i;
4449
4450         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4451
4452         spin_lock_irqsave(&ha->smp_lock, flags);
4453         ha->hdr[i].rw_attribs = (status == S_OK ? (u16)info : 0);
4454         spin_unlock_irqrestore(&ha->smp_lock, flags);
4455     }
4456
4457     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4458         rc = -EFAULT;
4459     else
4460         rc = 0;
4461
4462 free_fail:
4463     kfree(rsc);
4464     kfree(cmd);
4465     return rc;
4466 }
4467
4468 static int gdth_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
4469 {
4470     gdth_ha_str *ha;
4471     struct scsi_cmnd *scp;
4472     unsigned long flags;
4473     char cmnd[MAX_COMMAND_SIZE];
4474     void __user *argp = (void __user *)arg;
4475
4476     memset(cmnd, 0xff, 12);
4477
4478     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
4479
4480     switch (cmd) {
4481       case GDTIOCTL_CTRCNT:
4482       {
4483         int cnt = gdth_ctr_count;
4484         if (put_user(cnt, (int __user *)argp))
4485                 return -EFAULT;
4486         break;
4487       }
4488
4489       case GDTIOCTL_DRVERS:
4490       {
4491         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
4492         if (put_user(ver, (int __user *)argp))
4493                 return -EFAULT;
4494         break;
4495       }
4496
4497       case GDTIOCTL_OSVERS:
4498       {
4499         gdth_ioctl_osvers osv;
4500
4501         osv.version = (u8)(LINUX_VERSION_CODE >> 16);
4502         osv.subversion = (u8)(LINUX_VERSION_CODE >> 8);
4503         osv.revision = (u16)(LINUX_VERSION_CODE & 0xff);
4504         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4505                 return -EFAULT;
4506         break;
4507       }
4508
4509       case GDTIOCTL_CTRTYPE:
4510       {
4511         gdth_ioctl_ctrtype ctrt;
4512
4513         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
4514             (NULL == (ha = gdth_find_ha(ctrt.ionode))))
4515             return -EFAULT;
4516
4517         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4518             ctrt.type = (u8)((ha->stype>>20) - 0x10);
4519         } else {
4520             if (ha->type != GDT_PCIMPR) {
4521                 ctrt.type = (u8)((ha->stype<<4) + 6);
4522             } else {
4523                 ctrt.type =
4524                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
4525                 if (ha->stype >= 0x300)
4526                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
4527                 else
4528                     ctrt.ext_type = 0x6000 | ha->stype;
4529             }
4530             ctrt.device_id = ha->pdev->device;
4531             ctrt.sub_device_id = ha->pdev->subsystem_device;
4532         }
4533         ctrt.info = ha->brd_phys;
4534         ctrt.oem_id = ha->oem_id;
4535         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
4536             return -EFAULT;
4537         break;
4538       }
4539
4540       case GDTIOCTL_GENERAL:
4541         return ioc_general(argp, cmnd);
4542
4543       case GDTIOCTL_EVENT:
4544         return ioc_event(argp);
4545
4546       case GDTIOCTL_LOCKDRV:
4547         return ioc_lockdrv(argp);
4548
4549       case GDTIOCTL_LOCKCHN:
4550       {
4551         gdth_ioctl_lockchn lchn;
4552         u8 i, j;
4553
4554         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4555             (NULL == (ha = gdth_find_ha(lchn.ionode))))
4556             return -EFAULT;
4557
4558         i = lchn.channel;
4559         if (i < ha->bus_cnt) {
4560             if (lchn.lock) {
4561                 spin_lock_irqsave(&ha->smp_lock, flags);
4562                 ha->raw[i].lock = 1;
4563                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4564                 for (j = 0; j < ha->tid_cnt; ++j)
4565                     gdth_wait_completion(ha, i, j);
4566             } else {
4567                 spin_lock_irqsave(&ha->smp_lock, flags);
4568                 ha->raw[i].lock = 0;
4569                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4570                 for (j = 0; j < ha->tid_cnt; ++j)
4571                     gdth_next(ha);
4572             }
4573         }
4574         break;
4575       }
4576
4577       case GDTIOCTL_RESCAN:
4578         return ioc_rescan(argp, cmnd);
4579
4580       case GDTIOCTL_HDRLIST:
4581         return ioc_hdrlist(argp, cmnd);
4582
4583       case GDTIOCTL_RESET_BUS:
4584       {
4585         gdth_ioctl_reset res;
4586         int rval;
4587
4588         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
4589             (NULL == (ha = gdth_find_ha(res.ionode))))
4590             return -EFAULT;
4591
4592         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
4593         if (!scp)
4594             return -ENOMEM;
4595         scp->device = ha->sdev;
4596         scp->cmd_len = 12;
4597         scp->device->channel = res.number;
4598         rval = gdth_eh_bus_reset(scp);
4599         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
4600         kfree(scp);
4601
4602         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
4603             return -EFAULT;
4604         break;
4605       }
4606
4607       case GDTIOCTL_RESET_DRV:
4608         return ioc_resetdrv(argp, cmnd);
4609
4610       default:
4611         break;
4612     }
4613     return 0;
4614 }
4615
4616 static long gdth_unlocked_ioctl(struct file *file, unsigned int cmd,
4617                                 unsigned long arg)
4618 {
4619         int ret;
4620
4621         mutex_lock(&gdth_mutex);
4622         ret = gdth_ioctl(file, cmd, arg);
4623         mutex_unlock(&gdth_mutex);
4624
4625         return ret;
4626 }
4627
4628 /* flush routine */
4629 static void gdth_flush(gdth_ha_str *ha)
4630 {
4631     int             i;
4632     gdth_cmd_str    gdtcmd;
4633     char            cmnd[MAX_COMMAND_SIZE];
4634     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4635
4636     TRACE2(("gdth_flush() hanum %d\n", ha->hanum));
4637
4638     for (i = 0; i < MAX_HDRIVES; ++i) {
4639         if (ha->hdr[i].present) {
4640             gdtcmd.BoardNode = LOCALBOARD;
4641             gdtcmd.Service = CACHESERVICE;
4642             gdtcmd.OpCode = GDT_FLUSH;
4643             if (ha->cache_feat & GDT_64BIT) {
4644                 gdtcmd.u.cache64.DeviceNo = i;
4645                 gdtcmd.u.cache64.BlockNo = 1;
4646                 gdtcmd.u.cache64.sg_canz = 0;
4647             } else {
4648                 gdtcmd.u.cache.DeviceNo = i;
4649                 gdtcmd.u.cache.BlockNo = 1;
4650                 gdtcmd.u.cache.sg_canz = 0;
4651             }
4652             TRACE2(("gdth_flush(): flush ha %d drive %d\n", ha->hanum, i));
4653
4654             gdth_execute(ha->shost, &gdtcmd, cmnd, 30, NULL);
4655         }
4656     }
4657 }
4658
4659 /* configure lun */
4660 static int gdth_slave_configure(struct scsi_device *sdev)
4661 {
4662     sdev->skip_ms_page_3f = 1;
4663     sdev->skip_ms_page_8 = 1;
4664     return 0;
4665 }
4666
4667 static struct scsi_host_template gdth_template = {
4668         .name                   = "GDT SCSI Disk Array Controller",
4669         .info                   = gdth_info,
4670         .queuecommand           = gdth_queuecommand,
4671         .eh_bus_reset_handler   = gdth_eh_bus_reset,
4672         .slave_configure        = gdth_slave_configure,
4673         .bios_param             = gdth_bios_param,
4674         .show_info              = gdth_show_info,
4675         .write_info             = gdth_set_info,
4676         .eh_timed_out           = gdth_timed_out,
4677         .proc_name              = "gdth",
4678         .can_queue              = GDTH_MAXCMDS,
4679         .this_id                = -1,
4680         .sg_tablesize           = GDTH_MAXSG,
4681         .cmd_per_lun            = GDTH_MAXC_P_L,
4682         .unchecked_isa_dma      = 1,
4683         .use_clustering         = ENABLE_CLUSTERING,
4684         .no_write_same          = 1,
4685 };
4686
4687 #ifdef CONFIG_ISA
4688 static int __init gdth_isa_probe_one(u32 isa_bios)
4689 {
4690         struct Scsi_Host *shp;
4691         gdth_ha_str *ha;
4692         dma_addr_t scratch_dma_handle = 0;
4693         int error, i;
4694
4695         if (!gdth_search_isa(isa_bios))
4696                 return -ENXIO;
4697
4698         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4699         if (!shp)
4700                 return -ENOMEM;
4701         ha = shost_priv(shp);
4702
4703         error = -ENODEV;
4704         if (!gdth_init_isa(isa_bios,ha))
4705                 goto out_host_put;
4706
4707         /* controller found and initialized */
4708         printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4709                 isa_bios, ha->irq, ha->drq);
4710
4711         error = request_irq(ha->irq, gdth_interrupt, 0, "gdth", ha);
4712         if (error) {
4713                 printk("GDT-ISA: Unable to allocate IRQ\n");
4714                 goto out_host_put;
4715         }
4716
4717         error = request_dma(ha->drq, "gdth");
4718         if (error) {
4719                 printk("GDT-ISA: Unable to allocate DMA channel\n");
4720                 goto out_free_irq;
4721         }
4722
4723         set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4724         enable_dma(ha->drq);
4725         shp->unchecked_isa_dma = 1;
4726         shp->irq = ha->irq;
4727         shp->dma_channel = ha->drq;
4728
4729         ha->hanum = gdth_ctr_count++;
4730         ha->shost = shp;
4731
4732         ha->pccb = &ha->cmdext;
4733         ha->ccb_phys = 0L;
4734         ha->pdev = NULL;
4735
4736         error = -ENOMEM;
4737
4738         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4739                                                 &scratch_dma_handle);
4740         if (!ha->pscratch)
4741                 goto out_dec_counters;
4742         ha->scratch_phys = scratch_dma_handle;
4743
4744         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4745                                                 &scratch_dma_handle);
4746         if (!ha->pmsg)
4747                 goto out_free_pscratch;
4748         ha->msg_phys = scratch_dma_handle;
4749
4750 #ifdef INT_COAL
4751         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4752                                 sizeof(gdth_coal_status) * MAXOFFSETS,
4753                                 &scratch_dma_handle);
4754         if (!ha->coal_stat)
4755                 goto out_free_pmsg;
4756         ha->coal_stat_phys = scratch_dma_handle;
4757 #endif
4758
4759         ha->scratch_busy = FALSE;
4760         ha->req_first = NULL;
4761         ha->tid_cnt = MAX_HDRIVES;
4762         if (max_ids > 0 && max_ids < ha->tid_cnt)
4763                 ha->tid_cnt = max_ids;
4764         for (i = 0; i < GDTH_MAXCMDS; ++i)
4765                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4766         ha->scan_mode = rescan ? 0x10 : 0;
4767
4768         error = -ENODEV;
4769         if (!gdth_search_drives(ha)) {
4770                 printk("GDT-ISA: Error during device scan\n");
4771                 goto out_free_coal_stat;
4772         }
4773
4774         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4775                 hdr_channel = ha->bus_cnt;
4776         ha->virt_bus = hdr_channel;
4777
4778         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4779                 shp->max_cmd_len = 16;
4780
4781         shp->max_id      = ha->tid_cnt;
4782         shp->max_lun     = MAXLUN;
4783         shp->max_channel = ha->bus_cnt;
4784
4785         spin_lock_init(&ha->smp_lock);
4786         gdth_enable_int(ha);
4787
4788         error = scsi_add_host(shp, NULL);
4789         if (error)
4790                 goto out_free_coal_stat;
4791         list_add_tail(&ha->list, &gdth_instances);
4792         gdth_timer_init();
4793
4794         scsi_scan_host(shp);
4795
4796         return 0;
4797
4798  out_free_coal_stat:
4799 #ifdef INT_COAL
4800         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4801                                 ha->coal_stat, ha->coal_stat_phys);
4802  out_free_pmsg:
4803 #endif
4804         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4805                                 ha->pmsg, ha->msg_phys);
4806  out_free_pscratch:
4807         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4808                                 ha->pscratch, ha->scratch_phys);
4809  out_dec_counters:
4810         gdth_ctr_count--;
4811  out_free_irq:
4812         free_irq(ha->irq, ha);
4813  out_host_put:
4814         scsi_host_put(shp);
4815         return error;
4816 }
4817 #endif /* CONFIG_ISA */
4818
4819 #ifdef CONFIG_EISA
4820 static int __init gdth_eisa_probe_one(u16 eisa_slot)
4821 {
4822         struct Scsi_Host *shp;
4823         gdth_ha_str *ha;
4824         dma_addr_t scratch_dma_handle = 0;
4825         int error, i;
4826
4827         if (!gdth_search_eisa(eisa_slot))
4828                 return -ENXIO;
4829
4830         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4831         if (!shp)
4832                 return -ENOMEM;
4833         ha = shost_priv(shp);
4834
4835         error = -ENODEV;
4836         if (!gdth_init_eisa(eisa_slot,ha))
4837                 goto out_host_put;
4838
4839         /* controller found and initialized */
4840         printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4841                 eisa_slot >> 12, ha->irq);
4842
4843         error = request_irq(ha->irq, gdth_interrupt, 0, "gdth", ha);
4844         if (error) {
4845                 printk("GDT-EISA: Unable to allocate IRQ\n");
4846                 goto out_host_put;
4847         }
4848
4849         shp->unchecked_isa_dma = 0;
4850         shp->irq = ha->irq;
4851         shp->dma_channel = 0xff;
4852
4853         ha->hanum = gdth_ctr_count++;
4854         ha->shost = shp;
4855
4856         TRACE2(("EISA detect Bus 0: hanum %d\n", ha->hanum));
4857
4858         ha->pccb = &ha->cmdext;
4859         ha->ccb_phys = 0L;
4860
4861         error = -ENOMEM;
4862
4863         ha->pdev = NULL;
4864         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4865                                                 &scratch_dma_handle);
4866         if (!ha->pscratch)
4867                 goto out_free_irq;
4868         ha->scratch_phys = scratch_dma_handle;
4869
4870         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4871                                                 &scratch_dma_handle);
4872         if (!ha->pmsg)
4873                 goto out_free_pscratch;
4874         ha->msg_phys = scratch_dma_handle;
4875
4876 #ifdef INT_COAL
4877         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4878                         sizeof(gdth_coal_status) * MAXOFFSETS,
4879                         &scratch_dma_handle);
4880         if (!ha->coal_stat)
4881                 goto out_free_pmsg;
4882         ha->coal_stat_phys = scratch_dma_handle;
4883 #endif
4884
4885         ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
4886                         sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
4887         if (!ha->ccb_phys)
4888                 goto out_free_coal_stat;
4889
4890         ha->scratch_busy = FALSE;
4891         ha->req_first = NULL;
4892         ha->tid_cnt = MAX_HDRIVES;
4893         if (max_ids > 0 && max_ids < ha->tid_cnt)
4894                 ha->tid_cnt = max_ids;
4895         for (i = 0; i < GDTH_MAXCMDS; ++i)
4896                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4897         ha->scan_mode = rescan ? 0x10 : 0;
4898
4899         if (!gdth_search_drives(ha)) {
4900                 printk("GDT-EISA: Error during device scan\n");
4901                 error = -ENODEV;
4902                 goto out_free_ccb_phys;
4903         }
4904
4905         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4906                 hdr_channel = ha->bus_cnt;
4907         ha->virt_bus = hdr_channel;
4908
4909         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4910                 shp->max_cmd_len = 16;
4911
4912         shp->max_id      = ha->tid_cnt;
4913         shp->max_lun     = MAXLUN;
4914         shp->max_channel = ha->bus_cnt;
4915
4916         spin_lock_init(&ha->smp_lock);
4917         gdth_enable_int(ha);
4918
4919         error = scsi_add_host(shp, NULL);
4920         if (error)
4921                 goto out_free_ccb_phys;
4922         list_add_tail(&ha->list, &gdth_instances);
4923         gdth_timer_init();
4924
4925         scsi_scan_host(shp);
4926
4927         return 0;
4928
4929  out_free_ccb_phys:
4930         pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
4931                         PCI_DMA_BIDIRECTIONAL);
4932  out_free_coal_stat:
4933 #ifdef INT_COAL
4934         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4935                                 ha->coal_stat, ha->coal_stat_phys);
4936  out_free_pmsg:
4937 #endif
4938         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4939                                 ha->pmsg, ha->msg_phys);
4940  out_free_pscratch:
4941         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4942                                 ha->pscratch, ha->scratch_phys);
4943  out_free_irq:
4944         free_irq(ha->irq, ha);
4945         gdth_ctr_count--;
4946  out_host_put:
4947         scsi_host_put(shp);
4948         return error;
4949 }
4950 #endif /* CONFIG_EISA */
4951
4952 #ifdef CONFIG_PCI
4953 static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out)
4954 {
4955         struct Scsi_Host *shp;
4956         gdth_ha_str *ha;
4957         dma_addr_t scratch_dma_handle = 0;
4958         int error, i;
4959         struct pci_dev *pdev = pcistr->pdev;
4960
4961         *ha_out = NULL;
4962
4963         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4964         if (!shp)
4965                 return -ENOMEM;
4966         ha = shost_priv(shp);
4967
4968         error = -ENODEV;
4969         if (!gdth_init_pci(pdev, pcistr, ha))
4970                 goto out_host_put;
4971
4972         /* controller found and initialized */
4973         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4974                 pdev->bus->number,
4975                 PCI_SLOT(pdev->devfn),
4976                 ha->irq);
4977
4978         error = request_irq(ha->irq, gdth_interrupt,
4979                                 IRQF_SHARED, "gdth", ha);
4980         if (error) {
4981                 printk("GDT-PCI: Unable to allocate IRQ\n");
4982                 goto out_host_put;
4983         }
4984
4985         shp->unchecked_isa_dma = 0;
4986         shp->irq = ha->irq;
4987         shp->dma_channel = 0xff;
4988
4989         ha->hanum = gdth_ctr_count++;
4990         ha->shost = shp;
4991
4992         ha->pccb = &ha->cmdext;
4993         ha->ccb_phys = 0L;
4994
4995         error = -ENOMEM;
4996
4997         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4998                                                 &scratch_dma_handle);
4999         if (!ha->pscratch)
5000                 goto out_free_irq;
5001         ha->scratch_phys = scratch_dma_handle;
5002
5003         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5004                                         &scratch_dma_handle);
5005         if (!ha->pmsg)
5006                 goto out_free_pscratch;
5007         ha->msg_phys = scratch_dma_handle;
5008
5009 #ifdef INT_COAL
5010         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5011                         sizeof(gdth_coal_status) * MAXOFFSETS,
5012                         &scratch_dma_handle);
5013         if (!ha->coal_stat)
5014                 goto out_free_pmsg;
5015         ha->coal_stat_phys = scratch_dma_handle;
5016 #endif
5017
5018         ha->scratch_busy = FALSE;
5019         ha->req_first = NULL;
5020         ha->tid_cnt = pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
5021         if (max_ids > 0 && max_ids < ha->tid_cnt)
5022                 ha->tid_cnt = max_ids;
5023         for (i = 0; i < GDTH_MAXCMDS; ++i)
5024                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5025         ha->scan_mode = rescan ? 0x10 : 0;
5026
5027         error = -ENODEV;
5028         if (!gdth_search_drives(ha)) {
5029                 printk("GDT-PCI %d: Error during device scan\n", ha->hanum);
5030                 goto out_free_coal_stat;
5031         }
5032
5033         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5034                 hdr_channel = ha->bus_cnt;
5035         ha->virt_bus = hdr_channel;
5036
5037         /* 64-bit DMA only supported from FW >= x.43 */
5038         if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5039             !ha->dma64_support) {
5040                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
5041                         printk(KERN_WARNING "GDT-PCI %d: "
5042                                 "Unable to set 32-bit DMA\n", ha->hanum);
5043                                 goto out_free_coal_stat;
5044                 }
5045         } else {
5046                 shp->max_cmd_len = 16;
5047                 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
5048                         printk("GDT-PCI %d: 64-bit DMA enabled\n", ha->hanum);
5049                 } else if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
5050                         printk(KERN_WARNING "GDT-PCI %d: "
5051                                 "Unable to set 64/32-bit DMA\n", ha->hanum);
5052                         goto out_free_coal_stat;
5053                 }
5054         }
5055
5056         shp->max_id      = ha->tid_cnt;
5057         shp->max_lun     = MAXLUN;
5058         shp->max_channel = ha->bus_cnt;
5059
5060         spin_lock_init(&ha->smp_lock);
5061         gdth_enable_int(ha);
5062
5063         error = scsi_add_host(shp, &pdev->dev);
5064         if (error)
5065                 goto out_free_coal_stat;
5066         list_add_tail(&ha->list, &gdth_instances);
5067
5068         pci_set_drvdata(ha->pdev, ha);
5069         gdth_timer_init();
5070
5071         scsi_scan_host(shp);
5072
5073         *ha_out = ha;
5074
5075         return 0;
5076
5077  out_free_coal_stat:
5078 #ifdef INT_COAL
5079         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5080                                 ha->coal_stat, ha->coal_stat_phys);
5081  out_free_pmsg:
5082 #endif
5083         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5084                                 ha->pmsg, ha->msg_phys);
5085  out_free_pscratch:
5086         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5087                                 ha->pscratch, ha->scratch_phys);
5088  out_free_irq:
5089         free_irq(ha->irq, ha);
5090         gdth_ctr_count--;
5091  out_host_put:
5092         scsi_host_put(shp);
5093         return error;
5094 }
5095 #endif /* CONFIG_PCI */
5096
5097 static void gdth_remove_one(gdth_ha_str *ha)
5098 {
5099         struct Scsi_Host *shp = ha->shost;
5100
5101         TRACE2(("gdth_remove_one()\n"));
5102
5103         scsi_remove_host(shp);
5104
5105         gdth_flush(ha);
5106
5107         if (ha->sdev) {
5108                 scsi_free_host_dev(ha->sdev);
5109                 ha->sdev = NULL;
5110         }
5111
5112         if (shp->irq)
5113                 free_irq(shp->irq,ha);
5114
5115 #ifdef CONFIG_ISA
5116         if (shp->dma_channel != 0xff)
5117                 free_dma(shp->dma_channel);
5118 #endif
5119 #ifdef INT_COAL
5120         if (ha->coal_stat)
5121                 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
5122                         MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
5123 #endif
5124         if (ha->pscratch)
5125                 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5126                         ha->pscratch, ha->scratch_phys);
5127         if (ha->pmsg)
5128                 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5129                         ha->pmsg, ha->msg_phys);
5130         if (ha->ccb_phys)
5131                 pci_unmap_single(ha->pdev,ha->ccb_phys,
5132                         sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
5133
5134         scsi_host_put(shp);
5135 }
5136
5137 static int gdth_halt(struct notifier_block *nb, unsigned long event, void *buf)
5138 {
5139         gdth_ha_str *ha;
5140
5141         TRACE2(("gdth_halt() event %d\n", (int)event));
5142         if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5143                 return NOTIFY_DONE;
5144
5145         list_for_each_entry(ha, &gdth_instances, list)
5146                 gdth_flush(ha);
5147
5148         return NOTIFY_OK;
5149 }
5150
5151 static struct notifier_block gdth_notifier = {
5152     gdth_halt, NULL, 0
5153 };
5154
5155 static int __init gdth_init(void)
5156 {
5157         if (disable) {
5158                 printk("GDT-HA: Controller driver disabled from"
5159                        " command line !\n");
5160                 return 0;
5161         }
5162
5163         printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",
5164                GDTH_VERSION_STR);
5165
5166         /* initializations */
5167         gdth_polling = TRUE;
5168         gdth_clear_events();
5169         timer_setup(&gdth_timer, gdth_timeout, 0);
5170
5171         /* As default we do not probe for EISA or ISA controllers */
5172         if (probe_eisa_isa) {
5173                 /* scanning for controllers, at first: ISA controller */
5174 #ifdef CONFIG_ISA
5175                 u32 isa_bios;
5176                 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
5177                                 isa_bios += 0x8000UL)
5178                         gdth_isa_probe_one(isa_bios);
5179 #endif
5180 #ifdef CONFIG_EISA
5181                 {
5182                         u16 eisa_slot;
5183                         for (eisa_slot = 0x1000; eisa_slot <= 0x8000;
5184                                                  eisa_slot += 0x1000)
5185                                 gdth_eisa_probe_one(eisa_slot);
5186                 }
5187 #endif
5188         }
5189
5190 #ifdef CONFIG_PCI
5191         /* scanning for PCI controllers */
5192         if (pci_register_driver(&gdth_pci_driver)) {
5193                 gdth_ha_str *ha;
5194
5195                 list_for_each_entry(ha, &gdth_instances, list)
5196                         gdth_remove_one(ha);
5197                 return -ENODEV;
5198         }
5199 #endif /* CONFIG_PCI */
5200
5201         TRACE2(("gdth_detect() %d controller detected\n", gdth_ctr_count));
5202
5203         major = register_chrdev(0,"gdth", &gdth_fops);
5204         register_reboot_notifier(&gdth_notifier);
5205         gdth_polling = FALSE;
5206         return 0;
5207 }
5208
5209 static void __exit gdth_exit(void)
5210 {
5211         gdth_ha_str *ha;
5212
5213         unregister_chrdev(major, "gdth");
5214         unregister_reboot_notifier(&gdth_notifier);
5215
5216 #ifdef GDTH_STATISTICS
5217         del_timer_sync(&gdth_timer);
5218 #endif
5219
5220 #ifdef CONFIG_PCI
5221         pci_unregister_driver(&gdth_pci_driver);
5222 #endif
5223
5224         list_for_each_entry(ha, &gdth_instances, list)
5225                 gdth_remove_one(ha);
5226 }
5227
5228 module_init(gdth_init);
5229 module_exit(gdth_exit);
5230
5231 #ifndef MODULE
5232 __setup("gdth=", option_setup);
5233 #endif