2 * Copyright 2017 Broadcom. All Rights Reserved.
3 * The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@broadcom.com
15 #include <linux/reboot.h>
16 #include <linux/delay.h>
17 #include <linux/slab.h>
18 #include <linux/interrupt.h>
19 #include <linux/blkdev.h>
20 #include <linux/pci.h>
21 #include <linux/string.h>
22 #include <linux/kernel.h>
23 #include <linux/semaphore.h>
24 #include <linux/iscsi_boot_sysfs.h>
25 #include <linux/module.h>
26 #include <linux/bsg-lib.h>
27 #include <linux/irq_poll.h>
29 #include <scsi/libiscsi.h>
30 #include <scsi/scsi_bsg_iscsi.h>
31 #include <scsi/scsi_netlink.h>
32 #include <scsi/scsi_transport_iscsi.h>
33 #include <scsi/scsi_transport.h>
34 #include <scsi/scsi_cmnd.h>
35 #include <scsi/scsi_device.h>
36 #include <scsi/scsi_host.h>
37 #include <scsi/scsi.h>
43 static unsigned int be_iopoll_budget = 10;
44 static unsigned int be_max_phys_size = 64;
45 static unsigned int enable_msix = 1;
47 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
48 MODULE_VERSION(BUILD_STR);
49 MODULE_AUTHOR("Emulex Corporation");
50 MODULE_LICENSE("GPL");
51 module_param(be_iopoll_budget, int, 0);
52 module_param(enable_msix, int, 0);
53 module_param(be_max_phys_size, uint, S_IRUGO);
54 MODULE_PARM_DESC(be_max_phys_size,
55 "Maximum Size (In Kilobytes) of physically contiguous "
56 "memory that can be allocated. Range is 16 - 128");
58 #define beiscsi_disp_param(_name)\
60 beiscsi_##_name##_disp(struct device *dev,\
61 struct device_attribute *attrib, char *buf) \
63 struct Scsi_Host *shost = class_to_shost(dev);\
64 struct beiscsi_hba *phba = iscsi_host_priv(shost); \
65 return snprintf(buf, PAGE_SIZE, "%d\n",\
69 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
71 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
73 if (val >= _minval && val <= _maxval) {\
74 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
75 "BA_%d : beiscsi_"#_name" updated "\
76 "from 0x%x ==> 0x%x\n",\
77 phba->attr_##_name, val); \
78 phba->attr_##_name = val;\
81 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
82 "BA_%d beiscsi_"#_name" attribute "\
83 "cannot be updated to 0x%x, "\
84 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
88 #define beiscsi_store_param(_name) \
90 beiscsi_##_name##_store(struct device *dev,\
91 struct device_attribute *attr, const char *buf,\
94 struct Scsi_Host *shost = class_to_shost(dev);\
95 struct beiscsi_hba *phba = iscsi_host_priv(shost);\
96 uint32_t param_val = 0;\
97 if (!isdigit(buf[0]))\
99 if (sscanf(buf, "%i", ¶m_val) != 1)\
101 if (beiscsi_##_name##_change(phba, param_val) == 0) \
107 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
109 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
111 if (val >= _minval && val <= _maxval) {\
112 phba->attr_##_name = val;\
115 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
116 "BA_%d beiscsi_"#_name" attribute " \
117 "cannot be updated to 0x%x, "\
118 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
119 phba->attr_##_name = _defval;\
123 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
124 static uint beiscsi_##_name = _defval;\
125 module_param(beiscsi_##_name, uint, S_IRUGO);\
126 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
127 beiscsi_disp_param(_name)\
128 beiscsi_change_param(_name, _minval, _maxval, _defval)\
129 beiscsi_store_param(_name)\
130 beiscsi_init_param(_name, _minval, _maxval, _defval)\
131 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
132 beiscsi_##_name##_disp, beiscsi_##_name##_store)
135 * When new log level added update the
136 * the MAX allowed value for log_enable
138 BEISCSI_RW_ATTR(log_enable, 0x00,
139 0xFF, 0x00, "Enable logging Bit Mask\n"
140 "\t\t\t\tInitialization Events : 0x01\n"
141 "\t\t\t\tMailbox Events : 0x02\n"
142 "\t\t\t\tMiscellaneous Events : 0x04\n"
143 "\t\t\t\tError Handling : 0x08\n"
144 "\t\t\t\tIO Path Events : 0x10\n"
145 "\t\t\t\tConfiguration Path : 0x20\n"
146 "\t\t\t\tiSCSI Protocol : 0x40\n");
148 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
149 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
150 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
151 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
152 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
153 beiscsi_active_session_disp, NULL);
154 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
155 beiscsi_free_session_disp, NULL);
156 struct device_attribute *beiscsi_attrs[] = {
157 &dev_attr_beiscsi_log_enable,
158 &dev_attr_beiscsi_drvr_ver,
159 &dev_attr_beiscsi_adapter_family,
160 &dev_attr_beiscsi_fw_ver,
161 &dev_attr_beiscsi_active_session_count,
162 &dev_attr_beiscsi_free_session_count,
163 &dev_attr_beiscsi_phys_port,
167 static char const *cqe_desc[] = {
170 "SOL_CMD_KILLED_DATA_DIGEST_ERR",
171 "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
172 "CXN_KILLED_BURST_LEN_MISMATCH",
173 "CXN_KILLED_AHS_RCVD",
174 "CXN_KILLED_HDR_DIGEST_ERR",
175 "CXN_KILLED_UNKNOWN_HDR",
176 "CXN_KILLED_STALE_ITT_TTT_RCVD",
177 "CXN_KILLED_INVALID_ITT_TTT_RCVD",
178 "CXN_KILLED_RST_RCVD",
179 "CXN_KILLED_TIMED_OUT",
180 "CXN_KILLED_RST_SENT",
181 "CXN_KILLED_FIN_RCVD",
182 "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
183 "CXN_KILLED_BAD_WRB_INDEX_ERROR",
184 "CXN_KILLED_OVER_RUN_RESIDUAL",
185 "CXN_KILLED_UNDER_RUN_RESIDUAL",
186 "CMD_KILLED_INVALID_STATSN_RCVD",
187 "CMD_KILLED_INVALID_R2T_RCVD",
188 "CMD_CXN_KILLED_LUN_INVALID",
189 "CMD_CXN_KILLED_ICD_INVALID",
190 "CMD_CXN_KILLED_ITT_INVALID",
191 "CMD_CXN_KILLED_SEQ_OUTOFORDER",
192 "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
193 "CXN_INVALIDATE_NOTIFY",
194 "CXN_INVALIDATE_INDEX_NOTIFY",
195 "CMD_INVALIDATED_NOTIFY",
198 "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
200 "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
201 "SOL_CMD_KILLED_DIF_ERR",
202 "CXN_KILLED_SYN_RCVD",
203 "CXN_KILLED_IMM_DATA_RCVD"
206 static int beiscsi_slave_configure(struct scsi_device *sdev)
208 blk_queue_max_segment_size(sdev->request_queue, 65536);
212 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
214 struct iscsi_task *abrt_task = (struct iscsi_task *)sc->SCp.ptr;
215 struct iscsi_cls_session *cls_session;
216 struct beiscsi_io_task *abrt_io_task;
217 struct beiscsi_conn *beiscsi_conn;
218 struct iscsi_session *session;
219 struct invldt_cmd_tbl inv_tbl;
220 struct beiscsi_hba *phba;
221 struct iscsi_conn *conn;
224 cls_session = starget_to_session(scsi_target(sc->device));
225 session = cls_session->dd_data;
227 /* check if we raced, task just got cleaned up under us */
228 spin_lock_bh(&session->back_lock);
229 if (!abrt_task || !abrt_task->sc) {
230 spin_unlock_bh(&session->back_lock);
233 /* get a task ref till FW processes the req for the ICD used */
234 __iscsi_get_task(abrt_task);
235 abrt_io_task = abrt_task->dd_data;
236 conn = abrt_task->conn;
237 beiscsi_conn = conn->dd_data;
238 phba = beiscsi_conn->phba;
239 /* mark WRB invalid which have been not processed by FW yet */
240 if (is_chip_be2_be3r(phba)) {
241 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
242 abrt_io_task->pwrb_handle->pwrb, 1);
244 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
245 abrt_io_task->pwrb_handle->pwrb, 1);
247 inv_tbl.cid = beiscsi_conn->beiscsi_conn_cid;
248 inv_tbl.icd = abrt_io_task->psgl_handle->sgl_index;
249 spin_unlock_bh(&session->back_lock);
251 rc = beiscsi_mgmt_invalidate_icds(phba, &inv_tbl, 1);
252 iscsi_put_task(abrt_task);
254 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
255 "BM_%d : sc %p invalidation failed %d\n",
260 return iscsi_eh_abort(sc);
263 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
265 struct beiscsi_invldt_cmd_tbl {
266 struct invldt_cmd_tbl tbl[BE_INVLDT_CMD_TBL_SZ];
267 struct iscsi_task *task[BE_INVLDT_CMD_TBL_SZ];
269 struct iscsi_cls_session *cls_session;
270 struct beiscsi_conn *beiscsi_conn;
271 struct beiscsi_io_task *io_task;
272 struct iscsi_session *session;
273 struct beiscsi_hba *phba;
274 struct iscsi_conn *conn;
275 struct iscsi_task *task;
276 unsigned int i, nents;
279 cls_session = starget_to_session(scsi_target(sc->device));
280 session = cls_session->dd_data;
282 spin_lock_bh(&session->frwd_lock);
283 if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
284 spin_unlock_bh(&session->frwd_lock);
288 conn = session->leadconn;
289 beiscsi_conn = conn->dd_data;
290 phba = beiscsi_conn->phba;
292 inv_tbl = kzalloc(sizeof(*inv_tbl), GFP_ATOMIC);
294 spin_unlock_bh(&session->frwd_lock);
295 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
296 "BM_%d : invldt_cmd_tbl alloc failed\n");
300 /* take back_lock to prevent task from getting cleaned up under us */
301 spin_lock(&session->back_lock);
302 for (i = 0; i < conn->session->cmds_max; i++) {
303 task = conn->session->cmds[i];
307 if (sc->device->lun != task->sc->device->lun)
310 * Can't fit in more cmds? Normally this won't happen b'coz
311 * BEISCSI_CMD_PER_LUN is same as BE_INVLDT_CMD_TBL_SZ.
313 if (nents == BE_INVLDT_CMD_TBL_SZ) {
318 /* get a task ref till FW processes the req for the ICD used */
319 __iscsi_get_task(task);
320 io_task = task->dd_data;
321 /* mark WRB invalid which have been not processed by FW yet */
322 if (is_chip_be2_be3r(phba)) {
323 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
324 io_task->pwrb_handle->pwrb, 1);
326 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
327 io_task->pwrb_handle->pwrb, 1);
330 inv_tbl->tbl[nents].cid = beiscsi_conn->beiscsi_conn_cid;
331 inv_tbl->tbl[nents].icd = io_task->psgl_handle->sgl_index;
332 inv_tbl->task[nents] = task;
335 spin_unlock(&session->back_lock);
336 spin_unlock_bh(&session->frwd_lock);
343 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
344 "BM_%d : number of cmds exceeds size of invalidation table\n");
349 if (beiscsi_mgmt_invalidate_icds(phba, &inv_tbl->tbl[0], nents)) {
350 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
351 "BM_%d : cid %u scmds invalidation failed\n",
352 beiscsi_conn->beiscsi_conn_cid);
357 for (i = 0; i < nents; i++)
358 iscsi_put_task(inv_tbl->task[i]);
362 rc = iscsi_eh_device_reset(sc);
366 /*------------------- PCI Driver operations and data ----------------- */
367 static const struct pci_device_id beiscsi_pci_id_table[] = {
368 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
369 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
370 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
371 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
372 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
373 { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
376 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
379 static struct scsi_host_template beiscsi_sht = {
380 .module = THIS_MODULE,
381 .name = "Emulex 10Gbe open-iscsi Initiator Driver",
382 .proc_name = DRV_NAME,
383 .queuecommand = iscsi_queuecommand,
384 .change_queue_depth = scsi_change_queue_depth,
385 .slave_configure = beiscsi_slave_configure,
386 .target_alloc = iscsi_target_alloc,
387 .eh_timed_out = iscsi_eh_cmd_timed_out,
388 .eh_abort_handler = beiscsi_eh_abort,
389 .eh_device_reset_handler = beiscsi_eh_device_reset,
390 .eh_target_reset_handler = iscsi_eh_session_reset,
391 .shost_attrs = beiscsi_attrs,
392 .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
393 .can_queue = BE2_IO_DEPTH,
395 .max_sectors = BEISCSI_MAX_SECTORS,
396 .cmd_per_lun = BEISCSI_CMD_PER_LUN,
397 .use_clustering = ENABLE_CLUSTERING,
398 .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
399 .track_queue_depth = 1,
402 static struct scsi_transport_template *beiscsi_scsi_transport;
404 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
406 struct beiscsi_hba *phba;
407 struct Scsi_Host *shost;
409 shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
411 dev_err(&pcidev->dev,
412 "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
415 shost->max_id = BE2_MAX_SESSIONS - 1;
416 shost->max_channel = 0;
417 shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
418 shost->max_lun = BEISCSI_NUM_MAX_LUN;
419 shost->transportt = beiscsi_scsi_transport;
420 phba = iscsi_host_priv(shost);
421 memset(phba, 0, sizeof(*phba));
423 phba->pcidev = pci_dev_get(pcidev);
424 pci_set_drvdata(pcidev, phba);
425 phba->interface_handle = 0xFFFFFFFF;
430 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
433 iounmap(phba->csr_va);
437 iounmap(phba->db_va);
441 iounmap(phba->pci_va);
446 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
447 struct pci_dev *pcidev)
452 addr = ioremap_nocache(pci_resource_start(pcidev, 2),
453 pci_resource_len(pcidev, 2));
456 phba->ctrl.csr = addr;
458 phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
460 addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
463 phba->ctrl.db = addr;
465 phba->db_pa.u.a64.address = pci_resource_start(pcidev, 4);
467 if (phba->generation == BE_GEN2)
472 addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
473 pci_resource_len(pcidev, pcicfg_reg));
477 phba->ctrl.pcicfg = addr;
479 phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
483 beiscsi_unmap_pci_function(phba);
487 static int beiscsi_enable_pci(struct pci_dev *pcidev)
491 ret = pci_enable_device(pcidev);
493 dev_err(&pcidev->dev,
494 "beiscsi_enable_pci - enable device failed\n");
498 ret = pci_request_regions(pcidev, DRV_NAME);
500 dev_err(&pcidev->dev,
501 "beiscsi_enable_pci - request region failed\n");
502 goto pci_dev_disable;
505 pci_set_master(pcidev);
506 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
508 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
510 dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
511 goto pci_region_release;
513 ret = pci_set_consistent_dma_mask(pcidev,
517 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
519 dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
520 goto pci_region_release;
526 pci_release_regions(pcidev);
528 pci_disable_device(pcidev);
533 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
535 struct be_ctrl_info *ctrl = &phba->ctrl;
536 struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
537 struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
541 status = beiscsi_map_pci_bars(phba, pdev);
544 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
545 mbox_mem_alloc->va = pci_alloc_consistent(pdev,
546 mbox_mem_alloc->size,
547 &mbox_mem_alloc->dma);
548 if (!mbox_mem_alloc->va) {
549 beiscsi_unmap_pci_function(phba);
553 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
554 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
555 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
556 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
557 mutex_init(&ctrl->mbox_lock);
558 spin_lock_init(&phba->ctrl.mcc_lock);
564 * beiscsi_get_params()- Set the config paramters
565 * @phba: ptr device priv structure
567 static void beiscsi_get_params(struct beiscsi_hba *phba)
569 uint32_t total_cid_count = 0;
570 uint32_t total_icd_count = 0;
573 total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
574 BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
576 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
577 uint32_t align_mask = 0;
578 uint32_t icd_post_per_page = 0;
579 uint32_t icd_count_unavailable = 0;
580 uint32_t icd_start = 0, icd_count = 0;
581 uint32_t icd_start_align = 0, icd_count_align = 0;
583 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
584 icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
585 icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
587 /* Get ICD count that can be posted on each page */
588 icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
589 sizeof(struct iscsi_sge)));
590 align_mask = (icd_post_per_page - 1);
592 /* Check if icd_start is aligned ICD per page posting */
593 if (icd_start % icd_post_per_page) {
594 icd_start_align = ((icd_start +
598 iscsi_icd_start[ulp_num] =
602 icd_count_align = (icd_count & ~align_mask);
604 /* ICD discarded in the process of alignment */
606 icd_count_unavailable = ((icd_start_align -
611 /* Updated ICD count available */
612 phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
613 icd_count_unavailable);
615 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
616 "BM_%d : Aligned ICD values\n"
617 "\t ICD Start : %d\n"
618 "\t ICD Count : %d\n"
619 "\t ICD Discarded : %d\n",
621 iscsi_icd_start[ulp_num],
623 iscsi_icd_count[ulp_num],
624 icd_count_unavailable);
629 total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
630 phba->params.ios_per_ctrl = (total_icd_count -
632 BE2_TMFS + BE2_NOPOUT_REQ));
633 phba->params.cxns_per_ctrl = total_cid_count;
634 phba->params.icds_per_ctrl = total_icd_count;
635 phba->params.num_sge_per_io = BE2_SGE;
636 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
637 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
638 phba->params.num_eq_entries = 1024;
639 phba->params.num_cq_entries = 1024;
640 phba->params.wrbs_per_cxn = 256;
643 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
644 unsigned int id, unsigned int clr_interrupt,
645 unsigned int num_processed,
646 unsigned char rearm, unsigned char event)
651 val |= 1 << DB_EQ_REARM_SHIFT;
653 val |= 1 << DB_EQ_CLR_SHIFT;
655 val |= 1 << DB_EQ_EVNT_SHIFT;
657 val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
658 /* Setting lower order EQ_ID Bits */
659 val |= (id & DB_EQ_RING_ID_LOW_MASK);
661 /* Setting Higher order EQ_ID Bits */
662 val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
663 DB_EQ_RING_ID_HIGH_MASK)
664 << DB_EQ_HIGH_SET_SHIFT);
666 iowrite32(val, phba->db_va + DB_EQ_OFFSET);
670 * be_isr_mcc - The isr routine of the driver.
672 * @dev_id: Pointer to host adapter structure
674 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
676 struct beiscsi_hba *phba;
677 struct be_eq_entry *eqe;
678 struct be_queue_info *eq;
679 struct be_queue_info *mcc;
680 unsigned int mcc_events;
681 struct be_eq_obj *pbe_eq;
686 mcc = &phba->ctrl.mcc_obj.cq;
687 eqe = queue_tail_node(eq);
690 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
692 if (((eqe->dw[offsetof(struct amap_eq_entry,
694 EQE_RESID_MASK) >> 16) == mcc->id) {
697 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
699 eqe = queue_tail_node(eq);
703 queue_work(phba->wq, &pbe_eq->mcc_work);
704 hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1);
710 * be_isr_msix - The isr routine of the driver.
712 * @dev_id: Pointer to host adapter structure
714 static irqreturn_t be_isr_msix(int irq, void *dev_id)
716 struct beiscsi_hba *phba;
717 struct be_queue_info *eq;
718 struct be_eq_obj *pbe_eq;
724 /* disable interrupt till iopoll completes */
725 hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
726 irq_poll_sched(&pbe_eq->iopoll);
732 * be_isr - The isr routine of the driver.
734 * @dev_id: Pointer to host adapter structure
736 static irqreturn_t be_isr(int irq, void *dev_id)
738 struct beiscsi_hba *phba;
739 struct hwi_controller *phwi_ctrlr;
740 struct hwi_context_memory *phwi_context;
741 struct be_eq_entry *eqe;
742 struct be_queue_info *eq;
743 struct be_queue_info *mcc;
744 unsigned int mcc_events, io_events;
745 struct be_ctrl_info *ctrl;
746 struct be_eq_obj *pbe_eq;
751 isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
752 (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
756 phwi_ctrlr = phba->phwi_ctrlr;
757 phwi_context = phwi_ctrlr->phwi_ctxt;
758 pbe_eq = &phwi_context->be_eq[0];
760 eq = &phwi_context->be_eq[0].q;
761 mcc = &phba->ctrl.mcc_obj.cq;
762 eqe = queue_tail_node(eq);
766 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
768 if (((eqe->dw[offsetof(struct amap_eq_entry,
769 resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id)
773 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
775 eqe = queue_tail_node(eq);
777 if (!io_events && !mcc_events)
780 /* no need to rearm if interrupt is only for IOs */
783 queue_work(phba->wq, &pbe_eq->mcc_work);
788 irq_poll_sched(&pbe_eq->iopoll);
789 hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1);
794 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
796 struct pci_dev *pcidev = phba->pcidev;
797 struct hwi_controller *phwi_ctrlr;
798 struct hwi_context_memory *phwi_context;
801 phwi_ctrlr = phba->phwi_ctrlr;
802 phwi_context = phwi_ctrlr->phwi_ctxt;
804 if (pcidev->msix_enabled) {
805 for (i = 0; i < phba->num_cpus; i++) {
806 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
808 if (!phba->msi_name[i]) {
813 sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
814 phba->shost->host_no, i);
815 ret = request_irq(pci_irq_vector(pcidev, i),
816 be_isr_msix, 0, phba->msi_name[i],
817 &phwi_context->be_eq[i]);
819 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
820 "BM_%d : beiscsi_init_irqs-Failed to"
821 "register msix for i = %d\n",
823 kfree(phba->msi_name[i]);
827 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
828 if (!phba->msi_name[i]) {
832 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
833 phba->shost->host_no);
834 ret = request_irq(pci_irq_vector(pcidev, i), be_isr_mcc, 0,
835 phba->msi_name[i], &phwi_context->be_eq[i]);
837 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
838 "BM_%d : beiscsi_init_irqs-"
839 "Failed to register beiscsi_msix_mcc\n");
840 kfree(phba->msi_name[i]);
845 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
848 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
849 "BM_%d : beiscsi_init_irqs-"
850 "Failed to register irq\\n");
856 for (j = i - 1; j >= 0; j--) {
857 free_irq(pci_irq_vector(pcidev, i), &phwi_context->be_eq[j]);
858 kfree(phba->msi_name[j]);
863 void hwi_ring_cq_db(struct beiscsi_hba *phba,
864 unsigned int id, unsigned int num_processed,
870 val |= 1 << DB_CQ_REARM_SHIFT;
872 val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
874 /* Setting lower order CQ_ID Bits */
875 val |= (id & DB_CQ_RING_ID_LOW_MASK);
877 /* Setting Higher order CQ_ID Bits */
878 val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
879 DB_CQ_RING_ID_HIGH_MASK)
880 << DB_CQ_HIGH_SET_SHIFT);
882 iowrite32(val, phba->db_va + DB_CQ_OFFSET);
885 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
887 struct sgl_handle *psgl_handle;
890 spin_lock_irqsave(&phba->io_sgl_lock, flags);
891 if (phba->io_sgl_hndl_avbl) {
892 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
893 "BM_%d : In alloc_io_sgl_handle,"
894 " io_sgl_alloc_index=%d\n",
895 phba->io_sgl_alloc_index);
897 psgl_handle = phba->io_sgl_hndl_base[phba->
899 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
900 phba->io_sgl_hndl_avbl--;
901 if (phba->io_sgl_alloc_index == (phba->params.
903 phba->io_sgl_alloc_index = 0;
905 phba->io_sgl_alloc_index++;
908 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
913 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
917 spin_lock_irqsave(&phba->io_sgl_lock, flags);
918 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
919 "BM_%d : In free_,io_sgl_free_index=%d\n",
920 phba->io_sgl_free_index);
922 if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
924 * this can happen if clean_task is called on a task that
925 * failed in xmit_task or alloc_pdu.
927 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
928 "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
929 "value there=%p\n", phba->io_sgl_free_index,
930 phba->io_sgl_hndl_base
931 [phba->io_sgl_free_index]);
932 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
935 phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
936 phba->io_sgl_hndl_avbl++;
937 if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
938 phba->io_sgl_free_index = 0;
940 phba->io_sgl_free_index++;
941 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
944 static inline struct wrb_handle *
945 beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
946 unsigned int wrbs_per_cxn)
948 struct wrb_handle *pwrb_handle;
951 spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
952 if (!pwrb_context->wrb_handles_available) {
953 spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
956 pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
957 pwrb_context->wrb_handles_available--;
958 if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
959 pwrb_context->alloc_index = 0;
961 pwrb_context->alloc_index++;
962 spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
965 memset(pwrb_handle->pwrb, 0, sizeof(*pwrb_handle->pwrb));
971 * alloc_wrb_handle - To allocate a wrb handle
972 * @phba: The hba pointer
973 * @cid: The cid to use for allocation
974 * @pwrb_context: ptr to ptr to wrb context
976 * This happens under session_lock until submission to chip
978 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
979 struct hwi_wrb_context **pcontext)
981 struct hwi_wrb_context *pwrb_context;
982 struct hwi_controller *phwi_ctrlr;
983 uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
985 phwi_ctrlr = phba->phwi_ctrlr;
986 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
987 /* return the context address */
988 *pcontext = pwrb_context;
989 return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
993 beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
994 struct wrb_handle *pwrb_handle,
995 unsigned int wrbs_per_cxn)
999 spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
1000 pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1001 pwrb_context->wrb_handles_available++;
1002 if (pwrb_context->free_index == (wrbs_per_cxn - 1))
1003 pwrb_context->free_index = 0;
1005 pwrb_context->free_index++;
1006 pwrb_handle->pio_handle = NULL;
1007 spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
1011 * free_wrb_handle - To free the wrb handle back to pool
1012 * @phba: The hba pointer
1013 * @pwrb_context: The context to free from
1014 * @pwrb_handle: The wrb_handle to free
1016 * This happens under session_lock until submission to chip
1019 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1020 struct wrb_handle *pwrb_handle)
1022 beiscsi_put_wrb_handle(pwrb_context,
1024 phba->params.wrbs_per_cxn);
1025 beiscsi_log(phba, KERN_INFO,
1026 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1027 "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1028 "wrb_handles_available=%d\n",
1029 pwrb_handle, pwrb_context->free_index,
1030 pwrb_context->wrb_handles_available);
1033 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1035 struct sgl_handle *psgl_handle;
1036 unsigned long flags;
1038 spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1039 if (phba->eh_sgl_hndl_avbl) {
1040 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1041 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1042 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1043 "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1044 phba->eh_sgl_alloc_index,
1045 phba->eh_sgl_alloc_index);
1047 phba->eh_sgl_hndl_avbl--;
1048 if (phba->eh_sgl_alloc_index ==
1049 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1051 phba->eh_sgl_alloc_index = 0;
1053 phba->eh_sgl_alloc_index++;
1056 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1061 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1063 unsigned long flags;
1065 spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1066 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1067 "BM_%d : In free_mgmt_sgl_handle,"
1068 "eh_sgl_free_index=%d\n",
1069 phba->eh_sgl_free_index);
1071 if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1073 * this can happen if clean_task is called on a task that
1074 * failed in xmit_task or alloc_pdu.
1076 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1077 "BM_%d : Double Free in eh SGL ,"
1078 "eh_sgl_free_index=%d\n",
1079 phba->eh_sgl_free_index);
1080 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1083 phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1084 phba->eh_sgl_hndl_avbl++;
1085 if (phba->eh_sgl_free_index ==
1086 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1087 phba->eh_sgl_free_index = 0;
1089 phba->eh_sgl_free_index++;
1090 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1094 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1095 struct iscsi_task *task,
1096 struct common_sol_cqe *csol_cqe)
1098 struct beiscsi_io_task *io_task = task->dd_data;
1099 struct be_status_bhs *sts_bhs =
1100 (struct be_status_bhs *)io_task->cmd_bhs;
1101 struct iscsi_conn *conn = beiscsi_conn->conn;
1102 unsigned char *sense;
1103 u32 resid = 0, exp_cmdsn, max_cmdsn;
1104 u8 rsp, status, flags;
1106 exp_cmdsn = csol_cqe->exp_cmdsn;
1107 max_cmdsn = (csol_cqe->exp_cmdsn +
1108 csol_cqe->cmd_wnd - 1);
1109 rsp = csol_cqe->i_resp;
1110 status = csol_cqe->i_sts;
1111 flags = csol_cqe->i_flags;
1112 resid = csol_cqe->res_cnt;
1115 if (io_task->scsi_cmnd) {
1116 scsi_dma_unmap(io_task->scsi_cmnd);
1117 io_task->scsi_cmnd = NULL;
1122 task->sc->result = (DID_OK << 16) | status;
1123 if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1124 task->sc->result = DID_ERROR << 16;
1128 /* bidi not initially supported */
1129 if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1130 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1131 task->sc->result = DID_ERROR << 16;
1133 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1134 scsi_set_resid(task->sc, resid);
1135 if (!status && (scsi_bufflen(task->sc) - resid <
1136 task->sc->underflow))
1137 task->sc->result = DID_ERROR << 16;
1141 if (status == SAM_STAT_CHECK_CONDITION) {
1143 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1145 sense = sts_bhs->sense_info + sizeof(unsigned short);
1146 sense_len = be16_to_cpu(*slen);
1147 memcpy(task->sc->sense_buffer, sense,
1148 min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1151 if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1152 conn->rxdata_octets += resid;
1154 if (io_task->scsi_cmnd) {
1155 scsi_dma_unmap(io_task->scsi_cmnd);
1156 io_task->scsi_cmnd = NULL;
1158 iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1162 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1163 struct iscsi_task *task,
1164 struct common_sol_cqe *csol_cqe)
1166 struct iscsi_logout_rsp *hdr;
1167 struct beiscsi_io_task *io_task = task->dd_data;
1168 struct iscsi_conn *conn = beiscsi_conn->conn;
1170 hdr = (struct iscsi_logout_rsp *)task->hdr;
1171 hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1174 hdr->flags = csol_cqe->i_flags;
1175 hdr->response = csol_cqe->i_resp;
1176 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1177 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1178 csol_cqe->cmd_wnd - 1);
1180 hdr->dlength[0] = 0;
1181 hdr->dlength[1] = 0;
1182 hdr->dlength[2] = 0;
1184 hdr->itt = io_task->libiscsi_itt;
1185 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1189 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1190 struct iscsi_task *task,
1191 struct common_sol_cqe *csol_cqe)
1193 struct iscsi_tm_rsp *hdr;
1194 struct iscsi_conn *conn = beiscsi_conn->conn;
1195 struct beiscsi_io_task *io_task = task->dd_data;
1197 hdr = (struct iscsi_tm_rsp *)task->hdr;
1198 hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1199 hdr->flags = csol_cqe->i_flags;
1200 hdr->response = csol_cqe->i_resp;
1201 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1202 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1203 csol_cqe->cmd_wnd - 1);
1205 hdr->itt = io_task->libiscsi_itt;
1206 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1210 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1211 struct beiscsi_hba *phba, struct sol_cqe *psol)
1213 struct hwi_wrb_context *pwrb_context;
1214 uint16_t wrb_index, cid, cri_index;
1215 struct hwi_controller *phwi_ctrlr;
1216 struct wrb_handle *pwrb_handle;
1217 struct iscsi_session *session;
1218 struct iscsi_task *task;
1220 phwi_ctrlr = phba->phwi_ctrlr;
1221 if (is_chip_be2_be3r(phba)) {
1222 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1224 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1227 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1229 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1233 cri_index = BE_GET_CRI_FROM_CID(cid);
1234 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1235 pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1236 session = beiscsi_conn->conn->session;
1237 spin_lock_bh(&session->back_lock);
1238 task = pwrb_handle->pio_handle;
1240 __iscsi_put_task(task);
1241 spin_unlock_bh(&session->back_lock);
1245 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1246 struct iscsi_task *task,
1247 struct common_sol_cqe *csol_cqe)
1249 struct iscsi_nopin *hdr;
1250 struct iscsi_conn *conn = beiscsi_conn->conn;
1251 struct beiscsi_io_task *io_task = task->dd_data;
1253 hdr = (struct iscsi_nopin *)task->hdr;
1254 hdr->flags = csol_cqe->i_flags;
1255 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1256 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1257 csol_cqe->cmd_wnd - 1);
1259 hdr->opcode = ISCSI_OP_NOOP_IN;
1260 hdr->itt = io_task->libiscsi_itt;
1261 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1264 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1265 struct sol_cqe *psol,
1266 struct common_sol_cqe *csol_cqe)
1268 if (is_chip_be2_be3r(phba)) {
1269 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1270 i_exp_cmd_sn, psol);
1271 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1273 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1275 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1277 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1279 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1281 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1283 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1285 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1288 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1289 i_exp_cmd_sn, psol);
1290 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1292 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1294 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1296 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1298 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1300 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1302 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1305 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1307 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1309 csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1311 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1313 csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1318 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1319 struct beiscsi_hba *phba, struct sol_cqe *psol)
1321 struct iscsi_conn *conn = beiscsi_conn->conn;
1322 struct iscsi_session *session = conn->session;
1323 struct common_sol_cqe csol_cqe = {0};
1324 struct hwi_wrb_context *pwrb_context;
1325 struct hwi_controller *phwi_ctrlr;
1326 struct wrb_handle *pwrb_handle;
1327 struct iscsi_task *task;
1328 uint16_t cri_index = 0;
1331 phwi_ctrlr = phba->phwi_ctrlr;
1333 /* Copy the elements to a common structure */
1334 adapter_get_sol_cqe(phba, psol, &csol_cqe);
1336 cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1337 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1339 pwrb_handle = pwrb_context->pwrb_handle_basestd[
1340 csol_cqe.wrb_index];
1342 spin_lock_bh(&session->back_lock);
1343 task = pwrb_handle->pio_handle;
1345 spin_unlock_bh(&session->back_lock);
1348 type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1352 case HWH_TYPE_IO_RD:
1353 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1355 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1357 be_complete_io(beiscsi_conn, task, &csol_cqe);
1360 case HWH_TYPE_LOGOUT:
1361 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1362 be_complete_logout(beiscsi_conn, task, &csol_cqe);
1364 be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1367 case HWH_TYPE_LOGIN:
1368 beiscsi_log(phba, KERN_ERR,
1369 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1370 "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1371 " hwi_complete_cmd- Solicited path\n");
1375 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1379 beiscsi_log(phba, KERN_WARNING,
1380 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1381 "BM_%d : In hwi_complete_cmd, unknown type = %d"
1382 "wrb_index 0x%x CID 0x%x\n", type,
1388 spin_unlock_bh(&session->back_lock);
1392 * ASYNC PDUs include
1393 * a. Unsolicited NOP-In (target initiated NOP-In)
1397 * These headers arrive unprocessed by the EP firmware.
1398 * iSCSI layer processes them.
1401 beiscsi_complete_pdu(struct beiscsi_conn *beiscsi_conn,
1402 struct pdu_base *phdr, void *pdata, unsigned int dlen)
1404 struct beiscsi_hba *phba = beiscsi_conn->phba;
1405 struct iscsi_conn *conn = beiscsi_conn->conn;
1406 struct beiscsi_io_task *io_task;
1407 struct iscsi_hdr *login_hdr;
1408 struct iscsi_task *task;
1411 code = AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr);
1413 case ISCSI_OP_NOOP_IN:
1417 case ISCSI_OP_ASYNC_EVENT:
1419 case ISCSI_OP_REJECT:
1421 WARN_ON(!(dlen == 48));
1422 beiscsi_log(phba, KERN_ERR,
1423 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1424 "BM_%d : In ISCSI_OP_REJECT\n");
1426 case ISCSI_OP_LOGIN_RSP:
1427 case ISCSI_OP_TEXT_RSP:
1428 task = conn->login_task;
1429 io_task = task->dd_data;
1430 login_hdr = (struct iscsi_hdr *)phdr;
1431 login_hdr->itt = io_task->libiscsi_itt;
1434 beiscsi_log(phba, KERN_WARNING,
1435 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1436 "BM_%d : unrecognized async PDU opcode 0x%x\n",
1440 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)phdr, pdata, dlen);
1445 beiscsi_hdl_put_handle(struct hd_async_context *pasync_ctx,
1446 struct hd_async_handle *pasync_handle)
1448 pasync_handle->is_final = 0;
1449 pasync_handle->buffer_len = 0;
1450 pasync_handle->in_use = 0;
1451 list_del_init(&pasync_handle->link);
1455 beiscsi_hdl_purge_handles(struct beiscsi_hba *phba,
1456 struct hd_async_context *pasync_ctx,
1459 struct hd_async_handle *pasync_handle, *tmp_handle;
1460 struct list_head *plist;
1462 plist = &pasync_ctx->async_entry[cri].wq.list;
1463 list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link)
1464 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1466 INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wq.list);
1467 pasync_ctx->async_entry[cri].wq.hdr_len = 0;
1468 pasync_ctx->async_entry[cri].wq.bytes_received = 0;
1469 pasync_ctx->async_entry[cri].wq.bytes_needed = 0;
1472 static struct hd_async_handle *
1473 beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
1474 struct hd_async_context *pasync_ctx,
1475 struct i_t_dpdu_cqe *pdpdu_cqe,
1478 struct beiscsi_hba *phba = beiscsi_conn->phba;
1479 struct hd_async_handle *pasync_handle;
1480 struct be_bus_address phys_addr;
1481 u16 cid, code, ci, cri;
1482 u8 final, error = 0;
1485 cid = beiscsi_conn->beiscsi_conn_cid;
1486 cri = BE_GET_ASYNC_CRI_FROM_CID(cid);
1488 * This function is invoked to get the right async_handle structure
1489 * from a given DEF PDU CQ entry.
1491 * - index in CQ entry gives the vertical index
1492 * - address in CQ entry is the offset where the DMA last ended
1493 * - final - no more notifications for this PDU
1495 if (is_chip_be2_be3r(phba)) {
1496 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1498 ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1500 final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1503 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1505 ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1507 final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1512 * DB addr Hi/Lo is same for BE and SKH.
1513 * Subtract the dataplacementlength to get to the base.
1515 phys_addr.u.a32.address_lo = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1516 db_addr_lo, pdpdu_cqe);
1517 phys_addr.u.a32.address_lo -= dpl;
1518 phys_addr.u.a32.address_hi = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1519 db_addr_hi, pdpdu_cqe);
1521 code = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe, code, pdpdu_cqe);
1523 case UNSOL_HDR_NOTIFY:
1524 pasync_handle = pasync_ctx->async_entry[ci].header;
1527 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1529 case UNSOL_DATA_NOTIFY:
1530 pasync_handle = pasync_ctx->async_entry[ci].data;
1532 /* called only for above codes */
1537 if (pasync_handle->pa.u.a64.address != phys_addr.u.a64.address ||
1538 pasync_handle->index != ci) {
1539 /* driver bug - if ci does not match async handle index */
1541 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1542 "BM_%d : cid %u async PDU handle mismatch - addr in %cQE %llx at %u:addr in CQE %llx ci %u\n",
1543 cid, pasync_handle->is_header ? 'H' : 'D',
1544 pasync_handle->pa.u.a64.address,
1545 pasync_handle->index,
1546 phys_addr.u.a64.address, ci);
1547 /* FW has stale address - attempt continuing by dropping */
1551 * DEF PDU header and data buffers with errors should be simply
1552 * dropped as there are no consumers for it.
1555 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1559 if (pasync_handle->in_use || !list_empty(&pasync_handle->link)) {
1560 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1561 "BM_%d : cid %d async PDU handle in use - code %d ci %d addr %llx\n",
1562 cid, code, ci, phys_addr.u.a64.address);
1563 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1566 list_del_init(&pasync_handle->link);
1568 * Each CID is associated with unique CRI.
1569 * ASYNC_CRI_FROM_CID mapping and CRI_FROM_CID are totaly different.
1571 pasync_handle->cri = cri;
1572 pasync_handle->is_final = final;
1573 pasync_handle->buffer_len = dpl;
1574 pasync_handle->in_use = 1;
1576 return pasync_handle;
1580 beiscsi_hdl_fwd_pdu(struct beiscsi_conn *beiscsi_conn,
1581 struct hd_async_context *pasync_ctx,
1584 struct iscsi_session *session = beiscsi_conn->conn->session;
1585 struct hd_async_handle *pasync_handle, *plast_handle;
1586 struct beiscsi_hba *phba = beiscsi_conn->phba;
1587 void *phdr = NULL, *pdata = NULL;
1588 u32 dlen = 0, status = 0;
1589 struct list_head *plist;
1591 plist = &pasync_ctx->async_entry[cri].wq.list;
1592 plast_handle = NULL;
1593 list_for_each_entry(pasync_handle, plist, link) {
1594 plast_handle = pasync_handle;
1595 /* get the header, the first entry */
1597 phdr = pasync_handle->pbuffer;
1600 /* use first buffer to collect all the data */
1602 pdata = pasync_handle->pbuffer;
1603 dlen = pasync_handle->buffer_len;
1606 if (!pasync_handle->buffer_len ||
1607 (dlen + pasync_handle->buffer_len) >
1608 pasync_ctx->async_data.buffer_size)
1610 memcpy(pdata + dlen, pasync_handle->pbuffer,
1611 pasync_handle->buffer_len);
1612 dlen += pasync_handle->buffer_len;
1615 if (!plast_handle->is_final) {
1616 /* last handle should have final PDU notification from FW */
1617 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1618 "BM_%d : cid %u %p fwd async PDU opcode %x with last handle missing - HL%u:DN%u:DR%u\n",
1619 beiscsi_conn->beiscsi_conn_cid, plast_handle,
1620 AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr),
1621 pasync_ctx->async_entry[cri].wq.hdr_len,
1622 pasync_ctx->async_entry[cri].wq.bytes_needed,
1623 pasync_ctx->async_entry[cri].wq.bytes_received);
1625 spin_lock_bh(&session->back_lock);
1626 status = beiscsi_complete_pdu(beiscsi_conn, phdr, pdata, dlen);
1627 spin_unlock_bh(&session->back_lock);
1628 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1633 beiscsi_hdl_gather_pdu(struct beiscsi_conn *beiscsi_conn,
1634 struct hd_async_context *pasync_ctx,
1635 struct hd_async_handle *pasync_handle)
1637 unsigned int bytes_needed = 0, status = 0;
1638 u16 cri = pasync_handle->cri;
1639 struct cri_wait_queue *wq;
1640 struct beiscsi_hba *phba;
1641 struct pdu_base *ppdu;
1644 phba = beiscsi_conn->phba;
1645 wq = &pasync_ctx->async_entry[cri].wq;
1646 if (pasync_handle->is_header) {
1647 /* check if PDU hdr is rcv'd when old hdr not completed */
1652 ppdu = pasync_handle->pbuffer;
1653 bytes_needed = AMAP_GET_BITS(struct amap_pdu_base,
1655 bytes_needed <<= 16;
1656 bytes_needed |= be16_to_cpu(AMAP_GET_BITS(struct amap_pdu_base,
1657 data_len_lo, ppdu));
1658 wq->hdr_len = pasync_handle->buffer_len;
1659 wq->bytes_received = 0;
1660 wq->bytes_needed = bytes_needed;
1661 list_add_tail(&pasync_handle->link, &wq->list);
1663 status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
1666 /* check if data received has header and is needed */
1667 if (!wq->hdr_len || !wq->bytes_needed) {
1668 err = "header less";
1671 wq->bytes_received += pasync_handle->buffer_len;
1672 /* Something got overwritten? Better catch it here. */
1673 if (wq->bytes_received > wq->bytes_needed) {
1677 list_add_tail(&pasync_handle->link, &wq->list);
1678 if (wq->bytes_received == wq->bytes_needed)
1679 status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
1685 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1686 "BM_%d : cid %u async PDU %s - def-%c:HL%u:DN%u:DR%u\n",
1687 beiscsi_conn->beiscsi_conn_cid, err,
1688 pasync_handle->is_header ? 'H' : 'D',
1689 wq->hdr_len, wq->bytes_needed,
1690 pasync_handle->buffer_len);
1691 /* discard this handle */
1692 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1693 /* free all the other handles in cri_wait_queue */
1694 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1695 /* try continuing */
1700 beiscsi_hdq_post_handles(struct beiscsi_hba *phba,
1701 u8 header, u8 ulp_num, u16 nbuf)
1703 struct hd_async_handle *pasync_handle;
1704 struct hd_async_context *pasync_ctx;
1705 struct hwi_controller *phwi_ctrlr;
1706 struct phys_addr *pasync_sge;
1707 u32 ring_id, doorbell = 0;
1708 u32 doorbell_offset;
1711 phwi_ctrlr = phba->phwi_ctrlr;
1712 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1714 pasync_sge = pasync_ctx->async_header.ring_base;
1715 pi = pasync_ctx->async_header.pi;
1716 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1717 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1720 pasync_sge = pasync_ctx->async_data.ring_base;
1721 pi = pasync_ctx->async_data.pi;
1722 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1723 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1727 for (prod = 0; prod < nbuf; prod++) {
1729 pasync_handle = pasync_ctx->async_entry[pi].header;
1731 pasync_handle = pasync_ctx->async_entry[pi].data;
1732 WARN_ON(pasync_handle->is_header != header);
1733 WARN_ON(pasync_handle->index != pi);
1734 /* setup the ring only once */
1735 if (nbuf == pasync_ctx->num_entries) {
1737 pasync_sge[pi].hi = pasync_handle->pa.u.a32.address_lo;
1738 pasync_sge[pi].lo = pasync_handle->pa.u.a32.address_hi;
1740 if (++pi == pasync_ctx->num_entries)
1745 pasync_ctx->async_header.pi = pi;
1747 pasync_ctx->async_data.pi = pi;
1749 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1750 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1751 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1752 doorbell |= (prod & DB_DEF_PDU_CQPROC_MASK) << DB_DEF_PDU_CQPROC_SHIFT;
1753 iowrite32(doorbell, phba->db_va + doorbell_offset);
1757 beiscsi_hdq_process_compl(struct beiscsi_conn *beiscsi_conn,
1758 struct i_t_dpdu_cqe *pdpdu_cqe)
1760 struct beiscsi_hba *phba = beiscsi_conn->phba;
1761 struct hd_async_handle *pasync_handle = NULL;
1762 struct hd_async_context *pasync_ctx;
1763 struct hwi_controller *phwi_ctrlr;
1764 u8 ulp_num, consumed, header = 0;
1767 phwi_ctrlr = phba->phwi_ctrlr;
1768 cid_cri = BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid);
1769 ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
1770 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1771 pasync_handle = beiscsi_hdl_get_handle(beiscsi_conn, pasync_ctx,
1772 pdpdu_cqe, &header);
1773 if (is_chip_be2_be3r(phba))
1774 consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1775 num_cons, pdpdu_cqe);
1777 consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1778 num_cons, pdpdu_cqe);
1780 beiscsi_hdl_gather_pdu(beiscsi_conn, pasync_ctx, pasync_handle);
1781 /* num_cons indicates number of 8 RQEs consumed */
1783 beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
1786 void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
1788 struct be_queue_info *mcc_cq;
1789 struct be_mcc_compl *mcc_compl;
1790 unsigned int num_processed = 0;
1792 mcc_cq = &phba->ctrl.mcc_obj.cq;
1793 mcc_compl = queue_tail_node(mcc_cq);
1794 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1795 while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1796 if (beiscsi_hba_in_error(phba))
1799 if (num_processed >= 32) {
1800 hwi_ring_cq_db(phba, mcc_cq->id,
1804 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1805 beiscsi_process_async_event(phba, mcc_compl);
1806 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1807 beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
1810 mcc_compl->flags = 0;
1811 queue_tail_inc(mcc_cq);
1812 mcc_compl = queue_tail_node(mcc_cq);
1813 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1817 if (num_processed > 0)
1818 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
1821 static void beiscsi_mcc_work(struct work_struct *work)
1823 struct be_eq_obj *pbe_eq;
1824 struct beiscsi_hba *phba;
1826 pbe_eq = container_of(work, struct be_eq_obj, mcc_work);
1827 phba = pbe_eq->phba;
1828 beiscsi_process_mcc_cq(phba);
1829 /* rearm EQ for further interrupts */
1830 if (!beiscsi_hba_in_error(phba))
1831 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
1835 * beiscsi_process_cq()- Process the Completion Queue
1836 * @pbe_eq: Event Q on which the Completion has come
1837 * @budget: Max number of events to processed
1840 * Number of Completion Entries processed.
1842 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
1844 struct be_queue_info *cq;
1845 struct sol_cqe *sol;
1846 struct dmsg_cqe *dmsg;
1847 unsigned int total = 0;
1848 unsigned int num_processed = 0;
1849 unsigned short code = 0, cid = 0;
1850 uint16_t cri_index = 0;
1851 struct beiscsi_conn *beiscsi_conn;
1852 struct beiscsi_endpoint *beiscsi_ep;
1853 struct iscsi_endpoint *ep;
1854 struct beiscsi_hba *phba;
1857 sol = queue_tail_node(cq);
1858 phba = pbe_eq->phba;
1860 while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
1862 if (beiscsi_hba_in_error(phba))
1865 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1867 code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
1868 32] & CQE_CODE_MASK);
1871 if (is_chip_be2_be3r(phba)) {
1872 cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
1874 if ((code == DRIVERMSG_NOTIFY) ||
1875 (code == UNSOL_HDR_NOTIFY) ||
1876 (code == UNSOL_DATA_NOTIFY))
1877 cid = AMAP_GET_BITS(
1878 struct amap_i_t_dpdu_cqe_v2,
1881 cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1885 cri_index = BE_GET_CRI_FROM_CID(cid);
1886 ep = phba->ep_array[cri_index];
1889 /* connection has already been freed
1890 * just move on to next one
1892 beiscsi_log(phba, KERN_WARNING,
1894 "BM_%d : proc cqe of disconn ep: cid %d\n",
1899 beiscsi_ep = ep->dd_data;
1900 beiscsi_conn = beiscsi_ep->conn;
1903 if (num_processed == 32) {
1904 hwi_ring_cq_db(phba, cq->id, 32, 0);
1910 case SOL_CMD_COMPLETE:
1911 hwi_complete_cmd(beiscsi_conn, phba, sol);
1913 case DRIVERMSG_NOTIFY:
1914 beiscsi_log(phba, KERN_INFO,
1915 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1916 "BM_%d : Received %s[%d] on CID : %d\n",
1917 cqe_desc[code], code, cid);
1919 dmsg = (struct dmsg_cqe *)sol;
1920 hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
1922 case UNSOL_HDR_NOTIFY:
1923 beiscsi_log(phba, KERN_INFO,
1924 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1925 "BM_%d : Received %s[%d] on CID : %d\n",
1926 cqe_desc[code], code, cid);
1928 spin_lock_bh(&phba->async_pdu_lock);
1929 beiscsi_hdq_process_compl(beiscsi_conn,
1930 (struct i_t_dpdu_cqe *)sol);
1931 spin_unlock_bh(&phba->async_pdu_lock);
1933 case UNSOL_DATA_NOTIFY:
1934 beiscsi_log(phba, KERN_INFO,
1935 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1936 "BM_%d : Received %s[%d] on CID : %d\n",
1937 cqe_desc[code], code, cid);
1939 spin_lock_bh(&phba->async_pdu_lock);
1940 beiscsi_hdq_process_compl(beiscsi_conn,
1941 (struct i_t_dpdu_cqe *)sol);
1942 spin_unlock_bh(&phba->async_pdu_lock);
1944 case CXN_INVALIDATE_INDEX_NOTIFY:
1945 case CMD_INVALIDATED_NOTIFY:
1946 case CXN_INVALIDATE_NOTIFY:
1947 beiscsi_log(phba, KERN_ERR,
1948 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1949 "BM_%d : Ignoring %s[%d] on CID : %d\n",
1950 cqe_desc[code], code, cid);
1952 case CXN_KILLED_HDR_DIGEST_ERR:
1953 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
1954 beiscsi_log(phba, KERN_ERR,
1955 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1956 "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
1957 cqe_desc[code], code, cid);
1959 case CMD_KILLED_INVALID_STATSN_RCVD:
1960 case CMD_KILLED_INVALID_R2T_RCVD:
1961 case CMD_CXN_KILLED_LUN_INVALID:
1962 case CMD_CXN_KILLED_ICD_INVALID:
1963 case CMD_CXN_KILLED_ITT_INVALID:
1964 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
1965 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
1966 beiscsi_log(phba, KERN_ERR,
1967 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1968 "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
1969 cqe_desc[code], code, cid);
1971 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1972 beiscsi_log(phba, KERN_ERR,
1973 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1974 "BM_%d : Dropping %s[%d] on DPDU ring on CID : %d\n",
1975 cqe_desc[code], code, cid);
1976 spin_lock_bh(&phba->async_pdu_lock);
1977 /* driver consumes the entry and drops the contents */
1978 beiscsi_hdq_process_compl(beiscsi_conn,
1979 (struct i_t_dpdu_cqe *)sol);
1980 spin_unlock_bh(&phba->async_pdu_lock);
1982 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
1983 case CXN_KILLED_BURST_LEN_MISMATCH:
1984 case CXN_KILLED_AHS_RCVD:
1985 case CXN_KILLED_UNKNOWN_HDR:
1986 case CXN_KILLED_STALE_ITT_TTT_RCVD:
1987 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
1988 case CXN_KILLED_TIMED_OUT:
1989 case CXN_KILLED_FIN_RCVD:
1990 case CXN_KILLED_RST_SENT:
1991 case CXN_KILLED_RST_RCVD:
1992 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
1993 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
1994 case CXN_KILLED_OVER_RUN_RESIDUAL:
1995 case CXN_KILLED_UNDER_RUN_RESIDUAL:
1996 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
1997 beiscsi_log(phba, KERN_ERR,
1998 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1999 "BM_%d : Event %s[%d] received on CID : %d\n",
2000 cqe_desc[code], code, cid);
2002 iscsi_conn_failure(beiscsi_conn->conn,
2003 ISCSI_ERR_CONN_FAILED);
2006 beiscsi_log(phba, KERN_ERR,
2007 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2008 "BM_%d : Invalid CQE Event Received Code : %d"
2015 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2017 sol = queue_tail_node(cq);
2019 if (total == budget)
2023 hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2027 static int be_iopoll(struct irq_poll *iop, int budget)
2029 unsigned int ret, io_events;
2030 struct beiscsi_hba *phba;
2031 struct be_eq_obj *pbe_eq;
2032 struct be_eq_entry *eqe = NULL;
2033 struct be_queue_info *eq;
2035 pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2036 phba = pbe_eq->phba;
2037 if (beiscsi_hba_in_error(phba)) {
2038 irq_poll_complete(iop);
2044 eqe = queue_tail_node(eq);
2045 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
2047 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
2049 eqe = queue_tail_node(eq);
2052 hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1);
2054 ret = beiscsi_process_cq(pbe_eq, budget);
2055 pbe_eq->cq_count += ret;
2057 irq_poll_complete(iop);
2058 beiscsi_log(phba, KERN_INFO,
2059 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2060 "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
2062 if (!beiscsi_hba_in_error(phba))
2063 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2069 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2070 unsigned int num_sg, struct beiscsi_io_task *io_task)
2072 struct iscsi_sge *psgl;
2073 unsigned int sg_len, index;
2074 unsigned int sge_len = 0;
2075 unsigned long long addr;
2076 struct scatterlist *l_sg;
2077 unsigned int offset;
2079 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2080 io_task->bhs_pa.u.a32.address_lo);
2081 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2082 io_task->bhs_pa.u.a32.address_hi);
2085 for (index = 0; (index < num_sg) && (index < 2); index++,
2088 sg_len = sg_dma_len(sg);
2089 addr = (u64) sg_dma_address(sg);
2090 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2092 lower_32_bits(addr));
2093 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2095 upper_32_bits(addr));
2096 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2101 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2103 sg_len = sg_dma_len(sg);
2104 addr = (u64) sg_dma_address(sg);
2105 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2107 lower_32_bits(addr));
2108 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2110 upper_32_bits(addr));
2111 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2116 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2117 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2119 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2121 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2122 io_task->bhs_pa.u.a32.address_hi);
2123 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2124 io_task->bhs_pa.u.a32.address_lo);
2127 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2129 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2131 } else if (num_sg == 2) {
2132 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2134 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2137 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2139 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2147 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2148 sg_len = sg_dma_len(sg);
2149 addr = (u64) sg_dma_address(sg);
2150 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2151 lower_32_bits(addr));
2152 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2153 upper_32_bits(addr));
2154 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2155 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2156 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2160 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2164 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2165 unsigned int num_sg, struct beiscsi_io_task *io_task)
2167 struct iscsi_sge *psgl;
2168 unsigned int sg_len, index;
2169 unsigned int sge_len = 0;
2170 unsigned long long addr;
2171 struct scatterlist *l_sg;
2172 unsigned int offset;
2174 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2175 io_task->bhs_pa.u.a32.address_lo);
2176 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2177 io_task->bhs_pa.u.a32.address_hi);
2180 for (index = 0; (index < num_sg) && (index < 2); index++,
2183 sg_len = sg_dma_len(sg);
2184 addr = (u64) sg_dma_address(sg);
2185 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2186 ((u32)(addr & 0xFFFFFFFF)));
2187 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2188 ((u32)(addr >> 32)));
2189 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2193 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2195 sg_len = sg_dma_len(sg);
2196 addr = (u64) sg_dma_address(sg);
2197 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2198 ((u32)(addr & 0xFFFFFFFF)));
2199 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2200 ((u32)(addr >> 32)));
2201 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2205 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2206 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2208 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2210 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2211 io_task->bhs_pa.u.a32.address_hi);
2212 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2213 io_task->bhs_pa.u.a32.address_lo);
2216 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2218 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2220 } else if (num_sg == 2) {
2221 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2223 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2226 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2228 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2235 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2236 sg_len = sg_dma_len(sg);
2237 addr = (u64) sg_dma_address(sg);
2238 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2239 (addr & 0xFFFFFFFF));
2240 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2242 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2243 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2244 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2248 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2252 * hwi_write_buffer()- Populate the WRB with task info
2253 * @pwrb: ptr to the WRB entry
2254 * @task: iscsi task which is to be executed
2256 static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2258 struct iscsi_sge *psgl;
2259 struct beiscsi_io_task *io_task = task->dd_data;
2260 struct beiscsi_conn *beiscsi_conn = io_task->conn;
2261 struct beiscsi_hba *phba = beiscsi_conn->phba;
2262 uint8_t dsp_value = 0;
2264 io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2265 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2266 io_task->bhs_pa.u.a32.address_lo);
2267 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2268 io_task->bhs_pa.u.a32.address_hi);
2272 /* Check for the data_count */
2273 dsp_value = (task->data_count) ? 1 : 0;
2275 if (is_chip_be2_be3r(phba))
2276 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2279 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2282 /* Map addr only if there is data_count */
2284 io_task->mtask_addr = pci_map_single(phba->pcidev,
2288 if (pci_dma_mapping_error(phba->pcidev,
2289 io_task->mtask_addr))
2291 io_task->mtask_data_count = task->data_count;
2293 io_task->mtask_addr = 0;
2295 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2296 lower_32_bits(io_task->mtask_addr));
2297 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2298 upper_32_bits(io_task->mtask_addr));
2299 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2302 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2304 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2305 io_task->mtask_addr = 0;
2308 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2310 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2312 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2313 io_task->bhs_pa.u.a32.address_hi);
2314 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2315 io_task->bhs_pa.u.a32.address_lo);
2318 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2319 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2320 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2321 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2322 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2323 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2327 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2328 lower_32_bits(io_task->mtask_addr));
2329 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2330 upper_32_bits(io_task->mtask_addr));
2332 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2334 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2339 * beiscsi_find_mem_req()- Find mem needed
2340 * @phba: ptr to HBA struct
2342 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2344 uint8_t mem_descr_index, ulp_num;
2345 unsigned int num_async_pdu_buf_pages;
2346 unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2347 unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2349 phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2351 phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2352 BE_ISCSI_PDU_HEADER_SIZE;
2353 phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2354 sizeof(struct hwi_context_memory);
2357 phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2358 * (phba->params.wrbs_per_cxn)
2359 * phba->params.cxns_per_ctrl;
2360 wrb_sz_per_cxn = sizeof(struct wrb_handle) *
2361 (phba->params.wrbs_per_cxn);
2362 phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2363 phba->params.cxns_per_ctrl);
2365 phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2366 phba->params.icds_per_ctrl;
2367 phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2368 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2369 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2370 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2372 num_async_pdu_buf_sgl_pages =
2373 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2375 sizeof(struct phys_addr));
2377 num_async_pdu_buf_pages =
2378 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2380 phba->params.defpdu_hdr_sz);
2382 num_async_pdu_data_pages =
2383 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2385 phba->params.defpdu_data_sz);
2387 num_async_pdu_data_sgl_pages =
2388 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2390 sizeof(struct phys_addr));
2392 mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2393 (ulp_num * MEM_DESCR_OFFSET));
2394 phba->mem_req[mem_descr_index] =
2395 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2396 BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2398 mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2399 (ulp_num * MEM_DESCR_OFFSET));
2400 phba->mem_req[mem_descr_index] =
2401 num_async_pdu_buf_pages *
2404 mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2405 (ulp_num * MEM_DESCR_OFFSET));
2406 phba->mem_req[mem_descr_index] =
2407 num_async_pdu_data_pages *
2410 mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2411 (ulp_num * MEM_DESCR_OFFSET));
2412 phba->mem_req[mem_descr_index] =
2413 num_async_pdu_buf_sgl_pages *
2416 mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2417 (ulp_num * MEM_DESCR_OFFSET));
2418 phba->mem_req[mem_descr_index] =
2419 num_async_pdu_data_sgl_pages *
2422 mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2423 (ulp_num * MEM_DESCR_OFFSET));
2424 phba->mem_req[mem_descr_index] =
2425 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2426 sizeof(struct hd_async_handle);
2428 mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2429 (ulp_num * MEM_DESCR_OFFSET));
2430 phba->mem_req[mem_descr_index] =
2431 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2432 sizeof(struct hd_async_handle);
2434 mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2435 (ulp_num * MEM_DESCR_OFFSET));
2436 phba->mem_req[mem_descr_index] =
2437 sizeof(struct hd_async_context) +
2438 (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2439 sizeof(struct hd_async_entry));
2444 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2447 struct hwi_controller *phwi_ctrlr;
2448 struct be_mem_descriptor *mem_descr;
2449 struct mem_array *mem_arr, *mem_arr_orig;
2450 unsigned int i, j, alloc_size, curr_alloc_size;
2452 phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2453 if (!phba->phwi_ctrlr)
2456 /* Allocate memory for wrb_context */
2457 phwi_ctrlr = phba->phwi_ctrlr;
2458 phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2459 phba->params.cxns_per_ctrl,
2461 if (!phwi_ctrlr->wrb_context) {
2462 kfree(phba->phwi_ctrlr);
2466 phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2468 if (!phba->init_mem) {
2469 kfree(phwi_ctrlr->wrb_context);
2470 kfree(phba->phwi_ctrlr);
2474 mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2476 if (!mem_arr_orig) {
2477 kfree(phba->init_mem);
2478 kfree(phwi_ctrlr->wrb_context);
2479 kfree(phba->phwi_ctrlr);
2483 mem_descr = phba->init_mem;
2484 for (i = 0; i < SE_MEM_MAX; i++) {
2485 if (!phba->mem_req[i]) {
2486 mem_descr->mem_array = NULL;
2492 mem_arr = mem_arr_orig;
2493 alloc_size = phba->mem_req[i];
2494 memset(mem_arr, 0, sizeof(struct mem_array) *
2495 BEISCSI_MAX_FRAGS_INIT);
2496 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2498 mem_arr->virtual_address = pci_alloc_consistent(
2502 if (!mem_arr->virtual_address) {
2503 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2505 if (curr_alloc_size -
2506 rounddown_pow_of_two(curr_alloc_size))
2507 curr_alloc_size = rounddown_pow_of_two
2510 curr_alloc_size = curr_alloc_size / 2;
2512 mem_arr->bus_address.u.
2513 a64.address = (__u64) bus_add;
2514 mem_arr->size = curr_alloc_size;
2515 alloc_size -= curr_alloc_size;
2516 curr_alloc_size = min(be_max_phys_size *
2521 } while (alloc_size);
2522 mem_descr->num_elements = j;
2523 mem_descr->size_in_bytes = phba->mem_req[i];
2524 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2526 if (!mem_descr->mem_array)
2529 memcpy(mem_descr->mem_array, mem_arr_orig,
2530 sizeof(struct mem_array) * j);
2533 kfree(mem_arr_orig);
2536 mem_descr->num_elements = j;
2537 while ((i) || (j)) {
2538 for (j = mem_descr->num_elements; j > 0; j--) {
2539 pci_free_consistent(phba->pcidev,
2540 mem_descr->mem_array[j - 1].size,
2541 mem_descr->mem_array[j - 1].
2543 (unsigned long)mem_descr->
2545 bus_address.u.a64.address);
2549 kfree(mem_descr->mem_array);
2553 kfree(mem_arr_orig);
2554 kfree(phba->init_mem);
2555 kfree(phba->phwi_ctrlr->wrb_context);
2556 kfree(phba->phwi_ctrlr);
2560 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2562 beiscsi_find_mem_req(phba);
2563 return beiscsi_alloc_mem(phba);
2566 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2568 struct pdu_data_out *pdata_out;
2569 struct pdu_nop_out *pnop_out;
2570 struct be_mem_descriptor *mem_descr;
2572 mem_descr = phba->init_mem;
2573 mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2575 (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2576 memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2578 AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2582 (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2583 virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2585 memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2586 AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2587 AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2588 AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2591 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2593 struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2594 struct hwi_context_memory *phwi_ctxt;
2595 struct wrb_handle *pwrb_handle = NULL;
2596 struct hwi_controller *phwi_ctrlr;
2597 struct hwi_wrb_context *pwrb_context;
2598 struct iscsi_wrb *pwrb = NULL;
2599 unsigned int num_cxn_wrbh = 0;
2600 unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2602 mem_descr_wrbh = phba->init_mem;
2603 mem_descr_wrbh += HWI_MEM_WRBH;
2605 mem_descr_wrb = phba->init_mem;
2606 mem_descr_wrb += HWI_MEM_WRB;
2607 phwi_ctrlr = phba->phwi_ctrlr;
2609 /* Allocate memory for WRBQ */
2610 phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2611 phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2612 phba->params.cxns_per_ctrl,
2614 if (!phwi_ctxt->be_wrbq) {
2615 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2616 "BM_%d : WRBQ Mem Alloc Failed\n");
2620 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2621 pwrb_context = &phwi_ctrlr->wrb_context[index];
2622 pwrb_context->pwrb_handle_base =
2623 kzalloc(sizeof(struct wrb_handle *) *
2624 phba->params.wrbs_per_cxn, GFP_KERNEL);
2625 if (!pwrb_context->pwrb_handle_base) {
2626 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2627 "BM_%d : Mem Alloc Failed. Failing to load\n");
2628 goto init_wrb_hndl_failed;
2630 pwrb_context->pwrb_handle_basestd =
2631 kzalloc(sizeof(struct wrb_handle *) *
2632 phba->params.wrbs_per_cxn, GFP_KERNEL);
2633 if (!pwrb_context->pwrb_handle_basestd) {
2634 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2635 "BM_%d : Mem Alloc Failed. Failing to load\n");
2636 goto init_wrb_hndl_failed;
2638 if (!num_cxn_wrbh) {
2640 mem_descr_wrbh->mem_array[idx].virtual_address;
2641 num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2642 ((sizeof(struct wrb_handle)) *
2643 phba->params.wrbs_per_cxn));
2646 pwrb_context->alloc_index = 0;
2647 pwrb_context->wrb_handles_available = 0;
2648 pwrb_context->free_index = 0;
2651 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2652 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2653 pwrb_context->pwrb_handle_basestd[j] =
2655 pwrb_context->wrb_handles_available++;
2656 pwrb_handle->wrb_index = j;
2661 spin_lock_init(&pwrb_context->wrb_lock);
2664 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2665 pwrb_context = &phwi_ctrlr->wrb_context[index];
2667 pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2668 num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2669 ((sizeof(struct iscsi_wrb) *
2670 phba->params.wrbs_per_cxn));
2675 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2676 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2677 pwrb_handle->pwrb = pwrb;
2684 init_wrb_hndl_failed:
2685 for (j = index; j > 0; j--) {
2686 pwrb_context = &phwi_ctrlr->wrb_context[j];
2687 kfree(pwrb_context->pwrb_handle_base);
2688 kfree(pwrb_context->pwrb_handle_basestd);
2693 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2696 struct hwi_controller *phwi_ctrlr;
2697 struct hba_parameters *p = &phba->params;
2698 struct hd_async_context *pasync_ctx;
2699 struct hd_async_handle *pasync_header_h, *pasync_data_h;
2700 unsigned int index, idx, num_per_mem, num_async_data;
2701 struct be_mem_descriptor *mem_descr;
2703 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2704 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2705 /* get async_ctx for each ULP */
2706 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2707 mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2708 (ulp_num * MEM_DESCR_OFFSET));
2710 phwi_ctrlr = phba->phwi_ctrlr;
2711 phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2712 (struct hd_async_context *)
2713 mem_descr->mem_array[0].virtual_address;
2715 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2716 memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2718 pasync_ctx->async_entry =
2719 (struct hd_async_entry *)
2720 ((long unsigned int)pasync_ctx +
2721 sizeof(struct hd_async_context));
2723 pasync_ctx->num_entries = BEISCSI_ASYNC_HDQ_SIZE(phba,
2725 /* setup header buffers */
2726 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2727 mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2728 (ulp_num * MEM_DESCR_OFFSET);
2729 if (mem_descr->mem_array[0].virtual_address) {
2730 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2731 "BM_%d : hwi_init_async_pdu_ctx"
2732 " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2734 mem_descr->mem_array[0].
2737 beiscsi_log(phba, KERN_WARNING,
2739 "BM_%d : No Virtual address for ULP : %d\n",
2742 pasync_ctx->async_header.pi = 0;
2743 pasync_ctx->async_header.buffer_size = p->defpdu_hdr_sz;
2744 pasync_ctx->async_header.va_base =
2745 mem_descr->mem_array[0].virtual_address;
2747 pasync_ctx->async_header.pa_base.u.a64.address =
2748 mem_descr->mem_array[0].
2749 bus_address.u.a64.address;
2751 /* setup header buffer sgls */
2752 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2753 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2754 (ulp_num * MEM_DESCR_OFFSET);
2755 if (mem_descr->mem_array[0].virtual_address) {
2756 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2757 "BM_%d : hwi_init_async_pdu_ctx"
2758 " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2760 mem_descr->mem_array[0].
2763 beiscsi_log(phba, KERN_WARNING,
2765 "BM_%d : No Virtual address for ULP : %d\n",
2768 pasync_ctx->async_header.ring_base =
2769 mem_descr->mem_array[0].virtual_address;
2771 /* setup header buffer handles */
2772 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2773 mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2774 (ulp_num * MEM_DESCR_OFFSET);
2775 if (mem_descr->mem_array[0].virtual_address) {
2776 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2777 "BM_%d : hwi_init_async_pdu_ctx"
2778 " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2780 mem_descr->mem_array[0].
2783 beiscsi_log(phba, KERN_WARNING,
2785 "BM_%d : No Virtual address for ULP : %d\n",
2788 pasync_ctx->async_header.handle_base =
2789 mem_descr->mem_array[0].virtual_address;
2791 /* setup data buffer sgls */
2792 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2793 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2794 (ulp_num * MEM_DESCR_OFFSET);
2795 if (mem_descr->mem_array[0].virtual_address) {
2796 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2797 "BM_%d : hwi_init_async_pdu_ctx"
2798 " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2800 mem_descr->mem_array[0].
2803 beiscsi_log(phba, KERN_WARNING,
2805 "BM_%d : No Virtual address for ULP : %d\n",
2808 pasync_ctx->async_data.ring_base =
2809 mem_descr->mem_array[0].virtual_address;
2811 /* setup data buffer handles */
2812 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2813 mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2814 (ulp_num * MEM_DESCR_OFFSET);
2815 if (!mem_descr->mem_array[0].virtual_address)
2816 beiscsi_log(phba, KERN_WARNING,
2818 "BM_%d : No Virtual address for ULP : %d\n",
2821 pasync_ctx->async_data.handle_base =
2822 mem_descr->mem_array[0].virtual_address;
2825 (struct hd_async_handle *)
2826 pasync_ctx->async_header.handle_base;
2828 (struct hd_async_handle *)
2829 pasync_ctx->async_data.handle_base;
2831 /* setup data buffers */
2832 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2833 mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2834 (ulp_num * MEM_DESCR_OFFSET);
2835 if (mem_descr->mem_array[0].virtual_address) {
2836 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2837 "BM_%d : hwi_init_async_pdu_ctx"
2838 " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
2840 mem_descr->mem_array[0].
2843 beiscsi_log(phba, KERN_WARNING,
2845 "BM_%d : No Virtual address for ULP : %d\n",
2849 pasync_ctx->async_data.pi = 0;
2850 pasync_ctx->async_data.buffer_size = p->defpdu_data_sz;
2851 pasync_ctx->async_data.va_base =
2852 mem_descr->mem_array[idx].virtual_address;
2853 pasync_ctx->async_data.pa_base.u.a64.address =
2854 mem_descr->mem_array[idx].
2855 bus_address.u.a64.address;
2857 num_async_data = ((mem_descr->mem_array[idx].size) /
2858 phba->params.defpdu_data_sz);
2861 for (index = 0; index < BEISCSI_ASYNC_HDQ_SIZE
2862 (phba, ulp_num); index++) {
2863 pasync_header_h->cri = -1;
2864 pasync_header_h->is_header = 1;
2865 pasync_header_h->index = index;
2866 INIT_LIST_HEAD(&pasync_header_h->link);
2867 pasync_header_h->pbuffer =
2868 (void *)((unsigned long)
2870 async_header.va_base) +
2871 (p->defpdu_hdr_sz * index));
2873 pasync_header_h->pa.u.a64.address =
2874 pasync_ctx->async_header.pa_base.u.a64.
2875 address + (p->defpdu_hdr_sz * index);
2877 pasync_ctx->async_entry[index].header =
2880 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2883 pasync_data_h->cri = -1;
2884 pasync_data_h->is_header = 0;
2885 pasync_data_h->index = index;
2886 INIT_LIST_HEAD(&pasync_data_h->link);
2888 if (!num_async_data) {
2891 pasync_ctx->async_data.va_base =
2892 mem_descr->mem_array[idx].
2894 pasync_ctx->async_data.pa_base.u.
2896 mem_descr->mem_array[idx].
2897 bus_address.u.a64.address;
2899 ((mem_descr->mem_array[idx].
2901 phba->params.defpdu_data_sz);
2903 pasync_data_h->pbuffer =
2904 (void *)((unsigned long)
2905 (pasync_ctx->async_data.va_base) +
2906 (p->defpdu_data_sz * num_per_mem));
2908 pasync_data_h->pa.u.a64.address =
2909 pasync_ctx->async_data.pa_base.u.a64.
2910 address + (p->defpdu_data_sz *
2915 pasync_ctx->async_entry[index].data =
2926 be_sgl_create_contiguous(void *virtual_address,
2927 u64 physical_address, u32 length,
2928 struct be_dma_mem *sgl)
2930 WARN_ON(!virtual_address);
2931 WARN_ON(!physical_address);
2935 sgl->va = virtual_address;
2936 sgl->dma = (unsigned long)physical_address;
2942 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
2944 memset(sgl, 0, sizeof(*sgl));
2948 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2949 struct mem_array *pmem, struct be_dma_mem *sgl)
2952 be_sgl_destroy_contiguous(sgl);
2954 be_sgl_create_contiguous(pmem->virtual_address,
2955 pmem->bus_address.u.a64.address,
2960 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
2961 struct mem_array *pmem, struct be_dma_mem *sgl)
2964 be_sgl_destroy_contiguous(sgl);
2966 be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
2967 pmem->bus_address.u.a64.address,
2971 static int be_fill_queue(struct be_queue_info *q,
2972 u16 len, u16 entry_size, void *vaddress)
2974 struct be_dma_mem *mem = &q->dma_mem;
2976 memset(q, 0, sizeof(*q));
2978 q->entry_size = entry_size;
2979 mem->size = len * entry_size;
2983 memset(mem->va, 0, mem->size);
2987 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
2988 struct hwi_context_memory *phwi_context)
2990 int ret = -ENOMEM, eq_for_mcc;
2991 unsigned int i, num_eq_pages;
2992 struct be_queue_info *eq;
2993 struct be_dma_mem *mem;
2997 num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
2998 sizeof(struct be_eq_entry));
3000 if (phba->pcidev->msix_enabled)
3004 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3005 eq = &phwi_context->be_eq[i].q;
3007 phwi_context->be_eq[i].phba = phba;
3008 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3009 num_eq_pages * PAGE_SIZE,
3013 goto create_eq_error;
3016 mem->va = eq_vaddress;
3017 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3018 sizeof(struct be_eq_entry), eq_vaddress);
3020 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3021 "BM_%d : be_fill_queue Failed for EQ\n");
3022 goto create_eq_error;
3026 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3027 phwi_context->cur_eqd);
3029 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3030 "BM_%d : beiscsi_cmd_eq_create"
3032 goto create_eq_error;
3035 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3036 "BM_%d : eqid = %d\n",
3037 phwi_context->be_eq[i].q.id);
3042 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3043 eq = &phwi_context->be_eq[i].q;
3046 pci_free_consistent(phba->pcidev, num_eq_pages
3053 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3054 struct hwi_context_memory *phwi_context)
3056 unsigned int i, num_cq_pages;
3057 struct be_queue_info *cq, *eq;
3058 struct be_dma_mem *mem;
3059 struct be_eq_obj *pbe_eq;
3064 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3065 sizeof(struct sol_cqe));
3067 for (i = 0; i < phba->num_cpus; i++) {
3068 cq = &phwi_context->be_cq[i];
3069 eq = &phwi_context->be_eq[i].q;
3070 pbe_eq = &phwi_context->be_eq[i];
3072 pbe_eq->phba = phba;
3074 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3075 num_cq_pages * PAGE_SIZE,
3079 goto create_cq_error;
3082 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3083 sizeof(struct sol_cqe), cq_vaddress);
3085 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3086 "BM_%d : be_fill_queue Failed "
3088 goto create_cq_error;
3092 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3095 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3096 "BM_%d : beiscsi_cmd_eq_create"
3097 "Failed for ISCSI CQ\n");
3098 goto create_cq_error;
3100 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3101 "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3102 "iSCSI CQ CREATED\n", cq->id, eq->id);
3107 for (i = 0; i < phba->num_cpus; i++) {
3108 cq = &phwi_context->be_cq[i];
3111 pci_free_consistent(phba->pcidev, num_cq_pages
3119 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3120 struct hwi_context_memory *phwi_context,
3121 struct hwi_controller *phwi_ctrlr,
3122 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3126 struct be_queue_info *dq, *cq;
3127 struct be_dma_mem *mem;
3128 struct be_mem_descriptor *mem_descr;
3132 dq = &phwi_context->be_def_hdrq[ulp_num];
3133 cq = &phwi_context->be_cq[0];
3135 mem_descr = phba->init_mem;
3136 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3137 (ulp_num * MEM_DESCR_OFFSET);
3138 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3139 ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3140 sizeof(struct phys_addr),
3141 sizeof(struct phys_addr), dq_vaddress);
3143 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3144 "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3149 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3150 bus_address.u.a64.address;
3151 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3153 phba->params.defpdu_hdr_sz,
3154 BEISCSI_DEFQ_HDR, ulp_num);
3156 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3157 "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3163 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3164 "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3166 phwi_context->be_def_hdrq[ulp_num].id);
3171 beiscsi_create_def_data(struct beiscsi_hba *phba,
3172 struct hwi_context_memory *phwi_context,
3173 struct hwi_controller *phwi_ctrlr,
3174 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3178 struct be_queue_info *dataq, *cq;
3179 struct be_dma_mem *mem;
3180 struct be_mem_descriptor *mem_descr;
3184 dataq = &phwi_context->be_def_dataq[ulp_num];
3185 cq = &phwi_context->be_cq[0];
3186 mem = &dataq->dma_mem;
3187 mem_descr = phba->init_mem;
3188 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3189 (ulp_num * MEM_DESCR_OFFSET);
3190 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3191 ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3192 sizeof(struct phys_addr),
3193 sizeof(struct phys_addr), dq_vaddress);
3195 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3196 "BM_%d : be_fill_queue Failed for DEF PDU "
3197 "DATA on ULP : %d\n",
3202 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3203 bus_address.u.a64.address;
3204 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3206 phba->params.defpdu_data_sz,
3207 BEISCSI_DEFQ_DATA, ulp_num);
3209 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3210 "BM_%d be_cmd_create_default_pdu_queue"
3211 " Failed for DEF PDU DATA on ULP : %d\n",
3216 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3217 "BM_%d : iscsi def data id on ULP : %d is %d\n",
3219 phwi_context->be_def_dataq[ulp_num].id);
3221 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3222 "BM_%d : DEFAULT PDU DATA RING CREATED"
3223 "on ULP : %d\n", ulp_num);
3229 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3231 struct be_mem_descriptor *mem_descr;
3232 struct mem_array *pm_arr;
3233 struct be_dma_mem sgl;
3234 int status, ulp_num;
3236 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3237 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3238 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3239 mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3240 (ulp_num * MEM_DESCR_OFFSET);
3241 pm_arr = mem_descr->mem_array;
3243 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3244 status = be_cmd_iscsi_post_template_hdr(
3248 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3249 "BM_%d : Post Template HDR Failed for"
3250 "ULP_%d\n", ulp_num);
3254 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3255 "BM_%d : Template HDR Pages Posted for"
3256 "ULP_%d\n", ulp_num);
3263 beiscsi_post_pages(struct beiscsi_hba *phba)
3265 struct be_mem_descriptor *mem_descr;
3266 struct mem_array *pm_arr;
3267 unsigned int page_offset, i;
3268 struct be_dma_mem sgl;
3269 int status, ulp_num = 0;
3271 mem_descr = phba->init_mem;
3272 mem_descr += HWI_MEM_SGE;
3273 pm_arr = mem_descr->mem_array;
3275 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3276 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3279 page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3280 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3281 for (i = 0; i < mem_descr->num_elements; i++) {
3282 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3283 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3285 (pm_arr->size / PAGE_SIZE));
3286 page_offset += pm_arr->size / PAGE_SIZE;
3288 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3289 "BM_%d : post sgl failed.\n");
3294 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3295 "BM_%d : POSTED PAGES\n");
3299 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3301 struct be_dma_mem *mem = &q->dma_mem;
3303 pci_free_consistent(phba->pcidev, mem->size,
3309 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3310 u16 len, u16 entry_size)
3312 struct be_dma_mem *mem = &q->dma_mem;
3314 memset(q, 0, sizeof(*q));
3316 q->entry_size = entry_size;
3317 mem->size = len * entry_size;
3318 mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3325 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3326 struct hwi_context_memory *phwi_context,
3327 struct hwi_controller *phwi_ctrlr)
3329 unsigned int num_wrb_rings;
3331 unsigned int idx, num, i, ulp_num;
3332 struct mem_array *pwrb_arr;
3334 struct be_dma_mem sgl;
3335 struct be_mem_descriptor *mem_descr;
3336 struct hwi_wrb_context *pwrb_context;
3338 uint8_t ulp_count = 0, ulp_base_num = 0;
3339 uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3342 mem_descr = phba->init_mem;
3343 mem_descr += HWI_MEM_WRB;
3344 pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3347 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3348 "BM_%d : Memory alloc failed in create wrb ring.\n");
3351 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3352 pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3353 num_wrb_rings = mem_descr->mem_array[idx].size /
3354 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3356 for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3357 if (num_wrb_rings) {
3358 pwrb_arr[num].virtual_address = wrb_vaddr;
3359 pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3360 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3361 sizeof(struct iscsi_wrb);
3362 wrb_vaddr += pwrb_arr[num].size;
3363 pa_addr_lo += pwrb_arr[num].size;
3367 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3368 pa_addr_lo = mem_descr->mem_array[idx].\
3369 bus_address.u.a64.address;
3370 num_wrb_rings = mem_descr->mem_array[idx].size /
3371 (phba->params.wrbs_per_cxn *
3372 sizeof(struct iscsi_wrb));
3373 pwrb_arr[num].virtual_address = wrb_vaddr;
3374 pwrb_arr[num].bus_address.u.a64.address\
3376 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3377 sizeof(struct iscsi_wrb);
3378 wrb_vaddr += pwrb_arr[num].size;
3379 pa_addr_lo += pwrb_arr[num].size;
3384 /* Get the ULP Count */
3385 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3386 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3388 ulp_base_num = ulp_num;
3389 cid_count_ulp[ulp_num] =
3390 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3393 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3394 if (ulp_count > 1) {
3395 ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3397 if (!cid_count_ulp[ulp_base_num])
3398 ulp_base_num = (ulp_base_num + 1) %
3401 cid_count_ulp[ulp_base_num]--;
3405 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3406 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3407 &phwi_context->be_wrbq[i],
3408 &phwi_ctrlr->wrb_context[i],
3411 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3412 "BM_%d : wrbq create failed.");
3416 pwrb_context = &phwi_ctrlr->wrb_context[i];
3417 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3423 static void free_wrb_handles(struct beiscsi_hba *phba)
3426 struct hwi_controller *phwi_ctrlr;
3427 struct hwi_wrb_context *pwrb_context;
3429 phwi_ctrlr = phba->phwi_ctrlr;
3430 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3431 pwrb_context = &phwi_ctrlr->wrb_context[index];
3432 kfree(pwrb_context->pwrb_handle_base);
3433 kfree(pwrb_context->pwrb_handle_basestd);
3437 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3439 struct be_ctrl_info *ctrl = &phba->ctrl;
3440 struct be_dma_mem *ptag_mem;
3441 struct be_queue_info *q;
3444 q = &phba->ctrl.mcc_obj.q;
3445 for (i = 0; i < MAX_MCC_CMD; i++) {
3447 if (!test_bit(MCC_TAG_STATE_RUNNING,
3448 &ctrl->ptag_state[tag].tag_state))
3451 if (test_bit(MCC_TAG_STATE_TIMEOUT,
3452 &ctrl->ptag_state[tag].tag_state)) {
3453 ptag_mem = &ctrl->ptag_state[tag].tag_mem_state;
3454 if (ptag_mem->size) {
3455 pci_free_consistent(ctrl->pdev,
3464 * If MCC is still active and waiting then wake up the process.
3465 * We are here only because port is going offline. The process
3466 * sees that (BEISCSI_HBA_ONLINE is cleared) and EIO error is
3467 * returned for the operation and allocated memory cleaned up.
3469 if (waitqueue_active(&ctrl->mcc_wait[tag])) {
3470 ctrl->mcc_tag_status[tag] = MCC_STATUS_FAILED;
3471 ctrl->mcc_tag_status[tag] |= CQE_VALID_MASK;
3472 wake_up_interruptible(&ctrl->mcc_wait[tag]);
3474 * Control tag info gets reinitialized in enable
3475 * so wait for the process to clear running state.
3477 while (test_bit(MCC_TAG_STATE_RUNNING,
3478 &ctrl->ptag_state[tag].tag_state))
3479 schedule_timeout_uninterruptible(HZ);
3482 * For MCC with tag_states MCC_TAG_STATE_ASYNC and
3483 * MCC_TAG_STATE_IGNORE nothing needs to done.
3487 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3488 be_queue_free(phba, q);
3491 q = &phba->ctrl.mcc_obj.cq;
3493 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3494 be_queue_free(phba, q);
3498 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3499 struct hwi_context_memory *phwi_context)
3501 struct be_queue_info *q, *cq;
3502 struct be_ctrl_info *ctrl = &phba->ctrl;
3504 /* Alloc MCC compl queue */
3505 cq = &phba->ctrl.mcc_obj.cq;
3506 if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3507 sizeof(struct be_mcc_compl)))
3509 /* Ask BE to create MCC compl queue; */
3510 if (phba->pcidev->msix_enabled) {
3511 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3512 [phba->num_cpus].q, false, true, 0))
3515 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3520 /* Alloc MCC queue */
3521 q = &phba->ctrl.mcc_obj.q;
3522 if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3523 goto mcc_cq_destroy;
3525 /* Ask BE to create MCC queue */
3526 if (beiscsi_cmd_mccq_create(phba, q, cq))
3532 be_queue_free(phba, q);
3534 beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3536 be_queue_free(phba, cq);
3541 static void be2iscsi_enable_msix(struct beiscsi_hba *phba)
3545 switch (phba->generation) {
3548 nvec = BEISCSI_MAX_NUM_CPUS + 1;
3551 nvec = phba->fw_config.eqid_count;
3558 /* if eqid_count == 1 fall back to INTX */
3559 if (enable_msix && nvec > 1) {
3560 const struct irq_affinity desc = { .post_vectors = 1 };
3562 if (pci_alloc_irq_vectors_affinity(phba->pcidev, 2, nvec,
3563 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, &desc) < 0) {
3564 phba->num_cpus = nvec - 1;
3572 static void hwi_purge_eq(struct beiscsi_hba *phba)
3574 struct hwi_controller *phwi_ctrlr;
3575 struct hwi_context_memory *phwi_context;
3576 struct be_queue_info *eq;
3577 struct be_eq_entry *eqe = NULL;
3579 unsigned int num_processed;
3581 if (beiscsi_hba_in_error(phba))
3584 phwi_ctrlr = phba->phwi_ctrlr;
3585 phwi_context = phwi_ctrlr->phwi_ctxt;
3586 if (phba->pcidev->msix_enabled)
3591 for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3592 eq = &phwi_context->be_eq[i].q;
3593 eqe = queue_tail_node(eq);
3595 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3597 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3599 eqe = queue_tail_node(eq);
3604 hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3608 static void hwi_cleanup_port(struct beiscsi_hba *phba)
3610 struct be_queue_info *q;
3611 struct be_ctrl_info *ctrl = &phba->ctrl;
3612 struct hwi_controller *phwi_ctrlr;
3613 struct hwi_context_memory *phwi_context;
3614 int i, eq_for_mcc, ulp_num;
3616 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3617 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3618 beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3621 * Purge all EQ entries that may have been left out. This is to
3622 * workaround a problem we've seen occasionally where driver gets an
3623 * interrupt with EQ entry bit set after stopping the controller.
3627 phwi_ctrlr = phba->phwi_ctrlr;
3628 phwi_context = phwi_ctrlr->phwi_ctxt;
3630 be_cmd_iscsi_remove_template_hdr(ctrl);
3632 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3633 q = &phwi_context->be_wrbq[i];
3635 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3637 kfree(phwi_context->be_wrbq);
3638 free_wrb_handles(phba);
3640 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3641 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3643 q = &phwi_context->be_def_hdrq[ulp_num];
3645 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3647 q = &phwi_context->be_def_dataq[ulp_num];
3649 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3653 beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3655 for (i = 0; i < (phba->num_cpus); i++) {
3656 q = &phwi_context->be_cq[i];
3658 be_queue_free(phba, q);
3659 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3663 be_mcc_queues_destroy(phba);
3664 if (phba->pcidev->msix_enabled)
3668 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3669 q = &phwi_context->be_eq[i].q;
3671 be_queue_free(phba, q);
3672 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3675 /* this ensures complete FW cleanup */
3676 beiscsi_cmd_function_reset(phba);
3677 /* last communication, indicate driver is unloading */
3678 beiscsi_cmd_special_wrb(&phba->ctrl, 0);
3681 static int hwi_init_port(struct beiscsi_hba *phba)
3683 struct hwi_controller *phwi_ctrlr;
3684 struct hwi_context_memory *phwi_context;
3685 unsigned int def_pdu_ring_sz;
3686 struct be_ctrl_info *ctrl = &phba->ctrl;
3687 int status, ulp_num;
3690 phwi_ctrlr = phba->phwi_ctrlr;
3691 phwi_context = phwi_ctrlr->phwi_ctxt;
3692 phwi_context->max_eqd = 128;
3693 phwi_context->min_eqd = 0;
3694 phwi_context->cur_eqd = 32;
3695 /* set port optic state to unknown */
3696 phba->optic_state = 0xff;
3698 status = beiscsi_create_eqs(phba, phwi_context);
3700 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3701 "BM_%d : EQ not created\n");
3705 status = be_mcc_queues_create(phba, phwi_context);
3709 status = beiscsi_check_supported_fw(ctrl, phba);
3711 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3712 "BM_%d : Unsupported fw version\n");
3716 status = beiscsi_create_cqs(phba, phwi_context);
3718 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3719 "BM_%d : CQ not created\n");
3723 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3724 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3725 nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
3726 def_pdu_ring_sz = nbufs * sizeof(struct phys_addr);
3728 status = beiscsi_create_def_hdr(phba, phwi_context,
3733 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3734 "BM_%d : Default Header not created for ULP : %d\n",
3739 status = beiscsi_create_def_data(phba, phwi_context,
3744 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3745 "BM_%d : Default Data not created for ULP : %d\n",
3750 * Now that the default PDU rings have been created,
3751 * let EP know about it.
3753 beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_HDR,
3755 beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_DATA,
3760 status = beiscsi_post_pages(phba);
3762 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3763 "BM_%d : Post SGL Pages Failed\n");
3767 status = beiscsi_post_template_hdr(phba);
3769 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3770 "BM_%d : Template HDR Posting for CXN Failed\n");
3773 status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3775 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3776 "BM_%d : WRB Rings not created\n");
3780 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3781 uint16_t async_arr_idx = 0;
3783 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3785 struct hd_async_context *pasync_ctx;
3787 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3788 phwi_ctrlr, ulp_num);
3790 phba->params.cxns_per_ctrl; cri++) {
3791 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3793 pasync_ctx->cid_to_async_cri_map[
3794 phwi_ctrlr->wrb_context[cri].cid] =
3800 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3801 "BM_%d : hwi_init_port success\n");
3805 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3806 "BM_%d : hwi_init_port failed");
3807 hwi_cleanup_port(phba);
3811 static int hwi_init_controller(struct beiscsi_hba *phba)
3813 struct hwi_controller *phwi_ctrlr;
3815 phwi_ctrlr = phba->phwi_ctrlr;
3816 if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3817 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3818 init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3819 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3820 "BM_%d : phwi_ctrlr->phwi_ctxt=%p\n",
3821 phwi_ctrlr->phwi_ctxt);
3823 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3824 "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3825 "than one element.Failing to load\n");
3829 iscsi_init_global_templates(phba);
3830 if (beiscsi_init_wrb_handle(phba))
3833 if (hwi_init_async_pdu_ctx(phba)) {
3834 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3835 "BM_%d : hwi_init_async_pdu_ctx failed\n");
3839 if (hwi_init_port(phba) != 0) {
3840 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3841 "BM_%d : hwi_init_controller failed\n");
3848 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3850 struct be_mem_descriptor *mem_descr;
3853 mem_descr = phba->init_mem;
3856 for (i = 0; i < SE_MEM_MAX; i++) {
3857 for (j = mem_descr->num_elements; j > 0; j--) {
3858 pci_free_consistent(phba->pcidev,
3859 mem_descr->mem_array[j - 1].size,
3860 mem_descr->mem_array[j - 1].virtual_address,
3861 (unsigned long)mem_descr->mem_array[j - 1].
3862 bus_address.u.a64.address);
3865 kfree(mem_descr->mem_array);
3868 kfree(phba->init_mem);
3869 kfree(phba->phwi_ctrlr->wrb_context);
3870 kfree(phba->phwi_ctrlr);
3873 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3875 struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3876 struct sgl_handle *psgl_handle;
3877 struct iscsi_sge *pfrag;
3878 unsigned int arr_index, i, idx;
3879 unsigned int ulp_icd_start, ulp_num = 0;
3881 phba->io_sgl_hndl_avbl = 0;
3882 phba->eh_sgl_hndl_avbl = 0;
3884 mem_descr_sglh = phba->init_mem;
3885 mem_descr_sglh += HWI_MEM_SGLH;
3886 if (1 == mem_descr_sglh->num_elements) {
3887 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3888 phba->params.ios_per_ctrl,
3890 if (!phba->io_sgl_hndl_base) {
3891 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3892 "BM_%d : Mem Alloc Failed. Failing to load\n");
3895 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3896 (phba->params.icds_per_ctrl -
3897 phba->params.ios_per_ctrl),
3899 if (!phba->eh_sgl_hndl_base) {
3900 kfree(phba->io_sgl_hndl_base);
3901 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3902 "BM_%d : Mem Alloc Failed. Failing to load\n");
3906 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3907 "BM_%d : HWI_MEM_SGLH is more than one element."
3908 "Failing to load\n");
3914 while (idx < mem_descr_sglh->num_elements) {
3915 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
3917 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
3918 sizeof(struct sgl_handle)); i++) {
3919 if (arr_index < phba->params.ios_per_ctrl) {
3920 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3921 phba->io_sgl_hndl_avbl++;
3924 phba->eh_sgl_hndl_base[arr_index -
3925 phba->params.ios_per_ctrl] =
3928 phba->eh_sgl_hndl_avbl++;
3934 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3935 "BM_%d : phba->io_sgl_hndl_avbl=%d"
3936 "phba->eh_sgl_hndl_avbl=%d\n",
3937 phba->io_sgl_hndl_avbl,
3938 phba->eh_sgl_hndl_avbl);
3940 mem_descr_sg = phba->init_mem;
3941 mem_descr_sg += HWI_MEM_SGE;
3942 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3943 "\n BM_%d : mem_descr_sg->num_elements=%d\n",
3944 mem_descr_sg->num_elements);
3946 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3947 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3950 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
3954 while (idx < mem_descr_sg->num_elements) {
3955 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
3958 i < (mem_descr_sg->mem_array[idx].size) /
3959 (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3961 if (arr_index < phba->params.ios_per_ctrl)
3962 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3964 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3965 phba->params.ios_per_ctrl];
3966 psgl_handle->pfrag = pfrag;
3967 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
3968 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3969 pfrag += phba->params.num_sge_per_io;
3970 psgl_handle->sgl_index = ulp_icd_start + arr_index++;
3974 phba->io_sgl_free_index = 0;
3975 phba->io_sgl_alloc_index = 0;
3976 phba->eh_sgl_free_index = 0;
3977 phba->eh_sgl_alloc_index = 0;
3981 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3984 uint16_t i, ulp_num;
3985 struct ulp_cid_info *ptr_cid_info = NULL;
3987 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3988 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
3989 ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
3992 if (!ptr_cid_info) {
3993 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3994 "BM_%d : Failed to allocate memory"
3995 "for ULP_CID_INFO for ULP : %d\n",
4002 /* Allocate memory for CID array */
4003 ptr_cid_info->cid_array =
4004 kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
4005 sizeof(*ptr_cid_info->cid_array),
4007 if (!ptr_cid_info->cid_array) {
4008 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4009 "BM_%d : Failed to allocate memory"
4010 "for CID_ARRAY for ULP : %d\n",
4012 kfree(ptr_cid_info);
4013 ptr_cid_info = NULL;
4018 ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4021 /* Save the cid_info_array ptr */
4022 phba->cid_array_info[ulp_num] = ptr_cid_info;
4025 phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4026 phba->params.cxns_per_ctrl, GFP_KERNEL);
4027 if (!phba->ep_array) {
4028 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4029 "BM_%d : Failed to allocate memory in "
4030 "hba_setup_cid_tbls\n");
4036 phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4037 phba->params.cxns_per_ctrl, GFP_KERNEL);
4038 if (!phba->conn_table) {
4039 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4040 "BM_%d : Failed to allocate memory in"
4041 "hba_setup_cid_tbls\n");
4043 kfree(phba->ep_array);
4044 phba->ep_array = NULL;
4050 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4051 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4053 ptr_cid_info = phba->cid_array_info[ulp_num];
4054 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4055 phba->phwi_ctrlr->wrb_context[i].cid;
4059 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4060 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4061 ptr_cid_info = phba->cid_array_info[ulp_num];
4063 ptr_cid_info->cid_alloc = 0;
4064 ptr_cid_info->cid_free = 0;
4070 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4071 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4072 ptr_cid_info = phba->cid_array_info[ulp_num];
4075 kfree(ptr_cid_info->cid_array);
4076 kfree(ptr_cid_info);
4077 phba->cid_array_info[ulp_num] = NULL;
4085 static void hwi_enable_intr(struct beiscsi_hba *phba)
4087 struct be_ctrl_info *ctrl = &phba->ctrl;
4088 struct hwi_controller *phwi_ctrlr;
4089 struct hwi_context_memory *phwi_context;
4090 struct be_queue_info *eq;
4095 phwi_ctrlr = phba->phwi_ctrlr;
4096 phwi_context = phwi_ctrlr->phwi_ctxt;
4098 addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4099 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4100 reg = ioread32(addr);
4102 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4104 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4105 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4106 "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4107 iowrite32(reg, addr);
4110 if (!phba->pcidev->msix_enabled) {
4111 eq = &phwi_context->be_eq[0].q;
4112 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4113 "BM_%d : eq->id=%d\n", eq->id);
4115 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4117 for (i = 0; i <= phba->num_cpus; i++) {
4118 eq = &phwi_context->be_eq[i].q;
4119 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4120 "BM_%d : eq->id=%d\n", eq->id);
4121 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4126 static void hwi_disable_intr(struct beiscsi_hba *phba)
4128 struct be_ctrl_info *ctrl = &phba->ctrl;
4130 u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4131 u32 reg = ioread32(addr);
4133 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4135 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4136 iowrite32(reg, addr);
4138 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4139 "BM_%d : In hwi_disable_intr, Already Disabled\n");
4142 static int beiscsi_init_port(struct beiscsi_hba *phba)
4146 ret = hwi_init_controller(phba);
4148 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4149 "BM_%d : init controller failed\n");
4152 ret = beiscsi_init_sgl_handle(phba);
4154 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4155 "BM_%d : init sgl handles failed\n");
4159 ret = hba_setup_cid_tbls(phba);
4161 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4162 "BM_%d : setup CID table failed\n");
4163 kfree(phba->io_sgl_hndl_base);
4164 kfree(phba->eh_sgl_hndl_base);
4170 hwi_cleanup_port(phba);
4174 static void beiscsi_cleanup_port(struct beiscsi_hba *phba)
4176 struct ulp_cid_info *ptr_cid_info = NULL;
4179 kfree(phba->io_sgl_hndl_base);
4180 kfree(phba->eh_sgl_hndl_base);
4181 kfree(phba->ep_array);
4182 kfree(phba->conn_table);
4184 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4185 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4186 ptr_cid_info = phba->cid_array_info[ulp_num];
4189 kfree(ptr_cid_info->cid_array);
4190 kfree(ptr_cid_info);
4191 phba->cid_array_info[ulp_num] = NULL;
4198 * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4199 * @beiscsi_conn: ptr to the conn to be cleaned up
4200 * @task: ptr to iscsi_task resource to be freed.
4202 * Free driver mgmt resources binded to CXN.
4205 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4206 struct iscsi_task *task)
4208 struct beiscsi_io_task *io_task;
4209 struct beiscsi_hba *phba = beiscsi_conn->phba;
4210 struct hwi_wrb_context *pwrb_context;
4211 struct hwi_controller *phwi_ctrlr;
4212 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4213 beiscsi_conn->beiscsi_conn_cid);
4215 phwi_ctrlr = phba->phwi_ctrlr;
4216 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4218 io_task = task->dd_data;
4220 if (io_task->pwrb_handle) {
4221 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4222 io_task->pwrb_handle = NULL;
4225 if (io_task->psgl_handle) {
4226 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4227 io_task->psgl_handle = NULL;
4230 if (io_task->mtask_addr) {
4231 pci_unmap_single(phba->pcidev,
4232 io_task->mtask_addr,
4233 io_task->mtask_data_count,
4235 io_task->mtask_addr = 0;
4240 * beiscsi_cleanup_task()- Free driver resources of the task
4241 * @task: ptr to the iscsi task
4244 static void beiscsi_cleanup_task(struct iscsi_task *task)
4246 struct beiscsi_io_task *io_task = task->dd_data;
4247 struct iscsi_conn *conn = task->conn;
4248 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4249 struct beiscsi_hba *phba = beiscsi_conn->phba;
4250 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4251 struct hwi_wrb_context *pwrb_context;
4252 struct hwi_controller *phwi_ctrlr;
4253 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4254 beiscsi_conn->beiscsi_conn_cid);
4256 phwi_ctrlr = phba->phwi_ctrlr;
4257 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4259 if (io_task->cmd_bhs) {
4260 dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4261 io_task->bhs_pa.u.a64.address);
4262 io_task->cmd_bhs = NULL;
4267 if (io_task->pwrb_handle) {
4268 free_wrb_handle(phba, pwrb_context,
4269 io_task->pwrb_handle);
4270 io_task->pwrb_handle = NULL;
4273 if (io_task->psgl_handle) {
4274 free_io_sgl_handle(phba, io_task->psgl_handle);
4275 io_task->psgl_handle = NULL;
4278 if (io_task->scsi_cmnd) {
4279 if (io_task->num_sg)
4280 scsi_dma_unmap(io_task->scsi_cmnd);
4281 io_task->scsi_cmnd = NULL;
4284 if (!beiscsi_conn->login_in_progress)
4285 beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4290 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4291 struct beiscsi_offload_params *params)
4293 struct wrb_handle *pwrb_handle;
4294 struct hwi_wrb_context *pwrb_context = NULL;
4295 struct beiscsi_hba *phba = beiscsi_conn->phba;
4296 struct iscsi_task *task = beiscsi_conn->task;
4297 struct iscsi_session *session = task->conn->session;
4301 * We can always use 0 here because it is reserved by libiscsi for
4302 * login/startup related tasks.
4304 beiscsi_conn->login_in_progress = 0;
4305 spin_lock_bh(&session->back_lock);
4306 beiscsi_cleanup_task(task);
4307 spin_unlock_bh(&session->back_lock);
4309 pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4312 /* Check for the adapter family */
4313 if (is_chip_be2_be3r(phba))
4314 beiscsi_offload_cxn_v0(params, pwrb_handle,
4318 beiscsi_offload_cxn_v2(params, pwrb_handle,
4321 be_dws_le_to_cpu(pwrb_handle->pwrb,
4322 sizeof(struct iscsi_target_context_update_wrb));
4324 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4325 doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4326 << DB_DEF_PDU_WRB_INDEX_SHIFT;
4327 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4328 iowrite32(doorbell, phba->db_va +
4329 beiscsi_conn->doorbell_offset);
4332 * There is no completion for CONTEXT_UPDATE. The completion of next
4333 * WRB posted guarantees FW's processing and DMA'ing of it.
4334 * Use beiscsi_put_wrb_handle to put it back in the pool which makes
4335 * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
4337 beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
4338 phba->params.wrbs_per_cxn);
4339 beiscsi_log(phba, KERN_INFO,
4340 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4341 "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
4342 pwrb_handle, pwrb_context->free_index,
4343 pwrb_context->wrb_handles_available);
4346 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4347 int *index, int *age)
4351 *age = conn->session->age;
4355 * beiscsi_alloc_pdu - allocates pdu and related resources
4356 * @task: libiscsi task
4357 * @opcode: opcode of pdu for task
4359 * This is called with the session lock held. It will allocate
4360 * the wrb and sgl if needed for the command. And it will prep
4361 * the pdu's itt. beiscsi_parse_pdu will later translate
4362 * the pdu itt to the libiscsi task itt.
4364 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4366 struct beiscsi_io_task *io_task = task->dd_data;
4367 struct iscsi_conn *conn = task->conn;
4368 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4369 struct beiscsi_hba *phba = beiscsi_conn->phba;
4370 struct hwi_wrb_context *pwrb_context;
4371 struct hwi_controller *phwi_ctrlr;
4373 uint16_t cri_index = 0;
4374 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4377 io_task->cmd_bhs = dma_pool_alloc(beiscsi_sess->bhs_pool,
4378 GFP_ATOMIC, &paddr);
4379 if (!io_task->cmd_bhs)
4381 io_task->bhs_pa.u.a64.address = paddr;
4382 io_task->libiscsi_itt = (itt_t)task->itt;
4383 io_task->conn = beiscsi_conn;
4385 task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4386 task->hdr_max = sizeof(struct be_cmd_bhs);
4387 io_task->psgl_handle = NULL;
4388 io_task->pwrb_handle = NULL;
4391 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4392 if (!io_task->psgl_handle) {
4393 beiscsi_log(phba, KERN_ERR,
4394 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4395 "BM_%d : Alloc of IO_SGL_ICD Failed"
4396 "for the CID : %d\n",
4397 beiscsi_conn->beiscsi_conn_cid);
4400 io_task->pwrb_handle = alloc_wrb_handle(phba,
4401 beiscsi_conn->beiscsi_conn_cid,
4402 &io_task->pwrb_context);
4403 if (!io_task->pwrb_handle) {
4404 beiscsi_log(phba, KERN_ERR,
4405 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4406 "BM_%d : Alloc of WRB_HANDLE Failed"
4407 "for the CID : %d\n",
4408 beiscsi_conn->beiscsi_conn_cid);
4412 io_task->scsi_cmnd = NULL;
4413 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4414 beiscsi_conn->task = task;
4415 if (!beiscsi_conn->login_in_progress) {
4416 io_task->psgl_handle = (struct sgl_handle *)
4417 alloc_mgmt_sgl_handle(phba);
4418 if (!io_task->psgl_handle) {
4419 beiscsi_log(phba, KERN_ERR,
4422 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4423 "for the CID : %d\n",
4429 beiscsi_conn->login_in_progress = 1;
4430 beiscsi_conn->plogin_sgl_handle =
4431 io_task->psgl_handle;
4432 io_task->pwrb_handle =
4433 alloc_wrb_handle(phba,
4434 beiscsi_conn->beiscsi_conn_cid,
4435 &io_task->pwrb_context);
4436 if (!io_task->pwrb_handle) {
4437 beiscsi_log(phba, KERN_ERR,
4440 "BM_%d : Alloc of WRB_HANDLE Failed"
4441 "for the CID : %d\n",
4444 goto free_mgmt_hndls;
4446 beiscsi_conn->plogin_wrb_handle =
4447 io_task->pwrb_handle;
4450 io_task->psgl_handle =
4451 beiscsi_conn->plogin_sgl_handle;
4452 io_task->pwrb_handle =
4453 beiscsi_conn->plogin_wrb_handle;
4456 io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4457 if (!io_task->psgl_handle) {
4458 beiscsi_log(phba, KERN_ERR,
4461 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4462 "for the CID : %d\n",
4467 io_task->pwrb_handle =
4468 alloc_wrb_handle(phba,
4469 beiscsi_conn->beiscsi_conn_cid,
4470 &io_task->pwrb_context);
4471 if (!io_task->pwrb_handle) {
4472 beiscsi_log(phba, KERN_ERR,
4473 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4474 "BM_%d : Alloc of WRB_HANDLE Failed"
4475 "for the CID : %d\n",
4476 beiscsi_conn->beiscsi_conn_cid);
4477 goto free_mgmt_hndls;
4482 itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4483 wrb_index << 16) | (unsigned int)
4484 (io_task->psgl_handle->sgl_index));
4485 io_task->pwrb_handle->pio_handle = task;
4487 io_task->cmd_bhs->iscsi_hdr.itt = itt;
4491 free_io_sgl_handle(phba, io_task->psgl_handle);
4494 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4495 io_task->psgl_handle = NULL;
4497 phwi_ctrlr = phba->phwi_ctrlr;
4498 cri_index = BE_GET_CRI_FROM_CID(
4499 beiscsi_conn->beiscsi_conn_cid);
4500 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4501 if (io_task->pwrb_handle)
4502 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4503 io_task->pwrb_handle = NULL;
4504 dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4505 io_task->bhs_pa.u.a64.address);
4506 io_task->cmd_bhs = NULL;
4509 static int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4510 unsigned int num_sg, unsigned int xferlen,
4511 unsigned int writedir)
4514 struct beiscsi_io_task *io_task = task->dd_data;
4515 struct iscsi_conn *conn = task->conn;
4516 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4517 struct beiscsi_hba *phba = beiscsi_conn->phba;
4518 struct iscsi_wrb *pwrb = NULL;
4519 unsigned int doorbell = 0;
4521 pwrb = io_task->pwrb_handle->pwrb;
4523 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4526 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4528 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4530 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4532 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4535 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4538 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4539 cpu_to_be16(*(unsigned short *)
4540 &io_task->cmd_bhs->iscsi_hdr.lun));
4541 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4542 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4543 io_task->pwrb_handle->wrb_index);
4544 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4545 be32_to_cpu(task->cmdsn));
4546 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4547 io_task->psgl_handle->sgl_index);
4549 hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4550 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4551 io_task->pwrb_handle->wrb_index);
4552 if (io_task->pwrb_context->plast_wrb)
4553 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4554 io_task->pwrb_context->plast_wrb,
4555 io_task->pwrb_handle->wrb_index);
4556 io_task->pwrb_context->plast_wrb = pwrb;
4558 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4560 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4561 doorbell |= (io_task->pwrb_handle->wrb_index &
4562 DB_DEF_PDU_WRB_INDEX_MASK) <<
4563 DB_DEF_PDU_WRB_INDEX_SHIFT;
4564 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4565 iowrite32(doorbell, phba->db_va +
4566 beiscsi_conn->doorbell_offset);
4570 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4571 unsigned int num_sg, unsigned int xferlen,
4572 unsigned int writedir)
4575 struct beiscsi_io_task *io_task = task->dd_data;
4576 struct iscsi_conn *conn = task->conn;
4577 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4578 struct beiscsi_hba *phba = beiscsi_conn->phba;
4579 struct iscsi_wrb *pwrb = NULL;
4580 unsigned int doorbell = 0;
4582 pwrb = io_task->pwrb_handle->pwrb;
4583 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4586 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4588 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4590 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4592 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4595 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4598 AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4599 cpu_to_be16(*(unsigned short *)
4600 &io_task->cmd_bhs->iscsi_hdr.lun));
4601 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4602 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4603 io_task->pwrb_handle->wrb_index);
4604 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4605 be32_to_cpu(task->cmdsn));
4606 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4607 io_task->psgl_handle->sgl_index);
4609 hwi_write_sgl(pwrb, sg, num_sg, io_task);
4611 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4612 io_task->pwrb_handle->wrb_index);
4613 if (io_task->pwrb_context->plast_wrb)
4614 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4615 io_task->pwrb_context->plast_wrb,
4616 io_task->pwrb_handle->wrb_index);
4617 io_task->pwrb_context->plast_wrb = pwrb;
4619 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4621 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4622 doorbell |= (io_task->pwrb_handle->wrb_index &
4623 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4624 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4626 iowrite32(doorbell, phba->db_va +
4627 beiscsi_conn->doorbell_offset);
4631 static int beiscsi_mtask(struct iscsi_task *task)
4633 struct beiscsi_io_task *io_task = task->dd_data;
4634 struct iscsi_conn *conn = task->conn;
4635 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4636 struct beiscsi_hba *phba = beiscsi_conn->phba;
4637 struct iscsi_wrb *pwrb = NULL;
4638 unsigned int doorbell = 0;
4640 unsigned int pwrb_typeoffset = 0;
4643 cid = beiscsi_conn->beiscsi_conn_cid;
4644 pwrb = io_task->pwrb_handle->pwrb;
4646 if (is_chip_be2_be3r(phba)) {
4647 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4648 be32_to_cpu(task->cmdsn));
4649 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4650 io_task->pwrb_handle->wrb_index);
4651 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4652 io_task->psgl_handle->sgl_index);
4653 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4655 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4656 io_task->pwrb_handle->wrb_index);
4657 if (io_task->pwrb_context->plast_wrb)
4658 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4659 io_task->pwrb_context->plast_wrb,
4660 io_task->pwrb_handle->wrb_index);
4661 io_task->pwrb_context->plast_wrb = pwrb;
4663 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4665 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4666 be32_to_cpu(task->cmdsn));
4667 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4668 io_task->pwrb_handle->wrb_index);
4669 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4670 io_task->psgl_handle->sgl_index);
4671 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4673 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4674 io_task->pwrb_handle->wrb_index);
4675 if (io_task->pwrb_context->plast_wrb)
4676 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4677 io_task->pwrb_context->plast_wrb,
4678 io_task->pwrb_handle->wrb_index);
4679 io_task->pwrb_context->plast_wrb = pwrb;
4681 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4685 switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4686 case ISCSI_OP_LOGIN:
4687 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4688 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4689 ret = hwi_write_buffer(pwrb, task);
4691 case ISCSI_OP_NOOP_OUT:
4692 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4693 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4694 if (is_chip_be2_be3r(phba))
4695 AMAP_SET_BITS(struct amap_iscsi_wrb,
4698 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4701 ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
4702 if (is_chip_be2_be3r(phba))
4703 AMAP_SET_BITS(struct amap_iscsi_wrb,
4706 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4709 ret = hwi_write_buffer(pwrb, task);
4712 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4713 ret = hwi_write_buffer(pwrb, task);
4715 case ISCSI_OP_SCSI_TMFUNC:
4716 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
4717 ret = hwi_write_buffer(pwrb, task);
4719 case ISCSI_OP_LOGOUT:
4720 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
4721 ret = hwi_write_buffer(pwrb, task);
4725 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4726 "BM_%d : opcode =%d Not supported\n",
4727 task->hdr->opcode & ISCSI_OPCODE_MASK);
4735 /* Set the task type */
4736 io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4737 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4738 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
4740 doorbell |= cid & DB_WRB_POST_CID_MASK;
4741 doorbell |= (io_task->pwrb_handle->wrb_index &
4742 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4743 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4744 iowrite32(doorbell, phba->db_va +
4745 beiscsi_conn->doorbell_offset);
4749 static int beiscsi_task_xmit(struct iscsi_task *task)
4751 struct beiscsi_io_task *io_task = task->dd_data;
4752 struct scsi_cmnd *sc = task->sc;
4753 struct beiscsi_hba *phba;
4754 struct scatterlist *sg;
4756 unsigned int writedir = 0, xferlen = 0;
4758 phba = io_task->conn->phba;
4760 * HBA in error includes BEISCSI_HBA_FW_TIMEOUT. IO path might be
4761 * operational if FW still gets heartbeat from EP FW. Is management
4762 * path really needed to continue further?
4764 if (!beiscsi_hba_is_online(phba))
4767 if (!io_task->conn->login_in_progress)
4768 task->hdr->exp_statsn = 0;
4771 return beiscsi_mtask(task);
4773 io_task->scsi_cmnd = sc;
4774 io_task->num_sg = 0;
4775 num_sg = scsi_dma_map(sc);
4777 beiscsi_log(phba, KERN_ERR,
4778 BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
4779 "BM_%d : scsi_dma_map Failed "
4780 "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
4781 be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
4782 io_task->libiscsi_itt, scsi_bufflen(sc));
4787 * For scsi cmd task, check num_sg before unmapping in cleanup_task.
4788 * For management task, cleanup_task checks mtask_addr before unmapping.
4790 io_task->num_sg = num_sg;
4791 xferlen = scsi_bufflen(sc);
4792 sg = scsi_sglist(sc);
4793 if (sc->sc_data_direction == DMA_TO_DEVICE)
4798 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
4802 * beiscsi_bsg_request - handle bsg request from ISCSI transport
4803 * @job: job to handle
4805 static int beiscsi_bsg_request(struct bsg_job *job)
4807 struct Scsi_Host *shost;
4808 struct beiscsi_hba *phba;
4809 struct iscsi_bsg_request *bsg_req = job->request;
4812 struct be_dma_mem nonemb_cmd;
4813 struct be_cmd_resp_hdr *resp;
4814 struct iscsi_bsg_reply *bsg_reply = job->reply;
4815 unsigned short status, extd_status;
4817 shost = iscsi_job_to_shost(job);
4818 phba = iscsi_host_priv(shost);
4820 if (!beiscsi_hba_is_online(phba)) {
4821 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
4822 "BM_%d : HBA in error 0x%lx\n", phba->state);
4826 switch (bsg_req->msgcode) {
4827 case ISCSI_BSG_HST_VENDOR:
4828 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4829 job->request_payload.payload_len,
4831 if (nonemb_cmd.va == NULL) {
4832 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4833 "BM_%d : Failed to allocate memory for "
4834 "beiscsi_bsg_request\n");
4837 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4840 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4841 "BM_%d : MBX Tag Allocation Failed\n");
4843 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4844 nonemb_cmd.va, nonemb_cmd.dma);
4848 rc = wait_event_interruptible_timeout(
4849 phba->ctrl.mcc_wait[tag],
4850 phba->ctrl.mcc_tag_status[tag],
4852 BEISCSI_HOST_MBX_TIMEOUT));
4854 if (!test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
4855 clear_bit(MCC_TAG_STATE_RUNNING,
4856 &phba->ctrl.ptag_state[tag].tag_state);
4857 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4858 nonemb_cmd.va, nonemb_cmd.dma);
4861 extd_status = (phba->ctrl.mcc_tag_status[tag] &
4862 CQE_STATUS_ADDL_MASK) >> CQE_STATUS_ADDL_SHIFT;
4863 status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
4864 free_mcc_wrb(&phba->ctrl, tag);
4865 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4866 sg_copy_from_buffer(job->reply_payload.sg_list,
4867 job->reply_payload.sg_cnt,
4868 nonemb_cmd.va, (resp->response_length
4870 bsg_reply->reply_payload_rcv_len = resp->response_length;
4871 bsg_reply->result = status;
4872 bsg_job_done(job, bsg_reply->result,
4873 bsg_reply->reply_payload_rcv_len);
4874 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4875 nonemb_cmd.va, nonemb_cmd.dma);
4876 if (status || extd_status) {
4877 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4878 "BM_%d : MBX Cmd Failed"
4879 " status = %d extd_status = %d\n",
4880 status, extd_status);
4889 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4890 "BM_%d : Unsupported bsg command: 0x%x\n",
4898 static void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4900 /* Set the logging parameter */
4901 beiscsi_log_enable_init(phba, beiscsi_log_enable);
4904 void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle)
4906 if (phba->boot_struct.boot_kset)
4909 /* skip if boot work is already in progress */
4910 if (test_and_set_bit(BEISCSI_HBA_BOOT_WORK, &phba->state))
4913 phba->boot_struct.retry = 3;
4914 phba->boot_struct.tag = 0;
4915 phba->boot_struct.s_handle = s_handle;
4916 phba->boot_struct.action = BEISCSI_BOOT_GET_SHANDLE;
4917 schedule_work(&phba->boot_work);
4920 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
4922 struct beiscsi_hba *phba = data;
4923 struct mgmt_session_info *boot_sess = &phba->boot_struct.boot_sess;
4924 struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
4929 case ISCSI_BOOT_TGT_NAME:
4930 rc = sprintf(buf, "%.*s\n",
4931 (int)strlen(boot_sess->target_name),
4932 (char *)&boot_sess->target_name);
4934 case ISCSI_BOOT_TGT_IP_ADDR:
4935 if (boot_conn->dest_ipaddr.ip_type == BEISCSI_IP_TYPE_V4)
4936 rc = sprintf(buf, "%pI4\n",
4937 (char *)&boot_conn->dest_ipaddr.addr);
4939 rc = sprintf(str, "%pI6\n",
4940 (char *)&boot_conn->dest_ipaddr.addr);
4942 case ISCSI_BOOT_TGT_PORT:
4943 rc = sprintf(str, "%d\n", boot_conn->dest_port);
4946 case ISCSI_BOOT_TGT_CHAP_NAME:
4947 rc = sprintf(str, "%.*s\n",
4948 boot_conn->negotiated_login_options.auth_data.chap.
4949 target_chap_name_length,
4950 (char *)&boot_conn->negotiated_login_options.
4951 auth_data.chap.target_chap_name);
4953 case ISCSI_BOOT_TGT_CHAP_SECRET:
4954 rc = sprintf(str, "%.*s\n",
4955 boot_conn->negotiated_login_options.auth_data.chap.
4956 target_secret_length,
4957 (char *)&boot_conn->negotiated_login_options.
4958 auth_data.chap.target_secret);
4960 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
4961 rc = sprintf(str, "%.*s\n",
4962 boot_conn->negotiated_login_options.auth_data.chap.
4963 intr_chap_name_length,
4964 (char *)&boot_conn->negotiated_login_options.
4965 auth_data.chap.intr_chap_name);
4967 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
4968 rc = sprintf(str, "%.*s\n",
4969 boot_conn->negotiated_login_options.auth_data.chap.
4971 (char *)&boot_conn->negotiated_login_options.
4972 auth_data.chap.intr_secret);
4974 case ISCSI_BOOT_TGT_FLAGS:
4975 rc = sprintf(str, "2\n");
4977 case ISCSI_BOOT_TGT_NIC_ASSOC:
4978 rc = sprintf(str, "0\n");
4984 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
4986 struct beiscsi_hba *phba = data;
4991 case ISCSI_BOOT_INI_INITIATOR_NAME:
4992 rc = sprintf(str, "%s\n",
4993 phba->boot_struct.boot_sess.initiator_iscsiname);
4999 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
5001 struct beiscsi_hba *phba = data;
5006 case ISCSI_BOOT_ETH_FLAGS:
5007 rc = sprintf(str, "2\n");
5009 case ISCSI_BOOT_ETH_INDEX:
5010 rc = sprintf(str, "0\n");
5012 case ISCSI_BOOT_ETH_MAC:
5013 rc = beiscsi_get_macaddr(str, phba);
5019 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
5024 case ISCSI_BOOT_TGT_NAME:
5025 case ISCSI_BOOT_TGT_IP_ADDR:
5026 case ISCSI_BOOT_TGT_PORT:
5027 case ISCSI_BOOT_TGT_CHAP_NAME:
5028 case ISCSI_BOOT_TGT_CHAP_SECRET:
5029 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
5030 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
5031 case ISCSI_BOOT_TGT_NIC_ASSOC:
5032 case ISCSI_BOOT_TGT_FLAGS:
5039 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
5044 case ISCSI_BOOT_INI_INITIATOR_NAME:
5051 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
5056 case ISCSI_BOOT_ETH_FLAGS:
5057 case ISCSI_BOOT_ETH_MAC:
5058 case ISCSI_BOOT_ETH_INDEX:
5065 static void beiscsi_boot_kobj_release(void *data)
5067 struct beiscsi_hba *phba = data;
5069 scsi_host_put(phba->shost);
5072 static int beiscsi_boot_create_kset(struct beiscsi_hba *phba)
5074 struct boot_struct *bs = &phba->boot_struct;
5075 struct iscsi_boot_kobj *boot_kobj;
5077 if (bs->boot_kset) {
5078 __beiscsi_log(phba, KERN_ERR,
5079 "BM_%d: boot_kset already created\n");
5083 bs->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
5084 if (!bs->boot_kset) {
5085 __beiscsi_log(phba, KERN_ERR,
5086 "BM_%d: boot_kset alloc failed\n");
5090 /* get shost ref because the show function will refer phba */
5091 if (!scsi_host_get(phba->shost))
5094 boot_kobj = iscsi_boot_create_target(bs->boot_kset, 0, phba,
5095 beiscsi_show_boot_tgt_info,
5096 beiscsi_tgt_get_attr_visibility,
5097 beiscsi_boot_kobj_release);
5101 if (!scsi_host_get(phba->shost))
5104 boot_kobj = iscsi_boot_create_initiator(bs->boot_kset, 0, phba,
5105 beiscsi_show_boot_ini_info,
5106 beiscsi_ini_get_attr_visibility,
5107 beiscsi_boot_kobj_release);
5111 if (!scsi_host_get(phba->shost))
5114 boot_kobj = iscsi_boot_create_ethernet(bs->boot_kset, 0, phba,
5115 beiscsi_show_boot_eth_info,
5116 beiscsi_eth_get_attr_visibility,
5117 beiscsi_boot_kobj_release);
5124 scsi_host_put(phba->shost);
5126 iscsi_boot_destroy_kset(bs->boot_kset);
5127 bs->boot_kset = NULL;
5131 static void beiscsi_boot_work(struct work_struct *work)
5133 struct beiscsi_hba *phba =
5134 container_of(work, struct beiscsi_hba, boot_work);
5135 struct boot_struct *bs = &phba->boot_struct;
5136 unsigned int tag = 0;
5138 if (!beiscsi_hba_is_online(phba))
5141 beiscsi_log(phba, KERN_INFO,
5142 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
5143 "BM_%d : %s action %d\n",
5144 __func__, phba->boot_struct.action);
5146 switch (phba->boot_struct.action) {
5147 case BEISCSI_BOOT_REOPEN_SESS:
5148 tag = beiscsi_boot_reopen_sess(phba);
5150 case BEISCSI_BOOT_GET_SHANDLE:
5151 tag = __beiscsi_boot_get_shandle(phba, 1);
5153 case BEISCSI_BOOT_GET_SINFO:
5154 tag = beiscsi_boot_get_sinfo(phba);
5156 case BEISCSI_BOOT_LOGOUT_SESS:
5157 tag = beiscsi_boot_logout_sess(phba);
5159 case BEISCSI_BOOT_CREATE_KSET:
5160 beiscsi_boot_create_kset(phba);
5162 * updated boot_kset is made visible to all before
5163 * ending the boot work.
5166 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5171 schedule_work(&phba->boot_work);
5173 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5177 static void beiscsi_eqd_update_work(struct work_struct *work)
5179 struct hwi_context_memory *phwi_context;
5180 struct be_set_eqd set_eqd[MAX_CPUS];
5181 struct hwi_controller *phwi_ctrlr;
5182 struct be_eq_obj *pbe_eq;
5183 struct beiscsi_hba *phba;
5184 unsigned int pps, delta;
5185 struct be_aic_obj *aic;
5186 int eqd, i, num = 0;
5189 phba = container_of(work, struct beiscsi_hba, eqd_update.work);
5190 if (!beiscsi_hba_is_online(phba))
5193 phwi_ctrlr = phba->phwi_ctrlr;
5194 phwi_context = phwi_ctrlr->phwi_ctxt;
5196 for (i = 0; i <= phba->num_cpus; i++) {
5197 aic = &phba->aic_obj[i];
5198 pbe_eq = &phwi_context->be_eq[i];
5200 if (!aic->jiffies || time_before(now, aic->jiffies) ||
5201 pbe_eq->cq_count < aic->eq_prev) {
5203 aic->eq_prev = pbe_eq->cq_count;
5206 delta = jiffies_to_msecs(now - aic->jiffies);
5207 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5208 eqd = (pps / 1500) << 2;
5212 eqd = min_t(u32, eqd, phwi_context->max_eqd);
5213 eqd = max_t(u32, eqd, phwi_context->min_eqd);
5216 aic->eq_prev = pbe_eq->cq_count;
5218 if (eqd != aic->prev_eqd) {
5219 set_eqd[num].delay_multiplier = (eqd * 65)/100;
5220 set_eqd[num].eq_id = pbe_eq->q.id;
5221 aic->prev_eqd = eqd;
5226 /* completion of this is ignored */
5227 beiscsi_modify_eq_delay(phba, set_eqd, num);
5229 schedule_delayed_work(&phba->eqd_update,
5230 msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5233 static void beiscsi_hw_tpe_check(unsigned long ptr)
5235 struct beiscsi_hba *phba;
5238 phba = (struct beiscsi_hba *)ptr;
5239 /* if not TPE, do nothing */
5240 if (!beiscsi_detect_tpe(phba))
5243 /* wait default 4000ms before recovering */
5245 if (phba->ue2rp > BEISCSI_UE_DETECT_INTERVAL)
5246 wait = phba->ue2rp - BEISCSI_UE_DETECT_INTERVAL;
5247 queue_delayed_work(phba->wq, &phba->recover_port,
5248 msecs_to_jiffies(wait));
5251 static void beiscsi_hw_health_check(unsigned long ptr)
5253 struct beiscsi_hba *phba;
5255 phba = (struct beiscsi_hba *)ptr;
5256 beiscsi_detect_ue(phba);
5257 if (beiscsi_detect_ue(phba)) {
5258 __beiscsi_log(phba, KERN_ERR,
5259 "BM_%d : port in error: %lx\n", phba->state);
5260 /* sessions are no longer valid, so first fail the sessions */
5261 queue_work(phba->wq, &phba->sess_work);
5263 /* detect UER supported */
5264 if (!test_bit(BEISCSI_HBA_UER_SUPP, &phba->state))
5266 /* modify this timer to check TPE */
5267 phba->hw_check.function = beiscsi_hw_tpe_check;
5270 mod_timer(&phba->hw_check,
5271 jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5275 * beiscsi_enable_port()- Enables the disabled port.
5276 * Only port resources freed in disable function are reallocated.
5277 * This is called in HBA error handling path.
5279 * @phba: Instance of driver private structure
5282 static int beiscsi_enable_port(struct beiscsi_hba *phba)
5284 struct hwi_context_memory *phwi_context;
5285 struct hwi_controller *phwi_ctrlr;
5286 struct be_eq_obj *pbe_eq;
5289 if (test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
5290 __beiscsi_log(phba, KERN_ERR,
5291 "BM_%d : %s : port is online %lx\n",
5292 __func__, phba->state);
5296 ret = beiscsi_init_sliport(phba);
5300 be2iscsi_enable_msix(phba);
5302 beiscsi_get_params(phba);
5303 /* Re-enable UER. If different TPE occurs then it is recoverable. */
5304 beiscsi_set_uer_feature(phba);
5306 phba->shost->max_id = phba->params.cxns_per_ctrl - 1;
5307 phba->shost->can_queue = phba->params.ios_per_ctrl;
5308 ret = beiscsi_init_port(phba);
5310 __beiscsi_log(phba, KERN_ERR,
5311 "BM_%d : init port failed\n");
5315 for (i = 0; i < MAX_MCC_CMD; i++) {
5316 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5317 phba->ctrl.mcc_tag[i] = i + 1;
5318 phba->ctrl.mcc_tag_status[i + 1] = 0;
5319 phba->ctrl.mcc_tag_available++;
5322 phwi_ctrlr = phba->phwi_ctrlr;
5323 phwi_context = phwi_ctrlr->phwi_ctxt;
5324 for (i = 0; i < phba->num_cpus; i++) {
5325 pbe_eq = &phwi_context->be_eq[i];
5326 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5329 i = (phba->pcidev->msix_enabled) ? i : 0;
5330 /* Work item for MCC handling */
5331 pbe_eq = &phwi_context->be_eq[i];
5332 INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5334 ret = beiscsi_init_irqs(phba);
5336 __beiscsi_log(phba, KERN_ERR,
5337 "BM_%d : setup IRQs failed %d\n", ret);
5340 hwi_enable_intr(phba);
5341 /* port operational: clear all error bits */
5342 set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5343 __beiscsi_log(phba, KERN_INFO,
5344 "BM_%d : port online: 0x%lx\n", phba->state);
5346 /* start hw_check timer and eqd_update work */
5347 schedule_delayed_work(&phba->eqd_update,
5348 msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5351 * Timer function gets modified for TPE detection.
5352 * Always reinit to do health check first.
5354 phba->hw_check.function = beiscsi_hw_health_check;
5355 mod_timer(&phba->hw_check,
5356 jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5360 for (i = 0; i < phba->num_cpus; i++) {
5361 pbe_eq = &phwi_context->be_eq[i];
5362 irq_poll_disable(&pbe_eq->iopoll);
5364 hwi_cleanup_port(phba);
5367 pci_free_irq_vectors(phba->pcidev);
5372 * beiscsi_disable_port()- Disable port and cleanup driver resources.
5373 * This is called in HBA error handling and driver removal.
5374 * @phba: Instance Priv structure
5375 * @unload: indicate driver is unloading
5377 * Free the OS and HW resources held by the driver
5379 static void beiscsi_disable_port(struct beiscsi_hba *phba, int unload)
5381 struct hwi_context_memory *phwi_context;
5382 struct hwi_controller *phwi_ctrlr;
5383 struct be_eq_obj *pbe_eq;
5386 if (!test_and_clear_bit(BEISCSI_HBA_ONLINE, &phba->state))
5389 phwi_ctrlr = phba->phwi_ctrlr;
5390 phwi_context = phwi_ctrlr->phwi_ctxt;
5391 hwi_disable_intr(phba);
5392 if (phba->pcidev->msix_enabled) {
5393 for (i = 0; i <= phba->num_cpus; i++) {
5394 free_irq(pci_irq_vector(phba->pcidev, i),
5395 &phwi_context->be_eq[i]);
5396 kfree(phba->msi_name[i]);
5399 if (phba->pcidev->irq)
5400 free_irq(phba->pcidev->irq, phba);
5401 pci_free_irq_vectors(phba->pcidev);
5403 for (i = 0; i < phba->num_cpus; i++) {
5404 pbe_eq = &phwi_context->be_eq[i];
5405 irq_poll_disable(&pbe_eq->iopoll);
5407 cancel_delayed_work_sync(&phba->eqd_update);
5408 cancel_work_sync(&phba->boot_work);
5409 /* WQ might be running cancel queued mcc_work if we are not exiting */
5410 if (!unload && beiscsi_hba_in_error(phba)) {
5411 pbe_eq = &phwi_context->be_eq[i];
5412 cancel_work_sync(&pbe_eq->mcc_work);
5414 hwi_cleanup_port(phba);
5415 beiscsi_cleanup_port(phba);
5418 static void beiscsi_sess_work(struct work_struct *work)
5420 struct beiscsi_hba *phba;
5422 phba = container_of(work, struct beiscsi_hba, sess_work);
5424 * This work gets scheduled only in case of HBA error.
5425 * Old sessions are gone so need to be re-established.
5426 * iscsi_session_failure needs process context hence this work.
5428 iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5431 static void beiscsi_recover_port(struct work_struct *work)
5433 struct beiscsi_hba *phba;
5435 phba = container_of(work, struct beiscsi_hba, recover_port.work);
5436 beiscsi_disable_port(phba, 0);
5437 beiscsi_enable_port(phba);
5440 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5441 pci_channel_state_t state)
5443 struct beiscsi_hba *phba = NULL;
5445 phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5446 set_bit(BEISCSI_HBA_PCI_ERR, &phba->state);
5448 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5449 "BM_%d : EEH error detected\n");
5451 /* first stop UE detection when PCI error detected */
5452 del_timer_sync(&phba->hw_check);
5453 cancel_delayed_work_sync(&phba->recover_port);
5455 /* sessions are no longer valid, so first fail the sessions */
5456 iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5457 beiscsi_disable_port(phba, 0);
5459 if (state == pci_channel_io_perm_failure) {
5460 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5461 "BM_%d : EEH : State PERM Failure");
5462 return PCI_ERS_RESULT_DISCONNECT;
5465 pci_disable_device(pdev);
5467 /* The error could cause the FW to trigger a flash debug dump.
5468 * Resetting the card while flash dump is in progress
5469 * can cause it not to recover; wait for it to finish.
5470 * Wait only for first function as it is needed only once per
5473 if (pdev->devfn == 0)
5476 return PCI_ERS_RESULT_NEED_RESET;
5479 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5481 struct beiscsi_hba *phba = NULL;
5484 phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5486 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5487 "BM_%d : EEH Reset\n");
5489 status = pci_enable_device(pdev);
5491 return PCI_ERS_RESULT_DISCONNECT;
5493 pci_set_master(pdev);
5494 pci_set_power_state(pdev, PCI_D0);
5495 pci_restore_state(pdev);
5497 status = beiscsi_check_fw_rdy(phba);
5499 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5500 "BM_%d : EEH Reset Completed\n");
5502 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5503 "BM_%d : EEH Reset Completion Failure\n");
5504 return PCI_ERS_RESULT_DISCONNECT;
5507 pci_cleanup_aer_uncorrect_error_status(pdev);
5508 return PCI_ERS_RESULT_RECOVERED;
5511 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5513 struct beiscsi_hba *phba;
5516 phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5517 pci_save_state(pdev);
5519 ret = beiscsi_enable_port(phba);
5521 __beiscsi_log(phba, KERN_ERR,
5522 "BM_%d : AER EEH resume failed\n");
5525 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5526 const struct pci_device_id *id)
5528 struct hwi_context_memory *phwi_context;
5529 struct hwi_controller *phwi_ctrlr;
5530 struct beiscsi_hba *phba = NULL;
5531 struct be_eq_obj *pbe_eq;
5532 unsigned int s_handle;
5536 ret = beiscsi_enable_pci(pcidev);
5538 dev_err(&pcidev->dev,
5539 "beiscsi_dev_probe - Failed to enable pci device\n");
5543 phba = beiscsi_hba_alloc(pcidev);
5545 dev_err(&pcidev->dev,
5546 "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5551 /* Enable EEH reporting */
5552 ret = pci_enable_pcie_error_reporting(pcidev);
5554 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5555 "BM_%d : PCIe Error Reporting "
5556 "Enabling Failed\n");
5558 pci_save_state(pcidev);
5560 /* Initialize Driver configuration Paramters */
5561 beiscsi_hba_attrs_init(phba);
5563 phba->mac_addr_set = false;
5565 switch (pcidev->device) {
5569 phba->generation = BE_GEN2;
5570 phba->iotask_fn = beiscsi_iotask;
5571 dev_warn(&pcidev->dev,
5572 "Obsolete/Unsupported BE2 Adapter Family\n");
5576 phba->generation = BE_GEN3;
5577 phba->iotask_fn = beiscsi_iotask;
5580 phba->generation = BE_GEN4;
5581 phba->iotask_fn = beiscsi_iotask_v2;
5584 phba->generation = 0;
5587 ret = be_ctrl_init(phba, pcidev);
5589 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5590 "BM_%d : be_ctrl_init failed\n");
5594 ret = beiscsi_init_sliport(phba);
5598 spin_lock_init(&phba->io_sgl_lock);
5599 spin_lock_init(&phba->mgmt_sgl_lock);
5600 spin_lock_init(&phba->async_pdu_lock);
5601 ret = beiscsi_get_fw_config(&phba->ctrl, phba);
5603 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5604 "BM_%d : Error getting fw config\n");
5607 beiscsi_get_port_name(&phba->ctrl, phba);
5608 beiscsi_get_params(phba);
5609 beiscsi_set_uer_feature(phba);
5611 be2iscsi_enable_msix(phba);
5613 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5614 "BM_%d : num_cpus = %d\n",
5617 phba->shost->max_id = phba->params.cxns_per_ctrl;
5618 phba->shost->can_queue = phba->params.ios_per_ctrl;
5619 ret = beiscsi_get_memory(phba);
5621 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5622 "BM_%d : alloc host mem failed\n");
5626 ret = beiscsi_init_port(phba);
5628 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5629 "BM_%d : init port failed\n");
5630 beiscsi_free_mem(phba);
5634 for (i = 0; i < MAX_MCC_CMD; i++) {
5635 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5636 phba->ctrl.mcc_tag[i] = i + 1;
5637 phba->ctrl.mcc_tag_status[i + 1] = 0;
5638 phba->ctrl.mcc_tag_available++;
5639 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5640 sizeof(struct be_dma_mem));
5643 phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5645 snprintf(wq_name, sizeof(wq_name), "beiscsi_%02x_wq",
5646 phba->shost->host_no);
5647 phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, wq_name);
5649 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5650 "BM_%d : beiscsi_dev_probe-"
5651 "Failed to allocate work queue\n");
5656 INIT_DELAYED_WORK(&phba->eqd_update, beiscsi_eqd_update_work);
5658 phwi_ctrlr = phba->phwi_ctrlr;
5659 phwi_context = phwi_ctrlr->phwi_ctxt;
5661 for (i = 0; i < phba->num_cpus; i++) {
5662 pbe_eq = &phwi_context->be_eq[i];
5663 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5666 i = (phba->pcidev->msix_enabled) ? i : 0;
5667 /* Work item for MCC handling */
5668 pbe_eq = &phwi_context->be_eq[i];
5669 INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5671 ret = beiscsi_init_irqs(phba);
5673 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5674 "BM_%d : beiscsi_dev_probe-"
5675 "Failed to beiscsi_init_irqs\n");
5678 hwi_enable_intr(phba);
5680 ret = iscsi_host_add(phba->shost, &phba->pcidev->dev);
5684 /* set online bit after port is operational */
5685 set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5686 __beiscsi_log(phba, KERN_INFO,
5687 "BM_%d : port online: 0x%lx\n", phba->state);
5689 INIT_WORK(&phba->boot_work, beiscsi_boot_work);
5690 ret = beiscsi_boot_get_shandle(phba, &s_handle);
5692 beiscsi_start_boot_work(phba, s_handle);
5694 * Set this bit after starting the work to let
5695 * probe handle it first.
5696 * ASYNC event can too schedule this work.
5698 set_bit(BEISCSI_HBA_BOOT_FOUND, &phba->state);
5701 beiscsi_iface_create_default(phba);
5702 schedule_delayed_work(&phba->eqd_update,
5703 msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5705 INIT_WORK(&phba->sess_work, beiscsi_sess_work);
5706 INIT_DELAYED_WORK(&phba->recover_port, beiscsi_recover_port);
5708 * Start UE detection here. UE before this will cause stall in probe
5709 * and eventually fail the probe.
5711 init_timer(&phba->hw_check);
5712 phba->hw_check.function = beiscsi_hw_health_check;
5713 phba->hw_check.data = (unsigned long)phba;
5714 mod_timer(&phba->hw_check,
5715 jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5716 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5717 "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5721 destroy_workqueue(phba->wq);
5722 for (i = 0; i < phba->num_cpus; i++) {
5723 pbe_eq = &phwi_context->be_eq[i];
5724 irq_poll_disable(&pbe_eq->iopoll);
5727 hwi_cleanup_port(phba);
5728 beiscsi_cleanup_port(phba);
5729 beiscsi_free_mem(phba);
5731 pci_free_consistent(phba->pcidev,
5732 phba->ctrl.mbox_mem_alloced.size,
5733 phba->ctrl.mbox_mem_alloced.va,
5734 phba->ctrl.mbox_mem_alloced.dma);
5735 beiscsi_unmap_pci_function(phba);
5737 pci_disable_msix(phba->pcidev);
5738 pci_dev_put(phba->pcidev);
5739 iscsi_host_free(phba->shost);
5740 pci_disable_pcie_error_reporting(pcidev);
5741 pci_set_drvdata(pcidev, NULL);
5743 pci_release_regions(pcidev);
5744 pci_disable_device(pcidev);
5748 static void beiscsi_remove(struct pci_dev *pcidev)
5750 struct beiscsi_hba *phba = NULL;
5752 phba = pci_get_drvdata(pcidev);
5754 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5758 /* first stop UE detection before unloading */
5759 del_timer_sync(&phba->hw_check);
5760 cancel_delayed_work_sync(&phba->recover_port);
5761 cancel_work_sync(&phba->sess_work);
5763 beiscsi_iface_destroy_default(phba);
5764 iscsi_host_remove(phba->shost);
5765 beiscsi_disable_port(phba, 1);
5767 /* after cancelling boot_work */
5768 iscsi_boot_destroy_kset(phba->boot_struct.boot_kset);
5770 /* free all resources */
5771 destroy_workqueue(phba->wq);
5772 beiscsi_free_mem(phba);
5775 beiscsi_unmap_pci_function(phba);
5776 pci_free_consistent(phba->pcidev,
5777 phba->ctrl.mbox_mem_alloced.size,
5778 phba->ctrl.mbox_mem_alloced.va,
5779 phba->ctrl.mbox_mem_alloced.dma);
5781 pci_dev_put(phba->pcidev);
5782 iscsi_host_free(phba->shost);
5783 pci_disable_pcie_error_reporting(pcidev);
5784 pci_set_drvdata(pcidev, NULL);
5785 pci_release_regions(pcidev);
5786 pci_disable_device(pcidev);
5790 static struct pci_error_handlers beiscsi_eeh_handlers = {
5791 .error_detected = beiscsi_eeh_err_detected,
5792 .slot_reset = beiscsi_eeh_reset,
5793 .resume = beiscsi_eeh_resume,
5796 struct iscsi_transport beiscsi_iscsi_transport = {
5797 .owner = THIS_MODULE,
5799 .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5800 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5801 .create_session = beiscsi_session_create,
5802 .destroy_session = beiscsi_session_destroy,
5803 .create_conn = beiscsi_conn_create,
5804 .bind_conn = beiscsi_conn_bind,
5805 .destroy_conn = iscsi_conn_teardown,
5806 .attr_is_visible = beiscsi_attr_is_visible,
5807 .set_iface_param = beiscsi_iface_set_param,
5808 .get_iface_param = beiscsi_iface_get_param,
5809 .set_param = beiscsi_set_param,
5810 .get_conn_param = iscsi_conn_get_param,
5811 .get_session_param = iscsi_session_get_param,
5812 .get_host_param = beiscsi_get_host_param,
5813 .start_conn = beiscsi_conn_start,
5814 .stop_conn = iscsi_conn_stop,
5815 .send_pdu = iscsi_conn_send_pdu,
5816 .xmit_task = beiscsi_task_xmit,
5817 .cleanup_task = beiscsi_cleanup_task,
5818 .alloc_pdu = beiscsi_alloc_pdu,
5819 .parse_pdu_itt = beiscsi_parse_pdu,
5820 .get_stats = beiscsi_conn_get_stats,
5821 .get_ep_param = beiscsi_ep_get_param,
5822 .ep_connect = beiscsi_ep_connect,
5823 .ep_poll = beiscsi_ep_poll,
5824 .ep_disconnect = beiscsi_ep_disconnect,
5825 .session_recovery_timedout = iscsi_session_recovery_timedout,
5826 .bsg_request = beiscsi_bsg_request,
5829 static struct pci_driver beiscsi_pci_driver = {
5831 .probe = beiscsi_dev_probe,
5832 .remove = beiscsi_remove,
5833 .id_table = beiscsi_pci_id_table,
5834 .err_handler = &beiscsi_eeh_handlers
5837 static int __init beiscsi_module_init(void)
5841 beiscsi_scsi_transport =
5842 iscsi_register_transport(&beiscsi_iscsi_transport);
5843 if (!beiscsi_scsi_transport) {
5845 "beiscsi_module_init - Unable to register beiscsi transport.\n");
5848 printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5849 &beiscsi_iscsi_transport);
5851 ret = pci_register_driver(&beiscsi_pci_driver);
5854 "beiscsi_module_init - Unable to register beiscsi pci driver.\n");
5855 goto unregister_iscsi_transport;
5859 unregister_iscsi_transport:
5860 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5864 static void __exit beiscsi_module_exit(void)
5866 pci_unregister_driver(&beiscsi_pci_driver);
5867 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5870 module_init(beiscsi_module_init);
5871 module_exit(beiscsi_module_exit);