2 *******************************************************************************
4 ** FILE NAME : arcmsr_hba.c
5 ** BY : Nick Cheng, C.L. Huang
6 ** Description: SCSI RAID Device Driver for Areca RAID Controller
7 *******************************************************************************
8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
10 ** Web site: www.areca.com.tw
11 ** E-mail: support@areca.com.tw
13 ** This program is free software; you can redistribute it and/or modify
14 ** it under the terms of the GNU General Public License version 2 as
15 ** published by the Free Software Foundation.
16 ** This program is distributed in the hope that it will be useful,
17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ** GNU General Public License for more details.
20 *******************************************************************************
21 ** Redistribution and use in source and binary forms, with or without
22 ** modification, are permitted provided that the following conditions
24 ** 1. Redistributions of source code must retain the above copyright
25 ** notice, this list of conditions and the following disclaimer.
26 ** 2. Redistributions in binary form must reproduce the above copyright
27 ** notice, this list of conditions and the following disclaimer in the
28 ** documentation and/or other materials provided with the distribution.
29 ** 3. The name of the author may not be used to endorse or promote products
30 ** derived from this software without specific prior written permission.
32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 *******************************************************************************
43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
44 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.rst
45 *******************************************************************************
47 #include <linux/module.h>
48 #include <linux/reboot.h>
49 #include <linux/spinlock.h>
50 #include <linux/pci_ids.h>
51 #include <linux/interrupt.h>
52 #include <linux/moduleparam.h>
53 #include <linux/errno.h>
54 #include <linux/types.h>
55 #include <linux/delay.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/timer.h>
58 #include <linux/slab.h>
59 #include <linux/pci.h>
60 #include <linux/aer.h>
61 #include <linux/circ_buf.h>
64 #include <linux/uaccess.h>
65 #include <scsi/scsi_host.h>
66 #include <scsi/scsi.h>
67 #include <scsi/scsi_cmnd.h>
68 #include <scsi/scsi_tcq.h>
69 #include <scsi/scsi_device.h>
70 #include <scsi/scsi_transport.h>
71 #include <scsi/scsicam.h>
73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
75 MODULE_LICENSE("Dual BSD/GPL");
76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
78 static int msix_enable = 1;
79 module_param(msix_enable, int, S_IRUGO);
80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
82 static int msi_enable = 1;
83 module_param(msi_enable, int, S_IRUGO);
84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
87 module_param(host_can_queue, int, S_IRUGO);
88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
91 module_param(cmd_per_lun, int, S_IRUGO);
92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
94 static int dma_mask_64 = 0;
95 module_param(dma_mask_64, int, S_IRUGO);
96 MODULE_PARM_DESC(dma_mask_64, " set DMA mask to 64 bits(0 ~ 1), dma_mask_64=1(64 bits), =0(32 bits)");
98 static int set_date_time = 0;
99 module_param(set_date_time, int, S_IRUGO);
100 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
102 #define ARCMSR_SLEEPTIME 10
103 #define ARCMSR_RETRYCOUNT 12
105 static wait_queue_head_t wait_q;
106 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
107 struct scsi_cmnd *cmd);
108 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
109 static int arcmsr_abort(struct scsi_cmnd *);
110 static int arcmsr_bus_reset(struct scsi_cmnd *);
111 static int arcmsr_bios_param(struct scsi_device *sdev,
112 struct block_device *bdev, sector_t capacity, int *info);
113 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
114 static int arcmsr_probe(struct pci_dev *pdev,
115 const struct pci_device_id *id);
116 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
117 static int arcmsr_resume(struct pci_dev *pdev);
118 static void arcmsr_remove(struct pci_dev *pdev);
119 static void arcmsr_shutdown(struct pci_dev *pdev);
120 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
121 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
122 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
123 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
125 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
126 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
127 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
128 static void arcmsr_request_device_map(struct timer_list *t);
129 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
130 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
131 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
132 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
133 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
134 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
135 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
136 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
137 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
138 static const char *arcmsr_info(struct Scsi_Host *);
139 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
140 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
141 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
142 static void arcmsr_set_iop_datetime(struct timer_list *);
143 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
145 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
146 queue_depth = ARCMSR_MAX_CMD_PERLUN;
147 return scsi_change_queue_depth(sdev, queue_depth);
150 static struct scsi_host_template arcmsr_scsi_host_template = {
151 .module = THIS_MODULE,
152 .name = "Areca SAS/SATA RAID driver",
154 .queuecommand = arcmsr_queue_command,
155 .eh_abort_handler = arcmsr_abort,
156 .eh_bus_reset_handler = arcmsr_bus_reset,
157 .bios_param = arcmsr_bios_param,
158 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
159 .can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD,
160 .this_id = ARCMSR_SCSI_INITIATOR_ID,
161 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
162 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
163 .cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN,
164 .shost_attrs = arcmsr_host_attrs,
168 static struct pci_device_id arcmsr_device_id_table[] = {
169 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
170 .driver_data = ACB_ADAPTER_TYPE_A},
171 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
172 .driver_data = ACB_ADAPTER_TYPE_A},
173 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
174 .driver_data = ACB_ADAPTER_TYPE_A},
175 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
176 .driver_data = ACB_ADAPTER_TYPE_A},
177 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
178 .driver_data = ACB_ADAPTER_TYPE_A},
179 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
180 .driver_data = ACB_ADAPTER_TYPE_B},
181 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
182 .driver_data = ACB_ADAPTER_TYPE_B},
183 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
184 .driver_data = ACB_ADAPTER_TYPE_B},
185 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
186 .driver_data = ACB_ADAPTER_TYPE_B},
187 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
188 .driver_data = ACB_ADAPTER_TYPE_A},
189 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
190 .driver_data = ACB_ADAPTER_TYPE_D},
191 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
192 .driver_data = ACB_ADAPTER_TYPE_A},
193 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
194 .driver_data = ACB_ADAPTER_TYPE_A},
195 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
196 .driver_data = ACB_ADAPTER_TYPE_A},
197 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
198 .driver_data = ACB_ADAPTER_TYPE_A},
199 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
200 .driver_data = ACB_ADAPTER_TYPE_A},
201 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
202 .driver_data = ACB_ADAPTER_TYPE_A},
203 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
204 .driver_data = ACB_ADAPTER_TYPE_A},
205 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
206 .driver_data = ACB_ADAPTER_TYPE_A},
207 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
208 .driver_data = ACB_ADAPTER_TYPE_A},
209 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
210 .driver_data = ACB_ADAPTER_TYPE_C},
211 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
212 .driver_data = ACB_ADAPTER_TYPE_E},
213 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
214 .driver_data = ACB_ADAPTER_TYPE_F},
215 {0, 0}, /* Terminating entry */
217 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
219 static struct pci_driver arcmsr_pci_driver = {
221 .id_table = arcmsr_device_id_table,
222 .probe = arcmsr_probe,
223 .remove = arcmsr_remove,
224 .suspend = arcmsr_suspend,
225 .resume = arcmsr_resume,
226 .shutdown = arcmsr_shutdown,
229 ****************************************************************************
230 ****************************************************************************
233 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
235 switch (acb->adapter_type) {
236 case ACB_ADAPTER_TYPE_B:
237 case ACB_ADAPTER_TYPE_D:
238 case ACB_ADAPTER_TYPE_E:
239 case ACB_ADAPTER_TYPE_F:
240 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
241 acb->dma_coherent2, acb->dma_coherent_handle2);
246 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
248 struct pci_dev *pdev = acb->pdev;
249 switch (acb->adapter_type){
250 case ACB_ADAPTER_TYPE_A:{
251 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
253 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
258 case ACB_ADAPTER_TYPE_B:{
259 void __iomem *mem_base0, *mem_base1;
260 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
262 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
265 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
268 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
271 acb->mem_base0 = mem_base0;
272 acb->mem_base1 = mem_base1;
275 case ACB_ADAPTER_TYPE_C:{
276 acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
278 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
281 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
282 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
287 case ACB_ADAPTER_TYPE_D: {
288 void __iomem *mem_base0;
289 unsigned long addr, range;
291 addr = (unsigned long)pci_resource_start(pdev, 0);
292 range = pci_resource_len(pdev, 0);
293 mem_base0 = ioremap(addr, range);
295 pr_notice("arcmsr%d: memory mapping region fail\n",
299 acb->mem_base0 = mem_base0;
302 case ACB_ADAPTER_TYPE_E: {
303 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
304 pci_resource_len(pdev, 1));
306 pr_notice("arcmsr%d: memory mapping region fail \n",
310 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
311 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell); /* synchronize doorbell to 0 */
312 acb->in_doorbell = 0;
313 acb->out_doorbell = 0;
316 case ACB_ADAPTER_TYPE_F: {
317 acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
319 pr_notice("arcmsr%d: memory mapping region fail\n",
323 writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
324 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
325 acb->in_doorbell = 0;
326 acb->out_doorbell = 0;
333 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
335 switch (acb->adapter_type) {
336 case ACB_ADAPTER_TYPE_A:
339 case ACB_ADAPTER_TYPE_B:
340 iounmap(acb->mem_base0);
341 iounmap(acb->mem_base1);
343 case ACB_ADAPTER_TYPE_C:
346 case ACB_ADAPTER_TYPE_D:
347 iounmap(acb->mem_base0);
349 case ACB_ADAPTER_TYPE_E:
352 case ACB_ADAPTER_TYPE_F:
358 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
360 irqreturn_t handle_state;
361 struct AdapterControlBlock *acb = dev_id;
363 handle_state = arcmsr_interrupt(acb);
367 static int arcmsr_bios_param(struct scsi_device *sdev,
368 struct block_device *bdev, sector_t capacity, int *geom)
370 int heads, sectors, cylinders, total_capacity;
372 if (scsi_partsize(bdev, capacity, geom))
375 total_capacity = capacity;
378 cylinders = total_capacity / (heads * sectors);
379 if (cylinders > 1024) {
382 cylinders = total_capacity / (heads * sectors);
390 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
392 struct MessageUnit_A __iomem *reg = acb->pmuA;
395 for (i = 0; i < 2000; i++) {
396 if (readl(®->outbound_intstatus) &
397 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
398 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
399 ®->outbound_intstatus);
403 } /* max 20 seconds */
408 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
410 struct MessageUnit_B *reg = acb->pmuB;
413 for (i = 0; i < 2000; i++) {
414 if (readl(reg->iop2drv_doorbell)
415 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
416 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
417 reg->iop2drv_doorbell);
418 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
419 reg->drv2iop_doorbell);
423 } /* max 20 seconds */
428 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
430 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
433 for (i = 0; i < 2000; i++) {
434 if (readl(&phbcmu->outbound_doorbell)
435 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
436 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
437 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
441 } /* max 20 seconds */
446 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
448 struct MessageUnit_D *reg = pACB->pmuD;
451 for (i = 0; i < 2000; i++) {
452 if (readl(reg->outbound_doorbell)
453 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
454 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
455 reg->outbound_doorbell);
459 } /* max 20 seconds */
463 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
466 uint32_t read_doorbell;
467 struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
469 for (i = 0; i < 2000; i++) {
470 read_doorbell = readl(&phbcmu->iobound_doorbell);
471 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
472 writel(0, &phbcmu->host_int_status); /*clear interrupt*/
473 pACB->in_doorbell = read_doorbell;
477 } /* max 20 seconds */
481 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
483 struct MessageUnit_A __iomem *reg = acb->pmuA;
484 int retry_count = 30;
485 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
487 if (arcmsr_hbaA_wait_msgint_ready(acb))
491 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
492 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
494 } while (retry_count != 0);
497 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
499 struct MessageUnit_B *reg = acb->pmuB;
500 int retry_count = 30;
501 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
503 if (arcmsr_hbaB_wait_msgint_ready(acb))
507 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
508 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
510 } while (retry_count != 0);
513 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
515 struct MessageUnit_C __iomem *reg = pACB->pmuC;
516 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
517 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
518 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
520 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
524 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
525 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
527 } while (retry_count != 0);
531 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
533 int retry_count = 15;
534 struct MessageUnit_D *reg = pACB->pmuD;
536 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
538 if (arcmsr_hbaD_wait_msgint_ready(pACB))
542 pr_notice("arcmsr%d: wait 'flush adapter "
543 "cache' timeout, retry count down = %d\n",
544 pACB->host->host_no, retry_count);
545 } while (retry_count != 0);
548 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
550 int retry_count = 30;
551 struct MessageUnit_E __iomem *reg = pACB->pmuE;
553 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
554 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
555 writel(pACB->out_doorbell, ®->iobound_doorbell);
557 if (arcmsr_hbaE_wait_msgint_ready(pACB))
560 pr_notice("arcmsr%d: wait 'flush adapter "
561 "cache' timeout, retry count down = %d\n",
562 pACB->host->host_no, retry_count);
563 } while (retry_count != 0);
566 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
568 switch (acb->adapter_type) {
570 case ACB_ADAPTER_TYPE_A:
571 arcmsr_hbaA_flush_cache(acb);
573 case ACB_ADAPTER_TYPE_B:
574 arcmsr_hbaB_flush_cache(acb);
576 case ACB_ADAPTER_TYPE_C:
577 arcmsr_hbaC_flush_cache(acb);
579 case ACB_ADAPTER_TYPE_D:
580 arcmsr_hbaD_flush_cache(acb);
582 case ACB_ADAPTER_TYPE_E:
583 case ACB_ADAPTER_TYPE_F:
584 arcmsr_hbaE_flush_cache(acb);
589 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
591 struct MessageUnit_B *reg = acb->pmuB;
593 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
594 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
595 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
596 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
597 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
599 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
600 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
601 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
602 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
604 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
605 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
606 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
609 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
611 struct MessageUnit_D *reg = acb->pmuD;
613 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
614 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
615 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
616 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
617 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
618 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
619 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
620 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
621 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
622 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
623 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
624 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
625 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
626 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
627 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
628 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
629 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
630 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
631 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
632 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
633 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
634 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
635 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
636 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
637 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
638 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
641 static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
643 dma_addr_t host_buffer_dma;
644 struct MessageUnit_F __iomem *pmuF;
646 memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
647 acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
648 acb->completeQ_size, 4);
649 acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
650 acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
651 memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
652 host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
654 /* host buffer low address, bit0:1 all buffer active */
655 writel(lower_32_bits(host_buffer_dma | 1), &pmuF->inbound_msgaddr0);
656 /* host buffer high address */
657 writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
658 /* set host buffer physical address */
659 writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
662 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
666 dma_addr_t dma_coherent_handle;
667 struct pci_dev *pdev = acb->pdev;
669 switch (acb->adapter_type) {
670 case ACB_ADAPTER_TYPE_B: {
671 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
672 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
673 &dma_coherent_handle, GFP_KERNEL);
675 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
678 acb->dma_coherent_handle2 = dma_coherent_handle;
679 acb->dma_coherent2 = dma_coherent;
680 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
681 arcmsr_hbaB_assign_regAddr(acb);
684 case ACB_ADAPTER_TYPE_D: {
685 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
686 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
687 &dma_coherent_handle, GFP_KERNEL);
689 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
692 acb->dma_coherent_handle2 = dma_coherent_handle;
693 acb->dma_coherent2 = dma_coherent;
694 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
695 arcmsr_hbaD_assign_regAddr(acb);
698 case ACB_ADAPTER_TYPE_E: {
699 uint32_t completeQ_size;
700 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
701 acb->ioqueue_size = roundup(completeQ_size, 32);
702 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
703 &dma_coherent_handle, GFP_KERNEL);
705 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
708 acb->dma_coherent_handle2 = dma_coherent_handle;
709 acb->dma_coherent2 = dma_coherent;
710 acb->pCompletionQ = dma_coherent;
711 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
712 acb->doneq_index = 0;
715 case ACB_ADAPTER_TYPE_F: {
717 uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
719 arcmsr_wait_firmware_ready(acb);
720 QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
721 acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
722 acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
723 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
724 &dma_coherent_handle, GFP_KERNEL);
726 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
729 acb->dma_coherent_handle2 = dma_coherent_handle;
730 acb->dma_coherent2 = dma_coherent;
731 acb->pCompletionQ = dma_coherent;
732 acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
733 acb->doneq_index = 0;
734 arcmsr_hbaF_assign_regAddr(acb);
743 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
745 struct pci_dev *pdev = acb->pdev;
747 dma_addr_t dma_coherent_handle;
748 struct CommandControlBlock *ccb_tmp;
750 unsigned long cdb_phyaddr, next_ccb_phy;
751 unsigned long roundup_ccbsize;
752 unsigned long max_xfer_len;
753 unsigned long max_sg_entrys;
754 uint32_t firm_config_version, curr_phy_upper32;
756 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
757 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
758 acb->devstate[i][j] = ARECA_RAID_GONE;
760 max_xfer_len = ARCMSR_MAX_XFER_LEN;
761 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
762 firm_config_version = acb->firm_cfg_version;
763 if((firm_config_version & 0xFF) >= 3){
764 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
765 max_sg_entrys = (max_xfer_len/4096);
767 acb->host->max_sectors = max_xfer_len/512;
768 acb->host->sg_tablesize = max_sg_entrys;
769 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
770 acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
771 if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
772 acb->uncache_size += acb->ioqueue_size;
773 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
775 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
778 acb->dma_coherent = dma_coherent;
779 acb->dma_coherent_handle = dma_coherent_handle;
780 memset(dma_coherent, 0, acb->uncache_size);
781 acb->ccbsize = roundup_ccbsize;
782 ccb_tmp = dma_coherent;
783 curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
784 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
785 for(i = 0; i < acb->maxFreeCCB; i++){
786 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
787 switch (acb->adapter_type) {
788 case ACB_ADAPTER_TYPE_A:
789 case ACB_ADAPTER_TYPE_B:
790 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
792 case ACB_ADAPTER_TYPE_C:
793 case ACB_ADAPTER_TYPE_D:
794 case ACB_ADAPTER_TYPE_E:
795 case ACB_ADAPTER_TYPE_F:
796 ccb_tmp->cdb_phyaddr = cdb_phyaddr;
799 acb->pccb_pool[i] = ccb_tmp;
801 ccb_tmp->smid = (u32)i << 16;
802 INIT_LIST_HEAD(&ccb_tmp->list);
803 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
804 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
806 acb->host->can_queue = i;
810 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
811 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
812 dma_coherent_handle = next_ccb_phy;
814 if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
815 acb->dma_coherent_handle2 = dma_coherent_handle;
816 acb->dma_coherent2 = ccb_tmp;
818 switch (acb->adapter_type) {
819 case ACB_ADAPTER_TYPE_B:
820 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
821 arcmsr_hbaB_assign_regAddr(acb);
823 case ACB_ADAPTER_TYPE_D:
824 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
825 arcmsr_hbaD_assign_regAddr(acb);
827 case ACB_ADAPTER_TYPE_E:
828 acb->pCompletionQ = acb->dma_coherent2;
829 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
830 acb->doneq_index = 0;
836 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
838 struct AdapterControlBlock *acb = container_of(work,
839 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
840 char *acb_dev_map = (char *)acb->device_map;
841 uint32_t __iomem *signature = NULL;
842 char __iomem *devicemap = NULL;
844 struct scsi_device *psdev;
847 switch (acb->adapter_type) {
848 case ACB_ADAPTER_TYPE_A: {
849 struct MessageUnit_A __iomem *reg = acb->pmuA;
851 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]);
852 devicemap = (char __iomem *)(®->message_rwbuffer[21]);
855 case ACB_ADAPTER_TYPE_B: {
856 struct MessageUnit_B *reg = acb->pmuB;
858 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]);
859 devicemap = (char __iomem *)(®->message_rwbuffer[21]);
862 case ACB_ADAPTER_TYPE_C: {
863 struct MessageUnit_C __iomem *reg = acb->pmuC;
865 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
866 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
869 case ACB_ADAPTER_TYPE_D: {
870 struct MessageUnit_D *reg = acb->pmuD;
872 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
873 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
876 case ACB_ADAPTER_TYPE_E: {
877 struct MessageUnit_E __iomem *reg = acb->pmuE;
879 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
880 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
883 case ACB_ADAPTER_TYPE_F: {
884 signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
885 devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
889 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
891 for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
893 temp = readb(devicemap);
894 diff = (*acb_dev_map) ^ temp;
897 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
899 if ((diff & 0x01) == 1 &&
900 (temp & 0x01) == 1) {
901 scsi_add_device(acb->host,
903 } else if ((diff & 0x01) == 1
904 && (temp & 0x01) == 0) {
905 psdev = scsi_device_lookup(acb->host,
908 scsi_remove_device(psdev);
909 scsi_device_put(psdev);
919 acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
923 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
928 if (msix_enable == 0)
930 nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
933 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
937 if (msi_enable == 1) {
938 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
940 dev_info(&pdev->dev, "msi enabled\n");
944 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
951 acb->vector_count = nvec;
952 for (i = 0; i < nvec; i++) {
953 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
954 flags, "arcmsr", acb)) {
955 pr_warn("arcmsr%d: request_irq =%d failed!\n",
956 acb->host->host_no, pci_irq_vector(pdev, i));
964 free_irq(pci_irq_vector(pdev, i), acb);
965 pci_free_irq_vectors(pdev);
969 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
971 INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
972 pacb->fw_flag = FW_NORMAL;
973 timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
974 pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
975 add_timer(&pacb->eternal_timer);
978 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
980 timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
981 pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
982 add_timer(&pacb->refresh_timer);
985 static int arcmsr_set_dma_mask(struct AdapterControlBlock *acb)
987 struct pci_dev *pcidev = acb->pdev;
990 if (((acb->adapter_type == ACB_ADAPTER_TYPE_A) && !dma_mask_64) ||
991 dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64)))
993 if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
994 dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64))) {
995 printk("arcmsr: set DMA 64 mask failed\n");
1000 if (dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1001 dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1002 dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32))) {
1003 printk("arcmsr: set DMA 32-bit mask failed\n");
1010 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1012 struct Scsi_Host *host;
1013 struct AdapterControlBlock *acb;
1014 uint8_t bus,dev_fun;
1016 error = pci_enable_device(pdev);
1020 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
1022 goto pci_disable_dev;
1024 init_waitqueue_head(&wait_q);
1025 bus = pdev->bus->number;
1026 dev_fun = pdev->devfn;
1027 acb = (struct AdapterControlBlock *) host->hostdata;
1028 memset(acb,0,sizeof(struct AdapterControlBlock));
1030 acb->adapter_type = id->driver_data;
1031 if (arcmsr_set_dma_mask(acb))
1032 goto scsi_host_release;
1034 host->max_lun = ARCMSR_MAX_TARGETLUN;
1035 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
1036 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
1037 if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
1038 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
1039 host->can_queue = host_can_queue; /* max simultaneous cmds */
1040 if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
1041 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
1042 host->cmd_per_lun = cmd_per_lun;
1043 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
1044 host->unique_id = (bus << 8) | dev_fun;
1045 pci_set_drvdata(pdev, host);
1046 pci_set_master(pdev);
1047 error = pci_request_regions(pdev, "arcmsr");
1049 goto scsi_host_release;
1051 spin_lock_init(&acb->eh_lock);
1052 spin_lock_init(&acb->ccblist_lock);
1053 spin_lock_init(&acb->postq_lock);
1054 spin_lock_init(&acb->doneq_lock);
1055 spin_lock_init(&acb->rqbuffer_lock);
1056 spin_lock_init(&acb->wqbuffer_lock);
1057 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1058 ACB_F_MESSAGE_RQBUFFER_CLEARED |
1059 ACB_F_MESSAGE_WQBUFFER_READED);
1060 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1061 INIT_LIST_HEAD(&acb->ccb_free_list);
1062 error = arcmsr_remap_pciregion(acb);
1064 goto pci_release_regs;
1066 error = arcmsr_alloc_io_queue(acb);
1068 goto unmap_pci_region;
1069 error = arcmsr_get_firmware_spec(acb);
1073 if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
1074 arcmsr_free_io_queue(acb);
1075 error = arcmsr_alloc_ccb_pool(acb);
1077 goto unmap_pci_region;
1079 error = scsi_add_host(host, &pdev->dev);
1083 if (arcmsr_request_irq(pdev, acb) == FAILED)
1084 goto scsi_host_remove;
1085 arcmsr_iop_init(acb);
1086 arcmsr_init_get_devmap_timer(acb);
1088 arcmsr_init_set_datetime_timer(acb);
1089 if(arcmsr_alloc_sysfs_attr(acb))
1090 goto out_free_sysfs;
1091 scsi_scan_host(host);
1095 del_timer_sync(&acb->refresh_timer);
1096 del_timer_sync(&acb->eternal_timer);
1097 flush_work(&acb->arcmsr_do_message_isr_bh);
1098 arcmsr_stop_adapter_bgrb(acb);
1099 arcmsr_flush_adapter_cache(acb);
1100 arcmsr_free_irq(pdev, acb);
1102 scsi_remove_host(host);
1104 arcmsr_free_ccb_pool(acb);
1105 goto unmap_pci_region;
1107 arcmsr_free_io_queue(acb);
1109 arcmsr_unmap_pciregion(acb);
1111 pci_release_regions(pdev);
1113 scsi_host_put(host);
1115 pci_disable_device(pdev);
1119 static void arcmsr_free_irq(struct pci_dev *pdev,
1120 struct AdapterControlBlock *acb)
1124 for (i = 0; i < acb->vector_count; i++)
1125 free_irq(pci_irq_vector(pdev, i), acb);
1126 pci_free_irq_vectors(pdev);
1129 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
1131 struct Scsi_Host *host = pci_get_drvdata(pdev);
1132 struct AdapterControlBlock *acb =
1133 (struct AdapterControlBlock *)host->hostdata;
1135 arcmsr_disable_outbound_ints(acb);
1136 arcmsr_free_irq(pdev, acb);
1137 del_timer_sync(&acb->eternal_timer);
1139 del_timer_sync(&acb->refresh_timer);
1140 flush_work(&acb->arcmsr_do_message_isr_bh);
1141 arcmsr_stop_adapter_bgrb(acb);
1142 arcmsr_flush_adapter_cache(acb);
1143 pci_set_drvdata(pdev, host);
1144 pci_save_state(pdev);
1145 pci_disable_device(pdev);
1146 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1150 static int arcmsr_resume(struct pci_dev *pdev)
1152 struct Scsi_Host *host = pci_get_drvdata(pdev);
1153 struct AdapterControlBlock *acb =
1154 (struct AdapterControlBlock *)host->hostdata;
1156 pci_set_power_state(pdev, PCI_D0);
1157 pci_enable_wake(pdev, PCI_D0, 0);
1158 pci_restore_state(pdev);
1159 if (pci_enable_device(pdev)) {
1160 pr_warn("%s: pci_enable_device error\n", __func__);
1163 if (arcmsr_set_dma_mask(acb))
1164 goto controller_unregister;
1165 pci_set_master(pdev);
1166 if (arcmsr_request_irq(pdev, acb) == FAILED)
1167 goto controller_stop;
1168 switch (acb->adapter_type) {
1169 case ACB_ADAPTER_TYPE_B: {
1170 struct MessageUnit_B *reg = acb->pmuB;
1172 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1173 reg->post_qbuffer[i] = 0;
1174 reg->done_qbuffer[i] = 0;
1176 reg->postq_index = 0;
1177 reg->doneq_index = 0;
1180 case ACB_ADAPTER_TYPE_E:
1181 writel(0, &acb->pmuE->host_int_status);
1182 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1183 acb->in_doorbell = 0;
1184 acb->out_doorbell = 0;
1185 acb->doneq_index = 0;
1187 case ACB_ADAPTER_TYPE_F:
1188 writel(0, &acb->pmuF->host_int_status);
1189 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
1190 acb->in_doorbell = 0;
1191 acb->out_doorbell = 0;
1192 acb->doneq_index = 0;
1193 arcmsr_hbaF_assign_regAddr(acb);
1196 arcmsr_iop_init(acb);
1197 arcmsr_init_get_devmap_timer(acb);
1199 arcmsr_init_set_datetime_timer(acb);
1202 arcmsr_stop_adapter_bgrb(acb);
1203 arcmsr_flush_adapter_cache(acb);
1204 controller_unregister:
1205 scsi_remove_host(host);
1206 arcmsr_free_ccb_pool(acb);
1207 if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1208 arcmsr_free_io_queue(acb);
1209 arcmsr_unmap_pciregion(acb);
1210 pci_release_regions(pdev);
1211 scsi_host_put(host);
1212 pci_disable_device(pdev);
1216 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1218 struct MessageUnit_A __iomem *reg = acb->pmuA;
1219 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
1220 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1222 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1223 , acb->host->host_no);
1229 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1231 struct MessageUnit_B *reg = acb->pmuB;
1233 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1234 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1236 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1237 , acb->host->host_no);
1242 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1244 struct MessageUnit_C __iomem *reg = pACB->pmuC;
1245 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
1246 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
1247 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1249 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1250 , pACB->host->host_no);
1256 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1258 struct MessageUnit_D *reg = pACB->pmuD;
1260 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1261 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1262 pr_notice("arcmsr%d: wait 'abort all outstanding "
1263 "command' timeout\n", pACB->host->host_no);
1269 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1271 struct MessageUnit_E __iomem *reg = pACB->pmuE;
1273 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
1274 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1275 writel(pACB->out_doorbell, ®->iobound_doorbell);
1276 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1277 pr_notice("arcmsr%d: wait 'abort all outstanding "
1278 "command' timeout\n", pACB->host->host_no);
1284 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1287 switch (acb->adapter_type) {
1288 case ACB_ADAPTER_TYPE_A:
1289 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1291 case ACB_ADAPTER_TYPE_B:
1292 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1294 case ACB_ADAPTER_TYPE_C:
1295 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1297 case ACB_ADAPTER_TYPE_D:
1298 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1300 case ACB_ADAPTER_TYPE_E:
1301 case ACB_ADAPTER_TYPE_F:
1302 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1308 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1310 struct scsi_cmnd *pcmd = ccb->pcmd;
1312 scsi_dma_unmap(pcmd);
1315 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1317 struct AdapterControlBlock *acb = ccb->acb;
1318 struct scsi_cmnd *pcmd = ccb->pcmd;
1319 unsigned long flags;
1320 atomic_dec(&acb->ccboutstandingcount);
1321 arcmsr_pci_unmap_dma(ccb);
1322 ccb->startdone = ARCMSR_CCB_DONE;
1323 spin_lock_irqsave(&acb->ccblist_lock, flags);
1324 list_add_tail(&ccb->list, &acb->ccb_free_list);
1325 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1326 pcmd->scsi_done(pcmd);
1329 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1332 struct scsi_cmnd *pcmd = ccb->pcmd;
1333 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1334 pcmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
1336 int sense_data_length =
1337 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1338 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1339 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
1340 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1341 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1342 sensebuffer->Valid = 1;
1343 pcmd->result |= (DRIVER_SENSE << 24);
1347 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1350 switch (acb->adapter_type) {
1351 case ACB_ADAPTER_TYPE_A : {
1352 struct MessageUnit_A __iomem *reg = acb->pmuA;
1353 orig_mask = readl(®->outbound_intmask);
1354 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1355 ®->outbound_intmask);
1358 case ACB_ADAPTER_TYPE_B : {
1359 struct MessageUnit_B *reg = acb->pmuB;
1360 orig_mask = readl(reg->iop2drv_doorbell_mask);
1361 writel(0, reg->iop2drv_doorbell_mask);
1364 case ACB_ADAPTER_TYPE_C:{
1365 struct MessageUnit_C __iomem *reg = acb->pmuC;
1366 /* disable all outbound interrupt */
1367 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */
1368 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
1371 case ACB_ADAPTER_TYPE_D: {
1372 struct MessageUnit_D *reg = acb->pmuD;
1373 /* disable all outbound interrupt */
1374 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1377 case ACB_ADAPTER_TYPE_E:
1378 case ACB_ADAPTER_TYPE_F: {
1379 struct MessageUnit_E __iomem *reg = acb->pmuE;
1380 orig_mask = readl(®->host_int_mask);
1381 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, ®->host_int_mask);
1382 readl(®->host_int_mask); /* Dummy readl to force pci flush */
1389 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1390 struct CommandControlBlock *ccb, bool error)
1393 id = ccb->pcmd->device->id;
1394 lun = ccb->pcmd->device->lun;
1396 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1397 acb->devstate[id][lun] = ARECA_RAID_GOOD;
1398 ccb->pcmd->result = DID_OK << 16;
1399 arcmsr_ccb_complete(ccb);
1401 switch (ccb->arcmsr_cdb.DeviceStatus) {
1402 case ARCMSR_DEV_SELECT_TIMEOUT: {
1403 acb->devstate[id][lun] = ARECA_RAID_GONE;
1404 ccb->pcmd->result = DID_NO_CONNECT << 16;
1405 arcmsr_ccb_complete(ccb);
1409 case ARCMSR_DEV_ABORTED:
1411 case ARCMSR_DEV_INIT_FAIL: {
1412 acb->devstate[id][lun] = ARECA_RAID_GONE;
1413 ccb->pcmd->result = DID_BAD_TARGET << 16;
1414 arcmsr_ccb_complete(ccb);
1418 case ARCMSR_DEV_CHECK_CONDITION: {
1419 acb->devstate[id][lun] = ARECA_RAID_GOOD;
1420 arcmsr_report_sense_info(ccb);
1421 arcmsr_ccb_complete(ccb);
1427 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1428 but got unknown DeviceStatus = 0x%x \n"
1429 , acb->host->host_no
1432 , ccb->arcmsr_cdb.DeviceStatus);
1433 acb->devstate[id][lun] = ARECA_RAID_GONE;
1434 ccb->pcmd->result = DID_NO_CONNECT << 16;
1435 arcmsr_ccb_complete(ccb);
1441 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1443 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1444 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1445 struct scsi_cmnd *abortcmd = pCCB->pcmd;
1447 abortcmd->result |= DID_ABORT << 16;
1448 arcmsr_ccb_complete(pCCB);
1449 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1450 acb->host->host_no, pCCB);
1454 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1456 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1457 " ccboutstandingcount = %d \n"
1458 , acb->host->host_no
1463 , atomic_read(&acb->ccboutstandingcount));
1466 arcmsr_report_ccb_state(acb, pCCB, error);
1469 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1473 struct ARCMSR_CDB *pARCMSR_CDB;
1475 struct CommandControlBlock *pCCB;
1476 unsigned long ccb_cdb_phy;
1478 switch (acb->adapter_type) {
1480 case ACB_ADAPTER_TYPE_A: {
1481 struct MessageUnit_A __iomem *reg = acb->pmuA;
1482 uint32_t outbound_intstatus;
1483 outbound_intstatus = readl(®->outbound_intstatus) &
1484 acb->outbound_int_enable;
1485 /*clear and abort all outbound posted Q*/
1486 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/
1487 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF)
1488 && (i++ < acb->maxOutstanding)) {
1489 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1490 if (acb->cdb_phyadd_hipart)
1491 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1492 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1493 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1494 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1495 arcmsr_drain_donequeue(acb, pCCB, error);
1500 case ACB_ADAPTER_TYPE_B: {
1501 struct MessageUnit_B *reg = acb->pmuB;
1502 /*clear all outbound posted Q*/
1503 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1504 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1505 flag_ccb = reg->done_qbuffer[i];
1506 if (flag_ccb != 0) {
1507 reg->done_qbuffer[i] = 0;
1508 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1509 if (acb->cdb_phyadd_hipart)
1510 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1511 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1512 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1513 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1514 arcmsr_drain_donequeue(acb, pCCB, error);
1516 reg->post_qbuffer[i] = 0;
1518 reg->doneq_index = 0;
1519 reg->postq_index = 0;
1522 case ACB_ADAPTER_TYPE_C: {
1523 struct MessageUnit_C __iomem *reg = acb->pmuC;
1524 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1526 flag_ccb = readl(®->outbound_queueport_low);
1527 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1528 if (acb->cdb_phyadd_hipart)
1529 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1530 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1531 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1532 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1533 arcmsr_drain_donequeue(acb, pCCB, error);
1537 case ACB_ADAPTER_TYPE_D: {
1538 struct MessageUnit_D *pmu = acb->pmuD;
1539 uint32_t outbound_write_pointer;
1540 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1541 unsigned long flags;
1543 residual = atomic_read(&acb->ccboutstandingcount);
1544 for (i = 0; i < residual; i++) {
1545 spin_lock_irqsave(&acb->doneq_lock, flags);
1546 outbound_write_pointer =
1547 pmu->done_qbuffer[0].addressLow + 1;
1548 doneq_index = pmu->doneq_index;
1549 if ((doneq_index & 0xFFF) !=
1550 (outbound_write_pointer & 0xFFF)) {
1551 toggle = doneq_index & 0x4000;
1552 index_stripped = (doneq_index & 0xFFF) + 1;
1553 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1554 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1555 ((toggle ^ 0x4000) + 1);
1556 doneq_index = pmu->doneq_index;
1557 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1558 addressLow = pmu->done_qbuffer[doneq_index &
1560 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1561 if (acb->cdb_phyadd_hipart)
1562 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1563 pARCMSR_CDB = (struct ARCMSR_CDB *)
1564 (acb->vir2phy_offset + ccb_cdb_phy);
1565 pCCB = container_of(pARCMSR_CDB,
1566 struct CommandControlBlock, arcmsr_cdb);
1567 error = (addressLow &
1568 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1570 arcmsr_drain_donequeue(acb, pCCB, error);
1572 pmu->outboundlist_read_pointer);
1574 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1578 pmu->postq_index = 0;
1579 pmu->doneq_index = 0x40FF;
1582 case ACB_ADAPTER_TYPE_E:
1583 arcmsr_hbaE_postqueue_isr(acb);
1585 case ACB_ADAPTER_TYPE_F:
1586 arcmsr_hbaF_postqueue_isr(acb);
1591 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1593 char *acb_dev_map = (char *)acb->device_map;
1595 struct scsi_device *psdev;
1596 struct CommandControlBlock *ccb;
1599 for (i = 0; i < acb->maxFreeCCB; i++) {
1600 ccb = acb->pccb_pool[i];
1601 if (ccb->startdone == ARCMSR_CCB_START) {
1602 ccb->pcmd->result = DID_NO_CONNECT << 16;
1603 arcmsr_pci_unmap_dma(ccb);
1604 ccb->pcmd->scsi_done(ccb->pcmd);
1607 for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1608 temp = *acb_dev_map;
1610 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1612 psdev = scsi_device_lookup(acb->host,
1614 if (psdev != NULL) {
1615 scsi_remove_device(psdev);
1616 scsi_device_put(psdev);
1627 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1629 struct pci_dev *pdev;
1630 struct Scsi_Host *host;
1633 arcmsr_free_sysfs_attr(acb);
1634 scsi_remove_host(host);
1635 flush_work(&acb->arcmsr_do_message_isr_bh);
1636 del_timer_sync(&acb->eternal_timer);
1638 del_timer_sync(&acb->refresh_timer);
1640 arcmsr_free_irq(pdev, acb);
1641 arcmsr_free_ccb_pool(acb);
1642 if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1643 arcmsr_free_io_queue(acb);
1644 arcmsr_unmap_pciregion(acb);
1645 pci_release_regions(pdev);
1646 scsi_host_put(host);
1647 pci_disable_device(pdev);
1650 static void arcmsr_remove(struct pci_dev *pdev)
1652 struct Scsi_Host *host = pci_get_drvdata(pdev);
1653 struct AdapterControlBlock *acb =
1654 (struct AdapterControlBlock *) host->hostdata;
1658 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1659 if (dev_id == 0xffff) {
1660 acb->acb_flags &= ~ACB_F_IOP_INITED;
1661 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1662 arcmsr_remove_scsi_devices(acb);
1663 arcmsr_free_pcidev(acb);
1666 arcmsr_free_sysfs_attr(acb);
1667 scsi_remove_host(host);
1668 flush_work(&acb->arcmsr_do_message_isr_bh);
1669 del_timer_sync(&acb->eternal_timer);
1671 del_timer_sync(&acb->refresh_timer);
1672 arcmsr_disable_outbound_ints(acb);
1673 arcmsr_stop_adapter_bgrb(acb);
1674 arcmsr_flush_adapter_cache(acb);
1675 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1676 acb->acb_flags &= ~ACB_F_IOP_INITED;
1678 for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1679 if (!atomic_read(&acb->ccboutstandingcount))
1681 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1685 if (atomic_read(&acb->ccboutstandingcount)) {
1688 arcmsr_abort_allcmd(acb);
1689 arcmsr_done4abort_postqueue(acb);
1690 for (i = 0; i < acb->maxFreeCCB; i++) {
1691 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1692 if (ccb->startdone == ARCMSR_CCB_START) {
1693 ccb->startdone = ARCMSR_CCB_ABORTED;
1694 ccb->pcmd->result = DID_ABORT << 16;
1695 arcmsr_ccb_complete(ccb);
1699 arcmsr_free_irq(pdev, acb);
1700 arcmsr_free_ccb_pool(acb);
1701 if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1702 arcmsr_free_io_queue(acb);
1703 arcmsr_unmap_pciregion(acb);
1704 pci_release_regions(pdev);
1705 scsi_host_put(host);
1706 pci_disable_device(pdev);
1709 static void arcmsr_shutdown(struct pci_dev *pdev)
1711 struct Scsi_Host *host = pci_get_drvdata(pdev);
1712 struct AdapterControlBlock *acb =
1713 (struct AdapterControlBlock *)host->hostdata;
1714 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1716 del_timer_sync(&acb->eternal_timer);
1718 del_timer_sync(&acb->refresh_timer);
1719 arcmsr_disable_outbound_ints(acb);
1720 arcmsr_free_irq(pdev, acb);
1721 flush_work(&acb->arcmsr_do_message_isr_bh);
1722 arcmsr_stop_adapter_bgrb(acb);
1723 arcmsr_flush_adapter_cache(acb);
1726 static int arcmsr_module_init(void)
1729 error = pci_register_driver(&arcmsr_pci_driver);
1733 static void arcmsr_module_exit(void)
1735 pci_unregister_driver(&arcmsr_pci_driver);
1737 module_init(arcmsr_module_init);
1738 module_exit(arcmsr_module_exit);
1740 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1744 switch (acb->adapter_type) {
1746 case ACB_ADAPTER_TYPE_A: {
1747 struct MessageUnit_A __iomem *reg = acb->pmuA;
1748 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1749 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1750 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1751 writel(mask, ®->outbound_intmask);
1752 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1756 case ACB_ADAPTER_TYPE_B: {
1757 struct MessageUnit_B *reg = acb->pmuB;
1758 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1759 ARCMSR_IOP2DRV_DATA_READ_OK |
1760 ARCMSR_IOP2DRV_CDB_DONE |
1761 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1762 writel(mask, reg->iop2drv_doorbell_mask);
1763 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1766 case ACB_ADAPTER_TYPE_C: {
1767 struct MessageUnit_C __iomem *reg = acb->pmuC;
1768 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1769 writel(intmask_org & mask, ®->host_int_mask);
1770 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1773 case ACB_ADAPTER_TYPE_D: {
1774 struct MessageUnit_D *reg = acb->pmuD;
1776 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1777 writel(intmask_org | mask, reg->pcief0_int_enable);
1780 case ACB_ADAPTER_TYPE_E:
1781 case ACB_ADAPTER_TYPE_F: {
1782 struct MessageUnit_E __iomem *reg = acb->pmuE;
1784 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1785 writel(intmask_org & mask, ®->host_int_mask);
1791 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1792 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1794 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1795 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1796 __le32 address_lo, address_hi;
1797 int arccdbsize = 0x30;
1800 struct scatterlist *sg;
1803 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1804 arcmsr_cdb->TargetID = pcmd->device->id;
1805 arcmsr_cdb->LUN = pcmd->device->lun;
1806 arcmsr_cdb->Function = 1;
1807 arcmsr_cdb->msgContext = 0;
1808 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1810 nseg = scsi_dma_map(pcmd);
1811 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1813 scsi_for_each_sg(pcmd, sg, nseg, i) {
1814 /* Get the physical address of the current data pointer */
1815 length = cpu_to_le32(sg_dma_len(sg));
1816 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1817 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1818 if (address_hi == 0) {
1819 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1821 pdma_sg->address = address_lo;
1822 pdma_sg->length = length;
1823 psge += sizeof (struct SG32ENTRY);
1824 arccdbsize += sizeof (struct SG32ENTRY);
1826 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1828 pdma_sg->addresshigh = address_hi;
1829 pdma_sg->address = address_lo;
1830 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1831 psge += sizeof (struct SG64ENTRY);
1832 arccdbsize += sizeof (struct SG64ENTRY);
1835 arcmsr_cdb->sgcount = (uint8_t)nseg;
1836 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1837 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1838 if ( arccdbsize > 256)
1839 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1840 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1841 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1842 ccb->arc_cdb_size = arccdbsize;
1846 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1848 uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1849 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1850 atomic_inc(&acb->ccboutstandingcount);
1851 ccb->startdone = ARCMSR_CCB_START;
1852 switch (acb->adapter_type) {
1853 case ACB_ADAPTER_TYPE_A: {
1854 struct MessageUnit_A __iomem *reg = acb->pmuA;
1856 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1857 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1858 ®->inbound_queueport);
1860 writel(cdb_phyaddr, ®->inbound_queueport);
1864 case ACB_ADAPTER_TYPE_B: {
1865 struct MessageUnit_B *reg = acb->pmuB;
1866 uint32_t ending_index, index = reg->postq_index;
1868 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1869 reg->post_qbuffer[ending_index] = 0;
1870 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1871 reg->post_qbuffer[index] =
1872 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1874 reg->post_qbuffer[index] = cdb_phyaddr;
1877 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1878 reg->postq_index = index;
1879 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1882 case ACB_ADAPTER_TYPE_C: {
1883 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1884 uint32_t ccb_post_stamp, arc_cdb_size;
1886 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1887 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1888 writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
1889 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1892 case ACB_ADAPTER_TYPE_D: {
1893 struct MessageUnit_D *pmu = acb->pmuD;
1895 u16 postq_index, toggle;
1896 unsigned long flags;
1897 struct InBound_SRB *pinbound_srb;
1899 spin_lock_irqsave(&acb->postq_lock, flags);
1900 postq_index = pmu->postq_index;
1901 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1902 pinbound_srb->addressHigh = upper_32_bits(ccb->cdb_phyaddr);
1903 pinbound_srb->addressLow = cdb_phyaddr;
1904 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1905 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1906 toggle = postq_index & 0x4000;
1907 index_stripped = postq_index + 1;
1908 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1909 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1911 writel(postq_index, pmu->inboundlist_write_pointer);
1912 spin_unlock_irqrestore(&acb->postq_lock, flags);
1915 case ACB_ADAPTER_TYPE_E: {
1916 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1917 u32 ccb_post_stamp, arc_cdb_size;
1919 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1920 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1921 writel(0, &pmu->inbound_queueport_high);
1922 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1925 case ACB_ADAPTER_TYPE_F: {
1926 struct MessageUnit_F __iomem *pmu = acb->pmuF;
1927 u32 ccb_post_stamp, arc_cdb_size;
1929 if (ccb->arc_cdb_size <= 0x300)
1930 arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 | 1;
1932 arc_cdb_size = ((ccb->arc_cdb_size + 0xff) >> 8) + 2;
1933 if (arc_cdb_size > 0xF)
1935 arc_cdb_size = (arc_cdb_size << 1) | 1;
1937 ccb_post_stamp = (ccb->smid | arc_cdb_size);
1938 writel(0, &pmu->inbound_queueport_high);
1939 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1945 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1947 struct MessageUnit_A __iomem *reg = acb->pmuA;
1948 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1949 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1950 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1952 "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1953 , acb->host->host_no);
1957 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1959 struct MessageUnit_B *reg = acb->pmuB;
1960 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1961 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1963 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1965 "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1966 , acb->host->host_no);
1970 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1972 struct MessageUnit_C __iomem *reg = pACB->pmuC;
1973 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1974 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1975 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
1976 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1978 "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1979 , pACB->host->host_no);
1984 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1986 struct MessageUnit_D *reg = pACB->pmuD;
1988 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1989 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1990 if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1991 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1992 "timeout\n", pACB->host->host_no);
1995 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1997 struct MessageUnit_E __iomem *reg = pACB->pmuE;
1999 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
2000 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
2001 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
2002 writel(pACB->out_doorbell, ®->iobound_doorbell);
2003 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
2004 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2005 "timeout\n", pACB->host->host_no);
2009 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
2011 switch (acb->adapter_type) {
2012 case ACB_ADAPTER_TYPE_A:
2013 arcmsr_hbaA_stop_bgrb(acb);
2015 case ACB_ADAPTER_TYPE_B:
2016 arcmsr_hbaB_stop_bgrb(acb);
2018 case ACB_ADAPTER_TYPE_C:
2019 arcmsr_hbaC_stop_bgrb(acb);
2021 case ACB_ADAPTER_TYPE_D:
2022 arcmsr_hbaD_stop_bgrb(acb);
2024 case ACB_ADAPTER_TYPE_E:
2025 case ACB_ADAPTER_TYPE_F:
2026 arcmsr_hbaE_stop_bgrb(acb);
2031 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
2033 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
2036 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
2038 switch (acb->adapter_type) {
2039 case ACB_ADAPTER_TYPE_A: {
2040 struct MessageUnit_A __iomem *reg = acb->pmuA;
2041 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
2044 case ACB_ADAPTER_TYPE_B: {
2045 struct MessageUnit_B *reg = acb->pmuB;
2046 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2049 case ACB_ADAPTER_TYPE_C: {
2050 struct MessageUnit_C __iomem *reg = acb->pmuC;
2052 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
2055 case ACB_ADAPTER_TYPE_D: {
2056 struct MessageUnit_D *reg = acb->pmuD;
2057 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
2058 reg->inbound_doorbell);
2061 case ACB_ADAPTER_TYPE_E:
2062 case ACB_ADAPTER_TYPE_F: {
2063 struct MessageUnit_E __iomem *reg = acb->pmuE;
2064 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
2065 writel(acb->out_doorbell, ®->iobound_doorbell);
2071 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
2073 switch (acb->adapter_type) {
2074 case ACB_ADAPTER_TYPE_A: {
2075 struct MessageUnit_A __iomem *reg = acb->pmuA;
2077 ** push inbound doorbell tell iop, driver data write ok
2078 ** and wait reply on next hwinterrupt for next Qbuffer post
2080 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell);
2084 case ACB_ADAPTER_TYPE_B: {
2085 struct MessageUnit_B *reg = acb->pmuB;
2087 ** push inbound doorbell tell iop, driver data write ok
2088 ** and wait reply on next hwinterrupt for next Qbuffer post
2090 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
2093 case ACB_ADAPTER_TYPE_C: {
2094 struct MessageUnit_C __iomem *reg = acb->pmuC;
2096 ** push inbound doorbell tell iop, driver data write ok
2097 ** and wait reply on next hwinterrupt for next Qbuffer post
2099 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell);
2102 case ACB_ADAPTER_TYPE_D: {
2103 struct MessageUnit_D *reg = acb->pmuD;
2104 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
2105 reg->inbound_doorbell);
2108 case ACB_ADAPTER_TYPE_E:
2109 case ACB_ADAPTER_TYPE_F: {
2110 struct MessageUnit_E __iomem *reg = acb->pmuE;
2111 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2112 writel(acb->out_doorbell, ®->iobound_doorbell);
2118 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2120 struct QBUFFER __iomem *qbuffer = NULL;
2121 switch (acb->adapter_type) {
2123 case ACB_ADAPTER_TYPE_A: {
2124 struct MessageUnit_A __iomem *reg = acb->pmuA;
2125 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer;
2128 case ACB_ADAPTER_TYPE_B: {
2129 struct MessageUnit_B *reg = acb->pmuB;
2130 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2133 case ACB_ADAPTER_TYPE_C: {
2134 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2135 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2138 case ACB_ADAPTER_TYPE_D: {
2139 struct MessageUnit_D *reg = acb->pmuD;
2140 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2143 case ACB_ADAPTER_TYPE_E: {
2144 struct MessageUnit_E __iomem *reg = acb->pmuE;
2145 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer;
2148 case ACB_ADAPTER_TYPE_F: {
2149 qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
2156 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2158 struct QBUFFER __iomem *pqbuffer = NULL;
2159 switch (acb->adapter_type) {
2161 case ACB_ADAPTER_TYPE_A: {
2162 struct MessageUnit_A __iomem *reg = acb->pmuA;
2163 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer;
2166 case ACB_ADAPTER_TYPE_B: {
2167 struct MessageUnit_B *reg = acb->pmuB;
2168 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2171 case ACB_ADAPTER_TYPE_C: {
2172 struct MessageUnit_C __iomem *reg = acb->pmuC;
2173 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer;
2176 case ACB_ADAPTER_TYPE_D: {
2177 struct MessageUnit_D *reg = acb->pmuD;
2178 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2181 case ACB_ADAPTER_TYPE_E: {
2182 struct MessageUnit_E __iomem *reg = acb->pmuE;
2183 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer;
2186 case ACB_ADAPTER_TYPE_F:
2187 pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
2194 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2195 struct QBUFFER __iomem *prbuffer)
2198 uint8_t *buf1 = NULL;
2199 uint32_t __iomem *iop_data;
2200 uint32_t iop_len, data_len, *buf2 = NULL;
2202 iop_data = (uint32_t __iomem *)prbuffer->data;
2203 iop_len = readl(&prbuffer->data_len);
2205 buf1 = kmalloc(128, GFP_ATOMIC);
2206 buf2 = (uint32_t *)buf1;
2210 while (data_len >= 4) {
2211 *buf2++ = readl(iop_data);
2216 *buf2 = readl(iop_data);
2217 buf2 = (uint32_t *)buf1;
2219 while (iop_len > 0) {
2220 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2222 acb->rqbuf_putIndex++;
2223 /* if last, index number set it to 0 */
2224 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2229 /* let IOP know data has been read */
2230 arcmsr_iop_message_read(acb);
2235 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2236 struct QBUFFER __iomem *prbuffer) {
2239 uint8_t __iomem *iop_data;
2242 if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2243 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2244 iop_data = (uint8_t __iomem *)prbuffer->data;
2245 iop_len = readl(&prbuffer->data_len);
2246 while (iop_len > 0) {
2247 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2248 *pQbuffer = readb(iop_data);
2249 acb->rqbuf_putIndex++;
2250 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2254 arcmsr_iop_message_read(acb);
2258 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2260 unsigned long flags;
2261 struct QBUFFER __iomem *prbuffer;
2262 int32_t buf_empty_len;
2264 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2265 prbuffer = arcmsr_get_iop_rqbuffer(acb);
2266 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2267 (ARCMSR_MAX_QBUFFER - 1);
2268 if (buf_empty_len >= readl(&prbuffer->data_len)) {
2269 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2270 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2272 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2273 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2276 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2279 struct QBUFFER __iomem *pwbuffer;
2280 uint8_t *buf1 = NULL;
2281 uint32_t __iomem *iop_data;
2282 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2284 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2285 buf1 = kmalloc(128, GFP_ATOMIC);
2286 buf2 = (uint32_t *)buf1;
2290 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2291 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2292 iop_data = (uint32_t __iomem *)pwbuffer->data;
2293 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2294 && (allxfer_len < 124)) {
2295 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2297 acb->wqbuf_getIndex++;
2298 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2302 data_len = allxfer_len;
2303 buf1 = (uint8_t *)buf2;
2304 while (data_len >= 4) {
2306 writel(data, iop_data);
2312 writel(data, iop_data);
2314 writel(allxfer_len, &pwbuffer->data_len);
2316 arcmsr_iop_message_wrote(acb);
2321 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2324 struct QBUFFER __iomem *pwbuffer;
2325 uint8_t __iomem *iop_data;
2326 int32_t allxfer_len = 0;
2328 if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2329 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2332 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2333 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2334 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2335 iop_data = (uint8_t __iomem *)pwbuffer->data;
2336 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2337 && (allxfer_len < 124)) {
2338 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2339 writeb(*pQbuffer, iop_data);
2340 acb->wqbuf_getIndex++;
2341 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2345 writel(allxfer_len, &pwbuffer->data_len);
2346 arcmsr_iop_message_wrote(acb);
2350 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2352 unsigned long flags;
2354 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2355 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2356 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2357 arcmsr_write_ioctldata2iop(acb);
2358 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2359 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2360 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2363 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2365 uint32_t outbound_doorbell;
2366 struct MessageUnit_A __iomem *reg = acb->pmuA;
2367 outbound_doorbell = readl(®->outbound_doorbell);
2369 writel(outbound_doorbell, ®->outbound_doorbell);
2370 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2371 arcmsr_iop2drv_data_wrote_handle(acb);
2372 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2373 arcmsr_iop2drv_data_read_handle(acb);
2374 outbound_doorbell = readl(®->outbound_doorbell);
2375 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2376 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2378 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2380 uint32_t outbound_doorbell;
2381 struct MessageUnit_C __iomem *reg = pACB->pmuC;
2383 *******************************************************************
2384 ** Maybe here we need to check wrqbuffer_lock is lock or not
2385 ** DOORBELL: din! don!
2386 ** check if there are any mail need to pack from firmware
2387 *******************************************************************
2389 outbound_doorbell = readl(®->outbound_doorbell);
2391 writel(outbound_doorbell, ®->outbound_doorbell_clear);
2392 readl(®->outbound_doorbell_clear);
2393 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2394 arcmsr_iop2drv_data_wrote_handle(pACB);
2395 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2396 arcmsr_iop2drv_data_read_handle(pACB);
2397 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2398 arcmsr_hbaC_message_isr(pACB);
2399 outbound_doorbell = readl(®->outbound_doorbell);
2400 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2401 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2402 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2405 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2407 uint32_t outbound_doorbell;
2408 struct MessageUnit_D *pmu = pACB->pmuD;
2410 outbound_doorbell = readl(pmu->outbound_doorbell);
2412 writel(outbound_doorbell, pmu->outbound_doorbell);
2413 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2414 arcmsr_hbaD_message_isr(pACB);
2415 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2416 arcmsr_iop2drv_data_wrote_handle(pACB);
2417 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2418 arcmsr_iop2drv_data_read_handle(pACB);
2419 outbound_doorbell = readl(pmu->outbound_doorbell);
2420 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2421 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2422 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2425 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2427 uint32_t outbound_doorbell, in_doorbell, tmp, i;
2428 struct MessageUnit_E __iomem *reg = pACB->pmuE;
2430 if (pACB->adapter_type == ACB_ADAPTER_TYPE_F) {
2431 for (i = 0; i < 5; i++) {
2432 in_doorbell = readl(®->iobound_doorbell);
2433 if (in_doorbell != 0)
2437 in_doorbell = readl(®->iobound_doorbell);
2438 outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2440 writel(0, ®->host_int_status); /* clear interrupt */
2441 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2442 arcmsr_iop2drv_data_wrote_handle(pACB);
2444 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2445 arcmsr_iop2drv_data_read_handle(pACB);
2447 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2448 arcmsr_hbaE_message_isr(pACB);
2451 in_doorbell = readl(®->iobound_doorbell);
2452 outbound_doorbell = tmp ^ in_doorbell;
2453 } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2454 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2455 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2456 pACB->in_doorbell = in_doorbell;
2459 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2462 struct MessageUnit_A __iomem *reg = acb->pmuA;
2463 struct ARCMSR_CDB *pARCMSR_CDB;
2464 struct CommandControlBlock *pCCB;
2466 unsigned long cdb_phy_addr;
2468 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) {
2469 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2470 if (acb->cdb_phyadd_hipart)
2471 cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2472 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2473 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2474 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2475 arcmsr_drain_donequeue(acb, pCCB, error);
2478 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2482 struct MessageUnit_B *reg = acb->pmuB;
2483 struct ARCMSR_CDB *pARCMSR_CDB;
2484 struct CommandControlBlock *pCCB;
2486 unsigned long cdb_phy_addr;
2488 index = reg->doneq_index;
2489 while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2490 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2491 if (acb->cdb_phyadd_hipart)
2492 cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2493 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2494 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2495 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2496 arcmsr_drain_donequeue(acb, pCCB, error);
2497 reg->done_qbuffer[index] = 0;
2499 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2500 reg->doneq_index = index;
2504 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2506 struct MessageUnit_C __iomem *phbcmu;
2507 struct ARCMSR_CDB *arcmsr_cdb;
2508 struct CommandControlBlock *ccb;
2509 uint32_t flag_ccb, throttling = 0;
2510 unsigned long ccb_cdb_phy;
2514 /* areca cdb command done */
2515 /* Use correct offset and size for syncing */
2517 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2519 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2520 if (acb->cdb_phyadd_hipart)
2521 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2522 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2524 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2526 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2528 /* check if command done with no error */
2529 arcmsr_drain_donequeue(acb, ccb, error);
2531 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2532 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2533 &phbcmu->inbound_doorbell);
2539 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2541 u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2542 uint32_t addressLow;
2544 struct MessageUnit_D *pmu;
2545 struct ARCMSR_CDB *arcmsr_cdb;
2546 struct CommandControlBlock *ccb;
2547 unsigned long flags, ccb_cdb_phy;
2549 spin_lock_irqsave(&acb->doneq_lock, flags);
2551 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2552 doneq_index = pmu->doneq_index;
2553 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2555 toggle = doneq_index & 0x4000;
2556 index_stripped = (doneq_index & 0xFFF) + 1;
2557 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2558 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2559 ((toggle ^ 0x4000) + 1);
2560 doneq_index = pmu->doneq_index;
2561 addressLow = pmu->done_qbuffer[doneq_index &
2563 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2564 if (acb->cdb_phyadd_hipart)
2565 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2566 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2568 ccb = container_of(arcmsr_cdb,
2569 struct CommandControlBlock, arcmsr_cdb);
2570 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2572 arcmsr_drain_donequeue(acb, ccb, error);
2573 writel(doneq_index, pmu->outboundlist_read_pointer);
2574 } while ((doneq_index & 0xFFF) !=
2575 (outbound_write_pointer & 0xFFF));
2577 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2578 pmu->outboundlist_interrupt_cause);
2579 readl(pmu->outboundlist_interrupt_cause);
2580 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2583 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2585 uint32_t doneq_index;
2588 struct MessageUnit_E __iomem *pmu;
2589 struct CommandControlBlock *ccb;
2590 unsigned long flags;
2592 spin_lock_irqsave(&acb->doneq_lock, flags);
2593 doneq_index = acb->doneq_index;
2595 while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2596 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2597 ccb = acb->pccb_pool[cmdSMID];
2598 error = (acb->pCompletionQ[doneq_index].cmdFlag
2599 & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2600 arcmsr_drain_donequeue(acb, ccb, error);
2602 if (doneq_index >= acb->completionQ_entry)
2605 acb->doneq_index = doneq_index;
2606 writel(doneq_index, &pmu->reply_post_consumer_index);
2607 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2610 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
2612 uint32_t doneq_index;
2615 struct MessageUnit_F __iomem *phbcmu;
2616 struct CommandControlBlock *ccb;
2617 unsigned long flags;
2619 spin_lock_irqsave(&acb->doneq_lock, flags);
2620 doneq_index = acb->doneq_index;
2623 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2624 if (cmdSMID == 0xffff)
2626 ccb = acb->pccb_pool[cmdSMID];
2627 error = (acb->pCompletionQ[doneq_index].cmdFlag &
2628 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2629 arcmsr_drain_donequeue(acb, ccb, error);
2630 acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
2632 if (doneq_index >= acb->completionQ_entry)
2635 acb->doneq_index = doneq_index;
2636 writel(doneq_index, &phbcmu->reply_post_consumer_index);
2637 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2641 **********************************************************************************
2642 ** Handle a message interrupt
2644 ** The only message interrupt we expect is in response to a query for the current adapter config.
2645 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2646 **********************************************************************************
2648 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2650 struct MessageUnit_A __iomem *reg = acb->pmuA;
2651 /*clear interrupt and message state*/
2652 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus);
2653 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2654 schedule_work(&acb->arcmsr_do_message_isr_bh);
2656 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2658 struct MessageUnit_B *reg = acb->pmuB;
2660 /*clear interrupt and message state*/
2661 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2662 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2663 schedule_work(&acb->arcmsr_do_message_isr_bh);
2666 **********************************************************************************
2667 ** Handle a message interrupt
2669 ** The only message interrupt we expect is in response to a query for the
2670 ** current adapter config.
2671 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2672 **********************************************************************************
2674 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2676 struct MessageUnit_C __iomem *reg = acb->pmuC;
2677 /*clear interrupt and message state*/
2678 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);
2679 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2680 schedule_work(&acb->arcmsr_do_message_isr_bh);
2683 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2685 struct MessageUnit_D *reg = acb->pmuD;
2687 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2688 readl(reg->outbound_doorbell);
2689 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2690 schedule_work(&acb->arcmsr_do_message_isr_bh);
2693 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2695 struct MessageUnit_E __iomem *reg = acb->pmuE;
2697 writel(0, ®->host_int_status);
2698 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2699 schedule_work(&acb->arcmsr_do_message_isr_bh);
2702 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2704 uint32_t outbound_intstatus;
2705 struct MessageUnit_A __iomem *reg = acb->pmuA;
2706 outbound_intstatus = readl(®->outbound_intstatus) &
2707 acb->outbound_int_enable;
2708 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2711 writel(outbound_intstatus, ®->outbound_intstatus);
2712 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2713 arcmsr_hbaA_doorbell_isr(acb);
2714 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2715 arcmsr_hbaA_postqueue_isr(acb);
2716 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2717 arcmsr_hbaA_message_isr(acb);
2718 outbound_intstatus = readl(®->outbound_intstatus) &
2719 acb->outbound_int_enable;
2720 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2721 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2722 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2726 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2728 uint32_t outbound_doorbell;
2729 struct MessageUnit_B *reg = acb->pmuB;
2730 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2731 acb->outbound_int_enable;
2732 if (!outbound_doorbell)
2735 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2736 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2737 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2738 arcmsr_iop2drv_data_wrote_handle(acb);
2739 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2740 arcmsr_iop2drv_data_read_handle(acb);
2741 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2742 arcmsr_hbaB_postqueue_isr(acb);
2743 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2744 arcmsr_hbaB_message_isr(acb);
2745 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2746 acb->outbound_int_enable;
2747 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2748 | ARCMSR_IOP2DRV_DATA_READ_OK
2749 | ARCMSR_IOP2DRV_CDB_DONE
2750 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2754 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2756 uint32_t host_interrupt_status;
2757 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2759 *********************************************
2760 ** check outbound intstatus
2761 *********************************************
2763 host_interrupt_status = readl(&phbcmu->host_int_status) &
2764 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2765 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2766 if (!host_interrupt_status)
2769 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2770 arcmsr_hbaC_doorbell_isr(pACB);
2771 /* MU post queue interrupts*/
2772 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2773 arcmsr_hbaC_postqueue_isr(pACB);
2774 host_interrupt_status = readl(&phbcmu->host_int_status);
2775 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2776 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2780 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2782 u32 host_interrupt_status;
2783 struct MessageUnit_D *pmu = pACB->pmuD;
2785 host_interrupt_status = readl(pmu->host_int_status) &
2786 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2787 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2788 if (!host_interrupt_status)
2791 /* MU post queue interrupts*/
2792 if (host_interrupt_status &
2793 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2794 arcmsr_hbaD_postqueue_isr(pACB);
2795 if (host_interrupt_status &
2796 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2797 arcmsr_hbaD_doorbell_isr(pACB);
2798 host_interrupt_status = readl(pmu->host_int_status);
2799 } while (host_interrupt_status &
2800 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2801 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2805 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2807 uint32_t host_interrupt_status;
2808 struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2810 host_interrupt_status = readl(&pmu->host_int_status) &
2811 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2812 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2813 if (!host_interrupt_status)
2816 /* MU ioctl transfer doorbell interrupts*/
2817 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2818 arcmsr_hbaE_doorbell_isr(pACB);
2820 /* MU post queue interrupts*/
2821 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2822 arcmsr_hbaE_postqueue_isr(pACB);
2824 host_interrupt_status = readl(&pmu->host_int_status);
2825 } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2826 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2830 static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
2832 uint32_t host_interrupt_status;
2833 struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
2835 host_interrupt_status = readl(&phbcmu->host_int_status) &
2836 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2837 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2838 if (!host_interrupt_status)
2841 /* MU post queue interrupts*/
2842 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
2843 arcmsr_hbaF_postqueue_isr(pACB);
2845 /* MU ioctl transfer doorbell interrupts*/
2846 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
2847 arcmsr_hbaE_doorbell_isr(pACB);
2849 host_interrupt_status = readl(&phbcmu->host_int_status);
2850 } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2851 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2855 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2857 switch (acb->adapter_type) {
2858 case ACB_ADAPTER_TYPE_A:
2859 return arcmsr_hbaA_handle_isr(acb);
2860 case ACB_ADAPTER_TYPE_B:
2861 return arcmsr_hbaB_handle_isr(acb);
2862 case ACB_ADAPTER_TYPE_C:
2863 return arcmsr_hbaC_handle_isr(acb);
2864 case ACB_ADAPTER_TYPE_D:
2865 return arcmsr_hbaD_handle_isr(acb);
2866 case ACB_ADAPTER_TYPE_E:
2867 return arcmsr_hbaE_handle_isr(acb);
2868 case ACB_ADAPTER_TYPE_F:
2869 return arcmsr_hbaF_handle_isr(acb);
2875 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2878 /* stop adapter background rebuild */
2879 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2880 uint32_t intmask_org;
2881 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2882 intmask_org = arcmsr_disable_outbound_ints(acb);
2883 arcmsr_stop_adapter_bgrb(acb);
2884 arcmsr_flush_adapter_cache(acb);
2885 arcmsr_enable_outbound_ints(acb, intmask_org);
2891 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2895 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2896 for (i = 0; i < 15; i++) {
2897 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2898 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2899 acb->rqbuf_getIndex = 0;
2900 acb->rqbuf_putIndex = 0;
2901 arcmsr_iop_message_read(acb);
2903 } else if (acb->rqbuf_getIndex !=
2904 acb->rqbuf_putIndex) {
2905 acb->rqbuf_getIndex = 0;
2906 acb->rqbuf_putIndex = 0;
2914 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2915 struct scsi_cmnd *cmd)
2918 unsigned short use_sg;
2919 int retvalue = 0, transfer_len = 0;
2920 unsigned long flags;
2921 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2922 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2923 (uint32_t)cmd->cmnd[6] << 16 |
2924 (uint32_t)cmd->cmnd[7] << 8 |
2925 (uint32_t)cmd->cmnd[8];
2926 struct scatterlist *sg;
2928 use_sg = scsi_sg_count(cmd);
2929 sg = scsi_sglist(cmd);
2930 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2932 retvalue = ARCMSR_MESSAGE_FAIL;
2935 transfer_len += sg->length;
2936 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2937 retvalue = ARCMSR_MESSAGE_FAIL;
2938 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2941 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2942 switch (controlcode) {
2943 case ARCMSR_MESSAGE_READ_RQBUFFER: {
2944 unsigned char *ver_addr;
2945 uint8_t *ptmpQbuffer;
2946 uint32_t allxfer_len = 0;
2947 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2949 retvalue = ARCMSR_MESSAGE_FAIL;
2950 pr_info("%s: memory not enough!\n", __func__);
2953 ptmpQbuffer = ver_addr;
2954 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2955 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2956 unsigned int tail = acb->rqbuf_getIndex;
2957 unsigned int head = acb->rqbuf_putIndex;
2958 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2960 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2961 if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2962 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2964 if (allxfer_len <= cnt_to_end)
2965 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2967 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2968 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2970 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2972 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2974 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2975 struct QBUFFER __iomem *prbuffer;
2976 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2977 prbuffer = arcmsr_get_iop_rqbuffer(acb);
2978 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2979 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2981 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2983 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2984 if (acb->fw_flag == FW_DEADLOCK)
2985 pcmdmessagefld->cmdmessage.ReturnCode =
2986 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2988 pcmdmessagefld->cmdmessage.ReturnCode =
2989 ARCMSR_MESSAGE_RETURNCODE_OK;
2992 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2993 unsigned char *ver_addr;
2996 uint8_t *pQbuffer, *ptmpuserbuffer;
2998 user_len = pcmdmessagefld->cmdmessage.Length;
2999 if (user_len > ARCMSR_API_DATA_BUFLEN) {
3000 retvalue = ARCMSR_MESSAGE_FAIL;
3004 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3006 retvalue = ARCMSR_MESSAGE_FAIL;
3009 ptmpuserbuffer = ver_addr;
3011 memcpy(ptmpuserbuffer,
3012 pcmdmessagefld->messagedatabuffer, user_len);
3013 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3014 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
3015 struct SENSE_DATA *sensebuffer =
3016 (struct SENSE_DATA *)cmd->sense_buffer;
3017 arcmsr_write_ioctldata2iop(acb);
3018 /* has error report sensedata */
3019 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
3020 sensebuffer->SenseKey = ILLEGAL_REQUEST;
3021 sensebuffer->AdditionalSenseLength = 0x0A;
3022 sensebuffer->AdditionalSenseCode = 0x20;
3023 sensebuffer->Valid = 1;
3024 retvalue = ARCMSR_MESSAGE_FAIL;
3026 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
3027 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
3028 if (user_len > cnt2end) {
3029 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
3030 ptmpuserbuffer += cnt2end;
3031 user_len -= cnt2end;
3032 acb->wqbuf_putIndex = 0;
3033 pQbuffer = acb->wqbuffer;
3035 memcpy(pQbuffer, ptmpuserbuffer, user_len);
3036 acb->wqbuf_putIndex += user_len;
3037 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
3038 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
3040 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
3041 arcmsr_write_ioctldata2iop(acb);
3044 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3046 if (acb->fw_flag == FW_DEADLOCK)
3047 pcmdmessagefld->cmdmessage.ReturnCode =
3048 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3050 pcmdmessagefld->cmdmessage.ReturnCode =
3051 ARCMSR_MESSAGE_RETURNCODE_OK;
3054 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
3055 uint8_t *pQbuffer = acb->rqbuffer;
3057 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3058 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3059 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3060 acb->rqbuf_getIndex = 0;
3061 acb->rqbuf_putIndex = 0;
3062 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3063 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3064 if (acb->fw_flag == FW_DEADLOCK)
3065 pcmdmessagefld->cmdmessage.ReturnCode =
3066 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3068 pcmdmessagefld->cmdmessage.ReturnCode =
3069 ARCMSR_MESSAGE_RETURNCODE_OK;
3072 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
3073 uint8_t *pQbuffer = acb->wqbuffer;
3074 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3075 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3076 ACB_F_MESSAGE_WQBUFFER_READED);
3077 acb->wqbuf_getIndex = 0;
3078 acb->wqbuf_putIndex = 0;
3079 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3080 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3081 if (acb->fw_flag == FW_DEADLOCK)
3082 pcmdmessagefld->cmdmessage.ReturnCode =
3083 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3085 pcmdmessagefld->cmdmessage.ReturnCode =
3086 ARCMSR_MESSAGE_RETURNCODE_OK;
3089 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
3091 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3092 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3093 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3094 acb->rqbuf_getIndex = 0;
3095 acb->rqbuf_putIndex = 0;
3096 pQbuffer = acb->rqbuffer;
3097 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3098 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3099 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3100 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3101 ACB_F_MESSAGE_WQBUFFER_READED);
3102 acb->wqbuf_getIndex = 0;
3103 acb->wqbuf_putIndex = 0;
3104 pQbuffer = acb->wqbuffer;
3105 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3106 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3107 if (acb->fw_flag == FW_DEADLOCK)
3108 pcmdmessagefld->cmdmessage.ReturnCode =
3109 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3111 pcmdmessagefld->cmdmessage.ReturnCode =
3112 ARCMSR_MESSAGE_RETURNCODE_OK;
3115 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
3116 if (acb->fw_flag == FW_DEADLOCK)
3117 pcmdmessagefld->cmdmessage.ReturnCode =
3118 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3120 pcmdmessagefld->cmdmessage.ReturnCode =
3121 ARCMSR_MESSAGE_RETURNCODE_3F;
3124 case ARCMSR_MESSAGE_SAY_HELLO: {
3125 int8_t *hello_string = "Hello! I am ARCMSR";
3126 if (acb->fw_flag == FW_DEADLOCK)
3127 pcmdmessagefld->cmdmessage.ReturnCode =
3128 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3130 pcmdmessagefld->cmdmessage.ReturnCode =
3131 ARCMSR_MESSAGE_RETURNCODE_OK;
3132 memcpy(pcmdmessagefld->messagedatabuffer,
3133 hello_string, (int16_t)strlen(hello_string));
3136 case ARCMSR_MESSAGE_SAY_GOODBYE: {
3137 if (acb->fw_flag == FW_DEADLOCK)
3138 pcmdmessagefld->cmdmessage.ReturnCode =
3139 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3141 pcmdmessagefld->cmdmessage.ReturnCode =
3142 ARCMSR_MESSAGE_RETURNCODE_OK;
3143 arcmsr_iop_parking(acb);
3146 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
3147 if (acb->fw_flag == FW_DEADLOCK)
3148 pcmdmessagefld->cmdmessage.ReturnCode =
3149 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3151 pcmdmessagefld->cmdmessage.ReturnCode =
3152 ARCMSR_MESSAGE_RETURNCODE_OK;
3153 arcmsr_flush_adapter_cache(acb);
3157 retvalue = ARCMSR_MESSAGE_FAIL;
3158 pr_info("%s: unknown controlcode!\n", __func__);
3162 struct scatterlist *sg = scsi_sglist(cmd);
3163 kunmap_atomic(buffer - sg->offset);
3168 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
3170 struct list_head *head = &acb->ccb_free_list;
3171 struct CommandControlBlock *ccb = NULL;
3172 unsigned long flags;
3173 spin_lock_irqsave(&acb->ccblist_lock, flags);
3174 if (!list_empty(head)) {
3175 ccb = list_entry(head->next, struct CommandControlBlock, list);
3176 list_del_init(&ccb->list);
3178 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3181 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3185 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
3186 struct scsi_cmnd *cmd)
3188 switch (cmd->cmnd[0]) {
3190 unsigned char inqdata[36];
3192 struct scatterlist *sg;
3194 if (cmd->device->lun) {
3195 cmd->result = (DID_TIME_OUT << 16);
3196 cmd->scsi_done(cmd);
3199 inqdata[0] = TYPE_PROCESSOR;
3200 /* Periph Qualifier & Periph Dev Type */
3202 /* rem media bit & Dev Type Modifier */
3204 /* ISO, ECMA, & ANSI versions */
3206 /* length of additional data */
3207 strncpy(&inqdata[8], "Areca ", 8);
3208 /* Vendor Identification */
3209 strncpy(&inqdata[16], "RAID controller ", 16);
3210 /* Product Identification */
3211 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
3213 sg = scsi_sglist(cmd);
3214 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3216 memcpy(buffer, inqdata, sizeof(inqdata));
3217 sg = scsi_sglist(cmd);
3218 kunmap_atomic(buffer - sg->offset);
3220 cmd->scsi_done(cmd);
3225 if (arcmsr_iop_message_xfer(acb, cmd))
3226 cmd->result = (DID_ERROR << 16);
3227 cmd->scsi_done(cmd);
3231 cmd->scsi_done(cmd);
3235 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
3236 void (* done)(struct scsi_cmnd *))
3238 struct Scsi_Host *host = cmd->device->host;
3239 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3240 struct CommandControlBlock *ccb;
3241 int target = cmd->device->id;
3243 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3244 cmd->result = (DID_NO_CONNECT << 16);
3245 cmd->scsi_done(cmd);
3248 cmd->scsi_done = done;
3249 cmd->host_scribble = NULL;
3252 /* virtual device for iop message transfer */
3253 arcmsr_handle_virtual_command(acb, cmd);
3256 ccb = arcmsr_get_freeccb(acb);
3258 return SCSI_MLQUEUE_HOST_BUSY;
3259 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3260 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
3261 cmd->scsi_done(cmd);
3264 arcmsr_post_ccb(acb, ccb);
3268 static DEF_SCSI_QCMD(arcmsr_queue_command)
3270 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3273 uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3274 uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3275 uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3276 uint32_t *firm_model = &rwbuffer[15];
3277 uint32_t *firm_version = &rwbuffer[17];
3278 uint32_t *device_map = &rwbuffer[21];
3282 *acb_firm_model = readl(firm_model);
3289 *acb_firm_version = readl(firm_version);
3296 *acb_device_map = readl(device_map);
3301 pACB->signature = readl(&rwbuffer[0]);
3302 pACB->firm_request_len = readl(&rwbuffer[1]);
3303 pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3304 pACB->firm_sdram_size = readl(&rwbuffer[3]);
3305 pACB->firm_hd_channels = readl(&rwbuffer[4]);
3306 pACB->firm_cfg_version = readl(&rwbuffer[25]);
3307 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3308 pACB->host->host_no,
3310 pACB->firm_version);
3313 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3315 struct MessageUnit_A __iomem *reg = acb->pmuA;
3317 arcmsr_wait_firmware_ready(acb);
3318 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3319 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3320 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3321 miscellaneous data' timeout \n", acb->host->host_no);
3324 arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3327 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3329 struct MessageUnit_B *reg = acb->pmuB;
3331 arcmsr_wait_firmware_ready(acb);
3332 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3333 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3334 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3337 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3338 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3339 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3340 miscellaneous data' timeout \n", acb->host->host_no);
3343 arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3347 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3349 uint32_t intmask_org;
3350 struct MessageUnit_C __iomem *reg = pACB->pmuC;
3352 /* disable all outbound interrupt */
3353 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
3354 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
3355 /* wait firmware ready */
3356 arcmsr_wait_firmware_ready(pACB);
3357 /* post "get config" instruction */
3358 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3359 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
3360 /* wait message ready */
3361 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3362 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3363 miscellaneous data' timeout \n", pACB->host->host_no);
3366 arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3370 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3372 struct MessageUnit_D *reg = acb->pmuD;
3374 if (readl(acb->pmuD->outbound_doorbell) &
3375 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3376 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3377 acb->pmuD->outbound_doorbell);/*clear interrupt*/
3379 arcmsr_wait_firmware_ready(acb);
3380 /* post "get config" instruction */
3381 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3382 /* wait message ready */
3383 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3384 pr_notice("arcmsr%d: wait get adapter firmware "
3385 "miscellaneous data timeout\n", acb->host->host_no);
3388 arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3392 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3394 struct MessageUnit_E __iomem *reg = pACB->pmuE;
3395 uint32_t intmask_org;
3397 /* disable all outbound interrupt */
3398 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
3399 writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, ®->host_int_mask);
3400 /* wait firmware ready */
3401 arcmsr_wait_firmware_ready(pACB);
3403 /* post "get config" instruction */
3404 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3406 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3407 writel(pACB->out_doorbell, ®->iobound_doorbell);
3408 /* wait message ready */
3409 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3410 pr_notice("arcmsr%d: wait get adapter firmware "
3411 "miscellaneous data timeout\n", pACB->host->host_no);
3414 arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3418 static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
3420 struct MessageUnit_F __iomem *reg = pACB->pmuF;
3421 uint32_t intmask_org;
3423 /* disable all outbound interrupt */
3424 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
3425 writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, ®->host_int_mask);
3426 /* wait firmware ready */
3427 arcmsr_wait_firmware_ready(pACB);
3428 /* post "get config" instruction */
3429 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3431 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3432 writel(pACB->out_doorbell, ®->iobound_doorbell);
3433 /* wait message ready */
3434 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3435 pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
3436 pACB->host->host_no);
3439 arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
3443 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3447 switch (acb->adapter_type) {
3448 case ACB_ADAPTER_TYPE_A:
3449 rtn = arcmsr_hbaA_get_config(acb);
3451 case ACB_ADAPTER_TYPE_B:
3452 rtn = arcmsr_hbaB_get_config(acb);
3454 case ACB_ADAPTER_TYPE_C:
3455 rtn = arcmsr_hbaC_get_config(acb);
3457 case ACB_ADAPTER_TYPE_D:
3458 rtn = arcmsr_hbaD_get_config(acb);
3460 case ACB_ADAPTER_TYPE_E:
3461 rtn = arcmsr_hbaE_get_config(acb);
3463 case ACB_ADAPTER_TYPE_F:
3464 rtn = arcmsr_hbaF_get_config(acb);
3469 acb->maxOutstanding = acb->firm_numbers_queue - 1;
3470 if (acb->host->can_queue >= acb->firm_numbers_queue)
3471 acb->host->can_queue = acb->maxOutstanding;
3473 acb->maxOutstanding = acb->host->can_queue;
3474 acb->maxFreeCCB = acb->host->can_queue;
3475 if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3476 acb->maxFreeCCB += 64;
3480 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3481 struct CommandControlBlock *poll_ccb)
3483 struct MessageUnit_A __iomem *reg = acb->pmuA;
3484 struct CommandControlBlock *ccb;
3485 struct ARCMSR_CDB *arcmsr_cdb;
3486 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3489 unsigned long ccb_cdb_phy;
3491 polling_hba_ccb_retry:
3493 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable;
3494 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/
3496 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) {
3502 if (poll_count > 100){
3506 goto polling_hba_ccb_retry;
3509 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3510 if (acb->cdb_phyadd_hipart)
3511 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3512 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3513 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3514 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3515 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3516 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3517 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3518 " poll command abort successfully \n"
3519 , acb->host->host_no
3520 , ccb->pcmd->device->id
3521 , (u32)ccb->pcmd->device->lun
3523 ccb->pcmd->result = DID_ABORT << 16;
3524 arcmsr_ccb_complete(ccb);
3527 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3528 " command done ccb = '0x%p'"
3529 "ccboutstandingcount = %d \n"
3530 , acb->host->host_no
3532 , atomic_read(&acb->ccboutstandingcount));
3535 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3536 arcmsr_report_ccb_state(acb, ccb, error);
3541 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3542 struct CommandControlBlock *poll_ccb)
3544 struct MessageUnit_B *reg = acb->pmuB;
3545 struct ARCMSR_CDB *arcmsr_cdb;
3546 struct CommandControlBlock *ccb;
3547 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3550 unsigned long ccb_cdb_phy;
3552 polling_hbb_ccb_retry:
3554 /* clear doorbell interrupt */
3555 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3557 index = reg->doneq_index;
3558 flag_ccb = reg->done_qbuffer[index];
3559 if (flag_ccb == 0) {
3565 if (poll_count > 100){
3569 goto polling_hbb_ccb_retry;
3572 reg->done_qbuffer[index] = 0;
3574 /*if last index number set it to 0 */
3575 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3576 reg->doneq_index = index;
3577 /* check if command done with no error*/
3578 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3579 if (acb->cdb_phyadd_hipart)
3580 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3581 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3582 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3583 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3584 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3585 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3586 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3587 " poll command abort successfully \n"
3589 ,ccb->pcmd->device->id
3590 ,(u32)ccb->pcmd->device->lun
3592 ccb->pcmd->result = DID_ABORT << 16;
3593 arcmsr_ccb_complete(ccb);
3596 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3597 " command done ccb = '0x%p'"
3598 "ccboutstandingcount = %d \n"
3599 , acb->host->host_no
3601 , atomic_read(&acb->ccboutstandingcount));
3604 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3605 arcmsr_report_ccb_state(acb, ccb, error);
3610 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3611 struct CommandControlBlock *poll_ccb)
3613 struct MessageUnit_C __iomem *reg = acb->pmuC;
3615 struct ARCMSR_CDB *arcmsr_cdb;
3617 struct CommandControlBlock *pCCB;
3618 uint32_t poll_ccb_done = 0, poll_count = 0;
3620 unsigned long ccb_cdb_phy;
3622 polling_hbc_ccb_retry:
3625 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3626 if (poll_ccb_done) {
3631 if (poll_count > 100) {
3635 goto polling_hbc_ccb_retry;
3638 flag_ccb = readl(®->outbound_queueport_low);
3639 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3640 if (acb->cdb_phyadd_hipart)
3641 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3642 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3643 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3644 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3645 /* check ifcommand done with no error*/
3646 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3647 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3648 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3649 " poll command abort successfully \n"
3650 , acb->host->host_no
3651 , pCCB->pcmd->device->id
3652 , (u32)pCCB->pcmd->device->lun
3654 pCCB->pcmd->result = DID_ABORT << 16;
3655 arcmsr_ccb_complete(pCCB);
3658 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3659 " command done ccb = '0x%p'"
3660 "ccboutstandingcount = %d \n"
3661 , acb->host->host_no
3663 , atomic_read(&acb->ccboutstandingcount));
3666 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3667 arcmsr_report_ccb_state(acb, pCCB, error);
3672 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3673 struct CommandControlBlock *poll_ccb)
3676 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb;
3677 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3678 unsigned long flags, ccb_cdb_phy;
3679 struct ARCMSR_CDB *arcmsr_cdb;
3680 struct CommandControlBlock *pCCB;
3681 struct MessageUnit_D *pmu = acb->pmuD;
3683 polling_hbaD_ccb_retry:
3686 spin_lock_irqsave(&acb->doneq_lock, flags);
3687 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3688 doneq_index = pmu->doneq_index;
3689 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3690 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3691 if (poll_ccb_done) {
3696 if (poll_count > 40) {
3700 goto polling_hbaD_ccb_retry;
3703 toggle = doneq_index & 0x4000;
3704 index_stripped = (doneq_index & 0xFFF) + 1;
3705 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3706 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3707 ((toggle ^ 0x4000) + 1);
3708 doneq_index = pmu->doneq_index;
3709 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3710 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3711 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3712 if (acb->cdb_phyadd_hipart)
3713 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3714 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3716 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3718 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3719 if ((pCCB->acb != acb) ||
3720 (pCCB->startdone != ARCMSR_CCB_START)) {
3721 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3722 pr_notice("arcmsr%d: scsi id = %d "
3723 "lun = %d ccb = '0x%p' poll command "
3724 "abort successfully\n"
3725 , acb->host->host_no
3726 , pCCB->pcmd->device->id
3727 , (u32)pCCB->pcmd->device->lun
3729 pCCB->pcmd->result = DID_ABORT << 16;
3730 arcmsr_ccb_complete(pCCB);
3733 pr_notice("arcmsr%d: polling an illegal "
3734 "ccb command done ccb = '0x%p' "
3735 "ccboutstandingcount = %d\n"
3736 , acb->host->host_no
3738 , atomic_read(&acb->ccboutstandingcount));
3741 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3743 arcmsr_report_ccb_state(acb, pCCB, error);
3748 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3749 struct CommandControlBlock *poll_ccb)
3752 uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3754 unsigned long flags;
3756 struct CommandControlBlock *pCCB;
3757 struct MessageUnit_E __iomem *reg = acb->pmuE;
3759 polling_hbaC_ccb_retry:
3762 spin_lock_irqsave(&acb->doneq_lock, flags);
3763 doneq_index = acb->doneq_index;
3764 if ((readl(®->reply_post_producer_index) & 0xFFFF) ==
3766 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3767 if (poll_ccb_done) {
3772 if (poll_count > 40) {
3776 goto polling_hbaC_ccb_retry;
3779 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3781 if (doneq_index >= acb->completionQ_entry)
3783 acb->doneq_index = doneq_index;
3784 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3785 pCCB = acb->pccb_pool[cmdSMID];
3786 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3787 /* check if command done with no error*/
3788 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3789 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3790 pr_notice("arcmsr%d: scsi id = %d "
3791 "lun = %d ccb = '0x%p' poll command "
3792 "abort successfully\n"
3793 , acb->host->host_no
3794 , pCCB->pcmd->device->id
3795 , (u32)pCCB->pcmd->device->lun
3797 pCCB->pcmd->result = DID_ABORT << 16;
3798 arcmsr_ccb_complete(pCCB);
3801 pr_notice("arcmsr%d: polling an illegal "
3802 "ccb command done ccb = '0x%p' "
3803 "ccboutstandingcount = %d\n"
3804 , acb->host->host_no
3806 , atomic_read(&acb->ccboutstandingcount));
3809 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3810 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3811 arcmsr_report_ccb_state(acb, pCCB, error);
3813 writel(doneq_index, ®->reply_post_consumer_index);
3817 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3818 struct CommandControlBlock *poll_ccb)
3821 switch (acb->adapter_type) {
3823 case ACB_ADAPTER_TYPE_A:
3824 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3826 case ACB_ADAPTER_TYPE_B:
3827 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3829 case ACB_ADAPTER_TYPE_C:
3830 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3832 case ACB_ADAPTER_TYPE_D:
3833 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3835 case ACB_ADAPTER_TYPE_E:
3836 case ACB_ADAPTER_TYPE_F:
3837 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3843 static void arcmsr_set_iop_datetime(struct timer_list *t)
3845 struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3846 unsigned int next_time;
3860 uint32_t msg_time[2];
3864 time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3866 datetime.a.signature = 0x55AA;
3867 datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3868 datetime.a.month = tm.tm_mon;
3869 datetime.a.date = tm.tm_mday;
3870 datetime.a.hour = tm.tm_hour;
3871 datetime.a.minute = tm.tm_min;
3872 datetime.a.second = tm.tm_sec;
3874 switch (pacb->adapter_type) {
3875 case ACB_ADAPTER_TYPE_A: {
3876 struct MessageUnit_A __iomem *reg = pacb->pmuA;
3877 writel(datetime.b.msg_time[0], ®->message_rwbuffer[0]);
3878 writel(datetime.b.msg_time[1], ®->message_rwbuffer[1]);
3879 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3882 case ACB_ADAPTER_TYPE_B: {
3883 uint32_t __iomem *rwbuffer;
3884 struct MessageUnit_B *reg = pacb->pmuB;
3885 rwbuffer = reg->message_rwbuffer;
3886 writel(datetime.b.msg_time[0], rwbuffer++);
3887 writel(datetime.b.msg_time[1], rwbuffer++);
3888 writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3891 case ACB_ADAPTER_TYPE_C: {
3892 struct MessageUnit_C __iomem *reg = pacb->pmuC;
3893 writel(datetime.b.msg_time[0], ®->msgcode_rwbuffer[0]);
3894 writel(datetime.b.msg_time[1], ®->msgcode_rwbuffer[1]);
3895 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3896 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
3899 case ACB_ADAPTER_TYPE_D: {
3900 uint32_t __iomem *rwbuffer;
3901 struct MessageUnit_D *reg = pacb->pmuD;
3902 rwbuffer = reg->msgcode_rwbuffer;
3903 writel(datetime.b.msg_time[0], rwbuffer++);
3904 writel(datetime.b.msg_time[1], rwbuffer++);
3905 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3908 case ACB_ADAPTER_TYPE_E: {
3909 struct MessageUnit_E __iomem *reg = pacb->pmuE;
3910 writel(datetime.b.msg_time[0], ®->msgcode_rwbuffer[0]);
3911 writel(datetime.b.msg_time[1], ®->msgcode_rwbuffer[1]);
3912 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3913 pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3914 writel(pacb->out_doorbell, ®->iobound_doorbell);
3917 case ACB_ADAPTER_TYPE_F: {
3918 struct MessageUnit_F __iomem *reg = pacb->pmuF;
3920 pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
3921 pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
3922 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3923 pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3924 writel(pacb->out_doorbell, ®->iobound_doorbell);
3928 if (sys_tz.tz_minuteswest)
3929 next_time = ARCMSR_HOURS;
3931 next_time = ARCMSR_MINUTES;
3932 mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3935 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3937 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3938 dma_addr_t dma_coherent_handle;
3941 ********************************************************************
3942 ** here we need to tell iop 331 our freeccb.HighPart
3943 ** if freeccb.HighPart is not zero
3944 ********************************************************************
3946 switch (acb->adapter_type) {
3947 case ACB_ADAPTER_TYPE_B:
3948 case ACB_ADAPTER_TYPE_D:
3949 dma_coherent_handle = acb->dma_coherent_handle2;
3951 case ACB_ADAPTER_TYPE_E:
3952 case ACB_ADAPTER_TYPE_F:
3953 dma_coherent_handle = acb->dma_coherent_handle +
3954 offsetof(struct CommandControlBlock, arcmsr_cdb);
3957 dma_coherent_handle = acb->dma_coherent_handle;
3960 cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3961 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3962 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3963 acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
3965 ***********************************************************************
3966 ** if adapter type B, set window of "post command Q"
3967 ***********************************************************************
3969 switch (acb->adapter_type) {
3971 case ACB_ADAPTER_TYPE_A: {
3972 if (cdb_phyaddr_hi32 != 0) {
3973 struct MessageUnit_A __iomem *reg = acb->pmuA;
3974 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3975 ®->message_rwbuffer[0]);
3976 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]);
3977 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3978 ®->inbound_msgaddr0);
3979 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3980 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3981 part physical address timeout\n",
3982 acb->host->host_no);
3989 case ACB_ADAPTER_TYPE_B: {
3990 uint32_t __iomem *rwbuffer;
3992 struct MessageUnit_B *reg = acb->pmuB;
3993 reg->postq_index = 0;
3994 reg->doneq_index = 0;
3995 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3996 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3997 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
3998 acb->host->host_no);
4001 rwbuffer = reg->message_rwbuffer;
4002 /* driver "set config" signature */
4003 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4004 /* normal should be zero */
4005 writel(cdb_phyaddr_hi32, rwbuffer++);
4006 /* postQ size (256 + 8)*4 */
4007 writel(cdb_phyaddr, rwbuffer++);
4008 /* doneQ size (256 + 8)*4 */
4009 writel(cdb_phyaddr + 1056, rwbuffer++);
4010 /* ccb maxQ size must be --> [(256 + 8)*4]*/
4011 writel(1056, rwbuffer);
4013 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
4014 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4015 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4016 timeout \n",acb->host->host_no);
4019 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
4020 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4021 pr_err("arcmsr%d: can't set driver mode.\n",
4022 acb->host->host_no);
4027 case ACB_ADAPTER_TYPE_C: {
4028 struct MessageUnit_C __iomem *reg = acb->pmuC;
4030 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
4031 acb->adapter_index, cdb_phyaddr_hi32);
4032 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]);
4033 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]);
4034 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
4035 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
4036 if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
4037 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4038 timeout \n", acb->host->host_no);
4043 case ACB_ADAPTER_TYPE_D: {
4044 uint32_t __iomem *rwbuffer;
4045 struct MessageUnit_D *reg = acb->pmuD;
4046 reg->postq_index = 0;
4047 reg->doneq_index = 0;
4048 rwbuffer = reg->msgcode_rwbuffer;
4049 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4050 writel(cdb_phyaddr_hi32, rwbuffer++);
4051 writel(cdb_phyaddr, rwbuffer++);
4052 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
4053 sizeof(struct InBound_SRB)), rwbuffer++);
4054 writel(0x100, rwbuffer);
4055 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
4056 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
4057 pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4058 acb->host->host_no);
4063 case ACB_ADAPTER_TYPE_E: {
4064 struct MessageUnit_E __iomem *reg = acb->pmuE;
4065 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]);
4066 writel(ARCMSR_SIGNATURE_1884, ®->msgcode_rwbuffer[1]);
4067 writel(cdb_phyaddr, ®->msgcode_rwbuffer[2]);
4068 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[3]);
4069 writel(acb->ccbsize, ®->msgcode_rwbuffer[4]);
4070 writel(lower_32_bits(acb->dma_coherent_handle2), ®->msgcode_rwbuffer[5]);
4071 writel(upper_32_bits(acb->dma_coherent_handle2), ®->msgcode_rwbuffer[6]);
4072 writel(acb->ioqueue_size, ®->msgcode_rwbuffer[7]);
4073 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
4074 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4075 writel(acb->out_doorbell, ®->iobound_doorbell);
4076 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4077 pr_notice("arcmsr%d: 'set command Q window' timeout \n",
4078 acb->host->host_no);
4083 case ACB_ADAPTER_TYPE_F: {
4084 struct MessageUnit_F __iomem *reg = acb->pmuF;
4086 acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
4087 acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
4088 acb->msgcode_rwbuffer[2] = cdb_phyaddr;
4089 acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
4090 acb->msgcode_rwbuffer[4] = acb->ccbsize;
4091 acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
4092 acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
4093 acb->msgcode_rwbuffer[7] = acb->completeQ_size;
4094 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
4095 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4096 writel(acb->out_doorbell, ®->iobound_doorbell);
4097 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4098 pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4099 acb->host->host_no);
4108 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
4110 uint32_t firmware_state = 0;
4111 switch (acb->adapter_type) {
4113 case ACB_ADAPTER_TYPE_A: {
4114 struct MessageUnit_A __iomem *reg = acb->pmuA;
4116 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4118 firmware_state = readl(®->outbound_msgaddr1);
4119 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
4123 case ACB_ADAPTER_TYPE_B: {
4124 struct MessageUnit_B *reg = acb->pmuB;
4126 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4128 firmware_state = readl(reg->iop2drv_doorbell);
4129 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
4130 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
4133 case ACB_ADAPTER_TYPE_C: {
4134 struct MessageUnit_C __iomem *reg = acb->pmuC;
4136 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4138 firmware_state = readl(®->outbound_msgaddr1);
4139 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
4142 case ACB_ADAPTER_TYPE_D: {
4143 struct MessageUnit_D *reg = acb->pmuD;
4145 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4147 firmware_state = readl(reg->outbound_msgaddr1);
4148 } while ((firmware_state &
4149 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
4152 case ACB_ADAPTER_TYPE_E:
4153 case ACB_ADAPTER_TYPE_F: {
4154 struct MessageUnit_E __iomem *reg = acb->pmuE;
4156 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4158 firmware_state = readl(®->outbound_msgaddr1);
4159 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
4165 static void arcmsr_request_device_map(struct timer_list *t)
4167 struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
4168 if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG | ACB_F_BUS_RESET | ACB_F_ABORT)) {
4169 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4171 acb->fw_flag = FW_NORMAL;
4172 switch (acb->adapter_type) {
4173 case ACB_ADAPTER_TYPE_A: {
4174 struct MessageUnit_A __iomem *reg = acb->pmuA;
4175 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4178 case ACB_ADAPTER_TYPE_B: {
4179 struct MessageUnit_B *reg = acb->pmuB;
4180 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
4183 case ACB_ADAPTER_TYPE_C: {
4184 struct MessageUnit_C __iomem *reg = acb->pmuC;
4185 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4186 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
4189 case ACB_ADAPTER_TYPE_D: {
4190 struct MessageUnit_D *reg = acb->pmuD;
4191 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
4194 case ACB_ADAPTER_TYPE_E: {
4195 struct MessageUnit_E __iomem *reg = acb->pmuE;
4196 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4197 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4198 writel(acb->out_doorbell, ®->iobound_doorbell);
4201 case ACB_ADAPTER_TYPE_F: {
4202 struct MessageUnit_F __iomem *reg = acb->pmuF;
4203 uint32_t outMsg1 = readl(®->outbound_msgaddr1);
4205 if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) ||
4206 (outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
4208 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4209 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4210 writel(acb->out_doorbell, ®->iobound_doorbell);
4216 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
4218 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4222 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
4224 struct MessageUnit_A __iomem *reg = acb->pmuA;
4225 acb->acb_flags |= ACB_F_MSG_START_BGRB;
4226 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0);
4227 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4228 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4229 rebuild' timeout \n", acb->host->host_no);
4233 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
4235 struct MessageUnit_B *reg = acb->pmuB;
4236 acb->acb_flags |= ACB_F_MSG_START_BGRB;
4237 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
4238 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4239 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4240 rebuild' timeout \n",acb->host->host_no);
4244 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
4246 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
4247 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4248 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
4249 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
4250 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
4251 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4252 rebuild' timeout \n", pACB->host->host_no);
4257 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
4259 struct MessageUnit_D *pmu = pACB->pmuD;
4261 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4262 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
4263 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
4264 pr_notice("arcmsr%d: wait 'start adapter "
4265 "background rebuild' timeout\n", pACB->host->host_no);
4269 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4271 struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4273 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4274 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4275 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4276 writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4277 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4278 pr_notice("arcmsr%d: wait 'start adapter "
4279 "background rebuild' timeout \n", pACB->host->host_no);
4283 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4285 switch (acb->adapter_type) {
4286 case ACB_ADAPTER_TYPE_A:
4287 arcmsr_hbaA_start_bgrb(acb);
4289 case ACB_ADAPTER_TYPE_B:
4290 arcmsr_hbaB_start_bgrb(acb);
4292 case ACB_ADAPTER_TYPE_C:
4293 arcmsr_hbaC_start_bgrb(acb);
4295 case ACB_ADAPTER_TYPE_D:
4296 arcmsr_hbaD_start_bgrb(acb);
4298 case ACB_ADAPTER_TYPE_E:
4299 case ACB_ADAPTER_TYPE_F:
4300 arcmsr_hbaE_start_bgrb(acb);
4305 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4307 switch (acb->adapter_type) {
4308 case ACB_ADAPTER_TYPE_A: {
4309 struct MessageUnit_A __iomem *reg = acb->pmuA;
4310 uint32_t outbound_doorbell;
4311 /* empty doorbell Qbuffer if door bell ringed */
4312 outbound_doorbell = readl(®->outbound_doorbell);
4313 /*clear doorbell interrupt */
4314 writel(outbound_doorbell, ®->outbound_doorbell);
4315 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
4319 case ACB_ADAPTER_TYPE_B: {
4320 struct MessageUnit_B *reg = acb->pmuB;
4321 uint32_t outbound_doorbell, i;
4322 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4323 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4324 /* let IOP know data has been read */
4325 for(i=0; i < 200; i++) {
4327 outbound_doorbell = readl(reg->iop2drv_doorbell);
4328 if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4329 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4330 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4336 case ACB_ADAPTER_TYPE_C: {
4337 struct MessageUnit_C __iomem *reg = acb->pmuC;
4338 uint32_t outbound_doorbell, i;
4339 /* empty doorbell Qbuffer if door bell ringed */
4340 outbound_doorbell = readl(®->outbound_doorbell);
4341 writel(outbound_doorbell, ®->outbound_doorbell_clear);
4342 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
4343 for (i = 0; i < 200; i++) {
4345 outbound_doorbell = readl(®->outbound_doorbell);
4346 if (outbound_doorbell &
4347 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4348 writel(outbound_doorbell,
4349 ®->outbound_doorbell_clear);
4350 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4351 ®->inbound_doorbell);
4357 case ACB_ADAPTER_TYPE_D: {
4358 struct MessageUnit_D *reg = acb->pmuD;
4359 uint32_t outbound_doorbell, i;
4360 /* empty doorbell Qbuffer if door bell ringed */
4361 outbound_doorbell = readl(reg->outbound_doorbell);
4362 writel(outbound_doorbell, reg->outbound_doorbell);
4363 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4364 reg->inbound_doorbell);
4365 for (i = 0; i < 200; i++) {
4367 outbound_doorbell = readl(reg->outbound_doorbell);
4368 if (outbound_doorbell &
4369 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4370 writel(outbound_doorbell,
4371 reg->outbound_doorbell);
4372 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4373 reg->inbound_doorbell);
4379 case ACB_ADAPTER_TYPE_E:
4380 case ACB_ADAPTER_TYPE_F: {
4381 struct MessageUnit_E __iomem *reg = acb->pmuE;
4384 acb->in_doorbell = readl(®->iobound_doorbell);
4385 writel(0, ®->host_int_status); /*clear interrupt*/
4386 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4387 writel(acb->out_doorbell, ®->iobound_doorbell);
4388 for(i=0; i < 200; i++) {
4390 tmp = acb->in_doorbell;
4391 acb->in_doorbell = readl(®->iobound_doorbell);
4392 if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4393 writel(0, ®->host_int_status); /*clear interrupt*/
4394 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4395 writel(acb->out_doorbell, ®->iobound_doorbell);
4404 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4406 switch (acb->adapter_type) {
4407 case ACB_ADAPTER_TYPE_A:
4409 case ACB_ADAPTER_TYPE_B:
4411 struct MessageUnit_B *reg = acb->pmuB;
4412 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4413 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4414 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4419 case ACB_ADAPTER_TYPE_C:
4425 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4429 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4430 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4431 struct MessageUnit_D *pmuD = acb->pmuD;
4433 /* backup pci config data */
4434 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4435 for (i = 0; i < 64; i++) {
4436 pci_read_config_byte(acb->pdev, i, &value[i]);
4438 /* hardware reset signal */
4439 if (acb->dev_id == 0x1680) {
4440 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4441 } else if (acb->dev_id == 0x1880) {
4444 writel(0xF, &pmuC->write_sequence);
4445 writel(0x4, &pmuC->write_sequence);
4446 writel(0xB, &pmuC->write_sequence);
4447 writel(0x2, &pmuC->write_sequence);
4448 writel(0x7, &pmuC->write_sequence);
4449 writel(0xD, &pmuC->write_sequence);
4450 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4451 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4452 } else if (acb->dev_id == 0x1884) {
4453 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4456 writel(0x4, &pmuE->write_sequence_3xxx);
4457 writel(0xB, &pmuE->write_sequence_3xxx);
4458 writel(0x2, &pmuE->write_sequence_3xxx);
4459 writel(0x7, &pmuE->write_sequence_3xxx);
4460 writel(0xD, &pmuE->write_sequence_3xxx);
4462 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4463 ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4464 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4465 } else if (acb->dev_id == 0x1214) {
4466 writel(0x20, pmuD->reset_request);
4468 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4471 /* write back pci config data */
4472 for (i = 0; i < 64; i++) {
4473 pci_write_config_byte(acb->pdev, i, value[i]);
4479 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4483 switch(acb->adapter_type) {
4484 case ACB_ADAPTER_TYPE_A:{
4485 struct MessageUnit_A __iomem *reg = acb->pmuA;
4486 rtn = ((readl(®->outbound_msgaddr1) &
4487 ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4490 case ACB_ADAPTER_TYPE_B:{
4491 struct MessageUnit_B *reg = acb->pmuB;
4492 rtn = ((readl(reg->iop2drv_doorbell) &
4493 ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4496 case ACB_ADAPTER_TYPE_C:{
4497 struct MessageUnit_C __iomem *reg = acb->pmuC;
4498 rtn = (readl(®->host_diagnostic) & 0x04) ? true : false;
4501 case ACB_ADAPTER_TYPE_D:{
4502 struct MessageUnit_D *reg = acb->pmuD;
4503 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4507 case ACB_ADAPTER_TYPE_E:
4508 case ACB_ADAPTER_TYPE_F:{
4509 struct MessageUnit_E __iomem *reg = acb->pmuE;
4510 rtn = (readl(®->host_diagnostic_3xxx) &
4511 ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4518 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4520 uint32_t intmask_org;
4521 /* disable all outbound interrupt */
4522 intmask_org = arcmsr_disable_outbound_ints(acb);
4523 arcmsr_wait_firmware_ready(acb);
4524 arcmsr_iop_confirm(acb);
4525 /*start background rebuild*/
4526 arcmsr_start_adapter_bgrb(acb);
4527 /* empty doorbell Qbuffer if door bell ringed */
4528 arcmsr_clear_doorbell_queue_buffer(acb);
4529 arcmsr_enable_eoi_mode(acb);
4530 /* enable outbound Post Queue,outbound doorbell Interrupt */
4531 arcmsr_enable_outbound_ints(acb, intmask_org);
4532 acb->acb_flags |= ACB_F_IOP_INITED;
4535 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4537 struct CommandControlBlock *ccb;
4538 uint32_t intmask_org;
4539 uint8_t rtnval = 0x00;
4541 unsigned long flags;
4543 if (atomic_read(&acb->ccboutstandingcount) != 0) {
4544 /* disable all outbound interrupt */
4545 intmask_org = arcmsr_disable_outbound_ints(acb);
4546 /* talk to iop 331 outstanding command aborted */
4547 rtnval = arcmsr_abort_allcmd(acb);
4548 /* clear all outbound posted Q */
4549 arcmsr_done4abort_postqueue(acb);
4550 for (i = 0; i < acb->maxFreeCCB; i++) {
4551 ccb = acb->pccb_pool[i];
4552 if (ccb->startdone == ARCMSR_CCB_START) {
4553 scsi_dma_unmap(ccb->pcmd);
4554 ccb->startdone = ARCMSR_CCB_DONE;
4556 spin_lock_irqsave(&acb->ccblist_lock, flags);
4557 list_add_tail(&ccb->list, &acb->ccb_free_list);
4558 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4561 atomic_set(&acb->ccboutstandingcount, 0);
4562 /* enable all outbound interrupt */
4563 arcmsr_enable_outbound_ints(acb, intmask_org);
4569 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4571 struct AdapterControlBlock *acb;
4572 int retry_count = 0;
4574 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4575 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4577 pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4578 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4581 if (acb->acb_flags & ACB_F_BUS_RESET) {
4583 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4584 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4585 & ACB_F_BUS_RESET) == 0, 220 * HZ);
4589 acb->acb_flags |= ACB_F_BUS_RESET;
4590 if (!arcmsr_iop_reset(acb)) {
4591 arcmsr_hardware_reset(acb);
4592 acb->acb_flags &= ~ACB_F_IOP_INITED;
4594 ssleep(ARCMSR_SLEEPTIME);
4595 if (arcmsr_reset_in_progress(acb)) {
4596 if (retry_count > ARCMSR_RETRYCOUNT) {
4597 acb->fw_flag = FW_DEADLOCK;
4598 pr_notice("arcmsr%d: waiting for hw bus reset"
4599 " return, RETRY TERMINATED!!\n",
4600 acb->host->host_no);
4604 goto wait_reset_done;
4606 arcmsr_iop_init(acb);
4607 acb->fw_flag = FW_NORMAL;
4608 mod_timer(&acb->eternal_timer, jiffies +
4609 msecs_to_jiffies(6 * HZ));
4610 acb->acb_flags &= ~ACB_F_BUS_RESET;
4612 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4614 acb->acb_flags &= ~ACB_F_BUS_RESET;
4615 acb->fw_flag = FW_NORMAL;
4616 mod_timer(&acb->eternal_timer, jiffies +
4617 msecs_to_jiffies(6 * HZ));
4623 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4624 struct CommandControlBlock *ccb)
4627 rtn = arcmsr_polling_ccbdone(acb, ccb);
4631 static int arcmsr_abort(struct scsi_cmnd *cmd)
4633 struct AdapterControlBlock *acb =
4634 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4637 uint32_t intmask_org;
4639 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4642 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4643 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4644 acb->acb_flags |= ACB_F_ABORT;
4647 ************************************************
4648 ** the all interrupt service routine is locked
4649 ** we need to handle it as soon as possible and exit
4650 ************************************************
4652 if (!atomic_read(&acb->ccboutstandingcount)) {
4653 acb->acb_flags &= ~ACB_F_ABORT;
4657 intmask_org = arcmsr_disable_outbound_ints(acb);
4658 for (i = 0; i < acb->maxFreeCCB; i++) {
4659 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4660 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4661 ccb->startdone = ARCMSR_CCB_ABORTED;
4662 rtn = arcmsr_abort_one_cmd(acb, ccb);
4666 acb->acb_flags &= ~ACB_F_ABORT;
4667 arcmsr_enable_outbound_ints(acb, intmask_org);
4671 static const char *arcmsr_info(struct Scsi_Host *host)
4673 struct AdapterControlBlock *acb =
4674 (struct AdapterControlBlock *) host->hostdata;
4675 static char buf[256];
4678 switch (acb->pdev->device) {
4679 case PCI_DEVICE_ID_ARECA_1110:
4680 case PCI_DEVICE_ID_ARECA_1200:
4681 case PCI_DEVICE_ID_ARECA_1202:
4682 case PCI_DEVICE_ID_ARECA_1210:
4685 case PCI_DEVICE_ID_ARECA_1120:
4686 case PCI_DEVICE_ID_ARECA_1130:
4687 case PCI_DEVICE_ID_ARECA_1160:
4688 case PCI_DEVICE_ID_ARECA_1170:
4689 case PCI_DEVICE_ID_ARECA_1201:
4690 case PCI_DEVICE_ID_ARECA_1203:
4691 case PCI_DEVICE_ID_ARECA_1220:
4692 case PCI_DEVICE_ID_ARECA_1230:
4693 case PCI_DEVICE_ID_ARECA_1260:
4694 case PCI_DEVICE_ID_ARECA_1270:
4695 case PCI_DEVICE_ID_ARECA_1280:
4698 case PCI_DEVICE_ID_ARECA_1214:
4699 case PCI_DEVICE_ID_ARECA_1380:
4700 case PCI_DEVICE_ID_ARECA_1381:
4701 case PCI_DEVICE_ID_ARECA_1680:
4702 case PCI_DEVICE_ID_ARECA_1681:
4703 case PCI_DEVICE_ID_ARECA_1880:
4704 case PCI_DEVICE_ID_ARECA_1884:
4707 case PCI_DEVICE_ID_ARECA_1886:
4708 type = "NVMe/SAS/SATA";
4715 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4716 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);