2 *******************************************************************************
4 ** FILE NAME : arcmsr_hba.c
5 ** BY : Nick Cheng, C.L. Huang
6 ** Description: SCSI RAID Device Driver for Areca RAID Controller
7 *******************************************************************************
8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
10 ** Web site: www.areca.com.tw
11 ** E-mail: support@areca.com.tw
13 ** This program is free software; you can redistribute it and/or modify
14 ** it under the terms of the GNU General Public License version 2 as
15 ** published by the Free Software Foundation.
16 ** This program is distributed in the hope that it will be useful,
17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ** GNU General Public License for more details.
20 *******************************************************************************
21 ** Redistribution and use in source and binary forms, with or without
22 ** modification, are permitted provided that the following conditions
24 ** 1. Redistributions of source code must retain the above copyright
25 ** notice, this list of conditions and the following disclaimer.
26 ** 2. Redistributions in binary form must reproduce the above copyright
27 ** notice, this list of conditions and the following disclaimer in the
28 ** documentation and/or other materials provided with the distribution.
29 ** 3. The name of the author may not be used to endorse or promote products
30 ** derived from this software without specific prior written permission.
32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 *******************************************************************************
43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
44 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.rst
45 *******************************************************************************
47 #include <linux/module.h>
48 #include <linux/reboot.h>
49 #include <linux/spinlock.h>
50 #include <linux/pci_ids.h>
51 #include <linux/interrupt.h>
52 #include <linux/moduleparam.h>
53 #include <linux/errno.h>
54 #include <linux/types.h>
55 #include <linux/delay.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/timer.h>
58 #include <linux/slab.h>
59 #include <linux/pci.h>
60 #include <linux/aer.h>
61 #include <linux/circ_buf.h>
64 #include <linux/uaccess.h>
65 #include <scsi/scsi_host.h>
66 #include <scsi/scsi.h>
67 #include <scsi/scsi_cmnd.h>
68 #include <scsi/scsi_tcq.h>
69 #include <scsi/scsi_device.h>
70 #include <scsi/scsi_transport.h>
71 #include <scsi/scsicam.h>
73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
75 MODULE_LICENSE("Dual BSD/GPL");
76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
78 static int msix_enable = 1;
79 module_param(msix_enable, int, S_IRUGO);
80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
82 static int msi_enable = 1;
83 module_param(msi_enable, int, S_IRUGO);
84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
87 module_param(host_can_queue, int, S_IRUGO);
88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
91 module_param(cmd_per_lun, int, S_IRUGO);
92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
94 static int dma_mask_64 = 0;
95 module_param(dma_mask_64, int, S_IRUGO);
96 MODULE_PARM_DESC(dma_mask_64, " set DMA mask to 64 bits(0 ~ 1), dma_mask_64=1(64 bits), =0(32 bits)");
98 static int set_date_time = 0;
99 module_param(set_date_time, int, S_IRUGO);
100 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
102 static int cmd_timeout = ARCMSR_DEFAULT_TIMEOUT;
103 module_param(cmd_timeout, int, S_IRUGO);
104 MODULE_PARM_DESC(cmd_timeout, " scsi cmd timeout(0 ~ 120 sec.), default is 90");
106 #define ARCMSR_SLEEPTIME 10
107 #define ARCMSR_RETRYCOUNT 12
109 static wait_queue_head_t wait_q;
110 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
111 struct scsi_cmnd *cmd);
112 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
113 static int arcmsr_abort(struct scsi_cmnd *);
114 static int arcmsr_bus_reset(struct scsi_cmnd *);
115 static int arcmsr_bios_param(struct scsi_device *sdev,
116 struct block_device *bdev, sector_t capacity, int *info);
117 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
118 static int arcmsr_probe(struct pci_dev *pdev,
119 const struct pci_device_id *id);
120 static int __maybe_unused arcmsr_suspend(struct device *dev);
121 static int __maybe_unused arcmsr_resume(struct device *dev);
122 static void arcmsr_remove(struct pci_dev *pdev);
123 static void arcmsr_shutdown(struct pci_dev *pdev);
124 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
125 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
126 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
127 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
129 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
130 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
131 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
132 static void arcmsr_request_device_map(struct timer_list *t);
133 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
134 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
135 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
136 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
137 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
138 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
139 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
140 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
141 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
142 static const char *arcmsr_info(struct Scsi_Host *);
143 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
144 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
145 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
146 static void arcmsr_set_iop_datetime(struct timer_list *);
147 static int arcmsr_slave_config(struct scsi_device *sdev);
148 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
150 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
151 queue_depth = ARCMSR_MAX_CMD_PERLUN;
152 return scsi_change_queue_depth(sdev, queue_depth);
155 static struct scsi_host_template arcmsr_scsi_host_template = {
156 .module = THIS_MODULE,
157 .name = "Areca SAS/SATA RAID driver",
159 .queuecommand = arcmsr_queue_command,
160 .eh_abort_handler = arcmsr_abort,
161 .eh_bus_reset_handler = arcmsr_bus_reset,
162 .bios_param = arcmsr_bios_param,
163 .slave_configure = arcmsr_slave_config,
164 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
165 .can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD,
166 .this_id = ARCMSR_SCSI_INITIATOR_ID,
167 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
168 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
169 .cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN,
170 .shost_attrs = arcmsr_host_attrs,
174 static struct pci_device_id arcmsr_device_id_table[] = {
175 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
176 .driver_data = ACB_ADAPTER_TYPE_A},
177 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
178 .driver_data = ACB_ADAPTER_TYPE_A},
179 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
180 .driver_data = ACB_ADAPTER_TYPE_A},
181 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
182 .driver_data = ACB_ADAPTER_TYPE_A},
183 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
184 .driver_data = ACB_ADAPTER_TYPE_A},
185 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
186 .driver_data = ACB_ADAPTER_TYPE_B},
187 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
188 .driver_data = ACB_ADAPTER_TYPE_B},
189 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
190 .driver_data = ACB_ADAPTER_TYPE_B},
191 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
192 .driver_data = ACB_ADAPTER_TYPE_B},
193 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
194 .driver_data = ACB_ADAPTER_TYPE_A},
195 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
196 .driver_data = ACB_ADAPTER_TYPE_D},
197 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
198 .driver_data = ACB_ADAPTER_TYPE_A},
199 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
200 .driver_data = ACB_ADAPTER_TYPE_A},
201 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
202 .driver_data = ACB_ADAPTER_TYPE_A},
203 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
204 .driver_data = ACB_ADAPTER_TYPE_A},
205 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
206 .driver_data = ACB_ADAPTER_TYPE_A},
207 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
208 .driver_data = ACB_ADAPTER_TYPE_A},
209 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
210 .driver_data = ACB_ADAPTER_TYPE_A},
211 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
212 .driver_data = ACB_ADAPTER_TYPE_A},
213 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
214 .driver_data = ACB_ADAPTER_TYPE_A},
215 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
216 .driver_data = ACB_ADAPTER_TYPE_C},
217 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
218 .driver_data = ACB_ADAPTER_TYPE_E},
219 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
220 .driver_data = ACB_ADAPTER_TYPE_F},
221 {0, 0}, /* Terminating entry */
223 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
225 static SIMPLE_DEV_PM_OPS(arcmsr_pm_ops, arcmsr_suspend, arcmsr_resume);
227 static struct pci_driver arcmsr_pci_driver = {
229 .id_table = arcmsr_device_id_table,
230 .probe = arcmsr_probe,
231 .remove = arcmsr_remove,
232 .driver.pm = &arcmsr_pm_ops,
233 .shutdown = arcmsr_shutdown,
236 ****************************************************************************
237 ****************************************************************************
240 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
242 switch (acb->adapter_type) {
243 case ACB_ADAPTER_TYPE_B:
244 case ACB_ADAPTER_TYPE_D:
245 case ACB_ADAPTER_TYPE_E:
246 case ACB_ADAPTER_TYPE_F:
247 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
248 acb->dma_coherent2, acb->dma_coherent_handle2);
253 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
255 struct pci_dev *pdev = acb->pdev;
256 switch (acb->adapter_type){
257 case ACB_ADAPTER_TYPE_A:{
258 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
260 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
265 case ACB_ADAPTER_TYPE_B:{
266 void __iomem *mem_base0, *mem_base1;
267 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
269 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
272 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
275 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
278 acb->mem_base0 = mem_base0;
279 acb->mem_base1 = mem_base1;
282 case ACB_ADAPTER_TYPE_C:{
283 acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
285 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
288 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
289 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
294 case ACB_ADAPTER_TYPE_D: {
295 void __iomem *mem_base0;
296 unsigned long addr, range;
298 addr = (unsigned long)pci_resource_start(pdev, 0);
299 range = pci_resource_len(pdev, 0);
300 mem_base0 = ioremap(addr, range);
302 pr_notice("arcmsr%d: memory mapping region fail\n",
306 acb->mem_base0 = mem_base0;
309 case ACB_ADAPTER_TYPE_E: {
310 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
311 pci_resource_len(pdev, 1));
313 pr_notice("arcmsr%d: memory mapping region fail \n",
317 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
318 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell); /* synchronize doorbell to 0 */
319 acb->in_doorbell = 0;
320 acb->out_doorbell = 0;
323 case ACB_ADAPTER_TYPE_F: {
324 acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
326 pr_notice("arcmsr%d: memory mapping region fail\n",
330 writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
331 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
332 acb->in_doorbell = 0;
333 acb->out_doorbell = 0;
340 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
342 switch (acb->adapter_type) {
343 case ACB_ADAPTER_TYPE_A:
346 case ACB_ADAPTER_TYPE_B:
347 iounmap(acb->mem_base0);
348 iounmap(acb->mem_base1);
350 case ACB_ADAPTER_TYPE_C:
353 case ACB_ADAPTER_TYPE_D:
354 iounmap(acb->mem_base0);
356 case ACB_ADAPTER_TYPE_E:
359 case ACB_ADAPTER_TYPE_F:
365 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
367 irqreturn_t handle_state;
368 struct AdapterControlBlock *acb = dev_id;
370 handle_state = arcmsr_interrupt(acb);
374 static int arcmsr_bios_param(struct scsi_device *sdev,
375 struct block_device *bdev, sector_t capacity, int *geom)
377 int heads, sectors, cylinders, total_capacity;
379 if (scsi_partsize(bdev, capacity, geom))
382 total_capacity = capacity;
385 cylinders = total_capacity / (heads * sectors);
386 if (cylinders > 1024) {
389 cylinders = total_capacity / (heads * sectors);
397 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
399 struct MessageUnit_A __iomem *reg = acb->pmuA;
402 for (i = 0; i < 2000; i++) {
403 if (readl(®->outbound_intstatus) &
404 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
405 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
406 ®->outbound_intstatus);
410 } /* max 20 seconds */
415 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
417 struct MessageUnit_B *reg = acb->pmuB;
420 for (i = 0; i < 2000; i++) {
421 if (readl(reg->iop2drv_doorbell)
422 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
423 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
424 reg->iop2drv_doorbell);
425 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
426 reg->drv2iop_doorbell);
430 } /* max 20 seconds */
435 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
437 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
440 for (i = 0; i < 2000; i++) {
441 if (readl(&phbcmu->outbound_doorbell)
442 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
443 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
444 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
448 } /* max 20 seconds */
453 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
455 struct MessageUnit_D *reg = pACB->pmuD;
458 for (i = 0; i < 2000; i++) {
459 if (readl(reg->outbound_doorbell)
460 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
461 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
462 reg->outbound_doorbell);
466 } /* max 20 seconds */
470 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
473 uint32_t read_doorbell;
474 struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
476 for (i = 0; i < 2000; i++) {
477 read_doorbell = readl(&phbcmu->iobound_doorbell);
478 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
479 writel(0, &phbcmu->host_int_status); /*clear interrupt*/
480 pACB->in_doorbell = read_doorbell;
484 } /* max 20 seconds */
488 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
490 struct MessageUnit_A __iomem *reg = acb->pmuA;
491 int retry_count = 30;
492 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
494 if (arcmsr_hbaA_wait_msgint_ready(acb))
498 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
499 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
501 } while (retry_count != 0);
504 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
506 struct MessageUnit_B *reg = acb->pmuB;
507 int retry_count = 30;
508 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
510 if (arcmsr_hbaB_wait_msgint_ready(acb))
514 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
515 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
517 } while (retry_count != 0);
520 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
522 struct MessageUnit_C __iomem *reg = pACB->pmuC;
523 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
524 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
525 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
527 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
531 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
532 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
534 } while (retry_count != 0);
538 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
540 int retry_count = 15;
541 struct MessageUnit_D *reg = pACB->pmuD;
543 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
545 if (arcmsr_hbaD_wait_msgint_ready(pACB))
549 pr_notice("arcmsr%d: wait 'flush adapter "
550 "cache' timeout, retry count down = %d\n",
551 pACB->host->host_no, retry_count);
552 } while (retry_count != 0);
555 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
557 int retry_count = 30;
558 struct MessageUnit_E __iomem *reg = pACB->pmuE;
560 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
561 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
562 writel(pACB->out_doorbell, ®->iobound_doorbell);
564 if (arcmsr_hbaE_wait_msgint_ready(pACB))
567 pr_notice("arcmsr%d: wait 'flush adapter "
568 "cache' timeout, retry count down = %d\n",
569 pACB->host->host_no, retry_count);
570 } while (retry_count != 0);
573 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
575 switch (acb->adapter_type) {
577 case ACB_ADAPTER_TYPE_A:
578 arcmsr_hbaA_flush_cache(acb);
580 case ACB_ADAPTER_TYPE_B:
581 arcmsr_hbaB_flush_cache(acb);
583 case ACB_ADAPTER_TYPE_C:
584 arcmsr_hbaC_flush_cache(acb);
586 case ACB_ADAPTER_TYPE_D:
587 arcmsr_hbaD_flush_cache(acb);
589 case ACB_ADAPTER_TYPE_E:
590 case ACB_ADAPTER_TYPE_F:
591 arcmsr_hbaE_flush_cache(acb);
596 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
598 struct MessageUnit_B *reg = acb->pmuB;
600 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
601 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
602 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
603 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
604 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
606 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
607 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
608 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
609 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
611 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
612 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
613 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
616 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
618 struct MessageUnit_D *reg = acb->pmuD;
620 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
621 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
622 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
623 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
624 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
625 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
626 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
627 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
628 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
629 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
630 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
631 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
632 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
633 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
634 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
635 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
636 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
637 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
638 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
639 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
640 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
641 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
642 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
643 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
644 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
645 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
648 static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
650 dma_addr_t host_buffer_dma;
651 struct MessageUnit_F __iomem *pmuF;
653 memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
654 acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
655 acb->completeQ_size, 4);
656 acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
657 acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
658 memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
659 host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
661 /* host buffer low address, bit0:1 all buffer active */
662 writel(lower_32_bits(host_buffer_dma | 1), &pmuF->inbound_msgaddr0);
663 /* host buffer high address */
664 writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
665 /* set host buffer physical address */
666 writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
669 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
673 dma_addr_t dma_coherent_handle;
674 struct pci_dev *pdev = acb->pdev;
676 switch (acb->adapter_type) {
677 case ACB_ADAPTER_TYPE_B: {
678 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
679 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
680 &dma_coherent_handle, GFP_KERNEL);
682 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
685 acb->dma_coherent_handle2 = dma_coherent_handle;
686 acb->dma_coherent2 = dma_coherent;
687 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
688 arcmsr_hbaB_assign_regAddr(acb);
691 case ACB_ADAPTER_TYPE_D: {
692 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
693 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
694 &dma_coherent_handle, GFP_KERNEL);
696 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
699 acb->dma_coherent_handle2 = dma_coherent_handle;
700 acb->dma_coherent2 = dma_coherent;
701 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
702 arcmsr_hbaD_assign_regAddr(acb);
705 case ACB_ADAPTER_TYPE_E: {
706 uint32_t completeQ_size;
707 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
708 acb->ioqueue_size = roundup(completeQ_size, 32);
709 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
710 &dma_coherent_handle, GFP_KERNEL);
712 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
715 acb->dma_coherent_handle2 = dma_coherent_handle;
716 acb->dma_coherent2 = dma_coherent;
717 acb->pCompletionQ = dma_coherent;
718 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
719 acb->doneq_index = 0;
722 case ACB_ADAPTER_TYPE_F: {
724 uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
726 arcmsr_wait_firmware_ready(acb);
727 QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
728 acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
729 acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
730 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
731 &dma_coherent_handle, GFP_KERNEL);
733 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
736 acb->dma_coherent_handle2 = dma_coherent_handle;
737 acb->dma_coherent2 = dma_coherent;
738 acb->pCompletionQ = dma_coherent;
739 acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
740 acb->doneq_index = 0;
741 arcmsr_hbaF_assign_regAddr(acb);
750 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
752 struct pci_dev *pdev = acb->pdev;
754 dma_addr_t dma_coherent_handle;
755 struct CommandControlBlock *ccb_tmp;
757 unsigned long cdb_phyaddr, next_ccb_phy;
758 unsigned long roundup_ccbsize;
759 unsigned long max_xfer_len;
760 unsigned long max_sg_entrys;
761 uint32_t firm_config_version, curr_phy_upper32;
763 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
764 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
765 acb->devstate[i][j] = ARECA_RAID_GONE;
767 max_xfer_len = ARCMSR_MAX_XFER_LEN;
768 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
769 firm_config_version = acb->firm_cfg_version;
770 if((firm_config_version & 0xFF) >= 3){
771 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
772 max_sg_entrys = (max_xfer_len/4096);
774 acb->host->max_sectors = max_xfer_len/512;
775 acb->host->sg_tablesize = max_sg_entrys;
776 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
777 acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
778 if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
779 acb->uncache_size += acb->ioqueue_size;
780 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
782 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
785 acb->dma_coherent = dma_coherent;
786 acb->dma_coherent_handle = dma_coherent_handle;
787 memset(dma_coherent, 0, acb->uncache_size);
788 acb->ccbsize = roundup_ccbsize;
789 ccb_tmp = dma_coherent;
790 curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
791 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
792 for(i = 0; i < acb->maxFreeCCB; i++){
793 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
794 switch (acb->adapter_type) {
795 case ACB_ADAPTER_TYPE_A:
796 case ACB_ADAPTER_TYPE_B:
797 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
799 case ACB_ADAPTER_TYPE_C:
800 case ACB_ADAPTER_TYPE_D:
801 case ACB_ADAPTER_TYPE_E:
802 case ACB_ADAPTER_TYPE_F:
803 ccb_tmp->cdb_phyaddr = cdb_phyaddr;
806 acb->pccb_pool[i] = ccb_tmp;
808 ccb_tmp->smid = (u32)i << 16;
809 INIT_LIST_HEAD(&ccb_tmp->list);
810 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
811 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
813 acb->host->can_queue = i;
817 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
818 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
819 dma_coherent_handle = next_ccb_phy;
821 if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
822 acb->dma_coherent_handle2 = dma_coherent_handle;
823 acb->dma_coherent2 = ccb_tmp;
825 switch (acb->adapter_type) {
826 case ACB_ADAPTER_TYPE_B:
827 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
828 arcmsr_hbaB_assign_regAddr(acb);
830 case ACB_ADAPTER_TYPE_D:
831 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
832 arcmsr_hbaD_assign_regAddr(acb);
834 case ACB_ADAPTER_TYPE_E:
835 acb->pCompletionQ = acb->dma_coherent2;
836 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
837 acb->doneq_index = 0;
843 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
845 struct AdapterControlBlock *acb = container_of(work,
846 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
847 char *acb_dev_map = (char *)acb->device_map;
848 uint32_t __iomem *signature = NULL;
849 char __iomem *devicemap = NULL;
851 struct scsi_device *psdev;
854 switch (acb->adapter_type) {
855 case ACB_ADAPTER_TYPE_A: {
856 struct MessageUnit_A __iomem *reg = acb->pmuA;
858 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]);
859 devicemap = (char __iomem *)(®->message_rwbuffer[21]);
862 case ACB_ADAPTER_TYPE_B: {
863 struct MessageUnit_B *reg = acb->pmuB;
865 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]);
866 devicemap = (char __iomem *)(®->message_rwbuffer[21]);
869 case ACB_ADAPTER_TYPE_C: {
870 struct MessageUnit_C __iomem *reg = acb->pmuC;
872 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
873 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
876 case ACB_ADAPTER_TYPE_D: {
877 struct MessageUnit_D *reg = acb->pmuD;
879 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
880 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
883 case ACB_ADAPTER_TYPE_E: {
884 struct MessageUnit_E __iomem *reg = acb->pmuE;
886 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
887 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
890 case ACB_ADAPTER_TYPE_F: {
891 signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
892 devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
896 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
898 for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
900 temp = readb(devicemap);
901 diff = (*acb_dev_map) ^ temp;
904 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
906 if ((diff & 0x01) == 1 &&
907 (temp & 0x01) == 1) {
908 scsi_add_device(acb->host,
910 } else if ((diff & 0x01) == 1
911 && (temp & 0x01) == 0) {
912 psdev = scsi_device_lookup(acb->host,
915 scsi_remove_device(psdev);
916 scsi_device_put(psdev);
926 acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
930 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
935 if (msix_enable == 0)
937 nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
940 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
944 if (msi_enable == 1) {
945 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
947 dev_info(&pdev->dev, "msi enabled\n");
951 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
958 acb->vector_count = nvec;
959 for (i = 0; i < nvec; i++) {
960 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
961 flags, "arcmsr", acb)) {
962 pr_warn("arcmsr%d: request_irq =%d failed!\n",
963 acb->host->host_no, pci_irq_vector(pdev, i));
971 free_irq(pci_irq_vector(pdev, i), acb);
972 pci_free_irq_vectors(pdev);
976 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
978 INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
979 pacb->fw_flag = FW_NORMAL;
980 timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
981 pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
982 add_timer(&pacb->eternal_timer);
985 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
987 timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
988 pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
989 add_timer(&pacb->refresh_timer);
992 static int arcmsr_set_dma_mask(struct AdapterControlBlock *acb)
994 struct pci_dev *pcidev = acb->pdev;
997 if (((acb->adapter_type == ACB_ADAPTER_TYPE_A) && !dma_mask_64) ||
998 dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64)))
1000 if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
1001 dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64))) {
1002 printk("arcmsr: set DMA 64 mask failed\n");
1007 if (dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1008 dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1009 dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32))) {
1010 printk("arcmsr: set DMA 32-bit mask failed\n");
1017 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1019 struct Scsi_Host *host;
1020 struct AdapterControlBlock *acb;
1021 uint8_t bus,dev_fun;
1023 error = pci_enable_device(pdev);
1027 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
1029 goto pci_disable_dev;
1031 init_waitqueue_head(&wait_q);
1032 bus = pdev->bus->number;
1033 dev_fun = pdev->devfn;
1034 acb = (struct AdapterControlBlock *) host->hostdata;
1035 memset(acb,0,sizeof(struct AdapterControlBlock));
1037 acb->adapter_type = id->driver_data;
1038 if (arcmsr_set_dma_mask(acb))
1039 goto scsi_host_release;
1041 host->max_lun = ARCMSR_MAX_TARGETLUN;
1042 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
1043 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
1044 if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
1045 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
1046 host->can_queue = host_can_queue; /* max simultaneous cmds */
1047 if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
1048 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
1049 host->cmd_per_lun = cmd_per_lun;
1050 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
1051 host->unique_id = (bus << 8) | dev_fun;
1052 pci_set_drvdata(pdev, host);
1053 pci_set_master(pdev);
1054 error = pci_request_regions(pdev, "arcmsr");
1056 goto scsi_host_release;
1058 spin_lock_init(&acb->eh_lock);
1059 spin_lock_init(&acb->ccblist_lock);
1060 spin_lock_init(&acb->postq_lock);
1061 spin_lock_init(&acb->doneq_lock);
1062 spin_lock_init(&acb->rqbuffer_lock);
1063 spin_lock_init(&acb->wqbuffer_lock);
1064 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1065 ACB_F_MESSAGE_RQBUFFER_CLEARED |
1066 ACB_F_MESSAGE_WQBUFFER_READED);
1067 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1068 INIT_LIST_HEAD(&acb->ccb_free_list);
1069 error = arcmsr_remap_pciregion(acb);
1071 goto pci_release_regs;
1073 error = arcmsr_alloc_io_queue(acb);
1075 goto unmap_pci_region;
1076 error = arcmsr_get_firmware_spec(acb);
1080 if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
1081 arcmsr_free_io_queue(acb);
1082 error = arcmsr_alloc_ccb_pool(acb);
1084 goto unmap_pci_region;
1086 error = scsi_add_host(host, &pdev->dev);
1090 if (arcmsr_request_irq(pdev, acb) == FAILED)
1091 goto scsi_host_remove;
1092 arcmsr_iop_init(acb);
1093 arcmsr_init_get_devmap_timer(acb);
1095 arcmsr_init_set_datetime_timer(acb);
1096 if(arcmsr_alloc_sysfs_attr(acb))
1097 goto out_free_sysfs;
1098 scsi_scan_host(host);
1102 del_timer_sync(&acb->refresh_timer);
1103 del_timer_sync(&acb->eternal_timer);
1104 flush_work(&acb->arcmsr_do_message_isr_bh);
1105 arcmsr_stop_adapter_bgrb(acb);
1106 arcmsr_flush_adapter_cache(acb);
1107 arcmsr_free_irq(pdev, acb);
1109 scsi_remove_host(host);
1111 arcmsr_free_ccb_pool(acb);
1112 goto unmap_pci_region;
1114 arcmsr_free_io_queue(acb);
1116 arcmsr_unmap_pciregion(acb);
1118 pci_release_regions(pdev);
1120 scsi_host_put(host);
1122 pci_disable_device(pdev);
1126 static void arcmsr_free_irq(struct pci_dev *pdev,
1127 struct AdapterControlBlock *acb)
1131 for (i = 0; i < acb->vector_count; i++)
1132 free_irq(pci_irq_vector(pdev, i), acb);
1133 pci_free_irq_vectors(pdev);
1136 static int __maybe_unused arcmsr_suspend(struct device *dev)
1138 struct pci_dev *pdev = to_pci_dev(dev);
1139 struct Scsi_Host *host = pci_get_drvdata(pdev);
1140 struct AdapterControlBlock *acb =
1141 (struct AdapterControlBlock *)host->hostdata;
1143 arcmsr_disable_outbound_ints(acb);
1144 arcmsr_free_irq(pdev, acb);
1145 del_timer_sync(&acb->eternal_timer);
1147 del_timer_sync(&acb->refresh_timer);
1148 flush_work(&acb->arcmsr_do_message_isr_bh);
1149 arcmsr_stop_adapter_bgrb(acb);
1150 arcmsr_flush_adapter_cache(acb);
1154 static int __maybe_unused arcmsr_resume(struct device *dev)
1156 struct pci_dev *pdev = to_pci_dev(dev);
1157 struct Scsi_Host *host = pci_get_drvdata(pdev);
1158 struct AdapterControlBlock *acb =
1159 (struct AdapterControlBlock *)host->hostdata;
1161 if (arcmsr_set_dma_mask(acb))
1162 goto controller_unregister;
1163 if (arcmsr_request_irq(pdev, acb) == FAILED)
1164 goto controller_stop;
1165 switch (acb->adapter_type) {
1166 case ACB_ADAPTER_TYPE_B: {
1167 struct MessageUnit_B *reg = acb->pmuB;
1169 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1170 reg->post_qbuffer[i] = 0;
1171 reg->done_qbuffer[i] = 0;
1173 reg->postq_index = 0;
1174 reg->doneq_index = 0;
1177 case ACB_ADAPTER_TYPE_E:
1178 writel(0, &acb->pmuE->host_int_status);
1179 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1180 acb->in_doorbell = 0;
1181 acb->out_doorbell = 0;
1182 acb->doneq_index = 0;
1184 case ACB_ADAPTER_TYPE_F:
1185 writel(0, &acb->pmuF->host_int_status);
1186 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
1187 acb->in_doorbell = 0;
1188 acb->out_doorbell = 0;
1189 acb->doneq_index = 0;
1190 arcmsr_hbaF_assign_regAddr(acb);
1193 arcmsr_iop_init(acb);
1194 arcmsr_init_get_devmap_timer(acb);
1196 arcmsr_init_set_datetime_timer(acb);
1199 arcmsr_stop_adapter_bgrb(acb);
1200 arcmsr_flush_adapter_cache(acb);
1201 controller_unregister:
1202 scsi_remove_host(host);
1203 arcmsr_free_ccb_pool(acb);
1204 if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1205 arcmsr_free_io_queue(acb);
1206 arcmsr_unmap_pciregion(acb);
1207 scsi_host_put(host);
1211 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1213 struct MessageUnit_A __iomem *reg = acb->pmuA;
1214 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
1215 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1217 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1218 , acb->host->host_no);
1224 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1226 struct MessageUnit_B *reg = acb->pmuB;
1228 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1229 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1231 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1232 , acb->host->host_no);
1237 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1239 struct MessageUnit_C __iomem *reg = pACB->pmuC;
1240 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
1241 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
1242 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1244 "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1245 , pACB->host->host_no);
1251 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1253 struct MessageUnit_D *reg = pACB->pmuD;
1255 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1256 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1257 pr_notice("arcmsr%d: wait 'abort all outstanding "
1258 "command' timeout\n", pACB->host->host_no);
1264 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1266 struct MessageUnit_E __iomem *reg = pACB->pmuE;
1268 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
1269 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1270 writel(pACB->out_doorbell, ®->iobound_doorbell);
1271 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1272 pr_notice("arcmsr%d: wait 'abort all outstanding "
1273 "command' timeout\n", pACB->host->host_no);
1279 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1282 switch (acb->adapter_type) {
1283 case ACB_ADAPTER_TYPE_A:
1284 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1286 case ACB_ADAPTER_TYPE_B:
1287 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1289 case ACB_ADAPTER_TYPE_C:
1290 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1292 case ACB_ADAPTER_TYPE_D:
1293 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1295 case ACB_ADAPTER_TYPE_E:
1296 case ACB_ADAPTER_TYPE_F:
1297 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1303 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1305 struct scsi_cmnd *pcmd = ccb->pcmd;
1307 scsi_dma_unmap(pcmd);
1310 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1312 struct AdapterControlBlock *acb = ccb->acb;
1313 struct scsi_cmnd *pcmd = ccb->pcmd;
1314 unsigned long flags;
1315 atomic_dec(&acb->ccboutstandingcount);
1316 arcmsr_pci_unmap_dma(ccb);
1317 ccb->startdone = ARCMSR_CCB_DONE;
1318 spin_lock_irqsave(&acb->ccblist_lock, flags);
1319 list_add_tail(&ccb->list, &acb->ccb_free_list);
1320 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1321 pcmd->scsi_done(pcmd);
1324 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1326 struct scsi_cmnd *pcmd = ccb->pcmd;
1328 pcmd->result = (DID_OK << 16) | SAM_STAT_CHECK_CONDITION;
1329 if (pcmd->sense_buffer) {
1330 struct SENSE_DATA *sensebuffer;
1332 memcpy_and_pad(pcmd->sense_buffer,
1333 SCSI_SENSE_BUFFERSIZE,
1334 ccb->arcmsr_cdb.SenseData,
1335 sizeof(ccb->arcmsr_cdb.SenseData),
1338 sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1339 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1340 sensebuffer->Valid = 1;
1344 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1347 switch (acb->adapter_type) {
1348 case ACB_ADAPTER_TYPE_A : {
1349 struct MessageUnit_A __iomem *reg = acb->pmuA;
1350 orig_mask = readl(®->outbound_intmask);
1351 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1352 ®->outbound_intmask);
1355 case ACB_ADAPTER_TYPE_B : {
1356 struct MessageUnit_B *reg = acb->pmuB;
1357 orig_mask = readl(reg->iop2drv_doorbell_mask);
1358 writel(0, reg->iop2drv_doorbell_mask);
1361 case ACB_ADAPTER_TYPE_C:{
1362 struct MessageUnit_C __iomem *reg = acb->pmuC;
1363 /* disable all outbound interrupt */
1364 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */
1365 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
1368 case ACB_ADAPTER_TYPE_D: {
1369 struct MessageUnit_D *reg = acb->pmuD;
1370 /* disable all outbound interrupt */
1371 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1374 case ACB_ADAPTER_TYPE_E:
1375 case ACB_ADAPTER_TYPE_F: {
1376 struct MessageUnit_E __iomem *reg = acb->pmuE;
1377 orig_mask = readl(®->host_int_mask);
1378 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, ®->host_int_mask);
1379 readl(®->host_int_mask); /* Dummy readl to force pci flush */
1386 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1387 struct CommandControlBlock *ccb, bool error)
1390 id = ccb->pcmd->device->id;
1391 lun = ccb->pcmd->device->lun;
1393 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1394 acb->devstate[id][lun] = ARECA_RAID_GOOD;
1395 ccb->pcmd->result = DID_OK << 16;
1396 arcmsr_ccb_complete(ccb);
1398 switch (ccb->arcmsr_cdb.DeviceStatus) {
1399 case ARCMSR_DEV_SELECT_TIMEOUT: {
1400 acb->devstate[id][lun] = ARECA_RAID_GONE;
1401 ccb->pcmd->result = DID_NO_CONNECT << 16;
1402 arcmsr_ccb_complete(ccb);
1406 case ARCMSR_DEV_ABORTED:
1408 case ARCMSR_DEV_INIT_FAIL: {
1409 acb->devstate[id][lun] = ARECA_RAID_GONE;
1410 ccb->pcmd->result = DID_BAD_TARGET << 16;
1411 arcmsr_ccb_complete(ccb);
1415 case ARCMSR_DEV_CHECK_CONDITION: {
1416 acb->devstate[id][lun] = ARECA_RAID_GOOD;
1417 arcmsr_report_sense_info(ccb);
1418 arcmsr_ccb_complete(ccb);
1424 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1425 but got unknown DeviceStatus = 0x%x \n"
1426 , acb->host->host_no
1429 , ccb->arcmsr_cdb.DeviceStatus);
1430 acb->devstate[id][lun] = ARECA_RAID_GONE;
1431 ccb->pcmd->result = DID_NO_CONNECT << 16;
1432 arcmsr_ccb_complete(ccb);
1438 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1440 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1441 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1442 struct scsi_cmnd *abortcmd = pCCB->pcmd;
1444 abortcmd->result |= DID_ABORT << 16;
1445 arcmsr_ccb_complete(pCCB);
1446 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1447 acb->host->host_no, pCCB);
1451 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1453 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1454 " ccboutstandingcount = %d \n"
1455 , acb->host->host_no
1460 , atomic_read(&acb->ccboutstandingcount));
1463 arcmsr_report_ccb_state(acb, pCCB, error);
1466 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1470 struct ARCMSR_CDB *pARCMSR_CDB;
1472 struct CommandControlBlock *pCCB;
1473 unsigned long ccb_cdb_phy;
1475 switch (acb->adapter_type) {
1477 case ACB_ADAPTER_TYPE_A: {
1478 struct MessageUnit_A __iomem *reg = acb->pmuA;
1479 uint32_t outbound_intstatus;
1480 outbound_intstatus = readl(®->outbound_intstatus) &
1481 acb->outbound_int_enable;
1482 /*clear and abort all outbound posted Q*/
1483 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/
1484 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF)
1485 && (i++ < acb->maxOutstanding)) {
1486 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1487 if (acb->cdb_phyadd_hipart)
1488 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1489 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1490 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1491 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1492 arcmsr_drain_donequeue(acb, pCCB, error);
1497 case ACB_ADAPTER_TYPE_B: {
1498 struct MessageUnit_B *reg = acb->pmuB;
1499 /*clear all outbound posted Q*/
1500 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1501 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1502 flag_ccb = reg->done_qbuffer[i];
1503 if (flag_ccb != 0) {
1504 reg->done_qbuffer[i] = 0;
1505 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1506 if (acb->cdb_phyadd_hipart)
1507 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1508 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1509 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1510 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1511 arcmsr_drain_donequeue(acb, pCCB, error);
1513 reg->post_qbuffer[i] = 0;
1515 reg->doneq_index = 0;
1516 reg->postq_index = 0;
1519 case ACB_ADAPTER_TYPE_C: {
1520 struct MessageUnit_C __iomem *reg = acb->pmuC;
1521 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1523 flag_ccb = readl(®->outbound_queueport_low);
1524 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1525 if (acb->cdb_phyadd_hipart)
1526 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1527 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1528 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1529 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1530 arcmsr_drain_donequeue(acb, pCCB, error);
1534 case ACB_ADAPTER_TYPE_D: {
1535 struct MessageUnit_D *pmu = acb->pmuD;
1536 uint32_t outbound_write_pointer;
1537 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1538 unsigned long flags;
1540 residual = atomic_read(&acb->ccboutstandingcount);
1541 for (i = 0; i < residual; i++) {
1542 spin_lock_irqsave(&acb->doneq_lock, flags);
1543 outbound_write_pointer =
1544 pmu->done_qbuffer[0].addressLow + 1;
1545 doneq_index = pmu->doneq_index;
1546 if ((doneq_index & 0xFFF) !=
1547 (outbound_write_pointer & 0xFFF)) {
1548 toggle = doneq_index & 0x4000;
1549 index_stripped = (doneq_index & 0xFFF) + 1;
1550 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1551 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1552 ((toggle ^ 0x4000) + 1);
1553 doneq_index = pmu->doneq_index;
1554 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1555 addressLow = pmu->done_qbuffer[doneq_index &
1557 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1558 if (acb->cdb_phyadd_hipart)
1559 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1560 pARCMSR_CDB = (struct ARCMSR_CDB *)
1561 (acb->vir2phy_offset + ccb_cdb_phy);
1562 pCCB = container_of(pARCMSR_CDB,
1563 struct CommandControlBlock, arcmsr_cdb);
1564 error = (addressLow &
1565 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1567 arcmsr_drain_donequeue(acb, pCCB, error);
1569 pmu->outboundlist_read_pointer);
1571 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1575 pmu->postq_index = 0;
1576 pmu->doneq_index = 0x40FF;
1579 case ACB_ADAPTER_TYPE_E:
1580 arcmsr_hbaE_postqueue_isr(acb);
1582 case ACB_ADAPTER_TYPE_F:
1583 arcmsr_hbaF_postqueue_isr(acb);
1588 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1590 char *acb_dev_map = (char *)acb->device_map;
1592 struct scsi_device *psdev;
1593 struct CommandControlBlock *ccb;
1596 for (i = 0; i < acb->maxFreeCCB; i++) {
1597 ccb = acb->pccb_pool[i];
1598 if (ccb->startdone == ARCMSR_CCB_START) {
1599 ccb->pcmd->result = DID_NO_CONNECT << 16;
1600 arcmsr_pci_unmap_dma(ccb);
1601 ccb->pcmd->scsi_done(ccb->pcmd);
1604 for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1605 temp = *acb_dev_map;
1607 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1609 psdev = scsi_device_lookup(acb->host,
1611 if (psdev != NULL) {
1612 scsi_remove_device(psdev);
1613 scsi_device_put(psdev);
1624 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1626 struct pci_dev *pdev;
1627 struct Scsi_Host *host;
1630 arcmsr_free_sysfs_attr(acb);
1631 scsi_remove_host(host);
1632 flush_work(&acb->arcmsr_do_message_isr_bh);
1633 del_timer_sync(&acb->eternal_timer);
1635 del_timer_sync(&acb->refresh_timer);
1637 arcmsr_free_irq(pdev, acb);
1638 arcmsr_free_ccb_pool(acb);
1639 if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1640 arcmsr_free_io_queue(acb);
1641 arcmsr_unmap_pciregion(acb);
1642 pci_release_regions(pdev);
1643 scsi_host_put(host);
1644 pci_disable_device(pdev);
1647 static void arcmsr_remove(struct pci_dev *pdev)
1649 struct Scsi_Host *host = pci_get_drvdata(pdev);
1650 struct AdapterControlBlock *acb =
1651 (struct AdapterControlBlock *) host->hostdata;
1655 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1656 if (dev_id == 0xffff) {
1657 acb->acb_flags &= ~ACB_F_IOP_INITED;
1658 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1659 arcmsr_remove_scsi_devices(acb);
1660 arcmsr_free_pcidev(acb);
1663 arcmsr_free_sysfs_attr(acb);
1664 scsi_remove_host(host);
1665 flush_work(&acb->arcmsr_do_message_isr_bh);
1666 del_timer_sync(&acb->eternal_timer);
1668 del_timer_sync(&acb->refresh_timer);
1669 arcmsr_disable_outbound_ints(acb);
1670 arcmsr_stop_adapter_bgrb(acb);
1671 arcmsr_flush_adapter_cache(acb);
1672 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1673 acb->acb_flags &= ~ACB_F_IOP_INITED;
1675 for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1676 if (!atomic_read(&acb->ccboutstandingcount))
1678 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1682 if (atomic_read(&acb->ccboutstandingcount)) {
1685 arcmsr_abort_allcmd(acb);
1686 arcmsr_done4abort_postqueue(acb);
1687 for (i = 0; i < acb->maxFreeCCB; i++) {
1688 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1689 if (ccb->startdone == ARCMSR_CCB_START) {
1690 ccb->startdone = ARCMSR_CCB_ABORTED;
1691 ccb->pcmd->result = DID_ABORT << 16;
1692 arcmsr_ccb_complete(ccb);
1696 arcmsr_free_irq(pdev, acb);
1697 arcmsr_free_ccb_pool(acb);
1698 if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1699 arcmsr_free_io_queue(acb);
1700 arcmsr_unmap_pciregion(acb);
1701 pci_release_regions(pdev);
1702 scsi_host_put(host);
1703 pci_disable_device(pdev);
1706 static void arcmsr_shutdown(struct pci_dev *pdev)
1708 struct Scsi_Host *host = pci_get_drvdata(pdev);
1709 struct AdapterControlBlock *acb =
1710 (struct AdapterControlBlock *)host->hostdata;
1711 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1713 del_timer_sync(&acb->eternal_timer);
1715 del_timer_sync(&acb->refresh_timer);
1716 arcmsr_disable_outbound_ints(acb);
1717 arcmsr_free_irq(pdev, acb);
1718 flush_work(&acb->arcmsr_do_message_isr_bh);
1719 arcmsr_stop_adapter_bgrb(acb);
1720 arcmsr_flush_adapter_cache(acb);
1723 static int arcmsr_module_init(void)
1726 error = pci_register_driver(&arcmsr_pci_driver);
1730 static void arcmsr_module_exit(void)
1732 pci_unregister_driver(&arcmsr_pci_driver);
1734 module_init(arcmsr_module_init);
1735 module_exit(arcmsr_module_exit);
1737 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1741 switch (acb->adapter_type) {
1743 case ACB_ADAPTER_TYPE_A: {
1744 struct MessageUnit_A __iomem *reg = acb->pmuA;
1745 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1746 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1747 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1748 writel(mask, ®->outbound_intmask);
1749 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1753 case ACB_ADAPTER_TYPE_B: {
1754 struct MessageUnit_B *reg = acb->pmuB;
1755 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1756 ARCMSR_IOP2DRV_DATA_READ_OK |
1757 ARCMSR_IOP2DRV_CDB_DONE |
1758 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1759 writel(mask, reg->iop2drv_doorbell_mask);
1760 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1763 case ACB_ADAPTER_TYPE_C: {
1764 struct MessageUnit_C __iomem *reg = acb->pmuC;
1765 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1766 writel(intmask_org & mask, ®->host_int_mask);
1767 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1770 case ACB_ADAPTER_TYPE_D: {
1771 struct MessageUnit_D *reg = acb->pmuD;
1773 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1774 writel(intmask_org | mask, reg->pcief0_int_enable);
1777 case ACB_ADAPTER_TYPE_E:
1778 case ACB_ADAPTER_TYPE_F: {
1779 struct MessageUnit_E __iomem *reg = acb->pmuE;
1781 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1782 writel(intmask_org & mask, ®->host_int_mask);
1788 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1789 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1791 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1792 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1793 __le32 address_lo, address_hi;
1794 int arccdbsize = 0x30;
1797 struct scatterlist *sg;
1800 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1801 arcmsr_cdb->TargetID = pcmd->device->id;
1802 arcmsr_cdb->LUN = pcmd->device->lun;
1803 arcmsr_cdb->Function = 1;
1804 arcmsr_cdb->msgContext = 0;
1805 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1807 nseg = scsi_dma_map(pcmd);
1808 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1810 scsi_for_each_sg(pcmd, sg, nseg, i) {
1811 /* Get the physical address of the current data pointer */
1812 length = cpu_to_le32(sg_dma_len(sg));
1813 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1814 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1815 if (address_hi == 0) {
1816 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1818 pdma_sg->address = address_lo;
1819 pdma_sg->length = length;
1820 psge += sizeof (struct SG32ENTRY);
1821 arccdbsize += sizeof (struct SG32ENTRY);
1823 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1825 pdma_sg->addresshigh = address_hi;
1826 pdma_sg->address = address_lo;
1827 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1828 psge += sizeof (struct SG64ENTRY);
1829 arccdbsize += sizeof (struct SG64ENTRY);
1832 arcmsr_cdb->sgcount = (uint8_t)nseg;
1833 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1834 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1835 if ( arccdbsize > 256)
1836 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1837 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1838 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1839 ccb->arc_cdb_size = arccdbsize;
1843 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1845 uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1846 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1847 atomic_inc(&acb->ccboutstandingcount);
1848 ccb->startdone = ARCMSR_CCB_START;
1849 switch (acb->adapter_type) {
1850 case ACB_ADAPTER_TYPE_A: {
1851 struct MessageUnit_A __iomem *reg = acb->pmuA;
1853 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1854 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1855 ®->inbound_queueport);
1857 writel(cdb_phyaddr, ®->inbound_queueport);
1861 case ACB_ADAPTER_TYPE_B: {
1862 struct MessageUnit_B *reg = acb->pmuB;
1863 uint32_t ending_index, index = reg->postq_index;
1865 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1866 reg->post_qbuffer[ending_index] = 0;
1867 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1868 reg->post_qbuffer[index] =
1869 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1871 reg->post_qbuffer[index] = cdb_phyaddr;
1874 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1875 reg->postq_index = index;
1876 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1879 case ACB_ADAPTER_TYPE_C: {
1880 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1881 uint32_t ccb_post_stamp, arc_cdb_size;
1883 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1884 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1885 writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
1886 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1889 case ACB_ADAPTER_TYPE_D: {
1890 struct MessageUnit_D *pmu = acb->pmuD;
1892 u16 postq_index, toggle;
1893 unsigned long flags;
1894 struct InBound_SRB *pinbound_srb;
1896 spin_lock_irqsave(&acb->postq_lock, flags);
1897 postq_index = pmu->postq_index;
1898 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1899 pinbound_srb->addressHigh = upper_32_bits(ccb->cdb_phyaddr);
1900 pinbound_srb->addressLow = cdb_phyaddr;
1901 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1902 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1903 toggle = postq_index & 0x4000;
1904 index_stripped = postq_index + 1;
1905 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1906 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1908 writel(postq_index, pmu->inboundlist_write_pointer);
1909 spin_unlock_irqrestore(&acb->postq_lock, flags);
1912 case ACB_ADAPTER_TYPE_E: {
1913 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1914 u32 ccb_post_stamp, arc_cdb_size;
1916 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1917 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1918 writel(0, &pmu->inbound_queueport_high);
1919 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1922 case ACB_ADAPTER_TYPE_F: {
1923 struct MessageUnit_F __iomem *pmu = acb->pmuF;
1924 u32 ccb_post_stamp, arc_cdb_size;
1926 if (ccb->arc_cdb_size <= 0x300)
1927 arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 | 1;
1929 arc_cdb_size = ((ccb->arc_cdb_size + 0xff) >> 8) + 2;
1930 if (arc_cdb_size > 0xF)
1932 arc_cdb_size = (arc_cdb_size << 1) | 1;
1934 ccb_post_stamp = (ccb->smid | arc_cdb_size);
1935 writel(0, &pmu->inbound_queueport_high);
1936 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1942 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1944 struct MessageUnit_A __iomem *reg = acb->pmuA;
1945 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1946 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1947 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1949 "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1950 , acb->host->host_no);
1954 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1956 struct MessageUnit_B *reg = acb->pmuB;
1957 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1958 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1960 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1962 "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1963 , acb->host->host_no);
1967 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1969 struct MessageUnit_C __iomem *reg = pACB->pmuC;
1970 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1971 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1972 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
1973 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1975 "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1976 , pACB->host->host_no);
1981 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1983 struct MessageUnit_D *reg = pACB->pmuD;
1985 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1986 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1987 if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1988 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1989 "timeout\n", pACB->host->host_no);
1992 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1994 struct MessageUnit_E __iomem *reg = pACB->pmuE;
1996 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1997 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
1998 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1999 writel(pACB->out_doorbell, ®->iobound_doorbell);
2000 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
2001 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2002 "timeout\n", pACB->host->host_no);
2006 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
2008 switch (acb->adapter_type) {
2009 case ACB_ADAPTER_TYPE_A:
2010 arcmsr_hbaA_stop_bgrb(acb);
2012 case ACB_ADAPTER_TYPE_B:
2013 arcmsr_hbaB_stop_bgrb(acb);
2015 case ACB_ADAPTER_TYPE_C:
2016 arcmsr_hbaC_stop_bgrb(acb);
2018 case ACB_ADAPTER_TYPE_D:
2019 arcmsr_hbaD_stop_bgrb(acb);
2021 case ACB_ADAPTER_TYPE_E:
2022 case ACB_ADAPTER_TYPE_F:
2023 arcmsr_hbaE_stop_bgrb(acb);
2028 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
2030 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
2033 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
2035 switch (acb->adapter_type) {
2036 case ACB_ADAPTER_TYPE_A: {
2037 struct MessageUnit_A __iomem *reg = acb->pmuA;
2038 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
2041 case ACB_ADAPTER_TYPE_B: {
2042 struct MessageUnit_B *reg = acb->pmuB;
2043 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2046 case ACB_ADAPTER_TYPE_C: {
2047 struct MessageUnit_C __iomem *reg = acb->pmuC;
2049 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
2052 case ACB_ADAPTER_TYPE_D: {
2053 struct MessageUnit_D *reg = acb->pmuD;
2054 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
2055 reg->inbound_doorbell);
2058 case ACB_ADAPTER_TYPE_E:
2059 case ACB_ADAPTER_TYPE_F: {
2060 struct MessageUnit_E __iomem *reg = acb->pmuE;
2061 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
2062 writel(acb->out_doorbell, ®->iobound_doorbell);
2068 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
2070 switch (acb->adapter_type) {
2071 case ACB_ADAPTER_TYPE_A: {
2072 struct MessageUnit_A __iomem *reg = acb->pmuA;
2074 ** push inbound doorbell tell iop, driver data write ok
2075 ** and wait reply on next hwinterrupt for next Qbuffer post
2077 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell);
2081 case ACB_ADAPTER_TYPE_B: {
2082 struct MessageUnit_B *reg = acb->pmuB;
2084 ** push inbound doorbell tell iop, driver data write ok
2085 ** and wait reply on next hwinterrupt for next Qbuffer post
2087 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
2090 case ACB_ADAPTER_TYPE_C: {
2091 struct MessageUnit_C __iomem *reg = acb->pmuC;
2093 ** push inbound doorbell tell iop, driver data write ok
2094 ** and wait reply on next hwinterrupt for next Qbuffer post
2096 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell);
2099 case ACB_ADAPTER_TYPE_D: {
2100 struct MessageUnit_D *reg = acb->pmuD;
2101 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
2102 reg->inbound_doorbell);
2105 case ACB_ADAPTER_TYPE_E:
2106 case ACB_ADAPTER_TYPE_F: {
2107 struct MessageUnit_E __iomem *reg = acb->pmuE;
2108 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2109 writel(acb->out_doorbell, ®->iobound_doorbell);
2115 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2117 struct QBUFFER __iomem *qbuffer = NULL;
2118 switch (acb->adapter_type) {
2120 case ACB_ADAPTER_TYPE_A: {
2121 struct MessageUnit_A __iomem *reg = acb->pmuA;
2122 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer;
2125 case ACB_ADAPTER_TYPE_B: {
2126 struct MessageUnit_B *reg = acb->pmuB;
2127 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2130 case ACB_ADAPTER_TYPE_C: {
2131 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2132 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2135 case ACB_ADAPTER_TYPE_D: {
2136 struct MessageUnit_D *reg = acb->pmuD;
2137 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2140 case ACB_ADAPTER_TYPE_E: {
2141 struct MessageUnit_E __iomem *reg = acb->pmuE;
2142 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer;
2145 case ACB_ADAPTER_TYPE_F: {
2146 qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
2153 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2155 struct QBUFFER __iomem *pqbuffer = NULL;
2156 switch (acb->adapter_type) {
2158 case ACB_ADAPTER_TYPE_A: {
2159 struct MessageUnit_A __iomem *reg = acb->pmuA;
2160 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer;
2163 case ACB_ADAPTER_TYPE_B: {
2164 struct MessageUnit_B *reg = acb->pmuB;
2165 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2168 case ACB_ADAPTER_TYPE_C: {
2169 struct MessageUnit_C __iomem *reg = acb->pmuC;
2170 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer;
2173 case ACB_ADAPTER_TYPE_D: {
2174 struct MessageUnit_D *reg = acb->pmuD;
2175 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2178 case ACB_ADAPTER_TYPE_E: {
2179 struct MessageUnit_E __iomem *reg = acb->pmuE;
2180 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer;
2183 case ACB_ADAPTER_TYPE_F:
2184 pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
2191 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2192 struct QBUFFER __iomem *prbuffer)
2195 uint8_t *buf1 = NULL;
2196 uint32_t __iomem *iop_data;
2197 uint32_t iop_len, data_len, *buf2 = NULL;
2199 iop_data = (uint32_t __iomem *)prbuffer->data;
2200 iop_len = readl(&prbuffer->data_len);
2202 buf1 = kmalloc(128, GFP_ATOMIC);
2203 buf2 = (uint32_t *)buf1;
2207 while (data_len >= 4) {
2208 *buf2++ = readl(iop_data);
2213 *buf2 = readl(iop_data);
2214 buf2 = (uint32_t *)buf1;
2216 while (iop_len > 0) {
2217 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2219 acb->rqbuf_putIndex++;
2220 /* if last, index number set it to 0 */
2221 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2226 /* let IOP know data has been read */
2227 arcmsr_iop_message_read(acb);
2232 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2233 struct QBUFFER __iomem *prbuffer) {
2236 uint8_t __iomem *iop_data;
2239 if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2240 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2241 iop_data = (uint8_t __iomem *)prbuffer->data;
2242 iop_len = readl(&prbuffer->data_len);
2243 while (iop_len > 0) {
2244 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2245 *pQbuffer = readb(iop_data);
2246 acb->rqbuf_putIndex++;
2247 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2251 arcmsr_iop_message_read(acb);
2255 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2257 unsigned long flags;
2258 struct QBUFFER __iomem *prbuffer;
2259 int32_t buf_empty_len;
2261 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2262 prbuffer = arcmsr_get_iop_rqbuffer(acb);
2263 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2264 (ARCMSR_MAX_QBUFFER - 1);
2265 if (buf_empty_len >= readl(&prbuffer->data_len)) {
2266 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2267 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2269 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2270 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2273 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2276 struct QBUFFER __iomem *pwbuffer;
2277 uint8_t *buf1 = NULL;
2278 uint32_t __iomem *iop_data;
2279 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2281 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2282 buf1 = kmalloc(128, GFP_ATOMIC);
2283 buf2 = (uint32_t *)buf1;
2287 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2288 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2289 iop_data = (uint32_t __iomem *)pwbuffer->data;
2290 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2291 && (allxfer_len < 124)) {
2292 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2294 acb->wqbuf_getIndex++;
2295 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2299 data_len = allxfer_len;
2300 buf1 = (uint8_t *)buf2;
2301 while (data_len >= 4) {
2303 writel(data, iop_data);
2309 writel(data, iop_data);
2311 writel(allxfer_len, &pwbuffer->data_len);
2313 arcmsr_iop_message_wrote(acb);
2318 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2321 struct QBUFFER __iomem *pwbuffer;
2322 uint8_t __iomem *iop_data;
2323 int32_t allxfer_len = 0;
2325 if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2326 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2329 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2330 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2331 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2332 iop_data = (uint8_t __iomem *)pwbuffer->data;
2333 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2334 && (allxfer_len < 124)) {
2335 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2336 writeb(*pQbuffer, iop_data);
2337 acb->wqbuf_getIndex++;
2338 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2342 writel(allxfer_len, &pwbuffer->data_len);
2343 arcmsr_iop_message_wrote(acb);
2347 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2349 unsigned long flags;
2351 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2352 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2353 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2354 arcmsr_write_ioctldata2iop(acb);
2355 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2356 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2357 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2360 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2362 uint32_t outbound_doorbell;
2363 struct MessageUnit_A __iomem *reg = acb->pmuA;
2364 outbound_doorbell = readl(®->outbound_doorbell);
2366 writel(outbound_doorbell, ®->outbound_doorbell);
2367 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2368 arcmsr_iop2drv_data_wrote_handle(acb);
2369 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2370 arcmsr_iop2drv_data_read_handle(acb);
2371 outbound_doorbell = readl(®->outbound_doorbell);
2372 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2373 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2375 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2377 uint32_t outbound_doorbell;
2378 struct MessageUnit_C __iomem *reg = pACB->pmuC;
2380 *******************************************************************
2381 ** Maybe here we need to check wrqbuffer_lock is lock or not
2382 ** DOORBELL: din! don!
2383 ** check if there are any mail need to pack from firmware
2384 *******************************************************************
2386 outbound_doorbell = readl(®->outbound_doorbell);
2388 writel(outbound_doorbell, ®->outbound_doorbell_clear);
2389 readl(®->outbound_doorbell_clear);
2390 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2391 arcmsr_iop2drv_data_wrote_handle(pACB);
2392 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2393 arcmsr_iop2drv_data_read_handle(pACB);
2394 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2395 arcmsr_hbaC_message_isr(pACB);
2396 outbound_doorbell = readl(®->outbound_doorbell);
2397 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2398 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2399 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2402 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2404 uint32_t outbound_doorbell;
2405 struct MessageUnit_D *pmu = pACB->pmuD;
2407 outbound_doorbell = readl(pmu->outbound_doorbell);
2409 writel(outbound_doorbell, pmu->outbound_doorbell);
2410 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2411 arcmsr_hbaD_message_isr(pACB);
2412 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2413 arcmsr_iop2drv_data_wrote_handle(pACB);
2414 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2415 arcmsr_iop2drv_data_read_handle(pACB);
2416 outbound_doorbell = readl(pmu->outbound_doorbell);
2417 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2418 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2419 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2422 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2424 uint32_t outbound_doorbell, in_doorbell, tmp, i;
2425 struct MessageUnit_E __iomem *reg = pACB->pmuE;
2427 if (pACB->adapter_type == ACB_ADAPTER_TYPE_F) {
2428 for (i = 0; i < 5; i++) {
2429 in_doorbell = readl(®->iobound_doorbell);
2430 if (in_doorbell != 0)
2434 in_doorbell = readl(®->iobound_doorbell);
2435 outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2437 writel(0, ®->host_int_status); /* clear interrupt */
2438 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2439 arcmsr_iop2drv_data_wrote_handle(pACB);
2441 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2442 arcmsr_iop2drv_data_read_handle(pACB);
2444 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2445 arcmsr_hbaE_message_isr(pACB);
2448 in_doorbell = readl(®->iobound_doorbell);
2449 outbound_doorbell = tmp ^ in_doorbell;
2450 } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2451 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2452 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2453 pACB->in_doorbell = in_doorbell;
2456 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2459 struct MessageUnit_A __iomem *reg = acb->pmuA;
2460 struct ARCMSR_CDB *pARCMSR_CDB;
2461 struct CommandControlBlock *pCCB;
2463 unsigned long cdb_phy_addr;
2465 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) {
2466 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2467 if (acb->cdb_phyadd_hipart)
2468 cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2469 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2470 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2471 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2472 arcmsr_drain_donequeue(acb, pCCB, error);
2475 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2479 struct MessageUnit_B *reg = acb->pmuB;
2480 struct ARCMSR_CDB *pARCMSR_CDB;
2481 struct CommandControlBlock *pCCB;
2483 unsigned long cdb_phy_addr;
2485 index = reg->doneq_index;
2486 while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2487 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2488 if (acb->cdb_phyadd_hipart)
2489 cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2490 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2491 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2492 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2493 arcmsr_drain_donequeue(acb, pCCB, error);
2494 reg->done_qbuffer[index] = 0;
2496 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2497 reg->doneq_index = index;
2501 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2503 struct MessageUnit_C __iomem *phbcmu;
2504 struct ARCMSR_CDB *arcmsr_cdb;
2505 struct CommandControlBlock *ccb;
2506 uint32_t flag_ccb, throttling = 0;
2507 unsigned long ccb_cdb_phy;
2511 /* areca cdb command done */
2512 /* Use correct offset and size for syncing */
2514 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2516 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2517 if (acb->cdb_phyadd_hipart)
2518 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2519 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2521 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2523 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2525 /* check if command done with no error */
2526 arcmsr_drain_donequeue(acb, ccb, error);
2528 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2529 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2530 &phbcmu->inbound_doorbell);
2536 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2538 u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2539 uint32_t addressLow;
2541 struct MessageUnit_D *pmu;
2542 struct ARCMSR_CDB *arcmsr_cdb;
2543 struct CommandControlBlock *ccb;
2544 unsigned long flags, ccb_cdb_phy;
2546 spin_lock_irqsave(&acb->doneq_lock, flags);
2548 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2549 doneq_index = pmu->doneq_index;
2550 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2552 toggle = doneq_index & 0x4000;
2553 index_stripped = (doneq_index & 0xFFF) + 1;
2554 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2555 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2556 ((toggle ^ 0x4000) + 1);
2557 doneq_index = pmu->doneq_index;
2558 addressLow = pmu->done_qbuffer[doneq_index &
2560 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2561 if (acb->cdb_phyadd_hipart)
2562 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2563 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2565 ccb = container_of(arcmsr_cdb,
2566 struct CommandControlBlock, arcmsr_cdb);
2567 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2569 arcmsr_drain_donequeue(acb, ccb, error);
2570 writel(doneq_index, pmu->outboundlist_read_pointer);
2571 } while ((doneq_index & 0xFFF) !=
2572 (outbound_write_pointer & 0xFFF));
2574 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2575 pmu->outboundlist_interrupt_cause);
2576 readl(pmu->outboundlist_interrupt_cause);
2577 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2580 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2582 uint32_t doneq_index;
2585 struct MessageUnit_E __iomem *pmu;
2586 struct CommandControlBlock *ccb;
2587 unsigned long flags;
2589 spin_lock_irqsave(&acb->doneq_lock, flags);
2590 doneq_index = acb->doneq_index;
2592 while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2593 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2594 ccb = acb->pccb_pool[cmdSMID];
2595 error = (acb->pCompletionQ[doneq_index].cmdFlag
2596 & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2597 arcmsr_drain_donequeue(acb, ccb, error);
2599 if (doneq_index >= acb->completionQ_entry)
2602 acb->doneq_index = doneq_index;
2603 writel(doneq_index, &pmu->reply_post_consumer_index);
2604 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2607 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
2609 uint32_t doneq_index;
2612 struct MessageUnit_F __iomem *phbcmu;
2613 struct CommandControlBlock *ccb;
2614 unsigned long flags;
2616 spin_lock_irqsave(&acb->doneq_lock, flags);
2617 doneq_index = acb->doneq_index;
2620 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2621 if (cmdSMID == 0xffff)
2623 ccb = acb->pccb_pool[cmdSMID];
2624 error = (acb->pCompletionQ[doneq_index].cmdFlag &
2625 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2626 arcmsr_drain_donequeue(acb, ccb, error);
2627 acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
2629 if (doneq_index >= acb->completionQ_entry)
2632 acb->doneq_index = doneq_index;
2633 writel(doneq_index, &phbcmu->reply_post_consumer_index);
2634 spin_unlock_irqrestore(&acb->doneq_lock, flags);
2638 **********************************************************************************
2639 ** Handle a message interrupt
2641 ** The only message interrupt we expect is in response to a query for the current adapter config.
2642 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2643 **********************************************************************************
2645 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2647 struct MessageUnit_A __iomem *reg = acb->pmuA;
2648 /*clear interrupt and message state*/
2649 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus);
2650 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2651 schedule_work(&acb->arcmsr_do_message_isr_bh);
2653 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2655 struct MessageUnit_B *reg = acb->pmuB;
2657 /*clear interrupt and message state*/
2658 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2659 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2660 schedule_work(&acb->arcmsr_do_message_isr_bh);
2663 **********************************************************************************
2664 ** Handle a message interrupt
2666 ** The only message interrupt we expect is in response to a query for the
2667 ** current adapter config.
2668 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2669 **********************************************************************************
2671 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2673 struct MessageUnit_C __iomem *reg = acb->pmuC;
2674 /*clear interrupt and message state*/
2675 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);
2676 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2677 schedule_work(&acb->arcmsr_do_message_isr_bh);
2680 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2682 struct MessageUnit_D *reg = acb->pmuD;
2684 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2685 readl(reg->outbound_doorbell);
2686 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2687 schedule_work(&acb->arcmsr_do_message_isr_bh);
2690 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2692 struct MessageUnit_E __iomem *reg = acb->pmuE;
2694 writel(0, ®->host_int_status);
2695 if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2696 schedule_work(&acb->arcmsr_do_message_isr_bh);
2699 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2701 uint32_t outbound_intstatus;
2702 struct MessageUnit_A __iomem *reg = acb->pmuA;
2703 outbound_intstatus = readl(®->outbound_intstatus) &
2704 acb->outbound_int_enable;
2705 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2708 writel(outbound_intstatus, ®->outbound_intstatus);
2709 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2710 arcmsr_hbaA_doorbell_isr(acb);
2711 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2712 arcmsr_hbaA_postqueue_isr(acb);
2713 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2714 arcmsr_hbaA_message_isr(acb);
2715 outbound_intstatus = readl(®->outbound_intstatus) &
2716 acb->outbound_int_enable;
2717 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2718 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2719 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2723 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2725 uint32_t outbound_doorbell;
2726 struct MessageUnit_B *reg = acb->pmuB;
2727 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2728 acb->outbound_int_enable;
2729 if (!outbound_doorbell)
2732 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2733 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2734 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2735 arcmsr_iop2drv_data_wrote_handle(acb);
2736 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2737 arcmsr_iop2drv_data_read_handle(acb);
2738 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2739 arcmsr_hbaB_postqueue_isr(acb);
2740 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2741 arcmsr_hbaB_message_isr(acb);
2742 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2743 acb->outbound_int_enable;
2744 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2745 | ARCMSR_IOP2DRV_DATA_READ_OK
2746 | ARCMSR_IOP2DRV_CDB_DONE
2747 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2751 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2753 uint32_t host_interrupt_status;
2754 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2756 *********************************************
2757 ** check outbound intstatus
2758 *********************************************
2760 host_interrupt_status = readl(&phbcmu->host_int_status) &
2761 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2762 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2763 if (!host_interrupt_status)
2766 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2767 arcmsr_hbaC_doorbell_isr(pACB);
2768 /* MU post queue interrupts*/
2769 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2770 arcmsr_hbaC_postqueue_isr(pACB);
2771 host_interrupt_status = readl(&phbcmu->host_int_status);
2772 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2773 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2777 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2779 u32 host_interrupt_status;
2780 struct MessageUnit_D *pmu = pACB->pmuD;
2782 host_interrupt_status = readl(pmu->host_int_status) &
2783 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2784 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2785 if (!host_interrupt_status)
2788 /* MU post queue interrupts*/
2789 if (host_interrupt_status &
2790 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2791 arcmsr_hbaD_postqueue_isr(pACB);
2792 if (host_interrupt_status &
2793 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2794 arcmsr_hbaD_doorbell_isr(pACB);
2795 host_interrupt_status = readl(pmu->host_int_status);
2796 } while (host_interrupt_status &
2797 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2798 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2802 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2804 uint32_t host_interrupt_status;
2805 struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2807 host_interrupt_status = readl(&pmu->host_int_status) &
2808 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2809 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2810 if (!host_interrupt_status)
2813 /* MU ioctl transfer doorbell interrupts*/
2814 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2815 arcmsr_hbaE_doorbell_isr(pACB);
2817 /* MU post queue interrupts*/
2818 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2819 arcmsr_hbaE_postqueue_isr(pACB);
2821 host_interrupt_status = readl(&pmu->host_int_status);
2822 } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2823 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2827 static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
2829 uint32_t host_interrupt_status;
2830 struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
2832 host_interrupt_status = readl(&phbcmu->host_int_status) &
2833 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2834 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2835 if (!host_interrupt_status)
2838 /* MU post queue interrupts*/
2839 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
2840 arcmsr_hbaF_postqueue_isr(pACB);
2842 /* MU ioctl transfer doorbell interrupts*/
2843 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
2844 arcmsr_hbaE_doorbell_isr(pACB);
2846 host_interrupt_status = readl(&phbcmu->host_int_status);
2847 } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2848 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2852 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2854 switch (acb->adapter_type) {
2855 case ACB_ADAPTER_TYPE_A:
2856 return arcmsr_hbaA_handle_isr(acb);
2857 case ACB_ADAPTER_TYPE_B:
2858 return arcmsr_hbaB_handle_isr(acb);
2859 case ACB_ADAPTER_TYPE_C:
2860 return arcmsr_hbaC_handle_isr(acb);
2861 case ACB_ADAPTER_TYPE_D:
2862 return arcmsr_hbaD_handle_isr(acb);
2863 case ACB_ADAPTER_TYPE_E:
2864 return arcmsr_hbaE_handle_isr(acb);
2865 case ACB_ADAPTER_TYPE_F:
2866 return arcmsr_hbaF_handle_isr(acb);
2872 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2875 /* stop adapter background rebuild */
2876 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2877 uint32_t intmask_org;
2878 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2879 intmask_org = arcmsr_disable_outbound_ints(acb);
2880 arcmsr_stop_adapter_bgrb(acb);
2881 arcmsr_flush_adapter_cache(acb);
2882 arcmsr_enable_outbound_ints(acb, intmask_org);
2888 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2892 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2893 for (i = 0; i < 15; i++) {
2894 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2895 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2896 acb->rqbuf_getIndex = 0;
2897 acb->rqbuf_putIndex = 0;
2898 arcmsr_iop_message_read(acb);
2900 } else if (acb->rqbuf_getIndex !=
2901 acb->rqbuf_putIndex) {
2902 acb->rqbuf_getIndex = 0;
2903 acb->rqbuf_putIndex = 0;
2911 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2912 struct scsi_cmnd *cmd)
2915 unsigned short use_sg;
2916 int retvalue = 0, transfer_len = 0;
2917 unsigned long flags;
2918 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2919 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2920 (uint32_t)cmd->cmnd[6] << 16 |
2921 (uint32_t)cmd->cmnd[7] << 8 |
2922 (uint32_t)cmd->cmnd[8];
2923 struct scatterlist *sg;
2925 use_sg = scsi_sg_count(cmd);
2926 sg = scsi_sglist(cmd);
2927 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2929 retvalue = ARCMSR_MESSAGE_FAIL;
2932 transfer_len += sg->length;
2933 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2934 retvalue = ARCMSR_MESSAGE_FAIL;
2935 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2938 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2939 switch (controlcode) {
2940 case ARCMSR_MESSAGE_READ_RQBUFFER: {
2941 unsigned char *ver_addr;
2942 uint8_t *ptmpQbuffer;
2943 uint32_t allxfer_len = 0;
2944 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2946 retvalue = ARCMSR_MESSAGE_FAIL;
2947 pr_info("%s: memory not enough!\n", __func__);
2950 ptmpQbuffer = ver_addr;
2951 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2952 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2953 unsigned int tail = acb->rqbuf_getIndex;
2954 unsigned int head = acb->rqbuf_putIndex;
2955 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2957 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2958 if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2959 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2961 if (allxfer_len <= cnt_to_end)
2962 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2964 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2965 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2967 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2969 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2971 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2972 struct QBUFFER __iomem *prbuffer;
2973 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2974 prbuffer = arcmsr_get_iop_rqbuffer(acb);
2975 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2976 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2978 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2980 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2981 if (acb->fw_flag == FW_DEADLOCK)
2982 pcmdmessagefld->cmdmessage.ReturnCode =
2983 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2985 pcmdmessagefld->cmdmessage.ReturnCode =
2986 ARCMSR_MESSAGE_RETURNCODE_OK;
2989 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2990 unsigned char *ver_addr;
2993 uint8_t *pQbuffer, *ptmpuserbuffer;
2995 user_len = pcmdmessagefld->cmdmessage.Length;
2996 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2997 retvalue = ARCMSR_MESSAGE_FAIL;
3001 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3003 retvalue = ARCMSR_MESSAGE_FAIL;
3006 ptmpuserbuffer = ver_addr;
3008 memcpy(ptmpuserbuffer,
3009 pcmdmessagefld->messagedatabuffer, user_len);
3010 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3011 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
3012 struct SENSE_DATA *sensebuffer =
3013 (struct SENSE_DATA *)cmd->sense_buffer;
3014 arcmsr_write_ioctldata2iop(acb);
3015 /* has error report sensedata */
3016 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
3017 sensebuffer->SenseKey = ILLEGAL_REQUEST;
3018 sensebuffer->AdditionalSenseLength = 0x0A;
3019 sensebuffer->AdditionalSenseCode = 0x20;
3020 sensebuffer->Valid = 1;
3021 retvalue = ARCMSR_MESSAGE_FAIL;
3023 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
3024 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
3025 if (user_len > cnt2end) {
3026 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
3027 ptmpuserbuffer += cnt2end;
3028 user_len -= cnt2end;
3029 acb->wqbuf_putIndex = 0;
3030 pQbuffer = acb->wqbuffer;
3032 memcpy(pQbuffer, ptmpuserbuffer, user_len);
3033 acb->wqbuf_putIndex += user_len;
3034 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
3035 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
3037 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
3038 arcmsr_write_ioctldata2iop(acb);
3041 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3043 if (acb->fw_flag == FW_DEADLOCK)
3044 pcmdmessagefld->cmdmessage.ReturnCode =
3045 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3047 pcmdmessagefld->cmdmessage.ReturnCode =
3048 ARCMSR_MESSAGE_RETURNCODE_OK;
3051 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
3052 uint8_t *pQbuffer = acb->rqbuffer;
3054 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3055 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3056 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3057 acb->rqbuf_getIndex = 0;
3058 acb->rqbuf_putIndex = 0;
3059 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3060 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3061 if (acb->fw_flag == FW_DEADLOCK)
3062 pcmdmessagefld->cmdmessage.ReturnCode =
3063 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3065 pcmdmessagefld->cmdmessage.ReturnCode =
3066 ARCMSR_MESSAGE_RETURNCODE_OK;
3069 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
3070 uint8_t *pQbuffer = acb->wqbuffer;
3071 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3072 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3073 ACB_F_MESSAGE_WQBUFFER_READED);
3074 acb->wqbuf_getIndex = 0;
3075 acb->wqbuf_putIndex = 0;
3076 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3077 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3078 if (acb->fw_flag == FW_DEADLOCK)
3079 pcmdmessagefld->cmdmessage.ReturnCode =
3080 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3082 pcmdmessagefld->cmdmessage.ReturnCode =
3083 ARCMSR_MESSAGE_RETURNCODE_OK;
3086 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
3088 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3089 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3090 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3091 acb->rqbuf_getIndex = 0;
3092 acb->rqbuf_putIndex = 0;
3093 pQbuffer = acb->rqbuffer;
3094 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3095 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3096 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3097 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3098 ACB_F_MESSAGE_WQBUFFER_READED);
3099 acb->wqbuf_getIndex = 0;
3100 acb->wqbuf_putIndex = 0;
3101 pQbuffer = acb->wqbuffer;
3102 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3103 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3104 if (acb->fw_flag == FW_DEADLOCK)
3105 pcmdmessagefld->cmdmessage.ReturnCode =
3106 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3108 pcmdmessagefld->cmdmessage.ReturnCode =
3109 ARCMSR_MESSAGE_RETURNCODE_OK;
3112 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
3113 if (acb->fw_flag == FW_DEADLOCK)
3114 pcmdmessagefld->cmdmessage.ReturnCode =
3115 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3117 pcmdmessagefld->cmdmessage.ReturnCode =
3118 ARCMSR_MESSAGE_RETURNCODE_3F;
3121 case ARCMSR_MESSAGE_SAY_HELLO: {
3122 int8_t *hello_string = "Hello! I am ARCMSR";
3123 if (acb->fw_flag == FW_DEADLOCK)
3124 pcmdmessagefld->cmdmessage.ReturnCode =
3125 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3127 pcmdmessagefld->cmdmessage.ReturnCode =
3128 ARCMSR_MESSAGE_RETURNCODE_OK;
3129 memcpy(pcmdmessagefld->messagedatabuffer,
3130 hello_string, (int16_t)strlen(hello_string));
3133 case ARCMSR_MESSAGE_SAY_GOODBYE: {
3134 if (acb->fw_flag == FW_DEADLOCK)
3135 pcmdmessagefld->cmdmessage.ReturnCode =
3136 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3138 pcmdmessagefld->cmdmessage.ReturnCode =
3139 ARCMSR_MESSAGE_RETURNCODE_OK;
3140 arcmsr_iop_parking(acb);
3143 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
3144 if (acb->fw_flag == FW_DEADLOCK)
3145 pcmdmessagefld->cmdmessage.ReturnCode =
3146 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3148 pcmdmessagefld->cmdmessage.ReturnCode =
3149 ARCMSR_MESSAGE_RETURNCODE_OK;
3150 arcmsr_flush_adapter_cache(acb);
3154 retvalue = ARCMSR_MESSAGE_FAIL;
3155 pr_info("%s: unknown controlcode!\n", __func__);
3159 struct scatterlist *sg = scsi_sglist(cmd);
3160 kunmap_atomic(buffer - sg->offset);
3165 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
3167 struct list_head *head;
3168 struct CommandControlBlock *ccb = NULL;
3169 unsigned long flags;
3171 spin_lock_irqsave(&acb->ccblist_lock, flags);
3172 head = &acb->ccb_free_list;
3173 if (!list_empty(head)) {
3174 ccb = list_entry(head->next, struct CommandControlBlock, list);
3175 list_del_init(&ccb->list);
3177 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3180 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3184 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
3185 struct scsi_cmnd *cmd)
3187 switch (cmd->cmnd[0]) {
3189 unsigned char inqdata[36];
3191 struct scatterlist *sg;
3193 if (cmd->device->lun) {
3194 cmd->result = (DID_TIME_OUT << 16);
3195 cmd->scsi_done(cmd);
3198 inqdata[0] = TYPE_PROCESSOR;
3199 /* Periph Qualifier & Periph Dev Type */
3201 /* rem media bit & Dev Type Modifier */
3203 /* ISO, ECMA, & ANSI versions */
3205 /* length of additional data */
3206 memcpy(&inqdata[8], "Areca ", 8);
3207 /* Vendor Identification */
3208 memcpy(&inqdata[16], "RAID controller ", 16);
3209 /* Product Identification */
3210 memcpy(&inqdata[32], "R001", 4); /* Product Revision */
3212 sg = scsi_sglist(cmd);
3213 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3215 memcpy(buffer, inqdata, sizeof(inqdata));
3216 sg = scsi_sglist(cmd);
3217 kunmap_atomic(buffer - sg->offset);
3219 cmd->scsi_done(cmd);
3224 if (arcmsr_iop_message_xfer(acb, cmd))
3225 cmd->result = (DID_ERROR << 16);
3226 cmd->scsi_done(cmd);
3230 cmd->scsi_done(cmd);
3234 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
3235 void (* done)(struct scsi_cmnd *))
3237 struct Scsi_Host *host = cmd->device->host;
3238 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3239 struct CommandControlBlock *ccb;
3240 int target = cmd->device->id;
3242 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3243 cmd->result = (DID_NO_CONNECT << 16);
3244 cmd->scsi_done(cmd);
3247 cmd->scsi_done = done;
3248 cmd->host_scribble = NULL;
3251 /* virtual device for iop message transfer */
3252 arcmsr_handle_virtual_command(acb, cmd);
3255 ccb = arcmsr_get_freeccb(acb);
3257 return SCSI_MLQUEUE_HOST_BUSY;
3258 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3259 cmd->result = (DID_ERROR << 16) | SAM_STAT_RESERVATION_CONFLICT;
3260 cmd->scsi_done(cmd);
3263 arcmsr_post_ccb(acb, ccb);
3267 static DEF_SCSI_QCMD(arcmsr_queue_command)
3269 static int arcmsr_slave_config(struct scsi_device *sdev)
3271 unsigned int dev_timeout;
3273 dev_timeout = sdev->request_queue->rq_timeout;
3274 if ((cmd_timeout > 0) && ((cmd_timeout * HZ) > dev_timeout))
3275 blk_queue_rq_timeout(sdev->request_queue, cmd_timeout * HZ);
3279 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3282 uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3283 uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3284 uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3285 uint32_t *firm_model = &rwbuffer[15];
3286 uint32_t *firm_version = &rwbuffer[17];
3287 uint32_t *device_map = &rwbuffer[21];
3291 *acb_firm_model = readl(firm_model);
3298 *acb_firm_version = readl(firm_version);
3305 *acb_device_map = readl(device_map);
3310 pACB->signature = readl(&rwbuffer[0]);
3311 pACB->firm_request_len = readl(&rwbuffer[1]);
3312 pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3313 pACB->firm_sdram_size = readl(&rwbuffer[3]);
3314 pACB->firm_hd_channels = readl(&rwbuffer[4]);
3315 pACB->firm_cfg_version = readl(&rwbuffer[25]);
3316 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3317 pACB->host->host_no,
3319 pACB->firm_version);
3322 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3324 struct MessageUnit_A __iomem *reg = acb->pmuA;
3326 arcmsr_wait_firmware_ready(acb);
3327 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3328 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3329 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3330 miscellaneous data' timeout \n", acb->host->host_no);
3333 arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3336 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3338 struct MessageUnit_B *reg = acb->pmuB;
3340 arcmsr_wait_firmware_ready(acb);
3341 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3342 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3343 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3346 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3347 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3348 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3349 miscellaneous data' timeout \n", acb->host->host_no);
3352 arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3356 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3358 uint32_t intmask_org;
3359 struct MessageUnit_C __iomem *reg = pACB->pmuC;
3361 /* disable all outbound interrupt */
3362 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
3363 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
3364 /* wait firmware ready */
3365 arcmsr_wait_firmware_ready(pACB);
3366 /* post "get config" instruction */
3367 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3368 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
3369 /* wait message ready */
3370 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3371 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3372 miscellaneous data' timeout \n", pACB->host->host_no);
3375 arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3379 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3381 struct MessageUnit_D *reg = acb->pmuD;
3383 if (readl(acb->pmuD->outbound_doorbell) &
3384 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3385 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3386 acb->pmuD->outbound_doorbell);/*clear interrupt*/
3388 arcmsr_wait_firmware_ready(acb);
3389 /* post "get config" instruction */
3390 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3391 /* wait message ready */
3392 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3393 pr_notice("arcmsr%d: wait get adapter firmware "
3394 "miscellaneous data timeout\n", acb->host->host_no);
3397 arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3401 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3403 struct MessageUnit_E __iomem *reg = pACB->pmuE;
3404 uint32_t intmask_org;
3406 /* disable all outbound interrupt */
3407 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
3408 writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, ®->host_int_mask);
3409 /* wait firmware ready */
3410 arcmsr_wait_firmware_ready(pACB);
3412 /* post "get config" instruction */
3413 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3415 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3416 writel(pACB->out_doorbell, ®->iobound_doorbell);
3417 /* wait message ready */
3418 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3419 pr_notice("arcmsr%d: wait get adapter firmware "
3420 "miscellaneous data timeout\n", pACB->host->host_no);
3423 arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3427 static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
3429 struct MessageUnit_F __iomem *reg = pACB->pmuF;
3430 uint32_t intmask_org;
3432 /* disable all outbound interrupt */
3433 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
3434 writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, ®->host_int_mask);
3435 /* wait firmware ready */
3436 arcmsr_wait_firmware_ready(pACB);
3437 /* post "get config" instruction */
3438 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
3440 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3441 writel(pACB->out_doorbell, ®->iobound_doorbell);
3442 /* wait message ready */
3443 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3444 pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
3445 pACB->host->host_no);
3448 arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
3452 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3456 switch (acb->adapter_type) {
3457 case ACB_ADAPTER_TYPE_A:
3458 rtn = arcmsr_hbaA_get_config(acb);
3460 case ACB_ADAPTER_TYPE_B:
3461 rtn = arcmsr_hbaB_get_config(acb);
3463 case ACB_ADAPTER_TYPE_C:
3464 rtn = arcmsr_hbaC_get_config(acb);
3466 case ACB_ADAPTER_TYPE_D:
3467 rtn = arcmsr_hbaD_get_config(acb);
3469 case ACB_ADAPTER_TYPE_E:
3470 rtn = arcmsr_hbaE_get_config(acb);
3472 case ACB_ADAPTER_TYPE_F:
3473 rtn = arcmsr_hbaF_get_config(acb);
3478 acb->maxOutstanding = acb->firm_numbers_queue - 1;
3479 if (acb->host->can_queue >= acb->firm_numbers_queue)
3480 acb->host->can_queue = acb->maxOutstanding;
3482 acb->maxOutstanding = acb->host->can_queue;
3483 acb->maxFreeCCB = acb->host->can_queue;
3484 if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3485 acb->maxFreeCCB += 64;
3489 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3490 struct CommandControlBlock *poll_ccb)
3492 struct MessageUnit_A __iomem *reg = acb->pmuA;
3493 struct CommandControlBlock *ccb;
3494 struct ARCMSR_CDB *arcmsr_cdb;
3495 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3498 unsigned long ccb_cdb_phy;
3500 polling_hba_ccb_retry:
3502 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable;
3503 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/
3505 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) {
3511 if (poll_count > 100){
3515 goto polling_hba_ccb_retry;
3518 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3519 if (acb->cdb_phyadd_hipart)
3520 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3521 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3522 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3523 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3524 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3525 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3526 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3527 " poll command abort successfully \n"
3528 , acb->host->host_no
3529 , ccb->pcmd->device->id
3530 , (u32)ccb->pcmd->device->lun
3532 ccb->pcmd->result = DID_ABORT << 16;
3533 arcmsr_ccb_complete(ccb);
3536 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3537 " command done ccb = '0x%p'"
3538 "ccboutstandingcount = %d \n"
3539 , acb->host->host_no
3541 , atomic_read(&acb->ccboutstandingcount));
3544 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3545 arcmsr_report_ccb_state(acb, ccb, error);
3550 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3551 struct CommandControlBlock *poll_ccb)
3553 struct MessageUnit_B *reg = acb->pmuB;
3554 struct ARCMSR_CDB *arcmsr_cdb;
3555 struct CommandControlBlock *ccb;
3556 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3559 unsigned long ccb_cdb_phy;
3561 polling_hbb_ccb_retry:
3563 /* clear doorbell interrupt */
3564 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3566 index = reg->doneq_index;
3567 flag_ccb = reg->done_qbuffer[index];
3568 if (flag_ccb == 0) {
3574 if (poll_count > 100){
3578 goto polling_hbb_ccb_retry;
3581 reg->done_qbuffer[index] = 0;
3583 /*if last index number set it to 0 */
3584 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3585 reg->doneq_index = index;
3586 /* check if command done with no error*/
3587 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3588 if (acb->cdb_phyadd_hipart)
3589 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3590 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3591 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3592 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3593 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3594 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3595 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3596 " poll command abort successfully \n"
3598 ,ccb->pcmd->device->id
3599 ,(u32)ccb->pcmd->device->lun
3601 ccb->pcmd->result = DID_ABORT << 16;
3602 arcmsr_ccb_complete(ccb);
3605 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3606 " command done ccb = '0x%p'"
3607 "ccboutstandingcount = %d \n"
3608 , acb->host->host_no
3610 , atomic_read(&acb->ccboutstandingcount));
3613 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3614 arcmsr_report_ccb_state(acb, ccb, error);
3619 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3620 struct CommandControlBlock *poll_ccb)
3622 struct MessageUnit_C __iomem *reg = acb->pmuC;
3624 struct ARCMSR_CDB *arcmsr_cdb;
3626 struct CommandControlBlock *pCCB;
3627 uint32_t poll_ccb_done = 0, poll_count = 0;
3629 unsigned long ccb_cdb_phy;
3631 polling_hbc_ccb_retry:
3634 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3635 if (poll_ccb_done) {
3640 if (poll_count > 100) {
3644 goto polling_hbc_ccb_retry;
3647 flag_ccb = readl(®->outbound_queueport_low);
3648 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3649 if (acb->cdb_phyadd_hipart)
3650 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3651 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3652 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3653 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3654 /* check ifcommand done with no error*/
3655 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3656 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3657 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3658 " poll command abort successfully \n"
3659 , acb->host->host_no
3660 , pCCB->pcmd->device->id
3661 , (u32)pCCB->pcmd->device->lun
3663 pCCB->pcmd->result = DID_ABORT << 16;
3664 arcmsr_ccb_complete(pCCB);
3667 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3668 " command done ccb = '0x%p'"
3669 "ccboutstandingcount = %d \n"
3670 , acb->host->host_no
3672 , atomic_read(&acb->ccboutstandingcount));
3675 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3676 arcmsr_report_ccb_state(acb, pCCB, error);
3681 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3682 struct CommandControlBlock *poll_ccb)
3685 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb;
3686 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3687 unsigned long flags, ccb_cdb_phy;
3688 struct ARCMSR_CDB *arcmsr_cdb;
3689 struct CommandControlBlock *pCCB;
3690 struct MessageUnit_D *pmu = acb->pmuD;
3692 polling_hbaD_ccb_retry:
3695 spin_lock_irqsave(&acb->doneq_lock, flags);
3696 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3697 doneq_index = pmu->doneq_index;
3698 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3699 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3700 if (poll_ccb_done) {
3705 if (poll_count > 40) {
3709 goto polling_hbaD_ccb_retry;
3712 toggle = doneq_index & 0x4000;
3713 index_stripped = (doneq_index & 0xFFF) + 1;
3714 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3715 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3716 ((toggle ^ 0x4000) + 1);
3717 doneq_index = pmu->doneq_index;
3718 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3719 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3720 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3721 if (acb->cdb_phyadd_hipart)
3722 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3723 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3725 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3727 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3728 if ((pCCB->acb != acb) ||
3729 (pCCB->startdone != ARCMSR_CCB_START)) {
3730 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3731 pr_notice("arcmsr%d: scsi id = %d "
3732 "lun = %d ccb = '0x%p' poll command "
3733 "abort successfully\n"
3734 , acb->host->host_no
3735 , pCCB->pcmd->device->id
3736 , (u32)pCCB->pcmd->device->lun
3738 pCCB->pcmd->result = DID_ABORT << 16;
3739 arcmsr_ccb_complete(pCCB);
3742 pr_notice("arcmsr%d: polling an illegal "
3743 "ccb command done ccb = '0x%p' "
3744 "ccboutstandingcount = %d\n"
3745 , acb->host->host_no
3747 , atomic_read(&acb->ccboutstandingcount));
3750 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3752 arcmsr_report_ccb_state(acb, pCCB, error);
3757 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3758 struct CommandControlBlock *poll_ccb)
3761 uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3763 unsigned long flags;
3765 struct CommandControlBlock *pCCB;
3766 struct MessageUnit_E __iomem *reg = acb->pmuE;
3768 polling_hbaC_ccb_retry:
3771 spin_lock_irqsave(&acb->doneq_lock, flags);
3772 doneq_index = acb->doneq_index;
3773 if ((readl(®->reply_post_producer_index) & 0xFFFF) ==
3775 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3776 if (poll_ccb_done) {
3781 if (poll_count > 40) {
3785 goto polling_hbaC_ccb_retry;
3788 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3790 if (doneq_index >= acb->completionQ_entry)
3792 acb->doneq_index = doneq_index;
3793 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3794 pCCB = acb->pccb_pool[cmdSMID];
3795 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3796 /* check if command done with no error*/
3797 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3798 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3799 pr_notice("arcmsr%d: scsi id = %d "
3800 "lun = %d ccb = '0x%p' poll command "
3801 "abort successfully\n"
3802 , acb->host->host_no
3803 , pCCB->pcmd->device->id
3804 , (u32)pCCB->pcmd->device->lun
3806 pCCB->pcmd->result = DID_ABORT << 16;
3807 arcmsr_ccb_complete(pCCB);
3810 pr_notice("arcmsr%d: polling an illegal "
3811 "ccb command done ccb = '0x%p' "
3812 "ccboutstandingcount = %d\n"
3813 , acb->host->host_no
3815 , atomic_read(&acb->ccboutstandingcount));
3818 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3819 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3820 arcmsr_report_ccb_state(acb, pCCB, error);
3822 writel(doneq_index, ®->reply_post_consumer_index);
3826 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3827 struct CommandControlBlock *poll_ccb)
3830 switch (acb->adapter_type) {
3832 case ACB_ADAPTER_TYPE_A:
3833 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3835 case ACB_ADAPTER_TYPE_B:
3836 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3838 case ACB_ADAPTER_TYPE_C:
3839 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3841 case ACB_ADAPTER_TYPE_D:
3842 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3844 case ACB_ADAPTER_TYPE_E:
3845 case ACB_ADAPTER_TYPE_F:
3846 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3852 static void arcmsr_set_iop_datetime(struct timer_list *t)
3854 struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3855 unsigned int next_time;
3869 uint32_t msg_time[2];
3873 time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3875 datetime.a.signature = 0x55AA;
3876 datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3877 datetime.a.month = tm.tm_mon;
3878 datetime.a.date = tm.tm_mday;
3879 datetime.a.hour = tm.tm_hour;
3880 datetime.a.minute = tm.tm_min;
3881 datetime.a.second = tm.tm_sec;
3883 switch (pacb->adapter_type) {
3884 case ACB_ADAPTER_TYPE_A: {
3885 struct MessageUnit_A __iomem *reg = pacb->pmuA;
3886 writel(datetime.b.msg_time[0], ®->message_rwbuffer[0]);
3887 writel(datetime.b.msg_time[1], ®->message_rwbuffer[1]);
3888 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3891 case ACB_ADAPTER_TYPE_B: {
3892 uint32_t __iomem *rwbuffer;
3893 struct MessageUnit_B *reg = pacb->pmuB;
3894 rwbuffer = reg->message_rwbuffer;
3895 writel(datetime.b.msg_time[0], rwbuffer++);
3896 writel(datetime.b.msg_time[1], rwbuffer++);
3897 writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3900 case ACB_ADAPTER_TYPE_C: {
3901 struct MessageUnit_C __iomem *reg = pacb->pmuC;
3902 writel(datetime.b.msg_time[0], ®->msgcode_rwbuffer[0]);
3903 writel(datetime.b.msg_time[1], ®->msgcode_rwbuffer[1]);
3904 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3905 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
3908 case ACB_ADAPTER_TYPE_D: {
3909 uint32_t __iomem *rwbuffer;
3910 struct MessageUnit_D *reg = pacb->pmuD;
3911 rwbuffer = reg->msgcode_rwbuffer;
3912 writel(datetime.b.msg_time[0], rwbuffer++);
3913 writel(datetime.b.msg_time[1], rwbuffer++);
3914 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3917 case ACB_ADAPTER_TYPE_E: {
3918 struct MessageUnit_E __iomem *reg = pacb->pmuE;
3919 writel(datetime.b.msg_time[0], ®->msgcode_rwbuffer[0]);
3920 writel(datetime.b.msg_time[1], ®->msgcode_rwbuffer[1]);
3921 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3922 pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3923 writel(pacb->out_doorbell, ®->iobound_doorbell);
3926 case ACB_ADAPTER_TYPE_F: {
3927 struct MessageUnit_F __iomem *reg = pacb->pmuF;
3929 pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
3930 pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
3931 writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, ®->inbound_msgaddr0);
3932 pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3933 writel(pacb->out_doorbell, ®->iobound_doorbell);
3937 if (sys_tz.tz_minuteswest)
3938 next_time = ARCMSR_HOURS;
3940 next_time = ARCMSR_MINUTES;
3941 mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3944 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3946 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3947 dma_addr_t dma_coherent_handle;
3950 ********************************************************************
3951 ** here we need to tell iop 331 our freeccb.HighPart
3952 ** if freeccb.HighPart is not zero
3953 ********************************************************************
3955 switch (acb->adapter_type) {
3956 case ACB_ADAPTER_TYPE_B:
3957 case ACB_ADAPTER_TYPE_D:
3958 dma_coherent_handle = acb->dma_coherent_handle2;
3960 case ACB_ADAPTER_TYPE_E:
3961 case ACB_ADAPTER_TYPE_F:
3962 dma_coherent_handle = acb->dma_coherent_handle +
3963 offsetof(struct CommandControlBlock, arcmsr_cdb);
3966 dma_coherent_handle = acb->dma_coherent_handle;
3969 cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3970 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3971 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3972 acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
3974 ***********************************************************************
3975 ** if adapter type B, set window of "post command Q"
3976 ***********************************************************************
3978 switch (acb->adapter_type) {
3980 case ACB_ADAPTER_TYPE_A: {
3981 if (cdb_phyaddr_hi32 != 0) {
3982 struct MessageUnit_A __iomem *reg = acb->pmuA;
3983 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3984 ®->message_rwbuffer[0]);
3985 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]);
3986 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3987 ®->inbound_msgaddr0);
3988 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3989 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3990 part physical address timeout\n",
3991 acb->host->host_no);
3998 case ACB_ADAPTER_TYPE_B: {
3999 uint32_t __iomem *rwbuffer;
4001 struct MessageUnit_B *reg = acb->pmuB;
4002 reg->postq_index = 0;
4003 reg->doneq_index = 0;
4004 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
4005 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4006 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
4007 acb->host->host_no);
4010 rwbuffer = reg->message_rwbuffer;
4011 /* driver "set config" signature */
4012 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4013 /* normal should be zero */
4014 writel(cdb_phyaddr_hi32, rwbuffer++);
4015 /* postQ size (256 + 8)*4 */
4016 writel(cdb_phyaddr, rwbuffer++);
4017 /* doneQ size (256 + 8)*4 */
4018 writel(cdb_phyaddr + 1056, rwbuffer++);
4019 /* ccb maxQ size must be --> [(256 + 8)*4]*/
4020 writel(1056, rwbuffer);
4022 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
4023 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4024 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4025 timeout \n",acb->host->host_no);
4028 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
4029 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4030 pr_err("arcmsr%d: can't set driver mode.\n",
4031 acb->host->host_no);
4036 case ACB_ADAPTER_TYPE_C: {
4037 struct MessageUnit_C __iomem *reg = acb->pmuC;
4039 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
4040 acb->adapter_index, cdb_phyaddr_hi32);
4041 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]);
4042 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]);
4043 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
4044 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
4045 if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
4046 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4047 timeout \n", acb->host->host_no);
4052 case ACB_ADAPTER_TYPE_D: {
4053 uint32_t __iomem *rwbuffer;
4054 struct MessageUnit_D *reg = acb->pmuD;
4055 reg->postq_index = 0;
4056 reg->doneq_index = 0;
4057 rwbuffer = reg->msgcode_rwbuffer;
4058 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4059 writel(cdb_phyaddr_hi32, rwbuffer++);
4060 writel(cdb_phyaddr, rwbuffer++);
4061 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
4062 sizeof(struct InBound_SRB)), rwbuffer++);
4063 writel(0x100, rwbuffer);
4064 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
4065 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
4066 pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4067 acb->host->host_no);
4072 case ACB_ADAPTER_TYPE_E: {
4073 struct MessageUnit_E __iomem *reg = acb->pmuE;
4074 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]);
4075 writel(ARCMSR_SIGNATURE_1884, ®->msgcode_rwbuffer[1]);
4076 writel(cdb_phyaddr, ®->msgcode_rwbuffer[2]);
4077 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[3]);
4078 writel(acb->ccbsize, ®->msgcode_rwbuffer[4]);
4079 writel(lower_32_bits(acb->dma_coherent_handle2), ®->msgcode_rwbuffer[5]);
4080 writel(upper_32_bits(acb->dma_coherent_handle2), ®->msgcode_rwbuffer[6]);
4081 writel(acb->ioqueue_size, ®->msgcode_rwbuffer[7]);
4082 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
4083 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4084 writel(acb->out_doorbell, ®->iobound_doorbell);
4085 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4086 pr_notice("arcmsr%d: 'set command Q window' timeout \n",
4087 acb->host->host_no);
4092 case ACB_ADAPTER_TYPE_F: {
4093 struct MessageUnit_F __iomem *reg = acb->pmuF;
4095 acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
4096 acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
4097 acb->msgcode_rwbuffer[2] = cdb_phyaddr;
4098 acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
4099 acb->msgcode_rwbuffer[4] = acb->ccbsize;
4100 acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
4101 acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
4102 acb->msgcode_rwbuffer[7] = acb->completeQ_size;
4103 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
4104 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4105 writel(acb->out_doorbell, ®->iobound_doorbell);
4106 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4107 pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4108 acb->host->host_no);
4117 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
4119 uint32_t firmware_state = 0;
4120 switch (acb->adapter_type) {
4122 case ACB_ADAPTER_TYPE_A: {
4123 struct MessageUnit_A __iomem *reg = acb->pmuA;
4125 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4127 firmware_state = readl(®->outbound_msgaddr1);
4128 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
4132 case ACB_ADAPTER_TYPE_B: {
4133 struct MessageUnit_B *reg = acb->pmuB;
4135 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4137 firmware_state = readl(reg->iop2drv_doorbell);
4138 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
4139 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
4142 case ACB_ADAPTER_TYPE_C: {
4143 struct MessageUnit_C __iomem *reg = acb->pmuC;
4145 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4147 firmware_state = readl(®->outbound_msgaddr1);
4148 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
4151 case ACB_ADAPTER_TYPE_D: {
4152 struct MessageUnit_D *reg = acb->pmuD;
4154 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4156 firmware_state = readl(reg->outbound_msgaddr1);
4157 } while ((firmware_state &
4158 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
4161 case ACB_ADAPTER_TYPE_E:
4162 case ACB_ADAPTER_TYPE_F: {
4163 struct MessageUnit_E __iomem *reg = acb->pmuE;
4165 if (!(acb->acb_flags & ACB_F_IOP_INITED))
4167 firmware_state = readl(®->outbound_msgaddr1);
4168 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
4174 static void arcmsr_request_device_map(struct timer_list *t)
4176 struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
4177 if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG | ACB_F_BUS_RESET | ACB_F_ABORT)) {
4178 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4180 acb->fw_flag = FW_NORMAL;
4181 switch (acb->adapter_type) {
4182 case ACB_ADAPTER_TYPE_A: {
4183 struct MessageUnit_A __iomem *reg = acb->pmuA;
4184 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4187 case ACB_ADAPTER_TYPE_B: {
4188 struct MessageUnit_B *reg = acb->pmuB;
4189 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
4192 case ACB_ADAPTER_TYPE_C: {
4193 struct MessageUnit_C __iomem *reg = acb->pmuC;
4194 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4195 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
4198 case ACB_ADAPTER_TYPE_D: {
4199 struct MessageUnit_D *reg = acb->pmuD;
4200 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
4203 case ACB_ADAPTER_TYPE_E: {
4204 struct MessageUnit_E __iomem *reg = acb->pmuE;
4205 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4206 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4207 writel(acb->out_doorbell, ®->iobound_doorbell);
4210 case ACB_ADAPTER_TYPE_F: {
4211 struct MessageUnit_F __iomem *reg = acb->pmuF;
4212 uint32_t outMsg1 = readl(®->outbound_msgaddr1);
4214 if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) ||
4215 (outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
4217 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
4218 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4219 writel(acb->out_doorbell, ®->iobound_doorbell);
4225 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
4227 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4231 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
4233 struct MessageUnit_A __iomem *reg = acb->pmuA;
4234 acb->acb_flags |= ACB_F_MSG_START_BGRB;
4235 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0);
4236 if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4237 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4238 rebuild' timeout \n", acb->host->host_no);
4242 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
4244 struct MessageUnit_B *reg = acb->pmuB;
4245 acb->acb_flags |= ACB_F_MSG_START_BGRB;
4246 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
4247 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4248 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4249 rebuild' timeout \n",acb->host->host_no);
4253 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
4255 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
4256 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4257 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
4258 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
4259 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
4260 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4261 rebuild' timeout \n", pACB->host->host_no);
4266 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
4268 struct MessageUnit_D *pmu = pACB->pmuD;
4270 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4271 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
4272 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
4273 pr_notice("arcmsr%d: wait 'start adapter "
4274 "background rebuild' timeout\n", pACB->host->host_no);
4278 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4280 struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4282 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4283 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4284 pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4285 writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4286 if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4287 pr_notice("arcmsr%d: wait 'start adapter "
4288 "background rebuild' timeout \n", pACB->host->host_no);
4292 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4294 switch (acb->adapter_type) {
4295 case ACB_ADAPTER_TYPE_A:
4296 arcmsr_hbaA_start_bgrb(acb);
4298 case ACB_ADAPTER_TYPE_B:
4299 arcmsr_hbaB_start_bgrb(acb);
4301 case ACB_ADAPTER_TYPE_C:
4302 arcmsr_hbaC_start_bgrb(acb);
4304 case ACB_ADAPTER_TYPE_D:
4305 arcmsr_hbaD_start_bgrb(acb);
4307 case ACB_ADAPTER_TYPE_E:
4308 case ACB_ADAPTER_TYPE_F:
4309 arcmsr_hbaE_start_bgrb(acb);
4314 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4316 switch (acb->adapter_type) {
4317 case ACB_ADAPTER_TYPE_A: {
4318 struct MessageUnit_A __iomem *reg = acb->pmuA;
4319 uint32_t outbound_doorbell;
4320 /* empty doorbell Qbuffer if door bell ringed */
4321 outbound_doorbell = readl(®->outbound_doorbell);
4322 /*clear doorbell interrupt */
4323 writel(outbound_doorbell, ®->outbound_doorbell);
4324 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
4328 case ACB_ADAPTER_TYPE_B: {
4329 struct MessageUnit_B *reg = acb->pmuB;
4330 uint32_t outbound_doorbell, i;
4331 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4332 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4333 /* let IOP know data has been read */
4334 for(i=0; i < 200; i++) {
4336 outbound_doorbell = readl(reg->iop2drv_doorbell);
4337 if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4338 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4339 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4345 case ACB_ADAPTER_TYPE_C: {
4346 struct MessageUnit_C __iomem *reg = acb->pmuC;
4347 uint32_t outbound_doorbell, i;
4348 /* empty doorbell Qbuffer if door bell ringed */
4349 outbound_doorbell = readl(®->outbound_doorbell);
4350 writel(outbound_doorbell, ®->outbound_doorbell_clear);
4351 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
4352 for (i = 0; i < 200; i++) {
4354 outbound_doorbell = readl(®->outbound_doorbell);
4355 if (outbound_doorbell &
4356 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4357 writel(outbound_doorbell,
4358 ®->outbound_doorbell_clear);
4359 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4360 ®->inbound_doorbell);
4366 case ACB_ADAPTER_TYPE_D: {
4367 struct MessageUnit_D *reg = acb->pmuD;
4368 uint32_t outbound_doorbell, i;
4369 /* empty doorbell Qbuffer if door bell ringed */
4370 outbound_doorbell = readl(reg->outbound_doorbell);
4371 writel(outbound_doorbell, reg->outbound_doorbell);
4372 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4373 reg->inbound_doorbell);
4374 for (i = 0; i < 200; i++) {
4376 outbound_doorbell = readl(reg->outbound_doorbell);
4377 if (outbound_doorbell &
4378 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4379 writel(outbound_doorbell,
4380 reg->outbound_doorbell);
4381 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4382 reg->inbound_doorbell);
4388 case ACB_ADAPTER_TYPE_E:
4389 case ACB_ADAPTER_TYPE_F: {
4390 struct MessageUnit_E __iomem *reg = acb->pmuE;
4393 acb->in_doorbell = readl(®->iobound_doorbell);
4394 writel(0, ®->host_int_status); /*clear interrupt*/
4395 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4396 writel(acb->out_doorbell, ®->iobound_doorbell);
4397 for(i=0; i < 200; i++) {
4399 tmp = acb->in_doorbell;
4400 acb->in_doorbell = readl(®->iobound_doorbell);
4401 if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4402 writel(0, ®->host_int_status); /*clear interrupt*/
4403 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4404 writel(acb->out_doorbell, ®->iobound_doorbell);
4413 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4415 switch (acb->adapter_type) {
4416 case ACB_ADAPTER_TYPE_A:
4418 case ACB_ADAPTER_TYPE_B:
4420 struct MessageUnit_B *reg = acb->pmuB;
4421 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4422 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4423 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4428 case ACB_ADAPTER_TYPE_C:
4434 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4438 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4439 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4440 struct MessageUnit_D *pmuD = acb->pmuD;
4442 /* backup pci config data */
4443 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4444 for (i = 0; i < 64; i++) {
4445 pci_read_config_byte(acb->pdev, i, &value[i]);
4447 /* hardware reset signal */
4448 if (acb->dev_id == 0x1680) {
4449 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4450 } else if (acb->dev_id == 0x1880) {
4453 writel(0xF, &pmuC->write_sequence);
4454 writel(0x4, &pmuC->write_sequence);
4455 writel(0xB, &pmuC->write_sequence);
4456 writel(0x2, &pmuC->write_sequence);
4457 writel(0x7, &pmuC->write_sequence);
4458 writel(0xD, &pmuC->write_sequence);
4459 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4460 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4461 } else if (acb->dev_id == 0x1884) {
4462 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4465 writel(0x4, &pmuE->write_sequence_3xxx);
4466 writel(0xB, &pmuE->write_sequence_3xxx);
4467 writel(0x2, &pmuE->write_sequence_3xxx);
4468 writel(0x7, &pmuE->write_sequence_3xxx);
4469 writel(0xD, &pmuE->write_sequence_3xxx);
4471 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4472 ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4473 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4474 } else if (acb->dev_id == 0x1214) {
4475 writel(0x20, pmuD->reset_request);
4477 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4480 /* write back pci config data */
4481 for (i = 0; i < 64; i++) {
4482 pci_write_config_byte(acb->pdev, i, value[i]);
4488 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4492 switch(acb->adapter_type) {
4493 case ACB_ADAPTER_TYPE_A:{
4494 struct MessageUnit_A __iomem *reg = acb->pmuA;
4495 rtn = ((readl(®->outbound_msgaddr1) &
4496 ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4499 case ACB_ADAPTER_TYPE_B:{
4500 struct MessageUnit_B *reg = acb->pmuB;
4501 rtn = ((readl(reg->iop2drv_doorbell) &
4502 ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4505 case ACB_ADAPTER_TYPE_C:{
4506 struct MessageUnit_C __iomem *reg = acb->pmuC;
4507 rtn = (readl(®->host_diagnostic) & 0x04) ? true : false;
4510 case ACB_ADAPTER_TYPE_D:{
4511 struct MessageUnit_D *reg = acb->pmuD;
4512 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4516 case ACB_ADAPTER_TYPE_E:
4517 case ACB_ADAPTER_TYPE_F:{
4518 struct MessageUnit_E __iomem *reg = acb->pmuE;
4519 rtn = (readl(®->host_diagnostic_3xxx) &
4520 ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4527 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4529 uint32_t intmask_org;
4530 /* disable all outbound interrupt */
4531 intmask_org = arcmsr_disable_outbound_ints(acb);
4532 arcmsr_wait_firmware_ready(acb);
4533 arcmsr_iop_confirm(acb);
4534 /*start background rebuild*/
4535 arcmsr_start_adapter_bgrb(acb);
4536 /* empty doorbell Qbuffer if door bell ringed */
4537 arcmsr_clear_doorbell_queue_buffer(acb);
4538 arcmsr_enable_eoi_mode(acb);
4539 /* enable outbound Post Queue,outbound doorbell Interrupt */
4540 arcmsr_enable_outbound_ints(acb, intmask_org);
4541 acb->acb_flags |= ACB_F_IOP_INITED;
4544 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4546 struct CommandControlBlock *ccb;
4547 uint32_t intmask_org;
4548 uint8_t rtnval = 0x00;
4550 unsigned long flags;
4552 if (atomic_read(&acb->ccboutstandingcount) != 0) {
4553 /* disable all outbound interrupt */
4554 intmask_org = arcmsr_disable_outbound_ints(acb);
4555 /* talk to iop 331 outstanding command aborted */
4556 rtnval = arcmsr_abort_allcmd(acb);
4557 /* clear all outbound posted Q */
4558 arcmsr_done4abort_postqueue(acb);
4559 for (i = 0; i < acb->maxFreeCCB; i++) {
4560 ccb = acb->pccb_pool[i];
4561 if (ccb->startdone == ARCMSR_CCB_START) {
4562 scsi_dma_unmap(ccb->pcmd);
4563 ccb->startdone = ARCMSR_CCB_DONE;
4565 spin_lock_irqsave(&acb->ccblist_lock, flags);
4566 list_add_tail(&ccb->list, &acb->ccb_free_list);
4567 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4570 atomic_set(&acb->ccboutstandingcount, 0);
4571 /* enable all outbound interrupt */
4572 arcmsr_enable_outbound_ints(acb, intmask_org);
4578 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4580 struct AdapterControlBlock *acb;
4581 int retry_count = 0;
4583 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4584 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4586 pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4587 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4590 if (acb->acb_flags & ACB_F_BUS_RESET) {
4592 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4593 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4594 & ACB_F_BUS_RESET) == 0, 220 * HZ);
4598 acb->acb_flags |= ACB_F_BUS_RESET;
4599 if (!arcmsr_iop_reset(acb)) {
4600 arcmsr_hardware_reset(acb);
4601 acb->acb_flags &= ~ACB_F_IOP_INITED;
4603 ssleep(ARCMSR_SLEEPTIME);
4604 if (arcmsr_reset_in_progress(acb)) {
4605 if (retry_count > ARCMSR_RETRYCOUNT) {
4606 acb->fw_flag = FW_DEADLOCK;
4607 pr_notice("arcmsr%d: waiting for hw bus reset"
4608 " return, RETRY TERMINATED!!\n",
4609 acb->host->host_no);
4613 goto wait_reset_done;
4615 arcmsr_iop_init(acb);
4616 acb->fw_flag = FW_NORMAL;
4617 mod_timer(&acb->eternal_timer, jiffies +
4618 msecs_to_jiffies(6 * HZ));
4619 acb->acb_flags &= ~ACB_F_BUS_RESET;
4621 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4623 acb->acb_flags &= ~ACB_F_BUS_RESET;
4624 acb->fw_flag = FW_NORMAL;
4625 mod_timer(&acb->eternal_timer, jiffies +
4626 msecs_to_jiffies(6 * HZ));
4632 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4633 struct CommandControlBlock *ccb)
4636 rtn = arcmsr_polling_ccbdone(acb, ccb);
4640 static int arcmsr_abort(struct scsi_cmnd *cmd)
4642 struct AdapterControlBlock *acb =
4643 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4646 uint32_t intmask_org;
4648 if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4651 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4652 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4653 acb->acb_flags |= ACB_F_ABORT;
4656 ************************************************
4657 ** the all interrupt service routine is locked
4658 ** we need to handle it as soon as possible and exit
4659 ************************************************
4661 if (!atomic_read(&acb->ccboutstandingcount)) {
4662 acb->acb_flags &= ~ACB_F_ABORT;
4666 intmask_org = arcmsr_disable_outbound_ints(acb);
4667 for (i = 0; i < acb->maxFreeCCB; i++) {
4668 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4669 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4670 ccb->startdone = ARCMSR_CCB_ABORTED;
4671 rtn = arcmsr_abort_one_cmd(acb, ccb);
4675 acb->acb_flags &= ~ACB_F_ABORT;
4676 arcmsr_enable_outbound_ints(acb, intmask_org);
4680 static const char *arcmsr_info(struct Scsi_Host *host)
4682 struct AdapterControlBlock *acb =
4683 (struct AdapterControlBlock *) host->hostdata;
4684 static char buf[256];
4687 switch (acb->pdev->device) {
4688 case PCI_DEVICE_ID_ARECA_1110:
4689 case PCI_DEVICE_ID_ARECA_1200:
4690 case PCI_DEVICE_ID_ARECA_1202:
4691 case PCI_DEVICE_ID_ARECA_1210:
4694 case PCI_DEVICE_ID_ARECA_1120:
4695 case PCI_DEVICE_ID_ARECA_1130:
4696 case PCI_DEVICE_ID_ARECA_1160:
4697 case PCI_DEVICE_ID_ARECA_1170:
4698 case PCI_DEVICE_ID_ARECA_1201:
4699 case PCI_DEVICE_ID_ARECA_1203:
4700 case PCI_DEVICE_ID_ARECA_1220:
4701 case PCI_DEVICE_ID_ARECA_1230:
4702 case PCI_DEVICE_ID_ARECA_1260:
4703 case PCI_DEVICE_ID_ARECA_1270:
4704 case PCI_DEVICE_ID_ARECA_1280:
4707 case PCI_DEVICE_ID_ARECA_1214:
4708 case PCI_DEVICE_ID_ARECA_1380:
4709 case PCI_DEVICE_ID_ARECA_1381:
4710 case PCI_DEVICE_ID_ARECA_1680:
4711 case PCI_DEVICE_ID_ARECA_1681:
4712 case PCI_DEVICE_ID_ARECA_1880:
4713 case PCI_DEVICE_ID_ARECA_1884:
4716 case PCI_DEVICE_ID_ARECA_1886:
4717 type = "NVMe/SAS/SATA";
4724 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4725 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);