drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.rst
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/aer.h>
  61 #include <linux/circ_buf.h>
  62 #include <asm/dma.h>
  63 #include <asm/io.h>
  64 #include <linux/uaccess.h>
  65 #include <scsi/scsi_host.h>
  66 #include <scsi/scsi.h>
  67 #include <scsi/scsi_cmnd.h>
  68 #include <scsi/scsi_tcq.h>
  69 #include <scsi/scsi_device.h>
  70 #include <scsi/scsi_transport.h>
  71 #include <scsi/scsicam.h>
  72 #include "arcmsr.h"
  73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  75 MODULE_LICENSE("Dual BSD/GPL");
  76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  77
  78 static int msix_enable = 1;
  79 module_param(msix_enable, int, S_IRUGO);
  80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  81
  82 static int msi_enable = 1;
  83 module_param(msi_enable, int, S_IRUGO);
  84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  85
  86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  87 module_param(host_can_queue, int, S_IRUGO);
  88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  89
  90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  91 module_param(cmd_per_lun, int, S_IRUGO);
  92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  93
  94 static int dma_mask_64 = 0;
  95 module_param(dma_mask_64, int, S_IRUGO);
  96 MODULE_PARM_DESC(dma_mask_64, " set DMA mask to 64 bits(0 ~ 1), dma_mask_64=1(64 bits), =0(32 bits)");
  97
  98 static int set_date_time = 0;
  99 module_param(set_date_time, int, S_IRUGO);
 100 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
 101
 102 static int cmd_timeout = ARCMSR_DEFAULT_TIMEOUT;
 103 module_param(cmd_timeout, int, S_IRUGO);
 104 MODULE_PARM_DESC(cmd_timeout, " scsi cmd timeout(0 ~ 120 sec.), default is 90");
 105
 106 #define ARCMSR_SLEEPTIME        10
 107 #define ARCMSR_RETRYCOUNT       12
 108
 109 static wait_queue_head_t wait_q;
 110 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 111                                         struct scsi_cmnd *cmd);
 112 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 113 static int arcmsr_abort(struct scsi_cmnd *);
 114 static int arcmsr_bus_reset(struct scsi_cmnd *);
 115 static int arcmsr_bios_param(struct scsi_device *sdev,
 116                 struct block_device *bdev, sector_t capacity, int *info);
 117 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 118 static int arcmsr_probe(struct pci_dev *pdev,
 119                                 const struct pci_device_id *id);
 120 static int __maybe_unused arcmsr_suspend(struct device *dev);
 121 static int __maybe_unused arcmsr_resume(struct device *dev);
 122 static void arcmsr_remove(struct pci_dev *pdev);
 123 static void arcmsr_shutdown(struct pci_dev *pdev);
 124 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 125 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 126 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 127 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 128         u32 intmask_org);
 129 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 131 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 132 static void arcmsr_request_device_map(struct timer_list *t);
 133 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 134 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 135 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 136 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 137 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 138 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 139 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 140 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
 141 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 142 static const char *arcmsr_info(struct Scsi_Host *);
 143 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 144 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 145 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 146 static void arcmsr_set_iop_datetime(struct timer_list *);
 147 static int arcmsr_slave_config(struct scsi_device *sdev);
 148 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 149 {
 150         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 151                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 152         return scsi_change_queue_depth(sdev, queue_depth);
 153 }
 154
 155 static struct scsi_host_template arcmsr_scsi_host_template = {
 156         .module                 = THIS_MODULE,
 157         .name                   = "Areca SAS/SATA RAID driver",
 158         .info                   = arcmsr_info,
 159         .queuecommand           = arcmsr_queue_command,
 160         .eh_abort_handler       = arcmsr_abort,
 161         .eh_bus_reset_handler   = arcmsr_bus_reset,
 162         .bios_param             = arcmsr_bios_param,
 163         .slave_configure        = arcmsr_slave_config,
 164         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 165         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 166         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 167         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 168         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 169         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 170         .shost_groups           = arcmsr_host_groups,
 171         .no_write_same          = 1,
 172 };
 173
 174 static struct pci_device_id arcmsr_device_id_table[] = {
 175         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 176                 .driver_data = ACB_ADAPTER_TYPE_A},
 177         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 178                 .driver_data = ACB_ADAPTER_TYPE_A},
 179         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 180                 .driver_data = ACB_ADAPTER_TYPE_A},
 181         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 182                 .driver_data = ACB_ADAPTER_TYPE_A},
 183         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 184                 .driver_data = ACB_ADAPTER_TYPE_A},
 185         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 186                 .driver_data = ACB_ADAPTER_TYPE_B},
 187         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 188                 .driver_data = ACB_ADAPTER_TYPE_B},
 189         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 190                 .driver_data = ACB_ADAPTER_TYPE_B},
 191         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 192                 .driver_data = ACB_ADAPTER_TYPE_B},
 193         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 194                 .driver_data = ACB_ADAPTER_TYPE_A},
 195         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 196                 .driver_data = ACB_ADAPTER_TYPE_D},
 197         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 198                 .driver_data = ACB_ADAPTER_TYPE_A},
 199         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 200                 .driver_data = ACB_ADAPTER_TYPE_A},
 201         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 202                 .driver_data = ACB_ADAPTER_TYPE_A},
 203         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 204                 .driver_data = ACB_ADAPTER_TYPE_A},
 205         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 206                 .driver_data = ACB_ADAPTER_TYPE_A},
 207         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 208                 .driver_data = ACB_ADAPTER_TYPE_A},
 209         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 210                 .driver_data = ACB_ADAPTER_TYPE_A},
 211         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 212                 .driver_data = ACB_ADAPTER_TYPE_A},
 213         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 214                 .driver_data = ACB_ADAPTER_TYPE_A},
 215         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 216                 .driver_data = ACB_ADAPTER_TYPE_C},
 217         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 218                 .driver_data = ACB_ADAPTER_TYPE_E},
 219         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
 220                 .driver_data = ACB_ADAPTER_TYPE_F},
 221         {0, 0}, /* Terminating entry */
 222 };
 223 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 224
 225 static SIMPLE_DEV_PM_OPS(arcmsr_pm_ops, arcmsr_suspend, arcmsr_resume);
 226
 227 static struct pci_driver arcmsr_pci_driver = {
 228         .name                   = "arcmsr",
 229         .id_table               = arcmsr_device_id_table,
 230         .probe                  = arcmsr_probe,
 231         .remove                 = arcmsr_remove,
 232         .driver.pm              = &arcmsr_pm_ops,
 233         .shutdown               = arcmsr_shutdown,
 234 };
 235 /*
 236 ****************************************************************************
 237 ****************************************************************************
 238 */
 239
 240 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
 241 {
 242         switch (acb->adapter_type) {
 243         case ACB_ADAPTER_TYPE_B:
 244         case ACB_ADAPTER_TYPE_D:
 245         case ACB_ADAPTER_TYPE_E:
 246         case ACB_ADAPTER_TYPE_F:
 247                 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
 248                         acb->dma_coherent2, acb->dma_coherent_handle2);
 249                 break;
 250         }
 251 }
 252
 253 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 254 {
 255         struct pci_dev *pdev = acb->pdev;
 256         switch (acb->adapter_type){
 257         case ACB_ADAPTER_TYPE_A:{
 258                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 259                 if (!acb->pmuA) {
 260                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 261                         return false;
 262                 }
 263                 break;
 264         }
 265         case ACB_ADAPTER_TYPE_B:{
 266                 void __iomem *mem_base0, *mem_base1;
 267                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 268                 if (!mem_base0) {
 269                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 270                         return false;
 271                 }
 272                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 273                 if (!mem_base1) {
 274                         iounmap(mem_base0);
 275                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 276                         return false;
 277                 }
 278                 acb->mem_base0 = mem_base0;
 279                 acb->mem_base1 = mem_base1;
 280                 break;
 281         }
 282         case ACB_ADAPTER_TYPE_C:{
 283                 acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 284                 if (!acb->pmuC) {
 285                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 286                         return false;
 287                 }
 288                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 289                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 290                         return true;
 291                 }
 292                 break;
 293         }
 294         case ACB_ADAPTER_TYPE_D: {
 295                 void __iomem *mem_base0;
 296                 unsigned long addr, range;
 297
 298                 addr = (unsigned long)pci_resource_start(pdev, 0);
 299                 range = pci_resource_len(pdev, 0);
 300                 mem_base0 = ioremap(addr, range);
 301                 if (!mem_base0) {
 302                         pr_notice("arcmsr%d: memory mapping region fail\n",
 303                                 acb->host->host_no);
 304                         return false;
 305                 }
 306                 acb->mem_base0 = mem_base0;
 307                 break;
 308                 }
 309         case ACB_ADAPTER_TYPE_E: {
 310                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 311                         pci_resource_len(pdev, 1));
 312                 if (!acb->pmuE) {
 313                         pr_notice("arcmsr%d: memory mapping region fail \n",
 314                                 acb->host->host_no);
 315                         return false;
 316                 }
 317                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 318                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 319                 acb->in_doorbell = 0;
 320                 acb->out_doorbell = 0;
 321                 break;
 322                 }
 323         case ACB_ADAPTER_TYPE_F: {
 324                 acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 325                 if (!acb->pmuF) {
 326                         pr_notice("arcmsr%d: memory mapping region fail\n",
 327                                 acb->host->host_no);
 328                         return false;
 329                 }
 330                 writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
 331                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
 332                 acb->in_doorbell = 0;
 333                 acb->out_doorbell = 0;
 334                 break;
 335                 }
 336         }
 337         return true;
 338 }
 339
 340 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 341 {
 342         switch (acb->adapter_type) {
 343         case ACB_ADAPTER_TYPE_A:
 344                 iounmap(acb->pmuA);
 345                 break;
 346         case ACB_ADAPTER_TYPE_B:
 347                 iounmap(acb->mem_base0);
 348                 iounmap(acb->mem_base1);
 349                 break;
 350         case ACB_ADAPTER_TYPE_C:
 351                 iounmap(acb->pmuC);
 352                 break;
 353         case ACB_ADAPTER_TYPE_D:
 354                 iounmap(acb->mem_base0);
 355                 break;
 356         case ACB_ADAPTER_TYPE_E:
 357                 iounmap(acb->pmuE);
 358                 break;
 359         case ACB_ADAPTER_TYPE_F:
 360                 iounmap(acb->pmuF);
 361                 break;
 362         }
 363 }
 364
 365 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 366 {
 367         irqreturn_t handle_state;
 368         struct AdapterControlBlock *acb = dev_id;
 369
 370         handle_state = arcmsr_interrupt(acb);
 371         return handle_state;
 372 }
 373
 374 static int arcmsr_bios_param(struct scsi_device *sdev,
 375                 struct block_device *bdev, sector_t capacity, int *geom)
 376 {
 377         int heads, sectors, cylinders, total_capacity;
 378
 379         if (scsi_partsize(bdev, capacity, geom))
 380                 return 0;
 381
 382         total_capacity = capacity;
 383         heads = 64;
 384         sectors = 32;
 385         cylinders = total_capacity / (heads * sectors);
 386         if (cylinders > 1024) {
 387                 heads = 255;
 388                 sectors = 63;
 389                 cylinders = total_capacity / (heads * sectors);
 390         }
 391         geom[0] = heads;
 392         geom[1] = sectors;
 393         geom[2] = cylinders;
 394         return 0;
 395 }
 396
 397 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 398 {
 399         struct MessageUnit_A __iomem *reg = acb->pmuA;
 400         int i;
 401
 402         for (i = 0; i < 2000; i++) {
 403                 if (readl(&reg->outbound_intstatus) &
 404                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 405                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 406                                 &reg->outbound_intstatus);
 407                         return true;
 408                 }
 409                 msleep(10);
 410         } /* max 20 seconds */
 411
 412         return false;
 413 }
 414
 415 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 416 {
 417         struct MessageUnit_B *reg = acb->pmuB;
 418         int i;
 419
 420         for (i = 0; i < 2000; i++) {
 421                 if (readl(reg->iop2drv_doorbell)
 422                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 423                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 424                                         reg->iop2drv_doorbell);
 425                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 426                                         reg->drv2iop_doorbell);
 427                         return true;
 428                 }
 429                 msleep(10);
 430         } /* max 20 seconds */
 431
 432         return false;
 433 }
 434
 435 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 436 {
 437         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 438         int i;
 439
 440         for (i = 0; i < 2000; i++) {
 441                 if (readl(&phbcmu->outbound_doorbell)
 442                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 443                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 444                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 445                         return true;
 446                 }
 447                 msleep(10);
 448         } /* max 20 seconds */
 449
 450         return false;
 451 }
 452
 453 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 454 {
 455         struct MessageUnit_D *reg = pACB->pmuD;
 456         int i;
 457
 458         for (i = 0; i < 2000; i++) {
 459                 if (readl(reg->outbound_doorbell)
 460                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 461                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 462                                 reg->outbound_doorbell);
 463                         return true;
 464                 }
 465                 msleep(10);
 466         } /* max 20 seconds */
 467         return false;
 468 }
 469
 470 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 471 {
 472         int i;
 473         uint32_t read_doorbell;
 474         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 475
 476         for (i = 0; i < 2000; i++) {
 477                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 478                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 479                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 480                         pACB->in_doorbell = read_doorbell;
 481                         return true;
 482                 }
 483                 msleep(10);
 484         } /* max 20 seconds */
 485         return false;
 486 }
 487
 488 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 489 {
 490         struct MessageUnit_A __iomem *reg = acb->pmuA;
 491         int retry_count = 30;
 492         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 493         do {
 494                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 495                         break;
 496                 else {
 497                         retry_count--;
 498                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 499                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 500                 }
 501         } while (retry_count != 0);
 502 }
 503
 504 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 505 {
 506         struct MessageUnit_B *reg = acb->pmuB;
 507         int retry_count = 30;
 508         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 509         do {
 510                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 511                         break;
 512                 else {
 513                         retry_count--;
 514                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 515                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 516                 }
 517         } while (retry_count != 0);
 518 }
 519
 520 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 521 {
 522         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 523         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 524         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 525         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 526         do {
 527                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 528                         break;
 529                 } else {
 530                         retry_count--;
 531                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 532                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 533                 }
 534         } while (retry_count != 0);
 535         return;
 536 }
 537
 538 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 539 {
 540         int retry_count = 15;
 541         struct MessageUnit_D *reg = pACB->pmuD;
 542
 543         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 544         do {
 545                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 546                         break;
 547
 548                 retry_count--;
 549                 pr_notice("arcmsr%d: wait 'flush adapter "
 550                         "cache' timeout, retry count down = %d\n",
 551                         pACB->host->host_no, retry_count);
 552         } while (retry_count != 0);
 553 }
 554
 555 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 556 {
 557         int retry_count = 30;
 558         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 559
 560         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 561         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 562         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 563         do {
 564                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 565                         break;
 566                 retry_count--;
 567                 pr_notice("arcmsr%d: wait 'flush adapter "
 568                         "cache' timeout, retry count down = %d\n",
 569                         pACB->host->host_no, retry_count);
 570         } while (retry_count != 0);
 571 }
 572
 573 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 574 {
 575         switch (acb->adapter_type) {
 576
 577         case ACB_ADAPTER_TYPE_A:
 578                 arcmsr_hbaA_flush_cache(acb);
 579                 break;
 580         case ACB_ADAPTER_TYPE_B:
 581                 arcmsr_hbaB_flush_cache(acb);
 582                 break;
 583         case ACB_ADAPTER_TYPE_C:
 584                 arcmsr_hbaC_flush_cache(acb);
 585                 break;
 586         case ACB_ADAPTER_TYPE_D:
 587                 arcmsr_hbaD_flush_cache(acb);
 588                 break;
 589         case ACB_ADAPTER_TYPE_E:
 590         case ACB_ADAPTER_TYPE_F:
 591                 arcmsr_hbaE_flush_cache(acb);
 592                 break;
 593         }
 594 }
 595
 596 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
 597 {
 598         struct MessageUnit_B *reg = acb->pmuB;
 599
 600         if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 601                 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 602                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 603                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 604                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 605         } else {
 606                 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 607                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 608                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 609                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 610         }
 611         reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 612         reg->message_rbuffer =  MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 613         reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 614 }
 615
 616 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
 617 {
 618         struct MessageUnit_D *reg = acb->pmuD;
 619
 620         reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 621         reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 622         reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 623         reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 624         reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 625         reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 626         reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 627         reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 628         reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 629         reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 630         reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 631         reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 632         reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 633         reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 634         reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 635         reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 636         reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 637         reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 638         reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 639         reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 640         reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 641         reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 642         reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 643         reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 644         reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 645         reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 646 }
 647
 648 static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
 649 {
 650         dma_addr_t host_buffer_dma;
 651         struct MessageUnit_F __iomem *pmuF;
 652
 653         memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
 654         acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
 655                 acb->completeQ_size, 4);
 656         acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
 657         acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
 658         memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
 659         host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
 660         pmuF = acb->pmuF;
 661         /* host buffer low address, bit0:1 all buffer active */
 662         writel(lower_32_bits(host_buffer_dma | 1), &pmuF->inbound_msgaddr0);
 663         /* host buffer high address */
 664         writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
 665         /* set host buffer physical address */
 666         writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
 667 }
 668
 669 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 670 {
 671         bool rtn = true;
 672         void *dma_coherent;
 673         dma_addr_t dma_coherent_handle;
 674         struct pci_dev *pdev = acb->pdev;
 675
 676         switch (acb->adapter_type) {
 677         case ACB_ADAPTER_TYPE_B: {
 678                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
 679                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 680                         &dma_coherent_handle, GFP_KERNEL);
 681                 if (!dma_coherent) {
 682                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 683                         return false;
 684                 }
 685                 acb->dma_coherent_handle2 = dma_coherent_handle;
 686                 acb->dma_coherent2 = dma_coherent;
 687                 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
 688                 arcmsr_hbaB_assign_regAddr(acb);
 689                 }
 690                 break;
 691         case ACB_ADAPTER_TYPE_D: {
 692                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
 693                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 694                         &dma_coherent_handle, GFP_KERNEL);
 695                 if (!dma_coherent) {
 696                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 697                         return false;
 698                 }
 699                 acb->dma_coherent_handle2 = dma_coherent_handle;
 700                 acb->dma_coherent2 = dma_coherent;
 701                 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
 702                 arcmsr_hbaD_assign_regAddr(acb);
 703                 }
 704                 break;
 705         case ACB_ADAPTER_TYPE_E: {
 706                 uint32_t completeQ_size;
 707                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 708                 acb->ioqueue_size = roundup(completeQ_size, 32);
 709                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 710                         &dma_coherent_handle, GFP_KERNEL);
 711                 if (!dma_coherent){
 712                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 713                         return false;
 714                 }
 715                 acb->dma_coherent_handle2 = dma_coherent_handle;
 716                 acb->dma_coherent2 = dma_coherent;
 717                 acb->pCompletionQ = dma_coherent;
 718                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 719                 acb->doneq_index = 0;
 720                 }
 721                 break;
 722         case ACB_ADAPTER_TYPE_F: {
 723                 uint32_t QueueDepth;
 724                 uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
 725
 726                 arcmsr_wait_firmware_ready(acb);
 727                 QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
 728                 acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
 729                 acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
 730                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 731                         &dma_coherent_handle, GFP_KERNEL);
 732                 if (!dma_coherent) {
 733                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 734                         return false;
 735                 }
 736                 acb->dma_coherent_handle2 = dma_coherent_handle;
 737                 acb->dma_coherent2 = dma_coherent;
 738                 acb->pCompletionQ = dma_coherent;
 739                 acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
 740                 acb->doneq_index = 0;
 741                 arcmsr_hbaF_assign_regAddr(acb);
 742                 }
 743                 break;
 744         default:
 745                 break;
 746         }
 747         return rtn;
 748 }
 749
 750 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 751 {
 752         struct pci_dev *pdev = acb->pdev;
 753         void *dma_coherent;
 754         dma_addr_t dma_coherent_handle;
 755         struct CommandControlBlock *ccb_tmp;
 756         int i = 0, j = 0;
 757         unsigned long cdb_phyaddr, next_ccb_phy;
 758         unsigned long roundup_ccbsize;
 759         unsigned long max_xfer_len;
 760         unsigned long max_sg_entrys;
 761         uint32_t  firm_config_version, curr_phy_upper32;
 762
 763         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 764                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 765                         acb->devstate[i][j] = ARECA_RAID_GONE;
 766
 767         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 768         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 769         firm_config_version = acb->firm_cfg_version;
 770         if((firm_config_version & 0xFF) >= 3){
 771                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 772                 max_sg_entrys = (max_xfer_len/4096);
 773         }
 774         acb->host->max_sectors = max_xfer_len/512;
 775         acb->host->sg_tablesize = max_sg_entrys;
 776         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 777         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 778         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
 779                 acb->uncache_size += acb->ioqueue_size;
 780         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 781         if(!dma_coherent){
 782                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 783                 return -ENOMEM;
 784         }
 785         acb->dma_coherent = dma_coherent;
 786         acb->dma_coherent_handle = dma_coherent_handle;
 787         memset(dma_coherent, 0, acb->uncache_size);
 788         acb->ccbsize = roundup_ccbsize;
 789         ccb_tmp = dma_coherent;
 790         curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
 791         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 792         for(i = 0; i < acb->maxFreeCCB; i++){
 793                 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 794                 switch (acb->adapter_type) {
 795                 case ACB_ADAPTER_TYPE_A:
 796                 case ACB_ADAPTER_TYPE_B:
 797                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 798                         break;
 799                 case ACB_ADAPTER_TYPE_C:
 800                 case ACB_ADAPTER_TYPE_D:
 801                 case ACB_ADAPTER_TYPE_E:
 802                 case ACB_ADAPTER_TYPE_F:
 803                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 804                         break;
 805                 }
 806                 acb->pccb_pool[i] = ccb_tmp;
 807                 ccb_tmp->acb = acb;
 808                 ccb_tmp->smid = (u32)i << 16;
 809                 INIT_LIST_HEAD(&ccb_tmp->list);
 810                 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
 811                 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
 812                         acb->maxFreeCCB = i;
 813                         acb->host->can_queue = i;
 814                         break;
 815                 }
 816                 else
 817                         list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 818                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 819                 dma_coherent_handle = next_ccb_phy;
 820         }
 821         if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
 822                 acb->dma_coherent_handle2 = dma_coherent_handle;
 823                 acb->dma_coherent2 = ccb_tmp;
 824         }
 825         switch (acb->adapter_type) {
 826         case ACB_ADAPTER_TYPE_B:
 827                 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
 828                 arcmsr_hbaB_assign_regAddr(acb);
 829                 break;
 830         case ACB_ADAPTER_TYPE_D:
 831                 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
 832                 arcmsr_hbaD_assign_regAddr(acb);
 833                 break;
 834         case ACB_ADAPTER_TYPE_E:
 835                 acb->pCompletionQ = acb->dma_coherent2;
 836                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 837                 acb->doneq_index = 0;
 838                 break;
 839         }
 840         return 0;
 841 }
 842
 843 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 844 {
 845         struct AdapterControlBlock *acb = container_of(work,
 846                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 847         char *acb_dev_map = (char *)acb->device_map;
 848         uint32_t __iomem *signature = NULL;
 849         char __iomem *devicemap = NULL;
 850         int target, lun;
 851         struct scsi_device *psdev;
 852         char diff, temp;
 853
 854         switch (acb->adapter_type) {
 855         case ACB_ADAPTER_TYPE_A: {
 856                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 857
 858                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 859                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 860                 break;
 861         }
 862         case ACB_ADAPTER_TYPE_B: {
 863                 struct MessageUnit_B *reg  = acb->pmuB;
 864
 865                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 866                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 867                 break;
 868         }
 869         case ACB_ADAPTER_TYPE_C: {
 870                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 871
 872                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 873                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 874                 break;
 875         }
 876         case ACB_ADAPTER_TYPE_D: {
 877                 struct MessageUnit_D *reg  = acb->pmuD;
 878
 879                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 880                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 881                 break;
 882         }
 883         case ACB_ADAPTER_TYPE_E: {
 884                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 885
 886                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 887                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 888                 break;
 889                 }
 890         case ACB_ADAPTER_TYPE_F: {
 891                 signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
 892                 devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
 893                 break;
 894                 }
 895         }
 896         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 897                 return;
 898         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 899                 target++) {
 900                 temp = readb(devicemap);
 901                 diff = (*acb_dev_map) ^ temp;
 902                 if (diff != 0) {
 903                         *acb_dev_map = temp;
 904                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 905                                 lun++) {
 906                                 if ((diff & 0x01) == 1 &&
 907                                         (temp & 0x01) == 1) {
 908                                         scsi_add_device(acb->host,
 909                                                 0, target, lun);
 910                                 } else if ((diff & 0x01) == 1
 911                                         && (temp & 0x01) == 0) {
 912                                         psdev = scsi_device_lookup(acb->host,
 913                                                 0, target, lun);
 914                                         if (psdev != NULL) {
 915                                                 scsi_remove_device(psdev);
 916                                                 scsi_device_put(psdev);
 917                                         }
 918                                 }
 919                                 temp >>= 1;
 920                                 diff >>= 1;
 921                         }
 922                 }
 923                 devicemap++;
 924                 acb_dev_map++;
 925         }
 926         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 927 }
 928
 929 static int
 930 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 931 {
 932         unsigned long flags;
 933         int nvec, i;
 934
 935         if (msix_enable == 0)
 936                 goto msi_int0;
 937         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 938                         PCI_IRQ_MSIX);
 939         if (nvec > 0) {
 940                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 941                 flags = 0;
 942         } else {
 943 msi_int0:
 944                 if (msi_enable == 1) {
 945                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 946                         if (nvec == 1) {
 947                                 dev_info(&pdev->dev, "msi enabled\n");
 948                                 goto msi_int1;
 949                         }
 950                 }
 951                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 952                 if (nvec < 1)
 953                         return FAILED;
 954 msi_int1:
 955                 flags = IRQF_SHARED;
 956         }
 957
 958         acb->vector_count = nvec;
 959         for (i = 0; i < nvec; i++) {
 960                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 961                                 flags, "arcmsr", acb)) {
 962                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 963                                 acb->host->host_no, pci_irq_vector(pdev, i));
 964                         goto out_free_irq;
 965                 }
 966         }
 967
 968         return SUCCESS;
 969 out_free_irq:
 970         while (--i >= 0)
 971                 free_irq(pci_irq_vector(pdev, i), acb);
 972         pci_free_irq_vectors(pdev);
 973         return FAILED;
 974 }
 975
 976 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 977 {
 978         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 979         pacb->fw_flag = FW_NORMAL;
 980         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 981         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 982         add_timer(&pacb->eternal_timer);
 983 }
 984
 985 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 986 {
 987         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 988         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 989         add_timer(&pacb->refresh_timer);
 990 }
 991
 992 static int arcmsr_set_dma_mask(struct AdapterControlBlock *acb)
 993 {
 994         struct pci_dev *pcidev = acb->pdev;
 995
 996         if (IS_DMA64) {
 997                 if (((acb->adapter_type == ACB_ADAPTER_TYPE_A) && !dma_mask_64) ||
 998                     dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64)))
 999                         goto    dma32;
1000                 if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
1001                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64))) {
1002                         printk("arcmsr: set DMA 64 mask failed\n");
1003                         return -ENXIO;
1004                 }
1005         } else {
1006 dma32:
1007                 if (dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1008                     dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1009                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32))) {
1010                         printk("arcmsr: set DMA 32-bit mask failed\n");
1011                         return -ENXIO;
1012                 }
1013         }
1014         return 0;
1015 }
1016
1017 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1018 {
1019         struct Scsi_Host *host;
1020         struct AdapterControlBlock *acb;
1021         uint8_t bus,dev_fun;
1022         int error;
1023         error = pci_enable_device(pdev);
1024         if(error){
1025                 return -ENODEV;
1026         }
1027         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
1028         if(!host){
1029                 goto pci_disable_dev;
1030         }
1031         init_waitqueue_head(&wait_q);
1032         bus = pdev->bus->number;
1033         dev_fun = pdev->devfn;
1034         acb = (struct AdapterControlBlock *) host->hostdata;
1035         memset(acb,0,sizeof(struct AdapterControlBlock));
1036         acb->pdev = pdev;
1037         acb->adapter_type = id->driver_data;
1038         if (arcmsr_set_dma_mask(acb))
1039                 goto scsi_host_release;
1040         acb->host = host;
1041         host->max_lun = ARCMSR_MAX_TARGETLUN;
1042         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
1043         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
1044         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
1045                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
1046         host->can_queue = host_can_queue;       /* max simultaneous cmds */
1047         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
1048                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
1049         host->cmd_per_lun = cmd_per_lun;
1050         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
1051         host->unique_id = (bus << 8) | dev_fun;
1052         pci_set_drvdata(pdev, host);
1053         pci_set_master(pdev);
1054         error = pci_request_regions(pdev, "arcmsr");
1055         if(error){
1056                 goto scsi_host_release;
1057         }
1058         spin_lock_init(&acb->eh_lock);
1059         spin_lock_init(&acb->ccblist_lock);
1060         spin_lock_init(&acb->postq_lock);
1061         spin_lock_init(&acb->doneq_lock);
1062         spin_lock_init(&acb->rqbuffer_lock);
1063         spin_lock_init(&acb->wqbuffer_lock);
1064         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1065                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
1066                         ACB_F_MESSAGE_WQBUFFER_READED);
1067         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1068         INIT_LIST_HEAD(&acb->ccb_free_list);
1069         error = arcmsr_remap_pciregion(acb);
1070         if(!error){
1071                 goto pci_release_regs;
1072         }
1073         error = arcmsr_alloc_io_queue(acb);
1074         if (!error)
1075                 goto unmap_pci_region;
1076         error = arcmsr_get_firmware_spec(acb);
1077         if(!error){
1078                 goto free_hbb_mu;
1079         }
1080         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
1081                 arcmsr_free_io_queue(acb);
1082         error = arcmsr_alloc_ccb_pool(acb);
1083         if(error){
1084                 goto unmap_pci_region;
1085         }
1086         error = scsi_add_host(host, &pdev->dev);
1087         if(error){
1088                 goto free_ccb_pool;
1089         }
1090         if (arcmsr_request_irq(pdev, acb) == FAILED)
1091                 goto scsi_host_remove;
1092         arcmsr_iop_init(acb);
1093         arcmsr_init_get_devmap_timer(acb);
1094         if (set_date_time)
1095                 arcmsr_init_set_datetime_timer(acb);
1096         if(arcmsr_alloc_sysfs_attr(acb))
1097                 goto out_free_sysfs;
1098         scsi_scan_host(host);
1099         return 0;
1100 out_free_sysfs:
1101         if (set_date_time)
1102                 del_timer_sync(&acb->refresh_timer);
1103         del_timer_sync(&acb->eternal_timer);
1104         flush_work(&acb->arcmsr_do_message_isr_bh);
1105         arcmsr_stop_adapter_bgrb(acb);
1106         arcmsr_flush_adapter_cache(acb);
1107         arcmsr_free_irq(pdev, acb);
1108 scsi_host_remove:
1109         scsi_remove_host(host);
1110 free_ccb_pool:
1111         arcmsr_free_ccb_pool(acb);
1112         goto unmap_pci_region;
1113 free_hbb_mu:
1114         arcmsr_free_io_queue(acb);
1115 unmap_pci_region:
1116         arcmsr_unmap_pciregion(acb);
1117 pci_release_regs:
1118         pci_release_regions(pdev);
1119 scsi_host_release:
1120         scsi_host_put(host);
1121 pci_disable_dev:
1122         pci_disable_device(pdev);
1123         return -ENODEV;
1124 }
1125
1126 static void arcmsr_free_irq(struct pci_dev *pdev,
1127                 struct AdapterControlBlock *acb)
1128 {
1129         int i;
1130
1131         for (i = 0; i < acb->vector_count; i++)
1132                 free_irq(pci_irq_vector(pdev, i), acb);
1133         pci_free_irq_vectors(pdev);
1134 }
1135
1136 static int __maybe_unused arcmsr_suspend(struct device *dev)
1137 {
1138         struct pci_dev *pdev = to_pci_dev(dev);
1139         struct Scsi_Host *host = pci_get_drvdata(pdev);
1140         struct AdapterControlBlock *acb =
1141                 (struct AdapterControlBlock *)host->hostdata;
1142
1143         arcmsr_disable_outbound_ints(acb);
1144         arcmsr_free_irq(pdev, acb);
1145         del_timer_sync(&acb->eternal_timer);
1146         if (set_date_time)
1147                 del_timer_sync(&acb->refresh_timer);
1148         flush_work(&acb->arcmsr_do_message_isr_bh);
1149         arcmsr_stop_adapter_bgrb(acb);
1150         arcmsr_flush_adapter_cache(acb);
1151         return 0;
1152 }
1153
1154 static int __maybe_unused arcmsr_resume(struct device *dev)
1155 {
1156         struct pci_dev *pdev = to_pci_dev(dev);
1157         struct Scsi_Host *host = pci_get_drvdata(pdev);
1158         struct AdapterControlBlock *acb =
1159                 (struct AdapterControlBlock *)host->hostdata;
1160
1161         if (arcmsr_set_dma_mask(acb))
1162                 goto controller_unregister;
1163         if (arcmsr_request_irq(pdev, acb) == FAILED)
1164                 goto controller_stop;
1165         switch (acb->adapter_type) {
1166         case ACB_ADAPTER_TYPE_B: {
1167                 struct MessageUnit_B *reg = acb->pmuB;
1168                 uint32_t i;
1169                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1170                         reg->post_qbuffer[i] = 0;
1171                         reg->done_qbuffer[i] = 0;
1172                 }
1173                 reg->postq_index = 0;
1174                 reg->doneq_index = 0;
1175                 break;
1176                 }
1177         case ACB_ADAPTER_TYPE_E:
1178                 writel(0, &acb->pmuE->host_int_status);
1179                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1180                 acb->in_doorbell = 0;
1181                 acb->out_doorbell = 0;
1182                 acb->doneq_index = 0;
1183                 break;
1184         case ACB_ADAPTER_TYPE_F:
1185                 writel(0, &acb->pmuF->host_int_status);
1186                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
1187                 acb->in_doorbell = 0;
1188                 acb->out_doorbell = 0;
1189                 acb->doneq_index = 0;
1190                 arcmsr_hbaF_assign_regAddr(acb);
1191                 break;
1192         }
1193         arcmsr_iop_init(acb);
1194         arcmsr_init_get_devmap_timer(acb);
1195         if (set_date_time)
1196                 arcmsr_init_set_datetime_timer(acb);
1197         return 0;
1198 controller_stop:
1199         arcmsr_stop_adapter_bgrb(acb);
1200         arcmsr_flush_adapter_cache(acb);
1201 controller_unregister:
1202         scsi_remove_host(host);
1203         arcmsr_free_ccb_pool(acb);
1204         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1205                 arcmsr_free_io_queue(acb);
1206         arcmsr_unmap_pciregion(acb);
1207         scsi_host_put(host);
1208         return -ENODEV;
1209 }
1210
1211 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1212 {
1213         struct MessageUnit_A __iomem *reg = acb->pmuA;
1214         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1215         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1216                 printk(KERN_NOTICE
1217                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1218                         , acb->host->host_no);
1219                 return false;
1220         }
1221         return true;
1222 }
1223
1224 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1225 {
1226         struct MessageUnit_B *reg = acb->pmuB;
1227
1228         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1229         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1230                 printk(KERN_NOTICE
1231                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1232                         , acb->host->host_no);
1233                 return false;
1234         }
1235         return true;
1236 }
1237 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1238 {
1239         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1240         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1241         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1242         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1243                 printk(KERN_NOTICE
1244                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1245                         , pACB->host->host_no);
1246                 return false;
1247         }
1248         return true;
1249 }
1250
1251 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1252 {
1253         struct MessageUnit_D *reg = pACB->pmuD;
1254
1255         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1256         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1257                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1258                         "command' timeout\n", pACB->host->host_no);
1259                 return false;
1260         }
1261         return true;
1262 }
1263
1264 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1265 {
1266         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1267
1268         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1269         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1270         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1271         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1272                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1273                         "command' timeout\n", pACB->host->host_no);
1274                 return false;
1275         }
1276         return true;
1277 }
1278
1279 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1280 {
1281         uint8_t rtnval = 0;
1282         switch (acb->adapter_type) {
1283         case ACB_ADAPTER_TYPE_A:
1284                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1285                 break;
1286         case ACB_ADAPTER_TYPE_B:
1287                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1288                 break;
1289         case ACB_ADAPTER_TYPE_C:
1290                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1291                 break;
1292         case ACB_ADAPTER_TYPE_D:
1293                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1294                 break;
1295         case ACB_ADAPTER_TYPE_E:
1296         case ACB_ADAPTER_TYPE_F:
1297                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1298                 break;
1299         }
1300         return rtnval;
1301 }
1302
1303 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1304 {
1305         struct scsi_cmnd *pcmd = ccb->pcmd;
1306
1307         scsi_dma_unmap(pcmd);
1308 }
1309
1310 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1311 {
1312         struct AdapterControlBlock *acb = ccb->acb;
1313         struct scsi_cmnd *pcmd = ccb->pcmd;
1314         unsigned long flags;
1315         atomic_dec(&acb->ccboutstandingcount);
1316         arcmsr_pci_unmap_dma(ccb);
1317         ccb->startdone = ARCMSR_CCB_DONE;
1318         spin_lock_irqsave(&acb->ccblist_lock, flags);
1319         list_add_tail(&ccb->list, &acb->ccb_free_list);
1320         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1321         scsi_done(pcmd);
1322 }
1323
1324 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1325 {
1326         struct scsi_cmnd *pcmd = ccb->pcmd;
1327
1328         pcmd->result = (DID_OK << 16) | SAM_STAT_CHECK_CONDITION;
1329         if (pcmd->sense_buffer) {
1330                 struct SENSE_DATA *sensebuffer;
1331
1332                 memcpy_and_pad(pcmd->sense_buffer,
1333                                SCSI_SENSE_BUFFERSIZE,
1334                                ccb->arcmsr_cdb.SenseData,
1335                                sizeof(ccb->arcmsr_cdb.SenseData),
1336                                0);
1337
1338                 sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1339                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1340                 sensebuffer->Valid = 1;
1341         }
1342 }
1343
1344 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1345 {
1346         u32 orig_mask = 0;
1347         switch (acb->adapter_type) {
1348         case ACB_ADAPTER_TYPE_A : {
1349                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1350                 orig_mask = readl(&reg->outbound_intmask);
1351                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1352                                                 &reg->outbound_intmask);
1353                 }
1354                 break;
1355         case ACB_ADAPTER_TYPE_B : {
1356                 struct MessageUnit_B *reg = acb->pmuB;
1357                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1358                 writel(0, reg->iop2drv_doorbell_mask);
1359                 }
1360                 break;
1361         case ACB_ADAPTER_TYPE_C:{
1362                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1363                 /* disable all outbound interrupt */
1364                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1365                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1366                 }
1367                 break;
1368         case ACB_ADAPTER_TYPE_D: {
1369                 struct MessageUnit_D *reg = acb->pmuD;
1370                 /* disable all outbound interrupt */
1371                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1372                 }
1373                 break;
1374         case ACB_ADAPTER_TYPE_E:
1375         case ACB_ADAPTER_TYPE_F: {
1376                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1377                 orig_mask = readl(&reg->host_int_mask);
1378                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1379                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1380                 }
1381                 break;
1382         }
1383         return orig_mask;
1384 }
1385
1386 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1387                         struct CommandControlBlock *ccb, bool error)
1388 {
1389         uint8_t id, lun;
1390         id = ccb->pcmd->device->id;
1391         lun = ccb->pcmd->device->lun;
1392         if (!error) {
1393                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1394                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1395                 ccb->pcmd->result = DID_OK << 16;
1396                 arcmsr_ccb_complete(ccb);
1397         }else{
1398                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1399                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1400                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1401                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1402                         arcmsr_ccb_complete(ccb);
1403                         }
1404                         break;
1405
1406                 case ARCMSR_DEV_ABORTED:
1407
1408                 case ARCMSR_DEV_INIT_FAIL: {
1409                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1410                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1411                         arcmsr_ccb_complete(ccb);
1412                         }
1413                         break;
1414
1415                 case ARCMSR_DEV_CHECK_CONDITION: {
1416                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1417                         arcmsr_report_sense_info(ccb);
1418                         arcmsr_ccb_complete(ccb);
1419                         }
1420                         break;
1421
1422                 default:
1423                         printk(KERN_NOTICE
1424                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1425                                 but got unknown DeviceStatus = 0x%x \n"
1426                                 , acb->host->host_no
1427                                 , id
1428                                 , lun
1429                                 , ccb->arcmsr_cdb.DeviceStatus);
1430                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1431                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1432                                 arcmsr_ccb_complete(ccb);
1433                         break;
1434                 }
1435         }
1436 }
1437
1438 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1439 {
1440         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1441                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1442                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1443                         if (abortcmd) {
1444                                 abortcmd->result |= DID_ABORT << 16;
1445                                 arcmsr_ccb_complete(pCCB);
1446                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1447                                 acb->host->host_no, pCCB);
1448                         }
1449                         return;
1450                 }
1451                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1452                                 done acb = '0x%p'"
1453                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1454                                 " ccboutstandingcount = %d \n"
1455                                 , acb->host->host_no
1456                                 , acb
1457                                 , pCCB
1458                                 , pCCB->acb
1459                                 , pCCB->startdone
1460                                 , atomic_read(&acb->ccboutstandingcount));
1461                 return;
1462         }
1463         arcmsr_report_ccb_state(acb, pCCB, error);
1464 }
1465
1466 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1467 {
1468         int i = 0;
1469         uint32_t flag_ccb;
1470         struct ARCMSR_CDB *pARCMSR_CDB;
1471         bool error;
1472         struct CommandControlBlock *pCCB;
1473         unsigned long ccb_cdb_phy;
1474
1475         switch (acb->adapter_type) {
1476
1477         case ACB_ADAPTER_TYPE_A: {
1478                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1479                 uint32_t outbound_intstatus;
1480                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1481                                         acb->outbound_int_enable;
1482                 /*clear and abort all outbound posted Q*/
1483                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1484                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1485                                 && (i++ < acb->maxOutstanding)) {
1486                         ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1487                         if (acb->cdb_phyadd_hipart)
1488                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1489                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1490                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1491                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1492                         arcmsr_drain_donequeue(acb, pCCB, error);
1493                 }
1494                 }
1495                 break;
1496
1497         case ACB_ADAPTER_TYPE_B: {
1498                 struct MessageUnit_B *reg = acb->pmuB;
1499                 /*clear all outbound posted Q*/
1500                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1501                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1502                         flag_ccb = reg->done_qbuffer[i];
1503                         if (flag_ccb != 0) {
1504                                 reg->done_qbuffer[i] = 0;
1505                                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1506                                 if (acb->cdb_phyadd_hipart)
1507                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1508                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1509                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1510                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1511                                 arcmsr_drain_donequeue(acb, pCCB, error);
1512                         }
1513                         reg->post_qbuffer[i] = 0;
1514                 }
1515                 reg->doneq_index = 0;
1516                 reg->postq_index = 0;
1517                 }
1518                 break;
1519         case ACB_ADAPTER_TYPE_C: {
1520                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1521                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1522                         /*need to do*/
1523                         flag_ccb = readl(&reg->outbound_queueport_low);
1524                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1525                         if (acb->cdb_phyadd_hipart)
1526                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1527                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1528                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1529                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1530                         arcmsr_drain_donequeue(acb, pCCB, error);
1531                 }
1532                 }
1533                 break;
1534         case ACB_ADAPTER_TYPE_D: {
1535                 struct MessageUnit_D  *pmu = acb->pmuD;
1536                 uint32_t outbound_write_pointer;
1537                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1538                 unsigned long flags;
1539
1540                 residual = atomic_read(&acb->ccboutstandingcount);
1541                 for (i = 0; i < residual; i++) {
1542                         spin_lock_irqsave(&acb->doneq_lock, flags);
1543                         outbound_write_pointer =
1544                                 pmu->done_qbuffer[0].addressLow + 1;
1545                         doneq_index = pmu->doneq_index;
1546                         if ((doneq_index & 0xFFF) !=
1547                                 (outbound_write_pointer & 0xFFF)) {
1548                                 toggle = doneq_index & 0x4000;
1549                                 index_stripped = (doneq_index & 0xFFF) + 1;
1550                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1551                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1552                                         ((toggle ^ 0x4000) + 1);
1553                                 doneq_index = pmu->doneq_index;
1554                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1555                                 addressLow = pmu->done_qbuffer[doneq_index &
1556                                         0xFFF].addressLow;
1557                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1558                                 if (acb->cdb_phyadd_hipart)
1559                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1560                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1561                                         (acb->vir2phy_offset + ccb_cdb_phy);
1562                                 pCCB = container_of(pARCMSR_CDB,
1563                                         struct CommandControlBlock, arcmsr_cdb);
1564                                 error = (addressLow &
1565                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1566                                         true : false;
1567                                 arcmsr_drain_donequeue(acb, pCCB, error);
1568                                 writel(doneq_index,
1569                                         pmu->outboundlist_read_pointer);
1570                         } else {
1571                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1572                                 mdelay(10);
1573                         }
1574                 }
1575                 pmu->postq_index = 0;
1576                 pmu->doneq_index = 0x40FF;
1577                 }
1578                 break;
1579         case ACB_ADAPTER_TYPE_E:
1580                 arcmsr_hbaE_postqueue_isr(acb);
1581                 break;
1582         case ACB_ADAPTER_TYPE_F:
1583                 arcmsr_hbaF_postqueue_isr(acb);
1584                 break;
1585         }
1586 }
1587
1588 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1589 {
1590         char *acb_dev_map = (char *)acb->device_map;
1591         int target, lun, i;
1592         struct scsi_device *psdev;
1593         struct CommandControlBlock *ccb;
1594         char temp;
1595
1596         for (i = 0; i < acb->maxFreeCCB; i++) {
1597                 ccb = acb->pccb_pool[i];
1598                 if (ccb->startdone == ARCMSR_CCB_START) {
1599                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1600                         arcmsr_pci_unmap_dma(ccb);
1601                         scsi_done(ccb->pcmd);
1602                 }
1603         }
1604         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1605                 temp = *acb_dev_map;
1606                 if (temp) {
1607                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1608                                 if (temp & 1) {
1609                                         psdev = scsi_device_lookup(acb->host,
1610                                                 0, target, lun);
1611                                         if (psdev != NULL) {
1612                                                 scsi_remove_device(psdev);
1613                                                 scsi_device_put(psdev);
1614                                         }
1615                                 }
1616                                 temp >>= 1;
1617                         }
1618                         *acb_dev_map = 0;
1619                 }
1620                 acb_dev_map++;
1621         }
1622 }
1623
1624 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1625 {
1626         struct pci_dev *pdev;
1627         struct Scsi_Host *host;
1628
1629         host = acb->host;
1630         arcmsr_free_sysfs_attr(acb);
1631         scsi_remove_host(host);
1632         flush_work(&acb->arcmsr_do_message_isr_bh);
1633         del_timer_sync(&acb->eternal_timer);
1634         if (set_date_time)
1635                 del_timer_sync(&acb->refresh_timer);
1636         pdev = acb->pdev;
1637         arcmsr_free_irq(pdev, acb);
1638         arcmsr_free_ccb_pool(acb);
1639         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1640                 arcmsr_free_io_queue(acb);
1641         arcmsr_unmap_pciregion(acb);
1642         pci_release_regions(pdev);
1643         scsi_host_put(host);
1644         pci_disable_device(pdev);
1645 }
1646
1647 static void arcmsr_remove(struct pci_dev *pdev)
1648 {
1649         struct Scsi_Host *host = pci_get_drvdata(pdev);
1650         struct AdapterControlBlock *acb =
1651                 (struct AdapterControlBlock *) host->hostdata;
1652         int poll_count = 0;
1653         uint16_t dev_id;
1654
1655         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1656         if (dev_id == 0xffff) {
1657                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1658                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1659                 arcmsr_remove_scsi_devices(acb);
1660                 arcmsr_free_pcidev(acb);
1661                 return;
1662         }
1663         arcmsr_free_sysfs_attr(acb);
1664         scsi_remove_host(host);
1665         flush_work(&acb->arcmsr_do_message_isr_bh);
1666         del_timer_sync(&acb->eternal_timer);
1667         if (set_date_time)
1668                 del_timer_sync(&acb->refresh_timer);
1669         arcmsr_disable_outbound_ints(acb);
1670         arcmsr_stop_adapter_bgrb(acb);
1671         arcmsr_flush_adapter_cache(acb);
1672         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1673         acb->acb_flags &= ~ACB_F_IOP_INITED;
1674
1675         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1676                 if (!atomic_read(&acb->ccboutstandingcount))
1677                         break;
1678                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1679                 msleep(25);
1680         }
1681
1682         if (atomic_read(&acb->ccboutstandingcount)) {
1683                 int i;
1684
1685                 arcmsr_abort_allcmd(acb);
1686                 arcmsr_done4abort_postqueue(acb);
1687                 for (i = 0; i < acb->maxFreeCCB; i++) {
1688                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1689                         if (ccb->startdone == ARCMSR_CCB_START) {
1690                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1691                                 ccb->pcmd->result = DID_ABORT << 16;
1692                                 arcmsr_ccb_complete(ccb);
1693                         }
1694                 }
1695         }
1696         arcmsr_free_irq(pdev, acb);
1697         arcmsr_free_ccb_pool(acb);
1698         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1699                 arcmsr_free_io_queue(acb);
1700         arcmsr_unmap_pciregion(acb);
1701         pci_release_regions(pdev);
1702         scsi_host_put(host);
1703         pci_disable_device(pdev);
1704 }
1705
1706 static void arcmsr_shutdown(struct pci_dev *pdev)
1707 {
1708         struct Scsi_Host *host = pci_get_drvdata(pdev);
1709         struct AdapterControlBlock *acb =
1710                 (struct AdapterControlBlock *)host->hostdata;
1711         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1712                 return;
1713         del_timer_sync(&acb->eternal_timer);
1714         if (set_date_time)
1715                 del_timer_sync(&acb->refresh_timer);
1716         arcmsr_disable_outbound_ints(acb);
1717         arcmsr_free_irq(pdev, acb);
1718         flush_work(&acb->arcmsr_do_message_isr_bh);
1719         arcmsr_stop_adapter_bgrb(acb);
1720         arcmsr_flush_adapter_cache(acb);
1721 }
1722
1723 static int arcmsr_module_init(void)
1724 {
1725         int error = 0;
1726         error = pci_register_driver(&arcmsr_pci_driver);
1727         return error;
1728 }
1729
1730 static void arcmsr_module_exit(void)
1731 {
1732         pci_unregister_driver(&arcmsr_pci_driver);
1733 }
1734 module_init(arcmsr_module_init);
1735 module_exit(arcmsr_module_exit);
1736
1737 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1738                                                 u32 intmask_org)
1739 {
1740         u32 mask;
1741         switch (acb->adapter_type) {
1742
1743         case ACB_ADAPTER_TYPE_A: {
1744                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1745                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1746                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1747                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1748                 writel(mask, &reg->outbound_intmask);
1749                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1750                 }
1751                 break;
1752
1753         case ACB_ADAPTER_TYPE_B: {
1754                 struct MessageUnit_B *reg = acb->pmuB;
1755                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1756                         ARCMSR_IOP2DRV_DATA_READ_OK |
1757                         ARCMSR_IOP2DRV_CDB_DONE |
1758                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1759                 writel(mask, reg->iop2drv_doorbell_mask);
1760                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1761                 }
1762                 break;
1763         case ACB_ADAPTER_TYPE_C: {
1764                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1765                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1766                 writel(intmask_org & mask, &reg->host_int_mask);
1767                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1768                 }
1769                 break;
1770         case ACB_ADAPTER_TYPE_D: {
1771                 struct MessageUnit_D *reg = acb->pmuD;
1772
1773                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1774                 writel(intmask_org | mask, reg->pcief0_int_enable);
1775                 break;
1776                 }
1777         case ACB_ADAPTER_TYPE_E:
1778         case ACB_ADAPTER_TYPE_F: {
1779                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1780
1781                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1782                 writel(intmask_org & mask, &reg->host_int_mask);
1783                 break;
1784                 }
1785         }
1786 }
1787
1788 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1789         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1790 {
1791         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1792         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1793         __le32 address_lo, address_hi;
1794         int arccdbsize = 0x30;
1795         __le32 length = 0;
1796         int i;
1797         struct scatterlist *sg;
1798         int nseg;
1799         ccb->pcmd = pcmd;
1800         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1801         arcmsr_cdb->TargetID = pcmd->device->id;
1802         arcmsr_cdb->LUN = pcmd->device->lun;
1803         arcmsr_cdb->Function = 1;
1804         arcmsr_cdb->msgContext = 0;
1805         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1806
1807         nseg = scsi_dma_map(pcmd);
1808         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1809                 return FAILED;
1810         scsi_for_each_sg(pcmd, sg, nseg, i) {
1811                 /* Get the physical address of the current data pointer */
1812                 length = cpu_to_le32(sg_dma_len(sg));
1813                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1814                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1815                 if (address_hi == 0) {
1816                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1817
1818                         pdma_sg->address = address_lo;
1819                         pdma_sg->length = length;
1820                         psge += sizeof (struct SG32ENTRY);
1821                         arccdbsize += sizeof (struct SG32ENTRY);
1822                 } else {
1823                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1824
1825                         pdma_sg->addresshigh = address_hi;
1826                         pdma_sg->address = address_lo;
1827                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1828                         psge += sizeof (struct SG64ENTRY);
1829                         arccdbsize += sizeof (struct SG64ENTRY);
1830                 }
1831         }
1832         arcmsr_cdb->sgcount = (uint8_t)nseg;
1833         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1834         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1835         if ( arccdbsize > 256)
1836                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1837         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1838                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1839         ccb->arc_cdb_size = arccdbsize;
1840         return SUCCESS;
1841 }
1842
1843 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1844 {
1845         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1846         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1847         atomic_inc(&acb->ccboutstandingcount);
1848         ccb->startdone = ARCMSR_CCB_START;
1849         switch (acb->adapter_type) {
1850         case ACB_ADAPTER_TYPE_A: {
1851                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1852
1853                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1854                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1855                         &reg->inbound_queueport);
1856                 else
1857                         writel(cdb_phyaddr, &reg->inbound_queueport);
1858                 break;
1859         }
1860
1861         case ACB_ADAPTER_TYPE_B: {
1862                 struct MessageUnit_B *reg = acb->pmuB;
1863                 uint32_t ending_index, index = reg->postq_index;
1864
1865                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1866                 reg->post_qbuffer[ending_index] = 0;
1867                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1868                         reg->post_qbuffer[index] =
1869                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1870                 } else {
1871                         reg->post_qbuffer[index] = cdb_phyaddr;
1872                 }
1873                 index++;
1874                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1875                 reg->postq_index = index;
1876                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1877                 }
1878                 break;
1879         case ACB_ADAPTER_TYPE_C: {
1880                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1881                 uint32_t ccb_post_stamp, arc_cdb_size;
1882
1883                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1884                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1885                 writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
1886                 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1887                 }
1888                 break;
1889         case ACB_ADAPTER_TYPE_D: {
1890                 struct MessageUnit_D  *pmu = acb->pmuD;
1891                 u16 index_stripped;
1892                 u16 postq_index, toggle;
1893                 unsigned long flags;
1894                 struct InBound_SRB *pinbound_srb;
1895
1896                 spin_lock_irqsave(&acb->postq_lock, flags);
1897                 postq_index = pmu->postq_index;
1898                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1899                 pinbound_srb->addressHigh = upper_32_bits(ccb->cdb_phyaddr);
1900                 pinbound_srb->addressLow = cdb_phyaddr;
1901                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1902                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1903                 toggle = postq_index & 0x4000;
1904                 index_stripped = postq_index + 1;
1905                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1906                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1907                         (toggle ^ 0x4000);
1908                 writel(postq_index, pmu->inboundlist_write_pointer);
1909                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1910                 break;
1911                 }
1912         case ACB_ADAPTER_TYPE_E: {
1913                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1914                 u32 ccb_post_stamp, arc_cdb_size;
1915
1916                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1917                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1918                 writel(0, &pmu->inbound_queueport_high);
1919                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1920                 break;
1921                 }
1922         case ACB_ADAPTER_TYPE_F: {
1923                 struct MessageUnit_F __iomem *pmu = acb->pmuF;
1924                 u32 ccb_post_stamp, arc_cdb_size;
1925
1926                 if (ccb->arc_cdb_size <= 0x300)
1927                         arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 | 1;
1928                 else {
1929                         arc_cdb_size = ((ccb->arc_cdb_size + 0xff) >> 8) + 2;
1930                         if (arc_cdb_size > 0xF)
1931                                 arc_cdb_size = 0xF;
1932                         arc_cdb_size = (arc_cdb_size << 1) | 1;
1933                 }
1934                 ccb_post_stamp = (ccb->smid | arc_cdb_size);
1935                 writel(0, &pmu->inbound_queueport_high);
1936                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1937                 break;
1938                 }
1939         }
1940 }
1941
1942 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1943 {
1944         struct MessageUnit_A __iomem *reg = acb->pmuA;
1945         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1946         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1947         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1948                 printk(KERN_NOTICE
1949                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1950                         , acb->host->host_no);
1951         }
1952 }
1953
1954 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1955 {
1956         struct MessageUnit_B *reg = acb->pmuB;
1957         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1958         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1959
1960         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1961                 printk(KERN_NOTICE
1962                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1963                         , acb->host->host_no);
1964         }
1965 }
1966
1967 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1968 {
1969         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1970         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1971         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1972         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1973         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1974                 printk(KERN_NOTICE
1975                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1976                         , pACB->host->host_no);
1977         }
1978         return;
1979 }
1980
1981 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1982 {
1983         struct MessageUnit_D *reg = pACB->pmuD;
1984
1985         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1986         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1987         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1988                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1989                         "timeout\n", pACB->host->host_no);
1990 }
1991
1992 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1993 {
1994         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1995
1996         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1997         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1998         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1999         writel(pACB->out_doorbell, &reg->iobound_doorbell);
2000         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
2001                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2002                         "timeout\n", pACB->host->host_no);
2003         }
2004 }
2005
2006 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
2007 {
2008         switch (acb->adapter_type) {
2009         case ACB_ADAPTER_TYPE_A:
2010                 arcmsr_hbaA_stop_bgrb(acb);
2011                 break;
2012         case ACB_ADAPTER_TYPE_B:
2013                 arcmsr_hbaB_stop_bgrb(acb);
2014                 break;
2015         case ACB_ADAPTER_TYPE_C:
2016                 arcmsr_hbaC_stop_bgrb(acb);
2017                 break;
2018         case ACB_ADAPTER_TYPE_D:
2019                 arcmsr_hbaD_stop_bgrb(acb);
2020                 break;
2021         case ACB_ADAPTER_TYPE_E:
2022         case ACB_ADAPTER_TYPE_F:
2023                 arcmsr_hbaE_stop_bgrb(acb);
2024                 break;
2025         }
2026 }
2027
2028 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
2029 {
2030         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
2031 }
2032
2033 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
2034 {
2035         switch (acb->adapter_type) {
2036         case ACB_ADAPTER_TYPE_A: {
2037                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2038                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2039                 }
2040                 break;
2041         case ACB_ADAPTER_TYPE_B: {
2042                 struct MessageUnit_B *reg = acb->pmuB;
2043                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2044                 }
2045                 break;
2046         case ACB_ADAPTER_TYPE_C: {
2047                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2048
2049                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2050                 }
2051                 break;
2052         case ACB_ADAPTER_TYPE_D: {
2053                 struct MessageUnit_D *reg = acb->pmuD;
2054                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
2055                         reg->inbound_doorbell);
2056                 }
2057                 break;
2058         case ACB_ADAPTER_TYPE_E:
2059         case ACB_ADAPTER_TYPE_F: {
2060                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2061                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
2062                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2063                 }
2064                 break;
2065         }
2066 }
2067
2068 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
2069 {
2070         switch (acb->adapter_type) {
2071         case ACB_ADAPTER_TYPE_A: {
2072                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2073                 /*
2074                 ** push inbound doorbell tell iop, driver data write ok
2075                 ** and wait reply on next hwinterrupt for next Qbuffer post
2076                 */
2077                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
2078                 }
2079                 break;
2080
2081         case ACB_ADAPTER_TYPE_B: {
2082                 struct MessageUnit_B *reg = acb->pmuB;
2083                 /*
2084                 ** push inbound doorbell tell iop, driver data write ok
2085                 ** and wait reply on next hwinterrupt for next Qbuffer post
2086                 */
2087                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
2088                 }
2089                 break;
2090         case ACB_ADAPTER_TYPE_C: {
2091                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2092                 /*
2093                 ** push inbound doorbell tell iop, driver data write ok
2094                 ** and wait reply on next hwinterrupt for next Qbuffer post
2095                 */
2096                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
2097                 }
2098                 break;
2099         case ACB_ADAPTER_TYPE_D: {
2100                 struct MessageUnit_D *reg = acb->pmuD;
2101                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
2102                         reg->inbound_doorbell);
2103                 }
2104                 break;
2105         case ACB_ADAPTER_TYPE_E:
2106         case ACB_ADAPTER_TYPE_F: {
2107                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2108                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2109                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2110                 }
2111                 break;
2112         }
2113 }
2114
2115 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2116 {
2117         struct QBUFFER __iomem *qbuffer = NULL;
2118         switch (acb->adapter_type) {
2119
2120         case ACB_ADAPTER_TYPE_A: {
2121                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2122                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2123                 }
2124                 break;
2125         case ACB_ADAPTER_TYPE_B: {
2126                 struct MessageUnit_B *reg = acb->pmuB;
2127                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2128                 }
2129                 break;
2130         case ACB_ADAPTER_TYPE_C: {
2131                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2132                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2133                 }
2134                 break;
2135         case ACB_ADAPTER_TYPE_D: {
2136                 struct MessageUnit_D *reg = acb->pmuD;
2137                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2138                 }
2139                 break;
2140         case ACB_ADAPTER_TYPE_E: {
2141                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2142                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2143                 }
2144                 break;
2145         case ACB_ADAPTER_TYPE_F: {
2146                 qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
2147                 }
2148                 break;
2149         }
2150         return qbuffer;
2151 }
2152
2153 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2154 {
2155         struct QBUFFER __iomem *pqbuffer = NULL;
2156         switch (acb->adapter_type) {
2157
2158         case ACB_ADAPTER_TYPE_A: {
2159                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2160                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2161                 }
2162                 break;
2163         case ACB_ADAPTER_TYPE_B: {
2164                 struct MessageUnit_B  *reg = acb->pmuB;
2165                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2166                 }
2167                 break;
2168         case ACB_ADAPTER_TYPE_C: {
2169                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2170                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2171                 }
2172                 break;
2173         case ACB_ADAPTER_TYPE_D: {
2174                 struct MessageUnit_D *reg = acb->pmuD;
2175                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2176                 }
2177                 break;
2178         case ACB_ADAPTER_TYPE_E: {
2179                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2180                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2181                 }
2182                 break;
2183         case ACB_ADAPTER_TYPE_F:
2184                 pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
2185                 break;
2186         }
2187         return pqbuffer;
2188 }
2189
2190 static uint32_t
2191 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2192                 struct QBUFFER __iomem *prbuffer)
2193 {
2194         uint8_t *pQbuffer;
2195         uint8_t *buf1 = NULL;
2196         uint32_t __iomem *iop_data;
2197         uint32_t iop_len, data_len, *buf2 = NULL;
2198
2199         iop_data = (uint32_t __iomem *)prbuffer->data;
2200         iop_len = readl(&prbuffer->data_len);
2201         if (iop_len > 0) {
2202                 buf1 = kmalloc(128, GFP_ATOMIC);
2203                 buf2 = (uint32_t *)buf1;
2204                 if (buf1 == NULL)
2205                         return 0;
2206                 data_len = iop_len;
2207                 while (data_len >= 4) {
2208                         *buf2++ = readl(iop_data);
2209                         iop_data++;
2210                         data_len -= 4;
2211                 }
2212                 if (data_len)
2213                         *buf2 = readl(iop_data);
2214                 buf2 = (uint32_t *)buf1;
2215         }
2216         while (iop_len > 0) {
2217                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2218                 *pQbuffer = *buf1;
2219                 acb->rqbuf_putIndex++;
2220                 /* if last, index number set it to 0 */
2221                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2222                 buf1++;
2223                 iop_len--;
2224         }
2225         kfree(buf2);
2226         /* let IOP know data has been read */
2227         arcmsr_iop_message_read(acb);
2228         return 1;
2229 }
2230
2231 uint32_t
2232 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2233         struct QBUFFER __iomem *prbuffer) {
2234
2235         uint8_t *pQbuffer;
2236         uint8_t __iomem *iop_data;
2237         uint32_t iop_len;
2238
2239         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2240                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2241         iop_data = (uint8_t __iomem *)prbuffer->data;
2242         iop_len = readl(&prbuffer->data_len);
2243         while (iop_len > 0) {
2244                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2245                 *pQbuffer = readb(iop_data);
2246                 acb->rqbuf_putIndex++;
2247                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2248                 iop_data++;
2249                 iop_len--;
2250         }
2251         arcmsr_iop_message_read(acb);
2252         return 1;
2253 }
2254
2255 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2256 {
2257         unsigned long flags;
2258         struct QBUFFER __iomem  *prbuffer;
2259         int32_t buf_empty_len;
2260
2261         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2262         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2263         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2264                 (ARCMSR_MAX_QBUFFER - 1);
2265         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2266                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2267                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2268         } else
2269                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2270         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2271 }
2272
2273 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2274 {
2275         uint8_t *pQbuffer;
2276         struct QBUFFER __iomem *pwbuffer;
2277         uint8_t *buf1 = NULL;
2278         uint32_t __iomem *iop_data;
2279         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2280
2281         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2282                 buf1 = kmalloc(128, GFP_ATOMIC);
2283                 buf2 = (uint32_t *)buf1;
2284                 if (buf1 == NULL)
2285                         return;
2286
2287                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2288                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2289                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2290                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2291                         && (allxfer_len < 124)) {
2292                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2293                         *buf1 = *pQbuffer;
2294                         acb->wqbuf_getIndex++;
2295                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2296                         buf1++;
2297                         allxfer_len++;
2298                 }
2299                 data_len = allxfer_len;
2300                 buf1 = (uint8_t *)buf2;
2301                 while (data_len >= 4) {
2302                         data = *buf2++;
2303                         writel(data, iop_data);
2304                         iop_data++;
2305                         data_len -= 4;
2306                 }
2307                 if (data_len) {
2308                         data = *buf2;
2309                         writel(data, iop_data);
2310                 }
2311                 writel(allxfer_len, &pwbuffer->data_len);
2312                 kfree(buf1);
2313                 arcmsr_iop_message_wrote(acb);
2314         }
2315 }
2316
2317 void
2318 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2319 {
2320         uint8_t *pQbuffer;
2321         struct QBUFFER __iomem *pwbuffer;
2322         uint8_t __iomem *iop_data;
2323         int32_t allxfer_len = 0;
2324
2325         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2326                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2327                 return;
2328         }
2329         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2330                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2331                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2332                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2333                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2334                         && (allxfer_len < 124)) {
2335                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2336                         writeb(*pQbuffer, iop_data);
2337                         acb->wqbuf_getIndex++;
2338                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2339                         iop_data++;
2340                         allxfer_len++;
2341                 }
2342                 writel(allxfer_len, &pwbuffer->data_len);
2343                 arcmsr_iop_message_wrote(acb);
2344         }
2345 }
2346
2347 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2348 {
2349         unsigned long flags;
2350
2351         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2352         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2353         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2354                 arcmsr_write_ioctldata2iop(acb);
2355         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2356                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2357         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2358 }
2359
2360 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2361 {
2362         uint32_t outbound_doorbell;
2363         struct MessageUnit_A __iomem *reg = acb->pmuA;
2364         outbound_doorbell = readl(&reg->outbound_doorbell);
2365         do {
2366                 writel(outbound_doorbell, &reg->outbound_doorbell);
2367                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2368                         arcmsr_iop2drv_data_wrote_handle(acb);
2369                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2370                         arcmsr_iop2drv_data_read_handle(acb);
2371                 outbound_doorbell = readl(&reg->outbound_doorbell);
2372         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2373                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2374 }
2375 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2376 {
2377         uint32_t outbound_doorbell;
2378         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2379         /*
2380         *******************************************************************
2381         **  Maybe here we need to check wrqbuffer_lock is lock or not
2382         **  DOORBELL: din! don!
2383         **  check if there are any mail need to pack from firmware
2384         *******************************************************************
2385         */
2386         outbound_doorbell = readl(&reg->outbound_doorbell);
2387         do {
2388                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2389                 readl(&reg->outbound_doorbell_clear);
2390                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2391                         arcmsr_iop2drv_data_wrote_handle(pACB);
2392                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2393                         arcmsr_iop2drv_data_read_handle(pACB);
2394                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2395                         arcmsr_hbaC_message_isr(pACB);
2396                 outbound_doorbell = readl(&reg->outbound_doorbell);
2397         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2398                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2399                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2400 }
2401
2402 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2403 {
2404         uint32_t outbound_doorbell;
2405         struct MessageUnit_D  *pmu = pACB->pmuD;
2406
2407         outbound_doorbell = readl(pmu->outbound_doorbell);
2408         do {
2409                 writel(outbound_doorbell, pmu->outbound_doorbell);
2410                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2411                         arcmsr_hbaD_message_isr(pACB);
2412                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2413                         arcmsr_iop2drv_data_wrote_handle(pACB);
2414                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2415                         arcmsr_iop2drv_data_read_handle(pACB);
2416                 outbound_doorbell = readl(pmu->outbound_doorbell);
2417         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2418                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2419                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2420 }
2421
2422 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2423 {
2424         uint32_t outbound_doorbell, in_doorbell, tmp, i;
2425         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2426
2427         if (pACB->adapter_type == ACB_ADAPTER_TYPE_F) {
2428                 for (i = 0; i < 5; i++) {
2429                         in_doorbell = readl(&reg->iobound_doorbell);
2430                         if (in_doorbell != 0)
2431                                 break;
2432                 }
2433         } else
2434                 in_doorbell = readl(&reg->iobound_doorbell);
2435         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2436         do {
2437                 writel(0, &reg->host_int_status); /* clear interrupt */
2438                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2439                         arcmsr_iop2drv_data_wrote_handle(pACB);
2440                 }
2441                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2442                         arcmsr_iop2drv_data_read_handle(pACB);
2443                 }
2444                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2445                         arcmsr_hbaE_message_isr(pACB);
2446                 }
2447                 tmp = in_doorbell;
2448                 in_doorbell = readl(&reg->iobound_doorbell);
2449                 outbound_doorbell = tmp ^ in_doorbell;
2450         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2451                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2452                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2453         pACB->in_doorbell = in_doorbell;
2454 }
2455
2456 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2457 {
2458         uint32_t flag_ccb;
2459         struct MessageUnit_A __iomem *reg = acb->pmuA;
2460         struct ARCMSR_CDB *pARCMSR_CDB;
2461         struct CommandControlBlock *pCCB;
2462         bool error;
2463         unsigned long cdb_phy_addr;
2464
2465         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2466                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2467                 if (acb->cdb_phyadd_hipart)
2468                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2469                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2470                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2471                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2472                 arcmsr_drain_donequeue(acb, pCCB, error);
2473         }
2474 }
2475 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2476 {
2477         uint32_t index;
2478         uint32_t flag_ccb;
2479         struct MessageUnit_B *reg = acb->pmuB;
2480         struct ARCMSR_CDB *pARCMSR_CDB;
2481         struct CommandControlBlock *pCCB;
2482         bool error;
2483         unsigned long cdb_phy_addr;
2484
2485         index = reg->doneq_index;
2486         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2487                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2488                 if (acb->cdb_phyadd_hipart)
2489                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2490                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2491                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2492                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2493                 arcmsr_drain_donequeue(acb, pCCB, error);
2494                 reg->done_qbuffer[index] = 0;
2495                 index++;
2496                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2497                 reg->doneq_index = index;
2498         }
2499 }
2500
2501 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2502 {
2503         struct MessageUnit_C __iomem *phbcmu;
2504         struct ARCMSR_CDB *arcmsr_cdb;
2505         struct CommandControlBlock *ccb;
2506         uint32_t flag_ccb, throttling = 0;
2507         unsigned long ccb_cdb_phy;
2508         int error;
2509
2510         phbcmu = acb->pmuC;
2511         /* areca cdb command done */
2512         /* Use correct offset and size for syncing */
2513
2514         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2515                         0xFFFFFFFF) {
2516                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2517                 if (acb->cdb_phyadd_hipart)
2518                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2519                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2520                         + ccb_cdb_phy);
2521                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2522                         arcmsr_cdb);
2523                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2524                         ? true : false;
2525                 /* check if command done with no error */
2526                 arcmsr_drain_donequeue(acb, ccb, error);
2527                 throttling++;
2528                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2529                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2530                                 &phbcmu->inbound_doorbell);
2531                         throttling = 0;
2532                 }
2533         }
2534 }
2535
2536 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2537 {
2538         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2539         uint32_t addressLow;
2540         int error;
2541         struct MessageUnit_D  *pmu;
2542         struct ARCMSR_CDB *arcmsr_cdb;
2543         struct CommandControlBlock *ccb;
2544         unsigned long flags, ccb_cdb_phy;
2545
2546         spin_lock_irqsave(&acb->doneq_lock, flags);
2547         pmu = acb->pmuD;
2548         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2549         doneq_index = pmu->doneq_index;
2550         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2551                 do {
2552                         toggle = doneq_index & 0x4000;
2553                         index_stripped = (doneq_index & 0xFFF) + 1;
2554                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2555                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2556                                 ((toggle ^ 0x4000) + 1);
2557                         doneq_index = pmu->doneq_index;
2558                         addressLow = pmu->done_qbuffer[doneq_index &
2559                                 0xFFF].addressLow;
2560                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2561                         if (acb->cdb_phyadd_hipart)
2562                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2563                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2564                                 + ccb_cdb_phy);
2565                         ccb = container_of(arcmsr_cdb,
2566                                 struct CommandControlBlock, arcmsr_cdb);
2567                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2568                                 ? true : false;
2569                         arcmsr_drain_donequeue(acb, ccb, error);
2570                         writel(doneq_index, pmu->outboundlist_read_pointer);
2571                 } while ((doneq_index & 0xFFF) !=
2572                         (outbound_write_pointer & 0xFFF));
2573         }
2574         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2575                 pmu->outboundlist_interrupt_cause);
2576         readl(pmu->outboundlist_interrupt_cause);
2577         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2578 }
2579
2580 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2581 {
2582         uint32_t doneq_index;
2583         uint16_t cmdSMID;
2584         int error;
2585         struct MessageUnit_E __iomem *pmu;
2586         struct CommandControlBlock *ccb;
2587         unsigned long flags;
2588
2589         spin_lock_irqsave(&acb->doneq_lock, flags);
2590         doneq_index = acb->doneq_index;
2591         pmu = acb->pmuE;
2592         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2593                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2594                 ccb = acb->pccb_pool[cmdSMID];
2595                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2596                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2597                 arcmsr_drain_donequeue(acb, ccb, error);
2598                 doneq_index++;
2599                 if (doneq_index >= acb->completionQ_entry)
2600                         doneq_index = 0;
2601         }
2602         acb->doneq_index = doneq_index;
2603         writel(doneq_index, &pmu->reply_post_consumer_index);
2604         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2605 }
2606
2607 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
2608 {
2609         uint32_t doneq_index;
2610         uint16_t cmdSMID;
2611         int error;
2612         struct MessageUnit_F __iomem *phbcmu;
2613         struct CommandControlBlock *ccb;
2614         unsigned long flags;
2615
2616         spin_lock_irqsave(&acb->doneq_lock, flags);
2617         doneq_index = acb->doneq_index;
2618         phbcmu = acb->pmuF;
2619         while (1) {
2620                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2621                 if (cmdSMID == 0xffff)
2622                         break;
2623                 ccb = acb->pccb_pool[cmdSMID];
2624                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
2625                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2626                 arcmsr_drain_donequeue(acb, ccb, error);
2627                 acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
2628                 doneq_index++;
2629                 if (doneq_index >= acb->completionQ_entry)
2630                         doneq_index = 0;
2631         }
2632         acb->doneq_index = doneq_index;
2633         writel(doneq_index, &phbcmu->reply_post_consumer_index);
2634         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2635 }
2636
2637 /*
2638 **********************************************************************************
2639 ** Handle a message interrupt
2640 **
2641 ** The only message interrupt we expect is in response to a query for the current adapter config.
2642 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2643 **********************************************************************************
2644 */
2645 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2646 {
2647         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2648         /*clear interrupt and message state*/
2649         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2650         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2651                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2652 }
2653 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2654 {
2655         struct MessageUnit_B *reg  = acb->pmuB;
2656
2657         /*clear interrupt and message state*/
2658         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2659         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2660                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2661 }
2662 /*
2663 **********************************************************************************
2664 ** Handle a message interrupt
2665 **
2666 ** The only message interrupt we expect is in response to a query for the
2667 ** current adapter config.
2668 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2669 **********************************************************************************
2670 */
2671 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2672 {
2673         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2674         /*clear interrupt and message state*/
2675         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2676         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2677                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2678 }
2679
2680 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2681 {
2682         struct MessageUnit_D *reg  = acb->pmuD;
2683
2684         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2685         readl(reg->outbound_doorbell);
2686         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2687                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2688 }
2689
2690 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2691 {
2692         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2693
2694         writel(0, &reg->host_int_status);
2695         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2696                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2697 }
2698
2699 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2700 {
2701         uint32_t outbound_intstatus;
2702         struct MessageUnit_A __iomem *reg = acb->pmuA;
2703         outbound_intstatus = readl(&reg->outbound_intstatus) &
2704                 acb->outbound_int_enable;
2705         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2706                 return IRQ_NONE;
2707         do {
2708                 writel(outbound_intstatus, &reg->outbound_intstatus);
2709                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2710                         arcmsr_hbaA_doorbell_isr(acb);
2711                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2712                         arcmsr_hbaA_postqueue_isr(acb);
2713                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2714                         arcmsr_hbaA_message_isr(acb);
2715                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2716                         acb->outbound_int_enable;
2717         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2718                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2719                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2720         return IRQ_HANDLED;
2721 }
2722
2723 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2724 {
2725         uint32_t outbound_doorbell;
2726         struct MessageUnit_B *reg = acb->pmuB;
2727         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2728                                 acb->outbound_int_enable;
2729         if (!outbound_doorbell)
2730                 return IRQ_NONE;
2731         do {
2732                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2733                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2734                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2735                         arcmsr_iop2drv_data_wrote_handle(acb);
2736                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2737                         arcmsr_iop2drv_data_read_handle(acb);
2738                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2739                         arcmsr_hbaB_postqueue_isr(acb);
2740                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2741                         arcmsr_hbaB_message_isr(acb);
2742                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2743                         acb->outbound_int_enable;
2744         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2745                 | ARCMSR_IOP2DRV_DATA_READ_OK
2746                 | ARCMSR_IOP2DRV_CDB_DONE
2747                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2748         return IRQ_HANDLED;
2749 }
2750
2751 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2752 {
2753         uint32_t host_interrupt_status;
2754         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2755         /*
2756         *********************************************
2757         **   check outbound intstatus
2758         *********************************************
2759         */
2760         host_interrupt_status = readl(&phbcmu->host_int_status) &
2761                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2762                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2763         if (!host_interrupt_status)
2764                 return IRQ_NONE;
2765         do {
2766                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2767                         arcmsr_hbaC_doorbell_isr(pACB);
2768                 /* MU post queue interrupts*/
2769                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2770                         arcmsr_hbaC_postqueue_isr(pACB);
2771                 host_interrupt_status = readl(&phbcmu->host_int_status);
2772         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2773                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2774         return IRQ_HANDLED;
2775 }
2776
2777 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2778 {
2779         u32 host_interrupt_status;
2780         struct MessageUnit_D  *pmu = pACB->pmuD;
2781
2782         host_interrupt_status = readl(pmu->host_int_status) &
2783                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2784                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2785         if (!host_interrupt_status)
2786                 return IRQ_NONE;
2787         do {
2788                 /* MU post queue interrupts*/
2789                 if (host_interrupt_status &
2790                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2791                         arcmsr_hbaD_postqueue_isr(pACB);
2792                 if (host_interrupt_status &
2793                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2794                         arcmsr_hbaD_doorbell_isr(pACB);
2795                 host_interrupt_status = readl(pmu->host_int_status);
2796         } while (host_interrupt_status &
2797                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2798                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2799         return IRQ_HANDLED;
2800 }
2801
2802 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2803 {
2804         uint32_t host_interrupt_status;
2805         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2806
2807         host_interrupt_status = readl(&pmu->host_int_status) &
2808                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2809                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2810         if (!host_interrupt_status)
2811                 return IRQ_NONE;
2812         do {
2813                 /* MU ioctl transfer doorbell interrupts*/
2814                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2815                         arcmsr_hbaE_doorbell_isr(pACB);
2816                 }
2817                 /* MU post queue interrupts*/
2818                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2819                         arcmsr_hbaE_postqueue_isr(pACB);
2820                 }
2821                 host_interrupt_status = readl(&pmu->host_int_status);
2822         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2823                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2824         return IRQ_HANDLED;
2825 }
2826
2827 static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
2828 {
2829         uint32_t host_interrupt_status;
2830         struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
2831
2832         host_interrupt_status = readl(&phbcmu->host_int_status) &
2833                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2834                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2835         if (!host_interrupt_status)
2836                 return IRQ_NONE;
2837         do {
2838                 /* MU post queue interrupts*/
2839                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
2840                         arcmsr_hbaF_postqueue_isr(pACB);
2841
2842                 /* MU ioctl transfer doorbell interrupts*/
2843                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
2844                         arcmsr_hbaE_doorbell_isr(pACB);
2845
2846                 host_interrupt_status = readl(&phbcmu->host_int_status);
2847         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2848                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2849         return IRQ_HANDLED;
2850 }
2851
2852 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2853 {
2854         switch (acb->adapter_type) {
2855         case ACB_ADAPTER_TYPE_A:
2856                 return arcmsr_hbaA_handle_isr(acb);
2857         case ACB_ADAPTER_TYPE_B:
2858                 return arcmsr_hbaB_handle_isr(acb);
2859         case ACB_ADAPTER_TYPE_C:
2860                 return arcmsr_hbaC_handle_isr(acb);
2861         case ACB_ADAPTER_TYPE_D:
2862                 return arcmsr_hbaD_handle_isr(acb);
2863         case ACB_ADAPTER_TYPE_E:
2864                 return arcmsr_hbaE_handle_isr(acb);
2865         case ACB_ADAPTER_TYPE_F:
2866                 return arcmsr_hbaF_handle_isr(acb);
2867         default:
2868                 return IRQ_NONE;
2869         }
2870 }
2871
2872 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2873 {
2874         if (acb) {
2875                 /* stop adapter background rebuild */
2876                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2877                         uint32_t intmask_org;
2878                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2879                         intmask_org = arcmsr_disable_outbound_ints(acb);
2880                         arcmsr_stop_adapter_bgrb(acb);
2881                         arcmsr_flush_adapter_cache(acb);
2882                         arcmsr_enable_outbound_ints(acb, intmask_org);
2883                 }
2884         }
2885 }
2886
2887
2888 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2889 {
2890         uint32_t        i;
2891
2892         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2893                 for (i = 0; i < 15; i++) {
2894                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2895                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2896                                 acb->rqbuf_getIndex = 0;
2897                                 acb->rqbuf_putIndex = 0;
2898                                 arcmsr_iop_message_read(acb);
2899                                 mdelay(30);
2900                         } else if (acb->rqbuf_getIndex !=
2901                                    acb->rqbuf_putIndex) {
2902                                 acb->rqbuf_getIndex = 0;
2903                                 acb->rqbuf_putIndex = 0;
2904                                 mdelay(30);
2905                         } else
2906                                 break;
2907                 }
2908         }
2909 }
2910
2911 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2912                 struct scsi_cmnd *cmd)
2913 {
2914         char *buffer;
2915         unsigned short use_sg;
2916         int retvalue = 0, transfer_len = 0;
2917         unsigned long flags;
2918         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2919         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2920                 (uint32_t)cmd->cmnd[6] << 16 |
2921                 (uint32_t)cmd->cmnd[7] << 8 |
2922                 (uint32_t)cmd->cmnd[8];
2923         struct scatterlist *sg;
2924
2925         use_sg = scsi_sg_count(cmd);
2926         sg = scsi_sglist(cmd);
2927         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2928         if (use_sg > 1) {
2929                 retvalue = ARCMSR_MESSAGE_FAIL;
2930                 goto message_out;
2931         }
2932         transfer_len += sg->length;
2933         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2934                 retvalue = ARCMSR_MESSAGE_FAIL;
2935                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2936                 goto message_out;
2937         }
2938         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2939         switch (controlcode) {
2940         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2941                 unsigned char *ver_addr;
2942                 uint8_t *ptmpQbuffer;
2943                 uint32_t allxfer_len = 0;
2944                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2945                 if (!ver_addr) {
2946                         retvalue = ARCMSR_MESSAGE_FAIL;
2947                         pr_info("%s: memory not enough!\n", __func__);
2948                         goto message_out;
2949                 }
2950                 ptmpQbuffer = ver_addr;
2951                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2952                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2953                         unsigned int tail = acb->rqbuf_getIndex;
2954                         unsigned int head = acb->rqbuf_putIndex;
2955                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2956
2957                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2958                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2959                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2960
2961                         if (allxfer_len <= cnt_to_end)
2962                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2963                         else {
2964                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2965                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2966                         }
2967                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2968                 }
2969                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2970                         allxfer_len);
2971                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2972                         struct QBUFFER __iomem *prbuffer;
2973                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2974                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2975                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2976                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2977                 }
2978                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2979                 kfree(ver_addr);
2980                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2981                 if (acb->fw_flag == FW_DEADLOCK)
2982                         pcmdmessagefld->cmdmessage.ReturnCode =
2983                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2984                 else
2985                         pcmdmessagefld->cmdmessage.ReturnCode =
2986                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2987                 break;
2988         }
2989         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2990                 unsigned char *ver_addr;
2991                 uint32_t user_len;
2992                 int32_t cnt2end;
2993                 uint8_t *pQbuffer, *ptmpuserbuffer;
2994
2995                 user_len = pcmdmessagefld->cmdmessage.Length;
2996                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2997                         retvalue = ARCMSR_MESSAGE_FAIL;
2998                         goto message_out;
2999                 }
3000
3001                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3002                 if (!ver_addr) {
3003                         retvalue = ARCMSR_MESSAGE_FAIL;
3004                         goto message_out;
3005                 }
3006                 ptmpuserbuffer = ver_addr;
3007
3008                 memcpy(ptmpuserbuffer,
3009                         pcmdmessagefld->messagedatabuffer, user_len);
3010                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3011                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
3012                         struct SENSE_DATA *sensebuffer =
3013                                 (struct SENSE_DATA *)cmd->sense_buffer;
3014                         arcmsr_write_ioctldata2iop(acb);
3015                         /* has error report sensedata */
3016                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
3017                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
3018                         sensebuffer->AdditionalSenseLength = 0x0A;
3019                         sensebuffer->AdditionalSenseCode = 0x20;
3020                         sensebuffer->Valid = 1;
3021                         retvalue = ARCMSR_MESSAGE_FAIL;
3022                 } else {
3023                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
3024                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
3025                         if (user_len > cnt2end) {
3026                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
3027                                 ptmpuserbuffer += cnt2end;
3028                                 user_len -= cnt2end;
3029                                 acb->wqbuf_putIndex = 0;
3030                                 pQbuffer = acb->wqbuffer;
3031                         }
3032                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
3033                         acb->wqbuf_putIndex += user_len;
3034                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
3035                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
3036                                 acb->acb_flags &=
3037                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
3038                                 arcmsr_write_ioctldata2iop(acb);
3039                         }
3040                 }
3041                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3042                 kfree(ver_addr);
3043                 if (acb->fw_flag == FW_DEADLOCK)
3044                         pcmdmessagefld->cmdmessage.ReturnCode =
3045                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3046                 else
3047                         pcmdmessagefld->cmdmessage.ReturnCode =
3048                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3049                 break;
3050         }
3051         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
3052                 uint8_t *pQbuffer = acb->rqbuffer;
3053
3054                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3055                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3056                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3057                 acb->rqbuf_getIndex = 0;
3058                 acb->rqbuf_putIndex = 0;
3059                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3060                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3061                 if (acb->fw_flag == FW_DEADLOCK)
3062                         pcmdmessagefld->cmdmessage.ReturnCode =
3063                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3064                 else
3065                         pcmdmessagefld->cmdmessage.ReturnCode =
3066                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3067                 break;
3068         }
3069         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
3070                 uint8_t *pQbuffer = acb->wqbuffer;
3071                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3072                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3073                         ACB_F_MESSAGE_WQBUFFER_READED);
3074                 acb->wqbuf_getIndex = 0;
3075                 acb->wqbuf_putIndex = 0;
3076                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3077                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3078                 if (acb->fw_flag == FW_DEADLOCK)
3079                         pcmdmessagefld->cmdmessage.ReturnCode =
3080                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3081                 else
3082                         pcmdmessagefld->cmdmessage.ReturnCode =
3083                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3084                 break;
3085         }
3086         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
3087                 uint8_t *pQbuffer;
3088                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3089                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3090                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3091                 acb->rqbuf_getIndex = 0;
3092                 acb->rqbuf_putIndex = 0;
3093                 pQbuffer = acb->rqbuffer;
3094                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3095                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3096                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3097                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3098                         ACB_F_MESSAGE_WQBUFFER_READED);
3099                 acb->wqbuf_getIndex = 0;
3100                 acb->wqbuf_putIndex = 0;
3101                 pQbuffer = acb->wqbuffer;
3102                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3103                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3104                 if (acb->fw_flag == FW_DEADLOCK)
3105                         pcmdmessagefld->cmdmessage.ReturnCode =
3106                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3107                 else
3108                         pcmdmessagefld->cmdmessage.ReturnCode =
3109                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3110                 break;
3111         }
3112         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
3113                 if (acb->fw_flag == FW_DEADLOCK)
3114                         pcmdmessagefld->cmdmessage.ReturnCode =
3115                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3116                 else
3117                         pcmdmessagefld->cmdmessage.ReturnCode =
3118                                 ARCMSR_MESSAGE_RETURNCODE_3F;
3119                 break;
3120         }
3121         case ARCMSR_MESSAGE_SAY_HELLO: {
3122                 int8_t *hello_string = "Hello! I am ARCMSR";
3123                 if (acb->fw_flag == FW_DEADLOCK)
3124                         pcmdmessagefld->cmdmessage.ReturnCode =
3125                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3126                 else
3127                         pcmdmessagefld->cmdmessage.ReturnCode =
3128                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3129                 memcpy(pcmdmessagefld->messagedatabuffer,
3130                         hello_string, (int16_t)strlen(hello_string));
3131                 break;
3132         }
3133         case ARCMSR_MESSAGE_SAY_GOODBYE: {
3134                 if (acb->fw_flag == FW_DEADLOCK)
3135                         pcmdmessagefld->cmdmessage.ReturnCode =
3136                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3137                 else
3138                         pcmdmessagefld->cmdmessage.ReturnCode =
3139                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3140                 arcmsr_iop_parking(acb);
3141                 break;
3142         }
3143         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
3144                 if (acb->fw_flag == FW_DEADLOCK)
3145                         pcmdmessagefld->cmdmessage.ReturnCode =
3146                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3147                 else
3148                         pcmdmessagefld->cmdmessage.ReturnCode =
3149                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3150                 arcmsr_flush_adapter_cache(acb);
3151                 break;
3152         }
3153         default:
3154                 retvalue = ARCMSR_MESSAGE_FAIL;
3155                 pr_info("%s: unknown controlcode!\n", __func__);
3156         }
3157 message_out:
3158         if (use_sg) {
3159                 struct scatterlist *sg = scsi_sglist(cmd);
3160                 kunmap_atomic(buffer - sg->offset);
3161         }
3162         return retvalue;
3163 }
3164
3165 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
3166 {
3167         struct list_head *head;
3168         struct CommandControlBlock *ccb = NULL;
3169         unsigned long flags;
3170
3171         spin_lock_irqsave(&acb->ccblist_lock, flags);
3172         head = &acb->ccb_free_list;
3173         if (!list_empty(head)) {
3174                 ccb = list_entry(head->next, struct CommandControlBlock, list);
3175                 list_del_init(&ccb->list);
3176         }else{
3177                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3178                 return NULL;
3179         }
3180         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3181         return ccb;
3182 }
3183
3184 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
3185                 struct scsi_cmnd *cmd)
3186 {
3187         switch (cmd->cmnd[0]) {
3188         case INQUIRY: {
3189                 unsigned char inqdata[36];
3190                 char *buffer;
3191                 struct scatterlist *sg;
3192
3193                 if (cmd->device->lun) {
3194                         cmd->result = (DID_TIME_OUT << 16);
3195                         scsi_done(cmd);
3196                         return;
3197                 }
3198                 inqdata[0] = TYPE_PROCESSOR;
3199                 /* Periph Qualifier & Periph Dev Type */
3200                 inqdata[1] = 0;
3201                 /* rem media bit & Dev Type Modifier */
3202                 inqdata[2] = 0;
3203                 /* ISO, ECMA, & ANSI versions */
3204                 inqdata[4] = 31;
3205                 /* length of additional data */
3206                 memcpy(&inqdata[8], "Areca   ", 8);
3207                 /* Vendor Identification */
3208                 memcpy(&inqdata[16], "RAID controller ", 16);
3209                 /* Product Identification */
3210                 memcpy(&inqdata[32], "R001", 4); /* Product Revision */
3211
3212                 sg = scsi_sglist(cmd);
3213                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3214
3215                 memcpy(buffer, inqdata, sizeof(inqdata));
3216                 sg = scsi_sglist(cmd);
3217                 kunmap_atomic(buffer - sg->offset);
3218
3219                 scsi_done(cmd);
3220         }
3221         break;
3222         case WRITE_BUFFER:
3223         case READ_BUFFER: {
3224                 if (arcmsr_iop_message_xfer(acb, cmd))
3225                         cmd->result = (DID_ERROR << 16);
3226                 scsi_done(cmd);
3227         }
3228         break;
3229         default:
3230                 scsi_done(cmd);
3231         }
3232 }
3233
3234 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd)
3235 {
3236         struct Scsi_Host *host = cmd->device->host;
3237         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3238         struct CommandControlBlock *ccb;
3239         int target = cmd->device->id;
3240
3241         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3242                 cmd->result = (DID_NO_CONNECT << 16);
3243                 scsi_done(cmd);
3244                 return 0;
3245         }
3246         cmd->host_scribble = NULL;
3247         cmd->result = 0;
3248         if (target == 16) {
3249                 /* virtual device for iop message transfer */
3250                 arcmsr_handle_virtual_command(acb, cmd);
3251                 return 0;
3252         }
3253         ccb = arcmsr_get_freeccb(acb);
3254         if (!ccb)
3255                 return SCSI_MLQUEUE_HOST_BUSY;
3256         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3257                 cmd->result = (DID_ERROR << 16) | SAM_STAT_RESERVATION_CONFLICT;
3258                 scsi_done(cmd);
3259                 return 0;
3260         }
3261         arcmsr_post_ccb(acb, ccb);
3262         return 0;
3263 }
3264
3265 static DEF_SCSI_QCMD(arcmsr_queue_command)
3266
3267 static int arcmsr_slave_config(struct scsi_device *sdev)
3268 {
3269         unsigned int    dev_timeout;
3270
3271         dev_timeout = sdev->request_queue->rq_timeout;
3272         if ((cmd_timeout > 0) && ((cmd_timeout * HZ) > dev_timeout))
3273                 blk_queue_rq_timeout(sdev->request_queue, cmd_timeout * HZ);
3274         return 0;
3275 }
3276
3277 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3278 {
3279         int count;
3280         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3281         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3282         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3283         uint32_t *firm_model = &rwbuffer[15];
3284         uint32_t *firm_version = &rwbuffer[17];
3285         uint32_t *device_map = &rwbuffer[21];
3286
3287         count = 2;
3288         while (count) {
3289                 *acb_firm_model = readl(firm_model);
3290                 acb_firm_model++;
3291                 firm_model++;
3292                 count--;
3293         }
3294         count = 4;
3295         while (count) {
3296                 *acb_firm_version = readl(firm_version);
3297                 acb_firm_version++;
3298                 firm_version++;
3299                 count--;
3300         }
3301         count = 4;
3302         while (count) {
3303                 *acb_device_map = readl(device_map);
3304                 acb_device_map++;
3305                 device_map++;
3306                 count--;
3307         }
3308         pACB->signature = readl(&rwbuffer[0]);
3309         pACB->firm_request_len = readl(&rwbuffer[1]);
3310         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3311         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3312         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3313         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3314         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3315                 pACB->host->host_no,
3316                 pACB->firm_model,
3317                 pACB->firm_version);
3318 }
3319
3320 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3321 {
3322         struct MessageUnit_A __iomem *reg = acb->pmuA;
3323
3324         arcmsr_wait_firmware_ready(acb);
3325         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3326         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3327                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3328                         miscellaneous data' timeout \n", acb->host->host_no);
3329                 return false;
3330         }
3331         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3332         return true;
3333 }
3334 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3335 {
3336         struct MessageUnit_B *reg = acb->pmuB;
3337
3338         arcmsr_wait_firmware_ready(acb);
3339         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3340         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3341                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3342                 return false;
3343         }
3344         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3345         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3346                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3347                         miscellaneous data' timeout \n", acb->host->host_no);
3348                 return false;
3349         }
3350         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3351         return true;
3352 }
3353
3354 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3355 {
3356         uint32_t intmask_org;
3357         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3358
3359         /* disable all outbound interrupt */
3360         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3361         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3362         /* wait firmware ready */
3363         arcmsr_wait_firmware_ready(pACB);
3364         /* post "get config" instruction */
3365         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3366         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3367         /* wait message ready */
3368         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3369                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3370                         miscellaneous data' timeout \n", pACB->host->host_no);
3371                 return false;
3372         }
3373         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3374         return true;
3375 }
3376
3377 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3378 {
3379         struct MessageUnit_D *reg = acb->pmuD;
3380
3381         if (readl(acb->pmuD->outbound_doorbell) &
3382                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3383                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3384                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3385         }
3386         arcmsr_wait_firmware_ready(acb);
3387         /* post "get config" instruction */
3388         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3389         /* wait message ready */
3390         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3391                 pr_notice("arcmsr%d: wait get adapter firmware "
3392                         "miscellaneous data timeout\n", acb->host->host_no);
3393                 return false;
3394         }
3395         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3396         return true;
3397 }
3398
3399 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3400 {
3401         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3402         uint32_t intmask_org;
3403
3404         /* disable all outbound interrupt */
3405         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3406         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3407         /* wait firmware ready */
3408         arcmsr_wait_firmware_ready(pACB);
3409         mdelay(20);
3410         /* post "get config" instruction */
3411         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3412
3413         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3414         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3415         /* wait message ready */
3416         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3417                 pr_notice("arcmsr%d: wait get adapter firmware "
3418                         "miscellaneous data timeout\n", pACB->host->host_no);
3419                 return false;
3420         }
3421         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3422         return true;
3423 }
3424
3425 static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
3426 {
3427         struct MessageUnit_F __iomem *reg = pACB->pmuF;
3428         uint32_t intmask_org;
3429
3430         /* disable all outbound interrupt */
3431         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3432         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3433         /* wait firmware ready */
3434         arcmsr_wait_firmware_ready(pACB);
3435         /* post "get config" instruction */
3436         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3437
3438         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3439         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3440         /* wait message ready */
3441         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3442                 pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
3443                           pACB->host->host_no);
3444                 return false;
3445         }
3446         arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
3447         return true;
3448 }
3449
3450 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3451 {
3452         bool rtn = false;
3453
3454         switch (acb->adapter_type) {
3455         case ACB_ADAPTER_TYPE_A:
3456                 rtn = arcmsr_hbaA_get_config(acb);
3457                 break;
3458         case ACB_ADAPTER_TYPE_B:
3459                 rtn = arcmsr_hbaB_get_config(acb);
3460                 break;
3461         case ACB_ADAPTER_TYPE_C:
3462                 rtn = arcmsr_hbaC_get_config(acb);
3463                 break;
3464         case ACB_ADAPTER_TYPE_D:
3465                 rtn = arcmsr_hbaD_get_config(acb);
3466                 break;
3467         case ACB_ADAPTER_TYPE_E:
3468                 rtn = arcmsr_hbaE_get_config(acb);
3469                 break;
3470         case ACB_ADAPTER_TYPE_F:
3471                 rtn = arcmsr_hbaF_get_config(acb);
3472                 break;
3473         default:
3474                 break;
3475         }
3476         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3477         if (acb->host->can_queue >= acb->firm_numbers_queue)
3478                 acb->host->can_queue = acb->maxOutstanding;
3479         else
3480                 acb->maxOutstanding = acb->host->can_queue;
3481         acb->maxFreeCCB = acb->host->can_queue;
3482         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3483                 acb->maxFreeCCB += 64;
3484         return rtn;
3485 }
3486
3487 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3488         struct CommandControlBlock *poll_ccb)
3489 {
3490         struct MessageUnit_A __iomem *reg = acb->pmuA;
3491         struct CommandControlBlock *ccb;
3492         struct ARCMSR_CDB *arcmsr_cdb;
3493         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3494         int rtn;
3495         bool error;
3496         unsigned long ccb_cdb_phy;
3497
3498 polling_hba_ccb_retry:
3499         poll_count++;
3500         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3501         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3502         while (1) {
3503                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3504                         if (poll_ccb_done){
3505                                 rtn = SUCCESS;
3506                                 break;
3507                         }else {
3508                                 msleep(25);
3509                                 if (poll_count > 100){
3510                                         rtn = FAILED;
3511                                         break;
3512                                 }
3513                                 goto polling_hba_ccb_retry;
3514                         }
3515                 }
3516                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3517                 if (acb->cdb_phyadd_hipart)
3518                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3519                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3520                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3521                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3522                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3523                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3524                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3525                                         " poll command abort successfully \n"
3526                                         , acb->host->host_no
3527                                         , ccb->pcmd->device->id
3528                                         , (u32)ccb->pcmd->device->lun
3529                                         , ccb);
3530                                 ccb->pcmd->result = DID_ABORT << 16;
3531                                 arcmsr_ccb_complete(ccb);
3532                                 continue;
3533                         }
3534                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3535                                 " command done ccb = '0x%p'"
3536                                 "ccboutstandingcount = %d \n"
3537                                 , acb->host->host_no
3538                                 , ccb
3539                                 , atomic_read(&acb->ccboutstandingcount));
3540                         continue;
3541                 }
3542                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3543                 arcmsr_report_ccb_state(acb, ccb, error);
3544         }
3545         return rtn;
3546 }
3547
3548 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3549                                         struct CommandControlBlock *poll_ccb)
3550 {
3551         struct MessageUnit_B *reg = acb->pmuB;
3552         struct ARCMSR_CDB *arcmsr_cdb;
3553         struct CommandControlBlock *ccb;
3554         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3555         int index, rtn;
3556         bool error;
3557         unsigned long ccb_cdb_phy;
3558
3559 polling_hbb_ccb_retry:
3560         poll_count++;
3561         /* clear doorbell interrupt */
3562         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3563         while(1){
3564                 index = reg->doneq_index;
3565                 flag_ccb = reg->done_qbuffer[index];
3566                 if (flag_ccb == 0) {
3567                         if (poll_ccb_done){
3568                                 rtn = SUCCESS;
3569                                 break;
3570                         }else {
3571                                 msleep(25);
3572                                 if (poll_count > 100){
3573                                         rtn = FAILED;
3574                                         break;
3575                                 }
3576                                 goto polling_hbb_ccb_retry;
3577                         }
3578                 }
3579                 reg->done_qbuffer[index] = 0;
3580                 index++;
3581                 /*if last index number set it to 0 */
3582                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3583                 reg->doneq_index = index;
3584                 /* check if command done with no error*/
3585                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3586                 if (acb->cdb_phyadd_hipart)
3587                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3588                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3589                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3590                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3591                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3592                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3593                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3594                                         " poll command abort successfully \n"
3595                                         ,acb->host->host_no
3596                                         ,ccb->pcmd->device->id
3597                                         ,(u32)ccb->pcmd->device->lun
3598                                         ,ccb);
3599                                 ccb->pcmd->result = DID_ABORT << 16;
3600                                 arcmsr_ccb_complete(ccb);
3601                                 continue;
3602                         }
3603                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3604                                 " command done ccb = '0x%p'"
3605                                 "ccboutstandingcount = %d \n"
3606                                 , acb->host->host_no
3607                                 , ccb
3608                                 , atomic_read(&acb->ccboutstandingcount));
3609                         continue;
3610                 }
3611                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3612                 arcmsr_report_ccb_state(acb, ccb, error);
3613         }
3614         return rtn;
3615 }
3616
3617 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3618                 struct CommandControlBlock *poll_ccb)
3619 {
3620         struct MessageUnit_C __iomem *reg = acb->pmuC;
3621         uint32_t flag_ccb;
3622         struct ARCMSR_CDB *arcmsr_cdb;
3623         bool error;
3624         struct CommandControlBlock *pCCB;
3625         uint32_t poll_ccb_done = 0, poll_count = 0;
3626         int rtn;
3627         unsigned long ccb_cdb_phy;
3628
3629 polling_hbc_ccb_retry:
3630         poll_count++;
3631         while (1) {
3632                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3633                         if (poll_ccb_done) {
3634                                 rtn = SUCCESS;
3635                                 break;
3636                         } else {
3637                                 msleep(25);
3638                                 if (poll_count > 100) {
3639                                         rtn = FAILED;
3640                                         break;
3641                                 }
3642                                 goto polling_hbc_ccb_retry;
3643                         }
3644                 }
3645                 flag_ccb = readl(&reg->outbound_queueport_low);
3646                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3647                 if (acb->cdb_phyadd_hipart)
3648                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3649                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3650                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3651                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3652                 /* check ifcommand done with no error*/
3653                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3654                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3655                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3656                                         " poll command abort successfully \n"
3657                                         , acb->host->host_no
3658                                         , pCCB->pcmd->device->id
3659                                         , (u32)pCCB->pcmd->device->lun
3660                                         , pCCB);
3661                                 pCCB->pcmd->result = DID_ABORT << 16;
3662                                 arcmsr_ccb_complete(pCCB);
3663                                 continue;
3664                         }
3665                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3666                                 " command done ccb = '0x%p'"
3667                                 "ccboutstandingcount = %d \n"
3668                                 , acb->host->host_no
3669                                 , pCCB
3670                                 , atomic_read(&acb->ccboutstandingcount));
3671                         continue;
3672                 }
3673                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3674                 arcmsr_report_ccb_state(acb, pCCB, error);
3675         }
3676         return rtn;
3677 }
3678
3679 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3680                                 struct CommandControlBlock *poll_ccb)
3681 {
3682         bool error;
3683         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb;
3684         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3685         unsigned long flags, ccb_cdb_phy;
3686         struct ARCMSR_CDB *arcmsr_cdb;
3687         struct CommandControlBlock *pCCB;
3688         struct MessageUnit_D *pmu = acb->pmuD;
3689
3690 polling_hbaD_ccb_retry:
3691         poll_count++;
3692         while (1) {
3693                 spin_lock_irqsave(&acb->doneq_lock, flags);
3694                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3695                 doneq_index = pmu->doneq_index;
3696                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3697                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3698                         if (poll_ccb_done) {
3699                                 rtn = SUCCESS;
3700                                 break;
3701                         } else {
3702                                 msleep(25);
3703                                 if (poll_count > 40) {
3704                                         rtn = FAILED;
3705                                         break;
3706                                 }
3707                                 goto polling_hbaD_ccb_retry;
3708                         }
3709                 }
3710                 toggle = doneq_index & 0x4000;
3711                 index_stripped = (doneq_index & 0xFFF) + 1;
3712                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3713                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3714                                 ((toggle ^ 0x4000) + 1);
3715                 doneq_index = pmu->doneq_index;
3716                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3717                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3718                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3719                 if (acb->cdb_phyadd_hipart)
3720                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3721                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3722                         ccb_cdb_phy);
3723                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3724                         arcmsr_cdb);
3725                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3726                 if ((pCCB->acb != acb) ||
3727                         (pCCB->startdone != ARCMSR_CCB_START)) {
3728                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3729                                 pr_notice("arcmsr%d: scsi id = %d "
3730                                         "lun = %d ccb = '0x%p' poll command "
3731                                         "abort successfully\n"
3732                                         , acb->host->host_no
3733                                         , pCCB->pcmd->device->id
3734                                         , (u32)pCCB->pcmd->device->lun
3735                                         , pCCB);
3736                                 pCCB->pcmd->result = DID_ABORT << 16;
3737                                 arcmsr_ccb_complete(pCCB);
3738                                 continue;
3739                         }
3740                         pr_notice("arcmsr%d: polling an illegal "
3741                                 "ccb command done ccb = '0x%p' "
3742                                 "ccboutstandingcount = %d\n"
3743                                 , acb->host->host_no
3744                                 , pCCB
3745                                 , atomic_read(&acb->ccboutstandingcount));
3746                         continue;
3747                 }
3748                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3749                         ? true : false;
3750                 arcmsr_report_ccb_state(acb, pCCB, error);
3751         }
3752         return rtn;
3753 }
3754
3755 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3756                                 struct CommandControlBlock *poll_ccb)
3757 {
3758         bool error;
3759         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3760         uint16_t cmdSMID;
3761         unsigned long flags;
3762         int rtn;
3763         struct CommandControlBlock *pCCB;
3764         struct MessageUnit_E __iomem *reg = acb->pmuE;
3765
3766         polling_hbaC_ccb_retry:
3767         poll_count++;
3768         while (1) {
3769                 spin_lock_irqsave(&acb->doneq_lock, flags);
3770                 doneq_index = acb->doneq_index;
3771                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3772                                 doneq_index) {
3773                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3774                         if (poll_ccb_done) {
3775                                 rtn = SUCCESS;
3776                                 break;
3777                         } else {
3778                                 msleep(25);
3779                                 if (poll_count > 40) {
3780                                         rtn = FAILED;
3781                                         break;
3782                                 }
3783                                 goto polling_hbaC_ccb_retry;
3784                         }
3785                 }
3786                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3787                 doneq_index++;
3788                 if (doneq_index >= acb->completionQ_entry)
3789                         doneq_index = 0;
3790                 acb->doneq_index = doneq_index;
3791                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3792                 pCCB = acb->pccb_pool[cmdSMID];
3793                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3794                 /* check if command done with no error*/
3795                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3796                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3797                                 pr_notice("arcmsr%d: scsi id = %d "
3798                                         "lun = %d ccb = '0x%p' poll command "
3799                                         "abort successfully\n"
3800                                         , acb->host->host_no
3801                                         , pCCB->pcmd->device->id
3802                                         , (u32)pCCB->pcmd->device->lun
3803                                         , pCCB);
3804                                 pCCB->pcmd->result = DID_ABORT << 16;
3805                                 arcmsr_ccb_complete(pCCB);
3806                                 continue;
3807                         }
3808                         pr_notice("arcmsr%d: polling an illegal "
3809                                 "ccb command done ccb = '0x%p' "
3810                                 "ccboutstandingcount = %d\n"
3811                                 , acb->host->host_no
3812                                 , pCCB
3813                                 , atomic_read(&acb->ccboutstandingcount));
3814                         continue;
3815                 }
3816                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3817                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3818                 arcmsr_report_ccb_state(acb, pCCB, error);
3819         }
3820         writel(doneq_index, &reg->reply_post_consumer_index);
3821         return rtn;
3822 }
3823
3824 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3825                                         struct CommandControlBlock *poll_ccb)
3826 {
3827         int rtn = 0;
3828         switch (acb->adapter_type) {
3829
3830         case ACB_ADAPTER_TYPE_A:
3831                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3832                 break;
3833         case ACB_ADAPTER_TYPE_B:
3834                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3835                 break;
3836         case ACB_ADAPTER_TYPE_C:
3837                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3838                 break;
3839         case ACB_ADAPTER_TYPE_D:
3840                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3841                 break;
3842         case ACB_ADAPTER_TYPE_E:
3843         case ACB_ADAPTER_TYPE_F:
3844                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3845                 break;
3846         }
3847         return rtn;
3848 }
3849
3850 static void arcmsr_set_iop_datetime(struct timer_list *t)
3851 {
3852         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3853         unsigned int next_time;
3854         struct tm tm;
3855
3856         union {
3857                 struct  {
3858                 uint16_t        signature;
3859                 uint8_t         year;
3860                 uint8_t         month;
3861                 uint8_t         date;
3862                 uint8_t         hour;
3863                 uint8_t         minute;
3864                 uint8_t         second;
3865                 } a;
3866                 struct  {
3867                 uint32_t        msg_time[2];
3868                 } b;
3869         } datetime;
3870
3871         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3872
3873         datetime.a.signature = 0x55AA;
3874         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3875         datetime.a.month = tm.tm_mon;
3876         datetime.a.date = tm.tm_mday;
3877         datetime.a.hour = tm.tm_hour;
3878         datetime.a.minute = tm.tm_min;
3879         datetime.a.second = tm.tm_sec;
3880
3881         switch (pacb->adapter_type) {
3882                 case ACB_ADAPTER_TYPE_A: {
3883                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3884                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3885                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3886                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3887                         break;
3888                 }
3889                 case ACB_ADAPTER_TYPE_B: {
3890                         uint32_t __iomem *rwbuffer;
3891                         struct MessageUnit_B *reg = pacb->pmuB;
3892                         rwbuffer = reg->message_rwbuffer;
3893                         writel(datetime.b.msg_time[0], rwbuffer++);
3894                         writel(datetime.b.msg_time[1], rwbuffer++);
3895                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3896                         break;
3897                 }
3898                 case ACB_ADAPTER_TYPE_C: {
3899                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3900                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3901                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3902                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3903                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3904                         break;
3905                 }
3906                 case ACB_ADAPTER_TYPE_D: {
3907                         uint32_t __iomem *rwbuffer;
3908                         struct MessageUnit_D *reg = pacb->pmuD;
3909                         rwbuffer = reg->msgcode_rwbuffer;
3910                         writel(datetime.b.msg_time[0], rwbuffer++);
3911                         writel(datetime.b.msg_time[1], rwbuffer++);
3912                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3913                         break;
3914                 }
3915                 case ACB_ADAPTER_TYPE_E: {
3916                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3917                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3918                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3919                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3920                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3921                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3922                         break;
3923                 }
3924                 case ACB_ADAPTER_TYPE_F: {
3925                         struct MessageUnit_F __iomem *reg = pacb->pmuF;
3926
3927                         pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
3928                         pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
3929                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3930                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3931                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3932                         break;
3933                 }
3934         }
3935         if (sys_tz.tz_minuteswest)
3936                 next_time = ARCMSR_HOURS;
3937         else
3938                 next_time = ARCMSR_MINUTES;
3939         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3940 }
3941
3942 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3943 {
3944         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3945         dma_addr_t dma_coherent_handle;
3946
3947         /*
3948         ********************************************************************
3949         ** here we need to tell iop 331 our freeccb.HighPart
3950         ** if freeccb.HighPart is not zero
3951         ********************************************************************
3952         */
3953         switch (acb->adapter_type) {
3954         case ACB_ADAPTER_TYPE_B:
3955         case ACB_ADAPTER_TYPE_D:
3956                 dma_coherent_handle = acb->dma_coherent_handle2;
3957                 break;
3958         case ACB_ADAPTER_TYPE_E:
3959         case ACB_ADAPTER_TYPE_F:
3960                 dma_coherent_handle = acb->dma_coherent_handle +
3961                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3962                 break;
3963         default:
3964                 dma_coherent_handle = acb->dma_coherent_handle;
3965                 break;
3966         }
3967         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3968         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3969         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3970         acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
3971         /*
3972         ***********************************************************************
3973         **    if adapter type B, set window of "post command Q"
3974         ***********************************************************************
3975         */
3976         switch (acb->adapter_type) {
3977
3978         case ACB_ADAPTER_TYPE_A: {
3979                 if (cdb_phyaddr_hi32 != 0) {
3980                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3981                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3982                                                 &reg->message_rwbuffer[0]);
3983                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3984                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3985                                                         &reg->inbound_msgaddr0);
3986                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3987                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3988                                 part physical address timeout\n",
3989                                 acb->host->host_no);
3990                                 return 1;
3991                         }
3992                 }
3993                 }
3994                 break;
3995
3996         case ACB_ADAPTER_TYPE_B: {
3997                 uint32_t __iomem *rwbuffer;
3998
3999                 struct MessageUnit_B *reg = acb->pmuB;
4000                 reg->postq_index = 0;
4001                 reg->doneq_index = 0;
4002                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
4003                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4004                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
4005                                 acb->host->host_no);
4006                         return 1;
4007                 }
4008                 rwbuffer = reg->message_rwbuffer;
4009                 /* driver "set config" signature */
4010                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4011                 /* normal should be zero */
4012                 writel(cdb_phyaddr_hi32, rwbuffer++);
4013                 /* postQ size (256 + 8)*4        */
4014                 writel(cdb_phyaddr, rwbuffer++);
4015                 /* doneQ size (256 + 8)*4        */
4016                 writel(cdb_phyaddr + 1056, rwbuffer++);
4017                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
4018                 writel(1056, rwbuffer);
4019
4020                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
4021                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4022                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4023                         timeout \n",acb->host->host_no);
4024                         return 1;
4025                 }
4026                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
4027                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4028                         pr_err("arcmsr%d: can't set driver mode.\n",
4029                                 acb->host->host_no);
4030                         return 1;
4031                 }
4032                 }
4033                 break;
4034         case ACB_ADAPTER_TYPE_C: {
4035                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4036
4037                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
4038                                         acb->adapter_index, cdb_phyaddr_hi32);
4039                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4040                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
4041                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4042                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4043                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
4044                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4045                                 timeout \n", acb->host->host_no);
4046                                 return 1;
4047                         }
4048                 }
4049                 break;
4050         case ACB_ADAPTER_TYPE_D: {
4051                 uint32_t __iomem *rwbuffer;
4052                 struct MessageUnit_D *reg = acb->pmuD;
4053                 reg->postq_index = 0;
4054                 reg->doneq_index = 0;
4055                 rwbuffer = reg->msgcode_rwbuffer;
4056                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4057                 writel(cdb_phyaddr_hi32, rwbuffer++);
4058                 writel(cdb_phyaddr, rwbuffer++);
4059                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
4060                         sizeof(struct InBound_SRB)), rwbuffer++);
4061                 writel(0x100, rwbuffer);
4062                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
4063                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
4064                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4065                                 acb->host->host_no);
4066                         return 1;
4067                 }
4068                 }
4069                 break;
4070         case ACB_ADAPTER_TYPE_E: {
4071                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4072                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4073                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
4074                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
4075                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
4076                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
4077                 writel(lower_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[5]);
4078                 writel(upper_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[6]);
4079                 writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
4080                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4081                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4082                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4083                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4084                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
4085                                 acb->host->host_no);
4086                         return 1;
4087                 }
4088                 }
4089                 break;
4090         case ACB_ADAPTER_TYPE_F: {
4091                 struct MessageUnit_F __iomem *reg = acb->pmuF;
4092
4093                 acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
4094                 acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
4095                 acb->msgcode_rwbuffer[2] = cdb_phyaddr;
4096                 acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
4097                 acb->msgcode_rwbuffer[4] = acb->ccbsize;
4098                 acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
4099                 acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
4100                 acb->msgcode_rwbuffer[7] = acb->completeQ_size;
4101                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4102                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4103                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4104                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4105                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4106                                 acb->host->host_no);
4107                         return 1;
4108                 }
4109                 }
4110                 break;
4111         }
4112         return 0;
4113 }
4114
4115 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
4116 {
4117         uint32_t firmware_state = 0;
4118         switch (acb->adapter_type) {
4119
4120         case ACB_ADAPTER_TYPE_A: {
4121                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4122                 do {
4123                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4124                                 msleep(20);
4125                         firmware_state = readl(&reg->outbound_msgaddr1);
4126                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
4127                 }
4128                 break;
4129
4130         case ACB_ADAPTER_TYPE_B: {
4131                 struct MessageUnit_B *reg = acb->pmuB;
4132                 do {
4133                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4134                                 msleep(20);
4135                         firmware_state = readl(reg->iop2drv_doorbell);
4136                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
4137                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
4138                 }
4139                 break;
4140         case ACB_ADAPTER_TYPE_C: {
4141                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4142                 do {
4143                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4144                                 msleep(20);
4145                         firmware_state = readl(&reg->outbound_msgaddr1);
4146                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
4147                 }
4148                 break;
4149         case ACB_ADAPTER_TYPE_D: {
4150                 struct MessageUnit_D *reg = acb->pmuD;
4151                 do {
4152                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4153                                 msleep(20);
4154                         firmware_state = readl(reg->outbound_msgaddr1);
4155                 } while ((firmware_state &
4156                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
4157                 }
4158                 break;
4159         case ACB_ADAPTER_TYPE_E:
4160         case ACB_ADAPTER_TYPE_F: {
4161                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4162                 do {
4163                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4164                                 msleep(20);
4165                         firmware_state = readl(&reg->outbound_msgaddr1);
4166                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
4167                 }
4168                 break;
4169         }
4170 }
4171
4172 static void arcmsr_request_device_map(struct timer_list *t)
4173 {
4174         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
4175         if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG | ACB_F_BUS_RESET | ACB_F_ABORT)) {
4176                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4177         } else {
4178                 acb->fw_flag = FW_NORMAL;
4179                 switch (acb->adapter_type) {
4180                 case ACB_ADAPTER_TYPE_A: {
4181                         struct MessageUnit_A __iomem *reg = acb->pmuA;
4182                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4183                         break;
4184                         }
4185                 case ACB_ADAPTER_TYPE_B: {
4186                         struct MessageUnit_B *reg = acb->pmuB;
4187                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
4188                         break;
4189                         }
4190                 case ACB_ADAPTER_TYPE_C: {
4191                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4192                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4193                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4194                         break;
4195                         }
4196                 case ACB_ADAPTER_TYPE_D: {
4197                         struct MessageUnit_D *reg = acb->pmuD;
4198                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
4199                         break;
4200                         }
4201                 case ACB_ADAPTER_TYPE_E: {
4202                         struct MessageUnit_E __iomem *reg = acb->pmuE;
4203                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4204                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4205                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4206                         break;
4207                         }
4208                 case ACB_ADAPTER_TYPE_F: {
4209                         struct MessageUnit_F __iomem *reg = acb->pmuF;
4210                         uint32_t outMsg1 = readl(&reg->outbound_msgaddr1);
4211
4212                         if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) ||
4213                                 (outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
4214                                 goto nxt6s;
4215                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4216                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4217                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4218                         break;
4219                         }
4220                 default:
4221                         return;
4222                 }
4223                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
4224 nxt6s:
4225                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4226         }
4227 }
4228
4229 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
4230 {
4231         struct MessageUnit_A __iomem *reg = acb->pmuA;
4232         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4233         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
4234         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4235                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4236                                 rebuild' timeout \n", acb->host->host_no);
4237         }
4238 }
4239
4240 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
4241 {
4242         struct MessageUnit_B *reg = acb->pmuB;
4243         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4244         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
4245         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4246                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4247                                 rebuild' timeout \n",acb->host->host_no);
4248         }
4249 }
4250
4251 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
4252 {
4253         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
4254         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4255         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
4256         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
4257         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
4258                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4259                                 rebuild' timeout \n", pACB->host->host_no);
4260         }
4261         return;
4262 }
4263
4264 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
4265 {
4266         struct MessageUnit_D *pmu = pACB->pmuD;
4267
4268         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4269         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
4270         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
4271                 pr_notice("arcmsr%d: wait 'start adapter "
4272                         "background rebuild' timeout\n", pACB->host->host_no);
4273         }
4274 }
4275
4276 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4277 {
4278         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4279
4280         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4281         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4282         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4283         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4284         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4285                 pr_notice("arcmsr%d: wait 'start adapter "
4286                         "background rebuild' timeout \n", pACB->host->host_no);
4287         }
4288 }
4289
4290 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4291 {
4292         switch (acb->adapter_type) {
4293         case ACB_ADAPTER_TYPE_A:
4294                 arcmsr_hbaA_start_bgrb(acb);
4295                 break;
4296         case ACB_ADAPTER_TYPE_B:
4297                 arcmsr_hbaB_start_bgrb(acb);
4298                 break;
4299         case ACB_ADAPTER_TYPE_C:
4300                 arcmsr_hbaC_start_bgrb(acb);
4301                 break;
4302         case ACB_ADAPTER_TYPE_D:
4303                 arcmsr_hbaD_start_bgrb(acb);
4304                 break;
4305         case ACB_ADAPTER_TYPE_E:
4306         case ACB_ADAPTER_TYPE_F:
4307                 arcmsr_hbaE_start_bgrb(acb);
4308                 break;
4309         }
4310 }
4311
4312 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4313 {
4314         switch (acb->adapter_type) {
4315         case ACB_ADAPTER_TYPE_A: {
4316                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4317                 uint32_t outbound_doorbell;
4318                 /* empty doorbell Qbuffer if door bell ringed */
4319                 outbound_doorbell = readl(&reg->outbound_doorbell);
4320                 /*clear doorbell interrupt */
4321                 writel(outbound_doorbell, &reg->outbound_doorbell);
4322                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4323                 }
4324                 break;
4325
4326         case ACB_ADAPTER_TYPE_B: {
4327                 struct MessageUnit_B *reg = acb->pmuB;
4328                 uint32_t outbound_doorbell, i;
4329                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4330                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4331                 /* let IOP know data has been read */
4332                 for(i=0; i < 200; i++) {
4333                         msleep(20);
4334                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4335                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4336                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4337                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4338                         } else
4339                                 break;
4340                 }
4341                 }
4342                 break;
4343         case ACB_ADAPTER_TYPE_C: {
4344                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4345                 uint32_t outbound_doorbell, i;
4346                 /* empty doorbell Qbuffer if door bell ringed */
4347                 outbound_doorbell = readl(&reg->outbound_doorbell);
4348                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4349                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4350                 for (i = 0; i < 200; i++) {
4351                         msleep(20);
4352                         outbound_doorbell = readl(&reg->outbound_doorbell);
4353                         if (outbound_doorbell &
4354                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4355                                 writel(outbound_doorbell,
4356                                         &reg->outbound_doorbell_clear);
4357                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4358                                         &reg->inbound_doorbell);
4359                         } else
4360                                 break;
4361                 }
4362                 }
4363                 break;
4364         case ACB_ADAPTER_TYPE_D: {
4365                 struct MessageUnit_D *reg = acb->pmuD;
4366                 uint32_t outbound_doorbell, i;
4367                 /* empty doorbell Qbuffer if door bell ringed */
4368                 outbound_doorbell = readl(reg->outbound_doorbell);
4369                 writel(outbound_doorbell, reg->outbound_doorbell);
4370                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4371                         reg->inbound_doorbell);
4372                 for (i = 0; i < 200; i++) {
4373                         msleep(20);
4374                         outbound_doorbell = readl(reg->outbound_doorbell);
4375                         if (outbound_doorbell &
4376                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4377                                 writel(outbound_doorbell,
4378                                         reg->outbound_doorbell);
4379                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4380                                         reg->inbound_doorbell);
4381                         } else
4382                                 break;
4383                 }
4384                 }
4385                 break;
4386         case ACB_ADAPTER_TYPE_E:
4387         case ACB_ADAPTER_TYPE_F: {
4388                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4389                 uint32_t i, tmp;
4390
4391                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4392                 writel(0, &reg->host_int_status); /*clear interrupt*/
4393                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4394                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4395                 for(i=0; i < 200; i++) {
4396                         msleep(20);
4397                         tmp = acb->in_doorbell;
4398                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4399                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4400                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4401                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4402                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4403                         } else
4404                                 break;
4405                 }
4406                 }
4407                 break;
4408         }
4409 }
4410
4411 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4412 {
4413         switch (acb->adapter_type) {
4414         case ACB_ADAPTER_TYPE_A:
4415                 return;
4416         case ACB_ADAPTER_TYPE_B:
4417                 {
4418                         struct MessageUnit_B *reg = acb->pmuB;
4419                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4420                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4421                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4422                                 return;
4423                         }
4424                 }
4425                 break;
4426         case ACB_ADAPTER_TYPE_C:
4427                 return;
4428         }
4429         return;
4430 }
4431
4432 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4433 {
4434         uint8_t value[64];
4435         int i, count = 0;
4436         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4437         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4438         struct MessageUnit_D *pmuD = acb->pmuD;
4439
4440         /* backup pci config data */
4441         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4442         for (i = 0; i < 64; i++) {
4443                 pci_read_config_byte(acb->pdev, i, &value[i]);
4444         }
4445         /* hardware reset signal */
4446         if (acb->dev_id == 0x1680) {
4447                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4448         } else if (acb->dev_id == 0x1880) {
4449                 do {
4450                         count++;
4451                         writel(0xF, &pmuC->write_sequence);
4452                         writel(0x4, &pmuC->write_sequence);
4453                         writel(0xB, &pmuC->write_sequence);
4454                         writel(0x2, &pmuC->write_sequence);
4455                         writel(0x7, &pmuC->write_sequence);
4456                         writel(0xD, &pmuC->write_sequence);
4457                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4458                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4459         } else if (acb->dev_id == 0x1884) {
4460                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4461                 do {
4462                         count++;
4463                         writel(0x4, &pmuE->write_sequence_3xxx);
4464                         writel(0xB, &pmuE->write_sequence_3xxx);
4465                         writel(0x2, &pmuE->write_sequence_3xxx);
4466                         writel(0x7, &pmuE->write_sequence_3xxx);
4467                         writel(0xD, &pmuE->write_sequence_3xxx);
4468                         mdelay(10);
4469                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4470                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4471                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4472         } else if (acb->dev_id == 0x1214) {
4473                 writel(0x20, pmuD->reset_request);
4474         } else {
4475                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4476         }
4477         msleep(2000);
4478         /* write back pci config data */
4479         for (i = 0; i < 64; i++) {
4480                 pci_write_config_byte(acb->pdev, i, value[i]);
4481         }
4482         msleep(1000);
4483         return;
4484 }
4485
4486 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4487 {
4488         bool rtn = true;
4489
4490         switch(acb->adapter_type) {
4491         case ACB_ADAPTER_TYPE_A:{
4492                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4493                 rtn = ((readl(&reg->outbound_msgaddr1) &
4494                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4495                 }
4496                 break;
4497         case ACB_ADAPTER_TYPE_B:{
4498                 struct MessageUnit_B *reg = acb->pmuB;
4499                 rtn = ((readl(reg->iop2drv_doorbell) &
4500                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4501                 }
4502                 break;
4503         case ACB_ADAPTER_TYPE_C:{
4504                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4505                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4506                 }
4507                 break;
4508         case ACB_ADAPTER_TYPE_D:{
4509                 struct MessageUnit_D *reg = acb->pmuD;
4510                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4511                         true : false;
4512                 }
4513                 break;
4514         case ACB_ADAPTER_TYPE_E:
4515         case ACB_ADAPTER_TYPE_F:{
4516                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4517                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4518                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4519                 }
4520                 break;
4521         }
4522         return rtn;
4523 }
4524
4525 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4526 {
4527         uint32_t intmask_org;
4528         /* disable all outbound interrupt */
4529         intmask_org = arcmsr_disable_outbound_ints(acb);
4530         arcmsr_wait_firmware_ready(acb);
4531         arcmsr_iop_confirm(acb);
4532         /*start background rebuild*/
4533         arcmsr_start_adapter_bgrb(acb);
4534         /* empty doorbell Qbuffer if door bell ringed */
4535         arcmsr_clear_doorbell_queue_buffer(acb);
4536         arcmsr_enable_eoi_mode(acb);
4537         /* enable outbound Post Queue,outbound doorbell Interrupt */
4538         arcmsr_enable_outbound_ints(acb, intmask_org);
4539         acb->acb_flags |= ACB_F_IOP_INITED;
4540 }
4541
4542 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4543 {
4544         struct CommandControlBlock *ccb;
4545         uint32_t intmask_org;
4546         uint8_t rtnval = 0x00;
4547         int i = 0;
4548         unsigned long flags;
4549
4550         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4551                 /* disable all outbound interrupt */
4552                 intmask_org = arcmsr_disable_outbound_ints(acb);
4553                 /* talk to iop 331 outstanding command aborted */
4554                 rtnval = arcmsr_abort_allcmd(acb);
4555                 /* clear all outbound posted Q */
4556                 arcmsr_done4abort_postqueue(acb);
4557                 for (i = 0; i < acb->maxFreeCCB; i++) {
4558                         ccb = acb->pccb_pool[i];
4559                         if (ccb->startdone == ARCMSR_CCB_START) {
4560                                 scsi_dma_unmap(ccb->pcmd);
4561                                 ccb->startdone = ARCMSR_CCB_DONE;
4562                                 ccb->ccb_flags = 0;
4563                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4564                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4565                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4566                         }
4567                 }
4568                 atomic_set(&acb->ccboutstandingcount, 0);
4569                 /* enable all outbound interrupt */
4570                 arcmsr_enable_outbound_ints(acb, intmask_org);
4571                 return rtnval;
4572         }
4573         return rtnval;
4574 }
4575
4576 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4577 {
4578         struct AdapterControlBlock *acb;
4579         int retry_count = 0;
4580         int rtn = FAILED;
4581         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4582         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4583                 return SUCCESS;
4584         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4585                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4586         acb->num_resets++;
4587
4588         if (acb->acb_flags & ACB_F_BUS_RESET) {
4589                 long timeout;
4590                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4591                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4592                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4593                 if (timeout)
4594                         return SUCCESS;
4595         }
4596         acb->acb_flags |= ACB_F_BUS_RESET;
4597         if (!arcmsr_iop_reset(acb)) {
4598                 arcmsr_hardware_reset(acb);
4599                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4600 wait_reset_done:
4601                 ssleep(ARCMSR_SLEEPTIME);
4602                 if (arcmsr_reset_in_progress(acb)) {
4603                         if (retry_count > ARCMSR_RETRYCOUNT) {
4604                                 acb->fw_flag = FW_DEADLOCK;
4605                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4606                                         " return, RETRY TERMINATED!!\n",
4607                                         acb->host->host_no);
4608                                 return FAILED;
4609                         }
4610                         retry_count++;
4611                         goto wait_reset_done;
4612                 }
4613                 arcmsr_iop_init(acb);
4614                 acb->fw_flag = FW_NORMAL;
4615                 mod_timer(&acb->eternal_timer, jiffies +
4616                         msecs_to_jiffies(6 * HZ));
4617                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4618                 rtn = SUCCESS;
4619                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4620         } else {
4621                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4622                 acb->fw_flag = FW_NORMAL;
4623                 mod_timer(&acb->eternal_timer, jiffies +
4624                         msecs_to_jiffies(6 * HZ));
4625                 rtn = SUCCESS;
4626         }
4627         return rtn;
4628 }
4629
4630 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4631                 struct CommandControlBlock *ccb)
4632 {
4633         int rtn;
4634         rtn = arcmsr_polling_ccbdone(acb, ccb);
4635         return rtn;
4636 }
4637
4638 static int arcmsr_abort(struct scsi_cmnd *cmd)
4639 {
4640         struct AdapterControlBlock *acb =
4641                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4642         int i = 0;
4643         int rtn = FAILED;
4644         uint32_t intmask_org;
4645
4646         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4647                 return SUCCESS;
4648         printk(KERN_NOTICE
4649                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4650                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4651         acb->acb_flags |= ACB_F_ABORT;
4652         acb->num_aborts++;
4653         /*
4654         ************************************************
4655         ** the all interrupt service routine is locked
4656         ** we need to handle it as soon as possible and exit
4657         ************************************************
4658         */
4659         if (!atomic_read(&acb->ccboutstandingcount)) {
4660                 acb->acb_flags &= ~ACB_F_ABORT;
4661                 return rtn;
4662         }
4663
4664         intmask_org = arcmsr_disable_outbound_ints(acb);
4665         for (i = 0; i < acb->maxFreeCCB; i++) {
4666                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4667                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4668                         ccb->startdone = ARCMSR_CCB_ABORTED;
4669                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4670                         break;
4671                 }
4672         }
4673         acb->acb_flags &= ~ACB_F_ABORT;
4674         arcmsr_enable_outbound_ints(acb, intmask_org);
4675         return rtn;
4676 }
4677
4678 static const char *arcmsr_info(struct Scsi_Host *host)
4679 {
4680         struct AdapterControlBlock *acb =
4681                 (struct AdapterControlBlock *) host->hostdata;
4682         static char buf[256];
4683         char *type;
4684         int raid6 = 1;
4685         switch (acb->pdev->device) {
4686         case PCI_DEVICE_ID_ARECA_1110:
4687         case PCI_DEVICE_ID_ARECA_1200:
4688         case PCI_DEVICE_ID_ARECA_1202:
4689         case PCI_DEVICE_ID_ARECA_1210:
4690                 raid6 = 0;
4691                 fallthrough;
4692         case PCI_DEVICE_ID_ARECA_1120:
4693         case PCI_DEVICE_ID_ARECA_1130:
4694         case PCI_DEVICE_ID_ARECA_1160:
4695         case PCI_DEVICE_ID_ARECA_1170:
4696         case PCI_DEVICE_ID_ARECA_1201:
4697         case PCI_DEVICE_ID_ARECA_1203:
4698         case PCI_DEVICE_ID_ARECA_1220:
4699         case PCI_DEVICE_ID_ARECA_1230:
4700         case PCI_DEVICE_ID_ARECA_1260:
4701         case PCI_DEVICE_ID_ARECA_1270:
4702         case PCI_DEVICE_ID_ARECA_1280:
4703                 type = "SATA";
4704                 break;
4705         case PCI_DEVICE_ID_ARECA_1214:
4706         case PCI_DEVICE_ID_ARECA_1380:
4707         case PCI_DEVICE_ID_ARECA_1381:
4708         case PCI_DEVICE_ID_ARECA_1680:
4709         case PCI_DEVICE_ID_ARECA_1681:
4710         case PCI_DEVICE_ID_ARECA_1880:
4711         case PCI_DEVICE_ID_ARECA_1884:
4712                 type = "SAS/SATA";
4713                 break;
4714         case PCI_DEVICE_ID_ARECA_1886:
4715                 type = "NVMe/SAS/SATA";
4716                 break;
4717         default:
4718                 type = "unknown";
4719                 raid6 = 0;
4720                 break;
4721         }
4722         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4723                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4724         return buf;
4725 }