drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/aer.h>
  61 #include <linux/circ_buf.h>
  62 #include <asm/dma.h>
  63 #include <asm/io.h>
  64 #include <linux/uaccess.h>
  65 #include <scsi/scsi_host.h>
  66 #include <scsi/scsi.h>
  67 #include <scsi/scsi_cmnd.h>
  68 #include <scsi/scsi_tcq.h>
  69 #include <scsi/scsi_device.h>
  70 #include <scsi/scsi_transport.h>
  71 #include <scsi/scsicam.h>
  72 #include "arcmsr.h"
  73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  75 MODULE_LICENSE("Dual BSD/GPL");
  76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  77
  78 static int msix_enable = 1;
  79 module_param(msix_enable, int, S_IRUGO);
  80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  81
  82 static int msi_enable = 1;
  83 module_param(msi_enable, int, S_IRUGO);
  84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  85
  86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  87 module_param(host_can_queue, int, S_IRUGO);
  88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  89
  90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  91 module_param(cmd_per_lun, int, S_IRUGO);
  92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  93
  94 static int set_date_time = 0;
  95 module_param(set_date_time, int, S_IRUGO);
  96 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
  97
  98 #define ARCMSR_SLEEPTIME        10
  99 #define ARCMSR_RETRYCOUNT       12
 100
 101 static wait_queue_head_t wait_q;
 102 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 103                                         struct scsi_cmnd *cmd);
 104 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 105 static int arcmsr_abort(struct scsi_cmnd *);
 106 static int arcmsr_bus_reset(struct scsi_cmnd *);
 107 static int arcmsr_bios_param(struct scsi_device *sdev,
 108                 struct block_device *bdev, sector_t capacity, int *info);
 109 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 110 static int arcmsr_probe(struct pci_dev *pdev,
 111                                 const struct pci_device_id *id);
 112 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
 113 static int arcmsr_resume(struct pci_dev *pdev);
 114 static void arcmsr_remove(struct pci_dev *pdev);
 115 static void arcmsr_shutdown(struct pci_dev *pdev);
 116 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 117 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 118 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 119 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 120         u32 intmask_org);
 121 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 122 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 123 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 124 static void arcmsr_request_device_map(struct timer_list *t);
 125 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 126 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 127 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 128 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 129 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 131 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 132 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 133 static const char *arcmsr_info(struct Scsi_Host *);
 134 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 135 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 136 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 137 static void arcmsr_set_iop_datetime(struct timer_list *);
 138 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 139 {
 140         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 141                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 142         return scsi_change_queue_depth(sdev, queue_depth);
 143 }
 144
 145 static struct scsi_host_template arcmsr_scsi_host_template = {
 146         .module                 = THIS_MODULE,
 147         .name                   = "Areca SAS/SATA RAID driver",
 148         .info                   = arcmsr_info,
 149         .queuecommand           = arcmsr_queue_command,
 150         .eh_abort_handler       = arcmsr_abort,
 151         .eh_bus_reset_handler   = arcmsr_bus_reset,
 152         .bios_param             = arcmsr_bios_param,
 153         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 154         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 155         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 156         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 157         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 158         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 159         .use_clustering         = ENABLE_CLUSTERING,
 160         .shost_attrs            = arcmsr_host_attrs,
 161         .no_write_same          = 1,
 162 };
 163
 164 static struct pci_device_id arcmsr_device_id_table[] = {
 165         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 166                 .driver_data = ACB_ADAPTER_TYPE_A},
 167         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 168                 .driver_data = ACB_ADAPTER_TYPE_A},
 169         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 170                 .driver_data = ACB_ADAPTER_TYPE_A},
 171         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 172                 .driver_data = ACB_ADAPTER_TYPE_A},
 173         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 174                 .driver_data = ACB_ADAPTER_TYPE_A},
 175         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 176                 .driver_data = ACB_ADAPTER_TYPE_B},
 177         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 178                 .driver_data = ACB_ADAPTER_TYPE_B},
 179         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 180                 .driver_data = ACB_ADAPTER_TYPE_B},
 181         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 182                 .driver_data = ACB_ADAPTER_TYPE_B},
 183         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 184                 .driver_data = ACB_ADAPTER_TYPE_A},
 185         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 186                 .driver_data = ACB_ADAPTER_TYPE_D},
 187         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 188                 .driver_data = ACB_ADAPTER_TYPE_A},
 189         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 190                 .driver_data = ACB_ADAPTER_TYPE_A},
 191         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 192                 .driver_data = ACB_ADAPTER_TYPE_A},
 193         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 194                 .driver_data = ACB_ADAPTER_TYPE_A},
 195         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 196                 .driver_data = ACB_ADAPTER_TYPE_A},
 197         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 198                 .driver_data = ACB_ADAPTER_TYPE_A},
 199         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 200                 .driver_data = ACB_ADAPTER_TYPE_A},
 201         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 202                 .driver_data = ACB_ADAPTER_TYPE_A},
 203         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 204                 .driver_data = ACB_ADAPTER_TYPE_A},
 205         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 206                 .driver_data = ACB_ADAPTER_TYPE_C},
 207         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 208                 .driver_data = ACB_ADAPTER_TYPE_E},
 209         {0, 0}, /* Terminating entry */
 210 };
 211 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 212
 213 static struct pci_driver arcmsr_pci_driver = {
 214         .name                   = "arcmsr",
 215         .id_table               = arcmsr_device_id_table,
 216         .probe                  = arcmsr_probe,
 217         .remove                 = arcmsr_remove,
 218         .suspend                = arcmsr_suspend,
 219         .resume                 = arcmsr_resume,
 220         .shutdown               = arcmsr_shutdown,
 221 };
 222 /*
 223 ****************************************************************************
 224 ****************************************************************************
 225 */
 226
 227 static void arcmsr_free_mu(struct AdapterControlBlock *acb)
 228 {
 229         switch (acb->adapter_type) {
 230         case ACB_ADAPTER_TYPE_B:
 231         case ACB_ADAPTER_TYPE_D:
 232         case ACB_ADAPTER_TYPE_E: {
 233                 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
 234                         acb->dma_coherent2, acb->dma_coherent_handle2);
 235                 break;
 236         }
 237         }
 238 }
 239
 240 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 241 {
 242         struct pci_dev *pdev = acb->pdev;
 243         switch (acb->adapter_type){
 244         case ACB_ADAPTER_TYPE_A:{
 245                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 246                 if (!acb->pmuA) {
 247                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 248                         return false;
 249                 }
 250                 break;
 251         }
 252         case ACB_ADAPTER_TYPE_B:{
 253                 void __iomem *mem_base0, *mem_base1;
 254                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 255                 if (!mem_base0) {
 256                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 257                         return false;
 258                 }
 259                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 260                 if (!mem_base1) {
 261                         iounmap(mem_base0);
 262                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 263                         return false;
 264                 }
 265                 acb->mem_base0 = mem_base0;
 266                 acb->mem_base1 = mem_base1;
 267                 break;
 268         }
 269         case ACB_ADAPTER_TYPE_C:{
 270                 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 271                 if (!acb->pmuC) {
 272                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 273                         return false;
 274                 }
 275                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 276                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 277                         return true;
 278                 }
 279                 break;
 280         }
 281         case ACB_ADAPTER_TYPE_D: {
 282                 void __iomem *mem_base0;
 283                 unsigned long addr, range, flags;
 284
 285                 addr = (unsigned long)pci_resource_start(pdev, 0);
 286                 range = pci_resource_len(pdev, 0);
 287                 flags = pci_resource_flags(pdev, 0);
 288                 mem_base0 = ioremap(addr, range);
 289                 if (!mem_base0) {
 290                         pr_notice("arcmsr%d: memory mapping region fail\n",
 291                                 acb->host->host_no);
 292                         return false;
 293                 }
 294                 acb->mem_base0 = mem_base0;
 295                 break;
 296                 }
 297         case ACB_ADAPTER_TYPE_E: {
 298                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 299                         pci_resource_len(pdev, 1));
 300                 if (!acb->pmuE) {
 301                         pr_notice("arcmsr%d: memory mapping region fail \n",
 302                                 acb->host->host_no);
 303                         return false;
 304                 }
 305                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 306                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 307                 acb->in_doorbell = 0;
 308                 acb->out_doorbell = 0;
 309                 break;
 310                 }
 311         }
 312         return true;
 313 }
 314
 315 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 316 {
 317         switch (acb->adapter_type) {
 318         case ACB_ADAPTER_TYPE_A:{
 319                 iounmap(acb->pmuA);
 320         }
 321         break;
 322         case ACB_ADAPTER_TYPE_B:{
 323                 iounmap(acb->mem_base0);
 324                 iounmap(acb->mem_base1);
 325         }
 326
 327         break;
 328         case ACB_ADAPTER_TYPE_C:{
 329                 iounmap(acb->pmuC);
 330         }
 331         break;
 332         case ACB_ADAPTER_TYPE_D:
 333                 iounmap(acb->mem_base0);
 334                 break;
 335         case ACB_ADAPTER_TYPE_E:
 336                 iounmap(acb->pmuE);
 337                 break;
 338         }
 339 }
 340
 341 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 342 {
 343         irqreturn_t handle_state;
 344         struct AdapterControlBlock *acb = dev_id;
 345
 346         handle_state = arcmsr_interrupt(acb);
 347         return handle_state;
 348 }
 349
 350 static int arcmsr_bios_param(struct scsi_device *sdev,
 351                 struct block_device *bdev, sector_t capacity, int *geom)
 352 {
 353         int ret, heads, sectors, cylinders, total_capacity;
 354         unsigned char *buffer;/* return copy of block device's partition table */
 355
 356         buffer = scsi_bios_ptable(bdev);
 357         if (buffer) {
 358                 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
 359                 kfree(buffer);
 360                 if (ret != -1)
 361                         return ret;
 362         }
 363         total_capacity = capacity;
 364         heads = 64;
 365         sectors = 32;
 366         cylinders = total_capacity / (heads * sectors);
 367         if (cylinders > 1024) {
 368                 heads = 255;
 369                 sectors = 63;
 370                 cylinders = total_capacity / (heads * sectors);
 371         }
 372         geom[0] = heads;
 373         geom[1] = sectors;
 374         geom[2] = cylinders;
 375         return 0;
 376 }
 377
 378 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 379 {
 380         struct MessageUnit_A __iomem *reg = acb->pmuA;
 381         int i;
 382
 383         for (i = 0; i < 2000; i++) {
 384                 if (readl(&reg->outbound_intstatus) &
 385                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 386                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 387                                 &reg->outbound_intstatus);
 388                         return true;
 389                 }
 390                 msleep(10);
 391         } /* max 20 seconds */
 392
 393         return false;
 394 }
 395
 396 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 397 {
 398         struct MessageUnit_B *reg = acb->pmuB;
 399         int i;
 400
 401         for (i = 0; i < 2000; i++) {
 402                 if (readl(reg->iop2drv_doorbell)
 403                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 404                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 405                                         reg->iop2drv_doorbell);
 406                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 407                                         reg->drv2iop_doorbell);
 408                         return true;
 409                 }
 410                 msleep(10);
 411         } /* max 20 seconds */
 412
 413         return false;
 414 }
 415
 416 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 417 {
 418         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 419         int i;
 420
 421         for (i = 0; i < 2000; i++) {
 422                 if (readl(&phbcmu->outbound_doorbell)
 423                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 424                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 425                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 426                         return true;
 427                 }
 428                 msleep(10);
 429         } /* max 20 seconds */
 430
 431         return false;
 432 }
 433
 434 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 435 {
 436         struct MessageUnit_D *reg = pACB->pmuD;
 437         int i;
 438
 439         for (i = 0; i < 2000; i++) {
 440                 if (readl(reg->outbound_doorbell)
 441                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 442                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 443                                 reg->outbound_doorbell);
 444                         return true;
 445                 }
 446                 msleep(10);
 447         } /* max 20 seconds */
 448         return false;
 449 }
 450
 451 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 452 {
 453         int i;
 454         uint32_t read_doorbell;
 455         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 456
 457         for (i = 0; i < 2000; i++) {
 458                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 459                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 460                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 461                         pACB->in_doorbell = read_doorbell;
 462                         return true;
 463                 }
 464                 msleep(10);
 465         } /* max 20 seconds */
 466         return false;
 467 }
 468
 469 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 470 {
 471         struct MessageUnit_A __iomem *reg = acb->pmuA;
 472         int retry_count = 30;
 473         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 474         do {
 475                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 476                         break;
 477                 else {
 478                         retry_count--;
 479                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 480                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 481                 }
 482         } while (retry_count != 0);
 483 }
 484
 485 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 486 {
 487         struct MessageUnit_B *reg = acb->pmuB;
 488         int retry_count = 30;
 489         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 490         do {
 491                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 492                         break;
 493                 else {
 494                         retry_count--;
 495                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 496                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 497                 }
 498         } while (retry_count != 0);
 499 }
 500
 501 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 502 {
 503         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 504         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 505         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 506         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 507         do {
 508                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 509                         break;
 510                 } else {
 511                         retry_count--;
 512                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 513                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 514                 }
 515         } while (retry_count != 0);
 516         return;
 517 }
 518
 519 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 520 {
 521         int retry_count = 15;
 522         struct MessageUnit_D *reg = pACB->pmuD;
 523
 524         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 525         do {
 526                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 527                         break;
 528
 529                 retry_count--;
 530                 pr_notice("arcmsr%d: wait 'flush adapter "
 531                         "cache' timeout, retry count down = %d\n",
 532                         pACB->host->host_no, retry_count);
 533         } while (retry_count != 0);
 534 }
 535
 536 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 537 {
 538         int retry_count = 30;
 539         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 540
 541         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 542         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 543         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 544         do {
 545                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 546                         break;
 547                 retry_count--;
 548                 pr_notice("arcmsr%d: wait 'flush adapter "
 549                         "cache' timeout, retry count down = %d\n",
 550                         pACB->host->host_no, retry_count);
 551         } while (retry_count != 0);
 552 }
 553
 554 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 555 {
 556         switch (acb->adapter_type) {
 557
 558         case ACB_ADAPTER_TYPE_A: {
 559                 arcmsr_hbaA_flush_cache(acb);
 560                 }
 561                 break;
 562
 563         case ACB_ADAPTER_TYPE_B: {
 564                 arcmsr_hbaB_flush_cache(acb);
 565                 }
 566                 break;
 567         case ACB_ADAPTER_TYPE_C: {
 568                 arcmsr_hbaC_flush_cache(acb);
 569                 }
 570                 break;
 571         case ACB_ADAPTER_TYPE_D:
 572                 arcmsr_hbaD_flush_cache(acb);
 573                 break;
 574         case ACB_ADAPTER_TYPE_E:
 575                 arcmsr_hbaE_flush_cache(acb);
 576                 break;
 577         }
 578 }
 579
 580 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 581 {
 582         bool rtn = true;
 583         void *dma_coherent;
 584         dma_addr_t dma_coherent_handle;
 585         struct pci_dev *pdev = acb->pdev;
 586
 587         switch (acb->adapter_type) {
 588         case ACB_ADAPTER_TYPE_B: {
 589                 struct MessageUnit_B *reg;
 590                 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32);
 591                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 592                         &dma_coherent_handle, GFP_KERNEL);
 593                 if (!dma_coherent) {
 594                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 595                         return false;
 596                 }
 597                 acb->dma_coherent_handle2 = dma_coherent_handle;
 598                 acb->dma_coherent2 = dma_coherent;
 599                 reg = (struct MessageUnit_B *)dma_coherent;
 600                 acb->pmuB = reg;
 601                 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 602                         reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 603                         reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 604                         reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 605                         reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 606                 } else {
 607                         reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 608                         reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 609                         reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 610                         reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 611                 }
 612                 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 613                 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 614                 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 615                 }
 616                 break;
 617         case ACB_ADAPTER_TYPE_D: {
 618                 struct MessageUnit_D *reg;
 619
 620                 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32);
 621                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 622                         &dma_coherent_handle, GFP_KERNEL);
 623                 if (!dma_coherent) {
 624                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 625                         return false;
 626                 }
 627                 acb->dma_coherent_handle2 = dma_coherent_handle;
 628                 acb->dma_coherent2 = dma_coherent;
 629                 reg = (struct MessageUnit_D *)dma_coherent;
 630                 acb->pmuD = reg;
 631                 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 632                 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 633                 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 634                 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 635                 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 636                 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 637                 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 638                 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 639                 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 640                 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 641                 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 642                 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 643                 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 644                 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 645                 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 646                 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 647                 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 648                 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 649                 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 650                 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 651                 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 652                 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 653                 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 654                 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 655                 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 656                 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 657                 }
 658                 break;
 659         case ACB_ADAPTER_TYPE_E: {
 660                 uint32_t completeQ_size;
 661                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 662                 acb->roundup_ccbsize = roundup(completeQ_size, 32);
 663                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 664                         &dma_coherent_handle, GFP_KERNEL);
 665                 if (!dma_coherent){
 666                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 667                         return false;
 668                 }
 669                 acb->dma_coherent_handle2 = dma_coherent_handle;
 670                 acb->dma_coherent2 = dma_coherent;
 671                 acb->pCompletionQ = dma_coherent;
 672                 acb->completionQ_entry = acb->roundup_ccbsize / sizeof(struct deliver_completeQ);
 673                 acb->doneq_index = 0;
 674                 }
 675                 break;
 676         default:
 677                 break;
 678         }
 679         return rtn;
 680 }
 681
 682 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 683 {
 684         struct pci_dev *pdev = acb->pdev;
 685         void *dma_coherent;
 686         dma_addr_t dma_coherent_handle;
 687         struct CommandControlBlock *ccb_tmp;
 688         int i = 0, j = 0;
 689         dma_addr_t cdb_phyaddr;
 690         unsigned long roundup_ccbsize;
 691         unsigned long max_xfer_len;
 692         unsigned long max_sg_entrys;
 693         uint32_t  firm_config_version;
 694
 695         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 696                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 697                         acb->devstate[i][j] = ARECA_RAID_GONE;
 698
 699         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 700         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 701         firm_config_version = acb->firm_cfg_version;
 702         if((firm_config_version & 0xFF) >= 3){
 703                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 704                 max_sg_entrys = (max_xfer_len/4096);
 705         }
 706         acb->host->max_sectors = max_xfer_len/512;
 707         acb->host->sg_tablesize = max_sg_entrys;
 708         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 709         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 710         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 711         if(!dma_coherent){
 712                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 713                 return -ENOMEM;
 714         }
 715         acb->dma_coherent = dma_coherent;
 716         acb->dma_coherent_handle = dma_coherent_handle;
 717         memset(dma_coherent, 0, acb->uncache_size);
 718         acb->ccbsize = roundup_ccbsize;
 719         ccb_tmp = dma_coherent;
 720         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 721         for(i = 0; i < acb->maxFreeCCB; i++){
 722                 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 723                 switch (acb->adapter_type) {
 724                 case ACB_ADAPTER_TYPE_A:
 725                 case ACB_ADAPTER_TYPE_B:
 726                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 727                         break;
 728                 case ACB_ADAPTER_TYPE_C:
 729                 case ACB_ADAPTER_TYPE_D:
 730                 case ACB_ADAPTER_TYPE_E:
 731                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 732                         break;
 733                 }
 734                 acb->pccb_pool[i] = ccb_tmp;
 735                 ccb_tmp->acb = acb;
 736                 ccb_tmp->smid = (u32)i << 16;
 737                 INIT_LIST_HEAD(&ccb_tmp->list);
 738                 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 739                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 740                 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
 741         }
 742         return 0;
 743 }
 744
 745 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 746 {
 747         struct AdapterControlBlock *acb = container_of(work,
 748                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 749         char *acb_dev_map = (char *)acb->device_map;
 750         uint32_t __iomem *signature = NULL;
 751         char __iomem *devicemap = NULL;
 752         int target, lun;
 753         struct scsi_device *psdev;
 754         char diff, temp;
 755
 756         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 757         switch (acb->adapter_type) {
 758         case ACB_ADAPTER_TYPE_A: {
 759                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 760
 761                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 762                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 763                 break;
 764         }
 765         case ACB_ADAPTER_TYPE_B: {
 766                 struct MessageUnit_B *reg  = acb->pmuB;
 767
 768                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 769                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 770                 break;
 771         }
 772         case ACB_ADAPTER_TYPE_C: {
 773                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 774
 775                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 776                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 777                 break;
 778         }
 779         case ACB_ADAPTER_TYPE_D: {
 780                 struct MessageUnit_D *reg  = acb->pmuD;
 781
 782                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 783                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 784                 break;
 785         }
 786         case ACB_ADAPTER_TYPE_E: {
 787                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 788
 789                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 790                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 791                 break;
 792                 }
 793         }
 794         atomic_inc(&acb->rq_map_token);
 795         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 796                 return;
 797         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 798                 target++) {
 799                 temp = readb(devicemap);
 800                 diff = (*acb_dev_map) ^ temp;
 801                 if (diff != 0) {
 802                         *acb_dev_map = temp;
 803                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 804                                 lun++) {
 805                                 if ((diff & 0x01) == 1 &&
 806                                         (temp & 0x01) == 1) {
 807                                         scsi_add_device(acb->host,
 808                                                 0, target, lun);
 809                                 } else if ((diff & 0x01) == 1
 810                                         && (temp & 0x01) == 0) {
 811                                         psdev = scsi_device_lookup(acb->host,
 812                                                 0, target, lun);
 813                                         if (psdev != NULL) {
 814                                                 scsi_remove_device(psdev);
 815                                                 scsi_device_put(psdev);
 816                                         }
 817                                 }
 818                                 temp >>= 1;
 819                                 diff >>= 1;
 820                         }
 821                 }
 822                 devicemap++;
 823                 acb_dev_map++;
 824         }
 825 }
 826
 827 static int
 828 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 829 {
 830         unsigned long flags;
 831         int nvec, i;
 832
 833         if (msix_enable == 0)
 834                 goto msi_int0;
 835         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 836                         PCI_IRQ_MSIX);
 837         if (nvec > 0) {
 838                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 839                 flags = 0;
 840         } else {
 841 msi_int0:
 842                 if (msi_enable == 1) {
 843                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 844                         if (nvec == 1) {
 845                                 dev_info(&pdev->dev, "msi enabled\n");
 846                                 goto msi_int1;
 847                         }
 848                 }
 849                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 850                 if (nvec < 1)
 851                         return FAILED;
 852 msi_int1:
 853                 flags = IRQF_SHARED;
 854         }
 855
 856         acb->vector_count = nvec;
 857         for (i = 0; i < nvec; i++) {
 858                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 859                                 flags, "arcmsr", acb)) {
 860                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 861                                 acb->host->host_no, pci_irq_vector(pdev, i));
 862                         goto out_free_irq;
 863                 }
 864         }
 865
 866         return SUCCESS;
 867 out_free_irq:
 868         while (--i >= 0)
 869                 free_irq(pci_irq_vector(pdev, i), acb);
 870         pci_free_irq_vectors(pdev);
 871         return FAILED;
 872 }
 873
 874 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 875 {
 876         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 877         atomic_set(&pacb->rq_map_token, 16);
 878         atomic_set(&pacb->ante_token_value, 16);
 879         pacb->fw_flag = FW_NORMAL;
 880         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 881         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 882         add_timer(&pacb->eternal_timer);
 883 }
 884
 885 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 886 {
 887         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 888         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 889         add_timer(&pacb->refresh_timer);
 890 }
 891
 892 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 893 {
 894         struct Scsi_Host *host;
 895         struct AdapterControlBlock *acb;
 896         uint8_t bus,dev_fun;
 897         int error;
 898         error = pci_enable_device(pdev);
 899         if(error){
 900                 return -ENODEV;
 901         }
 902         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
 903         if(!host){
 904                 goto pci_disable_dev;
 905         }
 906         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 907         if(error){
 908                 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 909                 if(error){
 910                         printk(KERN_WARNING
 911                                "scsi%d: No suitable DMA mask available\n",
 912                                host->host_no);
 913                         goto scsi_host_release;
 914                 }
 915         }
 916         init_waitqueue_head(&wait_q);
 917         bus = pdev->bus->number;
 918         dev_fun = pdev->devfn;
 919         acb = (struct AdapterControlBlock *) host->hostdata;
 920         memset(acb,0,sizeof(struct AdapterControlBlock));
 921         acb->pdev = pdev;
 922         acb->host = host;
 923         host->max_lun = ARCMSR_MAX_TARGETLUN;
 924         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
 925         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
 926         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
 927                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
 928         host->can_queue = host_can_queue;       /* max simultaneous cmds */
 929         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
 930                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
 931         host->cmd_per_lun = cmd_per_lun;
 932         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
 933         host->unique_id = (bus << 8) | dev_fun;
 934         pci_set_drvdata(pdev, host);
 935         pci_set_master(pdev);
 936         error = pci_request_regions(pdev, "arcmsr");
 937         if(error){
 938                 goto scsi_host_release;
 939         }
 940         spin_lock_init(&acb->eh_lock);
 941         spin_lock_init(&acb->ccblist_lock);
 942         spin_lock_init(&acb->postq_lock);
 943         spin_lock_init(&acb->doneq_lock);
 944         spin_lock_init(&acb->rqbuffer_lock);
 945         spin_lock_init(&acb->wqbuffer_lock);
 946         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
 947                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
 948                         ACB_F_MESSAGE_WQBUFFER_READED);
 949         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
 950         INIT_LIST_HEAD(&acb->ccb_free_list);
 951         acb->adapter_type = id->driver_data;
 952         error = arcmsr_remap_pciregion(acb);
 953         if(!error){
 954                 goto pci_release_regs;
 955         }
 956         error = arcmsr_alloc_io_queue(acb);
 957         if (!error)
 958                 goto unmap_pci_region;
 959         error = arcmsr_get_firmware_spec(acb);
 960         if(!error){
 961                 goto free_hbb_mu;
 962         }
 963         error = arcmsr_alloc_ccb_pool(acb);
 964         if(error){
 965                 goto free_hbb_mu;
 966         }
 967         error = scsi_add_host(host, &pdev->dev);
 968         if(error){
 969                 goto free_ccb_pool;
 970         }
 971         if (arcmsr_request_irq(pdev, acb) == FAILED)
 972                 goto scsi_host_remove;
 973         arcmsr_iop_init(acb);
 974         arcmsr_init_get_devmap_timer(acb);
 975         if (set_date_time)
 976                 arcmsr_init_set_datetime_timer(acb);
 977         if(arcmsr_alloc_sysfs_attr(acb))
 978                 goto out_free_sysfs;
 979         scsi_scan_host(host);
 980         return 0;
 981 out_free_sysfs:
 982         if (set_date_time)
 983                 del_timer_sync(&acb->refresh_timer);
 984         del_timer_sync(&acb->eternal_timer);
 985         flush_work(&acb->arcmsr_do_message_isr_bh);
 986         arcmsr_stop_adapter_bgrb(acb);
 987         arcmsr_flush_adapter_cache(acb);
 988         arcmsr_free_irq(pdev, acb);
 989 scsi_host_remove:
 990         scsi_remove_host(host);
 991 free_ccb_pool:
 992         arcmsr_free_ccb_pool(acb);
 993 free_hbb_mu:
 994         arcmsr_free_mu(acb);
 995 unmap_pci_region:
 996         arcmsr_unmap_pciregion(acb);
 997 pci_release_regs:
 998         pci_release_regions(pdev);
 999 scsi_host_release:
1000         scsi_host_put(host);
1001 pci_disable_dev:
1002         pci_disable_device(pdev);
1003         return -ENODEV;
1004 }
1005
1006 static void arcmsr_free_irq(struct pci_dev *pdev,
1007                 struct AdapterControlBlock *acb)
1008 {
1009         int i;
1010
1011         for (i = 0; i < acb->vector_count; i++)
1012                 free_irq(pci_irq_vector(pdev, i), acb);
1013         pci_free_irq_vectors(pdev);
1014 }
1015
1016 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
1017 {
1018         uint32_t intmask_org;
1019         struct Scsi_Host *host = pci_get_drvdata(pdev);
1020         struct AdapterControlBlock *acb =
1021                 (struct AdapterControlBlock *)host->hostdata;
1022
1023         intmask_org = arcmsr_disable_outbound_ints(acb);
1024         arcmsr_free_irq(pdev, acb);
1025         del_timer_sync(&acb->eternal_timer);
1026         if (set_date_time)
1027                 del_timer_sync(&acb->refresh_timer);
1028         flush_work(&acb->arcmsr_do_message_isr_bh);
1029         arcmsr_stop_adapter_bgrb(acb);
1030         arcmsr_flush_adapter_cache(acb);
1031         pci_set_drvdata(pdev, host);
1032         pci_save_state(pdev);
1033         pci_disable_device(pdev);
1034         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1035         return 0;
1036 }
1037
1038 static int arcmsr_resume(struct pci_dev *pdev)
1039 {
1040         int error;
1041         struct Scsi_Host *host = pci_get_drvdata(pdev);
1042         struct AdapterControlBlock *acb =
1043                 (struct AdapterControlBlock *)host->hostdata;
1044
1045         pci_set_power_state(pdev, PCI_D0);
1046         pci_enable_wake(pdev, PCI_D0, 0);
1047         pci_restore_state(pdev);
1048         if (pci_enable_device(pdev)) {
1049                 pr_warn("%s: pci_enable_device error\n", __func__);
1050                 return -ENODEV;
1051         }
1052         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1053         if (error) {
1054                 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1055                 if (error) {
1056                         pr_warn("scsi%d: No suitable DMA mask available\n",
1057                                host->host_no);
1058                         goto controller_unregister;
1059                 }
1060         }
1061         pci_set_master(pdev);
1062         if (arcmsr_request_irq(pdev, acb) == FAILED)
1063                 goto controller_stop;
1064         if (acb->adapter_type == ACB_ADAPTER_TYPE_E) {
1065                 writel(0, &acb->pmuE->host_int_status);
1066                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1067                 acb->in_doorbell = 0;
1068                 acb->out_doorbell = 0;
1069                 acb->doneq_index = 0;
1070         }
1071         arcmsr_iop_init(acb);
1072         arcmsr_init_get_devmap_timer(acb);
1073         if (set_date_time)
1074                 arcmsr_init_set_datetime_timer(acb);
1075         return 0;
1076 controller_stop:
1077         arcmsr_stop_adapter_bgrb(acb);
1078         arcmsr_flush_adapter_cache(acb);
1079 controller_unregister:
1080         scsi_remove_host(host);
1081         arcmsr_free_ccb_pool(acb);
1082         arcmsr_unmap_pciregion(acb);
1083         pci_release_regions(pdev);
1084         scsi_host_put(host);
1085         pci_disable_device(pdev);
1086         return -ENODEV;
1087 }
1088
1089 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1090 {
1091         struct MessageUnit_A __iomem *reg = acb->pmuA;
1092         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1093         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1094                 printk(KERN_NOTICE
1095                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1096                         , acb->host->host_no);
1097                 return false;
1098         }
1099         return true;
1100 }
1101
1102 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1103 {
1104         struct MessageUnit_B *reg = acb->pmuB;
1105
1106         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1107         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1108                 printk(KERN_NOTICE
1109                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1110                         , acb->host->host_no);
1111                 return false;
1112         }
1113         return true;
1114 }
1115 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1116 {
1117         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1118         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1119         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1120         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1121                 printk(KERN_NOTICE
1122                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1123                         , pACB->host->host_no);
1124                 return false;
1125         }
1126         return true;
1127 }
1128
1129 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1130 {
1131         struct MessageUnit_D *reg = pACB->pmuD;
1132
1133         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1134         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1135                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1136                         "command' timeout\n", pACB->host->host_no);
1137                 return false;
1138         }
1139         return true;
1140 }
1141
1142 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1143 {
1144         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1145
1146         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1147         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1148         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1149         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1150                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1151                         "command' timeout\n", pACB->host->host_no);
1152                 return false;
1153         }
1154         return true;
1155 }
1156
1157 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1158 {
1159         uint8_t rtnval = 0;
1160         switch (acb->adapter_type) {
1161         case ACB_ADAPTER_TYPE_A: {
1162                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1163                 }
1164                 break;
1165
1166         case ACB_ADAPTER_TYPE_B: {
1167                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1168                 }
1169                 break;
1170
1171         case ACB_ADAPTER_TYPE_C: {
1172                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1173                 }
1174                 break;
1175
1176         case ACB_ADAPTER_TYPE_D:
1177                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1178                 break;
1179         case ACB_ADAPTER_TYPE_E:
1180                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1181                 break;
1182         }
1183         return rtnval;
1184 }
1185
1186 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1187 {
1188         struct scsi_cmnd *pcmd = ccb->pcmd;
1189
1190         scsi_dma_unmap(pcmd);
1191 }
1192
1193 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1194 {
1195         struct AdapterControlBlock *acb = ccb->acb;
1196         struct scsi_cmnd *pcmd = ccb->pcmd;
1197         unsigned long flags;
1198         atomic_dec(&acb->ccboutstandingcount);
1199         arcmsr_pci_unmap_dma(ccb);
1200         ccb->startdone = ARCMSR_CCB_DONE;
1201         spin_lock_irqsave(&acb->ccblist_lock, flags);
1202         list_add_tail(&ccb->list, &acb->ccb_free_list);
1203         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1204         pcmd->scsi_done(pcmd);
1205 }
1206
1207 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1208 {
1209
1210         struct scsi_cmnd *pcmd = ccb->pcmd;
1211         struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1212         pcmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
1213         if (sensebuffer) {
1214                 int sense_data_length =
1215                         sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1216                         ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1217                 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
1218                 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1219                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1220                 sensebuffer->Valid = 1;
1221                 pcmd->result |= (DRIVER_SENSE << 24);
1222         }
1223 }
1224
1225 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1226 {
1227         u32 orig_mask = 0;
1228         switch (acb->adapter_type) {
1229         case ACB_ADAPTER_TYPE_A : {
1230                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1231                 orig_mask = readl(&reg->outbound_intmask);
1232                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1233                                                 &reg->outbound_intmask);
1234                 }
1235                 break;
1236         case ACB_ADAPTER_TYPE_B : {
1237                 struct MessageUnit_B *reg = acb->pmuB;
1238                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1239                 writel(0, reg->iop2drv_doorbell_mask);
1240                 }
1241                 break;
1242         case ACB_ADAPTER_TYPE_C:{
1243                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1244                 /* disable all outbound interrupt */
1245                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1246                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1247                 }
1248                 break;
1249         case ACB_ADAPTER_TYPE_D: {
1250                 struct MessageUnit_D *reg = acb->pmuD;
1251                 /* disable all outbound interrupt */
1252                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1253                 }
1254                 break;
1255         case ACB_ADAPTER_TYPE_E: {
1256                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1257                 orig_mask = readl(&reg->host_int_mask);
1258                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1259                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1260                 }
1261                 break;
1262         }
1263         return orig_mask;
1264 }
1265
1266 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1267                         struct CommandControlBlock *ccb, bool error)
1268 {
1269         uint8_t id, lun;
1270         id = ccb->pcmd->device->id;
1271         lun = ccb->pcmd->device->lun;
1272         if (!error) {
1273                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1274                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1275                 ccb->pcmd->result = DID_OK << 16;
1276                 arcmsr_ccb_complete(ccb);
1277         }else{
1278                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1279                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1280                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1281                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1282                         arcmsr_ccb_complete(ccb);
1283                         }
1284                         break;
1285
1286                 case ARCMSR_DEV_ABORTED:
1287
1288                 case ARCMSR_DEV_INIT_FAIL: {
1289                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1290                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1291                         arcmsr_ccb_complete(ccb);
1292                         }
1293                         break;
1294
1295                 case ARCMSR_DEV_CHECK_CONDITION: {
1296                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1297                         arcmsr_report_sense_info(ccb);
1298                         arcmsr_ccb_complete(ccb);
1299                         }
1300                         break;
1301
1302                 default:
1303                         printk(KERN_NOTICE
1304                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1305                                 but got unknown DeviceStatus = 0x%x \n"
1306                                 , acb->host->host_no
1307                                 , id
1308                                 , lun
1309                                 , ccb->arcmsr_cdb.DeviceStatus);
1310                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1311                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1312                                 arcmsr_ccb_complete(ccb);
1313                         break;
1314                 }
1315         }
1316 }
1317
1318 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1319 {
1320         int id, lun;
1321         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1322                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1323                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1324                         if (abortcmd) {
1325                                 id = abortcmd->device->id;
1326                                 lun = abortcmd->device->lun;
1327                                 abortcmd->result |= DID_ABORT << 16;
1328                                 arcmsr_ccb_complete(pCCB);
1329                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1330                                 acb->host->host_no, pCCB);
1331                         }
1332                         return;
1333                 }
1334                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1335                                 done acb = '0x%p'"
1336                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1337                                 " ccboutstandingcount = %d \n"
1338                                 , acb->host->host_no
1339                                 , acb
1340                                 , pCCB
1341                                 , pCCB->acb
1342                                 , pCCB->startdone
1343                                 , atomic_read(&acb->ccboutstandingcount));
1344                   return;
1345         }
1346         arcmsr_report_ccb_state(acb, pCCB, error);
1347 }
1348
1349 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1350 {
1351         int i = 0;
1352         uint32_t flag_ccb, ccb_cdb_phy;
1353         struct ARCMSR_CDB *pARCMSR_CDB;
1354         bool error;
1355         struct CommandControlBlock *pCCB;
1356         switch (acb->adapter_type) {
1357
1358         case ACB_ADAPTER_TYPE_A: {
1359                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1360                 uint32_t outbound_intstatus;
1361                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1362                                         acb->outbound_int_enable;
1363                 /*clear and abort all outbound posted Q*/
1364                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1365                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1366                                 && (i++ < acb->maxOutstanding)) {
1367                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1368                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1369                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1370                         arcmsr_drain_donequeue(acb, pCCB, error);
1371                 }
1372                 }
1373                 break;
1374
1375         case ACB_ADAPTER_TYPE_B: {
1376                 struct MessageUnit_B *reg = acb->pmuB;
1377                 /*clear all outbound posted Q*/
1378                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1379                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1380                         flag_ccb = reg->done_qbuffer[i];
1381                         if (flag_ccb != 0) {
1382                                 reg->done_qbuffer[i] = 0;
1383                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1384                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1385                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1386                                 arcmsr_drain_donequeue(acb, pCCB, error);
1387                         }
1388                         reg->post_qbuffer[i] = 0;
1389                 }
1390                 reg->doneq_index = 0;
1391                 reg->postq_index = 0;
1392                 }
1393                 break;
1394         case ACB_ADAPTER_TYPE_C: {
1395                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1396                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1397                         /*need to do*/
1398                         flag_ccb = readl(&reg->outbound_queueport_low);
1399                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1400                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1401                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1402                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1403                         arcmsr_drain_donequeue(acb, pCCB, error);
1404                 }
1405                 }
1406                 break;
1407         case ACB_ADAPTER_TYPE_D: {
1408                 struct MessageUnit_D  *pmu = acb->pmuD;
1409                 uint32_t outbound_write_pointer;
1410                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1411                 unsigned long flags;
1412
1413                 residual = atomic_read(&acb->ccboutstandingcount);
1414                 for (i = 0; i < residual; i++) {
1415                         spin_lock_irqsave(&acb->doneq_lock, flags);
1416                         outbound_write_pointer =
1417                                 pmu->done_qbuffer[0].addressLow + 1;
1418                         doneq_index = pmu->doneq_index;
1419                         if ((doneq_index & 0xFFF) !=
1420                                 (outbound_write_pointer & 0xFFF)) {
1421                                 toggle = doneq_index & 0x4000;
1422                                 index_stripped = (doneq_index & 0xFFF) + 1;
1423                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1424                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1425                                         ((toggle ^ 0x4000) + 1);
1426                                 doneq_index = pmu->doneq_index;
1427                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1428                                 addressLow = pmu->done_qbuffer[doneq_index &
1429                                         0xFFF].addressLow;
1430                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1431                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1432                                         (acb->vir2phy_offset + ccb_cdb_phy);
1433                                 pCCB = container_of(pARCMSR_CDB,
1434                                         struct CommandControlBlock, arcmsr_cdb);
1435                                 error = (addressLow &
1436                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1437                                         true : false;
1438                                 arcmsr_drain_donequeue(acb, pCCB, error);
1439                                 writel(doneq_index,
1440                                         pmu->outboundlist_read_pointer);
1441                         } else {
1442                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1443                                 mdelay(10);
1444                         }
1445                 }
1446                 pmu->postq_index = 0;
1447                 pmu->doneq_index = 0x40FF;
1448                 }
1449                 break;
1450         case ACB_ADAPTER_TYPE_E:
1451                 arcmsr_hbaE_postqueue_isr(acb);
1452                 break;
1453         }
1454 }
1455
1456 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1457 {
1458         char *acb_dev_map = (char *)acb->device_map;
1459         int target, lun, i;
1460         struct scsi_device *psdev;
1461         struct CommandControlBlock *ccb;
1462         char temp;
1463
1464         for (i = 0; i < acb->maxFreeCCB; i++) {
1465                 ccb = acb->pccb_pool[i];
1466                 if (ccb->startdone == ARCMSR_CCB_START) {
1467                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1468                         arcmsr_pci_unmap_dma(ccb);
1469                         ccb->pcmd->scsi_done(ccb->pcmd);
1470                 }
1471         }
1472         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1473                 temp = *acb_dev_map;
1474                 if (temp) {
1475                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1476                                 if (temp & 1) {
1477                                         psdev = scsi_device_lookup(acb->host,
1478                                                 0, target, lun);
1479                                         if (psdev != NULL) {
1480                                                 scsi_remove_device(psdev);
1481                                                 scsi_device_put(psdev);
1482                                         }
1483                                 }
1484                                 temp >>= 1;
1485                         }
1486                         *acb_dev_map = 0;
1487                 }
1488                 acb_dev_map++;
1489         }
1490 }
1491
1492 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1493 {
1494         struct pci_dev *pdev;
1495         struct Scsi_Host *host;
1496
1497         host = acb->host;
1498         arcmsr_free_sysfs_attr(acb);
1499         scsi_remove_host(host);
1500         flush_work(&acb->arcmsr_do_message_isr_bh);
1501         del_timer_sync(&acb->eternal_timer);
1502         if (set_date_time)
1503                 del_timer_sync(&acb->refresh_timer);
1504         pdev = acb->pdev;
1505         arcmsr_free_irq(pdev, acb);
1506         arcmsr_free_ccb_pool(acb);
1507         arcmsr_free_mu(acb);
1508         arcmsr_unmap_pciregion(acb);
1509         pci_release_regions(pdev);
1510         scsi_host_put(host);
1511         pci_disable_device(pdev);
1512 }
1513
1514 static void arcmsr_remove(struct pci_dev *pdev)
1515 {
1516         struct Scsi_Host *host = pci_get_drvdata(pdev);
1517         struct AdapterControlBlock *acb =
1518                 (struct AdapterControlBlock *) host->hostdata;
1519         int poll_count = 0;
1520         uint16_t dev_id;
1521
1522         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1523         if (dev_id == 0xffff) {
1524                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1525                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1526                 arcmsr_remove_scsi_devices(acb);
1527                 arcmsr_free_pcidev(acb);
1528                 return;
1529         }
1530         arcmsr_free_sysfs_attr(acb);
1531         scsi_remove_host(host);
1532         flush_work(&acb->arcmsr_do_message_isr_bh);
1533         del_timer_sync(&acb->eternal_timer);
1534         if (set_date_time)
1535                 del_timer_sync(&acb->refresh_timer);
1536         arcmsr_disable_outbound_ints(acb);
1537         arcmsr_stop_adapter_bgrb(acb);
1538         arcmsr_flush_adapter_cache(acb);
1539         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1540         acb->acb_flags &= ~ACB_F_IOP_INITED;
1541
1542         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1543                 if (!atomic_read(&acb->ccboutstandingcount))
1544                         break;
1545                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1546                 msleep(25);
1547         }
1548
1549         if (atomic_read(&acb->ccboutstandingcount)) {
1550                 int i;
1551
1552                 arcmsr_abort_allcmd(acb);
1553                 arcmsr_done4abort_postqueue(acb);
1554                 for (i = 0; i < acb->maxFreeCCB; i++) {
1555                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1556                         if (ccb->startdone == ARCMSR_CCB_START) {
1557                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1558                                 ccb->pcmd->result = DID_ABORT << 16;
1559                                 arcmsr_ccb_complete(ccb);
1560                         }
1561                 }
1562         }
1563         arcmsr_free_irq(pdev, acb);
1564         arcmsr_free_ccb_pool(acb);
1565         arcmsr_free_mu(acb);
1566         arcmsr_unmap_pciregion(acb);
1567         pci_release_regions(pdev);
1568         scsi_host_put(host);
1569         pci_disable_device(pdev);
1570 }
1571
1572 static void arcmsr_shutdown(struct pci_dev *pdev)
1573 {
1574         struct Scsi_Host *host = pci_get_drvdata(pdev);
1575         struct AdapterControlBlock *acb =
1576                 (struct AdapterControlBlock *)host->hostdata;
1577         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1578                 return;
1579         del_timer_sync(&acb->eternal_timer);
1580         if (set_date_time)
1581                 del_timer_sync(&acb->refresh_timer);
1582         arcmsr_disable_outbound_ints(acb);
1583         arcmsr_free_irq(pdev, acb);
1584         flush_work(&acb->arcmsr_do_message_isr_bh);
1585         arcmsr_stop_adapter_bgrb(acb);
1586         arcmsr_flush_adapter_cache(acb);
1587 }
1588
1589 static int arcmsr_module_init(void)
1590 {
1591         int error = 0;
1592         error = pci_register_driver(&arcmsr_pci_driver);
1593         return error;
1594 }
1595
1596 static void arcmsr_module_exit(void)
1597 {
1598         pci_unregister_driver(&arcmsr_pci_driver);
1599 }
1600 module_init(arcmsr_module_init);
1601 module_exit(arcmsr_module_exit);
1602
1603 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1604                                                 u32 intmask_org)
1605 {
1606         u32 mask;
1607         switch (acb->adapter_type) {
1608
1609         case ACB_ADAPTER_TYPE_A: {
1610                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1611                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1612                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1613                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1614                 writel(mask, &reg->outbound_intmask);
1615                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1616                 }
1617                 break;
1618
1619         case ACB_ADAPTER_TYPE_B: {
1620                 struct MessageUnit_B *reg = acb->pmuB;
1621                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1622                         ARCMSR_IOP2DRV_DATA_READ_OK |
1623                         ARCMSR_IOP2DRV_CDB_DONE |
1624                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1625                 writel(mask, reg->iop2drv_doorbell_mask);
1626                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1627                 }
1628                 break;
1629         case ACB_ADAPTER_TYPE_C: {
1630                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1631                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1632                 writel(intmask_org & mask, &reg->host_int_mask);
1633                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1634                 }
1635                 break;
1636         case ACB_ADAPTER_TYPE_D: {
1637                 struct MessageUnit_D *reg = acb->pmuD;
1638
1639                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1640                 writel(intmask_org | mask, reg->pcief0_int_enable);
1641                 break;
1642                 }
1643         case ACB_ADAPTER_TYPE_E: {
1644                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1645
1646                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1647                 writel(intmask_org & mask, &reg->host_int_mask);
1648                 break;
1649                 }
1650         }
1651 }
1652
1653 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1654         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1655 {
1656         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1657         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1658         __le32 address_lo, address_hi;
1659         int arccdbsize = 0x30;
1660         __le32 length = 0;
1661         int i;
1662         struct scatterlist *sg;
1663         int nseg;
1664         ccb->pcmd = pcmd;
1665         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1666         arcmsr_cdb->TargetID = pcmd->device->id;
1667         arcmsr_cdb->LUN = pcmd->device->lun;
1668         arcmsr_cdb->Function = 1;
1669         arcmsr_cdb->msgContext = 0;
1670         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1671
1672         nseg = scsi_dma_map(pcmd);
1673         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1674                 return FAILED;
1675         scsi_for_each_sg(pcmd, sg, nseg, i) {
1676                 /* Get the physical address of the current data pointer */
1677                 length = cpu_to_le32(sg_dma_len(sg));
1678                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1679                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1680                 if (address_hi == 0) {
1681                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1682
1683                         pdma_sg->address = address_lo;
1684                         pdma_sg->length = length;
1685                         psge += sizeof (struct SG32ENTRY);
1686                         arccdbsize += sizeof (struct SG32ENTRY);
1687                 } else {
1688                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1689
1690                         pdma_sg->addresshigh = address_hi;
1691                         pdma_sg->address = address_lo;
1692                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1693                         psge += sizeof (struct SG64ENTRY);
1694                         arccdbsize += sizeof (struct SG64ENTRY);
1695                 }
1696         }
1697         arcmsr_cdb->sgcount = (uint8_t)nseg;
1698         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1699         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1700         if ( arccdbsize > 256)
1701                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1702         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1703                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1704         ccb->arc_cdb_size = arccdbsize;
1705         return SUCCESS;
1706 }
1707
1708 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1709 {
1710         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1711         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1712         atomic_inc(&acb->ccboutstandingcount);
1713         ccb->startdone = ARCMSR_CCB_START;
1714         switch (acb->adapter_type) {
1715         case ACB_ADAPTER_TYPE_A: {
1716                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1717
1718                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1719                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1720                         &reg->inbound_queueport);
1721                 else
1722                         writel(cdb_phyaddr, &reg->inbound_queueport);
1723                 break;
1724         }
1725
1726         case ACB_ADAPTER_TYPE_B: {
1727                 struct MessageUnit_B *reg = acb->pmuB;
1728                 uint32_t ending_index, index = reg->postq_index;
1729
1730                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1731                 reg->post_qbuffer[ending_index] = 0;
1732                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1733                         reg->post_qbuffer[index] =
1734                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1735                 } else {
1736                         reg->post_qbuffer[index] = cdb_phyaddr;
1737                 }
1738                 index++;
1739                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1740                 reg->postq_index = index;
1741                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1742                 }
1743                 break;
1744         case ACB_ADAPTER_TYPE_C: {
1745                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1746                 uint32_t ccb_post_stamp, arc_cdb_size;
1747
1748                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1749                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1750                 if (acb->cdb_phyaddr_hi32) {
1751                         writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1752                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1753                 } else {
1754                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1755                 }
1756                 }
1757                 break;
1758         case ACB_ADAPTER_TYPE_D: {
1759                 struct MessageUnit_D  *pmu = acb->pmuD;
1760                 u16 index_stripped;
1761                 u16 postq_index, toggle;
1762                 unsigned long flags;
1763                 struct InBound_SRB *pinbound_srb;
1764
1765                 spin_lock_irqsave(&acb->postq_lock, flags);
1766                 postq_index = pmu->postq_index;
1767                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1768                 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
1769                 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
1770                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1771                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1772                 toggle = postq_index & 0x4000;
1773                 index_stripped = postq_index + 1;
1774                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1775                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1776                         (toggle ^ 0x4000);
1777                 writel(postq_index, pmu->inboundlist_write_pointer);
1778                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1779                 break;
1780                 }
1781         case ACB_ADAPTER_TYPE_E: {
1782                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1783                 u32 ccb_post_stamp, arc_cdb_size;
1784
1785                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1786                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1787                 writel(0, &pmu->inbound_queueport_high);
1788                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1789                 break;
1790                 }
1791         }
1792 }
1793
1794 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1795 {
1796         struct MessageUnit_A __iomem *reg = acb->pmuA;
1797         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1798         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1799         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1800                 printk(KERN_NOTICE
1801                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1802                         , acb->host->host_no);
1803         }
1804 }
1805
1806 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1807 {
1808         struct MessageUnit_B *reg = acb->pmuB;
1809         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1810         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1811
1812         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1813                 printk(KERN_NOTICE
1814                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1815                         , acb->host->host_no);
1816         }
1817 }
1818
1819 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1820 {
1821         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1822         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1823         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1824         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1825         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1826                 printk(KERN_NOTICE
1827                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1828                         , pACB->host->host_no);
1829         }
1830         return;
1831 }
1832
1833 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1834 {
1835         struct MessageUnit_D *reg = pACB->pmuD;
1836
1837         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1838         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1839         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1840                 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
1841                         "timeout\n", pACB->host->host_no);
1842 }
1843
1844 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1845 {
1846         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1847
1848         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1849         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1850         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1851         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1852         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1853                 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
1854                         "timeout\n", pACB->host->host_no);
1855         }
1856 }
1857
1858 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1859 {
1860         switch (acb->adapter_type) {
1861         case ACB_ADAPTER_TYPE_A: {
1862                 arcmsr_hbaA_stop_bgrb(acb);
1863                 }
1864                 break;
1865
1866         case ACB_ADAPTER_TYPE_B: {
1867                 arcmsr_hbaB_stop_bgrb(acb);
1868                 }
1869                 break;
1870         case ACB_ADAPTER_TYPE_C: {
1871                 arcmsr_hbaC_stop_bgrb(acb);
1872                 }
1873                 break;
1874         case ACB_ADAPTER_TYPE_D:
1875                 arcmsr_hbaD_stop_bgrb(acb);
1876                 break;
1877         case ACB_ADAPTER_TYPE_E:
1878                 arcmsr_hbaE_stop_bgrb(acb);
1879                 break;
1880         }
1881 }
1882
1883 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1884 {
1885         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1886 }
1887
1888 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1889 {
1890         switch (acb->adapter_type) {
1891         case ACB_ADAPTER_TYPE_A: {
1892                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1893                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1894                 }
1895                 break;
1896
1897         case ACB_ADAPTER_TYPE_B: {
1898                 struct MessageUnit_B *reg = acb->pmuB;
1899                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1900                 }
1901                 break;
1902         case ACB_ADAPTER_TYPE_C: {
1903                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1904
1905                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1906                 }
1907                 break;
1908         case ACB_ADAPTER_TYPE_D: {
1909                 struct MessageUnit_D *reg = acb->pmuD;
1910                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
1911                         reg->inbound_doorbell);
1912                 }
1913                 break;
1914         case ACB_ADAPTER_TYPE_E: {
1915                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1916                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
1917                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1918                 }
1919                 break;
1920         }
1921 }
1922
1923 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1924 {
1925         switch (acb->adapter_type) {
1926         case ACB_ADAPTER_TYPE_A: {
1927                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1928                 /*
1929                 ** push inbound doorbell tell iop, driver data write ok
1930                 ** and wait reply on next hwinterrupt for next Qbuffer post
1931                 */
1932                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1933                 }
1934                 break;
1935
1936         case ACB_ADAPTER_TYPE_B: {
1937                 struct MessageUnit_B *reg = acb->pmuB;
1938                 /*
1939                 ** push inbound doorbell tell iop, driver data write ok
1940                 ** and wait reply on next hwinterrupt for next Qbuffer post
1941                 */
1942                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1943                 }
1944                 break;
1945         case ACB_ADAPTER_TYPE_C: {
1946                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1947                 /*
1948                 ** push inbound doorbell tell iop, driver data write ok
1949                 ** and wait reply on next hwinterrupt for next Qbuffer post
1950                 */
1951                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1952                 }
1953                 break;
1954         case ACB_ADAPTER_TYPE_D: {
1955                 struct MessageUnit_D *reg = acb->pmuD;
1956                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
1957                         reg->inbound_doorbell);
1958                 }
1959                 break;
1960         case ACB_ADAPTER_TYPE_E: {
1961                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1962                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
1963                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1964                 }
1965                 break;
1966         }
1967 }
1968
1969 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1970 {
1971         struct QBUFFER __iomem *qbuffer = NULL;
1972         switch (acb->adapter_type) {
1973
1974         case ACB_ADAPTER_TYPE_A: {
1975                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1976                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1977                 }
1978                 break;
1979
1980         case ACB_ADAPTER_TYPE_B: {
1981                 struct MessageUnit_B *reg = acb->pmuB;
1982                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1983                 }
1984                 break;
1985         case ACB_ADAPTER_TYPE_C: {
1986                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1987                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1988                 }
1989                 break;
1990         case ACB_ADAPTER_TYPE_D: {
1991                 struct MessageUnit_D *reg = acb->pmuD;
1992                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1993                 }
1994                 break;
1995         case ACB_ADAPTER_TYPE_E: {
1996                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1997                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1998                 }
1999                 break;
2000         }
2001         return qbuffer;
2002 }
2003
2004 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2005 {
2006         struct QBUFFER __iomem *pqbuffer = NULL;
2007         switch (acb->adapter_type) {
2008
2009         case ACB_ADAPTER_TYPE_A: {
2010                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2011                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2012                 }
2013                 break;
2014
2015         case ACB_ADAPTER_TYPE_B: {
2016                 struct MessageUnit_B  *reg = acb->pmuB;
2017                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2018                 }
2019                 break;
2020         case ACB_ADAPTER_TYPE_C: {
2021                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2022                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2023                 }
2024                 break;
2025         case ACB_ADAPTER_TYPE_D: {
2026                 struct MessageUnit_D *reg = acb->pmuD;
2027                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2028                 }
2029                 break;
2030         case ACB_ADAPTER_TYPE_E: {
2031                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2032                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2033                 }
2034                 break;
2035         }
2036         return pqbuffer;
2037 }
2038
2039 static uint32_t
2040 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2041                 struct QBUFFER __iomem *prbuffer)
2042 {
2043         uint8_t *pQbuffer;
2044         uint8_t *buf1 = NULL;
2045         uint32_t __iomem *iop_data;
2046         uint32_t iop_len, data_len, *buf2 = NULL;
2047
2048         iop_data = (uint32_t __iomem *)prbuffer->data;
2049         iop_len = readl(&prbuffer->data_len);
2050         if (iop_len > 0) {
2051                 buf1 = kmalloc(128, GFP_ATOMIC);
2052                 buf2 = (uint32_t *)buf1;
2053                 if (buf1 == NULL)
2054                         return 0;
2055                 data_len = iop_len;
2056                 while (data_len >= 4) {
2057                         *buf2++ = readl(iop_data);
2058                         iop_data++;
2059                         data_len -= 4;
2060                 }
2061                 if (data_len)
2062                         *buf2 = readl(iop_data);
2063                 buf2 = (uint32_t *)buf1;
2064         }
2065         while (iop_len > 0) {
2066                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2067                 *pQbuffer = *buf1;
2068                 acb->rqbuf_putIndex++;
2069                 /* if last, index number set it to 0 */
2070                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2071                 buf1++;
2072                 iop_len--;
2073         }
2074         kfree(buf2);
2075         /* let IOP know data has been read */
2076         arcmsr_iop_message_read(acb);
2077         return 1;
2078 }
2079
2080 uint32_t
2081 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2082         struct QBUFFER __iomem *prbuffer) {
2083
2084         uint8_t *pQbuffer;
2085         uint8_t __iomem *iop_data;
2086         uint32_t iop_len;
2087
2088         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2089                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2090         iop_data = (uint8_t __iomem *)prbuffer->data;
2091         iop_len = readl(&prbuffer->data_len);
2092         while (iop_len > 0) {
2093                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2094                 *pQbuffer = readb(iop_data);
2095                 acb->rqbuf_putIndex++;
2096                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2097                 iop_data++;
2098                 iop_len--;
2099         }
2100         arcmsr_iop_message_read(acb);
2101         return 1;
2102 }
2103
2104 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2105 {
2106         unsigned long flags;
2107         struct QBUFFER __iomem  *prbuffer;
2108         int32_t buf_empty_len;
2109
2110         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2111         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2112         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2113                 (ARCMSR_MAX_QBUFFER - 1);
2114         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2115                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2116                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2117         } else
2118                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2119         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2120 }
2121
2122 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2123 {
2124         uint8_t *pQbuffer;
2125         struct QBUFFER __iomem *pwbuffer;
2126         uint8_t *buf1 = NULL;
2127         uint32_t __iomem *iop_data;
2128         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2129
2130         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2131                 buf1 = kmalloc(128, GFP_ATOMIC);
2132                 buf2 = (uint32_t *)buf1;
2133                 if (buf1 == NULL)
2134                         return;
2135
2136                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2137                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2138                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2139                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2140                         && (allxfer_len < 124)) {
2141                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2142                         *buf1 = *pQbuffer;
2143                         acb->wqbuf_getIndex++;
2144                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2145                         buf1++;
2146                         allxfer_len++;
2147                 }
2148                 data_len = allxfer_len;
2149                 buf1 = (uint8_t *)buf2;
2150                 while (data_len >= 4) {
2151                         data = *buf2++;
2152                         writel(data, iop_data);
2153                         iop_data++;
2154                         data_len -= 4;
2155                 }
2156                 if (data_len) {
2157                         data = *buf2;
2158                         writel(data, iop_data);
2159                 }
2160                 writel(allxfer_len, &pwbuffer->data_len);
2161                 kfree(buf1);
2162                 arcmsr_iop_message_wrote(acb);
2163         }
2164 }
2165
2166 void
2167 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2168 {
2169         uint8_t *pQbuffer;
2170         struct QBUFFER __iomem *pwbuffer;
2171         uint8_t __iomem *iop_data;
2172         int32_t allxfer_len = 0;
2173
2174         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2175                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2176                 return;
2177         }
2178         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2179                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2180                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2181                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2182                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2183                         && (allxfer_len < 124)) {
2184                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2185                         writeb(*pQbuffer, iop_data);
2186                         acb->wqbuf_getIndex++;
2187                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2188                         iop_data++;
2189                         allxfer_len++;
2190                 }
2191                 writel(allxfer_len, &pwbuffer->data_len);
2192                 arcmsr_iop_message_wrote(acb);
2193         }
2194 }
2195
2196 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2197 {
2198         unsigned long flags;
2199
2200         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2201         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2202         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2203                 arcmsr_write_ioctldata2iop(acb);
2204         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2205                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2206         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2207 }
2208
2209 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2210 {
2211         uint32_t outbound_doorbell;
2212         struct MessageUnit_A __iomem *reg = acb->pmuA;
2213         outbound_doorbell = readl(&reg->outbound_doorbell);
2214         do {
2215                 writel(outbound_doorbell, &reg->outbound_doorbell);
2216                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2217                         arcmsr_iop2drv_data_wrote_handle(acb);
2218                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2219                         arcmsr_iop2drv_data_read_handle(acb);
2220                 outbound_doorbell = readl(&reg->outbound_doorbell);
2221         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2222                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2223 }
2224 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2225 {
2226         uint32_t outbound_doorbell;
2227         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2228         /*
2229         *******************************************************************
2230         **  Maybe here we need to check wrqbuffer_lock is lock or not
2231         **  DOORBELL: din! don!
2232         **  check if there are any mail need to pack from firmware
2233         *******************************************************************
2234         */
2235         outbound_doorbell = readl(&reg->outbound_doorbell);
2236         do {
2237                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2238                 readl(&reg->outbound_doorbell_clear);
2239                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2240                         arcmsr_iop2drv_data_wrote_handle(pACB);
2241                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2242                         arcmsr_iop2drv_data_read_handle(pACB);
2243                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2244                         arcmsr_hbaC_message_isr(pACB);
2245                 outbound_doorbell = readl(&reg->outbound_doorbell);
2246         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2247                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2248                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2249 }
2250
2251 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2252 {
2253         uint32_t outbound_doorbell;
2254         struct MessageUnit_D  *pmu = pACB->pmuD;
2255
2256         outbound_doorbell = readl(pmu->outbound_doorbell);
2257         do {
2258                 writel(outbound_doorbell, pmu->outbound_doorbell);
2259                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2260                         arcmsr_hbaD_message_isr(pACB);
2261                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2262                         arcmsr_iop2drv_data_wrote_handle(pACB);
2263                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2264                         arcmsr_iop2drv_data_read_handle(pACB);
2265                 outbound_doorbell = readl(pmu->outbound_doorbell);
2266         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2267                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2268                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2269 }
2270
2271 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2272 {
2273         uint32_t outbound_doorbell, in_doorbell, tmp;
2274         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2275
2276         in_doorbell = readl(&reg->iobound_doorbell);
2277         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2278         do {
2279                 writel(0, &reg->host_int_status); /* clear interrupt */
2280                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2281                         arcmsr_iop2drv_data_wrote_handle(pACB);
2282                 }
2283                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2284                         arcmsr_iop2drv_data_read_handle(pACB);
2285                 }
2286                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2287                         arcmsr_hbaE_message_isr(pACB);
2288                 }
2289                 tmp = in_doorbell;
2290                 in_doorbell = readl(&reg->iobound_doorbell);
2291                 outbound_doorbell = tmp ^ in_doorbell;
2292         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2293                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2294                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2295         pACB->in_doorbell = in_doorbell;
2296 }
2297
2298 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2299 {
2300         uint32_t flag_ccb;
2301         struct MessageUnit_A __iomem *reg = acb->pmuA;
2302         struct ARCMSR_CDB *pARCMSR_CDB;
2303         struct CommandControlBlock *pCCB;
2304         bool error;
2305         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2306                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
2307                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2308                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2309                 arcmsr_drain_donequeue(acb, pCCB, error);
2310         }
2311 }
2312 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2313 {
2314         uint32_t index;
2315         uint32_t flag_ccb;
2316         struct MessageUnit_B *reg = acb->pmuB;
2317         struct ARCMSR_CDB *pARCMSR_CDB;
2318         struct CommandControlBlock *pCCB;
2319         bool error;
2320         index = reg->doneq_index;
2321         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2322                 reg->done_qbuffer[index] = 0;
2323                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
2324                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2325                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2326                 arcmsr_drain_donequeue(acb, pCCB, error);
2327                 index++;
2328                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2329                 reg->doneq_index = index;
2330         }
2331 }
2332
2333 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2334 {
2335         struct MessageUnit_C __iomem *phbcmu;
2336         struct ARCMSR_CDB *arcmsr_cdb;
2337         struct CommandControlBlock *ccb;
2338         uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
2339         int error;
2340
2341         phbcmu = acb->pmuC;
2342         /* areca cdb command done */
2343         /* Use correct offset and size for syncing */
2344
2345         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2346                         0xFFFFFFFF) {
2347                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2348                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2349                         + ccb_cdb_phy);
2350                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2351                         arcmsr_cdb);
2352                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2353                         ? true : false;
2354                 /* check if command done with no error */
2355                 arcmsr_drain_donequeue(acb, ccb, error);
2356                 throttling++;
2357                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2358                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2359                                 &phbcmu->inbound_doorbell);
2360                         throttling = 0;
2361                 }
2362         }
2363 }
2364
2365 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2366 {
2367         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2368         uint32_t addressLow, ccb_cdb_phy;
2369         int error;
2370         struct MessageUnit_D  *pmu;
2371         struct ARCMSR_CDB *arcmsr_cdb;
2372         struct CommandControlBlock *ccb;
2373         unsigned long flags;
2374
2375         spin_lock_irqsave(&acb->doneq_lock, flags);
2376         pmu = acb->pmuD;
2377         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2378         doneq_index = pmu->doneq_index;
2379         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2380                 do {
2381                         toggle = doneq_index & 0x4000;
2382                         index_stripped = (doneq_index & 0xFFF) + 1;
2383                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2384                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2385                                 ((toggle ^ 0x4000) + 1);
2386                         doneq_index = pmu->doneq_index;
2387                         addressLow = pmu->done_qbuffer[doneq_index &
2388                                 0xFFF].addressLow;
2389                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2390                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2391                                 + ccb_cdb_phy);
2392                         ccb = container_of(arcmsr_cdb,
2393                                 struct CommandControlBlock, arcmsr_cdb);
2394                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2395                                 ? true : false;
2396                         arcmsr_drain_donequeue(acb, ccb, error);
2397                         writel(doneq_index, pmu->outboundlist_read_pointer);
2398                 } while ((doneq_index & 0xFFF) !=
2399                         (outbound_write_pointer & 0xFFF));
2400         }
2401         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2402                 pmu->outboundlist_interrupt_cause);
2403         readl(pmu->outboundlist_interrupt_cause);
2404         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2405 }
2406
2407 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2408 {
2409         uint32_t doneq_index;
2410         uint16_t cmdSMID;
2411         int error;
2412         struct MessageUnit_E __iomem *pmu;
2413         struct CommandControlBlock *ccb;
2414         unsigned long flags;
2415
2416         spin_lock_irqsave(&acb->doneq_lock, flags);
2417         doneq_index = acb->doneq_index;
2418         pmu = acb->pmuE;
2419         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2420                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2421                 ccb = acb->pccb_pool[cmdSMID];
2422                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2423                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2424                 arcmsr_drain_donequeue(acb, ccb, error);
2425                 doneq_index++;
2426                 if (doneq_index >= acb->completionQ_entry)
2427                         doneq_index = 0;
2428         }
2429         acb->doneq_index = doneq_index;
2430         writel(doneq_index, &pmu->reply_post_consumer_index);
2431         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2432 }
2433
2434 /*
2435 **********************************************************************************
2436 ** Handle a message interrupt
2437 **
2438 ** The only message interrupt we expect is in response to a query for the current adapter config.
2439 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2440 **********************************************************************************
2441 */
2442 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2443 {
2444         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2445         /*clear interrupt and message state*/
2446         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2447         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2448                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2449 }
2450 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2451 {
2452         struct MessageUnit_B *reg  = acb->pmuB;
2453
2454         /*clear interrupt and message state*/
2455         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2456         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2457                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2458 }
2459 /*
2460 **********************************************************************************
2461 ** Handle a message interrupt
2462 **
2463 ** The only message interrupt we expect is in response to a query for the
2464 ** current adapter config.
2465 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2466 **********************************************************************************
2467 */
2468 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2469 {
2470         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2471         /*clear interrupt and message state*/
2472         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2473         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2474                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2475 }
2476
2477 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2478 {
2479         struct MessageUnit_D *reg  = acb->pmuD;
2480
2481         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2482         readl(reg->outbound_doorbell);
2483         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2484                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2485 }
2486
2487 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2488 {
2489         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2490
2491         writel(0, &reg->host_int_status);
2492         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2493                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2494 }
2495
2496 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2497 {
2498         uint32_t outbound_intstatus;
2499         struct MessageUnit_A __iomem *reg = acb->pmuA;
2500         outbound_intstatus = readl(&reg->outbound_intstatus) &
2501                 acb->outbound_int_enable;
2502         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2503                 return IRQ_NONE;
2504         do {
2505                 writel(outbound_intstatus, &reg->outbound_intstatus);
2506                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2507                         arcmsr_hbaA_doorbell_isr(acb);
2508                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2509                         arcmsr_hbaA_postqueue_isr(acb);
2510                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2511                         arcmsr_hbaA_message_isr(acb);
2512                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2513                         acb->outbound_int_enable;
2514         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2515                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2516                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2517         return IRQ_HANDLED;
2518 }
2519
2520 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2521 {
2522         uint32_t outbound_doorbell;
2523         struct MessageUnit_B *reg = acb->pmuB;
2524         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2525                                 acb->outbound_int_enable;
2526         if (!outbound_doorbell)
2527                 return IRQ_NONE;
2528         do {
2529                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2530                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2531                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2532                         arcmsr_iop2drv_data_wrote_handle(acb);
2533                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2534                         arcmsr_iop2drv_data_read_handle(acb);
2535                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2536                         arcmsr_hbaB_postqueue_isr(acb);
2537                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2538                         arcmsr_hbaB_message_isr(acb);
2539                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2540                         acb->outbound_int_enable;
2541         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2542                 | ARCMSR_IOP2DRV_DATA_READ_OK
2543                 | ARCMSR_IOP2DRV_CDB_DONE
2544                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2545         return IRQ_HANDLED;
2546 }
2547
2548 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2549 {
2550         uint32_t host_interrupt_status;
2551         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2552         /*
2553         *********************************************
2554         **   check outbound intstatus
2555         *********************************************
2556         */
2557         host_interrupt_status = readl(&phbcmu->host_int_status) &
2558                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2559                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2560         if (!host_interrupt_status)
2561                 return IRQ_NONE;
2562         do {
2563                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2564                         arcmsr_hbaC_doorbell_isr(pACB);
2565                 /* MU post queue interrupts*/
2566                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2567                         arcmsr_hbaC_postqueue_isr(pACB);
2568                 host_interrupt_status = readl(&phbcmu->host_int_status);
2569         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2570                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2571         return IRQ_HANDLED;
2572 }
2573
2574 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2575 {
2576         u32 host_interrupt_status;
2577         struct MessageUnit_D  *pmu = pACB->pmuD;
2578
2579         host_interrupt_status = readl(pmu->host_int_status) &
2580                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2581                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2582         if (!host_interrupt_status)
2583                 return IRQ_NONE;
2584         do {
2585                 /* MU post queue interrupts*/
2586                 if (host_interrupt_status &
2587                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2588                         arcmsr_hbaD_postqueue_isr(pACB);
2589                 if (host_interrupt_status &
2590                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2591                         arcmsr_hbaD_doorbell_isr(pACB);
2592                 host_interrupt_status = readl(pmu->host_int_status);
2593         } while (host_interrupt_status &
2594                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2595                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2596         return IRQ_HANDLED;
2597 }
2598
2599 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2600 {
2601         uint32_t host_interrupt_status;
2602         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2603
2604         host_interrupt_status = readl(&pmu->host_int_status) &
2605                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2606                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2607         if (!host_interrupt_status)
2608                 return IRQ_NONE;
2609         do {
2610                 /* MU ioctl transfer doorbell interrupts*/
2611                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2612                         arcmsr_hbaE_doorbell_isr(pACB);
2613                 }
2614                 /* MU post queue interrupts*/
2615                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2616                         arcmsr_hbaE_postqueue_isr(pACB);
2617                 }
2618                 host_interrupt_status = readl(&pmu->host_int_status);
2619         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2620                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2621         return IRQ_HANDLED;
2622 }
2623
2624 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2625 {
2626         switch (acb->adapter_type) {
2627         case ACB_ADAPTER_TYPE_A:
2628                 return arcmsr_hbaA_handle_isr(acb);
2629                 break;
2630         case ACB_ADAPTER_TYPE_B:
2631                 return arcmsr_hbaB_handle_isr(acb);
2632                 break;
2633         case ACB_ADAPTER_TYPE_C:
2634                 return arcmsr_hbaC_handle_isr(acb);
2635         case ACB_ADAPTER_TYPE_D:
2636                 return arcmsr_hbaD_handle_isr(acb);
2637         case ACB_ADAPTER_TYPE_E:
2638                 return arcmsr_hbaE_handle_isr(acb);
2639         default:
2640                 return IRQ_NONE;
2641         }
2642 }
2643
2644 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2645 {
2646         if (acb) {
2647                 /* stop adapter background rebuild */
2648                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2649                         uint32_t intmask_org;
2650                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2651                         intmask_org = arcmsr_disable_outbound_ints(acb);
2652                         arcmsr_stop_adapter_bgrb(acb);
2653                         arcmsr_flush_adapter_cache(acb);
2654                         arcmsr_enable_outbound_ints(acb, intmask_org);
2655                 }
2656         }
2657 }
2658
2659
2660 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2661 {
2662         uint32_t        i;
2663
2664         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2665                 for (i = 0; i < 15; i++) {
2666                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2667                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2668                                 acb->rqbuf_getIndex = 0;
2669                                 acb->rqbuf_putIndex = 0;
2670                                 arcmsr_iop_message_read(acb);
2671                                 mdelay(30);
2672                         } else if (acb->rqbuf_getIndex !=
2673                                    acb->rqbuf_putIndex) {
2674                                 acb->rqbuf_getIndex = 0;
2675                                 acb->rqbuf_putIndex = 0;
2676                                 mdelay(30);
2677                         } else
2678                                 break;
2679                 }
2680         }
2681 }
2682
2683 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2684                 struct scsi_cmnd *cmd)
2685 {
2686         char *buffer;
2687         unsigned short use_sg;
2688         int retvalue = 0, transfer_len = 0;
2689         unsigned long flags;
2690         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2691         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2692                 (uint32_t)cmd->cmnd[6] << 16 |
2693                 (uint32_t)cmd->cmnd[7] << 8 |
2694                 (uint32_t)cmd->cmnd[8];
2695         struct scatterlist *sg;
2696
2697         use_sg = scsi_sg_count(cmd);
2698         sg = scsi_sglist(cmd);
2699         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2700         if (use_sg > 1) {
2701                 retvalue = ARCMSR_MESSAGE_FAIL;
2702                 goto message_out;
2703         }
2704         transfer_len += sg->length;
2705         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2706                 retvalue = ARCMSR_MESSAGE_FAIL;
2707                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2708                 goto message_out;
2709         }
2710         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2711         switch (controlcode) {
2712         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2713                 unsigned char *ver_addr;
2714                 uint8_t *ptmpQbuffer;
2715                 uint32_t allxfer_len = 0;
2716                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2717                 if (!ver_addr) {
2718                         retvalue = ARCMSR_MESSAGE_FAIL;
2719                         pr_info("%s: memory not enough!\n", __func__);
2720                         goto message_out;
2721                 }
2722                 ptmpQbuffer = ver_addr;
2723                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2724                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2725                         unsigned int tail = acb->rqbuf_getIndex;
2726                         unsigned int head = acb->rqbuf_putIndex;
2727                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2728
2729                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2730                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2731                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2732
2733                         if (allxfer_len <= cnt_to_end)
2734                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2735                         else {
2736                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2737                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2738                         }
2739                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2740                 }
2741                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2742                         allxfer_len);
2743                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2744                         struct QBUFFER __iomem *prbuffer;
2745                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2746                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2747                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2748                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2749                 }
2750                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2751                 kfree(ver_addr);
2752                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2753                 if (acb->fw_flag == FW_DEADLOCK)
2754                         pcmdmessagefld->cmdmessage.ReturnCode =
2755                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2756                 else
2757                         pcmdmessagefld->cmdmessage.ReturnCode =
2758                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2759                 break;
2760         }
2761         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2762                 unsigned char *ver_addr;
2763                 uint32_t user_len;
2764                 int32_t cnt2end;
2765                 uint8_t *pQbuffer, *ptmpuserbuffer;
2766
2767                 user_len = pcmdmessagefld->cmdmessage.Length;
2768                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2769                         retvalue = ARCMSR_MESSAGE_FAIL;
2770                         goto message_out;
2771                 }
2772
2773                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2774                 if (!ver_addr) {
2775                         retvalue = ARCMSR_MESSAGE_FAIL;
2776                         goto message_out;
2777                 }
2778                 ptmpuserbuffer = ver_addr;
2779
2780                 memcpy(ptmpuserbuffer,
2781                         pcmdmessagefld->messagedatabuffer, user_len);
2782                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2783                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
2784                         struct SENSE_DATA *sensebuffer =
2785                                 (struct SENSE_DATA *)cmd->sense_buffer;
2786                         arcmsr_write_ioctldata2iop(acb);
2787                         /* has error report sensedata */
2788                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
2789                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
2790                         sensebuffer->AdditionalSenseLength = 0x0A;
2791                         sensebuffer->AdditionalSenseCode = 0x20;
2792                         sensebuffer->Valid = 1;
2793                         retvalue = ARCMSR_MESSAGE_FAIL;
2794                 } else {
2795                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
2796                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
2797                         if (user_len > cnt2end) {
2798                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
2799                                 ptmpuserbuffer += cnt2end;
2800                                 user_len -= cnt2end;
2801                                 acb->wqbuf_putIndex = 0;
2802                                 pQbuffer = acb->wqbuffer;
2803                         }
2804                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
2805                         acb->wqbuf_putIndex += user_len;
2806                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2807                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2808                                 acb->acb_flags &=
2809                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2810                                 arcmsr_write_ioctldata2iop(acb);
2811                         }
2812                 }
2813                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2814                 kfree(ver_addr);
2815                 if (acb->fw_flag == FW_DEADLOCK)
2816                         pcmdmessagefld->cmdmessage.ReturnCode =
2817                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2818                 else
2819                         pcmdmessagefld->cmdmessage.ReturnCode =
2820                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2821                 break;
2822         }
2823         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2824                 uint8_t *pQbuffer = acb->rqbuffer;
2825
2826                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2827                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2828                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2829                 acb->rqbuf_getIndex = 0;
2830                 acb->rqbuf_putIndex = 0;
2831                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2832                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2833                 if (acb->fw_flag == FW_DEADLOCK)
2834                         pcmdmessagefld->cmdmessage.ReturnCode =
2835                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2836                 else
2837                         pcmdmessagefld->cmdmessage.ReturnCode =
2838                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2839                 break;
2840         }
2841         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
2842                 uint8_t *pQbuffer = acb->wqbuffer;
2843                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2844                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2845                         ACB_F_MESSAGE_WQBUFFER_READED);
2846                 acb->wqbuf_getIndex = 0;
2847                 acb->wqbuf_putIndex = 0;
2848                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2849                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2850                 if (acb->fw_flag == FW_DEADLOCK)
2851                         pcmdmessagefld->cmdmessage.ReturnCode =
2852                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2853                 else
2854                         pcmdmessagefld->cmdmessage.ReturnCode =
2855                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2856                 break;
2857         }
2858         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2859                 uint8_t *pQbuffer;
2860                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2861                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2862                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2863                 acb->rqbuf_getIndex = 0;
2864                 acb->rqbuf_putIndex = 0;
2865                 pQbuffer = acb->rqbuffer;
2866                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2867                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2868                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2869                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2870                         ACB_F_MESSAGE_WQBUFFER_READED);
2871                 acb->wqbuf_getIndex = 0;
2872                 acb->wqbuf_putIndex = 0;
2873                 pQbuffer = acb->wqbuffer;
2874                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2875                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2876                 if (acb->fw_flag == FW_DEADLOCK)
2877                         pcmdmessagefld->cmdmessage.ReturnCode =
2878                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2879                 else
2880                         pcmdmessagefld->cmdmessage.ReturnCode =
2881                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2882                 break;
2883         }
2884         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
2885                 if (acb->fw_flag == FW_DEADLOCK)
2886                         pcmdmessagefld->cmdmessage.ReturnCode =
2887                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2888                 else
2889                         pcmdmessagefld->cmdmessage.ReturnCode =
2890                                 ARCMSR_MESSAGE_RETURNCODE_3F;
2891                 break;
2892         }
2893         case ARCMSR_MESSAGE_SAY_HELLO: {
2894                 int8_t *hello_string = "Hello! I am ARCMSR";
2895                 if (acb->fw_flag == FW_DEADLOCK)
2896                         pcmdmessagefld->cmdmessage.ReturnCode =
2897                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2898                 else
2899                         pcmdmessagefld->cmdmessage.ReturnCode =
2900                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2901                 memcpy(pcmdmessagefld->messagedatabuffer,
2902                         hello_string, (int16_t)strlen(hello_string));
2903                 break;
2904         }
2905         case ARCMSR_MESSAGE_SAY_GOODBYE: {
2906                 if (acb->fw_flag == FW_DEADLOCK)
2907                         pcmdmessagefld->cmdmessage.ReturnCode =
2908                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2909                 else
2910                         pcmdmessagefld->cmdmessage.ReturnCode =
2911                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2912                 arcmsr_iop_parking(acb);
2913                 break;
2914         }
2915         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2916                 if (acb->fw_flag == FW_DEADLOCK)
2917                         pcmdmessagefld->cmdmessage.ReturnCode =
2918                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2919                 else
2920                         pcmdmessagefld->cmdmessage.ReturnCode =
2921                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2922                 arcmsr_flush_adapter_cache(acb);
2923                 break;
2924         }
2925         default:
2926                 retvalue = ARCMSR_MESSAGE_FAIL;
2927                 pr_info("%s: unknown controlcode!\n", __func__);
2928         }
2929 message_out:
2930         if (use_sg) {
2931                 struct scatterlist *sg = scsi_sglist(cmd);
2932                 kunmap_atomic(buffer - sg->offset);
2933         }
2934         return retvalue;
2935 }
2936
2937 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2938 {
2939         struct list_head *head = &acb->ccb_free_list;
2940         struct CommandControlBlock *ccb = NULL;
2941         unsigned long flags;
2942         spin_lock_irqsave(&acb->ccblist_lock, flags);
2943         if (!list_empty(head)) {
2944                 ccb = list_entry(head->next, struct CommandControlBlock, list);
2945                 list_del_init(&ccb->list);
2946         }else{
2947                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2948                 return NULL;
2949         }
2950         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2951         return ccb;
2952 }
2953
2954 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2955                 struct scsi_cmnd *cmd)
2956 {
2957         switch (cmd->cmnd[0]) {
2958         case INQUIRY: {
2959                 unsigned char inqdata[36];
2960                 char *buffer;
2961                 struct scatterlist *sg;
2962
2963                 if (cmd->device->lun) {
2964                         cmd->result = (DID_TIME_OUT << 16);
2965                         cmd->scsi_done(cmd);
2966                         return;
2967                 }
2968                 inqdata[0] = TYPE_PROCESSOR;
2969                 /* Periph Qualifier & Periph Dev Type */
2970                 inqdata[1] = 0;
2971                 /* rem media bit & Dev Type Modifier */
2972                 inqdata[2] = 0;
2973                 /* ISO, ECMA, & ANSI versions */
2974                 inqdata[4] = 31;
2975                 /* length of additional data */
2976                 strncpy(&inqdata[8], "Areca   ", 8);
2977                 /* Vendor Identification */
2978                 strncpy(&inqdata[16], "RAID controller ", 16);
2979                 /* Product Identification */
2980                 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
2981
2982                 sg = scsi_sglist(cmd);
2983                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2984
2985                 memcpy(buffer, inqdata, sizeof(inqdata));
2986                 sg = scsi_sglist(cmd);
2987                 kunmap_atomic(buffer - sg->offset);
2988
2989                 cmd->scsi_done(cmd);
2990         }
2991         break;
2992         case WRITE_BUFFER:
2993         case READ_BUFFER: {
2994                 if (arcmsr_iop_message_xfer(acb, cmd))
2995                         cmd->result = (DID_ERROR << 16);
2996                 cmd->scsi_done(cmd);
2997         }
2998         break;
2999         default:
3000                 cmd->scsi_done(cmd);
3001         }
3002 }
3003
3004 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
3005         void (* done)(struct scsi_cmnd *))
3006 {
3007         struct Scsi_Host *host = cmd->device->host;
3008         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3009         struct CommandControlBlock *ccb;
3010         int target = cmd->device->id;
3011
3012         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3013                 cmd->result = (DID_NO_CONNECT << 16);
3014                 cmd->scsi_done(cmd);
3015                 return 0;
3016         }
3017         cmd->scsi_done = done;
3018         cmd->host_scribble = NULL;
3019         cmd->result = 0;
3020         if (target == 16) {
3021                 /* virtual device for iop message transfer */
3022                 arcmsr_handle_virtual_command(acb, cmd);
3023                 return 0;
3024         }
3025         ccb = arcmsr_get_freeccb(acb);
3026         if (!ccb)
3027                 return SCSI_MLQUEUE_HOST_BUSY;
3028         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3029                 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
3030                 cmd->scsi_done(cmd);
3031                 return 0;
3032         }
3033         arcmsr_post_ccb(acb, ccb);
3034         return 0;
3035 }
3036
3037 static DEF_SCSI_QCMD(arcmsr_queue_command)
3038
3039 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3040 {
3041         int count;
3042         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3043         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3044         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3045         uint32_t *firm_model = &rwbuffer[15];
3046         uint32_t *firm_version = &rwbuffer[17];
3047         uint32_t *device_map = &rwbuffer[21];
3048
3049         count = 2;
3050         while (count) {
3051                 *acb_firm_model = readl(firm_model);
3052                 acb_firm_model++;
3053                 firm_model++;
3054                 count--;
3055         }
3056         count = 4;
3057         while (count) {
3058                 *acb_firm_version = readl(firm_version);
3059                 acb_firm_version++;
3060                 firm_version++;
3061                 count--;
3062         }
3063         count = 4;
3064         while (count) {
3065                 *acb_device_map = readl(device_map);
3066                 acb_device_map++;
3067                 device_map++;
3068                 count--;
3069         }
3070         pACB->signature = readl(&rwbuffer[0]);
3071         pACB->firm_request_len = readl(&rwbuffer[1]);
3072         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3073         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3074         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3075         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3076         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3077                 pACB->host->host_no,
3078                 pACB->firm_model,
3079                 pACB->firm_version);
3080 }
3081
3082 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3083 {
3084         struct MessageUnit_A __iomem *reg = acb->pmuA;
3085
3086         arcmsr_wait_firmware_ready(acb);
3087         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3088         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3089                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3090                         miscellaneous data' timeout \n", acb->host->host_no);
3091                 return false;
3092         }
3093         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3094         return true;
3095 }
3096 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3097 {
3098         struct MessageUnit_B *reg = acb->pmuB;
3099
3100         arcmsr_wait_firmware_ready(acb);
3101         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3102         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3103                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3104                 return false;
3105         }
3106         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3107         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3108                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3109                         miscellaneous data' timeout \n", acb->host->host_no);
3110                 return false;
3111         }
3112         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3113         return true;
3114 }
3115
3116 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3117 {
3118         uint32_t intmask_org;
3119         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3120
3121         /* disable all outbound interrupt */
3122         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3123         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3124         /* wait firmware ready */
3125         arcmsr_wait_firmware_ready(pACB);
3126         /* post "get config" instruction */
3127         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3128         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3129         /* wait message ready */
3130         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3131                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3132                         miscellaneous data' timeout \n", pACB->host->host_no);
3133                 return false;
3134         }
3135         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3136         return true;
3137 }
3138
3139 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3140 {
3141         struct MessageUnit_D *reg = acb->pmuD;
3142
3143         if (readl(acb->pmuD->outbound_doorbell) &
3144                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3145                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3146                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3147         }
3148         arcmsr_wait_firmware_ready(acb);
3149         /* post "get config" instruction */
3150         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3151         /* wait message ready */
3152         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3153                 pr_notice("arcmsr%d: wait get adapter firmware "
3154                         "miscellaneous data timeout\n", acb->host->host_no);
3155                 return false;
3156         }
3157         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3158         return true;
3159 }
3160
3161 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3162 {
3163         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3164         uint32_t intmask_org;
3165
3166         /* disable all outbound interrupt */
3167         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3168         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3169         /* wait firmware ready */
3170         arcmsr_wait_firmware_ready(pACB);
3171         mdelay(20);
3172         /* post "get config" instruction */
3173         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3174
3175         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3176         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3177         /* wait message ready */
3178         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3179                 pr_notice("arcmsr%d: wait get adapter firmware "
3180                         "miscellaneous data timeout\n", pACB->host->host_no);
3181                 return false;
3182         }
3183         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3184         return true;
3185 }
3186
3187 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3188 {
3189         bool rtn = false;
3190
3191         switch (acb->adapter_type) {
3192         case ACB_ADAPTER_TYPE_A:
3193                 rtn = arcmsr_hbaA_get_config(acb);
3194                 break;
3195         case ACB_ADAPTER_TYPE_B:
3196                 rtn = arcmsr_hbaB_get_config(acb);
3197                 break;
3198         case ACB_ADAPTER_TYPE_C:
3199                 rtn = arcmsr_hbaC_get_config(acb);
3200                 break;
3201         case ACB_ADAPTER_TYPE_D:
3202                 rtn = arcmsr_hbaD_get_config(acb);
3203                 break;
3204         case ACB_ADAPTER_TYPE_E:
3205                 rtn = arcmsr_hbaE_get_config(acb);
3206                 break;
3207         default:
3208                 break;
3209         }
3210         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3211         if (acb->host->can_queue >= acb->firm_numbers_queue)
3212                 acb->host->can_queue = acb->maxOutstanding;
3213         else
3214                 acb->maxOutstanding = acb->host->can_queue;
3215         acb->maxFreeCCB = acb->host->can_queue;
3216         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3217                 acb->maxFreeCCB += 64;
3218         return rtn;
3219 }
3220
3221 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3222         struct CommandControlBlock *poll_ccb)
3223 {
3224         struct MessageUnit_A __iomem *reg = acb->pmuA;
3225         struct CommandControlBlock *ccb;
3226         struct ARCMSR_CDB *arcmsr_cdb;
3227         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3228         int rtn;
3229         bool error;
3230         polling_hba_ccb_retry:
3231         poll_count++;
3232         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3233         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3234         while (1) {
3235                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3236                         if (poll_ccb_done){
3237                                 rtn = SUCCESS;
3238                                 break;
3239                         }else {
3240                                 msleep(25);
3241                                 if (poll_count > 100){
3242                                         rtn = FAILED;
3243                                         break;
3244                                 }
3245                                 goto polling_hba_ccb_retry;
3246                         }
3247                 }
3248                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3249                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3250                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3251                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3252                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3253                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3254                                         " poll command abort successfully \n"
3255                                         , acb->host->host_no
3256                                         , ccb->pcmd->device->id
3257                                         , (u32)ccb->pcmd->device->lun
3258                                         , ccb);
3259                                 ccb->pcmd->result = DID_ABORT << 16;
3260                                 arcmsr_ccb_complete(ccb);
3261                                 continue;
3262                         }
3263                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3264                                 " command done ccb = '0x%p'"
3265                                 "ccboutstandingcount = %d \n"
3266                                 , acb->host->host_no
3267                                 , ccb
3268                                 , atomic_read(&acb->ccboutstandingcount));
3269                         continue;
3270                 }
3271                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3272                 arcmsr_report_ccb_state(acb, ccb, error);
3273         }
3274         return rtn;
3275 }
3276
3277 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3278                                         struct CommandControlBlock *poll_ccb)
3279 {
3280         struct MessageUnit_B *reg = acb->pmuB;
3281         struct ARCMSR_CDB *arcmsr_cdb;
3282         struct CommandControlBlock *ccb;
3283         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3284         int index, rtn;
3285         bool error;
3286         polling_hbb_ccb_retry:
3287
3288         poll_count++;
3289         /* clear doorbell interrupt */
3290         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3291         while(1){
3292                 index = reg->doneq_index;
3293                 flag_ccb = reg->done_qbuffer[index];
3294                 if (flag_ccb == 0) {
3295                         if (poll_ccb_done){
3296                                 rtn = SUCCESS;
3297                                 break;
3298                         }else {
3299                                 msleep(25);
3300                                 if (poll_count > 100){
3301                                         rtn = FAILED;
3302                                         break;
3303                                 }
3304                                 goto polling_hbb_ccb_retry;
3305                         }
3306                 }
3307                 reg->done_qbuffer[index] = 0;
3308                 index++;
3309                 /*if last index number set it to 0 */
3310                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3311                 reg->doneq_index = index;
3312                 /* check if command done with no error*/
3313                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3314                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3315                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3316                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3317                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3318                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3319                                         " poll command abort successfully \n"
3320                                         ,acb->host->host_no
3321                                         ,ccb->pcmd->device->id
3322                                         ,(u32)ccb->pcmd->device->lun
3323                                         ,ccb);
3324                                 ccb->pcmd->result = DID_ABORT << 16;
3325                                 arcmsr_ccb_complete(ccb);
3326                                 continue;
3327                         }
3328                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3329                                 " command done ccb = '0x%p'"
3330                                 "ccboutstandingcount = %d \n"
3331                                 , acb->host->host_no
3332                                 , ccb
3333                                 , atomic_read(&acb->ccboutstandingcount));
3334                         continue;
3335                 }
3336                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3337                 arcmsr_report_ccb_state(acb, ccb, error);
3338         }
3339         return rtn;
3340 }
3341
3342 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3343                 struct CommandControlBlock *poll_ccb)
3344 {
3345         struct MessageUnit_C __iomem *reg = acb->pmuC;
3346         uint32_t flag_ccb, ccb_cdb_phy;
3347         struct ARCMSR_CDB *arcmsr_cdb;
3348         bool error;
3349         struct CommandControlBlock *pCCB;
3350         uint32_t poll_ccb_done = 0, poll_count = 0;
3351         int rtn;
3352 polling_hbc_ccb_retry:
3353         poll_count++;
3354         while (1) {
3355                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3356                         if (poll_ccb_done) {
3357                                 rtn = SUCCESS;
3358                                 break;
3359                         } else {
3360                                 msleep(25);
3361                                 if (poll_count > 100) {
3362                                         rtn = FAILED;
3363                                         break;
3364                                 }
3365                                 goto polling_hbc_ccb_retry;
3366                         }
3367                 }
3368                 flag_ccb = readl(&reg->outbound_queueport_low);
3369                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3370                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
3371                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3372                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3373                 /* check ifcommand done with no error*/
3374                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3375                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3376                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3377                                         " poll command abort successfully \n"
3378                                         , acb->host->host_no
3379                                         , pCCB->pcmd->device->id
3380                                         , (u32)pCCB->pcmd->device->lun
3381                                         , pCCB);
3382                                         pCCB->pcmd->result = DID_ABORT << 16;
3383                                         arcmsr_ccb_complete(pCCB);
3384                                 continue;
3385                         }
3386                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3387                                 " command done ccb = '0x%p'"
3388                                 "ccboutstandingcount = %d \n"
3389                                 , acb->host->host_no
3390                                 , pCCB
3391                                 , atomic_read(&acb->ccboutstandingcount));
3392                         continue;
3393                 }
3394                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3395                 arcmsr_report_ccb_state(acb, pCCB, error);
3396         }
3397         return rtn;
3398 }
3399
3400 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3401                                 struct CommandControlBlock *poll_ccb)
3402 {
3403         bool error;
3404         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
3405         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3406         unsigned long flags;
3407         struct ARCMSR_CDB *arcmsr_cdb;
3408         struct CommandControlBlock *pCCB;
3409         struct MessageUnit_D *pmu = acb->pmuD;
3410
3411 polling_hbaD_ccb_retry:
3412         poll_count++;
3413         while (1) {
3414                 spin_lock_irqsave(&acb->doneq_lock, flags);
3415                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3416                 doneq_index = pmu->doneq_index;
3417                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3418                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3419                         if (poll_ccb_done) {
3420                                 rtn = SUCCESS;
3421                                 break;
3422                         } else {
3423                                 msleep(25);
3424                                 if (poll_count > 40) {
3425                                         rtn = FAILED;
3426                                         break;
3427                                 }
3428                                 goto polling_hbaD_ccb_retry;
3429                         }
3430                 }
3431                 toggle = doneq_index & 0x4000;
3432                 index_stripped = (doneq_index & 0xFFF) + 1;
3433                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3434                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3435                                 ((toggle ^ 0x4000) + 1);
3436                 doneq_index = pmu->doneq_index;
3437                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3438                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3439                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3440                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3441                         ccb_cdb_phy);
3442                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3443                         arcmsr_cdb);
3444                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3445                 if ((pCCB->acb != acb) ||
3446                         (pCCB->startdone != ARCMSR_CCB_START)) {
3447                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3448                                 pr_notice("arcmsr%d: scsi id = %d "
3449                                         "lun = %d ccb = '0x%p' poll command "
3450                                         "abort successfully\n"
3451                                         , acb->host->host_no
3452                                         , pCCB->pcmd->device->id
3453                                         , (u32)pCCB->pcmd->device->lun
3454                                         , pCCB);
3455                                 pCCB->pcmd->result = DID_ABORT << 16;
3456                                 arcmsr_ccb_complete(pCCB);
3457                                 continue;
3458                         }
3459                         pr_notice("arcmsr%d: polling an illegal "
3460                                 "ccb command done ccb = '0x%p' "
3461                                 "ccboutstandingcount = %d\n"
3462                                 , acb->host->host_no
3463                                 , pCCB
3464                                 , atomic_read(&acb->ccboutstandingcount));
3465                         continue;
3466                 }
3467                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3468                         ? true : false;
3469                 arcmsr_report_ccb_state(acb, pCCB, error);
3470         }
3471         return rtn;
3472 }
3473
3474 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3475                                 struct CommandControlBlock *poll_ccb)
3476 {
3477         bool error;
3478         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3479         uint16_t cmdSMID;
3480         unsigned long flags;
3481         int rtn;
3482         struct CommandControlBlock *pCCB;
3483         struct MessageUnit_E __iomem *reg = acb->pmuE;
3484
3485         polling_hbaC_ccb_retry:
3486         poll_count++;
3487         while (1) {
3488                 spin_lock_irqsave(&acb->doneq_lock, flags);
3489                 doneq_index = acb->doneq_index;
3490                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3491                                 doneq_index) {
3492                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3493                         if (poll_ccb_done) {
3494                                 rtn = SUCCESS;
3495                                 break;
3496                         } else {
3497                                 msleep(25);
3498                                 if (poll_count > 40) {
3499                                         rtn = FAILED;
3500                                         break;
3501                                 }
3502                                 goto polling_hbaC_ccb_retry;
3503                         }
3504                 }
3505                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3506                 doneq_index++;
3507                 if (doneq_index >= acb->completionQ_entry)
3508                         doneq_index = 0;
3509                 acb->doneq_index = doneq_index;
3510                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3511                 pCCB = acb->pccb_pool[cmdSMID];
3512                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3513                 /* check if command done with no error*/
3514                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3515                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3516                                 pr_notice("arcmsr%d: scsi id = %d "
3517                                         "lun = %d ccb = '0x%p' poll command "
3518                                         "abort successfully\n"
3519                                         , acb->host->host_no
3520                                         , pCCB->pcmd->device->id
3521                                         , (u32)pCCB->pcmd->device->lun
3522                                         , pCCB);
3523                                 pCCB->pcmd->result = DID_ABORT << 16;
3524                                 arcmsr_ccb_complete(pCCB);
3525                                 continue;
3526                         }
3527                         pr_notice("arcmsr%d: polling an illegal "
3528                                 "ccb command done ccb = '0x%p' "
3529                                 "ccboutstandingcount = %d\n"
3530                                 , acb->host->host_no
3531                                 , pCCB
3532                                 , atomic_read(&acb->ccboutstandingcount));
3533                         continue;
3534                 }
3535                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3536                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3537                 arcmsr_report_ccb_state(acb, pCCB, error);
3538         }
3539         writel(doneq_index, &reg->reply_post_consumer_index);
3540         return rtn;
3541 }
3542
3543 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3544                                         struct CommandControlBlock *poll_ccb)
3545 {
3546         int rtn = 0;
3547         switch (acb->adapter_type) {
3548
3549         case ACB_ADAPTER_TYPE_A: {
3550                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3551                 }
3552                 break;
3553
3554         case ACB_ADAPTER_TYPE_B: {
3555                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3556                 }
3557                 break;
3558         case ACB_ADAPTER_TYPE_C: {
3559                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3560                 }
3561                 break;
3562         case ACB_ADAPTER_TYPE_D:
3563                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3564                 break;
3565         case ACB_ADAPTER_TYPE_E:
3566                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3567                 break;
3568         }
3569         return rtn;
3570 }
3571
3572 static void arcmsr_set_iop_datetime(struct timer_list *t)
3573 {
3574         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3575         unsigned int next_time;
3576         struct tm tm;
3577
3578         union {
3579                 struct  {
3580                 uint16_t        signature;
3581                 uint8_t         year;
3582                 uint8_t         month;
3583                 uint8_t         date;
3584                 uint8_t         hour;
3585                 uint8_t         minute;
3586                 uint8_t         second;
3587                 } a;
3588                 struct  {
3589                 uint32_t        msg_time[2];
3590                 } b;
3591         } datetime;
3592
3593         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3594
3595         datetime.a.signature = 0x55AA;
3596         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3597         datetime.a.month = tm.tm_mon;
3598         datetime.a.date = tm.tm_mday;
3599         datetime.a.hour = tm.tm_hour;
3600         datetime.a.minute = tm.tm_min;
3601         datetime.a.second = tm.tm_sec;
3602
3603         switch (pacb->adapter_type) {
3604                 case ACB_ADAPTER_TYPE_A: {
3605                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3606                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3607                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3608                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3609                         break;
3610                 }
3611                 case ACB_ADAPTER_TYPE_B: {
3612                         uint32_t __iomem *rwbuffer;
3613                         struct MessageUnit_B *reg = pacb->pmuB;
3614                         rwbuffer = reg->message_rwbuffer;
3615                         writel(datetime.b.msg_time[0], rwbuffer++);
3616                         writel(datetime.b.msg_time[1], rwbuffer++);
3617                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3618                         break;
3619                 }
3620                 case ACB_ADAPTER_TYPE_C: {
3621                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3622                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3623                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3624                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3625                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3626                         break;
3627                 }
3628                 case ACB_ADAPTER_TYPE_D: {
3629                         uint32_t __iomem *rwbuffer;
3630                         struct MessageUnit_D *reg = pacb->pmuD;
3631                         rwbuffer = reg->msgcode_rwbuffer;
3632                         writel(datetime.b.msg_time[0], rwbuffer++);
3633                         writel(datetime.b.msg_time[1], rwbuffer++);
3634                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3635                         break;
3636                 }
3637                 case ACB_ADAPTER_TYPE_E: {
3638                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3639                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3640                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3641                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3642                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3643                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3644                         break;
3645                 }
3646         }
3647         if (sys_tz.tz_minuteswest)
3648                 next_time = ARCMSR_HOURS;
3649         else
3650                 next_time = ARCMSR_MINUTES;
3651         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3652 }
3653
3654 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3655 {
3656         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3657         dma_addr_t dma_coherent_handle;
3658
3659         /*
3660         ********************************************************************
3661         ** here we need to tell iop 331 our freeccb.HighPart
3662         ** if freeccb.HighPart is not zero
3663         ********************************************************************
3664         */
3665         switch (acb->adapter_type) {
3666         case ACB_ADAPTER_TYPE_B:
3667         case ACB_ADAPTER_TYPE_D:
3668                 dma_coherent_handle = acb->dma_coherent_handle2;
3669                 break;
3670         case ACB_ADAPTER_TYPE_E:
3671                 dma_coherent_handle = acb->dma_coherent_handle +
3672                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3673                 break;
3674         default:
3675                 dma_coherent_handle = acb->dma_coherent_handle;
3676                 break;
3677         }
3678         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3679         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3680         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3681         /*
3682         ***********************************************************************
3683         **    if adapter type B, set window of "post command Q"
3684         ***********************************************************************
3685         */
3686         switch (acb->adapter_type) {
3687
3688         case ACB_ADAPTER_TYPE_A: {
3689                 if (cdb_phyaddr_hi32 != 0) {
3690                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3691                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3692                                                 &reg->message_rwbuffer[0]);
3693                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3694                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3695                                                         &reg->inbound_msgaddr0);
3696                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3697                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3698                                 part physical address timeout\n",
3699                                 acb->host->host_no);
3700                                 return 1;
3701                         }
3702                 }
3703                 }
3704                 break;
3705
3706         case ACB_ADAPTER_TYPE_B: {
3707                 uint32_t __iomem *rwbuffer;
3708
3709                 struct MessageUnit_B *reg = acb->pmuB;
3710                 reg->postq_index = 0;
3711                 reg->doneq_index = 0;
3712                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3713                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3714                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
3715                                 acb->host->host_no);
3716                         return 1;
3717                 }
3718                 rwbuffer = reg->message_rwbuffer;
3719                 /* driver "set config" signature */
3720                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3721                 /* normal should be zero */
3722                 writel(cdb_phyaddr_hi32, rwbuffer++);
3723                 /* postQ size (256 + 8)*4        */
3724                 writel(cdb_phyaddr, rwbuffer++);
3725                 /* doneQ size (256 + 8)*4        */
3726                 writel(cdb_phyaddr + 1056, rwbuffer++);
3727                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
3728                 writel(1056, rwbuffer);
3729
3730                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
3731                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3732                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3733                         timeout \n",acb->host->host_no);
3734                         return 1;
3735                 }
3736                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3737                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3738                         pr_err("arcmsr%d: can't set driver mode.\n",
3739                                 acb->host->host_no);
3740                         return 1;
3741                 }
3742                 }
3743                 break;
3744         case ACB_ADAPTER_TYPE_C: {
3745                 if (cdb_phyaddr_hi32 != 0) {
3746                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3747
3748                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
3749                                         acb->adapter_index, cdb_phyaddr_hi32);
3750                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3751                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
3752                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3753                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3754                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
3755                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3756                                 timeout \n", acb->host->host_no);
3757                                 return 1;
3758                         }
3759                 }
3760                 }
3761                 break;
3762         case ACB_ADAPTER_TYPE_D: {
3763                 uint32_t __iomem *rwbuffer;
3764                 struct MessageUnit_D *reg = acb->pmuD;
3765                 reg->postq_index = 0;
3766                 reg->doneq_index = 0;
3767                 rwbuffer = reg->msgcode_rwbuffer;
3768                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3769                 writel(cdb_phyaddr_hi32, rwbuffer++);
3770                 writel(cdb_phyaddr, rwbuffer++);
3771                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
3772                         sizeof(struct InBound_SRB)), rwbuffer++);
3773                 writel(0x100, rwbuffer);
3774                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
3775                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3776                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
3777                                 acb->host->host_no);
3778                         return 1;
3779                 }
3780                 }
3781                 break;
3782         case ACB_ADAPTER_TYPE_E: {
3783                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3784                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3785                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
3786                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
3787                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
3788                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
3789                 dma_coherent_handle = acb->dma_coherent_handle2;
3790                 cdb_phyaddr = (uint32_t)(dma_coherent_handle & 0xffffffff);
3791                 cdb_phyaddr_hi32 = (uint32_t)((dma_coherent_handle >> 16) >> 16);
3792                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[5]);
3793                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);
3794                 writel(acb->roundup_ccbsize, &reg->msgcode_rwbuffer[7]);
3795                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3796                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3797                 writel(acb->out_doorbell, &reg->iobound_doorbell);
3798                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
3799                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
3800                                 acb->host->host_no);
3801                         return 1;
3802                 }
3803                 }
3804                 break;
3805         }
3806         return 0;
3807 }
3808
3809 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
3810 {
3811         uint32_t firmware_state = 0;
3812         switch (acb->adapter_type) {
3813
3814         case ACB_ADAPTER_TYPE_A: {
3815                 struct MessageUnit_A __iomem *reg = acb->pmuA;
3816                 do {
3817                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3818                                 msleep(20);
3819                         firmware_state = readl(&reg->outbound_msgaddr1);
3820                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
3821                 }
3822                 break;
3823
3824         case ACB_ADAPTER_TYPE_B: {
3825                 struct MessageUnit_B *reg = acb->pmuB;
3826                 do {
3827                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3828                                 msleep(20);
3829                         firmware_state = readl(reg->iop2drv_doorbell);
3830                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
3831                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
3832                 }
3833                 break;
3834         case ACB_ADAPTER_TYPE_C: {
3835                 struct MessageUnit_C __iomem *reg = acb->pmuC;
3836                 do {
3837                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3838                                 msleep(20);
3839                         firmware_state = readl(&reg->outbound_msgaddr1);
3840                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
3841                 }
3842                 break;
3843         case ACB_ADAPTER_TYPE_D: {
3844                 struct MessageUnit_D *reg = acb->pmuD;
3845                 do {
3846                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3847                                 msleep(20);
3848                         firmware_state = readl(reg->outbound_msgaddr1);
3849                 } while ((firmware_state &
3850                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3851                 }
3852                 break;
3853         case ACB_ADAPTER_TYPE_E: {
3854                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3855                 do {
3856                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3857                                 msleep(20);
3858                         firmware_state = readl(&reg->outbound_msgaddr1);
3859                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
3860                 }
3861                 break;
3862         }
3863 }
3864
3865 static void arcmsr_request_device_map(struct timer_list *t)
3866 {
3867         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
3868         if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
3869                 (acb->acb_flags & ACB_F_BUS_RESET) ||
3870                 (acb->acb_flags & ACB_F_ABORT)) {
3871                 mod_timer(&acb->eternal_timer,
3872                         jiffies + msecs_to_jiffies(6 * HZ));
3873         } else {
3874                 acb->fw_flag = FW_NORMAL;
3875                 if (atomic_read(&acb->ante_token_value) ==
3876                         atomic_read(&acb->rq_map_token)) {
3877                         atomic_set(&acb->rq_map_token, 16);
3878                 }
3879                 atomic_set(&acb->ante_token_value,
3880                         atomic_read(&acb->rq_map_token));
3881                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3882                         mod_timer(&acb->eternal_timer, jiffies +
3883                                 msecs_to_jiffies(6 * HZ));
3884                         return;
3885                 }
3886                 switch (acb->adapter_type) {
3887                 case ACB_ADAPTER_TYPE_A: {
3888                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3889                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3890                         break;
3891                         }
3892                 case ACB_ADAPTER_TYPE_B: {
3893                         struct MessageUnit_B *reg = acb->pmuB;
3894                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3895                         break;
3896                         }
3897                 case ACB_ADAPTER_TYPE_C: {
3898                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3899                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3900                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3901                         break;
3902                         }
3903                 case ACB_ADAPTER_TYPE_D: {
3904                         struct MessageUnit_D *reg = acb->pmuD;
3905                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3906                         break;
3907                         }
3908                 case ACB_ADAPTER_TYPE_E: {
3909                         struct MessageUnit_E __iomem *reg = acb->pmuE;
3910                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3911                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3912                         writel(acb->out_doorbell, &reg->iobound_doorbell);
3913                         break;
3914                         }
3915                 default:
3916                         return;
3917                 }
3918                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
3919                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3920         }
3921 }
3922
3923 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
3924 {
3925         struct MessageUnit_A __iomem *reg = acb->pmuA;
3926         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3927         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
3928         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3929                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3930                                 rebulid' timeout \n", acb->host->host_no);
3931         }
3932 }
3933
3934 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
3935 {
3936         struct MessageUnit_B *reg = acb->pmuB;
3937         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3938         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
3939         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3940                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3941                                 rebulid' timeout \n",acb->host->host_no);
3942         }
3943 }
3944
3945 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
3946 {
3947         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
3948         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3949         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
3950         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
3951         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3952                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3953                                 rebulid' timeout \n", pACB->host->host_no);
3954         }
3955         return;
3956 }
3957
3958 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
3959 {
3960         struct MessageUnit_D *pmu = pACB->pmuD;
3961
3962         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3963         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
3964         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
3965                 pr_notice("arcmsr%d: wait 'start adapter "
3966                         "background rebulid' timeout\n", pACB->host->host_no);
3967         }
3968 }
3969
3970 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
3971 {
3972         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
3973
3974         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3975         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
3976         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3977         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
3978         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3979                 pr_notice("arcmsr%d: wait 'start adapter "
3980                         "background rebulid' timeout \n", pACB->host->host_no);
3981         }
3982 }
3983
3984 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
3985 {
3986         switch (acb->adapter_type) {
3987         case ACB_ADAPTER_TYPE_A:
3988                 arcmsr_hbaA_start_bgrb(acb);
3989                 break;
3990         case ACB_ADAPTER_TYPE_B:
3991                 arcmsr_hbaB_start_bgrb(acb);
3992                 break;
3993         case ACB_ADAPTER_TYPE_C:
3994                 arcmsr_hbaC_start_bgrb(acb);
3995                 break;
3996         case ACB_ADAPTER_TYPE_D:
3997                 arcmsr_hbaD_start_bgrb(acb);
3998                 break;
3999         case ACB_ADAPTER_TYPE_E:
4000                 arcmsr_hbaE_start_bgrb(acb);
4001                 break;
4002         }
4003 }
4004
4005 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4006 {
4007         switch (acb->adapter_type) {
4008         case ACB_ADAPTER_TYPE_A: {
4009                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4010                 uint32_t outbound_doorbell;
4011                 /* empty doorbell Qbuffer if door bell ringed */
4012                 outbound_doorbell = readl(&reg->outbound_doorbell);
4013                 /*clear doorbell interrupt */
4014                 writel(outbound_doorbell, &reg->outbound_doorbell);
4015                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4016                 }
4017                 break;
4018
4019         case ACB_ADAPTER_TYPE_B: {
4020                 struct MessageUnit_B *reg = acb->pmuB;
4021                 uint32_t outbound_doorbell, i;
4022                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4023                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4024                 /* let IOP know data has been read */
4025                 for(i=0; i < 200; i++) {
4026                         msleep(20);
4027                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4028                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4029                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4030                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4031                         } else
4032                                 break;
4033                 }
4034                 }
4035                 break;
4036         case ACB_ADAPTER_TYPE_C: {
4037                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4038                 uint32_t outbound_doorbell, i;
4039                 /* empty doorbell Qbuffer if door bell ringed */
4040                 outbound_doorbell = readl(&reg->outbound_doorbell);
4041                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4042                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4043                 for (i = 0; i < 200; i++) {
4044                         msleep(20);
4045                         outbound_doorbell = readl(&reg->outbound_doorbell);
4046                         if (outbound_doorbell &
4047                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4048                                 writel(outbound_doorbell,
4049                                         &reg->outbound_doorbell_clear);
4050                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4051                                         &reg->inbound_doorbell);
4052                         } else
4053                                 break;
4054                 }
4055                 }
4056                 break;
4057         case ACB_ADAPTER_TYPE_D: {
4058                 struct MessageUnit_D *reg = acb->pmuD;
4059                 uint32_t outbound_doorbell, i;
4060                 /* empty doorbell Qbuffer if door bell ringed */
4061                 outbound_doorbell = readl(reg->outbound_doorbell);
4062                 writel(outbound_doorbell, reg->outbound_doorbell);
4063                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4064                         reg->inbound_doorbell);
4065                 for (i = 0; i < 200; i++) {
4066                         msleep(20);
4067                         outbound_doorbell = readl(reg->outbound_doorbell);
4068                         if (outbound_doorbell &
4069                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4070                                 writel(outbound_doorbell,
4071                                         reg->outbound_doorbell);
4072                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4073                                         reg->inbound_doorbell);
4074                         } else
4075                                 break;
4076                 }
4077                 }
4078                 break;
4079         case ACB_ADAPTER_TYPE_E: {
4080                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4081                 uint32_t i, tmp;
4082
4083                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4084                 writel(0, &reg->host_int_status); /*clear interrupt*/
4085                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4086                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4087                 for(i=0; i < 200; i++) {
4088                         msleep(20);
4089                         tmp = acb->in_doorbell;
4090                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4091                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4092                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4093                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4094                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4095                         } else
4096                                 break;
4097                 }
4098                 }
4099                 break;
4100         }
4101 }
4102
4103 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4104 {
4105         switch (acb->adapter_type) {
4106         case ACB_ADAPTER_TYPE_A:
4107                 return;
4108         case ACB_ADAPTER_TYPE_B:
4109                 {
4110                         struct MessageUnit_B *reg = acb->pmuB;
4111                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4112                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4113                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4114                                 return;
4115                         }
4116                 }
4117                 break;
4118         case ACB_ADAPTER_TYPE_C:
4119                 return;
4120         }
4121         return;
4122 }
4123
4124 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4125 {
4126         uint8_t value[64];
4127         int i, count = 0;
4128         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4129         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4130         struct MessageUnit_D *pmuD = acb->pmuD;
4131
4132         /* backup pci config data */
4133         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4134         for (i = 0; i < 64; i++) {
4135                 pci_read_config_byte(acb->pdev, i, &value[i]);
4136         }
4137         /* hardware reset signal */
4138         if (acb->dev_id == 0x1680) {
4139                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4140         } else if (acb->dev_id == 0x1880) {
4141                 do {
4142                         count++;
4143                         writel(0xF, &pmuC->write_sequence);
4144                         writel(0x4, &pmuC->write_sequence);
4145                         writel(0xB, &pmuC->write_sequence);
4146                         writel(0x2, &pmuC->write_sequence);
4147                         writel(0x7, &pmuC->write_sequence);
4148                         writel(0xD, &pmuC->write_sequence);
4149                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4150                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4151         } else if (acb->dev_id == 0x1884) {
4152                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4153                 do {
4154                         count++;
4155                         writel(0x4, &pmuE->write_sequence_3xxx);
4156                         writel(0xB, &pmuE->write_sequence_3xxx);
4157                         writel(0x2, &pmuE->write_sequence_3xxx);
4158                         writel(0x7, &pmuE->write_sequence_3xxx);
4159                         writel(0xD, &pmuE->write_sequence_3xxx);
4160                         mdelay(10);
4161                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4162                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4163                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4164         } else if (acb->dev_id == 0x1214) {
4165                 writel(0x20, pmuD->reset_request);
4166         } else {
4167                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4168         }
4169         msleep(2000);
4170         /* write back pci config data */
4171         for (i = 0; i < 64; i++) {
4172                 pci_write_config_byte(acb->pdev, i, value[i]);
4173         }
4174         msleep(1000);
4175         return;
4176 }
4177
4178 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4179 {
4180         bool rtn = true;
4181
4182         switch(acb->adapter_type) {
4183         case ACB_ADAPTER_TYPE_A:{
4184                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4185                 rtn = ((readl(&reg->outbound_msgaddr1) &
4186                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4187                 }
4188                 break;
4189         case ACB_ADAPTER_TYPE_B:{
4190                 struct MessageUnit_B *reg = acb->pmuB;
4191                 rtn = ((readl(reg->iop2drv_doorbell) &
4192                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4193                 }
4194                 break;
4195         case ACB_ADAPTER_TYPE_C:{
4196                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4197                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4198                 }
4199                 break;
4200         case ACB_ADAPTER_TYPE_D:{
4201                 struct MessageUnit_D *reg = acb->pmuD;
4202                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4203                         true : false;
4204                 }
4205                 break;
4206         case ACB_ADAPTER_TYPE_E:{
4207                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4208                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4209                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4210                 }
4211                 break;
4212         }
4213         return rtn;
4214 }
4215
4216 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4217 {
4218         uint32_t intmask_org;
4219         /* disable all outbound interrupt */
4220         intmask_org = arcmsr_disable_outbound_ints(acb);
4221         arcmsr_wait_firmware_ready(acb);
4222         arcmsr_iop_confirm(acb);
4223         /*start background rebuild*/
4224         arcmsr_start_adapter_bgrb(acb);
4225         /* empty doorbell Qbuffer if door bell ringed */
4226         arcmsr_clear_doorbell_queue_buffer(acb);
4227         arcmsr_enable_eoi_mode(acb);
4228         /* enable outbound Post Queue,outbound doorbell Interrupt */
4229         arcmsr_enable_outbound_ints(acb, intmask_org);
4230         acb->acb_flags |= ACB_F_IOP_INITED;
4231 }
4232
4233 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4234 {
4235         struct CommandControlBlock *ccb;
4236         uint32_t intmask_org;
4237         uint8_t rtnval = 0x00;
4238         int i = 0;
4239         unsigned long flags;
4240
4241         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4242                 /* disable all outbound interrupt */
4243                 intmask_org = arcmsr_disable_outbound_ints(acb);
4244                 /* talk to iop 331 outstanding command aborted */
4245                 rtnval = arcmsr_abort_allcmd(acb);
4246                 /* clear all outbound posted Q */
4247                 arcmsr_done4abort_postqueue(acb);
4248                 for (i = 0; i < acb->maxFreeCCB; i++) {
4249                         ccb = acb->pccb_pool[i];
4250                         if (ccb->startdone == ARCMSR_CCB_START) {
4251                                 scsi_dma_unmap(ccb->pcmd);
4252                                 ccb->startdone = ARCMSR_CCB_DONE;
4253                                 ccb->ccb_flags = 0;
4254                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4255                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4256                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4257                         }
4258                 }
4259                 atomic_set(&acb->ccboutstandingcount, 0);
4260                 /* enable all outbound interrupt */
4261                 arcmsr_enable_outbound_ints(acb, intmask_org);
4262                 return rtnval;
4263         }
4264         return rtnval;
4265 }
4266
4267 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4268 {
4269         struct AdapterControlBlock *acb;
4270         int retry_count = 0;
4271         int rtn = FAILED;
4272         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4273         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4274                 return SUCCESS;
4275         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4276                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4277         acb->num_resets++;
4278
4279         if (acb->acb_flags & ACB_F_BUS_RESET) {
4280                 long timeout;
4281                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4282                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4283                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4284                 if (timeout)
4285                         return SUCCESS;
4286         }
4287         acb->acb_flags |= ACB_F_BUS_RESET;
4288         if (!arcmsr_iop_reset(acb)) {
4289                 arcmsr_hardware_reset(acb);
4290                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4291 wait_reset_done:
4292                 ssleep(ARCMSR_SLEEPTIME);
4293                 if (arcmsr_reset_in_progress(acb)) {
4294                         if (retry_count > ARCMSR_RETRYCOUNT) {
4295                                 acb->fw_flag = FW_DEADLOCK;
4296                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4297                                         " return, RETRY TERMINATED!!\n",
4298                                         acb->host->host_no);
4299                                 return FAILED;
4300                         }
4301                         retry_count++;
4302                         goto wait_reset_done;
4303                 }
4304                 arcmsr_iop_init(acb);
4305                 atomic_set(&acb->rq_map_token, 16);
4306                 atomic_set(&acb->ante_token_value, 16);
4307                 acb->fw_flag = FW_NORMAL;
4308                 mod_timer(&acb->eternal_timer, jiffies +
4309                         msecs_to_jiffies(6 * HZ));
4310                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4311                 rtn = SUCCESS;
4312                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4313         } else {
4314                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4315                 atomic_set(&acb->rq_map_token, 16);
4316                 atomic_set(&acb->ante_token_value, 16);
4317                 acb->fw_flag = FW_NORMAL;
4318                 mod_timer(&acb->eternal_timer, jiffies +
4319                         msecs_to_jiffies(6 * HZ));
4320                 rtn = SUCCESS;
4321         }
4322         return rtn;
4323 }
4324
4325 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4326                 struct CommandControlBlock *ccb)
4327 {
4328         int rtn;
4329         rtn = arcmsr_polling_ccbdone(acb, ccb);
4330         return rtn;
4331 }
4332
4333 static int arcmsr_abort(struct scsi_cmnd *cmd)
4334 {
4335         struct AdapterControlBlock *acb =
4336                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4337         int i = 0;
4338         int rtn = FAILED;
4339         uint32_t intmask_org;
4340
4341         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4342                 return SUCCESS;
4343         printk(KERN_NOTICE
4344                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4345                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4346         acb->acb_flags |= ACB_F_ABORT;
4347         acb->num_aborts++;
4348         /*
4349         ************************************************
4350         ** the all interrupt service routine is locked
4351         ** we need to handle it as soon as possible and exit
4352         ************************************************
4353         */
4354         if (!atomic_read(&acb->ccboutstandingcount)) {
4355                 acb->acb_flags &= ~ACB_F_ABORT;
4356                 return rtn;
4357         }
4358
4359         intmask_org = arcmsr_disable_outbound_ints(acb);
4360         for (i = 0; i < acb->maxFreeCCB; i++) {
4361                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4362                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4363                         ccb->startdone = ARCMSR_CCB_ABORTED;
4364                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4365                         break;
4366                 }
4367         }
4368         acb->acb_flags &= ~ACB_F_ABORT;
4369         arcmsr_enable_outbound_ints(acb, intmask_org);
4370         return rtn;
4371 }
4372
4373 static const char *arcmsr_info(struct Scsi_Host *host)
4374 {
4375         struct AdapterControlBlock *acb =
4376                 (struct AdapterControlBlock *) host->hostdata;
4377         static char buf[256];
4378         char *type;
4379         int raid6 = 1;
4380         switch (acb->pdev->device) {
4381         case PCI_DEVICE_ID_ARECA_1110:
4382         case PCI_DEVICE_ID_ARECA_1200:
4383         case PCI_DEVICE_ID_ARECA_1202:
4384         case PCI_DEVICE_ID_ARECA_1210:
4385                 raid6 = 0;
4386                 /*FALLTHRU*/
4387         case PCI_DEVICE_ID_ARECA_1120:
4388         case PCI_DEVICE_ID_ARECA_1130:
4389         case PCI_DEVICE_ID_ARECA_1160:
4390         case PCI_DEVICE_ID_ARECA_1170:
4391         case PCI_DEVICE_ID_ARECA_1201:
4392         case PCI_DEVICE_ID_ARECA_1203:
4393         case PCI_DEVICE_ID_ARECA_1220:
4394         case PCI_DEVICE_ID_ARECA_1230:
4395         case PCI_DEVICE_ID_ARECA_1260:
4396         case PCI_DEVICE_ID_ARECA_1270:
4397         case PCI_DEVICE_ID_ARECA_1280:
4398                 type = "SATA";
4399                 break;
4400         case PCI_DEVICE_ID_ARECA_1214:
4401         case PCI_DEVICE_ID_ARECA_1380:
4402         case PCI_DEVICE_ID_ARECA_1381:
4403         case PCI_DEVICE_ID_ARECA_1680:
4404         case PCI_DEVICE_ID_ARECA_1681:
4405         case PCI_DEVICE_ID_ARECA_1880:
4406         case PCI_DEVICE_ID_ARECA_1884:
4407                 type = "SAS/SATA";
4408                 break;
4409         default:
4410                 type = "unknown";
4411                 raid6 = 0;
4412                 break;
4413         }
4414         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4415                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4416         return buf;
4417 }