drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.rst
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/aer.h>
  61 #include <linux/circ_buf.h>
  62 #include <asm/dma.h>
  63 #include <asm/io.h>
  64 #include <linux/uaccess.h>
  65 #include <scsi/scsi_host.h>
  66 #include <scsi/scsi.h>
  67 #include <scsi/scsi_cmnd.h>
  68 #include <scsi/scsi_tcq.h>
  69 #include <scsi/scsi_device.h>
  70 #include <scsi/scsi_transport.h>
  71 #include <scsi/scsicam.h>
  72 #include "arcmsr.h"
  73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  75 MODULE_LICENSE("Dual BSD/GPL");
  76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  77
  78 static int msix_enable = 1;
  79 module_param(msix_enable, int, S_IRUGO);
  80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  81
  82 static int msi_enable = 1;
  83 module_param(msi_enable, int, S_IRUGO);
  84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  85
  86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  87 module_param(host_can_queue, int, S_IRUGO);
  88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  89
  90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  91 module_param(cmd_per_lun, int, S_IRUGO);
  92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  93
  94 static int dma_mask_64 = 0;
  95 module_param(dma_mask_64, int, S_IRUGO);
  96 MODULE_PARM_DESC(dma_mask_64, " set DMA mask to 64 bits(0 ~ 1), dma_mask_64=1(64 bits), =0(32 bits)");
  97
  98 static int set_date_time = 0;
  99 module_param(set_date_time, int, S_IRUGO);
 100 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
 101
 102 #define ARCMSR_SLEEPTIME        10
 103 #define ARCMSR_RETRYCOUNT       12
 104
 105 static wait_queue_head_t wait_q;
 106 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 107                                         struct scsi_cmnd *cmd);
 108 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 109 static int arcmsr_abort(struct scsi_cmnd *);
 110 static int arcmsr_bus_reset(struct scsi_cmnd *);
 111 static int arcmsr_bios_param(struct scsi_device *sdev,
 112                 struct block_device *bdev, sector_t capacity, int *info);
 113 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 114 static int arcmsr_probe(struct pci_dev *pdev,
 115                                 const struct pci_device_id *id);
 116 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
 117 static int arcmsr_resume(struct pci_dev *pdev);
 118 static void arcmsr_remove(struct pci_dev *pdev);
 119 static void arcmsr_shutdown(struct pci_dev *pdev);
 120 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 121 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 122 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 123 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 124         u32 intmask_org);
 125 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 126 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 127 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 128 static void arcmsr_request_device_map(struct timer_list *t);
 129 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 130 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 131 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 132 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 133 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 134 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 135 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 136 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
 137 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 138 static const char *arcmsr_info(struct Scsi_Host *);
 139 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 140 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 141 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 142 static void arcmsr_set_iop_datetime(struct timer_list *);
 143 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 144 {
 145         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 146                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 147         return scsi_change_queue_depth(sdev, queue_depth);
 148 }
 149
 150 static struct scsi_host_template arcmsr_scsi_host_template = {
 151         .module                 = THIS_MODULE,
 152         .name                   = "Areca SAS/SATA RAID driver",
 153         .info                   = arcmsr_info,
 154         .queuecommand           = arcmsr_queue_command,
 155         .eh_abort_handler       = arcmsr_abort,
 156         .eh_bus_reset_handler   = arcmsr_bus_reset,
 157         .bios_param             = arcmsr_bios_param,
 158         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 159         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 160         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 161         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 162         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 163         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 164         .shost_attrs            = arcmsr_host_attrs,
 165         .no_write_same          = 1,
 166 };
 167
 168 static struct pci_device_id arcmsr_device_id_table[] = {
 169         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 170                 .driver_data = ACB_ADAPTER_TYPE_A},
 171         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 172                 .driver_data = ACB_ADAPTER_TYPE_A},
 173         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 174                 .driver_data = ACB_ADAPTER_TYPE_A},
 175         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 176                 .driver_data = ACB_ADAPTER_TYPE_A},
 177         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 178                 .driver_data = ACB_ADAPTER_TYPE_A},
 179         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 180                 .driver_data = ACB_ADAPTER_TYPE_B},
 181         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 182                 .driver_data = ACB_ADAPTER_TYPE_B},
 183         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 184                 .driver_data = ACB_ADAPTER_TYPE_B},
 185         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 186                 .driver_data = ACB_ADAPTER_TYPE_B},
 187         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 188                 .driver_data = ACB_ADAPTER_TYPE_A},
 189         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 190                 .driver_data = ACB_ADAPTER_TYPE_D},
 191         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 192                 .driver_data = ACB_ADAPTER_TYPE_A},
 193         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 194                 .driver_data = ACB_ADAPTER_TYPE_A},
 195         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 196                 .driver_data = ACB_ADAPTER_TYPE_A},
 197         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 198                 .driver_data = ACB_ADAPTER_TYPE_A},
 199         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 200                 .driver_data = ACB_ADAPTER_TYPE_A},
 201         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 202                 .driver_data = ACB_ADAPTER_TYPE_A},
 203         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 204                 .driver_data = ACB_ADAPTER_TYPE_A},
 205         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 206                 .driver_data = ACB_ADAPTER_TYPE_A},
 207         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 208                 .driver_data = ACB_ADAPTER_TYPE_A},
 209         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 210                 .driver_data = ACB_ADAPTER_TYPE_C},
 211         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 212                 .driver_data = ACB_ADAPTER_TYPE_E},
 213         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
 214                 .driver_data = ACB_ADAPTER_TYPE_F},
 215         {0, 0}, /* Terminating entry */
 216 };
 217 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 218
 219 static struct pci_driver arcmsr_pci_driver = {
 220         .name                   = "arcmsr",
 221         .id_table               = arcmsr_device_id_table,
 222         .probe                  = arcmsr_probe,
 223         .remove                 = arcmsr_remove,
 224         .suspend                = arcmsr_suspend,
 225         .resume                 = arcmsr_resume,
 226         .shutdown               = arcmsr_shutdown,
 227 };
 228 /*
 229 ****************************************************************************
 230 ****************************************************************************
 231 */
 232
 233 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
 234 {
 235         switch (acb->adapter_type) {
 236         case ACB_ADAPTER_TYPE_B:
 237         case ACB_ADAPTER_TYPE_D:
 238         case ACB_ADAPTER_TYPE_E:
 239         case ACB_ADAPTER_TYPE_F:
 240                 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
 241                         acb->dma_coherent2, acb->dma_coherent_handle2);
 242                 break;
 243         }
 244 }
 245
 246 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 247 {
 248         struct pci_dev *pdev = acb->pdev;
 249         switch (acb->adapter_type){
 250         case ACB_ADAPTER_TYPE_A:{
 251                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 252                 if (!acb->pmuA) {
 253                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 254                         return false;
 255                 }
 256                 break;
 257         }
 258         case ACB_ADAPTER_TYPE_B:{
 259                 void __iomem *mem_base0, *mem_base1;
 260                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 261                 if (!mem_base0) {
 262                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 263                         return false;
 264                 }
 265                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 266                 if (!mem_base1) {
 267                         iounmap(mem_base0);
 268                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 269                         return false;
 270                 }
 271                 acb->mem_base0 = mem_base0;
 272                 acb->mem_base1 = mem_base1;
 273                 break;
 274         }
 275         case ACB_ADAPTER_TYPE_C:{
 276                 acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 277                 if (!acb->pmuC) {
 278                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 279                         return false;
 280                 }
 281                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 282                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 283                         return true;
 284                 }
 285                 break;
 286         }
 287         case ACB_ADAPTER_TYPE_D: {
 288                 void __iomem *mem_base0;
 289                 unsigned long addr, range;
 290
 291                 addr = (unsigned long)pci_resource_start(pdev, 0);
 292                 range = pci_resource_len(pdev, 0);
 293                 mem_base0 = ioremap(addr, range);
 294                 if (!mem_base0) {
 295                         pr_notice("arcmsr%d: memory mapping region fail\n",
 296                                 acb->host->host_no);
 297                         return false;
 298                 }
 299                 acb->mem_base0 = mem_base0;
 300                 break;
 301                 }
 302         case ACB_ADAPTER_TYPE_E: {
 303                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 304                         pci_resource_len(pdev, 1));
 305                 if (!acb->pmuE) {
 306                         pr_notice("arcmsr%d: memory mapping region fail \n",
 307                                 acb->host->host_no);
 308                         return false;
 309                 }
 310                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 311                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 312                 acb->in_doorbell = 0;
 313                 acb->out_doorbell = 0;
 314                 break;
 315                 }
 316         case ACB_ADAPTER_TYPE_F: {
 317                 acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 318                 if (!acb->pmuF) {
 319                         pr_notice("arcmsr%d: memory mapping region fail\n",
 320                                 acb->host->host_no);
 321                         return false;
 322                 }
 323                 writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
 324                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
 325                 acb->in_doorbell = 0;
 326                 acb->out_doorbell = 0;
 327                 break;
 328                 }
 329         }
 330         return true;
 331 }
 332
 333 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 334 {
 335         switch (acb->adapter_type) {
 336         case ACB_ADAPTER_TYPE_A:
 337                 iounmap(acb->pmuA);
 338                 break;
 339         case ACB_ADAPTER_TYPE_B:
 340                 iounmap(acb->mem_base0);
 341                 iounmap(acb->mem_base1);
 342                 break;
 343         case ACB_ADAPTER_TYPE_C:
 344                 iounmap(acb->pmuC);
 345                 break;
 346         case ACB_ADAPTER_TYPE_D:
 347                 iounmap(acb->mem_base0);
 348                 break;
 349         case ACB_ADAPTER_TYPE_E:
 350                 iounmap(acb->pmuE);
 351                 break;
 352         case ACB_ADAPTER_TYPE_F:
 353                 iounmap(acb->pmuF);
 354                 break;
 355         }
 356 }
 357
 358 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 359 {
 360         irqreturn_t handle_state;
 361         struct AdapterControlBlock *acb = dev_id;
 362
 363         handle_state = arcmsr_interrupt(acb);
 364         return handle_state;
 365 }
 366
 367 static int arcmsr_bios_param(struct scsi_device *sdev,
 368                 struct block_device *bdev, sector_t capacity, int *geom)
 369 {
 370         int heads, sectors, cylinders, total_capacity;
 371
 372         if (scsi_partsize(bdev, capacity, geom))
 373                 return 0;
 374
 375         total_capacity = capacity;
 376         heads = 64;
 377         sectors = 32;
 378         cylinders = total_capacity / (heads * sectors);
 379         if (cylinders > 1024) {
 380                 heads = 255;
 381                 sectors = 63;
 382                 cylinders = total_capacity / (heads * sectors);
 383         }
 384         geom[0] = heads;
 385         geom[1] = sectors;
 386         geom[2] = cylinders;
 387         return 0;
 388 }
 389
 390 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 391 {
 392         struct MessageUnit_A __iomem *reg = acb->pmuA;
 393         int i;
 394
 395         for (i = 0; i < 2000; i++) {
 396                 if (readl(&reg->outbound_intstatus) &
 397                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 398                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 399                                 &reg->outbound_intstatus);
 400                         return true;
 401                 }
 402                 msleep(10);
 403         } /* max 20 seconds */
 404
 405         return false;
 406 }
 407
 408 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 409 {
 410         struct MessageUnit_B *reg = acb->pmuB;
 411         int i;
 412
 413         for (i = 0; i < 2000; i++) {
 414                 if (readl(reg->iop2drv_doorbell)
 415                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 416                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 417                                         reg->iop2drv_doorbell);
 418                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 419                                         reg->drv2iop_doorbell);
 420                         return true;
 421                 }
 422                 msleep(10);
 423         } /* max 20 seconds */
 424
 425         return false;
 426 }
 427
 428 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 429 {
 430         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 431         int i;
 432
 433         for (i = 0; i < 2000; i++) {
 434                 if (readl(&phbcmu->outbound_doorbell)
 435                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 436                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 437                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 438                         return true;
 439                 }
 440                 msleep(10);
 441         } /* max 20 seconds */
 442
 443         return false;
 444 }
 445
 446 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 447 {
 448         struct MessageUnit_D *reg = pACB->pmuD;
 449         int i;
 450
 451         for (i = 0; i < 2000; i++) {
 452                 if (readl(reg->outbound_doorbell)
 453                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 454                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 455                                 reg->outbound_doorbell);
 456                         return true;
 457                 }
 458                 msleep(10);
 459         } /* max 20 seconds */
 460         return false;
 461 }
 462
 463 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 464 {
 465         int i;
 466         uint32_t read_doorbell;
 467         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 468
 469         for (i = 0; i < 2000; i++) {
 470                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 471                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 472                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 473                         pACB->in_doorbell = read_doorbell;
 474                         return true;
 475                 }
 476                 msleep(10);
 477         } /* max 20 seconds */
 478         return false;
 479 }
 480
 481 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 482 {
 483         struct MessageUnit_A __iomem *reg = acb->pmuA;
 484         int retry_count = 30;
 485         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 486         do {
 487                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 488                         break;
 489                 else {
 490                         retry_count--;
 491                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 492                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 493                 }
 494         } while (retry_count != 0);
 495 }
 496
 497 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 498 {
 499         struct MessageUnit_B *reg = acb->pmuB;
 500         int retry_count = 30;
 501         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 502         do {
 503                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 504                         break;
 505                 else {
 506                         retry_count--;
 507                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 508                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 509                 }
 510         } while (retry_count != 0);
 511 }
 512
 513 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 514 {
 515         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 516         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 517         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 518         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 519         do {
 520                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 521                         break;
 522                 } else {
 523                         retry_count--;
 524                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 525                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 526                 }
 527         } while (retry_count != 0);
 528         return;
 529 }
 530
 531 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 532 {
 533         int retry_count = 15;
 534         struct MessageUnit_D *reg = pACB->pmuD;
 535
 536         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 537         do {
 538                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 539                         break;
 540
 541                 retry_count--;
 542                 pr_notice("arcmsr%d: wait 'flush adapter "
 543                         "cache' timeout, retry count down = %d\n",
 544                         pACB->host->host_no, retry_count);
 545         } while (retry_count != 0);
 546 }
 547
 548 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 549 {
 550         int retry_count = 30;
 551         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 552
 553         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 554         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 555         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 556         do {
 557                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 558                         break;
 559                 retry_count--;
 560                 pr_notice("arcmsr%d: wait 'flush adapter "
 561                         "cache' timeout, retry count down = %d\n",
 562                         pACB->host->host_no, retry_count);
 563         } while (retry_count != 0);
 564 }
 565
 566 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 567 {
 568         switch (acb->adapter_type) {
 569
 570         case ACB_ADAPTER_TYPE_A:
 571                 arcmsr_hbaA_flush_cache(acb);
 572                 break;
 573         case ACB_ADAPTER_TYPE_B:
 574                 arcmsr_hbaB_flush_cache(acb);
 575                 break;
 576         case ACB_ADAPTER_TYPE_C:
 577                 arcmsr_hbaC_flush_cache(acb);
 578                 break;
 579         case ACB_ADAPTER_TYPE_D:
 580                 arcmsr_hbaD_flush_cache(acb);
 581                 break;
 582         case ACB_ADAPTER_TYPE_E:
 583         case ACB_ADAPTER_TYPE_F:
 584                 arcmsr_hbaE_flush_cache(acb);
 585                 break;
 586         }
 587 }
 588
 589 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
 590 {
 591         struct MessageUnit_B *reg = acb->pmuB;
 592
 593         if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 594                 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 595                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 596                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 597                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 598         } else {
 599                 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 600                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 601                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 602                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 603         }
 604         reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 605         reg->message_rbuffer =  MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 606         reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 607 }
 608
 609 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
 610 {
 611         struct MessageUnit_D *reg = acb->pmuD;
 612
 613         reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 614         reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 615         reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 616         reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 617         reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 618         reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 619         reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 620         reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 621         reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 622         reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 623         reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 624         reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 625         reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 626         reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 627         reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 628         reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 629         reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 630         reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 631         reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 632         reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 633         reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 634         reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 635         reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 636         reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 637         reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 638         reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 639 }
 640
 641 static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
 642 {
 643         dma_addr_t host_buffer_dma;
 644         struct MessageUnit_F __iomem *pmuF;
 645
 646         memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
 647         acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
 648                 acb->completeQ_size, 4);
 649         acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
 650         acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
 651         memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
 652         host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
 653         pmuF = acb->pmuF;
 654         /* host buffer low address, bit0:1 all buffer active */
 655         writel(lower_32_bits(host_buffer_dma | 1), &pmuF->inbound_msgaddr0);
 656         /* host buffer high address */
 657         writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
 658         /* set host buffer physical address */
 659         writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
 660 }
 661
 662 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 663 {
 664         bool rtn = true;
 665         void *dma_coherent;
 666         dma_addr_t dma_coherent_handle;
 667         struct pci_dev *pdev = acb->pdev;
 668
 669         switch (acb->adapter_type) {
 670         case ACB_ADAPTER_TYPE_B: {
 671                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
 672                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 673                         &dma_coherent_handle, GFP_KERNEL);
 674                 if (!dma_coherent) {
 675                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 676                         return false;
 677                 }
 678                 acb->dma_coherent_handle2 = dma_coherent_handle;
 679                 acb->dma_coherent2 = dma_coherent;
 680                 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
 681                 arcmsr_hbaB_assign_regAddr(acb);
 682                 }
 683                 break;
 684         case ACB_ADAPTER_TYPE_D: {
 685                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
 686                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 687                         &dma_coherent_handle, GFP_KERNEL);
 688                 if (!dma_coherent) {
 689                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 690                         return false;
 691                 }
 692                 acb->dma_coherent_handle2 = dma_coherent_handle;
 693                 acb->dma_coherent2 = dma_coherent;
 694                 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
 695                 arcmsr_hbaD_assign_regAddr(acb);
 696                 }
 697                 break;
 698         case ACB_ADAPTER_TYPE_E: {
 699                 uint32_t completeQ_size;
 700                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 701                 acb->ioqueue_size = roundup(completeQ_size, 32);
 702                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 703                         &dma_coherent_handle, GFP_KERNEL);
 704                 if (!dma_coherent){
 705                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 706                         return false;
 707                 }
 708                 acb->dma_coherent_handle2 = dma_coherent_handle;
 709                 acb->dma_coherent2 = dma_coherent;
 710                 acb->pCompletionQ = dma_coherent;
 711                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 712                 acb->doneq_index = 0;
 713                 }
 714                 break;
 715         case ACB_ADAPTER_TYPE_F: {
 716                 uint32_t QueueDepth;
 717                 uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
 718
 719                 arcmsr_wait_firmware_ready(acb);
 720                 QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
 721                 acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
 722                 acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
 723                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 724                         &dma_coherent_handle, GFP_KERNEL);
 725                 if (!dma_coherent) {
 726                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 727                         return false;
 728                 }
 729                 acb->dma_coherent_handle2 = dma_coherent_handle;
 730                 acb->dma_coherent2 = dma_coherent;
 731                 acb->pCompletionQ = dma_coherent;
 732                 acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
 733                 acb->doneq_index = 0;
 734                 arcmsr_hbaF_assign_regAddr(acb);
 735                 }
 736                 break;
 737         default:
 738                 break;
 739         }
 740         return rtn;
 741 }
 742
 743 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 744 {
 745         struct pci_dev *pdev = acb->pdev;
 746         void *dma_coherent;
 747         dma_addr_t dma_coherent_handle;
 748         struct CommandControlBlock *ccb_tmp;
 749         int i = 0, j = 0;
 750         unsigned long cdb_phyaddr, next_ccb_phy;
 751         unsigned long roundup_ccbsize;
 752         unsigned long max_xfer_len;
 753         unsigned long max_sg_entrys;
 754         uint32_t  firm_config_version, curr_phy_upper32;
 755
 756         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 757                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 758                         acb->devstate[i][j] = ARECA_RAID_GONE;
 759
 760         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 761         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 762         firm_config_version = acb->firm_cfg_version;
 763         if((firm_config_version & 0xFF) >= 3){
 764                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 765                 max_sg_entrys = (max_xfer_len/4096);
 766         }
 767         acb->host->max_sectors = max_xfer_len/512;
 768         acb->host->sg_tablesize = max_sg_entrys;
 769         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 770         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 771         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
 772                 acb->uncache_size += acb->ioqueue_size;
 773         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 774         if(!dma_coherent){
 775                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 776                 return -ENOMEM;
 777         }
 778         acb->dma_coherent = dma_coherent;
 779         acb->dma_coherent_handle = dma_coherent_handle;
 780         memset(dma_coherent, 0, acb->uncache_size);
 781         acb->ccbsize = roundup_ccbsize;
 782         ccb_tmp = dma_coherent;
 783         curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
 784         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 785         for(i = 0; i < acb->maxFreeCCB; i++){
 786                 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 787                 switch (acb->adapter_type) {
 788                 case ACB_ADAPTER_TYPE_A:
 789                 case ACB_ADAPTER_TYPE_B:
 790                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 791                         break;
 792                 case ACB_ADAPTER_TYPE_C:
 793                 case ACB_ADAPTER_TYPE_D:
 794                 case ACB_ADAPTER_TYPE_E:
 795                 case ACB_ADAPTER_TYPE_F:
 796                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 797                         break;
 798                 }
 799                 acb->pccb_pool[i] = ccb_tmp;
 800                 ccb_tmp->acb = acb;
 801                 ccb_tmp->smid = (u32)i << 16;
 802                 INIT_LIST_HEAD(&ccb_tmp->list);
 803                 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
 804                 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
 805                         acb->maxFreeCCB = i;
 806                         acb->host->can_queue = i;
 807                         break;
 808                 }
 809                 else
 810                         list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 811                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 812                 dma_coherent_handle = next_ccb_phy;
 813         }
 814         if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
 815                 acb->dma_coherent_handle2 = dma_coherent_handle;
 816                 acb->dma_coherent2 = ccb_tmp;
 817         }
 818         switch (acb->adapter_type) {
 819         case ACB_ADAPTER_TYPE_B:
 820                 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
 821                 arcmsr_hbaB_assign_regAddr(acb);
 822                 break;
 823         case ACB_ADAPTER_TYPE_D:
 824                 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
 825                 arcmsr_hbaD_assign_regAddr(acb);
 826                 break;
 827         case ACB_ADAPTER_TYPE_E:
 828                 acb->pCompletionQ = acb->dma_coherent2;
 829                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 830                 acb->doneq_index = 0;
 831                 break;
 832         }
 833         return 0;
 834 }
 835
 836 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 837 {
 838         struct AdapterControlBlock *acb = container_of(work,
 839                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 840         char *acb_dev_map = (char *)acb->device_map;
 841         uint32_t __iomem *signature = NULL;
 842         char __iomem *devicemap = NULL;
 843         int target, lun;
 844         struct scsi_device *psdev;
 845         char diff, temp;
 846
 847         switch (acb->adapter_type) {
 848         case ACB_ADAPTER_TYPE_A: {
 849                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 850
 851                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 852                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 853                 break;
 854         }
 855         case ACB_ADAPTER_TYPE_B: {
 856                 struct MessageUnit_B *reg  = acb->pmuB;
 857
 858                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 859                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 860                 break;
 861         }
 862         case ACB_ADAPTER_TYPE_C: {
 863                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 864
 865                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 866                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 867                 break;
 868         }
 869         case ACB_ADAPTER_TYPE_D: {
 870                 struct MessageUnit_D *reg  = acb->pmuD;
 871
 872                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 873                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 874                 break;
 875         }
 876         case ACB_ADAPTER_TYPE_E: {
 877                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 878
 879                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 880                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 881                 break;
 882                 }
 883         case ACB_ADAPTER_TYPE_F: {
 884                 signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
 885                 devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
 886                 break;
 887                 }
 888         }
 889         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 890                 return;
 891         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 892                 target++) {
 893                 temp = readb(devicemap);
 894                 diff = (*acb_dev_map) ^ temp;
 895                 if (diff != 0) {
 896                         *acb_dev_map = temp;
 897                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 898                                 lun++) {
 899                                 if ((diff & 0x01) == 1 &&
 900                                         (temp & 0x01) == 1) {
 901                                         scsi_add_device(acb->host,
 902                                                 0, target, lun);
 903                                 } else if ((diff & 0x01) == 1
 904                                         && (temp & 0x01) == 0) {
 905                                         psdev = scsi_device_lookup(acb->host,
 906                                                 0, target, lun);
 907                                         if (psdev != NULL) {
 908                                                 scsi_remove_device(psdev);
 909                                                 scsi_device_put(psdev);
 910                                         }
 911                                 }
 912                                 temp >>= 1;
 913                                 diff >>= 1;
 914                         }
 915                 }
 916                 devicemap++;
 917                 acb_dev_map++;
 918         }
 919         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 920 }
 921
 922 static int
 923 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 924 {
 925         unsigned long flags;
 926         int nvec, i;
 927
 928         if (msix_enable == 0)
 929                 goto msi_int0;
 930         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 931                         PCI_IRQ_MSIX);
 932         if (nvec > 0) {
 933                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 934                 flags = 0;
 935         } else {
 936 msi_int0:
 937                 if (msi_enable == 1) {
 938                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 939                         if (nvec == 1) {
 940                                 dev_info(&pdev->dev, "msi enabled\n");
 941                                 goto msi_int1;
 942                         }
 943                 }
 944                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 945                 if (nvec < 1)
 946                         return FAILED;
 947 msi_int1:
 948                 flags = IRQF_SHARED;
 949         }
 950
 951         acb->vector_count = nvec;
 952         for (i = 0; i < nvec; i++) {
 953                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 954                                 flags, "arcmsr", acb)) {
 955                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 956                                 acb->host->host_no, pci_irq_vector(pdev, i));
 957                         goto out_free_irq;
 958                 }
 959         }
 960
 961         return SUCCESS;
 962 out_free_irq:
 963         while (--i >= 0)
 964                 free_irq(pci_irq_vector(pdev, i), acb);
 965         pci_free_irq_vectors(pdev);
 966         return FAILED;
 967 }
 968
 969 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 970 {
 971         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 972         pacb->fw_flag = FW_NORMAL;
 973         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 974         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 975         add_timer(&pacb->eternal_timer);
 976 }
 977
 978 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 979 {
 980         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 981         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 982         add_timer(&pacb->refresh_timer);
 983 }
 984
 985 static int arcmsr_set_dma_mask(struct AdapterControlBlock *acb)
 986 {
 987         struct pci_dev *pcidev = acb->pdev;
 988
 989         if (IS_DMA64) {
 990                 if (((acb->adapter_type == ACB_ADAPTER_TYPE_A) && !dma_mask_64) ||
 991                     dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64)))
 992                         goto    dma32;
 993                 if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
 994                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64))) {
 995                         printk("arcmsr: set DMA 64 mask failed\n");
 996                         return -ENXIO;
 997                 }
 998         } else {
 999 dma32:
1000                 if (dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1001                     dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1002                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32))) {
1003                         printk("arcmsr: set DMA 32-bit mask failed\n");
1004                         return -ENXIO;
1005                 }
1006         }
1007         return 0;
1008 }
1009
1010 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1011 {
1012         struct Scsi_Host *host;
1013         struct AdapterControlBlock *acb;
1014         uint8_t bus,dev_fun;
1015         int error;
1016         error = pci_enable_device(pdev);
1017         if(error){
1018                 return -ENODEV;
1019         }
1020         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
1021         if(!host){
1022                 goto pci_disable_dev;
1023         }
1024         init_waitqueue_head(&wait_q);
1025         bus = pdev->bus->number;
1026         dev_fun = pdev->devfn;
1027         acb = (struct AdapterControlBlock *) host->hostdata;
1028         memset(acb,0,sizeof(struct AdapterControlBlock));
1029         acb->pdev = pdev;
1030         acb->adapter_type = id->driver_data;
1031         if (arcmsr_set_dma_mask(acb))
1032                 goto scsi_host_release;
1033         acb->host = host;
1034         host->max_lun = ARCMSR_MAX_TARGETLUN;
1035         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
1036         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
1037         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
1038                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
1039         host->can_queue = host_can_queue;       /* max simultaneous cmds */
1040         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
1041                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
1042         host->cmd_per_lun = cmd_per_lun;
1043         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
1044         host->unique_id = (bus << 8) | dev_fun;
1045         pci_set_drvdata(pdev, host);
1046         pci_set_master(pdev);
1047         error = pci_request_regions(pdev, "arcmsr");
1048         if(error){
1049                 goto scsi_host_release;
1050         }
1051         spin_lock_init(&acb->eh_lock);
1052         spin_lock_init(&acb->ccblist_lock);
1053         spin_lock_init(&acb->postq_lock);
1054         spin_lock_init(&acb->doneq_lock);
1055         spin_lock_init(&acb->rqbuffer_lock);
1056         spin_lock_init(&acb->wqbuffer_lock);
1057         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1058                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
1059                         ACB_F_MESSAGE_WQBUFFER_READED);
1060         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1061         INIT_LIST_HEAD(&acb->ccb_free_list);
1062         error = arcmsr_remap_pciregion(acb);
1063         if(!error){
1064                 goto pci_release_regs;
1065         }
1066         error = arcmsr_alloc_io_queue(acb);
1067         if (!error)
1068                 goto unmap_pci_region;
1069         error = arcmsr_get_firmware_spec(acb);
1070         if(!error){
1071                 goto free_hbb_mu;
1072         }
1073         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
1074                 arcmsr_free_io_queue(acb);
1075         error = arcmsr_alloc_ccb_pool(acb);
1076         if(error){
1077                 goto unmap_pci_region;
1078         }
1079         error = scsi_add_host(host, &pdev->dev);
1080         if(error){
1081                 goto free_ccb_pool;
1082         }
1083         if (arcmsr_request_irq(pdev, acb) == FAILED)
1084                 goto scsi_host_remove;
1085         arcmsr_iop_init(acb);
1086         arcmsr_init_get_devmap_timer(acb);
1087         if (set_date_time)
1088                 arcmsr_init_set_datetime_timer(acb);
1089         if(arcmsr_alloc_sysfs_attr(acb))
1090                 goto out_free_sysfs;
1091         scsi_scan_host(host);
1092         return 0;
1093 out_free_sysfs:
1094         if (set_date_time)
1095                 del_timer_sync(&acb->refresh_timer);
1096         del_timer_sync(&acb->eternal_timer);
1097         flush_work(&acb->arcmsr_do_message_isr_bh);
1098         arcmsr_stop_adapter_bgrb(acb);
1099         arcmsr_flush_adapter_cache(acb);
1100         arcmsr_free_irq(pdev, acb);
1101 scsi_host_remove:
1102         scsi_remove_host(host);
1103 free_ccb_pool:
1104         arcmsr_free_ccb_pool(acb);
1105         goto unmap_pci_region;
1106 free_hbb_mu:
1107         arcmsr_free_io_queue(acb);
1108 unmap_pci_region:
1109         arcmsr_unmap_pciregion(acb);
1110 pci_release_regs:
1111         pci_release_regions(pdev);
1112 scsi_host_release:
1113         scsi_host_put(host);
1114 pci_disable_dev:
1115         pci_disable_device(pdev);
1116         return -ENODEV;
1117 }
1118
1119 static void arcmsr_free_irq(struct pci_dev *pdev,
1120                 struct AdapterControlBlock *acb)
1121 {
1122         int i;
1123
1124         for (i = 0; i < acb->vector_count; i++)
1125                 free_irq(pci_irq_vector(pdev, i), acb);
1126         pci_free_irq_vectors(pdev);
1127 }
1128
1129 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
1130 {
1131         struct Scsi_Host *host = pci_get_drvdata(pdev);
1132         struct AdapterControlBlock *acb =
1133                 (struct AdapterControlBlock *)host->hostdata;
1134
1135         arcmsr_disable_outbound_ints(acb);
1136         arcmsr_free_irq(pdev, acb);
1137         del_timer_sync(&acb->eternal_timer);
1138         if (set_date_time)
1139                 del_timer_sync(&acb->refresh_timer);
1140         flush_work(&acb->arcmsr_do_message_isr_bh);
1141         arcmsr_stop_adapter_bgrb(acb);
1142         arcmsr_flush_adapter_cache(acb);
1143         pci_set_drvdata(pdev, host);
1144         pci_save_state(pdev);
1145         pci_disable_device(pdev);
1146         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1147         return 0;
1148 }
1149
1150 static int arcmsr_resume(struct pci_dev *pdev)
1151 {
1152         struct Scsi_Host *host = pci_get_drvdata(pdev);
1153         struct AdapterControlBlock *acb =
1154                 (struct AdapterControlBlock *)host->hostdata;
1155
1156         pci_set_power_state(pdev, PCI_D0);
1157         pci_enable_wake(pdev, PCI_D0, 0);
1158         pci_restore_state(pdev);
1159         if (pci_enable_device(pdev)) {
1160                 pr_warn("%s: pci_enable_device error\n", __func__);
1161                 return -ENODEV;
1162         }
1163         if (arcmsr_set_dma_mask(acb))
1164                 goto controller_unregister;
1165         pci_set_master(pdev);
1166         if (arcmsr_request_irq(pdev, acb) == FAILED)
1167                 goto controller_stop;
1168         switch (acb->adapter_type) {
1169         case ACB_ADAPTER_TYPE_B: {
1170                 struct MessageUnit_B *reg = acb->pmuB;
1171                 uint32_t i;
1172                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1173                         reg->post_qbuffer[i] = 0;
1174                         reg->done_qbuffer[i] = 0;
1175                 }
1176                 reg->postq_index = 0;
1177                 reg->doneq_index = 0;
1178                 break;
1179                 }
1180         case ACB_ADAPTER_TYPE_E:
1181                 writel(0, &acb->pmuE->host_int_status);
1182                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1183                 acb->in_doorbell = 0;
1184                 acb->out_doorbell = 0;
1185                 acb->doneq_index = 0;
1186                 break;
1187         case ACB_ADAPTER_TYPE_F:
1188                 writel(0, &acb->pmuF->host_int_status);
1189                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
1190                 acb->in_doorbell = 0;
1191                 acb->out_doorbell = 0;
1192                 acb->doneq_index = 0;
1193                 arcmsr_hbaF_assign_regAddr(acb);
1194                 break;
1195         }
1196         arcmsr_iop_init(acb);
1197         arcmsr_init_get_devmap_timer(acb);
1198         if (set_date_time)
1199                 arcmsr_init_set_datetime_timer(acb);
1200         return 0;
1201 controller_stop:
1202         arcmsr_stop_adapter_bgrb(acb);
1203         arcmsr_flush_adapter_cache(acb);
1204 controller_unregister:
1205         scsi_remove_host(host);
1206         arcmsr_free_ccb_pool(acb);
1207         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1208                 arcmsr_free_io_queue(acb);
1209         arcmsr_unmap_pciregion(acb);
1210         pci_release_regions(pdev);
1211         scsi_host_put(host);
1212         pci_disable_device(pdev);
1213         return -ENODEV;
1214 }
1215
1216 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1217 {
1218         struct MessageUnit_A __iomem *reg = acb->pmuA;
1219         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1220         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1221                 printk(KERN_NOTICE
1222                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1223                         , acb->host->host_no);
1224                 return false;
1225         }
1226         return true;
1227 }
1228
1229 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1230 {
1231         struct MessageUnit_B *reg = acb->pmuB;
1232
1233         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1234         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1235                 printk(KERN_NOTICE
1236                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1237                         , acb->host->host_no);
1238                 return false;
1239         }
1240         return true;
1241 }
1242 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1243 {
1244         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1245         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1246         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1247         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1248                 printk(KERN_NOTICE
1249                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1250                         , pACB->host->host_no);
1251                 return false;
1252         }
1253         return true;
1254 }
1255
1256 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1257 {
1258         struct MessageUnit_D *reg = pACB->pmuD;
1259
1260         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1261         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1262                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1263                         "command' timeout\n", pACB->host->host_no);
1264                 return false;
1265         }
1266         return true;
1267 }
1268
1269 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1270 {
1271         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1272
1273         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1274         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1275         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1276         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1277                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1278                         "command' timeout\n", pACB->host->host_no);
1279                 return false;
1280         }
1281         return true;
1282 }
1283
1284 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1285 {
1286         uint8_t rtnval = 0;
1287         switch (acb->adapter_type) {
1288         case ACB_ADAPTER_TYPE_A:
1289                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1290                 break;
1291         case ACB_ADAPTER_TYPE_B:
1292                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1293                 break;
1294         case ACB_ADAPTER_TYPE_C:
1295                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1296                 break;
1297         case ACB_ADAPTER_TYPE_D:
1298                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1299                 break;
1300         case ACB_ADAPTER_TYPE_E:
1301         case ACB_ADAPTER_TYPE_F:
1302                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1303                 break;
1304         }
1305         return rtnval;
1306 }
1307
1308 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1309 {
1310         struct scsi_cmnd *pcmd = ccb->pcmd;
1311
1312         scsi_dma_unmap(pcmd);
1313 }
1314
1315 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1316 {
1317         struct AdapterControlBlock *acb = ccb->acb;
1318         struct scsi_cmnd *pcmd = ccb->pcmd;
1319         unsigned long flags;
1320         atomic_dec(&acb->ccboutstandingcount);
1321         arcmsr_pci_unmap_dma(ccb);
1322         ccb->startdone = ARCMSR_CCB_DONE;
1323         spin_lock_irqsave(&acb->ccblist_lock, flags);
1324         list_add_tail(&ccb->list, &acb->ccb_free_list);
1325         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1326         pcmd->scsi_done(pcmd);
1327 }
1328
1329 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1330 {
1331
1332         struct scsi_cmnd *pcmd = ccb->pcmd;
1333         struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1334         pcmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
1335         if (sensebuffer) {
1336                 int sense_data_length =
1337                         sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1338                         ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1339                 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
1340                 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1341                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1342                 sensebuffer->Valid = 1;
1343                 pcmd->result |= (DRIVER_SENSE << 24);
1344         }
1345 }
1346
1347 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1348 {
1349         u32 orig_mask = 0;
1350         switch (acb->adapter_type) {
1351         case ACB_ADAPTER_TYPE_A : {
1352                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1353                 orig_mask = readl(&reg->outbound_intmask);
1354                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1355                                                 &reg->outbound_intmask);
1356                 }
1357                 break;
1358         case ACB_ADAPTER_TYPE_B : {
1359                 struct MessageUnit_B *reg = acb->pmuB;
1360                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1361                 writel(0, reg->iop2drv_doorbell_mask);
1362                 }
1363                 break;
1364         case ACB_ADAPTER_TYPE_C:{
1365                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1366                 /* disable all outbound interrupt */
1367                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1368                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1369                 }
1370                 break;
1371         case ACB_ADAPTER_TYPE_D: {
1372                 struct MessageUnit_D *reg = acb->pmuD;
1373                 /* disable all outbound interrupt */
1374                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1375                 }
1376                 break;
1377         case ACB_ADAPTER_TYPE_E:
1378         case ACB_ADAPTER_TYPE_F: {
1379                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1380                 orig_mask = readl(&reg->host_int_mask);
1381                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1382                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1383                 }
1384                 break;
1385         }
1386         return orig_mask;
1387 }
1388
1389 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1390                         struct CommandControlBlock *ccb, bool error)
1391 {
1392         uint8_t id, lun;
1393         id = ccb->pcmd->device->id;
1394         lun = ccb->pcmd->device->lun;
1395         if (!error) {
1396                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1397                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1398                 ccb->pcmd->result = DID_OK << 16;
1399                 arcmsr_ccb_complete(ccb);
1400         }else{
1401                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1402                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1403                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1404                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1405                         arcmsr_ccb_complete(ccb);
1406                         }
1407                         break;
1408
1409                 case ARCMSR_DEV_ABORTED:
1410
1411                 case ARCMSR_DEV_INIT_FAIL: {
1412                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1413                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1414                         arcmsr_ccb_complete(ccb);
1415                         }
1416                         break;
1417
1418                 case ARCMSR_DEV_CHECK_CONDITION: {
1419                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1420                         arcmsr_report_sense_info(ccb);
1421                         arcmsr_ccb_complete(ccb);
1422                         }
1423                         break;
1424
1425                 default:
1426                         printk(KERN_NOTICE
1427                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1428                                 but got unknown DeviceStatus = 0x%x \n"
1429                                 , acb->host->host_no
1430                                 , id
1431                                 , lun
1432                                 , ccb->arcmsr_cdb.DeviceStatus);
1433                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1434                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1435                                 arcmsr_ccb_complete(ccb);
1436                         break;
1437                 }
1438         }
1439 }
1440
1441 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1442 {
1443         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1444                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1445                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1446                         if (abortcmd) {
1447                                 abortcmd->result |= DID_ABORT << 16;
1448                                 arcmsr_ccb_complete(pCCB);
1449                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1450                                 acb->host->host_no, pCCB);
1451                         }
1452                         return;
1453                 }
1454                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1455                                 done acb = '0x%p'"
1456                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1457                                 " ccboutstandingcount = %d \n"
1458                                 , acb->host->host_no
1459                                 , acb
1460                                 , pCCB
1461                                 , pCCB->acb
1462                                 , pCCB->startdone
1463                                 , atomic_read(&acb->ccboutstandingcount));
1464                 return;
1465         }
1466         arcmsr_report_ccb_state(acb, pCCB, error);
1467 }
1468
1469 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1470 {
1471         int i = 0;
1472         uint32_t flag_ccb;
1473         struct ARCMSR_CDB *pARCMSR_CDB;
1474         bool error;
1475         struct CommandControlBlock *pCCB;
1476         unsigned long ccb_cdb_phy;
1477
1478         switch (acb->adapter_type) {
1479
1480         case ACB_ADAPTER_TYPE_A: {
1481                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1482                 uint32_t outbound_intstatus;
1483                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1484                                         acb->outbound_int_enable;
1485                 /*clear and abort all outbound posted Q*/
1486                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1487                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1488                                 && (i++ < acb->maxOutstanding)) {
1489                         ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1490                         if (acb->cdb_phyadd_hipart)
1491                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1492                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1493                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1494                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1495                         arcmsr_drain_donequeue(acb, pCCB, error);
1496                 }
1497                 }
1498                 break;
1499
1500         case ACB_ADAPTER_TYPE_B: {
1501                 struct MessageUnit_B *reg = acb->pmuB;
1502                 /*clear all outbound posted Q*/
1503                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1504                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1505                         flag_ccb = reg->done_qbuffer[i];
1506                         if (flag_ccb != 0) {
1507                                 reg->done_qbuffer[i] = 0;
1508                                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1509                                 if (acb->cdb_phyadd_hipart)
1510                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1511                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1512                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1513                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1514                                 arcmsr_drain_donequeue(acb, pCCB, error);
1515                         }
1516                         reg->post_qbuffer[i] = 0;
1517                 }
1518                 reg->doneq_index = 0;
1519                 reg->postq_index = 0;
1520                 }
1521                 break;
1522         case ACB_ADAPTER_TYPE_C: {
1523                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1524                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1525                         /*need to do*/
1526                         flag_ccb = readl(&reg->outbound_queueport_low);
1527                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1528                         if (acb->cdb_phyadd_hipart)
1529                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1530                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1531                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1532                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1533                         arcmsr_drain_donequeue(acb, pCCB, error);
1534                 }
1535                 }
1536                 break;
1537         case ACB_ADAPTER_TYPE_D: {
1538                 struct MessageUnit_D  *pmu = acb->pmuD;
1539                 uint32_t outbound_write_pointer;
1540                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1541                 unsigned long flags;
1542
1543                 residual = atomic_read(&acb->ccboutstandingcount);
1544                 for (i = 0; i < residual; i++) {
1545                         spin_lock_irqsave(&acb->doneq_lock, flags);
1546                         outbound_write_pointer =
1547                                 pmu->done_qbuffer[0].addressLow + 1;
1548                         doneq_index = pmu->doneq_index;
1549                         if ((doneq_index & 0xFFF) !=
1550                                 (outbound_write_pointer & 0xFFF)) {
1551                                 toggle = doneq_index & 0x4000;
1552                                 index_stripped = (doneq_index & 0xFFF) + 1;
1553                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1554                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1555                                         ((toggle ^ 0x4000) + 1);
1556                                 doneq_index = pmu->doneq_index;
1557                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1558                                 addressLow = pmu->done_qbuffer[doneq_index &
1559                                         0xFFF].addressLow;
1560                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1561                                 if (acb->cdb_phyadd_hipart)
1562                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1563                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1564                                         (acb->vir2phy_offset + ccb_cdb_phy);
1565                                 pCCB = container_of(pARCMSR_CDB,
1566                                         struct CommandControlBlock, arcmsr_cdb);
1567                                 error = (addressLow &
1568                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1569                                         true : false;
1570                                 arcmsr_drain_donequeue(acb, pCCB, error);
1571                                 writel(doneq_index,
1572                                         pmu->outboundlist_read_pointer);
1573                         } else {
1574                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1575                                 mdelay(10);
1576                         }
1577                 }
1578                 pmu->postq_index = 0;
1579                 pmu->doneq_index = 0x40FF;
1580                 }
1581                 break;
1582         case ACB_ADAPTER_TYPE_E:
1583                 arcmsr_hbaE_postqueue_isr(acb);
1584                 break;
1585         case ACB_ADAPTER_TYPE_F:
1586                 arcmsr_hbaF_postqueue_isr(acb);
1587                 break;
1588         }
1589 }
1590
1591 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1592 {
1593         char *acb_dev_map = (char *)acb->device_map;
1594         int target, lun, i;
1595         struct scsi_device *psdev;
1596         struct CommandControlBlock *ccb;
1597         char temp;
1598
1599         for (i = 0; i < acb->maxFreeCCB; i++) {
1600                 ccb = acb->pccb_pool[i];
1601                 if (ccb->startdone == ARCMSR_CCB_START) {
1602                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1603                         arcmsr_pci_unmap_dma(ccb);
1604                         ccb->pcmd->scsi_done(ccb->pcmd);
1605                 }
1606         }
1607         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1608                 temp = *acb_dev_map;
1609                 if (temp) {
1610                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1611                                 if (temp & 1) {
1612                                         psdev = scsi_device_lookup(acb->host,
1613                                                 0, target, lun);
1614                                         if (psdev != NULL) {
1615                                                 scsi_remove_device(psdev);
1616                                                 scsi_device_put(psdev);
1617                                         }
1618                                 }
1619                                 temp >>= 1;
1620                         }
1621                         *acb_dev_map = 0;
1622                 }
1623                 acb_dev_map++;
1624         }
1625 }
1626
1627 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1628 {
1629         struct pci_dev *pdev;
1630         struct Scsi_Host *host;
1631
1632         host = acb->host;
1633         arcmsr_free_sysfs_attr(acb);
1634         scsi_remove_host(host);
1635         flush_work(&acb->arcmsr_do_message_isr_bh);
1636         del_timer_sync(&acb->eternal_timer);
1637         if (set_date_time)
1638                 del_timer_sync(&acb->refresh_timer);
1639         pdev = acb->pdev;
1640         arcmsr_free_irq(pdev, acb);
1641         arcmsr_free_ccb_pool(acb);
1642         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1643                 arcmsr_free_io_queue(acb);
1644         arcmsr_unmap_pciregion(acb);
1645         pci_release_regions(pdev);
1646         scsi_host_put(host);
1647         pci_disable_device(pdev);
1648 }
1649
1650 static void arcmsr_remove(struct pci_dev *pdev)
1651 {
1652         struct Scsi_Host *host = pci_get_drvdata(pdev);
1653         struct AdapterControlBlock *acb =
1654                 (struct AdapterControlBlock *) host->hostdata;
1655         int poll_count = 0;
1656         uint16_t dev_id;
1657
1658         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1659         if (dev_id == 0xffff) {
1660                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1661                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1662                 arcmsr_remove_scsi_devices(acb);
1663                 arcmsr_free_pcidev(acb);
1664                 return;
1665         }
1666         arcmsr_free_sysfs_attr(acb);
1667         scsi_remove_host(host);
1668         flush_work(&acb->arcmsr_do_message_isr_bh);
1669         del_timer_sync(&acb->eternal_timer);
1670         if (set_date_time)
1671                 del_timer_sync(&acb->refresh_timer);
1672         arcmsr_disable_outbound_ints(acb);
1673         arcmsr_stop_adapter_bgrb(acb);
1674         arcmsr_flush_adapter_cache(acb);
1675         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1676         acb->acb_flags &= ~ACB_F_IOP_INITED;
1677
1678         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1679                 if (!atomic_read(&acb->ccboutstandingcount))
1680                         break;
1681                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1682                 msleep(25);
1683         }
1684
1685         if (atomic_read(&acb->ccboutstandingcount)) {
1686                 int i;
1687
1688                 arcmsr_abort_allcmd(acb);
1689                 arcmsr_done4abort_postqueue(acb);
1690                 for (i = 0; i < acb->maxFreeCCB; i++) {
1691                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1692                         if (ccb->startdone == ARCMSR_CCB_START) {
1693                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1694                                 ccb->pcmd->result = DID_ABORT << 16;
1695                                 arcmsr_ccb_complete(ccb);
1696                         }
1697                 }
1698         }
1699         arcmsr_free_irq(pdev, acb);
1700         arcmsr_free_ccb_pool(acb);
1701         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1702                 arcmsr_free_io_queue(acb);
1703         arcmsr_unmap_pciregion(acb);
1704         pci_release_regions(pdev);
1705         scsi_host_put(host);
1706         pci_disable_device(pdev);
1707 }
1708
1709 static void arcmsr_shutdown(struct pci_dev *pdev)
1710 {
1711         struct Scsi_Host *host = pci_get_drvdata(pdev);
1712         struct AdapterControlBlock *acb =
1713                 (struct AdapterControlBlock *)host->hostdata;
1714         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1715                 return;
1716         del_timer_sync(&acb->eternal_timer);
1717         if (set_date_time)
1718                 del_timer_sync(&acb->refresh_timer);
1719         arcmsr_disable_outbound_ints(acb);
1720         arcmsr_free_irq(pdev, acb);
1721         flush_work(&acb->arcmsr_do_message_isr_bh);
1722         arcmsr_stop_adapter_bgrb(acb);
1723         arcmsr_flush_adapter_cache(acb);
1724 }
1725
1726 static int arcmsr_module_init(void)
1727 {
1728         int error = 0;
1729         error = pci_register_driver(&arcmsr_pci_driver);
1730         return error;
1731 }
1732
1733 static void arcmsr_module_exit(void)
1734 {
1735         pci_unregister_driver(&arcmsr_pci_driver);
1736 }
1737 module_init(arcmsr_module_init);
1738 module_exit(arcmsr_module_exit);
1739
1740 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1741                                                 u32 intmask_org)
1742 {
1743         u32 mask;
1744         switch (acb->adapter_type) {
1745
1746         case ACB_ADAPTER_TYPE_A: {
1747                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1748                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1749                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1750                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1751                 writel(mask, &reg->outbound_intmask);
1752                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1753                 }
1754                 break;
1755
1756         case ACB_ADAPTER_TYPE_B: {
1757                 struct MessageUnit_B *reg = acb->pmuB;
1758                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1759                         ARCMSR_IOP2DRV_DATA_READ_OK |
1760                         ARCMSR_IOP2DRV_CDB_DONE |
1761                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1762                 writel(mask, reg->iop2drv_doorbell_mask);
1763                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1764                 }
1765                 break;
1766         case ACB_ADAPTER_TYPE_C: {
1767                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1768                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1769                 writel(intmask_org & mask, &reg->host_int_mask);
1770                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1771                 }
1772                 break;
1773         case ACB_ADAPTER_TYPE_D: {
1774                 struct MessageUnit_D *reg = acb->pmuD;
1775
1776                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1777                 writel(intmask_org | mask, reg->pcief0_int_enable);
1778                 break;
1779                 }
1780         case ACB_ADAPTER_TYPE_E:
1781         case ACB_ADAPTER_TYPE_F: {
1782                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1783
1784                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1785                 writel(intmask_org & mask, &reg->host_int_mask);
1786                 break;
1787                 }
1788         }
1789 }
1790
1791 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1792         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1793 {
1794         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1795         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1796         __le32 address_lo, address_hi;
1797         int arccdbsize = 0x30;
1798         __le32 length = 0;
1799         int i;
1800         struct scatterlist *sg;
1801         int nseg;
1802         ccb->pcmd = pcmd;
1803         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1804         arcmsr_cdb->TargetID = pcmd->device->id;
1805         arcmsr_cdb->LUN = pcmd->device->lun;
1806         arcmsr_cdb->Function = 1;
1807         arcmsr_cdb->msgContext = 0;
1808         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1809
1810         nseg = scsi_dma_map(pcmd);
1811         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1812                 return FAILED;
1813         scsi_for_each_sg(pcmd, sg, nseg, i) {
1814                 /* Get the physical address of the current data pointer */
1815                 length = cpu_to_le32(sg_dma_len(sg));
1816                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1817                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1818                 if (address_hi == 0) {
1819                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1820
1821                         pdma_sg->address = address_lo;
1822                         pdma_sg->length = length;
1823                         psge += sizeof (struct SG32ENTRY);
1824                         arccdbsize += sizeof (struct SG32ENTRY);
1825                 } else {
1826                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1827
1828                         pdma_sg->addresshigh = address_hi;
1829                         pdma_sg->address = address_lo;
1830                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1831                         psge += sizeof (struct SG64ENTRY);
1832                         arccdbsize += sizeof (struct SG64ENTRY);
1833                 }
1834         }
1835         arcmsr_cdb->sgcount = (uint8_t)nseg;
1836         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1837         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1838         if ( arccdbsize > 256)
1839                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1840         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1841                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1842         ccb->arc_cdb_size = arccdbsize;
1843         return SUCCESS;
1844 }
1845
1846 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1847 {
1848         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1849         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1850         atomic_inc(&acb->ccboutstandingcount);
1851         ccb->startdone = ARCMSR_CCB_START;
1852         switch (acb->adapter_type) {
1853         case ACB_ADAPTER_TYPE_A: {
1854                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1855
1856                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1857                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1858                         &reg->inbound_queueport);
1859                 else
1860                         writel(cdb_phyaddr, &reg->inbound_queueport);
1861                 break;
1862         }
1863
1864         case ACB_ADAPTER_TYPE_B: {
1865                 struct MessageUnit_B *reg = acb->pmuB;
1866                 uint32_t ending_index, index = reg->postq_index;
1867
1868                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1869                 reg->post_qbuffer[ending_index] = 0;
1870                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1871                         reg->post_qbuffer[index] =
1872                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1873                 } else {
1874                         reg->post_qbuffer[index] = cdb_phyaddr;
1875                 }
1876                 index++;
1877                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1878                 reg->postq_index = index;
1879                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1880                 }
1881                 break;
1882         case ACB_ADAPTER_TYPE_C: {
1883                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1884                 uint32_t ccb_post_stamp, arc_cdb_size;
1885
1886                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1887                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1888                 writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
1889                 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1890                 }
1891                 break;
1892         case ACB_ADAPTER_TYPE_D: {
1893                 struct MessageUnit_D  *pmu = acb->pmuD;
1894                 u16 index_stripped;
1895                 u16 postq_index, toggle;
1896                 unsigned long flags;
1897                 struct InBound_SRB *pinbound_srb;
1898
1899                 spin_lock_irqsave(&acb->postq_lock, flags);
1900                 postq_index = pmu->postq_index;
1901                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1902                 pinbound_srb->addressHigh = upper_32_bits(ccb->cdb_phyaddr);
1903                 pinbound_srb->addressLow = cdb_phyaddr;
1904                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1905                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1906                 toggle = postq_index & 0x4000;
1907                 index_stripped = postq_index + 1;
1908                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1909                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1910                         (toggle ^ 0x4000);
1911                 writel(postq_index, pmu->inboundlist_write_pointer);
1912                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1913                 break;
1914                 }
1915         case ACB_ADAPTER_TYPE_E: {
1916                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1917                 u32 ccb_post_stamp, arc_cdb_size;
1918
1919                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1920                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1921                 writel(0, &pmu->inbound_queueport_high);
1922                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1923                 break;
1924                 }
1925         case ACB_ADAPTER_TYPE_F: {
1926                 struct MessageUnit_F __iomem *pmu = acb->pmuF;
1927                 u32 ccb_post_stamp, arc_cdb_size;
1928
1929                 if (ccb->arc_cdb_size <= 0x300)
1930                         arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 | 1;
1931                 else {
1932                         arc_cdb_size = ((ccb->arc_cdb_size + 0xff) >> 8) + 2;
1933                         if (arc_cdb_size > 0xF)
1934                                 arc_cdb_size = 0xF;
1935                         arc_cdb_size = (arc_cdb_size << 1) | 1;
1936                 }
1937                 ccb_post_stamp = (ccb->smid | arc_cdb_size);
1938                 writel(0, &pmu->inbound_queueport_high);
1939                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1940                 break;
1941                 }
1942         }
1943 }
1944
1945 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1946 {
1947         struct MessageUnit_A __iomem *reg = acb->pmuA;
1948         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1949         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1950         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1951                 printk(KERN_NOTICE
1952                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1953                         , acb->host->host_no);
1954         }
1955 }
1956
1957 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1958 {
1959         struct MessageUnit_B *reg = acb->pmuB;
1960         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1961         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1962
1963         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1964                 printk(KERN_NOTICE
1965                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1966                         , acb->host->host_no);
1967         }
1968 }
1969
1970 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1971 {
1972         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1973         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1974         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1975         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1976         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1977                 printk(KERN_NOTICE
1978                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1979                         , pACB->host->host_no);
1980         }
1981         return;
1982 }
1983
1984 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1985 {
1986         struct MessageUnit_D *reg = pACB->pmuD;
1987
1988         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1989         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1990         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1991                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1992                         "timeout\n", pACB->host->host_no);
1993 }
1994
1995 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1996 {
1997         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1998
1999         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
2000         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
2001         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
2002         writel(pACB->out_doorbell, &reg->iobound_doorbell);
2003         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
2004                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2005                         "timeout\n", pACB->host->host_no);
2006         }
2007 }
2008
2009 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
2010 {
2011         switch (acb->adapter_type) {
2012         case ACB_ADAPTER_TYPE_A:
2013                 arcmsr_hbaA_stop_bgrb(acb);
2014                 break;
2015         case ACB_ADAPTER_TYPE_B:
2016                 arcmsr_hbaB_stop_bgrb(acb);
2017                 break;
2018         case ACB_ADAPTER_TYPE_C:
2019                 arcmsr_hbaC_stop_bgrb(acb);
2020                 break;
2021         case ACB_ADAPTER_TYPE_D:
2022                 arcmsr_hbaD_stop_bgrb(acb);
2023                 break;
2024         case ACB_ADAPTER_TYPE_E:
2025         case ACB_ADAPTER_TYPE_F:
2026                 arcmsr_hbaE_stop_bgrb(acb);
2027                 break;
2028         }
2029 }
2030
2031 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
2032 {
2033         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
2034 }
2035
2036 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
2037 {
2038         switch (acb->adapter_type) {
2039         case ACB_ADAPTER_TYPE_A: {
2040                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2041                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2042                 }
2043                 break;
2044         case ACB_ADAPTER_TYPE_B: {
2045                 struct MessageUnit_B *reg = acb->pmuB;
2046                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2047                 }
2048                 break;
2049         case ACB_ADAPTER_TYPE_C: {
2050                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2051
2052                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2053                 }
2054                 break;
2055         case ACB_ADAPTER_TYPE_D: {
2056                 struct MessageUnit_D *reg = acb->pmuD;
2057                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
2058                         reg->inbound_doorbell);
2059                 }
2060                 break;
2061         case ACB_ADAPTER_TYPE_E:
2062         case ACB_ADAPTER_TYPE_F: {
2063                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2064                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
2065                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2066                 }
2067                 break;
2068         }
2069 }
2070
2071 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
2072 {
2073         switch (acb->adapter_type) {
2074         case ACB_ADAPTER_TYPE_A: {
2075                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2076                 /*
2077                 ** push inbound doorbell tell iop, driver data write ok
2078                 ** and wait reply on next hwinterrupt for next Qbuffer post
2079                 */
2080                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
2081                 }
2082                 break;
2083
2084         case ACB_ADAPTER_TYPE_B: {
2085                 struct MessageUnit_B *reg = acb->pmuB;
2086                 /*
2087                 ** push inbound doorbell tell iop, driver data write ok
2088                 ** and wait reply on next hwinterrupt for next Qbuffer post
2089                 */
2090                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
2091                 }
2092                 break;
2093         case ACB_ADAPTER_TYPE_C: {
2094                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2095                 /*
2096                 ** push inbound doorbell tell iop, driver data write ok
2097                 ** and wait reply on next hwinterrupt for next Qbuffer post
2098                 */
2099                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
2100                 }
2101                 break;
2102         case ACB_ADAPTER_TYPE_D: {
2103                 struct MessageUnit_D *reg = acb->pmuD;
2104                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
2105                         reg->inbound_doorbell);
2106                 }
2107                 break;
2108         case ACB_ADAPTER_TYPE_E:
2109         case ACB_ADAPTER_TYPE_F: {
2110                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2111                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2112                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2113                 }
2114                 break;
2115         }
2116 }
2117
2118 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2119 {
2120         struct QBUFFER __iomem *qbuffer = NULL;
2121         switch (acb->adapter_type) {
2122
2123         case ACB_ADAPTER_TYPE_A: {
2124                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2125                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2126                 }
2127                 break;
2128         case ACB_ADAPTER_TYPE_B: {
2129                 struct MessageUnit_B *reg = acb->pmuB;
2130                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2131                 }
2132                 break;
2133         case ACB_ADAPTER_TYPE_C: {
2134                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2135                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2136                 }
2137                 break;
2138         case ACB_ADAPTER_TYPE_D: {
2139                 struct MessageUnit_D *reg = acb->pmuD;
2140                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2141                 }
2142                 break;
2143         case ACB_ADAPTER_TYPE_E: {
2144                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2145                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2146                 }
2147                 break;
2148         case ACB_ADAPTER_TYPE_F: {
2149                 qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
2150                 }
2151                 break;
2152         }
2153         return qbuffer;
2154 }
2155
2156 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2157 {
2158         struct QBUFFER __iomem *pqbuffer = NULL;
2159         switch (acb->adapter_type) {
2160
2161         case ACB_ADAPTER_TYPE_A: {
2162                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2163                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2164                 }
2165                 break;
2166         case ACB_ADAPTER_TYPE_B: {
2167                 struct MessageUnit_B  *reg = acb->pmuB;
2168                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2169                 }
2170                 break;
2171         case ACB_ADAPTER_TYPE_C: {
2172                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2173                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2174                 }
2175                 break;
2176         case ACB_ADAPTER_TYPE_D: {
2177                 struct MessageUnit_D *reg = acb->pmuD;
2178                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2179                 }
2180                 break;
2181         case ACB_ADAPTER_TYPE_E: {
2182                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2183                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2184                 }
2185                 break;
2186         case ACB_ADAPTER_TYPE_F:
2187                 pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
2188                 break;
2189         }
2190         return pqbuffer;
2191 }
2192
2193 static uint32_t
2194 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2195                 struct QBUFFER __iomem *prbuffer)
2196 {
2197         uint8_t *pQbuffer;
2198         uint8_t *buf1 = NULL;
2199         uint32_t __iomem *iop_data;
2200         uint32_t iop_len, data_len, *buf2 = NULL;
2201
2202         iop_data = (uint32_t __iomem *)prbuffer->data;
2203         iop_len = readl(&prbuffer->data_len);
2204         if (iop_len > 0) {
2205                 buf1 = kmalloc(128, GFP_ATOMIC);
2206                 buf2 = (uint32_t *)buf1;
2207                 if (buf1 == NULL)
2208                         return 0;
2209                 data_len = iop_len;
2210                 while (data_len >= 4) {
2211                         *buf2++ = readl(iop_data);
2212                         iop_data++;
2213                         data_len -= 4;
2214                 }
2215                 if (data_len)
2216                         *buf2 = readl(iop_data);
2217                 buf2 = (uint32_t *)buf1;
2218         }
2219         while (iop_len > 0) {
2220                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2221                 *pQbuffer = *buf1;
2222                 acb->rqbuf_putIndex++;
2223                 /* if last, index number set it to 0 */
2224                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2225                 buf1++;
2226                 iop_len--;
2227         }
2228         kfree(buf2);
2229         /* let IOP know data has been read */
2230         arcmsr_iop_message_read(acb);
2231         return 1;
2232 }
2233
2234 uint32_t
2235 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2236         struct QBUFFER __iomem *prbuffer) {
2237
2238         uint8_t *pQbuffer;
2239         uint8_t __iomem *iop_data;
2240         uint32_t iop_len;
2241
2242         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2243                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2244         iop_data = (uint8_t __iomem *)prbuffer->data;
2245         iop_len = readl(&prbuffer->data_len);
2246         while (iop_len > 0) {
2247                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2248                 *pQbuffer = readb(iop_data);
2249                 acb->rqbuf_putIndex++;
2250                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2251                 iop_data++;
2252                 iop_len--;
2253         }
2254         arcmsr_iop_message_read(acb);
2255         return 1;
2256 }
2257
2258 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2259 {
2260         unsigned long flags;
2261         struct QBUFFER __iomem  *prbuffer;
2262         int32_t buf_empty_len;
2263
2264         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2265         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2266         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2267                 (ARCMSR_MAX_QBUFFER - 1);
2268         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2269                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2270                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2271         } else
2272                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2273         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2274 }
2275
2276 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2277 {
2278         uint8_t *pQbuffer;
2279         struct QBUFFER __iomem *pwbuffer;
2280         uint8_t *buf1 = NULL;
2281         uint32_t __iomem *iop_data;
2282         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2283
2284         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2285                 buf1 = kmalloc(128, GFP_ATOMIC);
2286                 buf2 = (uint32_t *)buf1;
2287                 if (buf1 == NULL)
2288                         return;
2289
2290                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2291                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2292                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2293                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2294                         && (allxfer_len < 124)) {
2295                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2296                         *buf1 = *pQbuffer;
2297                         acb->wqbuf_getIndex++;
2298                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2299                         buf1++;
2300                         allxfer_len++;
2301                 }
2302                 data_len = allxfer_len;
2303                 buf1 = (uint8_t *)buf2;
2304                 while (data_len >= 4) {
2305                         data = *buf2++;
2306                         writel(data, iop_data);
2307                         iop_data++;
2308                         data_len -= 4;
2309                 }
2310                 if (data_len) {
2311                         data = *buf2;
2312                         writel(data, iop_data);
2313                 }
2314                 writel(allxfer_len, &pwbuffer->data_len);
2315                 kfree(buf1);
2316                 arcmsr_iop_message_wrote(acb);
2317         }
2318 }
2319
2320 void
2321 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2322 {
2323         uint8_t *pQbuffer;
2324         struct QBUFFER __iomem *pwbuffer;
2325         uint8_t __iomem *iop_data;
2326         int32_t allxfer_len = 0;
2327
2328         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2329                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2330                 return;
2331         }
2332         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2333                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2334                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2335                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2336                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2337                         && (allxfer_len < 124)) {
2338                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2339                         writeb(*pQbuffer, iop_data);
2340                         acb->wqbuf_getIndex++;
2341                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2342                         iop_data++;
2343                         allxfer_len++;
2344                 }
2345                 writel(allxfer_len, &pwbuffer->data_len);
2346                 arcmsr_iop_message_wrote(acb);
2347         }
2348 }
2349
2350 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2351 {
2352         unsigned long flags;
2353
2354         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2355         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2356         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2357                 arcmsr_write_ioctldata2iop(acb);
2358         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2359                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2360         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2361 }
2362
2363 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2364 {
2365         uint32_t outbound_doorbell;
2366         struct MessageUnit_A __iomem *reg = acb->pmuA;
2367         outbound_doorbell = readl(&reg->outbound_doorbell);
2368         do {
2369                 writel(outbound_doorbell, &reg->outbound_doorbell);
2370                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2371                         arcmsr_iop2drv_data_wrote_handle(acb);
2372                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2373                         arcmsr_iop2drv_data_read_handle(acb);
2374                 outbound_doorbell = readl(&reg->outbound_doorbell);
2375         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2376                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2377 }
2378 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2379 {
2380         uint32_t outbound_doorbell;
2381         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2382         /*
2383         *******************************************************************
2384         **  Maybe here we need to check wrqbuffer_lock is lock or not
2385         **  DOORBELL: din! don!
2386         **  check if there are any mail need to pack from firmware
2387         *******************************************************************
2388         */
2389         outbound_doorbell = readl(&reg->outbound_doorbell);
2390         do {
2391                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2392                 readl(&reg->outbound_doorbell_clear);
2393                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2394                         arcmsr_iop2drv_data_wrote_handle(pACB);
2395                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2396                         arcmsr_iop2drv_data_read_handle(pACB);
2397                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2398                         arcmsr_hbaC_message_isr(pACB);
2399                 outbound_doorbell = readl(&reg->outbound_doorbell);
2400         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2401                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2402                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2403 }
2404
2405 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2406 {
2407         uint32_t outbound_doorbell;
2408         struct MessageUnit_D  *pmu = pACB->pmuD;
2409
2410         outbound_doorbell = readl(pmu->outbound_doorbell);
2411         do {
2412                 writel(outbound_doorbell, pmu->outbound_doorbell);
2413                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2414                         arcmsr_hbaD_message_isr(pACB);
2415                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2416                         arcmsr_iop2drv_data_wrote_handle(pACB);
2417                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2418                         arcmsr_iop2drv_data_read_handle(pACB);
2419                 outbound_doorbell = readl(pmu->outbound_doorbell);
2420         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2421                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2422                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2423 }
2424
2425 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2426 {
2427         uint32_t outbound_doorbell, in_doorbell, tmp, i;
2428         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2429
2430         if (pACB->adapter_type == ACB_ADAPTER_TYPE_F) {
2431                 for (i = 0; i < 5; i++) {
2432                         in_doorbell = readl(&reg->iobound_doorbell);
2433                         if (in_doorbell != 0)
2434                                 break;
2435                 }
2436         } else
2437                 in_doorbell = readl(&reg->iobound_doorbell);
2438         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2439         do {
2440                 writel(0, &reg->host_int_status); /* clear interrupt */
2441                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2442                         arcmsr_iop2drv_data_wrote_handle(pACB);
2443                 }
2444                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2445                         arcmsr_iop2drv_data_read_handle(pACB);
2446                 }
2447                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2448                         arcmsr_hbaE_message_isr(pACB);
2449                 }
2450                 tmp = in_doorbell;
2451                 in_doorbell = readl(&reg->iobound_doorbell);
2452                 outbound_doorbell = tmp ^ in_doorbell;
2453         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2454                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2455                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2456         pACB->in_doorbell = in_doorbell;
2457 }
2458
2459 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2460 {
2461         uint32_t flag_ccb;
2462         struct MessageUnit_A __iomem *reg = acb->pmuA;
2463         struct ARCMSR_CDB *pARCMSR_CDB;
2464         struct CommandControlBlock *pCCB;
2465         bool error;
2466         unsigned long cdb_phy_addr;
2467
2468         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2469                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2470                 if (acb->cdb_phyadd_hipart)
2471                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2472                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2473                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2474                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2475                 arcmsr_drain_donequeue(acb, pCCB, error);
2476         }
2477 }
2478 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2479 {
2480         uint32_t index;
2481         uint32_t flag_ccb;
2482         struct MessageUnit_B *reg = acb->pmuB;
2483         struct ARCMSR_CDB *pARCMSR_CDB;
2484         struct CommandControlBlock *pCCB;
2485         bool error;
2486         unsigned long cdb_phy_addr;
2487
2488         index = reg->doneq_index;
2489         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2490                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2491                 if (acb->cdb_phyadd_hipart)
2492                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2493                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2494                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2495                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2496                 arcmsr_drain_donequeue(acb, pCCB, error);
2497                 reg->done_qbuffer[index] = 0;
2498                 index++;
2499                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2500                 reg->doneq_index = index;
2501         }
2502 }
2503
2504 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2505 {
2506         struct MessageUnit_C __iomem *phbcmu;
2507         struct ARCMSR_CDB *arcmsr_cdb;
2508         struct CommandControlBlock *ccb;
2509         uint32_t flag_ccb, throttling = 0;
2510         unsigned long ccb_cdb_phy;
2511         int error;
2512
2513         phbcmu = acb->pmuC;
2514         /* areca cdb command done */
2515         /* Use correct offset and size for syncing */
2516
2517         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2518                         0xFFFFFFFF) {
2519                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2520                 if (acb->cdb_phyadd_hipart)
2521                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2522                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2523                         + ccb_cdb_phy);
2524                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2525                         arcmsr_cdb);
2526                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2527                         ? true : false;
2528                 /* check if command done with no error */
2529                 arcmsr_drain_donequeue(acb, ccb, error);
2530                 throttling++;
2531                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2532                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2533                                 &phbcmu->inbound_doorbell);
2534                         throttling = 0;
2535                 }
2536         }
2537 }
2538
2539 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2540 {
2541         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2542         uint32_t addressLow;
2543         int error;
2544         struct MessageUnit_D  *pmu;
2545         struct ARCMSR_CDB *arcmsr_cdb;
2546         struct CommandControlBlock *ccb;
2547         unsigned long flags, ccb_cdb_phy;
2548
2549         spin_lock_irqsave(&acb->doneq_lock, flags);
2550         pmu = acb->pmuD;
2551         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2552         doneq_index = pmu->doneq_index;
2553         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2554                 do {
2555                         toggle = doneq_index & 0x4000;
2556                         index_stripped = (doneq_index & 0xFFF) + 1;
2557                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2558                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2559                                 ((toggle ^ 0x4000) + 1);
2560                         doneq_index = pmu->doneq_index;
2561                         addressLow = pmu->done_qbuffer[doneq_index &
2562                                 0xFFF].addressLow;
2563                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2564                         if (acb->cdb_phyadd_hipart)
2565                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2566                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2567                                 + ccb_cdb_phy);
2568                         ccb = container_of(arcmsr_cdb,
2569                                 struct CommandControlBlock, arcmsr_cdb);
2570                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2571                                 ? true : false;
2572                         arcmsr_drain_donequeue(acb, ccb, error);
2573                         writel(doneq_index, pmu->outboundlist_read_pointer);
2574                 } while ((doneq_index & 0xFFF) !=
2575                         (outbound_write_pointer & 0xFFF));
2576         }
2577         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2578                 pmu->outboundlist_interrupt_cause);
2579         readl(pmu->outboundlist_interrupt_cause);
2580         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2581 }
2582
2583 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2584 {
2585         uint32_t doneq_index;
2586         uint16_t cmdSMID;
2587         int error;
2588         struct MessageUnit_E __iomem *pmu;
2589         struct CommandControlBlock *ccb;
2590         unsigned long flags;
2591
2592         spin_lock_irqsave(&acb->doneq_lock, flags);
2593         doneq_index = acb->doneq_index;
2594         pmu = acb->pmuE;
2595         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2596                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2597                 ccb = acb->pccb_pool[cmdSMID];
2598                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2599                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2600                 arcmsr_drain_donequeue(acb, ccb, error);
2601                 doneq_index++;
2602                 if (doneq_index >= acb->completionQ_entry)
2603                         doneq_index = 0;
2604         }
2605         acb->doneq_index = doneq_index;
2606         writel(doneq_index, &pmu->reply_post_consumer_index);
2607         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2608 }
2609
2610 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
2611 {
2612         uint32_t doneq_index;
2613         uint16_t cmdSMID;
2614         int error;
2615         struct MessageUnit_F __iomem *phbcmu;
2616         struct CommandControlBlock *ccb;
2617         unsigned long flags;
2618
2619         spin_lock_irqsave(&acb->doneq_lock, flags);
2620         doneq_index = acb->doneq_index;
2621         phbcmu = acb->pmuF;
2622         while (1) {
2623                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2624                 if (cmdSMID == 0xffff)
2625                         break;
2626                 ccb = acb->pccb_pool[cmdSMID];
2627                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
2628                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2629                 arcmsr_drain_donequeue(acb, ccb, error);
2630                 acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
2631                 doneq_index++;
2632                 if (doneq_index >= acb->completionQ_entry)
2633                         doneq_index = 0;
2634         }
2635         acb->doneq_index = doneq_index;
2636         writel(doneq_index, &phbcmu->reply_post_consumer_index);
2637         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2638 }
2639
2640 /*
2641 **********************************************************************************
2642 ** Handle a message interrupt
2643 **
2644 ** The only message interrupt we expect is in response to a query for the current adapter config.
2645 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2646 **********************************************************************************
2647 */
2648 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2649 {
2650         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2651         /*clear interrupt and message state*/
2652         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2653         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2654                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2655 }
2656 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2657 {
2658         struct MessageUnit_B *reg  = acb->pmuB;
2659
2660         /*clear interrupt and message state*/
2661         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2662         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2663                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2664 }
2665 /*
2666 **********************************************************************************
2667 ** Handle a message interrupt
2668 **
2669 ** The only message interrupt we expect is in response to a query for the
2670 ** current adapter config.
2671 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2672 **********************************************************************************
2673 */
2674 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2675 {
2676         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2677         /*clear interrupt and message state*/
2678         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2679         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2680                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2681 }
2682
2683 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2684 {
2685         struct MessageUnit_D *reg  = acb->pmuD;
2686
2687         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2688         readl(reg->outbound_doorbell);
2689         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2690                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2691 }
2692
2693 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2694 {
2695         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2696
2697         writel(0, &reg->host_int_status);
2698         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2699                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2700 }
2701
2702 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2703 {
2704         uint32_t outbound_intstatus;
2705         struct MessageUnit_A __iomem *reg = acb->pmuA;
2706         outbound_intstatus = readl(&reg->outbound_intstatus) &
2707                 acb->outbound_int_enable;
2708         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2709                 return IRQ_NONE;
2710         do {
2711                 writel(outbound_intstatus, &reg->outbound_intstatus);
2712                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2713                         arcmsr_hbaA_doorbell_isr(acb);
2714                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2715                         arcmsr_hbaA_postqueue_isr(acb);
2716                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2717                         arcmsr_hbaA_message_isr(acb);
2718                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2719                         acb->outbound_int_enable;
2720         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2721                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2722                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2723         return IRQ_HANDLED;
2724 }
2725
2726 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2727 {
2728         uint32_t outbound_doorbell;
2729         struct MessageUnit_B *reg = acb->pmuB;
2730         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2731                                 acb->outbound_int_enable;
2732         if (!outbound_doorbell)
2733                 return IRQ_NONE;
2734         do {
2735                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2736                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2737                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2738                         arcmsr_iop2drv_data_wrote_handle(acb);
2739                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2740                         arcmsr_iop2drv_data_read_handle(acb);
2741                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2742                         arcmsr_hbaB_postqueue_isr(acb);
2743                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2744                         arcmsr_hbaB_message_isr(acb);
2745                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2746                         acb->outbound_int_enable;
2747         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2748                 | ARCMSR_IOP2DRV_DATA_READ_OK
2749                 | ARCMSR_IOP2DRV_CDB_DONE
2750                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2751         return IRQ_HANDLED;
2752 }
2753
2754 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2755 {
2756         uint32_t host_interrupt_status;
2757         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2758         /*
2759         *********************************************
2760         **   check outbound intstatus
2761         *********************************************
2762         */
2763         host_interrupt_status = readl(&phbcmu->host_int_status) &
2764                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2765                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2766         if (!host_interrupt_status)
2767                 return IRQ_NONE;
2768         do {
2769                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2770                         arcmsr_hbaC_doorbell_isr(pACB);
2771                 /* MU post queue interrupts*/
2772                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2773                         arcmsr_hbaC_postqueue_isr(pACB);
2774                 host_interrupt_status = readl(&phbcmu->host_int_status);
2775         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2776                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2777         return IRQ_HANDLED;
2778 }
2779
2780 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2781 {
2782         u32 host_interrupt_status;
2783         struct MessageUnit_D  *pmu = pACB->pmuD;
2784
2785         host_interrupt_status = readl(pmu->host_int_status) &
2786                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2787                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2788         if (!host_interrupt_status)
2789                 return IRQ_NONE;
2790         do {
2791                 /* MU post queue interrupts*/
2792                 if (host_interrupt_status &
2793                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2794                         arcmsr_hbaD_postqueue_isr(pACB);
2795                 if (host_interrupt_status &
2796                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2797                         arcmsr_hbaD_doorbell_isr(pACB);
2798                 host_interrupt_status = readl(pmu->host_int_status);
2799         } while (host_interrupt_status &
2800                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2801                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2802         return IRQ_HANDLED;
2803 }
2804
2805 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2806 {
2807         uint32_t host_interrupt_status;
2808         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2809
2810         host_interrupt_status = readl(&pmu->host_int_status) &
2811                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2812                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2813         if (!host_interrupt_status)
2814                 return IRQ_NONE;
2815         do {
2816                 /* MU ioctl transfer doorbell interrupts*/
2817                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2818                         arcmsr_hbaE_doorbell_isr(pACB);
2819                 }
2820                 /* MU post queue interrupts*/
2821                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2822                         arcmsr_hbaE_postqueue_isr(pACB);
2823                 }
2824                 host_interrupt_status = readl(&pmu->host_int_status);
2825         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2826                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2827         return IRQ_HANDLED;
2828 }
2829
2830 static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
2831 {
2832         uint32_t host_interrupt_status;
2833         struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
2834
2835         host_interrupt_status = readl(&phbcmu->host_int_status) &
2836                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2837                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2838         if (!host_interrupt_status)
2839                 return IRQ_NONE;
2840         do {
2841                 /* MU post queue interrupts*/
2842                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
2843                         arcmsr_hbaF_postqueue_isr(pACB);
2844
2845                 /* MU ioctl transfer doorbell interrupts*/
2846                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
2847                         arcmsr_hbaE_doorbell_isr(pACB);
2848
2849                 host_interrupt_status = readl(&phbcmu->host_int_status);
2850         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2851                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2852         return IRQ_HANDLED;
2853 }
2854
2855 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2856 {
2857         switch (acb->adapter_type) {
2858         case ACB_ADAPTER_TYPE_A:
2859                 return arcmsr_hbaA_handle_isr(acb);
2860         case ACB_ADAPTER_TYPE_B:
2861                 return arcmsr_hbaB_handle_isr(acb);
2862         case ACB_ADAPTER_TYPE_C:
2863                 return arcmsr_hbaC_handle_isr(acb);
2864         case ACB_ADAPTER_TYPE_D:
2865                 return arcmsr_hbaD_handle_isr(acb);
2866         case ACB_ADAPTER_TYPE_E:
2867                 return arcmsr_hbaE_handle_isr(acb);
2868         case ACB_ADAPTER_TYPE_F:
2869                 return arcmsr_hbaF_handle_isr(acb);
2870         default:
2871                 return IRQ_NONE;
2872         }
2873 }
2874
2875 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2876 {
2877         if (acb) {
2878                 /* stop adapter background rebuild */
2879                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2880                         uint32_t intmask_org;
2881                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2882                         intmask_org = arcmsr_disable_outbound_ints(acb);
2883                         arcmsr_stop_adapter_bgrb(acb);
2884                         arcmsr_flush_adapter_cache(acb);
2885                         arcmsr_enable_outbound_ints(acb, intmask_org);
2886                 }
2887         }
2888 }
2889
2890
2891 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2892 {
2893         uint32_t        i;
2894
2895         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2896                 for (i = 0; i < 15; i++) {
2897                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2898                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2899                                 acb->rqbuf_getIndex = 0;
2900                                 acb->rqbuf_putIndex = 0;
2901                                 arcmsr_iop_message_read(acb);
2902                                 mdelay(30);
2903                         } else if (acb->rqbuf_getIndex !=
2904                                    acb->rqbuf_putIndex) {
2905                                 acb->rqbuf_getIndex = 0;
2906                                 acb->rqbuf_putIndex = 0;
2907                                 mdelay(30);
2908                         } else
2909                                 break;
2910                 }
2911         }
2912 }
2913
2914 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2915                 struct scsi_cmnd *cmd)
2916 {
2917         char *buffer;
2918         unsigned short use_sg;
2919         int retvalue = 0, transfer_len = 0;
2920         unsigned long flags;
2921         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2922         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2923                 (uint32_t)cmd->cmnd[6] << 16 |
2924                 (uint32_t)cmd->cmnd[7] << 8 |
2925                 (uint32_t)cmd->cmnd[8];
2926         struct scatterlist *sg;
2927
2928         use_sg = scsi_sg_count(cmd);
2929         sg = scsi_sglist(cmd);
2930         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2931         if (use_sg > 1) {
2932                 retvalue = ARCMSR_MESSAGE_FAIL;
2933                 goto message_out;
2934         }
2935         transfer_len += sg->length;
2936         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2937                 retvalue = ARCMSR_MESSAGE_FAIL;
2938                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2939                 goto message_out;
2940         }
2941         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2942         switch (controlcode) {
2943         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2944                 unsigned char *ver_addr;
2945                 uint8_t *ptmpQbuffer;
2946                 uint32_t allxfer_len = 0;
2947                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2948                 if (!ver_addr) {
2949                         retvalue = ARCMSR_MESSAGE_FAIL;
2950                         pr_info("%s: memory not enough!\n", __func__);
2951                         goto message_out;
2952                 }
2953                 ptmpQbuffer = ver_addr;
2954                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2955                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2956                         unsigned int tail = acb->rqbuf_getIndex;
2957                         unsigned int head = acb->rqbuf_putIndex;
2958                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2959
2960                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2961                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2962                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2963
2964                         if (allxfer_len <= cnt_to_end)
2965                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2966                         else {
2967                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2968                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2969                         }
2970                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2971                 }
2972                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2973                         allxfer_len);
2974                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2975                         struct QBUFFER __iomem *prbuffer;
2976                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2977                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2978                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2979                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2980                 }
2981                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2982                 kfree(ver_addr);
2983                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2984                 if (acb->fw_flag == FW_DEADLOCK)
2985                         pcmdmessagefld->cmdmessage.ReturnCode =
2986                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2987                 else
2988                         pcmdmessagefld->cmdmessage.ReturnCode =
2989                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2990                 break;
2991         }
2992         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2993                 unsigned char *ver_addr;
2994                 uint32_t user_len;
2995                 int32_t cnt2end;
2996                 uint8_t *pQbuffer, *ptmpuserbuffer;
2997
2998                 user_len = pcmdmessagefld->cmdmessage.Length;
2999                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
3000                         retvalue = ARCMSR_MESSAGE_FAIL;
3001                         goto message_out;
3002                 }
3003
3004                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3005                 if (!ver_addr) {
3006                         retvalue = ARCMSR_MESSAGE_FAIL;
3007                         goto message_out;
3008                 }
3009                 ptmpuserbuffer = ver_addr;
3010
3011                 memcpy(ptmpuserbuffer,
3012                         pcmdmessagefld->messagedatabuffer, user_len);
3013                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3014                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
3015                         struct SENSE_DATA *sensebuffer =
3016                                 (struct SENSE_DATA *)cmd->sense_buffer;
3017                         arcmsr_write_ioctldata2iop(acb);
3018                         /* has error report sensedata */
3019                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
3020                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
3021                         sensebuffer->AdditionalSenseLength = 0x0A;
3022                         sensebuffer->AdditionalSenseCode = 0x20;
3023                         sensebuffer->Valid = 1;
3024                         retvalue = ARCMSR_MESSAGE_FAIL;
3025                 } else {
3026                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
3027                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
3028                         if (user_len > cnt2end) {
3029                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
3030                                 ptmpuserbuffer += cnt2end;
3031                                 user_len -= cnt2end;
3032                                 acb->wqbuf_putIndex = 0;
3033                                 pQbuffer = acb->wqbuffer;
3034                         }
3035                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
3036                         acb->wqbuf_putIndex += user_len;
3037                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
3038                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
3039                                 acb->acb_flags &=
3040                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
3041                                 arcmsr_write_ioctldata2iop(acb);
3042                         }
3043                 }
3044                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3045                 kfree(ver_addr);
3046                 if (acb->fw_flag == FW_DEADLOCK)
3047                         pcmdmessagefld->cmdmessage.ReturnCode =
3048                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3049                 else
3050                         pcmdmessagefld->cmdmessage.ReturnCode =
3051                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3052                 break;
3053         }
3054         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
3055                 uint8_t *pQbuffer = acb->rqbuffer;
3056
3057                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3058                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3059                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3060                 acb->rqbuf_getIndex = 0;
3061                 acb->rqbuf_putIndex = 0;
3062                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3063                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3064                 if (acb->fw_flag == FW_DEADLOCK)
3065                         pcmdmessagefld->cmdmessage.ReturnCode =
3066                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3067                 else
3068                         pcmdmessagefld->cmdmessage.ReturnCode =
3069                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3070                 break;
3071         }
3072         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
3073                 uint8_t *pQbuffer = acb->wqbuffer;
3074                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3075                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3076                         ACB_F_MESSAGE_WQBUFFER_READED);
3077                 acb->wqbuf_getIndex = 0;
3078                 acb->wqbuf_putIndex = 0;
3079                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3080                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3081                 if (acb->fw_flag == FW_DEADLOCK)
3082                         pcmdmessagefld->cmdmessage.ReturnCode =
3083                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3084                 else
3085                         pcmdmessagefld->cmdmessage.ReturnCode =
3086                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3087                 break;
3088         }
3089         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
3090                 uint8_t *pQbuffer;
3091                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3092                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3093                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3094                 acb->rqbuf_getIndex = 0;
3095                 acb->rqbuf_putIndex = 0;
3096                 pQbuffer = acb->rqbuffer;
3097                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3098                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3099                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3100                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3101                         ACB_F_MESSAGE_WQBUFFER_READED);
3102                 acb->wqbuf_getIndex = 0;
3103                 acb->wqbuf_putIndex = 0;
3104                 pQbuffer = acb->wqbuffer;
3105                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3106                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3107                 if (acb->fw_flag == FW_DEADLOCK)
3108                         pcmdmessagefld->cmdmessage.ReturnCode =
3109                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3110                 else
3111                         pcmdmessagefld->cmdmessage.ReturnCode =
3112                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3113                 break;
3114         }
3115         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
3116                 if (acb->fw_flag == FW_DEADLOCK)
3117                         pcmdmessagefld->cmdmessage.ReturnCode =
3118                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3119                 else
3120                         pcmdmessagefld->cmdmessage.ReturnCode =
3121                                 ARCMSR_MESSAGE_RETURNCODE_3F;
3122                 break;
3123         }
3124         case ARCMSR_MESSAGE_SAY_HELLO: {
3125                 int8_t *hello_string = "Hello! I am ARCMSR";
3126                 if (acb->fw_flag == FW_DEADLOCK)
3127                         pcmdmessagefld->cmdmessage.ReturnCode =
3128                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3129                 else
3130                         pcmdmessagefld->cmdmessage.ReturnCode =
3131                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3132                 memcpy(pcmdmessagefld->messagedatabuffer,
3133                         hello_string, (int16_t)strlen(hello_string));
3134                 break;
3135         }
3136         case ARCMSR_MESSAGE_SAY_GOODBYE: {
3137                 if (acb->fw_flag == FW_DEADLOCK)
3138                         pcmdmessagefld->cmdmessage.ReturnCode =
3139                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3140                 else
3141                         pcmdmessagefld->cmdmessage.ReturnCode =
3142                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3143                 arcmsr_iop_parking(acb);
3144                 break;
3145         }
3146         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
3147                 if (acb->fw_flag == FW_DEADLOCK)
3148                         pcmdmessagefld->cmdmessage.ReturnCode =
3149                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3150                 else
3151                         pcmdmessagefld->cmdmessage.ReturnCode =
3152                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3153                 arcmsr_flush_adapter_cache(acb);
3154                 break;
3155         }
3156         default:
3157                 retvalue = ARCMSR_MESSAGE_FAIL;
3158                 pr_info("%s: unknown controlcode!\n", __func__);
3159         }
3160 message_out:
3161         if (use_sg) {
3162                 struct scatterlist *sg = scsi_sglist(cmd);
3163                 kunmap_atomic(buffer - sg->offset);
3164         }
3165         return retvalue;
3166 }
3167
3168 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
3169 {
3170         struct list_head *head = &acb->ccb_free_list;
3171         struct CommandControlBlock *ccb = NULL;
3172         unsigned long flags;
3173         spin_lock_irqsave(&acb->ccblist_lock, flags);
3174         if (!list_empty(head)) {
3175                 ccb = list_entry(head->next, struct CommandControlBlock, list);
3176                 list_del_init(&ccb->list);
3177         }else{
3178                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3179                 return NULL;
3180         }
3181         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3182         return ccb;
3183 }
3184
3185 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
3186                 struct scsi_cmnd *cmd)
3187 {
3188         switch (cmd->cmnd[0]) {
3189         case INQUIRY: {
3190                 unsigned char inqdata[36];
3191                 char *buffer;
3192                 struct scatterlist *sg;
3193
3194                 if (cmd->device->lun) {
3195                         cmd->result = (DID_TIME_OUT << 16);
3196                         cmd->scsi_done(cmd);
3197                         return;
3198                 }
3199                 inqdata[0] = TYPE_PROCESSOR;
3200                 /* Periph Qualifier & Periph Dev Type */
3201                 inqdata[1] = 0;
3202                 /* rem media bit & Dev Type Modifier */
3203                 inqdata[2] = 0;
3204                 /* ISO, ECMA, & ANSI versions */
3205                 inqdata[4] = 31;
3206                 /* length of additional data */
3207                 strncpy(&inqdata[8], "Areca   ", 8);
3208                 /* Vendor Identification */
3209                 strncpy(&inqdata[16], "RAID controller ", 16);
3210                 /* Product Identification */
3211                 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
3212
3213                 sg = scsi_sglist(cmd);
3214                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3215
3216                 memcpy(buffer, inqdata, sizeof(inqdata));
3217                 sg = scsi_sglist(cmd);
3218                 kunmap_atomic(buffer - sg->offset);
3219
3220                 cmd->scsi_done(cmd);
3221         }
3222         break;
3223         case WRITE_BUFFER:
3224         case READ_BUFFER: {
3225                 if (arcmsr_iop_message_xfer(acb, cmd))
3226                         cmd->result = (DID_ERROR << 16);
3227                 cmd->scsi_done(cmd);
3228         }
3229         break;
3230         default:
3231                 cmd->scsi_done(cmd);
3232         }
3233 }
3234
3235 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
3236         void (* done)(struct scsi_cmnd *))
3237 {
3238         struct Scsi_Host *host = cmd->device->host;
3239         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3240         struct CommandControlBlock *ccb;
3241         int target = cmd->device->id;
3242
3243         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3244                 cmd->result = (DID_NO_CONNECT << 16);
3245                 cmd->scsi_done(cmd);
3246                 return 0;
3247         }
3248         cmd->scsi_done = done;
3249         cmd->host_scribble = NULL;
3250         cmd->result = 0;
3251         if (target == 16) {
3252                 /* virtual device for iop message transfer */
3253                 arcmsr_handle_virtual_command(acb, cmd);
3254                 return 0;
3255         }
3256         ccb = arcmsr_get_freeccb(acb);
3257         if (!ccb)
3258                 return SCSI_MLQUEUE_HOST_BUSY;
3259         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3260                 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
3261                 cmd->scsi_done(cmd);
3262                 return 0;
3263         }
3264         arcmsr_post_ccb(acb, ccb);
3265         return 0;
3266 }
3267
3268 static DEF_SCSI_QCMD(arcmsr_queue_command)
3269
3270 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3271 {
3272         int count;
3273         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3274         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3275         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3276         uint32_t *firm_model = &rwbuffer[15];
3277         uint32_t *firm_version = &rwbuffer[17];
3278         uint32_t *device_map = &rwbuffer[21];
3279
3280         count = 2;
3281         while (count) {
3282                 *acb_firm_model = readl(firm_model);
3283                 acb_firm_model++;
3284                 firm_model++;
3285                 count--;
3286         }
3287         count = 4;
3288         while (count) {
3289                 *acb_firm_version = readl(firm_version);
3290                 acb_firm_version++;
3291                 firm_version++;
3292                 count--;
3293         }
3294         count = 4;
3295         while (count) {
3296                 *acb_device_map = readl(device_map);
3297                 acb_device_map++;
3298                 device_map++;
3299                 count--;
3300         }
3301         pACB->signature = readl(&rwbuffer[0]);
3302         pACB->firm_request_len = readl(&rwbuffer[1]);
3303         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3304         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3305         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3306         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3307         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3308                 pACB->host->host_no,
3309                 pACB->firm_model,
3310                 pACB->firm_version);
3311 }
3312
3313 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3314 {
3315         struct MessageUnit_A __iomem *reg = acb->pmuA;
3316
3317         arcmsr_wait_firmware_ready(acb);
3318         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3319         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3320                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3321                         miscellaneous data' timeout \n", acb->host->host_no);
3322                 return false;
3323         }
3324         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3325         return true;
3326 }
3327 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3328 {
3329         struct MessageUnit_B *reg = acb->pmuB;
3330
3331         arcmsr_wait_firmware_ready(acb);
3332         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3333         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3334                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3335                 return false;
3336         }
3337         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3338         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3339                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3340                         miscellaneous data' timeout \n", acb->host->host_no);
3341                 return false;
3342         }
3343         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3344         return true;
3345 }
3346
3347 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3348 {
3349         uint32_t intmask_org;
3350         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3351
3352         /* disable all outbound interrupt */
3353         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3354         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3355         /* wait firmware ready */
3356         arcmsr_wait_firmware_ready(pACB);
3357         /* post "get config" instruction */
3358         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3359         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3360         /* wait message ready */
3361         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3362                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3363                         miscellaneous data' timeout \n", pACB->host->host_no);
3364                 return false;
3365         }
3366         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3367         return true;
3368 }
3369
3370 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3371 {
3372         struct MessageUnit_D *reg = acb->pmuD;
3373
3374         if (readl(acb->pmuD->outbound_doorbell) &
3375                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3376                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3377                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3378         }
3379         arcmsr_wait_firmware_ready(acb);
3380         /* post "get config" instruction */
3381         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3382         /* wait message ready */
3383         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3384                 pr_notice("arcmsr%d: wait get adapter firmware "
3385                         "miscellaneous data timeout\n", acb->host->host_no);
3386                 return false;
3387         }
3388         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3389         return true;
3390 }
3391
3392 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3393 {
3394         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3395         uint32_t intmask_org;
3396
3397         /* disable all outbound interrupt */
3398         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3399         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3400         /* wait firmware ready */
3401         arcmsr_wait_firmware_ready(pACB);
3402         mdelay(20);
3403         /* post "get config" instruction */
3404         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3405
3406         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3407         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3408         /* wait message ready */
3409         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3410                 pr_notice("arcmsr%d: wait get adapter firmware "
3411                         "miscellaneous data timeout\n", pACB->host->host_no);
3412                 return false;
3413         }
3414         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3415         return true;
3416 }
3417
3418 static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
3419 {
3420         struct MessageUnit_F __iomem *reg = pACB->pmuF;
3421         uint32_t intmask_org;
3422
3423         /* disable all outbound interrupt */
3424         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3425         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3426         /* wait firmware ready */
3427         arcmsr_wait_firmware_ready(pACB);
3428         /* post "get config" instruction */
3429         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3430
3431         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3432         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3433         /* wait message ready */
3434         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3435                 pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
3436                           pACB->host->host_no);
3437                 return false;
3438         }
3439         arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
3440         return true;
3441 }
3442
3443 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3444 {
3445         bool rtn = false;
3446
3447         switch (acb->adapter_type) {
3448         case ACB_ADAPTER_TYPE_A:
3449                 rtn = arcmsr_hbaA_get_config(acb);
3450                 break;
3451         case ACB_ADAPTER_TYPE_B:
3452                 rtn = arcmsr_hbaB_get_config(acb);
3453                 break;
3454         case ACB_ADAPTER_TYPE_C:
3455                 rtn = arcmsr_hbaC_get_config(acb);
3456                 break;
3457         case ACB_ADAPTER_TYPE_D:
3458                 rtn = arcmsr_hbaD_get_config(acb);
3459                 break;
3460         case ACB_ADAPTER_TYPE_E:
3461                 rtn = arcmsr_hbaE_get_config(acb);
3462                 break;
3463         case ACB_ADAPTER_TYPE_F:
3464                 rtn = arcmsr_hbaF_get_config(acb);
3465                 break;
3466         default:
3467                 break;
3468         }
3469         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3470         if (acb->host->can_queue >= acb->firm_numbers_queue)
3471                 acb->host->can_queue = acb->maxOutstanding;
3472         else
3473                 acb->maxOutstanding = acb->host->can_queue;
3474         acb->maxFreeCCB = acb->host->can_queue;
3475         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3476                 acb->maxFreeCCB += 64;
3477         return rtn;
3478 }
3479
3480 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3481         struct CommandControlBlock *poll_ccb)
3482 {
3483         struct MessageUnit_A __iomem *reg = acb->pmuA;
3484         struct CommandControlBlock *ccb;
3485         struct ARCMSR_CDB *arcmsr_cdb;
3486         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3487         int rtn;
3488         bool error;
3489         unsigned long ccb_cdb_phy;
3490
3491 polling_hba_ccb_retry:
3492         poll_count++;
3493         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3494         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3495         while (1) {
3496                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3497                         if (poll_ccb_done){
3498                                 rtn = SUCCESS;
3499                                 break;
3500                         }else {
3501                                 msleep(25);
3502                                 if (poll_count > 100){
3503                                         rtn = FAILED;
3504                                         break;
3505                                 }
3506                                 goto polling_hba_ccb_retry;
3507                         }
3508                 }
3509                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3510                 if (acb->cdb_phyadd_hipart)
3511                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3512                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3513                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3514                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3515                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3516                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3517                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3518                                         " poll command abort successfully \n"
3519                                         , acb->host->host_no
3520                                         , ccb->pcmd->device->id
3521                                         , (u32)ccb->pcmd->device->lun
3522                                         , ccb);
3523                                 ccb->pcmd->result = DID_ABORT << 16;
3524                                 arcmsr_ccb_complete(ccb);
3525                                 continue;
3526                         }
3527                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3528                                 " command done ccb = '0x%p'"
3529                                 "ccboutstandingcount = %d \n"
3530                                 , acb->host->host_no
3531                                 , ccb
3532                                 , atomic_read(&acb->ccboutstandingcount));
3533                         continue;
3534                 }
3535                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3536                 arcmsr_report_ccb_state(acb, ccb, error);
3537         }
3538         return rtn;
3539 }
3540
3541 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3542                                         struct CommandControlBlock *poll_ccb)
3543 {
3544         struct MessageUnit_B *reg = acb->pmuB;
3545         struct ARCMSR_CDB *arcmsr_cdb;
3546         struct CommandControlBlock *ccb;
3547         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3548         int index, rtn;
3549         bool error;
3550         unsigned long ccb_cdb_phy;
3551
3552 polling_hbb_ccb_retry:
3553         poll_count++;
3554         /* clear doorbell interrupt */
3555         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3556         while(1){
3557                 index = reg->doneq_index;
3558                 flag_ccb = reg->done_qbuffer[index];
3559                 if (flag_ccb == 0) {
3560                         if (poll_ccb_done){
3561                                 rtn = SUCCESS;
3562                                 break;
3563                         }else {
3564                                 msleep(25);
3565                                 if (poll_count > 100){
3566                                         rtn = FAILED;
3567                                         break;
3568                                 }
3569                                 goto polling_hbb_ccb_retry;
3570                         }
3571                 }
3572                 reg->done_qbuffer[index] = 0;
3573                 index++;
3574                 /*if last index number set it to 0 */
3575                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3576                 reg->doneq_index = index;
3577                 /* check if command done with no error*/
3578                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3579                 if (acb->cdb_phyadd_hipart)
3580                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3581                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3582                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3583                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3584                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3585                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3586                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3587                                         " poll command abort successfully \n"
3588                                         ,acb->host->host_no
3589                                         ,ccb->pcmd->device->id
3590                                         ,(u32)ccb->pcmd->device->lun
3591                                         ,ccb);
3592                                 ccb->pcmd->result = DID_ABORT << 16;
3593                                 arcmsr_ccb_complete(ccb);
3594                                 continue;
3595                         }
3596                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3597                                 " command done ccb = '0x%p'"
3598                                 "ccboutstandingcount = %d \n"
3599                                 , acb->host->host_no
3600                                 , ccb
3601                                 , atomic_read(&acb->ccboutstandingcount));
3602                         continue;
3603                 }
3604                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3605                 arcmsr_report_ccb_state(acb, ccb, error);
3606         }
3607         return rtn;
3608 }
3609
3610 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3611                 struct CommandControlBlock *poll_ccb)
3612 {
3613         struct MessageUnit_C __iomem *reg = acb->pmuC;
3614         uint32_t flag_ccb;
3615         struct ARCMSR_CDB *arcmsr_cdb;
3616         bool error;
3617         struct CommandControlBlock *pCCB;
3618         uint32_t poll_ccb_done = 0, poll_count = 0;
3619         int rtn;
3620         unsigned long ccb_cdb_phy;
3621
3622 polling_hbc_ccb_retry:
3623         poll_count++;
3624         while (1) {
3625                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3626                         if (poll_ccb_done) {
3627                                 rtn = SUCCESS;
3628                                 break;
3629                         } else {
3630                                 msleep(25);
3631                                 if (poll_count > 100) {
3632                                         rtn = FAILED;
3633                                         break;
3634                                 }
3635                                 goto polling_hbc_ccb_retry;
3636                         }
3637                 }
3638                 flag_ccb = readl(&reg->outbound_queueport_low);
3639                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3640                 if (acb->cdb_phyadd_hipart)
3641                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3642                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3643                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3644                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3645                 /* check ifcommand done with no error*/
3646                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3647                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3648                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3649                                         " poll command abort successfully \n"
3650                                         , acb->host->host_no
3651                                         , pCCB->pcmd->device->id
3652                                         , (u32)pCCB->pcmd->device->lun
3653                                         , pCCB);
3654                                 pCCB->pcmd->result = DID_ABORT << 16;
3655                                 arcmsr_ccb_complete(pCCB);
3656                                 continue;
3657                         }
3658                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3659                                 " command done ccb = '0x%p'"
3660                                 "ccboutstandingcount = %d \n"
3661                                 , acb->host->host_no
3662                                 , pCCB
3663                                 , atomic_read(&acb->ccboutstandingcount));
3664                         continue;
3665                 }
3666                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3667                 arcmsr_report_ccb_state(acb, pCCB, error);
3668         }
3669         return rtn;
3670 }
3671
3672 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3673                                 struct CommandControlBlock *poll_ccb)
3674 {
3675         bool error;
3676         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb;
3677         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3678         unsigned long flags, ccb_cdb_phy;
3679         struct ARCMSR_CDB *arcmsr_cdb;
3680         struct CommandControlBlock *pCCB;
3681         struct MessageUnit_D *pmu = acb->pmuD;
3682
3683 polling_hbaD_ccb_retry:
3684         poll_count++;
3685         while (1) {
3686                 spin_lock_irqsave(&acb->doneq_lock, flags);
3687                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3688                 doneq_index = pmu->doneq_index;
3689                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3690                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3691                         if (poll_ccb_done) {
3692                                 rtn = SUCCESS;
3693                                 break;
3694                         } else {
3695                                 msleep(25);
3696                                 if (poll_count > 40) {
3697                                         rtn = FAILED;
3698                                         break;
3699                                 }
3700                                 goto polling_hbaD_ccb_retry;
3701                         }
3702                 }
3703                 toggle = doneq_index & 0x4000;
3704                 index_stripped = (doneq_index & 0xFFF) + 1;
3705                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3706                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3707                                 ((toggle ^ 0x4000) + 1);
3708                 doneq_index = pmu->doneq_index;
3709                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3710                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3711                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3712                 if (acb->cdb_phyadd_hipart)
3713                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3714                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3715                         ccb_cdb_phy);
3716                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3717                         arcmsr_cdb);
3718                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3719                 if ((pCCB->acb != acb) ||
3720                         (pCCB->startdone != ARCMSR_CCB_START)) {
3721                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3722                                 pr_notice("arcmsr%d: scsi id = %d "
3723                                         "lun = %d ccb = '0x%p' poll command "
3724                                         "abort successfully\n"
3725                                         , acb->host->host_no
3726                                         , pCCB->pcmd->device->id
3727                                         , (u32)pCCB->pcmd->device->lun
3728                                         , pCCB);
3729                                 pCCB->pcmd->result = DID_ABORT << 16;
3730                                 arcmsr_ccb_complete(pCCB);
3731                                 continue;
3732                         }
3733                         pr_notice("arcmsr%d: polling an illegal "
3734                                 "ccb command done ccb = '0x%p' "
3735                                 "ccboutstandingcount = %d\n"
3736                                 , acb->host->host_no
3737                                 , pCCB
3738                                 , atomic_read(&acb->ccboutstandingcount));
3739                         continue;
3740                 }
3741                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3742                         ? true : false;
3743                 arcmsr_report_ccb_state(acb, pCCB, error);
3744         }
3745         return rtn;
3746 }
3747
3748 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3749                                 struct CommandControlBlock *poll_ccb)
3750 {
3751         bool error;
3752         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3753         uint16_t cmdSMID;
3754         unsigned long flags;
3755         int rtn;
3756         struct CommandControlBlock *pCCB;
3757         struct MessageUnit_E __iomem *reg = acb->pmuE;
3758
3759         polling_hbaC_ccb_retry:
3760         poll_count++;
3761         while (1) {
3762                 spin_lock_irqsave(&acb->doneq_lock, flags);
3763                 doneq_index = acb->doneq_index;
3764                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3765                                 doneq_index) {
3766                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3767                         if (poll_ccb_done) {
3768                                 rtn = SUCCESS;
3769                                 break;
3770                         } else {
3771                                 msleep(25);
3772                                 if (poll_count > 40) {
3773                                         rtn = FAILED;
3774                                         break;
3775                                 }
3776                                 goto polling_hbaC_ccb_retry;
3777                         }
3778                 }
3779                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3780                 doneq_index++;
3781                 if (doneq_index >= acb->completionQ_entry)
3782                         doneq_index = 0;
3783                 acb->doneq_index = doneq_index;
3784                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3785                 pCCB = acb->pccb_pool[cmdSMID];
3786                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3787                 /* check if command done with no error*/
3788                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3789                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3790                                 pr_notice("arcmsr%d: scsi id = %d "
3791                                         "lun = %d ccb = '0x%p' poll command "
3792                                         "abort successfully\n"
3793                                         , acb->host->host_no
3794                                         , pCCB->pcmd->device->id
3795                                         , (u32)pCCB->pcmd->device->lun
3796                                         , pCCB);
3797                                 pCCB->pcmd->result = DID_ABORT << 16;
3798                                 arcmsr_ccb_complete(pCCB);
3799                                 continue;
3800                         }
3801                         pr_notice("arcmsr%d: polling an illegal "
3802                                 "ccb command done ccb = '0x%p' "
3803                                 "ccboutstandingcount = %d\n"
3804                                 , acb->host->host_no
3805                                 , pCCB
3806                                 , atomic_read(&acb->ccboutstandingcount));
3807                         continue;
3808                 }
3809                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3810                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3811                 arcmsr_report_ccb_state(acb, pCCB, error);
3812         }
3813         writel(doneq_index, &reg->reply_post_consumer_index);
3814         return rtn;
3815 }
3816
3817 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3818                                         struct CommandControlBlock *poll_ccb)
3819 {
3820         int rtn = 0;
3821         switch (acb->adapter_type) {
3822
3823         case ACB_ADAPTER_TYPE_A:
3824                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3825                 break;
3826         case ACB_ADAPTER_TYPE_B:
3827                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3828                 break;
3829         case ACB_ADAPTER_TYPE_C:
3830                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3831                 break;
3832         case ACB_ADAPTER_TYPE_D:
3833                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3834                 break;
3835         case ACB_ADAPTER_TYPE_E:
3836         case ACB_ADAPTER_TYPE_F:
3837                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3838                 break;
3839         }
3840         return rtn;
3841 }
3842
3843 static void arcmsr_set_iop_datetime(struct timer_list *t)
3844 {
3845         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3846         unsigned int next_time;
3847         struct tm tm;
3848
3849         union {
3850                 struct  {
3851                 uint16_t        signature;
3852                 uint8_t         year;
3853                 uint8_t         month;
3854                 uint8_t         date;
3855                 uint8_t         hour;
3856                 uint8_t         minute;
3857                 uint8_t         second;
3858                 } a;
3859                 struct  {
3860                 uint32_t        msg_time[2];
3861                 } b;
3862         } datetime;
3863
3864         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3865
3866         datetime.a.signature = 0x55AA;
3867         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3868         datetime.a.month = tm.tm_mon;
3869         datetime.a.date = tm.tm_mday;
3870         datetime.a.hour = tm.tm_hour;
3871         datetime.a.minute = tm.tm_min;
3872         datetime.a.second = tm.tm_sec;
3873
3874         switch (pacb->adapter_type) {
3875                 case ACB_ADAPTER_TYPE_A: {
3876                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3877                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3878                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3879                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3880                         break;
3881                 }
3882                 case ACB_ADAPTER_TYPE_B: {
3883                         uint32_t __iomem *rwbuffer;
3884                         struct MessageUnit_B *reg = pacb->pmuB;
3885                         rwbuffer = reg->message_rwbuffer;
3886                         writel(datetime.b.msg_time[0], rwbuffer++);
3887                         writel(datetime.b.msg_time[1], rwbuffer++);
3888                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3889                         break;
3890                 }
3891                 case ACB_ADAPTER_TYPE_C: {
3892                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3893                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3894                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3895                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3896                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3897                         break;
3898                 }
3899                 case ACB_ADAPTER_TYPE_D: {
3900                         uint32_t __iomem *rwbuffer;
3901                         struct MessageUnit_D *reg = pacb->pmuD;
3902                         rwbuffer = reg->msgcode_rwbuffer;
3903                         writel(datetime.b.msg_time[0], rwbuffer++);
3904                         writel(datetime.b.msg_time[1], rwbuffer++);
3905                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3906                         break;
3907                 }
3908                 case ACB_ADAPTER_TYPE_E: {
3909                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3910                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3911                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3912                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3913                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3914                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3915                         break;
3916                 }
3917                 case ACB_ADAPTER_TYPE_F: {
3918                         struct MessageUnit_F __iomem *reg = pacb->pmuF;
3919
3920                         pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
3921                         pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
3922                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3923                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3924                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3925                         break;
3926                 }
3927         }
3928         if (sys_tz.tz_minuteswest)
3929                 next_time = ARCMSR_HOURS;
3930         else
3931                 next_time = ARCMSR_MINUTES;
3932         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3933 }
3934
3935 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3936 {
3937         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3938         dma_addr_t dma_coherent_handle;
3939
3940         /*
3941         ********************************************************************
3942         ** here we need to tell iop 331 our freeccb.HighPart
3943         ** if freeccb.HighPart is not zero
3944         ********************************************************************
3945         */
3946         switch (acb->adapter_type) {
3947         case ACB_ADAPTER_TYPE_B:
3948         case ACB_ADAPTER_TYPE_D:
3949                 dma_coherent_handle = acb->dma_coherent_handle2;
3950                 break;
3951         case ACB_ADAPTER_TYPE_E:
3952         case ACB_ADAPTER_TYPE_F:
3953                 dma_coherent_handle = acb->dma_coherent_handle +
3954                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3955                 break;
3956         default:
3957                 dma_coherent_handle = acb->dma_coherent_handle;
3958                 break;
3959         }
3960         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3961         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3962         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3963         acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
3964         /*
3965         ***********************************************************************
3966         **    if adapter type B, set window of "post command Q"
3967         ***********************************************************************
3968         */
3969         switch (acb->adapter_type) {
3970
3971         case ACB_ADAPTER_TYPE_A: {
3972                 if (cdb_phyaddr_hi32 != 0) {
3973                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3974                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3975                                                 &reg->message_rwbuffer[0]);
3976                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3977                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3978                                                         &reg->inbound_msgaddr0);
3979                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3980                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3981                                 part physical address timeout\n",
3982                                 acb->host->host_no);
3983                                 return 1;
3984                         }
3985                 }
3986                 }
3987                 break;
3988
3989         case ACB_ADAPTER_TYPE_B: {
3990                 uint32_t __iomem *rwbuffer;
3991
3992                 struct MessageUnit_B *reg = acb->pmuB;
3993                 reg->postq_index = 0;
3994                 reg->doneq_index = 0;
3995                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3996                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3997                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
3998                                 acb->host->host_no);
3999                         return 1;
4000                 }
4001                 rwbuffer = reg->message_rwbuffer;
4002                 /* driver "set config" signature */
4003                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4004                 /* normal should be zero */
4005                 writel(cdb_phyaddr_hi32, rwbuffer++);
4006                 /* postQ size (256 + 8)*4        */
4007                 writel(cdb_phyaddr, rwbuffer++);
4008                 /* doneQ size (256 + 8)*4        */
4009                 writel(cdb_phyaddr + 1056, rwbuffer++);
4010                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
4011                 writel(1056, rwbuffer);
4012
4013                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
4014                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4015                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4016                         timeout \n",acb->host->host_no);
4017                         return 1;
4018                 }
4019                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
4020                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4021                         pr_err("arcmsr%d: can't set driver mode.\n",
4022                                 acb->host->host_no);
4023                         return 1;
4024                 }
4025                 }
4026                 break;
4027         case ACB_ADAPTER_TYPE_C: {
4028                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4029
4030                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
4031                                         acb->adapter_index, cdb_phyaddr_hi32);
4032                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4033                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
4034                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4035                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4036                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
4037                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4038                                 timeout \n", acb->host->host_no);
4039                                 return 1;
4040                         }
4041                 }
4042                 break;
4043         case ACB_ADAPTER_TYPE_D: {
4044                 uint32_t __iomem *rwbuffer;
4045                 struct MessageUnit_D *reg = acb->pmuD;
4046                 reg->postq_index = 0;
4047                 reg->doneq_index = 0;
4048                 rwbuffer = reg->msgcode_rwbuffer;
4049                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4050                 writel(cdb_phyaddr_hi32, rwbuffer++);
4051                 writel(cdb_phyaddr, rwbuffer++);
4052                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
4053                         sizeof(struct InBound_SRB)), rwbuffer++);
4054                 writel(0x100, rwbuffer);
4055                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
4056                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
4057                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4058                                 acb->host->host_no);
4059                         return 1;
4060                 }
4061                 }
4062                 break;
4063         case ACB_ADAPTER_TYPE_E: {
4064                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4065                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4066                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
4067                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
4068                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
4069                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
4070                 writel(lower_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[5]);
4071                 writel(upper_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[6]);
4072                 writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
4073                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4074                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4075                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4076                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4077                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
4078                                 acb->host->host_no);
4079                         return 1;
4080                 }
4081                 }
4082                 break;
4083         case ACB_ADAPTER_TYPE_F: {
4084                 struct MessageUnit_F __iomem *reg = acb->pmuF;
4085
4086                 acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
4087                 acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
4088                 acb->msgcode_rwbuffer[2] = cdb_phyaddr;
4089                 acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
4090                 acb->msgcode_rwbuffer[4] = acb->ccbsize;
4091                 acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
4092                 acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
4093                 acb->msgcode_rwbuffer[7] = acb->completeQ_size;
4094                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4095                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4096                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4097                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4098                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4099                                 acb->host->host_no);
4100                         return 1;
4101                 }
4102                 }
4103                 break;
4104         }
4105         return 0;
4106 }
4107
4108 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
4109 {
4110         uint32_t firmware_state = 0;
4111         switch (acb->adapter_type) {
4112
4113         case ACB_ADAPTER_TYPE_A: {
4114                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4115                 do {
4116                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4117                                 msleep(20);
4118                         firmware_state = readl(&reg->outbound_msgaddr1);
4119                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
4120                 }
4121                 break;
4122
4123         case ACB_ADAPTER_TYPE_B: {
4124                 struct MessageUnit_B *reg = acb->pmuB;
4125                 do {
4126                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4127                                 msleep(20);
4128                         firmware_state = readl(reg->iop2drv_doorbell);
4129                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
4130                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
4131                 }
4132                 break;
4133         case ACB_ADAPTER_TYPE_C: {
4134                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4135                 do {
4136                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4137                                 msleep(20);
4138                         firmware_state = readl(&reg->outbound_msgaddr1);
4139                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
4140                 }
4141                 break;
4142         case ACB_ADAPTER_TYPE_D: {
4143                 struct MessageUnit_D *reg = acb->pmuD;
4144                 do {
4145                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4146                                 msleep(20);
4147                         firmware_state = readl(reg->outbound_msgaddr1);
4148                 } while ((firmware_state &
4149                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
4150                 }
4151                 break;
4152         case ACB_ADAPTER_TYPE_E:
4153         case ACB_ADAPTER_TYPE_F: {
4154                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4155                 do {
4156                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4157                                 msleep(20);
4158                         firmware_state = readl(&reg->outbound_msgaddr1);
4159                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
4160                 }
4161                 break;
4162         }
4163 }
4164
4165 static void arcmsr_request_device_map(struct timer_list *t)
4166 {
4167         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
4168         if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG | ACB_F_BUS_RESET | ACB_F_ABORT)) {
4169                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4170         } else {
4171                 acb->fw_flag = FW_NORMAL;
4172                 switch (acb->adapter_type) {
4173                 case ACB_ADAPTER_TYPE_A: {
4174                         struct MessageUnit_A __iomem *reg = acb->pmuA;
4175                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4176                         break;
4177                         }
4178                 case ACB_ADAPTER_TYPE_B: {
4179                         struct MessageUnit_B *reg = acb->pmuB;
4180                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
4181                         break;
4182                         }
4183                 case ACB_ADAPTER_TYPE_C: {
4184                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4185                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4186                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4187                         break;
4188                         }
4189                 case ACB_ADAPTER_TYPE_D: {
4190                         struct MessageUnit_D *reg = acb->pmuD;
4191                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
4192                         break;
4193                         }
4194                 case ACB_ADAPTER_TYPE_E: {
4195                         struct MessageUnit_E __iomem *reg = acb->pmuE;
4196                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4197                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4198                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4199                         break;
4200                         }
4201                 case ACB_ADAPTER_TYPE_F: {
4202                         struct MessageUnit_F __iomem *reg = acb->pmuF;
4203                         uint32_t outMsg1 = readl(&reg->outbound_msgaddr1);
4204
4205                         if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) ||
4206                                 (outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
4207                                 goto nxt6s;
4208                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4209                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4210                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4211                         break;
4212                         }
4213                 default:
4214                         return;
4215                 }
4216                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
4217 nxt6s:
4218                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4219         }
4220 }
4221
4222 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
4223 {
4224         struct MessageUnit_A __iomem *reg = acb->pmuA;
4225         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4226         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
4227         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4228                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4229                                 rebuild' timeout \n", acb->host->host_no);
4230         }
4231 }
4232
4233 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
4234 {
4235         struct MessageUnit_B *reg = acb->pmuB;
4236         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4237         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
4238         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4239                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4240                                 rebuild' timeout \n",acb->host->host_no);
4241         }
4242 }
4243
4244 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
4245 {
4246         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
4247         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4248         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
4249         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
4250         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
4251                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4252                                 rebuild' timeout \n", pACB->host->host_no);
4253         }
4254         return;
4255 }
4256
4257 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
4258 {
4259         struct MessageUnit_D *pmu = pACB->pmuD;
4260
4261         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4262         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
4263         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
4264                 pr_notice("arcmsr%d: wait 'start adapter "
4265                         "background rebuild' timeout\n", pACB->host->host_no);
4266         }
4267 }
4268
4269 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4270 {
4271         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4272
4273         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4274         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4275         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4276         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4277         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4278                 pr_notice("arcmsr%d: wait 'start adapter "
4279                         "background rebuild' timeout \n", pACB->host->host_no);
4280         }
4281 }
4282
4283 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4284 {
4285         switch (acb->adapter_type) {
4286         case ACB_ADAPTER_TYPE_A:
4287                 arcmsr_hbaA_start_bgrb(acb);
4288                 break;
4289         case ACB_ADAPTER_TYPE_B:
4290                 arcmsr_hbaB_start_bgrb(acb);
4291                 break;
4292         case ACB_ADAPTER_TYPE_C:
4293                 arcmsr_hbaC_start_bgrb(acb);
4294                 break;
4295         case ACB_ADAPTER_TYPE_D:
4296                 arcmsr_hbaD_start_bgrb(acb);
4297                 break;
4298         case ACB_ADAPTER_TYPE_E:
4299         case ACB_ADAPTER_TYPE_F:
4300                 arcmsr_hbaE_start_bgrb(acb);
4301                 break;
4302         }
4303 }
4304
4305 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4306 {
4307         switch (acb->adapter_type) {
4308         case ACB_ADAPTER_TYPE_A: {
4309                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4310                 uint32_t outbound_doorbell;
4311                 /* empty doorbell Qbuffer if door bell ringed */
4312                 outbound_doorbell = readl(&reg->outbound_doorbell);
4313                 /*clear doorbell interrupt */
4314                 writel(outbound_doorbell, &reg->outbound_doorbell);
4315                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4316                 }
4317                 break;
4318
4319         case ACB_ADAPTER_TYPE_B: {
4320                 struct MessageUnit_B *reg = acb->pmuB;
4321                 uint32_t outbound_doorbell, i;
4322                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4323                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4324                 /* let IOP know data has been read */
4325                 for(i=0; i < 200; i++) {
4326                         msleep(20);
4327                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4328                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4329                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4330                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4331                         } else
4332                                 break;
4333                 }
4334                 }
4335                 break;
4336         case ACB_ADAPTER_TYPE_C: {
4337                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4338                 uint32_t outbound_doorbell, i;
4339                 /* empty doorbell Qbuffer if door bell ringed */
4340                 outbound_doorbell = readl(&reg->outbound_doorbell);
4341                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4342                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4343                 for (i = 0; i < 200; i++) {
4344                         msleep(20);
4345                         outbound_doorbell = readl(&reg->outbound_doorbell);
4346                         if (outbound_doorbell &
4347                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4348                                 writel(outbound_doorbell,
4349                                         &reg->outbound_doorbell_clear);
4350                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4351                                         &reg->inbound_doorbell);
4352                         } else
4353                                 break;
4354                 }
4355                 }
4356                 break;
4357         case ACB_ADAPTER_TYPE_D: {
4358                 struct MessageUnit_D *reg = acb->pmuD;
4359                 uint32_t outbound_doorbell, i;
4360                 /* empty doorbell Qbuffer if door bell ringed */
4361                 outbound_doorbell = readl(reg->outbound_doorbell);
4362                 writel(outbound_doorbell, reg->outbound_doorbell);
4363                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4364                         reg->inbound_doorbell);
4365                 for (i = 0; i < 200; i++) {
4366                         msleep(20);
4367                         outbound_doorbell = readl(reg->outbound_doorbell);
4368                         if (outbound_doorbell &
4369                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4370                                 writel(outbound_doorbell,
4371                                         reg->outbound_doorbell);
4372                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4373                                         reg->inbound_doorbell);
4374                         } else
4375                                 break;
4376                 }
4377                 }
4378                 break;
4379         case ACB_ADAPTER_TYPE_E:
4380         case ACB_ADAPTER_TYPE_F: {
4381                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4382                 uint32_t i, tmp;
4383
4384                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4385                 writel(0, &reg->host_int_status); /*clear interrupt*/
4386                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4387                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4388                 for(i=0; i < 200; i++) {
4389                         msleep(20);
4390                         tmp = acb->in_doorbell;
4391                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4392                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4393                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4394                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4395                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4396                         } else
4397                                 break;
4398                 }
4399                 }
4400                 break;
4401         }
4402 }
4403
4404 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4405 {
4406         switch (acb->adapter_type) {
4407         case ACB_ADAPTER_TYPE_A:
4408                 return;
4409         case ACB_ADAPTER_TYPE_B:
4410                 {
4411                         struct MessageUnit_B *reg = acb->pmuB;
4412                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4413                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4414                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4415                                 return;
4416                         }
4417                 }
4418                 break;
4419         case ACB_ADAPTER_TYPE_C:
4420                 return;
4421         }
4422         return;
4423 }
4424
4425 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4426 {
4427         uint8_t value[64];
4428         int i, count = 0;
4429         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4430         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4431         struct MessageUnit_D *pmuD = acb->pmuD;
4432
4433         /* backup pci config data */
4434         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4435         for (i = 0; i < 64; i++) {
4436                 pci_read_config_byte(acb->pdev, i, &value[i]);
4437         }
4438         /* hardware reset signal */
4439         if (acb->dev_id == 0x1680) {
4440                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4441         } else if (acb->dev_id == 0x1880) {
4442                 do {
4443                         count++;
4444                         writel(0xF, &pmuC->write_sequence);
4445                         writel(0x4, &pmuC->write_sequence);
4446                         writel(0xB, &pmuC->write_sequence);
4447                         writel(0x2, &pmuC->write_sequence);
4448                         writel(0x7, &pmuC->write_sequence);
4449                         writel(0xD, &pmuC->write_sequence);
4450                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4451                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4452         } else if (acb->dev_id == 0x1884) {
4453                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4454                 do {
4455                         count++;
4456                         writel(0x4, &pmuE->write_sequence_3xxx);
4457                         writel(0xB, &pmuE->write_sequence_3xxx);
4458                         writel(0x2, &pmuE->write_sequence_3xxx);
4459                         writel(0x7, &pmuE->write_sequence_3xxx);
4460                         writel(0xD, &pmuE->write_sequence_3xxx);
4461                         mdelay(10);
4462                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4463                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4464                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4465         } else if (acb->dev_id == 0x1214) {
4466                 writel(0x20, pmuD->reset_request);
4467         } else {
4468                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4469         }
4470         msleep(2000);
4471         /* write back pci config data */
4472         for (i = 0; i < 64; i++) {
4473                 pci_write_config_byte(acb->pdev, i, value[i]);
4474         }
4475         msleep(1000);
4476         return;
4477 }
4478
4479 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4480 {
4481         bool rtn = true;
4482
4483         switch(acb->adapter_type) {
4484         case ACB_ADAPTER_TYPE_A:{
4485                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4486                 rtn = ((readl(&reg->outbound_msgaddr1) &
4487                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4488                 }
4489                 break;
4490         case ACB_ADAPTER_TYPE_B:{
4491                 struct MessageUnit_B *reg = acb->pmuB;
4492                 rtn = ((readl(reg->iop2drv_doorbell) &
4493                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4494                 }
4495                 break;
4496         case ACB_ADAPTER_TYPE_C:{
4497                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4498                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4499                 }
4500                 break;
4501         case ACB_ADAPTER_TYPE_D:{
4502                 struct MessageUnit_D *reg = acb->pmuD;
4503                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4504                         true : false;
4505                 }
4506                 break;
4507         case ACB_ADAPTER_TYPE_E:
4508         case ACB_ADAPTER_TYPE_F:{
4509                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4510                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4511                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4512                 }
4513                 break;
4514         }
4515         return rtn;
4516 }
4517
4518 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4519 {
4520         uint32_t intmask_org;
4521         /* disable all outbound interrupt */
4522         intmask_org = arcmsr_disable_outbound_ints(acb);
4523         arcmsr_wait_firmware_ready(acb);
4524         arcmsr_iop_confirm(acb);
4525         /*start background rebuild*/
4526         arcmsr_start_adapter_bgrb(acb);
4527         /* empty doorbell Qbuffer if door bell ringed */
4528         arcmsr_clear_doorbell_queue_buffer(acb);
4529         arcmsr_enable_eoi_mode(acb);
4530         /* enable outbound Post Queue,outbound doorbell Interrupt */
4531         arcmsr_enable_outbound_ints(acb, intmask_org);
4532         acb->acb_flags |= ACB_F_IOP_INITED;
4533 }
4534
4535 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4536 {
4537         struct CommandControlBlock *ccb;
4538         uint32_t intmask_org;
4539         uint8_t rtnval = 0x00;
4540         int i = 0;
4541         unsigned long flags;
4542
4543         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4544                 /* disable all outbound interrupt */
4545                 intmask_org = arcmsr_disable_outbound_ints(acb);
4546                 /* talk to iop 331 outstanding command aborted */
4547                 rtnval = arcmsr_abort_allcmd(acb);
4548                 /* clear all outbound posted Q */
4549                 arcmsr_done4abort_postqueue(acb);
4550                 for (i = 0; i < acb->maxFreeCCB; i++) {
4551                         ccb = acb->pccb_pool[i];
4552                         if (ccb->startdone == ARCMSR_CCB_START) {
4553                                 scsi_dma_unmap(ccb->pcmd);
4554                                 ccb->startdone = ARCMSR_CCB_DONE;
4555                                 ccb->ccb_flags = 0;
4556                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4557                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4558                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4559                         }
4560                 }
4561                 atomic_set(&acb->ccboutstandingcount, 0);
4562                 /* enable all outbound interrupt */
4563                 arcmsr_enable_outbound_ints(acb, intmask_org);
4564                 return rtnval;
4565         }
4566         return rtnval;
4567 }
4568
4569 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4570 {
4571         struct AdapterControlBlock *acb;
4572         int retry_count = 0;
4573         int rtn = FAILED;
4574         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4575         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4576                 return SUCCESS;
4577         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4578                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4579         acb->num_resets++;
4580
4581         if (acb->acb_flags & ACB_F_BUS_RESET) {
4582                 long timeout;
4583                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4584                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4585                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4586                 if (timeout)
4587                         return SUCCESS;
4588         }
4589         acb->acb_flags |= ACB_F_BUS_RESET;
4590         if (!arcmsr_iop_reset(acb)) {
4591                 arcmsr_hardware_reset(acb);
4592                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4593 wait_reset_done:
4594                 ssleep(ARCMSR_SLEEPTIME);
4595                 if (arcmsr_reset_in_progress(acb)) {
4596                         if (retry_count > ARCMSR_RETRYCOUNT) {
4597                                 acb->fw_flag = FW_DEADLOCK;
4598                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4599                                         " return, RETRY TERMINATED!!\n",
4600                                         acb->host->host_no);
4601                                 return FAILED;
4602                         }
4603                         retry_count++;
4604                         goto wait_reset_done;
4605                 }
4606                 arcmsr_iop_init(acb);
4607                 acb->fw_flag = FW_NORMAL;
4608                 mod_timer(&acb->eternal_timer, jiffies +
4609                         msecs_to_jiffies(6 * HZ));
4610                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4611                 rtn = SUCCESS;
4612                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4613         } else {
4614                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4615                 acb->fw_flag = FW_NORMAL;
4616                 mod_timer(&acb->eternal_timer, jiffies +
4617                         msecs_to_jiffies(6 * HZ));
4618                 rtn = SUCCESS;
4619         }
4620         return rtn;
4621 }
4622
4623 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4624                 struct CommandControlBlock *ccb)
4625 {
4626         int rtn;
4627         rtn = arcmsr_polling_ccbdone(acb, ccb);
4628         return rtn;
4629 }
4630
4631 static int arcmsr_abort(struct scsi_cmnd *cmd)
4632 {
4633         struct AdapterControlBlock *acb =
4634                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4635         int i = 0;
4636         int rtn = FAILED;
4637         uint32_t intmask_org;
4638
4639         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4640                 return SUCCESS;
4641         printk(KERN_NOTICE
4642                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4643                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4644         acb->acb_flags |= ACB_F_ABORT;
4645         acb->num_aborts++;
4646         /*
4647         ************************************************
4648         ** the all interrupt service routine is locked
4649         ** we need to handle it as soon as possible and exit
4650         ************************************************
4651         */
4652         if (!atomic_read(&acb->ccboutstandingcount)) {
4653                 acb->acb_flags &= ~ACB_F_ABORT;
4654                 return rtn;
4655         }
4656
4657         intmask_org = arcmsr_disable_outbound_ints(acb);
4658         for (i = 0; i < acb->maxFreeCCB; i++) {
4659                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4660                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4661                         ccb->startdone = ARCMSR_CCB_ABORTED;
4662                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4663                         break;
4664                 }
4665         }
4666         acb->acb_flags &= ~ACB_F_ABORT;
4667         arcmsr_enable_outbound_ints(acb, intmask_org);
4668         return rtn;
4669 }
4670
4671 static const char *arcmsr_info(struct Scsi_Host *host)
4672 {
4673         struct AdapterControlBlock *acb =
4674                 (struct AdapterControlBlock *) host->hostdata;
4675         static char buf[256];
4676         char *type;
4677         int raid6 = 1;
4678         switch (acb->pdev->device) {
4679         case PCI_DEVICE_ID_ARECA_1110:
4680         case PCI_DEVICE_ID_ARECA_1200:
4681         case PCI_DEVICE_ID_ARECA_1202:
4682         case PCI_DEVICE_ID_ARECA_1210:
4683                 raid6 = 0;
4684                 fallthrough;
4685         case PCI_DEVICE_ID_ARECA_1120:
4686         case PCI_DEVICE_ID_ARECA_1130:
4687         case PCI_DEVICE_ID_ARECA_1160:
4688         case PCI_DEVICE_ID_ARECA_1170:
4689         case PCI_DEVICE_ID_ARECA_1201:
4690         case PCI_DEVICE_ID_ARECA_1203:
4691         case PCI_DEVICE_ID_ARECA_1220:
4692         case PCI_DEVICE_ID_ARECA_1230:
4693         case PCI_DEVICE_ID_ARECA_1260:
4694         case PCI_DEVICE_ID_ARECA_1270:
4695         case PCI_DEVICE_ID_ARECA_1280:
4696                 type = "SATA";
4697                 break;
4698         case PCI_DEVICE_ID_ARECA_1214:
4699         case PCI_DEVICE_ID_ARECA_1380:
4700         case PCI_DEVICE_ID_ARECA_1381:
4701         case PCI_DEVICE_ID_ARECA_1680:
4702         case PCI_DEVICE_ID_ARECA_1681:
4703         case PCI_DEVICE_ID_ARECA_1880:
4704         case PCI_DEVICE_ID_ARECA_1884:
4705                 type = "SAS/SATA";
4706                 break;
4707         case PCI_DEVICE_ID_ARECA_1886:
4708                 type = "NVMe/SAS/SATA";
4709                 break;
4710         default:
4711                 type = "unknown";
4712                 raid6 = 0;
4713                 break;
4714         }
4715         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4716                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4717         return buf;
4718 }