drivers/rtc/rtc-pm8xxx.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   3  */
   4 #include <linux/of.h>
   5 #include <linux/module.h>
   6 #include <linux/init.h>
   7 #include <linux/rtc.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/pm.h>
  10 #include <linux/pm_wakeirq.h>
  11 #include <linux/regmap.h>
  12 #include <linux/slab.h>
  13 #include <linux/spinlock.h>
  14
  15 /* RTC Register offsets from RTC CTRL REG */
  16 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  17 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  18 #define PM8XXX_RTC_READ_OFFSET          0x06
  19 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  20
  21 /* RTC_CTRL register bit fields */
  22 #define PM8xxx_RTC_ENABLE               BIT(7)
  23 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  24 #define PM8xxx_RTC_ALARM_ENABLE         BIT(7)
  25
  26 #define NUM_8_BIT_RTC_REGS              0x4
  27
  28 /**
  29  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  30  * @ctrl: base address of control register
  31  * @write: base address of write register
  32  * @read: base address of read register
  33  * @alarm_ctrl: base address of alarm control register
  34  * @alarm_ctrl2: base address of alarm control2 register
  35  * @alarm_rw: base address of alarm read-write register
  36  * @alarm_en: alarm enable mask
  37  */
  38 struct pm8xxx_rtc_regs {
  39         unsigned int ctrl;
  40         unsigned int write;
  41         unsigned int read;
  42         unsigned int alarm_ctrl;
  43         unsigned int alarm_ctrl2;
  44         unsigned int alarm_rw;
  45         unsigned int alarm_en;
  46 };
  47
  48 /**
  49  * struct pm8xxx_rtc -  rtc driver internal structure
  50  * @rtc:                rtc device for this driver.
  51  * @regmap:             regmap used to access RTC registers
  52  * @allow_set_time:     indicates whether writing to the RTC is allowed
  53  * @rtc_alarm_irq:      rtc alarm irq number.
  54  * @regs:               rtc registers description.
  55  * @rtc_dev:            device structure.
  56  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  57  */
  58 struct pm8xxx_rtc {
  59         struct rtc_device *rtc;
  60         struct regmap *regmap;
  61         bool allow_set_time;
  62         int rtc_alarm_irq;
  63         const struct pm8xxx_rtc_regs *regs;
  64         struct device *rtc_dev;
  65         spinlock_t ctrl_reg_lock;
  66 };
  67
  68 /*
  69  * Steps to write the RTC registers.
  70  * 1. Disable alarm if enabled.
  71  * 2. Disable rtc if enabled.
  72  * 3. Write 0x00 to LSB.
  73  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  74  * 5. Enable rtc if disabled in step 2.
  75  * 6. Enable alarm if disabled in step 1.
  76  */
  77 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  78 {
  79         int rc, i;
  80         unsigned long secs, irq_flags;
  81         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
  82         unsigned int ctrl_reg, rtc_ctrl_reg;
  83         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  84         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  85
  86         if (!rtc_dd->allow_set_time)
  87                 return -ENODEV;
  88
  89         secs = rtc_tm_to_time64(tm);
  90
  91         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
  92
  93         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
  94                 value[i] = secs & 0xFF;
  95                 secs >>= 8;
  96         }
  97
  98         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
  99
 100         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 101         if (rc)
 102                 goto rtc_rw_fail;
 103
 104         if (ctrl_reg & regs->alarm_en) {
 105                 alarm_enabled = 1;
 106                 ctrl_reg &= ~regs->alarm_en;
 107                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 108                 if (rc) {
 109                         dev_err(dev, "Write to RTC Alarm control register failed\n");
 110                         goto rtc_rw_fail;
 111                 }
 112         }
 113
 114         /* Disable RTC H/w before writing on RTC register */
 115         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
 116         if (rc)
 117                 goto rtc_rw_fail;
 118
 119         if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
 120                 rtc_disabled = 1;
 121                 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
 122                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
 123                 if (rc) {
 124                         dev_err(dev, "Write to RTC control register failed\n");
 125                         goto rtc_rw_fail;
 126                 }
 127         }
 128
 129         /* Write 0 to Byte[0] */
 130         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
 131         if (rc) {
 132                 dev_err(dev, "Write to RTC write data register failed\n");
 133                 goto rtc_rw_fail;
 134         }
 135
 136         /* Write Byte[1], Byte[2], Byte[3] */
 137         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
 138                                &value[1], sizeof(value) - 1);
 139         if (rc) {
 140                 dev_err(dev, "Write to RTC write data register failed\n");
 141                 goto rtc_rw_fail;
 142         }
 143
 144         /* Write Byte[0] */
 145         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
 146         if (rc) {
 147                 dev_err(dev, "Write to RTC write data register failed\n");
 148                 goto rtc_rw_fail;
 149         }
 150
 151         /* Enable RTC H/w after writing on RTC register */
 152         if (rtc_disabled) {
 153                 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
 154                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
 155                 if (rc) {
 156                         dev_err(dev, "Write to RTC control register failed\n");
 157                         goto rtc_rw_fail;
 158                 }
 159         }
 160
 161         if (alarm_enabled) {
 162                 ctrl_reg |= regs->alarm_en;
 163                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 164                 if (rc) {
 165                         dev_err(dev, "Write to RTC Alarm control register failed\n");
 166                         goto rtc_rw_fail;
 167                 }
 168         }
 169
 170 rtc_rw_fail:
 171         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 172
 173         return rc;
 174 }
 175
 176 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 177 {
 178         int rc;
 179         u8 value[NUM_8_BIT_RTC_REGS];
 180         unsigned long secs;
 181         unsigned int reg;
 182         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 183         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 184
 185         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
 186         if (rc) {
 187                 dev_err(dev, "RTC read data register failed\n");
 188                 return rc;
 189         }
 190
 191         /*
 192          * Read the LSB again and check if there has been a carry over.
 193          * If there is, redo the read operation.
 194          */
 195         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
 196         if (rc < 0) {
 197                 dev_err(dev, "RTC read data register failed\n");
 198                 return rc;
 199         }
 200
 201         if (unlikely(reg < value[0])) {
 202                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
 203                                       value, sizeof(value));
 204                 if (rc) {
 205                         dev_err(dev, "RTC read data register failed\n");
 206                         return rc;
 207                 }
 208         }
 209
 210         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 211                ((unsigned long)value[3] << 24);
 212
 213         rtc_time64_to_tm(secs, tm);
 214
 215         dev_dbg(dev, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs, tm, tm);
 216
 217         return 0;
 218 }
 219
 220 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 221 {
 222         int rc, i;
 223         u8 value[NUM_8_BIT_RTC_REGS];
 224         unsigned long secs, irq_flags;
 225         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 226         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 227
 228         secs = rtc_tm_to_time64(&alarm->time);
 229
 230         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 231                 value[i] = secs & 0xFF;
 232                 secs >>= 8;
 233         }
 234
 235         rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 236                                 regs->alarm_en, 0);
 237         if (rc)
 238                 return rc;
 239
 240         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 241
 242         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 243                                sizeof(value));
 244         if (rc) {
 245                 dev_err(dev, "Write to RTC ALARM register failed\n");
 246                 goto rtc_rw_fail;
 247         }
 248
 249         if (alarm->enabled) {
 250                 rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 251                                         regs->alarm_en, regs->alarm_en);
 252                 if (rc)
 253                         goto rtc_rw_fail;
 254         }
 255
 256         dev_dbg(dev, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n",
 257                 &alarm->time, &alarm->time);
 258 rtc_rw_fail:
 259         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 260         return rc;
 261 }
 262
 263 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 264 {
 265         int rc;
 266         unsigned int ctrl_reg;
 267         u8 value[NUM_8_BIT_RTC_REGS];
 268         unsigned long secs;
 269         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 270         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 271
 272         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
 273                               sizeof(value));
 274         if (rc) {
 275                 dev_err(dev, "RTC alarm time read failed\n");
 276                 return rc;
 277         }
 278
 279         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 280                ((unsigned long)value[3] << 24);
 281
 282         rtc_time64_to_tm(secs, &alarm->time);
 283
 284         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 285         if (rc) {
 286                 dev_err(dev, "Read from RTC alarm control register failed\n");
 287                 return rc;
 288         }
 289         alarm->enabled = !!(ctrl_reg & PM8xxx_RTC_ALARM_ENABLE);
 290
 291         dev_dbg(dev, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n",
 292                 &alarm->time, &alarm->time);
 293
 294         return 0;
 295 }
 296
 297 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 298 {
 299         int rc;
 300         unsigned long irq_flags;
 301         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 302         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 303         unsigned int ctrl_reg;
 304         u8 value[NUM_8_BIT_RTC_REGS] = {0};
 305
 306         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 307
 308         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 309         if (rc)
 310                 goto rtc_rw_fail;
 311
 312         if (enable)
 313                 ctrl_reg |= regs->alarm_en;
 314         else
 315                 ctrl_reg &= ~regs->alarm_en;
 316
 317         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 318         if (rc) {
 319                 dev_err(dev, "Write to RTC control register failed\n");
 320                 goto rtc_rw_fail;
 321         }
 322
 323         /* Clear Alarm register */
 324         if (!enable) {
 325                 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 326                                        sizeof(value));
 327                 if (rc) {
 328                         dev_err(dev, "Clear RTC ALARM register failed\n");
 329                         goto rtc_rw_fail;
 330                 }
 331         }
 332
 333 rtc_rw_fail:
 334         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 335         return rc;
 336 }
 337
 338 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 339         .read_time      = pm8xxx_rtc_read_time,
 340         .set_time       = pm8xxx_rtc_set_time,
 341         .set_alarm      = pm8xxx_rtc_set_alarm,
 342         .read_alarm     = pm8xxx_rtc_read_alarm,
 343         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 344 };
 345
 346 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 347 {
 348         struct pm8xxx_rtc *rtc_dd = dev_id;
 349         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 350         unsigned int ctrl_reg;
 351         int rc;
 352
 353         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 354
 355         spin_lock(&rtc_dd->ctrl_reg_lock);
 356
 357         /* Clear the alarm enable bit */
 358         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 359         if (rc) {
 360                 spin_unlock(&rtc_dd->ctrl_reg_lock);
 361                 goto rtc_alarm_handled;
 362         }
 363
 364         ctrl_reg &= ~regs->alarm_en;
 365
 366         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 367         if (rc) {
 368                 spin_unlock(&rtc_dd->ctrl_reg_lock);
 369                 dev_err(rtc_dd->rtc_dev,
 370                         "Write to alarm control register failed\n");
 371                 goto rtc_alarm_handled;
 372         }
 373
 374         spin_unlock(&rtc_dd->ctrl_reg_lock);
 375
 376         /* Clear RTC alarm register */
 377         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
 378         if (rc) {
 379                 dev_err(rtc_dd->rtc_dev,
 380                         "RTC Alarm control2 register read failed\n");
 381                 goto rtc_alarm_handled;
 382         }
 383
 384         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
 385         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
 386         if (rc)
 387                 dev_err(rtc_dd->rtc_dev,
 388                         "Write to RTC Alarm control2 register failed\n");
 389
 390 rtc_alarm_handled:
 391         return IRQ_HANDLED;
 392 }
 393
 394 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
 395 {
 396         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 397         unsigned int ctrl_reg;
 398         int rc;
 399
 400         /* Check if the RTC is on, else turn it on */
 401         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 402         if (rc)
 403                 return rc;
 404
 405         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
 406                 ctrl_reg |= PM8xxx_RTC_ENABLE;
 407                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 408                 if (rc)
 409                         return rc;
 410         }
 411
 412         return 0;
 413 }
 414
 415 static const struct pm8xxx_rtc_regs pm8921_regs = {
 416         .ctrl           = 0x11d,
 417         .write          = 0x11f,
 418         .read           = 0x123,
 419         .alarm_rw       = 0x127,
 420         .alarm_ctrl     = 0x11d,
 421         .alarm_ctrl2    = 0x11e,
 422         .alarm_en       = BIT(1),
 423 };
 424
 425 static const struct pm8xxx_rtc_regs pm8058_regs = {
 426         .ctrl           = 0x1e8,
 427         .write          = 0x1ea,
 428         .read           = 0x1ee,
 429         .alarm_rw       = 0x1f2,
 430         .alarm_ctrl     = 0x1e8,
 431         .alarm_ctrl2    = 0x1e9,
 432         .alarm_en       = BIT(1),
 433 };
 434
 435 static const struct pm8xxx_rtc_regs pm8941_regs = {
 436         .ctrl           = 0x6046,
 437         .write          = 0x6040,
 438         .read           = 0x6048,
 439         .alarm_rw       = 0x6140,
 440         .alarm_ctrl     = 0x6146,
 441         .alarm_ctrl2    = 0x6148,
 442         .alarm_en       = BIT(7),
 443 };
 444
 445 static const struct pm8xxx_rtc_regs pmk8350_regs = {
 446         .ctrl           = 0x6146,
 447         .write          = 0x6140,
 448         .read           = 0x6148,
 449         .alarm_rw       = 0x6240,
 450         .alarm_ctrl     = 0x6246,
 451         .alarm_ctrl2    = 0x6248,
 452         .alarm_en       = BIT(7),
 453 };
 454
 455 /*
 456  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 457  */
 458 static const struct of_device_id pm8xxx_id_table[] = {
 459         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
 460         { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
 461         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
 462         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
 463         { .compatible = "qcom,pmk8350-rtc", .data = &pmk8350_regs },
 464         { },
 465 };
 466 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 467
 468 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 469 {
 470         int rc;
 471         struct pm8xxx_rtc *rtc_dd;
 472         const struct of_device_id *match;
 473
 474         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 475         if (!match)
 476                 return -ENXIO;
 477
 478         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 479         if (rtc_dd == NULL)
 480                 return -ENOMEM;
 481
 482         /* Initialise spinlock to protect RTC control register */
 483         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 484
 485         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 486         if (!rtc_dd->regmap) {
 487                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 488                 return -ENXIO;
 489         }
 490
 491         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 492         if (rtc_dd->rtc_alarm_irq < 0)
 493                 return -ENXIO;
 494
 495         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 496                                                       "allow-set-time");
 497
 498         rtc_dd->regs = match->data;
 499         rtc_dd->rtc_dev = &pdev->dev;
 500
 501         rc = pm8xxx_rtc_enable(rtc_dd);
 502         if (rc)
 503                 return rc;
 504
 505         platform_set_drvdata(pdev, rtc_dd);
 506
 507         device_init_wakeup(&pdev->dev, 1);
 508
 509         /* Register the RTC device */
 510         rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev);
 511         if (IS_ERR(rtc_dd->rtc))
 512                 return PTR_ERR(rtc_dd->rtc);
 513
 514         rtc_dd->rtc->ops = &pm8xxx_rtc_ops;
 515         rtc_dd->rtc->range_max = U32_MAX;
 516
 517         /* Request the alarm IRQ */
 518         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 519                                           pm8xxx_alarm_trigger,
 520                                           IRQF_TRIGGER_RISING,
 521                                           "pm8xxx_rtc_alarm", rtc_dd);
 522         if (rc < 0) {
 523                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 524                 return rc;
 525         }
 526
 527         rc = devm_rtc_register_device(rtc_dd->rtc);
 528         if (rc)
 529                 return rc;
 530
 531         rc = dev_pm_set_wake_irq(&pdev->dev, rtc_dd->rtc_alarm_irq);
 532         if (rc)
 533                 return rc;
 534
 535         return 0;
 536 }
 537
 538 static int pm8xxx_remove(struct platform_device *pdev)
 539 {
 540         dev_pm_clear_wake_irq(&pdev->dev);
 541         return 0;
 542 }
 543
 544 static struct platform_driver pm8xxx_rtc_driver = {
 545         .probe          = pm8xxx_rtc_probe,
 546         .remove         = pm8xxx_remove,
 547         .driver = {
 548                 .name           = "rtc-pm8xxx",
 549                 .of_match_table = pm8xxx_id_table,
 550         },
 551 };
 552
 553 module_platform_driver(pm8xxx_rtc_driver);
 554
 555 MODULE_ALIAS("platform:rtc-pm8xxx");
 556 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 557 MODULE_LICENSE("GPL v2");
 558 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");