GNU Linux-libre 4.4.289-gnu1
[releases.git] / drivers / rtc / rtc-pm8xxx.c
1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12 #include <linux/of.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/rtc.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
21
22 /* RTC Register offsets from RTC CTRL REG */
23 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
24 #define PM8XXX_RTC_WRITE_OFFSET         0x02
25 #define PM8XXX_RTC_READ_OFFSET          0x06
26 #define PM8XXX_ALARM_RW_OFFSET          0x0A
27
28 /* RTC_CTRL register bit fields */
29 #define PM8xxx_RTC_ENABLE               BIT(7)
30 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
31
32 #define NUM_8_BIT_RTC_REGS              0x4
33
34 /**
35  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
36  * @ctrl: base address of control register
37  * @write: base address of write register
38  * @read: base address of read register
39  * @alarm_ctrl: base address of alarm control register
40  * @alarm_ctrl2: base address of alarm control2 register
41  * @alarm_rw: base address of alarm read-write register
42  * @alarm_en: alarm enable mask
43  */
44 struct pm8xxx_rtc_regs {
45         unsigned int ctrl;
46         unsigned int write;
47         unsigned int read;
48         unsigned int alarm_ctrl;
49         unsigned int alarm_ctrl2;
50         unsigned int alarm_rw;
51         unsigned int alarm_en;
52 };
53
54 /**
55  * struct pm8xxx_rtc -  rtc driver internal structure
56  * @rtc:                rtc device for this driver.
57  * @regmap:             regmap used to access RTC registers
58  * @allow_set_time:     indicates whether writing to the RTC is allowed
59  * @rtc_alarm_irq:      rtc alarm irq number.
60  * @ctrl_reg:           rtc control register.
61  * @rtc_dev:            device structure.
62  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
63  */
64 struct pm8xxx_rtc {
65         struct rtc_device *rtc;
66         struct regmap *regmap;
67         bool allow_set_time;
68         int rtc_alarm_irq;
69         const struct pm8xxx_rtc_regs *regs;
70         struct device *rtc_dev;
71         spinlock_t ctrl_reg_lock;
72 };
73
74 /*
75  * Steps to write the RTC registers.
76  * 1. Disable alarm if enabled.
77  * 2. Disable rtc if enabled.
78  * 3. Write 0x00 to LSB.
79  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
80  * 5. Enable rtc if disabled in step 2.
81  * 6. Enable alarm if disabled in step 1.
82  */
83 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
84 {
85         int rc, i;
86         unsigned long secs, irq_flags;
87         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
88         unsigned int ctrl_reg, rtc_ctrl_reg;
89         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
90         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
91
92         if (!rtc_dd->allow_set_time)
93                 return -EACCES;
94
95         rtc_tm_to_time(tm, &secs);
96
97         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
98
99         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
100                 value[i] = secs & 0xFF;
101                 secs >>= 8;
102         }
103
104         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
105
106         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
107         if (rc)
108                 goto rtc_rw_fail;
109
110         if (ctrl_reg & regs->alarm_en) {
111                 alarm_enabled = 1;
112                 ctrl_reg &= ~regs->alarm_en;
113                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
114                 if (rc) {
115                         dev_err(dev, "Write to RTC Alarm control register failed\n");
116                         goto rtc_rw_fail;
117                 }
118         }
119
120         /* Disable RTC H/w before writing on RTC register */
121         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
122         if (rc)
123                 goto rtc_rw_fail;
124
125         if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
126                 rtc_disabled = 1;
127                 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
128                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
129                 if (rc) {
130                         dev_err(dev, "Write to RTC control register failed\n");
131                         goto rtc_rw_fail;
132                 }
133         }
134
135         /* Write 0 to Byte[0] */
136         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
137         if (rc) {
138                 dev_err(dev, "Write to RTC write data register failed\n");
139                 goto rtc_rw_fail;
140         }
141
142         /* Write Byte[1], Byte[2], Byte[3] */
143         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
144                                &value[1], sizeof(value) - 1);
145         if (rc) {
146                 dev_err(dev, "Write to RTC write data register failed\n");
147                 goto rtc_rw_fail;
148         }
149
150         /* Write Byte[0] */
151         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
152         if (rc) {
153                 dev_err(dev, "Write to RTC write data register failed\n");
154                 goto rtc_rw_fail;
155         }
156
157         /* Enable RTC H/w after writing on RTC register */
158         if (rtc_disabled) {
159                 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
160                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
161                 if (rc) {
162                         dev_err(dev, "Write to RTC control register failed\n");
163                         goto rtc_rw_fail;
164                 }
165         }
166
167         if (alarm_enabled) {
168                 ctrl_reg |= regs->alarm_en;
169                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
170                 if (rc) {
171                         dev_err(dev, "Write to RTC Alarm control register failed\n");
172                         goto rtc_rw_fail;
173                 }
174         }
175
176 rtc_rw_fail:
177         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
178
179         return rc;
180 }
181
182 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
183 {
184         int rc;
185         u8 value[NUM_8_BIT_RTC_REGS];
186         unsigned long secs;
187         unsigned int reg;
188         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
189         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
190
191         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
192         if (rc) {
193                 dev_err(dev, "RTC read data register failed\n");
194                 return rc;
195         }
196
197         /*
198          * Read the LSB again and check if there has been a carry over.
199          * If there is, redo the read operation.
200          */
201         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
202         if (rc < 0) {
203                 dev_err(dev, "RTC read data register failed\n");
204                 return rc;
205         }
206
207         if (unlikely(reg < value[0])) {
208                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
209                                       value, sizeof(value));
210                 if (rc) {
211                         dev_err(dev, "RTC read data register failed\n");
212                         return rc;
213                 }
214         }
215
216         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
217                ((unsigned long)value[3] << 24);
218
219         rtc_time_to_tm(secs, tm);
220
221         rc = rtc_valid_tm(tm);
222         if (rc < 0) {
223                 dev_err(dev, "Invalid time read from RTC\n");
224                 return rc;
225         }
226
227         dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
228                 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
229                 tm->tm_mday, tm->tm_mon, tm->tm_year);
230
231         return 0;
232 }
233
234 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
235 {
236         int rc, i;
237         u8 value[NUM_8_BIT_RTC_REGS];
238         unsigned int ctrl_reg;
239         unsigned long secs, irq_flags;
240         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
241         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
242
243         rtc_tm_to_time(&alarm->time, &secs);
244
245         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
246                 value[i] = secs & 0xFF;
247                 secs >>= 8;
248         }
249
250         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
251
252         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
253                                sizeof(value));
254         if (rc) {
255                 dev_err(dev, "Write to RTC ALARM register failed\n");
256                 goto rtc_rw_fail;
257         }
258
259         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
260         if (rc)
261                 goto rtc_rw_fail;
262
263         if (alarm->enabled)
264                 ctrl_reg |= regs->alarm_en;
265         else
266                 ctrl_reg &= ~regs->alarm_en;
267
268         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
269         if (rc) {
270                 dev_err(dev, "Write to RTC alarm control register failed\n");
271                 goto rtc_rw_fail;
272         }
273
274         dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
275                 alarm->time.tm_hour, alarm->time.tm_min,
276                 alarm->time.tm_sec, alarm->time.tm_mday,
277                 alarm->time.tm_mon, alarm->time.tm_year);
278 rtc_rw_fail:
279         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
280         return rc;
281 }
282
283 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
284 {
285         int rc;
286         u8 value[NUM_8_BIT_RTC_REGS];
287         unsigned long secs;
288         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
289         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
290
291         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
292                               sizeof(value));
293         if (rc) {
294                 dev_err(dev, "RTC alarm time read failed\n");
295                 return rc;
296         }
297
298         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
299                ((unsigned long)value[3] << 24);
300
301         rtc_time_to_tm(secs, &alarm->time);
302
303         rc = rtc_valid_tm(&alarm->time);
304         if (rc < 0) {
305                 dev_err(dev, "Invalid alarm time read from RTC\n");
306                 return rc;
307         }
308
309         dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
310                 alarm->time.tm_hour, alarm->time.tm_min,
311                 alarm->time.tm_sec, alarm->time.tm_mday,
312                 alarm->time.tm_mon, alarm->time.tm_year);
313
314         return 0;
315 }
316
317 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
318 {
319         int rc;
320         unsigned long irq_flags;
321         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
322         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
323         unsigned int ctrl_reg;
324
325         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
326
327         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
328         if (rc)
329                 goto rtc_rw_fail;
330
331         if (enable)
332                 ctrl_reg |= regs->alarm_en;
333         else
334                 ctrl_reg &= ~regs->alarm_en;
335
336         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
337         if (rc) {
338                 dev_err(dev, "Write to RTC control register failed\n");
339                 goto rtc_rw_fail;
340         }
341
342 rtc_rw_fail:
343         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
344         return rc;
345 }
346
347 static const struct rtc_class_ops pm8xxx_rtc_ops = {
348         .read_time      = pm8xxx_rtc_read_time,
349         .set_time       = pm8xxx_rtc_set_time,
350         .set_alarm      = pm8xxx_rtc_set_alarm,
351         .read_alarm     = pm8xxx_rtc_read_alarm,
352         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
353 };
354
355 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
356 {
357         struct pm8xxx_rtc *rtc_dd = dev_id;
358         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
359         unsigned int ctrl_reg;
360         int rc;
361         unsigned long irq_flags;
362
363         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
364
365         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
366
367         /* Clear the alarm enable bit */
368         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
369         if (rc) {
370                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
371                 goto rtc_alarm_handled;
372         }
373
374         ctrl_reg &= ~regs->alarm_en;
375
376         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
377         if (rc) {
378                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
379                 dev_err(rtc_dd->rtc_dev,
380                         "Write to alarm control register failed\n");
381                 goto rtc_alarm_handled;
382         }
383
384         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
385
386         /* Clear RTC alarm register */
387         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
388         if (rc) {
389                 dev_err(rtc_dd->rtc_dev,
390                         "RTC Alarm control2 register read failed\n");
391                 goto rtc_alarm_handled;
392         }
393
394         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
395         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
396         if (rc)
397                 dev_err(rtc_dd->rtc_dev,
398                         "Write to RTC Alarm control2 register failed\n");
399
400 rtc_alarm_handled:
401         return IRQ_HANDLED;
402 }
403
404 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
405 {
406         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
407         unsigned int ctrl_reg;
408         int rc;
409
410         /* Check if the RTC is on, else turn it on */
411         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
412         if (rc)
413                 return rc;
414
415         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
416                 ctrl_reg |= PM8xxx_RTC_ENABLE;
417                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
418                 if (rc)
419                         return rc;
420         }
421
422         return 0;
423 }
424
425 static const struct pm8xxx_rtc_regs pm8921_regs = {
426         .ctrl           = 0x11d,
427         .write          = 0x11f,
428         .read           = 0x123,
429         .alarm_rw       = 0x127,
430         .alarm_ctrl     = 0x11d,
431         .alarm_ctrl2    = 0x11e,
432         .alarm_en       = BIT(1),
433 };
434
435 static const struct pm8xxx_rtc_regs pm8058_regs = {
436         .ctrl           = 0x1e8,
437         .write          = 0x1ea,
438         .read           = 0x1ee,
439         .alarm_rw       = 0x1f2,
440         .alarm_ctrl     = 0x1e8,
441         .alarm_ctrl2    = 0x1e9,
442         .alarm_en       = BIT(1),
443 };
444
445 static const struct pm8xxx_rtc_regs pm8941_regs = {
446         .ctrl           = 0x6046,
447         .write          = 0x6040,
448         .read           = 0x6048,
449         .alarm_rw       = 0x6140,
450         .alarm_ctrl     = 0x6146,
451         .alarm_ctrl2    = 0x6148,
452         .alarm_en       = BIT(7),
453 };
454
455 /*
456  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
457  */
458 static const struct of_device_id pm8xxx_id_table[] = {
459         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
460         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
461         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
462         { },
463 };
464 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
465
466 static int pm8xxx_rtc_probe(struct platform_device *pdev)
467 {
468         int rc;
469         struct pm8xxx_rtc *rtc_dd;
470         const struct of_device_id *match;
471
472         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
473         if (!match)
474                 return -ENXIO;
475
476         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
477         if (rtc_dd == NULL)
478                 return -ENOMEM;
479
480         /* Initialise spinlock to protect RTC control register */
481         spin_lock_init(&rtc_dd->ctrl_reg_lock);
482
483         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
484         if (!rtc_dd->regmap) {
485                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
486                 return -ENXIO;
487         }
488
489         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
490         if (rtc_dd->rtc_alarm_irq < 0) {
491                 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
492                 return -ENXIO;
493         }
494
495         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
496                                                       "allow-set-time");
497
498         rtc_dd->regs = match->data;
499         rtc_dd->rtc_dev = &pdev->dev;
500
501         rc = pm8xxx_rtc_enable(rtc_dd);
502         if (rc)
503                 return rc;
504
505         platform_set_drvdata(pdev, rtc_dd);
506
507         device_init_wakeup(&pdev->dev, 1);
508
509         /* Register the RTC device */
510         rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
511                                                &pm8xxx_rtc_ops, THIS_MODULE);
512         if (IS_ERR(rtc_dd->rtc)) {
513                 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
514                         __func__, PTR_ERR(rtc_dd->rtc));
515                 return PTR_ERR(rtc_dd->rtc);
516         }
517
518         /* Request the alarm IRQ */
519         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
520                                           pm8xxx_alarm_trigger,
521                                           IRQF_TRIGGER_RISING,
522                                           "pm8xxx_rtc_alarm", rtc_dd);
523         if (rc < 0) {
524                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
525                 return rc;
526         }
527
528         dev_dbg(&pdev->dev, "Probe success !!\n");
529
530         return 0;
531 }
532
533 #ifdef CONFIG_PM_SLEEP
534 static int pm8xxx_rtc_resume(struct device *dev)
535 {
536         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
537
538         if (device_may_wakeup(dev))
539                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
540
541         return 0;
542 }
543
544 static int pm8xxx_rtc_suspend(struct device *dev)
545 {
546         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
547
548         if (device_may_wakeup(dev))
549                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
550
551         return 0;
552 }
553 #endif
554
555 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
556                          pm8xxx_rtc_suspend,
557                          pm8xxx_rtc_resume);
558
559 static struct platform_driver pm8xxx_rtc_driver = {
560         .probe          = pm8xxx_rtc_probe,
561         .driver = {
562                 .name           = "rtc-pm8xxx",
563                 .pm             = &pm8xxx_rtc_pm_ops,
564                 .of_match_table = pm8xxx_id_table,
565         },
566 };
567
568 module_platform_driver(pm8xxx_rtc_driver);
569
570 MODULE_ALIAS("platform:rtc-pm8xxx");
571 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
572 MODULE_LICENSE("GPL v2");
573 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");