drivers/rtc/rtc-pm8xxx.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   3  */
   4 #include <linux/of.h>
   5 #include <linux/module.h>
   6 #include <linux/init.h>
   7 #include <linux/rtc.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/pm.h>
  10 #include <linux/regmap.h>
  11 #include <linux/slab.h>
  12 #include <linux/spinlock.h>
  13
  14 /* RTC Register offsets from RTC CTRL REG */
  15 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  16 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  17 #define PM8XXX_RTC_READ_OFFSET          0x06
  18 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  19
  20 /* RTC_CTRL register bit fields */
  21 #define PM8xxx_RTC_ENABLE               BIT(7)
  22 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  23
  24 #define NUM_8_BIT_RTC_REGS              0x4
  25
  26 /**
  27  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  28  * @ctrl: base address of control register
  29  * @write: base address of write register
  30  * @read: base address of read register
  31  * @alarm_ctrl: base address of alarm control register
  32  * @alarm_ctrl2: base address of alarm control2 register
  33  * @alarm_rw: base address of alarm read-write register
  34  * @alarm_en: alarm enable mask
  35  */
  36 struct pm8xxx_rtc_regs {
  37         unsigned int ctrl;
  38         unsigned int write;
  39         unsigned int read;
  40         unsigned int alarm_ctrl;
  41         unsigned int alarm_ctrl2;
  42         unsigned int alarm_rw;
  43         unsigned int alarm_en;
  44 };
  45
  46 /**
  47  * struct pm8xxx_rtc -  rtc driver internal structure
  48  * @rtc:                rtc device for this driver.
  49  * @regmap:             regmap used to access RTC registers
  50  * @allow_set_time:     indicates whether writing to the RTC is allowed
  51  * @rtc_alarm_irq:      rtc alarm irq number.
  52  * @regs:               rtc registers description.
  53  * @rtc_dev:            device structure.
  54  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  55  */
  56 struct pm8xxx_rtc {
  57         struct rtc_device *rtc;
  58         struct regmap *regmap;
  59         bool allow_set_time;
  60         int rtc_alarm_irq;
  61         const struct pm8xxx_rtc_regs *regs;
  62         struct device *rtc_dev;
  63         spinlock_t ctrl_reg_lock;
  64 };
  65
  66 /*
  67  * Steps to write the RTC registers.
  68  * 1. Disable alarm if enabled.
  69  * 2. Disable rtc if enabled.
  70  * 3. Write 0x00 to LSB.
  71  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  72  * 5. Enable rtc if disabled in step 2.
  73  * 6. Enable alarm if disabled in step 1.
  74  */
  75 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  76 {
  77         int rc, i;
  78         unsigned long secs, irq_flags;
  79         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
  80         unsigned int ctrl_reg, rtc_ctrl_reg;
  81         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  82         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  83
  84         if (!rtc_dd->allow_set_time)
  85                 return -EACCES;
  86
  87         secs = rtc_tm_to_time64(tm);
  88
  89         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
  90
  91         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
  92                 value[i] = secs & 0xFF;
  93                 secs >>= 8;
  94         }
  95
  96         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
  97
  98         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
  99         if (rc)
 100                 goto rtc_rw_fail;
 101
 102         if (ctrl_reg & regs->alarm_en) {
 103                 alarm_enabled = 1;
 104                 ctrl_reg &= ~regs->alarm_en;
 105                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 106                 if (rc) {
 107                         dev_err(dev, "Write to RTC Alarm control register failed\n");
 108                         goto rtc_rw_fail;
 109                 }
 110         }
 111
 112         /* Disable RTC H/w before writing on RTC register */
 113         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
 114         if (rc)
 115                 goto rtc_rw_fail;
 116
 117         if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
 118                 rtc_disabled = 1;
 119                 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
 120                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
 121                 if (rc) {
 122                         dev_err(dev, "Write to RTC control register failed\n");
 123                         goto rtc_rw_fail;
 124                 }
 125         }
 126
 127         /* Write 0 to Byte[0] */
 128         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
 129         if (rc) {
 130                 dev_err(dev, "Write to RTC write data register failed\n");
 131                 goto rtc_rw_fail;
 132         }
 133
 134         /* Write Byte[1], Byte[2], Byte[3] */
 135         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
 136                                &value[1], sizeof(value) - 1);
 137         if (rc) {
 138                 dev_err(dev, "Write to RTC write data register failed\n");
 139                 goto rtc_rw_fail;
 140         }
 141
 142         /* Write Byte[0] */
 143         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
 144         if (rc) {
 145                 dev_err(dev, "Write to RTC write data register failed\n");
 146                 goto rtc_rw_fail;
 147         }
 148
 149         /* Enable RTC H/w after writing on RTC register */
 150         if (rtc_disabled) {
 151                 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
 152                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
 153                 if (rc) {
 154                         dev_err(dev, "Write to RTC control register failed\n");
 155                         goto rtc_rw_fail;
 156                 }
 157         }
 158
 159         if (alarm_enabled) {
 160                 ctrl_reg |= regs->alarm_en;
 161                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 162                 if (rc) {
 163                         dev_err(dev, "Write to RTC Alarm control register failed\n");
 164                         goto rtc_rw_fail;
 165                 }
 166         }
 167
 168 rtc_rw_fail:
 169         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 170
 171         return rc;
 172 }
 173
 174 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 175 {
 176         int rc;
 177         u8 value[NUM_8_BIT_RTC_REGS];
 178         unsigned long secs;
 179         unsigned int reg;
 180         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 181         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 182
 183         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
 184         if (rc) {
 185                 dev_err(dev, "RTC read data register failed\n");
 186                 return rc;
 187         }
 188
 189         /*
 190          * Read the LSB again and check if there has been a carry over.
 191          * If there is, redo the read operation.
 192          */
 193         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
 194         if (rc < 0) {
 195                 dev_err(dev, "RTC read data register failed\n");
 196                 return rc;
 197         }
 198
 199         if (unlikely(reg < value[0])) {
 200                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
 201                                       value, sizeof(value));
 202                 if (rc) {
 203                         dev_err(dev, "RTC read data register failed\n");
 204                         return rc;
 205                 }
 206         }
 207
 208         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 209                ((unsigned long)value[3] << 24);
 210
 211         rtc_time64_to_tm(secs, tm);
 212
 213         dev_dbg(dev, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs, tm, tm);
 214
 215         return 0;
 216 }
 217
 218 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 219 {
 220         int rc, i;
 221         u8 value[NUM_8_BIT_RTC_REGS];
 222         unsigned long secs, irq_flags;
 223         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 224         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 225
 226         secs = rtc_tm_to_time64(&alarm->time);
 227
 228         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 229                 value[i] = secs & 0xFF;
 230                 secs >>= 8;
 231         }
 232
 233         rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 234                                 regs->alarm_en, 0);
 235         if (rc)
 236                 return rc;
 237
 238         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 239
 240         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 241                                sizeof(value));
 242         if (rc) {
 243                 dev_err(dev, "Write to RTC ALARM register failed\n");
 244                 goto rtc_rw_fail;
 245         }
 246
 247         if (alarm->enabled) {
 248                 rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 249                                         regs->alarm_en, regs->alarm_en);
 250                 if (rc)
 251                         goto rtc_rw_fail;
 252         }
 253
 254         dev_dbg(dev, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n",
 255                 &alarm->time, &alarm->time);
 256 rtc_rw_fail:
 257         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 258         return rc;
 259 }
 260
 261 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 262 {
 263         int rc;
 264         u8 value[NUM_8_BIT_RTC_REGS];
 265         unsigned long secs;
 266         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 267         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 268
 269         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
 270                               sizeof(value));
 271         if (rc) {
 272                 dev_err(dev, "RTC alarm time read failed\n");
 273                 return rc;
 274         }
 275
 276         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 277                ((unsigned long)value[3] << 24);
 278
 279         rtc_time64_to_tm(secs, &alarm->time);
 280
 281         dev_dbg(dev, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n",
 282                 &alarm->time, &alarm->time);
 283
 284         return 0;
 285 }
 286
 287 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 288 {
 289         int rc;
 290         unsigned long irq_flags;
 291         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 292         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 293         unsigned int ctrl_reg;
 294         u8 value[NUM_8_BIT_RTC_REGS] = {0};
 295
 296         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 297
 298         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 299         if (rc)
 300                 goto rtc_rw_fail;
 301
 302         if (enable)
 303                 ctrl_reg |= regs->alarm_en;
 304         else
 305                 ctrl_reg &= ~regs->alarm_en;
 306
 307         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 308         if (rc) {
 309                 dev_err(dev, "Write to RTC control register failed\n");
 310                 goto rtc_rw_fail;
 311         }
 312
 313         /* Clear Alarm register */
 314         if (!enable) {
 315                 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 316                                        sizeof(value));
 317                 if (rc) {
 318                         dev_err(dev, "Clear RTC ALARM register failed\n");
 319                         goto rtc_rw_fail;
 320                 }
 321         }
 322
 323 rtc_rw_fail:
 324         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 325         return rc;
 326 }
 327
 328 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 329         .read_time      = pm8xxx_rtc_read_time,
 330         .set_time       = pm8xxx_rtc_set_time,
 331         .set_alarm      = pm8xxx_rtc_set_alarm,
 332         .read_alarm     = pm8xxx_rtc_read_alarm,
 333         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 334 };
 335
 336 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 337 {
 338         struct pm8xxx_rtc *rtc_dd = dev_id;
 339         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 340         unsigned int ctrl_reg;
 341         int rc;
 342         unsigned long irq_flags;
 343
 344         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 345
 346         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 347
 348         /* Clear the alarm enable bit */
 349         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 350         if (rc) {
 351                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 352                 goto rtc_alarm_handled;
 353         }
 354
 355         ctrl_reg &= ~regs->alarm_en;
 356
 357         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 358         if (rc) {
 359                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 360                 dev_err(rtc_dd->rtc_dev,
 361                         "Write to alarm control register failed\n");
 362                 goto rtc_alarm_handled;
 363         }
 364
 365         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 366
 367         /* Clear RTC alarm register */
 368         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
 369         if (rc) {
 370                 dev_err(rtc_dd->rtc_dev,
 371                         "RTC Alarm control2 register read failed\n");
 372                 goto rtc_alarm_handled;
 373         }
 374
 375         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
 376         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
 377         if (rc)
 378                 dev_err(rtc_dd->rtc_dev,
 379                         "Write to RTC Alarm control2 register failed\n");
 380
 381 rtc_alarm_handled:
 382         return IRQ_HANDLED;
 383 }
 384
 385 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
 386 {
 387         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 388         unsigned int ctrl_reg;
 389         int rc;
 390
 391         /* Check if the RTC is on, else turn it on */
 392         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 393         if (rc)
 394                 return rc;
 395
 396         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
 397                 ctrl_reg |= PM8xxx_RTC_ENABLE;
 398                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 399                 if (rc)
 400                         return rc;
 401         }
 402
 403         return 0;
 404 }
 405
 406 static const struct pm8xxx_rtc_regs pm8921_regs = {
 407         .ctrl           = 0x11d,
 408         .write          = 0x11f,
 409         .read           = 0x123,
 410         .alarm_rw       = 0x127,
 411         .alarm_ctrl     = 0x11d,
 412         .alarm_ctrl2    = 0x11e,
 413         .alarm_en       = BIT(1),
 414 };
 415
 416 static const struct pm8xxx_rtc_regs pm8058_regs = {
 417         .ctrl           = 0x1e8,
 418         .write          = 0x1ea,
 419         .read           = 0x1ee,
 420         .alarm_rw       = 0x1f2,
 421         .alarm_ctrl     = 0x1e8,
 422         .alarm_ctrl2    = 0x1e9,
 423         .alarm_en       = BIT(1),
 424 };
 425
 426 static const struct pm8xxx_rtc_regs pm8941_regs = {
 427         .ctrl           = 0x6046,
 428         .write          = 0x6040,
 429         .read           = 0x6048,
 430         .alarm_rw       = 0x6140,
 431         .alarm_ctrl     = 0x6146,
 432         .alarm_ctrl2    = 0x6148,
 433         .alarm_en       = BIT(7),
 434 };
 435
 436 /*
 437  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 438  */
 439 static const struct of_device_id pm8xxx_id_table[] = {
 440         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
 441         { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
 442         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
 443         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
 444         { },
 445 };
 446 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 447
 448 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 449 {
 450         int rc;
 451         struct pm8xxx_rtc *rtc_dd;
 452         const struct of_device_id *match;
 453
 454         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 455         if (!match)
 456                 return -ENXIO;
 457
 458         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 459         if (rtc_dd == NULL)
 460                 return -ENOMEM;
 461
 462         /* Initialise spinlock to protect RTC control register */
 463         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 464
 465         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 466         if (!rtc_dd->regmap) {
 467                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 468                 return -ENXIO;
 469         }
 470
 471         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 472         if (rtc_dd->rtc_alarm_irq < 0)
 473                 return -ENXIO;
 474
 475         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 476                                                       "allow-set-time");
 477
 478         rtc_dd->regs = match->data;
 479         rtc_dd->rtc_dev = &pdev->dev;
 480
 481         rc = pm8xxx_rtc_enable(rtc_dd);
 482         if (rc)
 483                 return rc;
 484
 485         platform_set_drvdata(pdev, rtc_dd);
 486
 487         device_init_wakeup(&pdev->dev, 1);
 488
 489         /* Register the RTC device */
 490         rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev);
 491         if (IS_ERR(rtc_dd->rtc))
 492                 return PTR_ERR(rtc_dd->rtc);
 493
 494         rtc_dd->rtc->ops = &pm8xxx_rtc_ops;
 495         rtc_dd->rtc->range_max = U32_MAX;
 496
 497         /* Request the alarm IRQ */
 498         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 499                                           pm8xxx_alarm_trigger,
 500                                           IRQF_TRIGGER_RISING,
 501                                           "pm8xxx_rtc_alarm", rtc_dd);
 502         if (rc < 0) {
 503                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 504                 return rc;
 505         }
 506
 507         return rtc_register_device(rtc_dd->rtc);
 508 }
 509
 510 #ifdef CONFIG_PM_SLEEP
 511 static int pm8xxx_rtc_resume(struct device *dev)
 512 {
 513         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 514
 515         if (device_may_wakeup(dev))
 516                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
 517
 518         return 0;
 519 }
 520
 521 static int pm8xxx_rtc_suspend(struct device *dev)
 522 {
 523         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 524
 525         if (device_may_wakeup(dev))
 526                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
 527
 528         return 0;
 529 }
 530 #endif
 531
 532 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
 533                          pm8xxx_rtc_suspend,
 534                          pm8xxx_rtc_resume);
 535
 536 static struct platform_driver pm8xxx_rtc_driver = {
 537         .probe          = pm8xxx_rtc_probe,
 538         .driver = {
 539                 .name           = "rtc-pm8xxx",
 540                 .pm             = &pm8xxx_rtc_pm_ops,
 541                 .of_match_table = pm8xxx_id_table,
 542         },
 543 };
 544
 545 module_platform_driver(pm8xxx_rtc_driver);
 546
 547 MODULE_ALIAS("platform:rtc-pm8xxx");
 548 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 549 MODULE_LICENSE("GPL v2");
 550 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");