1 # SPDX-License-Identifier: GPL-2.0-only
2 config ARCH_HAS_RESET_CONTROLLER
5 menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
36 This enables the reset controller driver for AXS10x.
39 bool "Berlin Reset Driver" if COMPILE_TEST
42 This enables the reset controller driver for Marvell Berlin SoCs.
45 tristate "Broadcom STB reset controller"
46 depends on ARCH_BRCMSTB || COMPILE_TEST
49 This enables the reset controller driver for Broadcom STB SoCs using
50 a SUN_TOP_CTRL_SW_INIT style controller.
52 config RESET_BRCMSTB_RESCAL
53 bool "Broadcom STB RESCAL reset controller"
55 depends on ARCH_BRCMSTB || COMPILE_TEST
58 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
62 bool "Synopsys HSDK Reset Driver"
64 depends on ARC_SOC_HSDK || COMPILE_TEST
66 This enables the reset controller driver for HSDK board.
69 tristate "i.MX7/8 Reset Driver"
71 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
72 default y if SOC_IMX7D
75 This enables the reset controller driver for i.MX7 SoCs.
78 bool "Intel Reset Controller Driver"
79 depends on X86 || COMPILE_TEST
80 depends on OF && HAS_IOMEM
83 This enables the reset controller driver for Intel Gateway SoCs.
84 Say Y to control the reset signals provided by reset controller.
88 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
91 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
94 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
97 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
100 bool "Meson Reset Driver" if COMPILE_TEST
103 This enables the reset driver for Amlogic Meson SoCs.
105 config RESET_MESON_AUDIO_ARB
106 tristate "Meson Audio Memory Arbiter Reset Driver"
107 depends on ARCH_MESON || COMPILE_TEST
109 This enables the reset driver for Audio Memory Arbiter of
110 Amlogic's A113 based SoCs
113 bool "NPCM BMC Reset Driver" if COMPILE_TEST
116 This enables the reset controller driver for Nuvoton NPCM
122 config RESET_PISTACHIO
123 bool "Pistachio Reset Driver" if COMPILE_TEST
124 default MACH_PISTACHIO
126 This enables the reset driver for ImgTec Pistachio SoCs.
128 config RESET_QCOM_AOSS
129 tristate "Qcom AOSS Reset Driver"
130 depends on ARCH_QCOM || COMPILE_TEST
132 This enables the AOSS (always on subsystem) reset driver
133 for Qualcomm SDM845 SoCs. Say Y if you want to control
134 reset signals provided by AOSS for Modem, Venus, ADSP,
135 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
137 config RESET_QCOM_PDC
138 tristate "Qualcomm PDC Reset Driver"
139 depends on ARCH_QCOM || COMPILE_TEST
141 This enables the PDC (Power Domain Controller) reset driver
142 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
143 to control reset signals provided by PDC for Modem, Compute,
144 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
146 config RESET_RASPBERRYPI
147 tristate "Raspberry Pi 4 Firmware Reset Driver"
148 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
151 Raspberry Pi 4's co-processor controls some of the board's HW
152 initialization process, but it's up to Linux to trigger it when
153 relevant. This driver provides a reset controller capable of
154 interfacing with RPi4's co-processor and model these firmware
155 initialization routines as reset lines.
158 tristate "Reset driver controlled via ARM SCMI interface"
159 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
160 default ARM_SCMI_PROTOCOL
162 This driver provides support for reset signal/domains that are
163 controlled by firmware that implements the SCMI interface.
165 This driver uses SCMI Message Protocol to interact with the
166 firmware controlling all the reset signals.
169 bool "Simple Reset Controller Driver" if COMPILE_TEST
170 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
172 This enables a simple reset controller driver for reset lines that
173 that can be asserted and deasserted by toggling bits in a contiguous,
174 exclusive register space.
176 Currently this driver supports:
181 - RCC reset controller in STM32 MCUs
183 - ZTE's zx2967 family
185 config RESET_STM32MP157
186 bool "STM32MP157 Reset Driver" if COMPILE_TEST
187 default MACH_STM32MP157
189 This enables the RCC reset controller driver for STM32 MPUs.
192 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
196 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
197 driver gets initialized early during platform init calls.
200 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
204 This enables the reset driver for Allwinner SoCs.
207 tristate "TI System Control Interface (TI-SCI) reset driver"
208 depends on TI_SCI_PROTOCOL
210 This enables the reset driver support over TI System Control Interface
211 available on some new TI's SoCs. If you wish to use reset resources
212 managed by the TI System Controller, say Y here. Otherwise, say N.
214 config RESET_TI_SYSCON
215 tristate "TI SYSCON Reset Driver"
219 This enables the reset driver support for TI devices with
220 memory-mapped reset registers as part of a syscon device node. If
221 you wish to use the reset framework for such memory-mapped devices,
222 say Y here. Otherwise, say N.
224 config RESET_UNIPHIER
225 tristate "Reset controller driver for UniPhier SoCs"
226 depends on ARCH_UNIPHIER || COMPILE_TEST
227 depends on OF && MFD_SYSCON
228 default ARCH_UNIPHIER
230 Support for reset controllers on UniPhier SoCs.
231 Say Y if you want to control reset signals provided by System Control
232 block, Media I/O block, Peripheral Block.
234 config RESET_UNIPHIER_GLUE
235 tristate "Reset driver in glue layer for UniPhier SoCs"
236 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
237 default ARCH_UNIPHIER
240 Support for peripheral core reset included in its own glue layer
241 on UniPhier SoCs. Say Y if you want to control reset signals
242 provided by the glue layer.
245 bool "ZYNQ Reset Driver" if COMPILE_TEST
248 This enables the reset controller driver for Xilinx Zynq SoCs.
250 source "drivers/reset/sti/Kconfig"
251 source "drivers/reset/hisilicon/Kconfig"
252 source "drivers/reset/tegra/Kconfig"