1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015, Sony Mobile Communications AB.
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
7 #include <linux/module.h>
9 #include <linux/of_device.h>
10 #include <linux/platform_device.h>
11 #include <linux/regulator/driver.h>
12 #include <linux/regulator/of_regulator.h>
13 #include <linux/soc/qcom/smd-rpm.h>
18 struct qcom_smd_rpm *rpm;
23 struct regulator_desc desc;
29 unsigned int enabled_updated:1;
30 unsigned int uv_updated:1;
31 unsigned int load_updated:1;
34 struct rpm_regulator_req {
40 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
41 #define RPM_KEY_UV 0x00007675 /* "uv" */
42 #define RPM_KEY_MA 0x0000616d /* "ma" */
44 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
46 struct rpm_regulator_req req[3];
50 if (vreg->enabled_updated) {
51 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
52 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
53 req[reqlen].value = cpu_to_le32(vreg->is_enabled);
57 if (vreg->uv_updated && vreg->is_enabled) {
58 req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
59 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
60 req[reqlen].value = cpu_to_le32(vreg->uV);
64 if (vreg->load_updated && vreg->is_enabled) {
65 req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
66 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
67 req[reqlen].value = cpu_to_le32(vreg->load / 1000);
74 ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
76 req, sizeof(req[0]) * reqlen);
78 vreg->enabled_updated = 0;
80 vreg->load_updated = 0;
86 static int rpm_reg_enable(struct regulator_dev *rdev)
88 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
92 vreg->enabled_updated = 1;
94 ret = rpm_reg_write_active(vreg);
101 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
103 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
105 return vreg->is_enabled;
108 static int rpm_reg_disable(struct regulator_dev *rdev)
110 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
113 vreg->is_enabled = 0;
114 vreg->enabled_updated = 1;
116 ret = rpm_reg_write_active(vreg);
118 vreg->is_enabled = 1;
123 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
125 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
130 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
135 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
137 int old_uV = vreg->uV;
140 vreg->uv_updated = 1;
142 ret = rpm_reg_write_active(vreg);
149 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
151 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
152 u32 old_load = vreg->load;
155 vreg->load = load_uA;
156 vreg->load_updated = 1;
157 ret = rpm_reg_write_active(vreg);
159 vreg->load = old_load;
164 static const struct regulator_ops rpm_smps_ldo_ops = {
165 .enable = rpm_reg_enable,
166 .disable = rpm_reg_disable,
167 .is_enabled = rpm_reg_is_enabled,
168 .list_voltage = regulator_list_voltage_linear_range,
170 .get_voltage = rpm_reg_get_voltage,
171 .set_voltage = rpm_reg_set_voltage,
173 .set_load = rpm_reg_set_load,
176 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
177 .enable = rpm_reg_enable,
178 .disable = rpm_reg_disable,
179 .is_enabled = rpm_reg_is_enabled,
181 .get_voltage = rpm_reg_get_voltage,
182 .set_voltage = rpm_reg_set_voltage,
184 .set_load = rpm_reg_set_load,
187 static const struct regulator_ops rpm_switch_ops = {
188 .enable = rpm_reg_enable,
189 .disable = rpm_reg_disable,
190 .is_enabled = rpm_reg_is_enabled,
193 static const struct regulator_ops rpm_bob_ops = {
194 .enable = rpm_reg_enable,
195 .disable = rpm_reg_disable,
196 .is_enabled = rpm_reg_is_enabled,
198 .get_voltage = rpm_reg_get_voltage,
199 .set_voltage = rpm_reg_set_voltage,
202 static const struct regulator_ops rpm_mp5496_ops = {
203 .enable = rpm_reg_enable,
204 .disable = rpm_reg_disable,
205 .is_enabled = rpm_reg_is_enabled,
206 .list_voltage = regulator_list_voltage_linear_range,
208 .set_voltage = rpm_reg_set_voltage,
211 static const struct regulator_desc pma8084_hfsmps = {
212 .linear_ranges = (struct linear_range[]) {
213 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
214 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
216 .n_linear_ranges = 2,
218 .ops = &rpm_smps_ldo_ops,
221 static const struct regulator_desc pma8084_ftsmps = {
222 .linear_ranges = (struct linear_range[]) {
223 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
224 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
226 .n_linear_ranges = 2,
228 .ops = &rpm_smps_ldo_ops,
231 static const struct regulator_desc pma8084_pldo = {
232 .linear_ranges = (struct linear_range[]) {
233 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
234 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
235 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
237 .n_linear_ranges = 3,
239 .ops = &rpm_smps_ldo_ops,
242 static const struct regulator_desc pma8084_nldo = {
243 .linear_ranges = (struct linear_range[]) {
244 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
246 .n_linear_ranges = 1,
248 .ops = &rpm_smps_ldo_ops,
251 static const struct regulator_desc pma8084_switch = {
252 .ops = &rpm_switch_ops,
255 static const struct regulator_desc pm8226_hfsmps = {
256 .linear_ranges = (struct linear_range[]) {
257 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
258 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
260 .n_linear_ranges = 2,
262 .ops = &rpm_smps_ldo_ops,
265 static const struct regulator_desc pm8226_ftsmps = {
266 .linear_ranges = (struct linear_range[]) {
267 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
268 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
270 .n_linear_ranges = 2,
272 .ops = &rpm_smps_ldo_ops,
275 static const struct regulator_desc pm8226_pldo = {
276 .linear_ranges = (struct linear_range[]) {
277 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
278 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
279 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
281 .n_linear_ranges = 3,
283 .ops = &rpm_smps_ldo_ops,
286 static const struct regulator_desc pm8226_nldo = {
287 .linear_ranges = (struct linear_range[]) {
288 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
290 .n_linear_ranges = 1,
292 .ops = &rpm_smps_ldo_ops,
295 static const struct regulator_desc pm8226_switch = {
296 .ops = &rpm_switch_ops,
299 static const struct regulator_desc pm8x41_hfsmps = {
300 .linear_ranges = (struct linear_range[]) {
301 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
302 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
304 .n_linear_ranges = 2,
306 .ops = &rpm_smps_ldo_ops,
309 static const struct regulator_desc pm8841_ftsmps = {
310 .linear_ranges = (struct linear_range[]) {
311 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
312 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
314 .n_linear_ranges = 2,
316 .ops = &rpm_smps_ldo_ops,
319 static const struct regulator_desc pm8941_boost = {
320 .linear_ranges = (struct linear_range[]) {
321 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
323 .n_linear_ranges = 1,
325 .ops = &rpm_smps_ldo_ops,
328 static const struct regulator_desc pm8941_pldo = {
329 .linear_ranges = (struct linear_range[]) {
330 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
331 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
332 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
334 .n_linear_ranges = 3,
336 .ops = &rpm_smps_ldo_ops,
339 static const struct regulator_desc pm8941_nldo = {
340 .linear_ranges = (struct linear_range[]) {
341 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
343 .n_linear_ranges = 1,
345 .ops = &rpm_smps_ldo_ops,
348 static const struct regulator_desc pm8941_lnldo = {
351 .ops = &rpm_smps_ldo_ops_fixed,
354 static const struct regulator_desc pm8941_switch = {
355 .ops = &rpm_switch_ops,
358 static const struct regulator_desc pm8916_pldo = {
359 .linear_ranges = (struct linear_range[]) {
360 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
362 .n_linear_ranges = 1,
364 .ops = &rpm_smps_ldo_ops,
367 static const struct regulator_desc pm8916_nldo = {
368 .linear_ranges = (struct linear_range[]) {
369 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
371 .n_linear_ranges = 1,
373 .ops = &rpm_smps_ldo_ops,
376 static const struct regulator_desc pm8916_buck_lvo_smps = {
377 .linear_ranges = (struct linear_range[]) {
378 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
379 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
381 .n_linear_ranges = 2,
383 .ops = &rpm_smps_ldo_ops,
386 static const struct regulator_desc pm8916_buck_hvo_smps = {
387 .linear_ranges = (struct linear_range[]) {
388 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
390 .n_linear_ranges = 1,
392 .ops = &rpm_smps_ldo_ops,
395 static const struct regulator_desc pm8950_hfsmps = {
396 .linear_ranges = (struct linear_range[]) {
397 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
398 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
400 .n_linear_ranges = 2,
402 .ops = &rpm_smps_ldo_ops,
405 static const struct regulator_desc pm8950_ftsmps2p5 = {
406 .linear_ranges = (struct linear_range[]) {
407 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
408 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
410 .n_linear_ranges = 2,
412 .ops = &rpm_smps_ldo_ops,
415 static const struct regulator_desc pm8950_ult_nldo = {
416 .linear_ranges = (struct linear_range[]) {
417 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
419 .n_linear_ranges = 1,
421 .ops = &rpm_smps_ldo_ops,
424 static const struct regulator_desc pm8950_ult_pldo = {
425 .linear_ranges = (struct linear_range[]) {
426 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
428 .n_linear_ranges = 1,
430 .ops = &rpm_smps_ldo_ops,
433 static const struct regulator_desc pm8950_pldo_lv = {
434 .linear_ranges = (struct linear_range[]) {
435 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
437 .n_linear_ranges = 1,
439 .ops = &rpm_smps_ldo_ops,
442 static const struct regulator_desc pm8950_pldo = {
443 .linear_ranges = (struct linear_range[]) {
444 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
446 .n_linear_ranges = 1,
448 .ops = &rpm_smps_ldo_ops,
451 static const struct regulator_desc pm8953_lnldo = {
452 .linear_ranges = (struct linear_range[]) {
453 REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
454 REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
456 .n_linear_ranges = 2,
458 .ops = &rpm_smps_ldo_ops,
461 static const struct regulator_desc pm8953_ult_nldo = {
462 .linear_ranges = (struct linear_range[]) {
463 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
465 .n_linear_ranges = 1,
467 .ops = &rpm_smps_ldo_ops,
470 static const struct regulator_desc pm8994_hfsmps = {
471 .linear_ranges = (struct linear_range[]) {
472 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
473 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
475 .n_linear_ranges = 2,
477 .ops = &rpm_smps_ldo_ops,
480 static const struct regulator_desc pm8994_ftsmps = {
481 .linear_ranges = (struct linear_range[]) {
482 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
483 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
485 .n_linear_ranges = 2,
487 .ops = &rpm_smps_ldo_ops,
490 static const struct regulator_desc pm8994_nldo = {
491 .linear_ranges = (struct linear_range[]) {
492 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
494 .n_linear_ranges = 1,
496 .ops = &rpm_smps_ldo_ops,
499 static const struct regulator_desc pm8994_pldo = {
500 .linear_ranges = (struct linear_range[]) {
501 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
502 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
503 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
505 .n_linear_ranges = 3,
507 .ops = &rpm_smps_ldo_ops,
510 static const struct regulator_desc pm8994_switch = {
511 .ops = &rpm_switch_ops,
514 static const struct regulator_desc pm8994_lnldo = {
517 .ops = &rpm_smps_ldo_ops_fixed,
520 static const struct regulator_desc pmi8994_ftsmps = {
521 .linear_ranges = (struct linear_range[]) {
522 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
523 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
525 .n_linear_ranges = 2,
527 .ops = &rpm_smps_ldo_ops,
530 static const struct regulator_desc pmi8994_hfsmps = {
531 .linear_ranges = (struct linear_range[]) {
532 REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500),
533 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
535 .n_linear_ranges = 2,
537 .ops = &rpm_smps_ldo_ops,
540 static const struct regulator_desc pmi8994_bby = {
541 .linear_ranges = (struct linear_range[]) {
542 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
544 .n_linear_ranges = 1,
549 static const struct regulator_desc pm8998_ftsmps = {
550 .linear_ranges = (struct linear_range[]) {
551 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
553 .n_linear_ranges = 1,
555 .ops = &rpm_smps_ldo_ops,
558 static const struct regulator_desc pm8998_hfsmps = {
559 .linear_ranges = (struct linear_range[]) {
560 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
562 .n_linear_ranges = 1,
564 .ops = &rpm_smps_ldo_ops,
567 static const struct regulator_desc pm8998_nldo = {
568 .linear_ranges = (struct linear_range[]) {
569 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
571 .n_linear_ranges = 1,
573 .ops = &rpm_smps_ldo_ops,
576 static const struct regulator_desc pm8998_pldo = {
577 .linear_ranges = (struct linear_range[]) {
578 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
580 .n_linear_ranges = 1,
582 .ops = &rpm_smps_ldo_ops,
585 static const struct regulator_desc pm8998_pldo_lv = {
586 .linear_ranges = (struct linear_range[]) {
587 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
589 .n_linear_ranges = 1,
591 .ops = &rpm_smps_ldo_ops,
594 static const struct regulator_desc pm8998_switch = {
595 .ops = &rpm_switch_ops,
598 static const struct regulator_desc pmi8998_bob = {
599 .linear_ranges = (struct linear_range[]) {
600 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
602 .n_linear_ranges = 1,
607 static const struct regulator_desc pm660_ftsmps = {
608 .linear_ranges = (struct linear_range[]) {
609 REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
611 .n_linear_ranges = 1,
613 .ops = &rpm_smps_ldo_ops,
616 static const struct regulator_desc pm660_hfsmps = {
617 .linear_ranges = (struct linear_range[]) {
618 REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
620 .n_linear_ranges = 1,
622 .ops = &rpm_smps_ldo_ops,
625 static const struct regulator_desc pm660_ht_nldo = {
626 .linear_ranges = (struct linear_range[]) {
627 REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
629 .n_linear_ranges = 1,
631 .ops = &rpm_smps_ldo_ops,
634 static const struct regulator_desc pm660_ht_lvpldo = {
635 .linear_ranges = (struct linear_range[]) {
636 REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
638 .n_linear_ranges = 1,
640 .ops = &rpm_smps_ldo_ops,
643 static const struct regulator_desc pm660_nldo660 = {
644 .linear_ranges = (struct linear_range[]) {
645 REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
647 .n_linear_ranges = 1,
649 .ops = &rpm_smps_ldo_ops,
652 static const struct regulator_desc pm660_pldo660 = {
653 .linear_ranges = (struct linear_range[]) {
654 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
656 .n_linear_ranges = 1,
658 .ops = &rpm_smps_ldo_ops,
661 static const struct regulator_desc pm660l_bob = {
662 .linear_ranges = (struct linear_range[]) {
663 REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
665 .n_linear_ranges = 1,
670 static const struct regulator_desc pms405_hfsmps3 = {
671 .linear_ranges = (struct linear_range[]) {
672 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
674 .n_linear_ranges = 1,
676 .ops = &rpm_smps_ldo_ops,
679 static const struct regulator_desc pms405_nldo300 = {
680 .linear_ranges = (struct linear_range[]) {
681 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
683 .n_linear_ranges = 1,
685 .ops = &rpm_smps_ldo_ops,
688 static const struct regulator_desc pms405_nldo1200 = {
689 .linear_ranges = (struct linear_range[]) {
690 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
692 .n_linear_ranges = 1,
694 .ops = &rpm_smps_ldo_ops,
697 static const struct regulator_desc pms405_pldo50 = {
698 .linear_ranges = (struct linear_range[]) {
699 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
701 .n_linear_ranges = 1,
703 .ops = &rpm_smps_ldo_ops,
706 static const struct regulator_desc pms405_pldo150 = {
707 .linear_ranges = (struct linear_range[]) {
708 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
710 .n_linear_ranges = 1,
712 .ops = &rpm_smps_ldo_ops,
715 static const struct regulator_desc pms405_pldo600 = {
716 .linear_ranges = (struct linear_range[]) {
717 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
719 .n_linear_ranges = 1,
721 .ops = &rpm_smps_ldo_ops,
724 static const struct regulator_desc mp5496_smpa2 = {
725 .linear_ranges = (struct linear_range[]) {
726 REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500),
728 .n_linear_ranges = 1,
730 .ops = &rpm_mp5496_ops,
733 static const struct regulator_desc mp5496_ldoa2 = {
734 .linear_ranges = (struct linear_range[]) {
735 REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000),
737 .n_linear_ranges = 1,
739 .ops = &rpm_mp5496_ops,
742 static const struct regulator_desc pm2250_lvftsmps = {
743 .linear_ranges = (struct linear_range[]) {
744 REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000),
746 .n_linear_ranges = 1,
748 .ops = &rpm_smps_ldo_ops,
751 static const struct regulator_desc pm2250_ftsmps = {
752 .linear_ranges = (struct linear_range[]) {
753 REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000),
755 .n_linear_ranges = 1,
757 .ops = &rpm_smps_ldo_ops,
760 struct rpm_regulator_data {
764 const struct regulator_desc *desc;
768 static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
769 { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
770 { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
774 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
775 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
776 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
777 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
778 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
779 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
780 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
781 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
782 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
786 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
787 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
788 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
789 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
790 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
791 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
792 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
793 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
794 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
795 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
796 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
797 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
798 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
799 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
800 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
801 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
802 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
803 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
804 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
805 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
806 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
807 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
808 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
812 static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
813 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
814 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
815 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
816 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
817 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
818 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
819 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
820 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
821 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
822 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
823 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
824 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
825 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
826 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
827 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
828 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
829 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
830 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
831 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
832 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
833 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
834 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
835 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
836 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
837 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
838 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
839 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
840 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
841 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
842 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
843 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
844 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
845 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
846 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
850 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
851 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
852 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
853 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
854 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
856 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
857 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
858 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
859 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
860 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
861 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
862 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
863 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
864 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
865 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
866 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
867 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
868 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
869 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
870 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
871 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
872 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
873 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
874 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
875 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
876 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
877 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
878 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
879 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
881 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
882 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
883 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
885 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
886 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
891 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
892 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
893 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
894 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
895 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
896 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
897 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
898 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
899 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
900 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
901 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
902 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
903 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
905 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
906 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
907 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
908 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
909 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
910 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
911 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
912 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
913 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
914 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
915 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
916 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
917 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
918 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
919 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
920 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
921 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
922 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
923 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
924 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
925 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
926 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
927 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
928 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
929 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
930 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
931 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
933 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
934 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
935 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
936 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
937 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
942 static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
943 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
944 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
945 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
946 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
947 /* S5 is managed via SPMI. */
948 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
950 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
951 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
952 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
953 /* L4 seems not to exist. */
954 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
955 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
956 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
957 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
958 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
959 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
960 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
961 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
962 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
963 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
964 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
965 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" },
966 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
967 /* L18 seems not to exist. */
968 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" },
969 /* L20 & L21 seem not to exist. */
970 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" },
971 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" },
975 static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
976 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" },
977 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" },
978 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
979 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
980 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
981 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" },
982 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
984 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" },
985 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" },
986 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" },
987 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
988 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
989 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
990 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
991 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
992 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
993 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
994 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
995 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
996 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
997 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
998 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
999 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1000 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1001 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1002 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
1003 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" },
1004 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" },
1005 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1006 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
1010 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
1011 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
1012 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
1013 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
1014 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
1015 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
1016 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
1017 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
1018 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
1019 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
1020 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
1021 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
1022 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
1023 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
1024 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
1025 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
1026 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
1027 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
1028 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
1029 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
1030 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
1031 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1032 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1033 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
1034 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
1035 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1036 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
1037 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
1038 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
1039 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
1040 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1041 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1042 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
1043 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
1044 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1045 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1046 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1047 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
1048 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
1049 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
1050 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
1051 { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
1052 { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
1053 { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
1054 { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
1055 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
1056 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
1061 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
1062 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
1063 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
1064 { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
1065 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
1069 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
1070 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
1071 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
1072 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
1073 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
1074 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
1075 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
1076 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
1077 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
1078 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
1079 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
1080 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
1081 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
1082 { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
1083 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
1084 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
1085 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
1086 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
1087 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
1088 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
1089 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1090 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
1091 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
1092 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
1093 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
1094 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1095 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
1096 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1097 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1098 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
1099 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
1100 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
1101 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
1102 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
1103 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
1104 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
1105 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
1106 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
1107 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
1108 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
1109 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
1110 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
1111 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
1112 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
1116 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
1117 { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
1121 static const struct rpm_regulator_data rpm_pm660_regulators[] = {
1122 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
1123 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
1124 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
1125 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
1126 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
1127 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
1128 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
1129 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
1130 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
1131 /* l4 is unaccessible on PM660 */
1132 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
1133 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
1134 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
1135 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1136 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1137 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1138 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1139 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1140 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1141 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1142 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1143 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1144 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1145 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1146 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1150 static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
1151 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
1152 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
1153 { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
1154 { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
1155 { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
1156 { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
1157 { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1158 { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
1159 { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1160 { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
1161 { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1162 { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1163 { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
1164 { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
1165 { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
1169 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
1170 { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
1171 { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
1172 { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
1173 { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
1174 { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
1175 { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
1176 { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
1177 { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
1178 { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
1179 { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
1180 { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
1181 { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
1182 { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
1183 { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
1184 { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
1185 { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1186 { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1187 { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1191 static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
1192 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
1193 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
1194 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
1195 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
1196 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1197 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1198 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1199 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1200 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1201 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1202 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1203 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1204 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1205 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1206 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1207 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1208 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1209 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1210 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1211 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1212 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1213 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1214 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1215 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1216 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1217 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1221 static const struct of_device_id rpm_of_match[] = {
1222 { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
1223 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
1224 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
1225 { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
1226 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
1227 { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
1228 { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
1229 { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
1230 { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
1231 { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
1232 { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
1233 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
1234 { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
1235 { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
1236 { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
1237 { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
1240 MODULE_DEVICE_TABLE(of, rpm_of_match);
1243 * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
1244 * @vreg: Pointer to the individual qcom_smd-regulator resource
1245 * @dev: Pointer to the top level qcom_smd-regulator PMIC device
1246 * @node: Pointer to the individual qcom_smd-regulator resource
1248 * @rpm: Pointer to the rpm bus node
1249 * @pmic_rpm_data: Pointer to a null-terminated array of qcom_smd-regulator
1250 * resources defined for the top level PMIC device
1252 * Return: 0 on success, errno on failure
1254 static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
1255 struct device_node *node, struct qcom_smd_rpm *rpm,
1256 const struct rpm_regulator_data *pmic_rpm_data)
1258 struct regulator_config config = {};
1259 const struct rpm_regulator_data *rpm_data;
1260 struct regulator_dev *rdev;
1263 for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
1264 if (of_node_name_eq(node, rpm_data->name))
1267 if (!rpm_data->name) {
1268 dev_err(dev, "Unknown regulator %pOFn\n", node);
1274 vreg->type = rpm_data->type;
1275 vreg->id = rpm_data->id;
1277 memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
1278 vreg->desc.name = rpm_data->name;
1279 vreg->desc.supply_name = rpm_data->supply;
1280 vreg->desc.owner = THIS_MODULE;
1281 vreg->desc.type = REGULATOR_VOLTAGE;
1282 vreg->desc.of_match = rpm_data->name;
1285 config.of_node = node;
1286 config.driver_data = vreg;
1288 rdev = devm_regulator_register(dev, &vreg->desc, &config);
1290 ret = PTR_ERR(rdev);
1291 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
1298 static int rpm_reg_probe(struct platform_device *pdev)
1300 struct device *dev = &pdev->dev;
1301 const struct rpm_regulator_data *vreg_data;
1302 struct device_node *node;
1303 struct qcom_rpm_reg *vreg;
1304 struct qcom_smd_rpm *rpm;
1307 rpm = dev_get_drvdata(pdev->dev.parent);
1309 dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
1313 vreg_data = of_device_get_match_data(dev);
1317 for_each_available_child_of_node(dev->of_node, node) {
1318 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
1324 ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
1335 static struct platform_driver rpm_reg_driver = {
1336 .probe = rpm_reg_probe,
1338 .name = "qcom_rpm_smd_regulator",
1339 .of_match_table = rpm_of_match,
1343 static int __init rpm_reg_init(void)
1345 return platform_driver_register(&rpm_reg_driver);
1347 subsys_initcall(rpm_reg_init);
1349 static void __exit rpm_reg_exit(void)
1351 platform_driver_unregister(&rpm_reg_driver);
1353 module_exit(rpm_reg_exit)
1355 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1356 MODULE_LICENSE("GPL v2");