drivers/regulator/qcom_smd-regulator.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015, Sony Mobile Communications AB.
   4  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/of.h>
   9 #include <linux/of_device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/regulator/driver.h>
  12 #include <linux/regulator/of_regulator.h>
  13 #include <linux/soc/qcom/smd-rpm.h>
  14
  15 struct qcom_rpm_reg {
  16         struct device *dev;
  17
  18         struct qcom_smd_rpm *rpm;
  19
  20         u32 type;
  21         u32 id;
  22
  23         struct regulator_desc desc;
  24
  25         int is_enabled;
  26         int uV;
  27         u32 load;
  28
  29         unsigned int enabled_updated:1;
  30         unsigned int uv_updated:1;
  31         unsigned int load_updated:1;
  32 };
  33
  34 struct rpm_regulator_req {
  35         __le32 key;
  36         __le32 nbytes;
  37         __le32 value;
  38 };
  39
  40 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  41 #define RPM_KEY_UV      0x00007675 /* "uv" */
  42 #define RPM_KEY_MA      0x0000616d /* "ma" */
  43
  44 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
  45 {
  46         struct rpm_regulator_req req[3];
  47         int reqlen = 0;
  48         int ret;
  49
  50         if (vreg->enabled_updated) {
  51                 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
  52                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  53                 req[reqlen].value = cpu_to_le32(vreg->is_enabled);
  54                 reqlen++;
  55         }
  56
  57         if (vreg->uv_updated && vreg->is_enabled) {
  58                 req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
  59                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  60                 req[reqlen].value = cpu_to_le32(vreg->uV);
  61                 reqlen++;
  62         }
  63
  64         if (vreg->load_updated && vreg->is_enabled) {
  65                 req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
  66                 req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  67                 req[reqlen].value = cpu_to_le32(vreg->load / 1000);
  68                 reqlen++;
  69         }
  70
  71         if (!reqlen)
  72                 return 0;
  73
  74         ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
  75                                  vreg->type, vreg->id,
  76                                  req, sizeof(req[0]) * reqlen);
  77         if (!ret) {
  78                 vreg->enabled_updated = 0;
  79                 vreg->uv_updated = 0;
  80                 vreg->load_updated = 0;
  81         }
  82
  83         return ret;
  84 }
  85
  86 static int rpm_reg_enable(struct regulator_dev *rdev)
  87 {
  88         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  89         int ret;
  90
  91         vreg->is_enabled = 1;
  92         vreg->enabled_updated = 1;
  93
  94         ret = rpm_reg_write_active(vreg);
  95         if (ret)
  96                 vreg->is_enabled = 0;
  97
  98         return ret;
  99 }
 100
 101 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
 102 {
 103         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 104
 105         return vreg->is_enabled;
 106 }
 107
 108 static int rpm_reg_disable(struct regulator_dev *rdev)
 109 {
 110         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 111         int ret;
 112
 113         vreg->is_enabled = 0;
 114         vreg->enabled_updated = 1;
 115
 116         ret = rpm_reg_write_active(vreg);
 117         if (ret)
 118                 vreg->is_enabled = 1;
 119
 120         return ret;
 121 }
 122
 123 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 124 {
 125         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 126
 127         return vreg->uV;
 128 }
 129
 130 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 131                                int min_uV,
 132                                int max_uV,
 133                                unsigned *selector)
 134 {
 135         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 136         int ret;
 137         int old_uV = vreg->uV;
 138
 139         vreg->uV = min_uV;
 140         vreg->uv_updated = 1;
 141
 142         ret = rpm_reg_write_active(vreg);
 143         if (ret)
 144                 vreg->uV = old_uV;
 145
 146         return ret;
 147 }
 148
 149 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 150 {
 151         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 152         u32 old_load = vreg->load;
 153         int ret;
 154
 155         vreg->load = load_uA;
 156         vreg->load_updated = 1;
 157         ret = rpm_reg_write_active(vreg);
 158         if (ret)
 159                 vreg->load = old_load;
 160
 161         return ret;
 162 }
 163
 164 static const struct regulator_ops rpm_smps_ldo_ops = {
 165         .enable = rpm_reg_enable,
 166         .disable = rpm_reg_disable,
 167         .is_enabled = rpm_reg_is_enabled,
 168         .list_voltage = regulator_list_voltage_linear_range,
 169
 170         .get_voltage = rpm_reg_get_voltage,
 171         .set_voltage = rpm_reg_set_voltage,
 172
 173         .set_load = rpm_reg_set_load,
 174 };
 175
 176 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 177         .enable = rpm_reg_enable,
 178         .disable = rpm_reg_disable,
 179         .is_enabled = rpm_reg_is_enabled,
 180
 181         .get_voltage = rpm_reg_get_voltage,
 182         .set_voltage = rpm_reg_set_voltage,
 183
 184         .set_load = rpm_reg_set_load,
 185 };
 186
 187 static const struct regulator_ops rpm_switch_ops = {
 188         .enable = rpm_reg_enable,
 189         .disable = rpm_reg_disable,
 190         .is_enabled = rpm_reg_is_enabled,
 191 };
 192
 193 static const struct regulator_ops rpm_bob_ops = {
 194         .enable = rpm_reg_enable,
 195         .disable = rpm_reg_disable,
 196         .is_enabled = rpm_reg_is_enabled,
 197
 198         .get_voltage = rpm_reg_get_voltage,
 199         .set_voltage = rpm_reg_set_voltage,
 200 };
 201
 202 static const struct regulator_desc pma8084_hfsmps = {
 203         .linear_ranges = (struct regulator_linear_range[]) {
 204                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 205                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 206         },
 207         .n_linear_ranges = 2,
 208         .n_voltages = 159,
 209         .ops = &rpm_smps_ldo_ops,
 210 };
 211
 212 static const struct regulator_desc pma8084_ftsmps = {
 213         .linear_ranges = (struct regulator_linear_range[]) {
 214                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 215                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 216         },
 217         .n_linear_ranges = 2,
 218         .n_voltages = 262,
 219         .ops = &rpm_smps_ldo_ops,
 220 };
 221
 222 static const struct regulator_desc pma8084_pldo = {
 223         .linear_ranges = (struct regulator_linear_range[]) {
 224                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 225                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 226                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 227         },
 228         .n_linear_ranges = 3,
 229         .n_voltages = 164,
 230         .ops = &rpm_smps_ldo_ops,
 231 };
 232
 233 static const struct regulator_desc pma8084_nldo = {
 234         .linear_ranges = (struct regulator_linear_range[]) {
 235                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 236         },
 237         .n_linear_ranges = 1,
 238         .n_voltages = 64,
 239         .ops = &rpm_smps_ldo_ops,
 240 };
 241
 242 static const struct regulator_desc pma8084_switch = {
 243         .ops = &rpm_switch_ops,
 244 };
 245
 246 static const struct regulator_desc pm8x41_hfsmps = {
 247         .linear_ranges = (struct regulator_linear_range[]) {
 248                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 249                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 250         },
 251         .n_linear_ranges = 2,
 252         .n_voltages = 159,
 253         .ops = &rpm_smps_ldo_ops,
 254 };
 255
 256 static const struct regulator_desc pm8841_ftsmps = {
 257         .linear_ranges = (struct regulator_linear_range[]) {
 258                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 259                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 260         },
 261         .n_linear_ranges = 2,
 262         .n_voltages = 262,
 263         .ops = &rpm_smps_ldo_ops,
 264 };
 265
 266 static const struct regulator_desc pm8941_boost = {
 267         .linear_ranges = (struct regulator_linear_range[]) {
 268                 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
 269         },
 270         .n_linear_ranges = 1,
 271         .n_voltages = 31,
 272         .ops = &rpm_smps_ldo_ops,
 273 };
 274
 275 static const struct regulator_desc pm8941_pldo = {
 276         .linear_ranges = (struct regulator_linear_range[]) {
 277                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 278                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 279                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 280         },
 281         .n_linear_ranges = 3,
 282         .n_voltages = 164,
 283         .ops = &rpm_smps_ldo_ops,
 284 };
 285
 286 static const struct regulator_desc pm8941_nldo = {
 287         .linear_ranges = (struct regulator_linear_range[]) {
 288                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 289         },
 290         .n_linear_ranges = 1,
 291         .n_voltages = 64,
 292         .ops = &rpm_smps_ldo_ops,
 293 };
 294
 295 static const struct regulator_desc pm8941_lnldo = {
 296         .fixed_uV = 1740000,
 297         .n_voltages = 1,
 298         .ops = &rpm_smps_ldo_ops_fixed,
 299 };
 300
 301 static const struct regulator_desc pm8941_switch = {
 302         .ops = &rpm_switch_ops,
 303 };
 304
 305 static const struct regulator_desc pm8916_pldo = {
 306         .linear_ranges = (struct regulator_linear_range[]) {
 307                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 308         },
 309         .n_linear_ranges = 1,
 310         .n_voltages = 209,
 311         .ops = &rpm_smps_ldo_ops,
 312 };
 313
 314 static const struct regulator_desc pm8916_nldo = {
 315         .linear_ranges = (struct regulator_linear_range[]) {
 316                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 317         },
 318         .n_linear_ranges = 1,
 319         .n_voltages = 94,
 320         .ops = &rpm_smps_ldo_ops,
 321 };
 322
 323 static const struct regulator_desc pm8916_buck_lvo_smps = {
 324         .linear_ranges = (struct regulator_linear_range[]) {
 325                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 326                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 327         },
 328         .n_linear_ranges = 2,
 329         .n_voltages = 128,
 330         .ops = &rpm_smps_ldo_ops,
 331 };
 332
 333 static const struct regulator_desc pm8916_buck_hvo_smps = {
 334         .linear_ranges = (struct regulator_linear_range[]) {
 335                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 336         },
 337         .n_linear_ranges = 1,
 338         .n_voltages = 32,
 339         .ops = &rpm_smps_ldo_ops,
 340 };
 341
 342 static const struct regulator_desc pm8994_hfsmps = {
 343         .linear_ranges = (struct regulator_linear_range[]) {
 344                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 345                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 346         },
 347         .n_linear_ranges = 2,
 348         .n_voltages = 159,
 349         .ops = &rpm_smps_ldo_ops,
 350 };
 351
 352 static const struct regulator_desc pm8994_ftsmps = {
 353         .linear_ranges = (struct regulator_linear_range[]) {
 354                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 355                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 356         },
 357         .n_linear_ranges = 2,
 358         .n_voltages = 350,
 359         .ops = &rpm_smps_ldo_ops,
 360 };
 361
 362 static const struct regulator_desc pm8994_nldo = {
 363         .linear_ranges = (struct regulator_linear_range[]) {
 364                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 365         },
 366         .n_linear_ranges = 1,
 367         .n_voltages = 64,
 368         .ops = &rpm_smps_ldo_ops,
 369 };
 370
 371 static const struct regulator_desc pm8994_pldo = {
 372         .linear_ranges = (struct regulator_linear_range[]) {
 373                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 374                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 375                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 376         },
 377         .n_linear_ranges = 3,
 378         .n_voltages = 164,
 379         .ops = &rpm_smps_ldo_ops,
 380 };
 381
 382 static const struct regulator_desc pm8994_switch = {
 383         .ops = &rpm_switch_ops,
 384 };
 385
 386 static const struct regulator_desc pm8994_lnldo = {
 387         .fixed_uV = 1740000,
 388         .n_voltages = 1,
 389         .ops = &rpm_smps_ldo_ops_fixed,
 390 };
 391
 392 static const struct regulator_desc pm8998_ftsmps = {
 393         .linear_ranges = (struct regulator_linear_range[]) {
 394                 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
 395         },
 396         .n_linear_ranges = 1,
 397         .n_voltages = 259,
 398         .ops = &rpm_smps_ldo_ops,
 399 };
 400
 401 static const struct regulator_desc pm8998_hfsmps = {
 402         .linear_ranges = (struct regulator_linear_range[]) {
 403                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 404         },
 405         .n_linear_ranges = 1,
 406         .n_voltages = 216,
 407         .ops = &rpm_smps_ldo_ops,
 408 };
 409
 410 static const struct regulator_desc pm8998_nldo = {
 411         .linear_ranges = (struct regulator_linear_range[]) {
 412                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 413         },
 414         .n_linear_ranges = 1,
 415         .n_voltages = 128,
 416         .ops = &rpm_smps_ldo_ops,
 417 };
 418
 419 static const struct regulator_desc pm8998_pldo = {
 420         .linear_ranges = (struct regulator_linear_range[]) {
 421                 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
 422         },
 423         .n_linear_ranges = 1,
 424         .n_voltages = 256,
 425         .ops = &rpm_smps_ldo_ops,
 426 };
 427
 428 static const struct regulator_desc pm8998_pldo_lv = {
 429         .linear_ranges = (struct regulator_linear_range[]) {
 430                 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
 431         },
 432         .n_linear_ranges = 1,
 433         .n_voltages = 128,
 434         .ops = &rpm_smps_ldo_ops,
 435 };
 436
 437 static const struct regulator_desc pm8998_switch = {
 438         .ops = &rpm_switch_ops,
 439 };
 440
 441 static const struct regulator_desc pmi8998_bob = {
 442         .linear_ranges = (struct regulator_linear_range[]) {
 443                 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
 444         },
 445         .n_linear_ranges = 1,
 446         .n_voltages = 84,
 447         .ops = &rpm_bob_ops,
 448 };
 449
 450 static const struct regulator_desc pms405_hfsmps3 = {
 451         .linear_ranges = (struct regulator_linear_range[]) {
 452                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 453         },
 454         .n_linear_ranges = 1,
 455         .n_voltages = 216,
 456         .ops = &rpm_smps_ldo_ops,
 457 };
 458
 459 static const struct regulator_desc pms405_nldo300 = {
 460         .linear_ranges = (struct regulator_linear_range[]) {
 461                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 462         },
 463         .n_linear_ranges = 1,
 464         .n_voltages = 128,
 465         .ops = &rpm_smps_ldo_ops,
 466 };
 467
 468 static const struct regulator_desc pms405_nldo1200 = {
 469         .linear_ranges = (struct regulator_linear_range[]) {
 470                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 471         },
 472         .n_linear_ranges = 1,
 473         .n_voltages = 128,
 474         .ops = &rpm_smps_ldo_ops,
 475 };
 476
 477 static const struct regulator_desc pms405_pldo50 = {
 478         .linear_ranges = (struct regulator_linear_range[]) {
 479                 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
 480         },
 481         .n_linear_ranges = 1,
 482         .n_voltages = 129,
 483         .ops = &rpm_smps_ldo_ops,
 484 };
 485
 486 static const struct regulator_desc pms405_pldo150 = {
 487         .linear_ranges = (struct regulator_linear_range[]) {
 488                 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
 489         },
 490         .n_linear_ranges = 1,
 491         .n_voltages = 129,
 492         .ops = &rpm_smps_ldo_ops,
 493 };
 494
 495 static const struct regulator_desc pms405_pldo600 = {
 496         .linear_ranges = (struct regulator_linear_range[]) {
 497                 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
 498         },
 499         .n_linear_ranges = 1,
 500         .n_voltages = 99,
 501         .ops = &rpm_smps_ldo_ops,
 502 };
 503
 504 struct rpm_regulator_data {
 505         const char *name;
 506         u32 type;
 507         u32 id;
 508         const struct regulator_desc *desc;
 509         const char *supply;
 510 };
 511
 512 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 513         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 514         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 515         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 516         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 517         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 518         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 519         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 520         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 521         {}
 522 };
 523
 524 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 525         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 526         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 527         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 528         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 529         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 530         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 531         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 532         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 533         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 534         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 535         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 536         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 537         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 538         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 539         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 540         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 541         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 542         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 543         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 544         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 545         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 546         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 547         {}
 548 };
 549
 550 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 551         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 552         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 553         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 554         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 555
 556         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 557         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 558         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 559         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 560         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 561         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 562         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 563         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 564         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 565         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 566         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 567         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 568         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 569         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 570         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 571         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 572         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 573         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 574         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 575         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 576         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 577         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 578         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 579         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 580
 581         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 582         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 583         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 584
 585         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 586         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 587
 588         {}
 589 };
 590
 591 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 592         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 593         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 594         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 595         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 596         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 597         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 598         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 599         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 600         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 601         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 602         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 603         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 604
 605         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 606         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 607         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 608         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 609         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 610         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 611         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 612         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 613         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 614         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 615         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 616         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 617         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 618         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 619         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 620         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 621         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 622         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 623         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 624         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 625         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 626         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 627         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 628         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 629         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 630         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 631         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 632
 633         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 634         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 635         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 636         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 637         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 638
 639         {}
 640 };
 641
 642 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
 643         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
 644         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
 645         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
 646         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
 647         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
 648         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
 649         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
 650         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
 651         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
 652         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
 653         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
 654         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
 655         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
 656         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
 657         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
 658         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
 659         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
 660         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
 661         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
 662         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
 663         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 664         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 665         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
 666         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
 667         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 668         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
 669         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
 670         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
 671         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
 672         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 673         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 674         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
 675         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
 676         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 677         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 678         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 679         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
 680         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
 681         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
 682         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
 683         { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
 684         { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
 685         { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
 686         { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
 687         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
 688         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
 689
 690         {}
 691 };
 692
 693 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
 694         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
 695         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
 696         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
 697         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
 698         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
 699         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
 700         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
 701         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
 702         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
 703         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
 704         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
 705         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
 706         { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
 707         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
 708         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
 709         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
 710         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
 711         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
 712         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
 713         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 714         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
 715         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
 716         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
 717         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
 718         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 719         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
 720         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 721         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 722         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
 723         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
 724         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
 725         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
 726         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
 727         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
 728         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
 729         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
 730         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
 731         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
 732         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
 733         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
 734         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
 735         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
 736         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
 737         {}
 738 };
 739
 740 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
 741         { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
 742         {}
 743 };
 744
 745 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
 746         { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
 747         { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
 748         { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
 749         { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
 750         { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
 751         { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
 752         { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
 753         { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
 754         { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
 755         { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
 756         { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
 757         { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
 758         { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
 759         { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
 760         { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
 761         { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
 762         { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
 763         { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
 764         {}
 765 };
 766
 767 static const struct of_device_id rpm_of_match[] = {
 768         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 769         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 770         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 771         { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
 772         { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
 773         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
 774         { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
 775         { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
 776         {}
 777 };
 778 MODULE_DEVICE_TABLE(of, rpm_of_match);
 779
 780 /**
 781  * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
 782  * @vreg:               Pointer to the individual qcom_smd-regulator resource
 783  * @dev:                Pointer to the top level qcom_smd-regulator PMIC device
 784  * @node:               Pointer to the individual qcom_smd-regulator resource
 785  *                      device node
 786  * @rpm:                Pointer to the rpm bus node
 787  * @pmic_rpm_data:      Pointer to a null-terminated array of qcom_smd-regulator
 788  *                      resources defined for the top level PMIC device
 789  *
 790  * Return: 0 on success, errno on failure
 791  */
 792 static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
 793                                    struct device_node *node, struct qcom_smd_rpm *rpm,
 794                                    const struct rpm_regulator_data *pmic_rpm_data)
 795 {
 796         struct regulator_config config = {};
 797         const struct rpm_regulator_data *rpm_data;
 798         struct regulator_dev *rdev;
 799         int ret;
 800
 801         for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
 802                 if (of_node_name_eq(node, rpm_data->name))
 803                         break;
 804
 805         if (!rpm_data->name) {
 806                 dev_err(dev, "Unknown regulator %pOFn\n", node);
 807                 return -EINVAL;
 808         }
 809
 810         vreg->dev       = dev;
 811         vreg->rpm       = rpm;
 812         vreg->type      = rpm_data->type;
 813         vreg->id        = rpm_data->id;
 814
 815         memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
 816         vreg->desc.name = rpm_data->name;
 817         vreg->desc.supply_name = rpm_data->supply;
 818         vreg->desc.owner = THIS_MODULE;
 819         vreg->desc.type = REGULATOR_VOLTAGE;
 820         vreg->desc.of_match = rpm_data->name;
 821
 822         config.dev              = dev;
 823         config.of_node          = node;
 824         config.driver_data      = vreg;
 825
 826         rdev = devm_regulator_register(dev, &vreg->desc, &config);
 827         if (IS_ERR(rdev)) {
 828                 ret = PTR_ERR(rdev);
 829                 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
 830                 return ret;
 831         }
 832
 833         return 0;
 834 }
 835
 836 static int rpm_reg_probe(struct platform_device *pdev)
 837 {
 838         struct device *dev = &pdev->dev;
 839         const struct rpm_regulator_data *vreg_data;
 840         struct device_node *node;
 841         struct qcom_rpm_reg *vreg;
 842         struct qcom_smd_rpm *rpm;
 843         int ret;
 844
 845         rpm = dev_get_drvdata(pdev->dev.parent);
 846         if (!rpm) {
 847                 dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
 848                 return -ENODEV;
 849         }
 850
 851         vreg_data = of_device_get_match_data(dev);
 852         if (!vreg_data)
 853                 return -ENODEV;
 854
 855         for_each_available_child_of_node(dev->of_node, node) {
 856                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
 857                 if (!vreg) {
 858                         of_node_put(node);
 859                         return -ENOMEM;
 860                 }
 861
 862                 ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
 863
 864                 if (ret < 0) {
 865                         of_node_put(node);
 866                         return ret;
 867                 }
 868         }
 869
 870         return 0;
 871 }
 872
 873 static struct platform_driver rpm_reg_driver = {
 874         .probe = rpm_reg_probe,
 875         .driver = {
 876                 .name  = "qcom_rpm_smd_regulator",
 877                 .of_match_table = rpm_of_match,
 878         },
 879 };
 880
 881 static int __init rpm_reg_init(void)
 882 {
 883         return platform_driver_register(&rpm_reg_driver);
 884 }
 885 subsys_initcall(rpm_reg_init);
 886
 887 static void __exit rpm_reg_exit(void)
 888 {
 889         platform_driver_unregister(&rpm_reg_driver);
 890 }
 891 module_exit(rpm_reg_exit)
 892
 893 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
 894 MODULE_LICENSE("GPL v2");