drivers/regulator/qcom_smd-regulator.c

   1 /*
   2  * Copyright (c) 2015, Sony Mobile Communications AB.
   3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regulator/driver.h>
  20 #include <linux/regulator/of_regulator.h>
  21 #include <linux/soc/qcom/smd-rpm.h>
  22
  23 struct qcom_rpm_reg {
  24         struct device *dev;
  25
  26         struct qcom_smd_rpm *rpm;
  27
  28         u32 type;
  29         u32 id;
  30
  31         struct regulator_desc desc;
  32
  33         int is_enabled;
  34         int uV;
  35 };
  36
  37 struct rpm_regulator_req {
  38         __le32 key;
  39         __le32 nbytes;
  40         __le32 value;
  41 };
  42
  43 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  44 #define RPM_KEY_UV      0x00007675 /* "uv" */
  45 #define RPM_KEY_MA      0x0000616d /* "ma" */
  46
  47 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
  48                                 struct rpm_regulator_req *req,
  49                                 size_t size)
  50 {
  51         return qcom_rpm_smd_write(vreg->rpm,
  52                                   QCOM_SMD_RPM_ACTIVE_STATE,
  53                                   vreg->type,
  54                                   vreg->id,
  55                                   req, size);
  56 }
  57
  58 static int rpm_reg_enable(struct regulator_dev *rdev)
  59 {
  60         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  61         struct rpm_regulator_req req;
  62         int ret;
  63
  64         req.key = cpu_to_le32(RPM_KEY_SWEN);
  65         req.nbytes = cpu_to_le32(sizeof(u32));
  66         req.value = cpu_to_le32(1);
  67
  68         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  69         if (!ret)
  70                 vreg->is_enabled = 1;
  71
  72         return ret;
  73 }
  74
  75 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  76 {
  77         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  78
  79         return vreg->is_enabled;
  80 }
  81
  82 static int rpm_reg_disable(struct regulator_dev *rdev)
  83 {
  84         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  85         struct rpm_regulator_req req;
  86         int ret;
  87
  88         req.key = cpu_to_le32(RPM_KEY_SWEN);
  89         req.nbytes = cpu_to_le32(sizeof(u32));
  90         req.value = 0;
  91
  92         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  93         if (!ret)
  94                 vreg->is_enabled = 0;
  95
  96         return ret;
  97 }
  98
  99 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 100 {
 101         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 102
 103         return vreg->uV;
 104 }
 105
 106 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 107                                int min_uV,
 108                                int max_uV,
 109                                unsigned *selector)
 110 {
 111         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 112         struct rpm_regulator_req req;
 113         int ret = 0;
 114
 115         req.key = cpu_to_le32(RPM_KEY_UV);
 116         req.nbytes = cpu_to_le32(sizeof(u32));
 117         req.value = cpu_to_le32(min_uV);
 118
 119         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 120         if (!ret)
 121                 vreg->uV = min_uV;
 122
 123         return ret;
 124 }
 125
 126 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 127 {
 128         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 129         struct rpm_regulator_req req;
 130
 131         req.key = cpu_to_le32(RPM_KEY_MA);
 132         req.nbytes = cpu_to_le32(sizeof(u32));
 133         req.value = cpu_to_le32(load_uA / 1000);
 134
 135         return rpm_reg_write_active(vreg, &req, sizeof(req));
 136 }
 137
 138 static const struct regulator_ops rpm_smps_ldo_ops = {
 139         .enable = rpm_reg_enable,
 140         .disable = rpm_reg_disable,
 141         .is_enabled = rpm_reg_is_enabled,
 142         .list_voltage = regulator_list_voltage_linear_range,
 143
 144         .get_voltage = rpm_reg_get_voltage,
 145         .set_voltage = rpm_reg_set_voltage,
 146
 147         .set_load = rpm_reg_set_load,
 148 };
 149
 150 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 151         .enable = rpm_reg_enable,
 152         .disable = rpm_reg_disable,
 153         .is_enabled = rpm_reg_is_enabled,
 154
 155         .get_voltage = rpm_reg_get_voltage,
 156         .set_voltage = rpm_reg_set_voltage,
 157
 158         .set_load = rpm_reg_set_load,
 159 };
 160
 161 static const struct regulator_ops rpm_switch_ops = {
 162         .enable = rpm_reg_enable,
 163         .disable = rpm_reg_disable,
 164         .is_enabled = rpm_reg_is_enabled,
 165 };
 166
 167 static const struct regulator_ops rpm_bob_ops = {
 168         .enable = rpm_reg_enable,
 169         .disable = rpm_reg_disable,
 170         .is_enabled = rpm_reg_is_enabled,
 171
 172         .get_voltage = rpm_reg_get_voltage,
 173         .set_voltage = rpm_reg_set_voltage,
 174 };
 175
 176 static const struct regulator_desc pma8084_hfsmps = {
 177         .linear_ranges = (struct regulator_linear_range[]) {
 178                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 179                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 180         },
 181         .n_linear_ranges = 2,
 182         .n_voltages = 159,
 183         .ops = &rpm_smps_ldo_ops,
 184 };
 185
 186 static const struct regulator_desc pma8084_ftsmps = {
 187         .linear_ranges = (struct regulator_linear_range[]) {
 188                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 189                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 190         },
 191         .n_linear_ranges = 2,
 192         .n_voltages = 262,
 193         .ops = &rpm_smps_ldo_ops,
 194 };
 195
 196 static const struct regulator_desc pma8084_pldo = {
 197         .linear_ranges = (struct regulator_linear_range[]) {
 198                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 199                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 200                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 201         },
 202         .n_linear_ranges = 3,
 203         .n_voltages = 164,
 204         .ops = &rpm_smps_ldo_ops,
 205 };
 206
 207 static const struct regulator_desc pma8084_nldo = {
 208         .linear_ranges = (struct regulator_linear_range[]) {
 209                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 210         },
 211         .n_linear_ranges = 1,
 212         .n_voltages = 64,
 213         .ops = &rpm_smps_ldo_ops,
 214 };
 215
 216 static const struct regulator_desc pma8084_switch = {
 217         .ops = &rpm_switch_ops,
 218 };
 219
 220 static const struct regulator_desc pm8x41_hfsmps = {
 221         .linear_ranges = (struct regulator_linear_range[]) {
 222                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 223                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 224         },
 225         .n_linear_ranges = 2,
 226         .n_voltages = 159,
 227         .ops = &rpm_smps_ldo_ops,
 228 };
 229
 230 static const struct regulator_desc pm8841_ftsmps = {
 231         .linear_ranges = (struct regulator_linear_range[]) {
 232                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 233                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 234         },
 235         .n_linear_ranges = 2,
 236         .n_voltages = 262,
 237         .ops = &rpm_smps_ldo_ops,
 238 };
 239
 240 static const struct regulator_desc pm8941_boost = {
 241         .linear_ranges = (struct regulator_linear_range[]) {
 242                 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
 243         },
 244         .n_linear_ranges = 1,
 245         .n_voltages = 31,
 246         .ops = &rpm_smps_ldo_ops,
 247 };
 248
 249 static const struct regulator_desc pm8941_pldo = {
 250         .linear_ranges = (struct regulator_linear_range[]) {
 251                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 252                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 253                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 254         },
 255         .n_linear_ranges = 3,
 256         .n_voltages = 164,
 257         .ops = &rpm_smps_ldo_ops,
 258 };
 259
 260 static const struct regulator_desc pm8941_nldo = {
 261         .linear_ranges = (struct regulator_linear_range[]) {
 262                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 263         },
 264         .n_linear_ranges = 1,
 265         .n_voltages = 64,
 266         .ops = &rpm_smps_ldo_ops,
 267 };
 268
 269 static const struct regulator_desc pm8941_lnldo = {
 270         .fixed_uV = 1740000,
 271         .n_voltages = 1,
 272         .ops = &rpm_smps_ldo_ops_fixed,
 273 };
 274
 275 static const struct regulator_desc pm8941_switch = {
 276         .ops = &rpm_switch_ops,
 277 };
 278
 279 static const struct regulator_desc pm8916_pldo = {
 280         .linear_ranges = (struct regulator_linear_range[]) {
 281                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 282         },
 283         .n_linear_ranges = 1,
 284         .n_voltages = 209,
 285         .ops = &rpm_smps_ldo_ops,
 286 };
 287
 288 static const struct regulator_desc pm8916_nldo = {
 289         .linear_ranges = (struct regulator_linear_range[]) {
 290                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 291         },
 292         .n_linear_ranges = 1,
 293         .n_voltages = 94,
 294         .ops = &rpm_smps_ldo_ops,
 295 };
 296
 297 static const struct regulator_desc pm8916_buck_lvo_smps = {
 298         .linear_ranges = (struct regulator_linear_range[]) {
 299                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 300                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 301         },
 302         .n_linear_ranges = 2,
 303         .n_voltages = 128,
 304         .ops = &rpm_smps_ldo_ops,
 305 };
 306
 307 static const struct regulator_desc pm8916_buck_hvo_smps = {
 308         .linear_ranges = (struct regulator_linear_range[]) {
 309                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 310         },
 311         .n_linear_ranges = 1,
 312         .n_voltages = 32,
 313         .ops = &rpm_smps_ldo_ops,
 314 };
 315
 316 static const struct regulator_desc pm8994_hfsmps = {
 317         .linear_ranges = (struct regulator_linear_range[]) {
 318                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 319                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 320         },
 321         .n_linear_ranges = 2,
 322         .n_voltages = 159,
 323         .ops = &rpm_smps_ldo_ops,
 324 };
 325
 326 static const struct regulator_desc pm8994_ftsmps = {
 327         .linear_ranges = (struct regulator_linear_range[]) {
 328                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 329                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 330         },
 331         .n_linear_ranges = 2,
 332         .n_voltages = 350,
 333         .ops = &rpm_smps_ldo_ops,
 334 };
 335
 336 static const struct regulator_desc pm8994_nldo = {
 337         .linear_ranges = (struct regulator_linear_range[]) {
 338                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 339         },
 340         .n_linear_ranges = 1,
 341         .n_voltages = 64,
 342         .ops = &rpm_smps_ldo_ops,
 343 };
 344
 345 static const struct regulator_desc pm8994_pldo = {
 346         .linear_ranges = (struct regulator_linear_range[]) {
 347                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 348                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 349                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 350         },
 351         .n_linear_ranges = 3,
 352         .n_voltages = 164,
 353         .ops = &rpm_smps_ldo_ops,
 354 };
 355
 356 static const struct regulator_desc pm8994_switch = {
 357         .ops = &rpm_switch_ops,
 358 };
 359
 360 static const struct regulator_desc pm8994_lnldo = {
 361         .fixed_uV = 1740000,
 362         .n_voltages = 1,
 363         .ops = &rpm_smps_ldo_ops_fixed,
 364 };
 365
 366 static const struct regulator_desc pm8998_ftsmps = {
 367         .linear_ranges = (struct regulator_linear_range[]) {
 368                 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
 369         },
 370         .n_linear_ranges = 1,
 371         .n_voltages = 259,
 372         .ops = &rpm_smps_ldo_ops,
 373 };
 374
 375 static const struct regulator_desc pm8998_hfsmps = {
 376         .linear_ranges = (struct regulator_linear_range[]) {
 377                 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
 378         },
 379         .n_linear_ranges = 1,
 380         .n_voltages = 216,
 381         .ops = &rpm_smps_ldo_ops,
 382 };
 383
 384 static const struct regulator_desc pm8998_nldo = {
 385         .linear_ranges = (struct regulator_linear_range[]) {
 386                 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
 387         },
 388         .n_linear_ranges = 1,
 389         .n_voltages = 128,
 390         .ops = &rpm_smps_ldo_ops,
 391 };
 392
 393 static const struct regulator_desc pm8998_pldo = {
 394         .linear_ranges = (struct regulator_linear_range[]) {
 395                 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
 396         },
 397         .n_linear_ranges = 1,
 398         .n_voltages = 256,
 399         .ops = &rpm_smps_ldo_ops,
 400 };
 401
 402 static const struct regulator_desc pm8998_pldo_lv = {
 403         .linear_ranges = (struct regulator_linear_range[]) {
 404                 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
 405         },
 406         .n_linear_ranges = 1,
 407         .n_voltages = 128,
 408         .ops = &rpm_smps_ldo_ops,
 409 };
 410
 411 static const struct regulator_desc pm8998_switch = {
 412         .ops = &rpm_switch_ops,
 413 };
 414
 415 static const struct regulator_desc pmi8998_bob = {
 416         .linear_ranges = (struct regulator_linear_range[]) {
 417                 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
 418         },
 419         .n_linear_ranges = 1,
 420         .n_voltages = 84,
 421         .ops = &rpm_bob_ops,
 422 };
 423
 424 struct rpm_regulator_data {
 425         const char *name;
 426         u32 type;
 427         u32 id;
 428         const struct regulator_desc *desc;
 429         const char *supply;
 430 };
 431
 432 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 433         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 434         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 435         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 436         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 437         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 438         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 439         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 440         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 441         {}
 442 };
 443
 444 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 445         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 446         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 447         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 448         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 449         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 450         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 451         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 452         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 453         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 454         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 455         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 456         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 457         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 458         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 459         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 460         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 461         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 462         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 463         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 464         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 465         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 466         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 467         {}
 468 };
 469
 470 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 471         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 472         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 473         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 474         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 475
 476         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 477         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 478         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 479         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 480         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 481         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 482         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 483         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 484         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 485         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 486         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 487         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 488         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 489         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 490         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 491         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 492         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 493         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 494         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 495         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 496         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 497         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 498         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 499         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 500
 501         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 502         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 503         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 504
 505         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 506         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 507
 508         {}
 509 };
 510
 511 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 512         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 513         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 514         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 515         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 516         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 517         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 518         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 519         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 520         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 521         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 522         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 523         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 524
 525         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 526         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 527         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 528         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 529         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 530         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 531         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 532         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 533         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 534         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 535         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 536         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 537         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 538         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 539         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 540         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 541         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 542         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 543         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 544         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 545         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 546         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 547         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 548         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 549         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 550         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 551         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 552
 553         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 554         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 555         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 556         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 557         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 558
 559         {}
 560 };
 561
 562 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
 563         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
 564         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
 565         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
 566         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
 567         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
 568         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
 569         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
 570         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
 571         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
 572         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
 573         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
 574         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
 575         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
 576         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
 577         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
 578         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
 579         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
 580         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
 581         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
 582         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
 583         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 584         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 585         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
 586         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
 587         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 588         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
 589         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
 590         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
 591         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
 592         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 593         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 594         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
 595         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
 596         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 597         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 598         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 599         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
 600         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
 601         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
 602         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
 603         { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
 604         { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
 605         { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
 606         { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
 607         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
 608         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
 609
 610         {}
 611 };
 612
 613 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
 614         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
 615         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
 616         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
 617         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
 618         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
 619         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
 620         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
 621         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
 622         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
 623         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
 624         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
 625         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
 626         { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
 627         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
 628         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
 629         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
 630         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
 631         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
 632         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
 633         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 634         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
 635         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
 636         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
 637         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
 638         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 639         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
 640         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 641         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
 642         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
 643         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
 644         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
 645         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
 646         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
 647         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
 648         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
 649         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
 650         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
 651         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
 652         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
 653         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
 654         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
 655         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
 656         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
 657         {}
 658 };
 659
 660 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
 661         { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
 662         {}
 663 };
 664
 665 static const struct of_device_id rpm_of_match[] = {
 666         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 667         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 668         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 669         { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
 670         { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
 671         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
 672         { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
 673         {}
 674 };
 675 MODULE_DEVICE_TABLE(of, rpm_of_match);
 676
 677 /**
 678  * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
 679  * @vreg:               Pointer to the individual qcom_smd-regulator resource
 680  * @dev:                Pointer to the top level qcom_smd-regulator PMIC device
 681  * @node:               Pointer to the individual qcom_smd-regulator resource
 682  *                      device node
 683  * @rpm:                Pointer to the rpm bus node
 684  * @pmic_rpm_data:      Pointer to a null-terminated array of qcom_smd-regulator
 685  *                      resources defined for the top level PMIC device
 686  *
 687  * Return: 0 on success, errno on failure
 688  */
 689 static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
 690                                    struct device_node *node, struct qcom_smd_rpm *rpm,
 691                                    const struct rpm_regulator_data *pmic_rpm_data)
 692 {
 693         struct regulator_config config = {};
 694         const struct rpm_regulator_data *rpm_data;
 695         struct regulator_dev *rdev;
 696         int ret;
 697
 698         for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
 699                 if (of_node_name_eq(node, rpm_data->name))
 700                         break;
 701
 702         if (!rpm_data->name) {
 703                 dev_err(dev, "Unknown regulator %pOFn\n", node);
 704                 return -EINVAL;
 705         }
 706
 707         vreg->dev       = dev;
 708         vreg->rpm       = rpm;
 709         vreg->type      = rpm_data->type;
 710         vreg->id        = rpm_data->id;
 711
 712         memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
 713         vreg->desc.name = rpm_data->name;
 714         vreg->desc.supply_name = rpm_data->supply;
 715         vreg->desc.owner = THIS_MODULE;
 716         vreg->desc.type = REGULATOR_VOLTAGE;
 717         vreg->desc.of_match = rpm_data->name;
 718
 719         config.dev              = dev;
 720         config.of_node          = node;
 721         config.driver_data      = vreg;
 722
 723         rdev = devm_regulator_register(dev, &vreg->desc, &config);
 724         if (IS_ERR(rdev)) {
 725                 ret = PTR_ERR(rdev);
 726                 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
 727                 return ret;
 728         }
 729
 730         return 0;
 731 }
 732
 733 static int rpm_reg_probe(struct platform_device *pdev)
 734 {
 735         struct device *dev = &pdev->dev;
 736         const struct rpm_regulator_data *vreg_data;
 737         struct device_node *node;
 738         struct qcom_rpm_reg *vreg;
 739         struct qcom_smd_rpm *rpm;
 740         int ret;
 741
 742         rpm = dev_get_drvdata(pdev->dev.parent);
 743         if (!rpm) {
 744                 dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
 745                 return -ENODEV;
 746         }
 747
 748         vreg_data = of_device_get_match_data(dev);
 749         if (!vreg_data)
 750                 return -ENODEV;
 751
 752         for_each_available_child_of_node(dev->of_node, node) {
 753                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
 754                 if (!vreg) {
 755                         of_node_put(node);
 756                         return -ENOMEM;
 757                 }
 758
 759                 ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
 760
 761                 if (ret < 0) {
 762                         of_node_put(node);
 763                         return ret;
 764                 }
 765         }
 766
 767         return 0;
 768 }
 769
 770 static struct platform_driver rpm_reg_driver = {
 771         .probe = rpm_reg_probe,
 772         .driver = {
 773                 .name  = "qcom_rpm_smd_regulator",
 774                 .of_match_table = rpm_of_match,
 775         },
 776 };
 777
 778 static int __init rpm_reg_init(void)
 779 {
 780         return platform_driver_register(&rpm_reg_driver);
 781 }
 782 subsys_initcall(rpm_reg_init);
 783
 784 static void __exit rpm_reg_exit(void)
 785 {
 786         platform_driver_unregister(&rpm_reg_driver);
 787 }
 788 module_exit(rpm_reg_exit)
 789
 790 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
 791 MODULE_LICENSE("GPL v2");