GNU Linux-libre 5.10.219-gnu1
[releases.git] / drivers / regulator / pcap-regulator.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * PCAP2 Regulator Driver
4  *
5  * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com>
6  */
7
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/err.h>
12 #include <linux/platform_device.h>
13 #include <linux/regulator/driver.h>
14 #include <linux/regulator/machine.h>
15 #include <linux/mfd/ezx-pcap.h>
16
17 static const unsigned int V1_table[] = {
18         2775000, 1275000, 1600000, 1725000, 1825000, 1925000, 2075000, 2275000,
19 };
20
21 static const unsigned int V2_table[] = {
22         2500000, 2775000,
23 };
24
25 static const unsigned int V3_table[] = {
26         1075000, 1275000, 1550000, 1725000, 1876000, 1950000, 2075000, 2275000,
27 };
28
29 static const unsigned int V4_table[] = {
30         1275000, 1550000, 1725000, 1875000, 1950000, 2075000, 2275000, 2775000,
31 };
32
33 static const unsigned int V5_table[] = {
34         1875000, 2275000, 2475000, 2775000,
35 };
36
37 static const unsigned int V6_table[] = {
38         2475000, 2775000,
39 };
40
41 static const unsigned int V7_table[] = {
42         1875000, 2775000,
43 };
44
45 #define V8_table V4_table
46
47 static const unsigned int V9_table[] = {
48         1575000, 1875000, 2475000, 2775000,
49 };
50
51 static const unsigned int V10_table[] = {
52         5000000,
53 };
54
55 static const unsigned int VAUX1_table[] = {
56         1875000, 2475000, 2775000, 3000000,
57 };
58
59 #define VAUX2_table VAUX1_table
60
61 static const unsigned int VAUX3_table[] = {
62         1200000, 1200000, 1200000, 1200000, 1400000, 1600000, 1800000, 2000000,
63         2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000, 3600000,
64 };
65
66 static const unsigned int VAUX4_table[] = {
67         1800000, 1800000, 3000000, 5000000,
68 };
69
70 static const unsigned int VSIM_table[] = {
71         1875000, 3000000,
72 };
73
74 static const unsigned int VSIM2_table[] = {
75         1875000,
76 };
77
78 static const unsigned int VVIB_table[] = {
79         1300000, 1800000, 2000000, 3000000,
80 };
81
82 static const unsigned int SW1_table[] = {
83          900000,  950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1250000,
84         1300000, 1350000, 1400000, 1450000, 1500000, 1600000, 1875000, 2250000,
85 };
86
87 #define SW2_table SW1_table
88
89 struct pcap_regulator {
90         const u8 reg;
91         const u8 en;
92         const u8 index;
93         const u8 stby;
94         const u8 lowpwr;
95 };
96
97 #define NA 0xff
98
99 #define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr)             \
100         [_vreg] = {                                                     \
101                 .reg            = _reg,                                 \
102                 .en             = _en,                                  \
103                 .index          = _index,                               \
104                 .stby           = _stby,                                \
105                 .lowpwr         = _lowpwr,                              \
106         }
107
108 static struct pcap_regulator vreg_table[] = {
109         VREG_INFO(V1,    PCAP_REG_VREG1,   1,  2,  18, 0),
110         VREG_INFO(V2,    PCAP_REG_VREG1,   5,  6,  19, 22),
111         VREG_INFO(V3,    PCAP_REG_VREG1,   7,  8,  20, 23),
112         VREG_INFO(V4,    PCAP_REG_VREG1,   11, 12, 21, 24),
113         /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */
114         VREG_INFO(V5,    PCAP_REG_VREG1,   15, 16, 12, 19),
115
116         VREG_INFO(V6,    PCAP_REG_VREG2,   1,  2,  14, 20),
117         VREG_INFO(V7,    PCAP_REG_VREG2,   3,  4,  15, 21),
118         VREG_INFO(V8,    PCAP_REG_VREG2,   5,  6,  16, 22),
119         VREG_INFO(V9,    PCAP_REG_VREG2,   9,  10, 17, 23),
120         VREG_INFO(V10,   PCAP_REG_VREG2,   10, NA, 18, 24),
121
122         VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1,  2,  22, 23),
123         /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */
124         VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4,  5,  0,  1),
125         VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7,  8,  2,  3),
126         VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4,  5),
127         VREG_INFO(VSIM,  PCAP_REG_AUXVREG, 17, 18, NA, 6),
128         VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
129         VREG_INFO(VVIB,  PCAP_REG_AUXVREG, 19, 20, NA, NA),
130
131         VREG_INFO(SW1,   PCAP_REG_SWCTRL,  1,  2,  NA, NA),
132         VREG_INFO(SW2,   PCAP_REG_SWCTRL,  6,  7,  NA, NA),
133         /* SW3 STBY is on PCAP_REG_AUXVREG */
134         VREG_INFO(SW3,   PCAP_REG_SWCTRL,  11, 12, 24, NA),
135
136         /* SWxS used to control SWx voltage on standby */
137 /*      VREG_INFO(SW1S,  PCAP_REG_LOWPWR,  NA, 12, NA, NA),
138         VREG_INFO(SW2S,  PCAP_REG_LOWPWR,  NA, 20, NA, NA), */
139 };
140
141 static int pcap_regulator_set_voltage_sel(struct regulator_dev *rdev,
142                                           unsigned selector)
143 {
144         struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
145         void *pcap = rdev_get_drvdata(rdev);
146
147         /* the regulator doesn't support voltage switching */
148         if (rdev->desc->n_voltages == 1)
149                 return -EINVAL;
150
151         return ezx_pcap_set_bits(pcap, vreg->reg,
152                                  (rdev->desc->n_voltages - 1) << vreg->index,
153                                  selector << vreg->index);
154 }
155
156 static int pcap_regulator_get_voltage_sel(struct regulator_dev *rdev)
157 {
158         struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
159         void *pcap = rdev_get_drvdata(rdev);
160         u32 tmp;
161
162         if (rdev->desc->n_voltages == 1)
163                 return 0;
164
165         ezx_pcap_read(pcap, vreg->reg, &tmp);
166         tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1));
167         return tmp;
168 }
169
170 static int pcap_regulator_enable(struct regulator_dev *rdev)
171 {
172         struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
173         void *pcap = rdev_get_drvdata(rdev);
174
175         if (vreg->en == NA)
176                 return -EINVAL;
177
178         return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
179 }
180
181 static int pcap_regulator_disable(struct regulator_dev *rdev)
182 {
183         struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
184         void *pcap = rdev_get_drvdata(rdev);
185
186         if (vreg->en == NA)
187                 return -EINVAL;
188
189         return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
190 }
191
192 static int pcap_regulator_is_enabled(struct regulator_dev *rdev)
193 {
194         struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
195         void *pcap = rdev_get_drvdata(rdev);
196         u32 tmp;
197
198         if (vreg->en == NA)
199                 return -EINVAL;
200
201         ezx_pcap_read(pcap, vreg->reg, &tmp);
202         return (tmp >> vreg->en) & 1;
203 }
204
205 static const struct regulator_ops pcap_regulator_ops = {
206         .list_voltage   = regulator_list_voltage_table,
207         .set_voltage_sel = pcap_regulator_set_voltage_sel,
208         .get_voltage_sel = pcap_regulator_get_voltage_sel,
209         .enable         = pcap_regulator_enable,
210         .disable        = pcap_regulator_disable,
211         .is_enabled     = pcap_regulator_is_enabled,
212 };
213
214 #define VREG(_vreg)                                             \
215         [_vreg] = {                                             \
216                 .name           = #_vreg,                       \
217                 .id             = _vreg,                        \
218                 .n_voltages     = ARRAY_SIZE(_vreg##_table),    \
219                 .volt_table     = _vreg##_table,                \
220                 .ops            = &pcap_regulator_ops,          \
221                 .type           = REGULATOR_VOLTAGE,            \
222                 .owner          = THIS_MODULE,                  \
223         }
224
225 static const struct regulator_desc pcap_regulators[] = {
226         VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
227         VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
228         VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
229 };
230
231 static int pcap_regulator_probe(struct platform_device *pdev)
232 {
233         struct regulator_dev *rdev;
234         void *pcap = dev_get_drvdata(pdev->dev.parent);
235         struct regulator_config config = { };
236
237         config.dev = &pdev->dev;
238         config.init_data = dev_get_platdata(&pdev->dev);
239         config.driver_data = pcap;
240
241         rdev = devm_regulator_register(&pdev->dev, &pcap_regulators[pdev->id],
242                                        &config);
243         if (IS_ERR(rdev))
244                 return PTR_ERR(rdev);
245
246         platform_set_drvdata(pdev, rdev);
247
248         return 0;
249 }
250
251 static struct platform_driver pcap_regulator_driver = {
252         .driver = {
253                 .name   = "pcap-regulator",
254         },
255         .probe  = pcap_regulator_probe,
256 };
257
258 static int __init pcap_regulator_init(void)
259 {
260         return platform_driver_register(&pcap_regulator_driver);
261 }
262
263 static void __exit pcap_regulator_exit(void)
264 {
265         platform_driver_unregister(&pcap_regulator_driver);
266 }
267
268 subsys_initcall(pcap_regulator_init);
269 module_exit(pcap_regulator_exit);
270
271 MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>");
272 MODULE_DESCRIPTION("PCAP2 Regulator Driver");
273 MODULE_LICENSE("GPL");