GNU Linux-libre 4.9.326-gnu1
[releases.git] / drivers / pwm / pwm-lpss.c
1 /*
2  * Intel Low Power Subsystem PWM controller driver
3  *
4  * Copyright (C) 2014, Intel Corporation
5  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
6  * Author: Chew Kean Ho <kean.ho.chew@intel.com>
7  * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
8  * Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
9  * Author: Alan Cox <alan@linux.intel.com>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/delay.h>
17 #include <linux/io.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/time.h>
22
23 #include "pwm-lpss.h"
24
25 #define PWM                             0x00000000
26 #define PWM_ENABLE                      BIT(31)
27 #define PWM_SW_UPDATE                   BIT(30)
28 #define PWM_BASE_UNIT_SHIFT             8
29 #define PWM_ON_TIME_DIV_MASK            0x000000ff
30
31 /* Size of each PWM register space if multiple */
32 #define PWM_SIZE                        0x400
33
34 #define MAX_PWMS                        4
35
36 struct pwm_lpss_chip {
37         struct pwm_chip chip;
38         void __iomem *regs;
39         const struct pwm_lpss_boardinfo *info;
40         u32 saved_ctrl[MAX_PWMS];
41 };
42
43 /* BayTrail */
44 const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
45         .clk_rate = 25000000,
46         .npwm = 1,
47         .base_unit_bits = 16,
48 };
49 EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
50
51 /* Braswell */
52 const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
53         .clk_rate = 19200000,
54         .npwm = 1,
55         .base_unit_bits = 16,
56 };
57 EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
58
59 /* Broxton */
60 const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
61         .clk_rate = 19200000,
62         .npwm = 4,
63         .base_unit_bits = 22,
64 };
65 EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info);
66
67 static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
68 {
69         return container_of(chip, struct pwm_lpss_chip, chip);
70 }
71
72 static inline u32 pwm_lpss_read(const struct pwm_device *pwm)
73 {
74         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
75
76         return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
77 }
78
79 static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)
80 {
81         struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
82
83         writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
84 }
85
86 static void pwm_lpss_update(struct pwm_device *pwm)
87 {
88         pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_SW_UPDATE);
89         /* Give it some time to propagate */
90         usleep_range(10, 50);
91 }
92
93 static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
94                            int duty_ns, int period_ns)
95 {
96         struct pwm_lpss_chip *lpwm = to_lpwm(chip);
97         unsigned long long on_time_div;
98         unsigned long c = lpwm->info->clk_rate, base_unit_range;
99         unsigned long long base_unit, freq = NSEC_PER_SEC;
100         u32 ctrl;
101
102         do_div(freq, period_ns);
103
104         /*
105          * The equation is:
106          * base_unit = round(base_unit_range * freq / c)
107          */
108         base_unit_range = BIT(lpwm->info->base_unit_bits);
109         freq *= base_unit_range;
110
111         base_unit = DIV_ROUND_CLOSEST_ULL(freq, c);
112
113         if (duty_ns <= 0)
114                 duty_ns = 1;
115         on_time_div = 255ULL * duty_ns;
116         do_div(on_time_div, period_ns);
117         on_time_div = 255ULL - on_time_div;
118
119         pm_runtime_get_sync(chip->dev);
120
121         ctrl = pwm_lpss_read(pwm);
122         ctrl &= ~PWM_ON_TIME_DIV_MASK;
123         ctrl &= ~((base_unit_range - 1) << PWM_BASE_UNIT_SHIFT);
124         base_unit &= (base_unit_range - 1);
125         ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
126         ctrl |= on_time_div;
127         pwm_lpss_write(pwm, ctrl);
128
129         /*
130          * If the PWM is already enabled we need to notify the hardware
131          * about the change by setting PWM_SW_UPDATE.
132          */
133         if (pwm_is_enabled(pwm))
134                 pwm_lpss_update(pwm);
135
136         pm_runtime_put(chip->dev);
137
138         return 0;
139 }
140
141 static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
142 {
143         pm_runtime_get_sync(chip->dev);
144
145         /*
146          * Hardware must first see PWM_SW_UPDATE before the PWM can be
147          * enabled.
148          */
149         pwm_lpss_update(pwm);
150         pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);
151         return 0;
152 }
153
154 static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
155 {
156         pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);
157         pm_runtime_put(chip->dev);
158 }
159
160 static const struct pwm_ops pwm_lpss_ops = {
161         .config = pwm_lpss_config,
162         .enable = pwm_lpss_enable,
163         .disable = pwm_lpss_disable,
164         .owner = THIS_MODULE,
165 };
166
167 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
168                                      const struct pwm_lpss_boardinfo *info)
169 {
170         struct pwm_lpss_chip *lpwm;
171         unsigned long c;
172         int ret;
173
174         if (WARN_ON(info->npwm > MAX_PWMS))
175                 return ERR_PTR(-ENODEV);
176
177         lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
178         if (!lpwm)
179                 return ERR_PTR(-ENOMEM);
180
181         lpwm->regs = devm_ioremap_resource(dev, r);
182         if (IS_ERR(lpwm->regs))
183                 return ERR_CAST(lpwm->regs);
184
185         lpwm->info = info;
186
187         c = lpwm->info->clk_rate;
188         if (!c)
189                 return ERR_PTR(-EINVAL);
190
191         lpwm->chip.dev = dev;
192         lpwm->chip.ops = &pwm_lpss_ops;
193         lpwm->chip.base = -1;
194         lpwm->chip.npwm = info->npwm;
195
196         ret = pwmchip_add(&lpwm->chip);
197         if (ret) {
198                 dev_err(dev, "failed to add PWM chip: %d\n", ret);
199                 return ERR_PTR(ret);
200         }
201
202         return lpwm;
203 }
204 EXPORT_SYMBOL_GPL(pwm_lpss_probe);
205
206 int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
207 {
208         int i;
209
210         for (i = 0; i < lpwm->info->npwm; i++) {
211                 if (pwm_is_enabled(&lpwm->chip.pwms[i]))
212                         pm_runtime_put(lpwm->chip.dev);
213         }
214         return pwmchip_remove(&lpwm->chip);
215 }
216 EXPORT_SYMBOL_GPL(pwm_lpss_remove);
217
218 int pwm_lpss_suspend(struct device *dev)
219 {
220         struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev);
221         int i;
222
223         for (i = 0; i < lpwm->info->npwm; i++)
224                 lpwm->saved_ctrl[i] = readl(lpwm->regs + i * PWM_SIZE + PWM);
225
226         return 0;
227 }
228 EXPORT_SYMBOL_GPL(pwm_lpss_suspend);
229
230 int pwm_lpss_resume(struct device *dev)
231 {
232         struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev);
233         int i;
234
235         for (i = 0; i < lpwm->info->npwm; i++)
236                 writel(lpwm->saved_ctrl[i], lpwm->regs + i * PWM_SIZE + PWM);
237
238         return 0;
239 }
240 EXPORT_SYMBOL_GPL(pwm_lpss_resume);
241
242 MODULE_DESCRIPTION("PWM driver for Intel LPSS");
243 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
244 MODULE_LICENSE("GPL v2");