2 * Intel Running Average Power Limit (RAPL) Driver
3 * Copyright (c) 2013, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/list.h>
23 #include <linux/types.h>
24 #include <linux/device.h>
25 #include <linux/slab.h>
26 #include <linux/log2.h>
27 #include <linux/bitmap.h>
28 #include <linux/delay.h>
29 #include <linux/sysfs.h>
30 #include <linux/cpu.h>
31 #include <linux/powercap.h>
32 #include <asm/iosf_mbi.h>
34 #include <asm/processor.h>
35 #include <asm/cpu_device_id.h>
36 #include <asm/intel-family.h>
39 #define MSR_PLATFORM_POWER_LIMIT 0x0000065C
41 /* bitmasks for RAPL MSRs, used by primitive access functions */
42 #define ENERGY_STATUS_MASK 0xffffffff
44 #define POWER_LIMIT1_MASK 0x7FFF
45 #define POWER_LIMIT1_ENABLE BIT(15)
46 #define POWER_LIMIT1_CLAMP BIT(16)
48 #define POWER_LIMIT2_MASK (0x7FFFULL<<32)
49 #define POWER_LIMIT2_ENABLE BIT_ULL(47)
50 #define POWER_LIMIT2_CLAMP BIT_ULL(48)
51 #define POWER_PACKAGE_LOCK BIT_ULL(63)
52 #define POWER_PP_LOCK BIT(31)
54 #define TIME_WINDOW1_MASK (0x7FULL<<17)
55 #define TIME_WINDOW2_MASK (0x7FULL<<49)
57 #define POWER_UNIT_OFFSET 0
58 #define POWER_UNIT_MASK 0x0F
60 #define ENERGY_UNIT_OFFSET 0x08
61 #define ENERGY_UNIT_MASK 0x1F00
63 #define TIME_UNIT_OFFSET 0x10
64 #define TIME_UNIT_MASK 0xF0000
66 #define POWER_INFO_MAX_MASK (0x7fffULL<<32)
67 #define POWER_INFO_MIN_MASK (0x7fffULL<<16)
68 #define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48)
69 #define POWER_INFO_THERMAL_SPEC_MASK 0x7fff
71 #define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
72 #define PP_POLICY_MASK 0x1F
74 /* Non HW constants */
75 #define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
76 #define RAPL_PRIMITIVE_DUMMY BIT(2)
78 #define TIME_WINDOW_MAX_MSEC 40000
79 #define TIME_WINDOW_MIN_MSEC 250
80 #define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to powercap unit */
82 ARBITRARY_UNIT, /* no translation */
88 enum rapl_domain_type {
89 RAPL_DOMAIN_PACKAGE, /* entire package/socket */
90 RAPL_DOMAIN_PP0, /* core power plane */
91 RAPL_DOMAIN_PP1, /* graphics uncore */
92 RAPL_DOMAIN_DRAM,/* DRAM control_type */
93 RAPL_DOMAIN_PLATFORM, /* PSys control_type */
97 enum rapl_domain_msr_id {
98 RAPL_DOMAIN_MSR_LIMIT,
99 RAPL_DOMAIN_MSR_STATUS,
100 RAPL_DOMAIN_MSR_PERF,
101 RAPL_DOMAIN_MSR_POLICY,
102 RAPL_DOMAIN_MSR_INFO,
106 /* per domain data, some are optional */
107 enum rapl_primitives {
113 PL1_ENABLE, /* power limit 1, aka long term */
114 PL1_CLAMP, /* allow frequency to go below OS request */
115 PL2_ENABLE, /* power limit 2, aka short term, instantaneous */
118 TIME_WINDOW1, /* long term */
119 TIME_WINDOW2, /* short term */
128 /* below are not raw primitive data */
133 #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
135 /* Can be expanded to include events, etc.*/
136 struct rapl_domain_data {
137 u64 primitives[NR_RAPL_PRIMITIVES];
138 unsigned long timestamp;
148 #define DOMAIN_STATE_INACTIVE BIT(0)
149 #define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
150 #define DOMAIN_STATE_BIOS_LOCKED BIT(2)
152 #define NR_POWER_LIMITS (2)
153 struct rapl_power_limit {
154 struct powercap_zone_constraint *constraint;
155 int prim_id; /* primitive ID used to enable */
156 struct rapl_domain *domain;
160 static const char pl1_name[] = "long_term";
161 static const char pl2_name[] = "short_term";
166 enum rapl_domain_type id;
167 int msrs[RAPL_DOMAIN_MSR_MAX];
168 struct powercap_zone power_zone;
169 struct rapl_domain_data rdd;
170 struct rapl_power_limit rpl[NR_POWER_LIMITS];
171 u64 attr_map; /* track capabilities */
173 unsigned int domain_energy_unit;
174 struct rapl_package *rp;
176 #define power_zone_to_rapl_domain(_zone) \
177 container_of(_zone, struct rapl_domain, power_zone)
180 /* Each physical package contains multiple domains, these are the common
181 * data across RAPL domains within a package.
183 struct rapl_package {
184 unsigned int id; /* physical package/socket id */
185 unsigned int nr_domains;
186 unsigned long domain_map; /* bit map of active domains */
187 unsigned int power_unit;
188 unsigned int energy_unit;
189 unsigned int time_unit;
190 struct rapl_domain *domains; /* array of domains, sized at runtime */
191 struct powercap_zone *power_zone; /* keep track of parent zone */
192 int nr_cpus; /* active cpus on the package, topology info is lost during
193 * cpu hotplug. so we have to track ourselves.
195 unsigned long power_limit_irq; /* keep track of package power limit
196 * notify interrupt enable status.
198 struct list_head plist;
199 int lead_cpu; /* one active cpu per package for access */
202 struct rapl_defaults {
203 u8 floor_freq_reg_addr;
204 int (*check_unit)(struct rapl_package *rp, int cpu);
205 void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
206 u64 (*compute_time_window)(struct rapl_package *rp, u64 val,
208 unsigned int dram_domain_energy_unit;
210 static struct rapl_defaults *rapl_defaults;
212 /* Sideband MBI registers */
213 #define IOSF_CPU_POWER_BUDGET_CTL_BYT (0x2)
214 #define IOSF_CPU_POWER_BUDGET_CTL_TNG (0xdf)
216 #define PACKAGE_PLN_INT_SAVED BIT(0)
217 #define MAX_PRIM_NAME (32)
219 /* per domain data. used to describe individual knobs such that access function
220 * can be consolidated into one instead of many inline functions.
222 struct rapl_primitive_info {
226 enum rapl_domain_msr_id id;
231 #define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \
240 static void rapl_init_domains(struct rapl_package *rp);
241 static int rapl_read_data_raw(struct rapl_domain *rd,
242 enum rapl_primitives prim,
243 bool xlate, u64 *data);
244 static int rapl_write_data_raw(struct rapl_domain *rd,
245 enum rapl_primitives prim,
246 unsigned long long value);
247 static u64 rapl_unit_xlate(struct rapl_domain *rd,
248 enum unit_type type, u64 value,
250 static void package_power_limit_irq_save(struct rapl_package *rp);
252 static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */
254 static const char * const rapl_domain_names[] = {
262 static struct powercap_control_type *control_type; /* PowerCap Controller */
263 static struct rapl_domain *platform_rapl_domain; /* Platform (PSys) domain */
265 /* caller to ensure CPU hotplug lock is held */
266 static struct rapl_package *find_package_by_id(int id)
268 struct rapl_package *rp;
270 list_for_each_entry(rp, &rapl_packages, plist) {
278 /* caller must hold cpu hotplug lock */
279 static void rapl_cleanup_data(void)
281 struct rapl_package *p, *tmp;
283 list_for_each_entry_safe(p, tmp, &rapl_packages, plist) {
290 static int get_energy_counter(struct powercap_zone *power_zone, u64 *energy_raw)
292 struct rapl_domain *rd;
295 /* prevent CPU hotplug, make sure the RAPL domain does not go
296 * away while reading the counter.
299 rd = power_zone_to_rapl_domain(power_zone);
301 if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) {
302 *energy_raw = energy_now;
312 static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64 *energy)
314 struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev);
316 *energy = rapl_unit_xlate(rd, ENERGY_UNIT, ENERGY_STATUS_MASK, 0);
320 static int release_zone(struct powercap_zone *power_zone)
322 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
323 struct rapl_package *rp = rd->rp;
325 /* package zone is the last zone of a package, we can free
326 * memory here since all children has been unregistered.
328 if (rd->id == RAPL_DOMAIN_PACKAGE) {
337 static int find_nr_power_limit(struct rapl_domain *rd)
341 for (i = 0; i < NR_POWER_LIMITS; i++) {
349 static int set_domain_enable(struct powercap_zone *power_zone, bool mode)
351 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
353 if (rd->state & DOMAIN_STATE_BIOS_LOCKED)
357 rapl_write_data_raw(rd, PL1_ENABLE, mode);
358 if (rapl_defaults->set_floor_freq)
359 rapl_defaults->set_floor_freq(rd, mode);
365 static int get_domain_enable(struct powercap_zone *power_zone, bool *mode)
367 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
370 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
375 if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) {
385 /* per RAPL domain ops, in the order of rapl_domain_type */
386 static const struct powercap_zone_ops zone_ops[] = {
387 /* RAPL_DOMAIN_PACKAGE */
389 .get_energy_uj = get_energy_counter,
390 .get_max_energy_range_uj = get_max_energy_counter,
391 .release = release_zone,
392 .set_enable = set_domain_enable,
393 .get_enable = get_domain_enable,
395 /* RAPL_DOMAIN_PP0 */
397 .get_energy_uj = get_energy_counter,
398 .get_max_energy_range_uj = get_max_energy_counter,
399 .release = release_zone,
400 .set_enable = set_domain_enable,
401 .get_enable = get_domain_enable,
403 /* RAPL_DOMAIN_PP1 */
405 .get_energy_uj = get_energy_counter,
406 .get_max_energy_range_uj = get_max_energy_counter,
407 .release = release_zone,
408 .set_enable = set_domain_enable,
409 .get_enable = get_domain_enable,
411 /* RAPL_DOMAIN_DRAM */
413 .get_energy_uj = get_energy_counter,
414 .get_max_energy_range_uj = get_max_energy_counter,
415 .release = release_zone,
416 .set_enable = set_domain_enable,
417 .get_enable = get_domain_enable,
419 /* RAPL_DOMAIN_PLATFORM */
421 .get_energy_uj = get_energy_counter,
422 .get_max_energy_range_uj = get_max_energy_counter,
423 .release = release_zone,
424 .set_enable = set_domain_enable,
425 .get_enable = get_domain_enable,
431 * Constraint index used by powercap can be different than power limit (PL)
432 * index in that some PLs maybe missing due to non-existant MSRs. So we
433 * need to convert here by finding the valid PLs only (name populated).
435 static int contraint_to_pl(struct rapl_domain *rd, int cid)
439 for (i = 0, j = 0; i < NR_POWER_LIMITS; i++) {
440 if ((rd->rpl[i].name) && j++ == cid) {
441 pr_debug("%s: index %d\n", __func__, i);
445 pr_err("Cannot find matching power limit for constraint %d\n", cid);
450 static int set_power_limit(struct powercap_zone *power_zone, int cid,
453 struct rapl_domain *rd;
454 struct rapl_package *rp;
459 rd = power_zone_to_rapl_domain(power_zone);
460 id = contraint_to_pl(rd, cid);
468 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
469 dev_warn(&power_zone->dev, "%s locked by BIOS, monitoring only\n",
475 switch (rd->rpl[id].prim_id) {
477 rapl_write_data_raw(rd, POWER_LIMIT1, power_limit);
480 rapl_write_data_raw(rd, POWER_LIMIT2, power_limit);
486 package_power_limit_irq_save(rp);
492 static int get_current_power_limit(struct powercap_zone *power_zone, int cid,
495 struct rapl_domain *rd;
502 rd = power_zone_to_rapl_domain(power_zone);
503 id = contraint_to_pl(rd, cid);
509 switch (rd->rpl[id].prim_id) {
520 if (rapl_read_data_raw(rd, prim, true, &val))
531 static int set_time_window(struct powercap_zone *power_zone, int cid,
534 struct rapl_domain *rd;
539 rd = power_zone_to_rapl_domain(power_zone);
540 id = contraint_to_pl(rd, cid);
546 switch (rd->rpl[id].prim_id) {
548 rapl_write_data_raw(rd, TIME_WINDOW1, window);
551 rapl_write_data_raw(rd, TIME_WINDOW2, window);
562 static int get_time_window(struct powercap_zone *power_zone, int cid, u64 *data)
564 struct rapl_domain *rd;
570 rd = power_zone_to_rapl_domain(power_zone);
571 id = contraint_to_pl(rd, cid);
577 switch (rd->rpl[id].prim_id) {
579 ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val);
582 ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val);
597 static const char *get_constraint_name(struct powercap_zone *power_zone, int cid)
599 struct rapl_domain *rd;
602 rd = power_zone_to_rapl_domain(power_zone);
603 id = contraint_to_pl(rd, cid);
605 return rd->rpl[id].name;
611 static int get_max_power(struct powercap_zone *power_zone, int id,
614 struct rapl_domain *rd;
620 rd = power_zone_to_rapl_domain(power_zone);
621 switch (rd->rpl[id].prim_id) {
623 prim = THERMAL_SPEC_POWER;
632 if (rapl_read_data_raw(rd, prim, true, &val))
642 static const struct powercap_zone_constraint_ops constraint_ops = {
643 .set_power_limit_uw = set_power_limit,
644 .get_power_limit_uw = get_current_power_limit,
645 .set_time_window_us = set_time_window,
646 .get_time_window_us = get_time_window,
647 .get_max_power_uw = get_max_power,
648 .get_name = get_constraint_name,
651 /* called after domain detection and package level data are set */
652 static void rapl_init_domains(struct rapl_package *rp)
655 struct rapl_domain *rd = rp->domains;
657 for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
658 unsigned int mask = rp->domain_map & (1 << i);
660 case BIT(RAPL_DOMAIN_PACKAGE):
661 rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE];
662 rd->id = RAPL_DOMAIN_PACKAGE;
663 rd->msrs[0] = MSR_PKG_POWER_LIMIT;
664 rd->msrs[1] = MSR_PKG_ENERGY_STATUS;
665 rd->msrs[2] = MSR_PKG_PERF_STATUS;
667 rd->msrs[4] = MSR_PKG_POWER_INFO;
668 rd->rpl[0].prim_id = PL1_ENABLE;
669 rd->rpl[0].name = pl1_name;
670 rd->rpl[1].prim_id = PL2_ENABLE;
671 rd->rpl[1].name = pl2_name;
673 case BIT(RAPL_DOMAIN_PP0):
674 rd->name = rapl_domain_names[RAPL_DOMAIN_PP0];
675 rd->id = RAPL_DOMAIN_PP0;
676 rd->msrs[0] = MSR_PP0_POWER_LIMIT;
677 rd->msrs[1] = MSR_PP0_ENERGY_STATUS;
679 rd->msrs[3] = MSR_PP0_POLICY;
681 rd->rpl[0].prim_id = PL1_ENABLE;
682 rd->rpl[0].name = pl1_name;
684 case BIT(RAPL_DOMAIN_PP1):
685 rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
686 rd->id = RAPL_DOMAIN_PP1;
687 rd->msrs[0] = MSR_PP1_POWER_LIMIT;
688 rd->msrs[1] = MSR_PP1_ENERGY_STATUS;
690 rd->msrs[3] = MSR_PP1_POLICY;
692 rd->rpl[0].prim_id = PL1_ENABLE;
693 rd->rpl[0].name = pl1_name;
695 case BIT(RAPL_DOMAIN_DRAM):
696 rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
697 rd->id = RAPL_DOMAIN_DRAM;
698 rd->msrs[0] = MSR_DRAM_POWER_LIMIT;
699 rd->msrs[1] = MSR_DRAM_ENERGY_STATUS;
700 rd->msrs[2] = MSR_DRAM_PERF_STATUS;
702 rd->msrs[4] = MSR_DRAM_POWER_INFO;
703 rd->rpl[0].prim_id = PL1_ENABLE;
704 rd->rpl[0].name = pl1_name;
705 rd->domain_energy_unit =
706 rapl_defaults->dram_domain_energy_unit;
707 if (rd->domain_energy_unit)
708 pr_info("DRAM domain energy unit %dpj\n",
709 rd->domain_energy_unit);
719 static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type,
720 u64 value, int to_raw)
723 struct rapl_package *rp = rd->rp;
728 units = rp->power_unit;
731 scale = ENERGY_UNIT_SCALE;
732 /* per domain unit takes precedence */
733 if (rd->domain_energy_unit)
734 units = rd->domain_energy_unit;
736 units = rp->energy_unit;
739 return rapl_defaults->compute_time_window(rp, value, to_raw);
746 return div64_u64(value, units) * scale;
750 return div64_u64(value, scale);
753 /* in the order of enum rapl_primitives */
754 static struct rapl_primitive_info rpi[] = {
755 /* name, mask, shift, msr index, unit divisor */
756 PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0,
757 RAPL_DOMAIN_MSR_STATUS, ENERGY_UNIT, 0),
758 PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0,
759 RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0),
760 PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32,
761 RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0),
762 PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31,
763 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
764 PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15,
765 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
766 PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16,
767 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
768 PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47,
769 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
770 PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48,
771 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
772 PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17,
773 RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0),
774 PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49,
775 RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0),
776 PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER, POWER_INFO_THERMAL_SPEC_MASK,
777 0, RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
778 PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32,
779 RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
780 PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16,
781 RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
782 PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW, POWER_INFO_MAX_TIME_WIN_MASK, 48,
783 RAPL_DOMAIN_MSR_INFO, TIME_UNIT, 0),
784 PRIMITIVE_INFO_INIT(THROTTLED_TIME, PERF_STATUS_THROTTLE_TIME_MASK, 0,
785 RAPL_DOMAIN_MSR_PERF, TIME_UNIT, 0),
786 PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
787 RAPL_DOMAIN_MSR_POLICY, ARBITRARY_UNIT, 0),
789 PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
790 RAPL_PRIMITIVE_DERIVED),
794 /* Read primitive data based on its related struct rapl_primitive_info.
795 * if xlate flag is set, return translated data based on data units, i.e.
796 * time, energy, and power.
797 * RAPL MSRs are non-architectual and are laid out not consistently across
798 * domains. Here we use primitive info to allow writing consolidated access
800 * For a given primitive, it is processed by MSR mask and shift. Unit conversion
801 * is pre-assigned based on RAPL unit MSRs read at init time.
802 * 63-------------------------- 31--------------------------- 0
804 * | |<- shift ----------------|
805 * 63-------------------------- 31--------------------------- 0
807 static int rapl_read_data_raw(struct rapl_domain *rd,
808 enum rapl_primitives prim,
809 bool xlate, u64 *data)
813 struct rapl_primitive_info *rp = &rpi[prim];
816 if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
819 msr = rd->msrs[rp->id];
823 cpu = rd->rp->lead_cpu;
825 /* special-case package domain, which uses a different bit*/
826 if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) {
827 rp->mask = POWER_PACKAGE_LOCK;
830 /* non-hardware data are collected by the polling thread */
831 if (rp->flag & RAPL_PRIMITIVE_DERIVED) {
832 *data = rd->rdd.primitives[prim];
836 if (rdmsrl_safe_on_cpu(cpu, msr, &value)) {
837 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
841 final = value & rp->mask;
842 final = final >> rp->shift;
844 *data = rapl_unit_xlate(rd, rp->unit, final, 0);
852 static int msrl_update_safe(u32 msr_no, u64 clear_mask, u64 set_mask)
857 err = rdmsrl_safe(msr_no, &val);
864 err = wrmsrl_safe(msr_no, val);
870 static void msrl_update_func(void *info)
872 struct msrl_action *ma = info;
874 ma->err = msrl_update_safe(ma->msr_no, ma->clear_mask, ma->set_mask);
877 /* Similar use of primitive info in the read counterpart */
878 static int rapl_write_data_raw(struct rapl_domain *rd,
879 enum rapl_primitives prim,
880 unsigned long long value)
882 struct rapl_primitive_info *rp = &rpi[prim];
885 struct msrl_action ma;
888 cpu = rd->rp->lead_cpu;
889 bits = rapl_unit_xlate(rd, rp->unit, value, 1);
890 bits |= bits << rp->shift;
891 memset(&ma, 0, sizeof(ma));
893 ma.msr_no = rd->msrs[rp->id];
894 ma.clear_mask = rp->mask;
897 ret = smp_call_function_single(cpu, msrl_update_func, &ma, 1);
907 * Raw RAPL data stored in MSRs are in certain scales. We need to
908 * convert them into standard units based on the units reported in
909 * the RAPL unit MSRs. This is specific to CPUs as the method to
910 * calculate units differ on different CPUs.
911 * We convert the units to below format based on CPUs.
913 * energy unit: picoJoules : Represented in picoJoules by default
914 * power unit : microWatts : Represented in milliWatts by default
915 * time unit : microseconds: Represented in seconds by default
917 static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
922 if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) {
923 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
924 MSR_RAPL_POWER_UNIT, cpu);
928 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
929 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
931 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
932 rp->power_unit = 1000000 / (1 << value);
934 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
935 rp->time_unit = 1000000 / (1 << value);
937 pr_debug("Core CPU package %d energy=%dpJ, time=%dus, power=%duW\n",
938 rp->id, rp->energy_unit, rp->time_unit, rp->power_unit);
943 static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
948 if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) {
949 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
950 MSR_RAPL_POWER_UNIT, cpu);
953 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
954 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
956 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
957 rp->power_unit = (1 << value) * 1000;
959 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
960 rp->time_unit = 1000000 / (1 << value);
962 pr_debug("Atom package %d energy=%dpJ, time=%dus, power=%duW\n",
963 rp->id, rp->energy_unit, rp->time_unit, rp->power_unit);
968 static void power_limit_irq_save_cpu(void *info)
971 struct rapl_package *rp = (struct rapl_package *)info;
973 /* save the state of PLN irq mask bit before disabling it */
974 rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
975 if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) {
976 rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE;
977 rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED;
979 l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
980 wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
985 * When package power limit is set artificially low by RAPL, LVT
986 * thermal interrupt for package power limit should be ignored
987 * since we are not really exceeding the real limit. The intention
988 * is to avoid excessive interrupts while we are trying to save power.
989 * A useful feature might be routing the package_power_limit interrupt
990 * to userspace via eventfd. once we have a usecase, this is simple
991 * to do by adding an atomic notifier.
994 static void package_power_limit_irq_save(struct rapl_package *rp)
996 if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN))
999 smp_call_function_single(rp->lead_cpu, power_limit_irq_save_cpu, rp, 1);
1002 static void power_limit_irq_restore_cpu(void *info)
1005 struct rapl_package *rp = (struct rapl_package *)info;
1007 rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
1009 if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE)
1010 l |= PACKAGE_THERM_INT_PLN_ENABLE;
1012 l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
1014 wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
1017 /* restore per package power limit interrupt enable state */
1018 static void package_power_limit_irq_restore(struct rapl_package *rp)
1020 if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN))
1023 /* irq enable state not saved, nothing to restore */
1024 if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED))
1027 smp_call_function_single(rp->lead_cpu, power_limit_irq_restore_cpu, rp, 1);
1030 static void set_floor_freq_default(struct rapl_domain *rd, bool mode)
1032 int nr_powerlimit = find_nr_power_limit(rd);
1034 /* always enable clamp such that p-state can go below OS requested
1035 * range. power capping priority over guranteed frequency.
1037 rapl_write_data_raw(rd, PL1_CLAMP, mode);
1039 /* some domains have pl2 */
1040 if (nr_powerlimit > 1) {
1041 rapl_write_data_raw(rd, PL2_ENABLE, mode);
1042 rapl_write_data_raw(rd, PL2_CLAMP, mode);
1046 static void set_floor_freq_atom(struct rapl_domain *rd, bool enable)
1048 static u32 power_ctrl_orig_val;
1051 if (!rapl_defaults->floor_freq_reg_addr) {
1052 pr_err("Invalid floor frequency config register\n");
1056 if (!power_ctrl_orig_val)
1057 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_CR_READ,
1058 rapl_defaults->floor_freq_reg_addr,
1059 &power_ctrl_orig_val);
1060 mdata = power_ctrl_orig_val;
1062 mdata &= ~(0x7f << 8);
1065 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_CR_WRITE,
1066 rapl_defaults->floor_freq_reg_addr, mdata);
1069 static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value,
1072 u64 f, y; /* fraction and exp. used for time unit */
1075 * Special processing based on 2^Y*(1+F/4), refer
1076 * to Intel Software Developer's manual Vol.3B: CH 14.9.3.
1079 f = (value & 0x60) >> 5;
1081 value = (1 << y) * (4 + f) * rp->time_unit / 4;
1083 do_div(value, rp->time_unit);
1085 f = div64_u64(4 * (value - (1 << y)), 1 << y);
1086 value = (y & 0x1f) | ((f & 0x3) << 5);
1091 static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value,
1095 * Atom time unit encoding is straight forward val * time_unit,
1096 * where time_unit is default to 1 sec. Never 0.
1099 return (value) ? value *= rp->time_unit : rp->time_unit;
1101 value = div64_u64(value, rp->time_unit);
1106 static const struct rapl_defaults rapl_defaults_core = {
1107 .floor_freq_reg_addr = 0,
1108 .check_unit = rapl_check_unit_core,
1109 .set_floor_freq = set_floor_freq_default,
1110 .compute_time_window = rapl_compute_time_window_core,
1113 static const struct rapl_defaults rapl_defaults_hsw_server = {
1114 .check_unit = rapl_check_unit_core,
1115 .set_floor_freq = set_floor_freq_default,
1116 .compute_time_window = rapl_compute_time_window_core,
1117 .dram_domain_energy_unit = 15300,
1120 static const struct rapl_defaults rapl_defaults_byt = {
1121 .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_BYT,
1122 .check_unit = rapl_check_unit_atom,
1123 .set_floor_freq = set_floor_freq_atom,
1124 .compute_time_window = rapl_compute_time_window_atom,
1127 static const struct rapl_defaults rapl_defaults_tng = {
1128 .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_TNG,
1129 .check_unit = rapl_check_unit_atom,
1130 .set_floor_freq = set_floor_freq_atom,
1131 .compute_time_window = rapl_compute_time_window_atom,
1134 static const struct rapl_defaults rapl_defaults_ann = {
1135 .floor_freq_reg_addr = 0,
1136 .check_unit = rapl_check_unit_atom,
1137 .set_floor_freq = NULL,
1138 .compute_time_window = rapl_compute_time_window_atom,
1141 static const struct rapl_defaults rapl_defaults_cht = {
1142 .floor_freq_reg_addr = 0,
1143 .check_unit = rapl_check_unit_atom,
1144 .set_floor_freq = NULL,
1145 .compute_time_window = rapl_compute_time_window_atom,
1148 #define RAPL_CPU(_model, _ops) { \
1149 .vendor = X86_VENDOR_INTEL, \
1152 .driver_data = (kernel_ulong_t)&_ops, \
1155 static const struct x86_cpu_id rapl_ids[] __initconst = {
1156 RAPL_CPU(INTEL_FAM6_SANDYBRIDGE, rapl_defaults_core),
1157 RAPL_CPU(INTEL_FAM6_SANDYBRIDGE_X, rapl_defaults_core),
1159 RAPL_CPU(INTEL_FAM6_IVYBRIDGE, rapl_defaults_core),
1160 RAPL_CPU(INTEL_FAM6_IVYBRIDGE_X, rapl_defaults_core),
1162 RAPL_CPU(INTEL_FAM6_HASWELL_CORE, rapl_defaults_core),
1163 RAPL_CPU(INTEL_FAM6_HASWELL_ULT, rapl_defaults_core),
1164 RAPL_CPU(INTEL_FAM6_HASWELL_GT3E, rapl_defaults_core),
1165 RAPL_CPU(INTEL_FAM6_HASWELL_X, rapl_defaults_hsw_server),
1167 RAPL_CPU(INTEL_FAM6_BROADWELL_CORE, rapl_defaults_core),
1168 RAPL_CPU(INTEL_FAM6_BROADWELL_GT3E, rapl_defaults_core),
1169 RAPL_CPU(INTEL_FAM6_BROADWELL_XEON_D, rapl_defaults_core),
1170 RAPL_CPU(INTEL_FAM6_BROADWELL_X, rapl_defaults_hsw_server),
1172 RAPL_CPU(INTEL_FAM6_SKYLAKE_DESKTOP, rapl_defaults_core),
1173 RAPL_CPU(INTEL_FAM6_SKYLAKE_MOBILE, rapl_defaults_core),
1174 RAPL_CPU(INTEL_FAM6_SKYLAKE_X, rapl_defaults_hsw_server),
1175 RAPL_CPU(INTEL_FAM6_KABYLAKE_MOBILE, rapl_defaults_core),
1176 RAPL_CPU(INTEL_FAM6_KABYLAKE_DESKTOP, rapl_defaults_core),
1178 RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT, rapl_defaults_byt),
1179 RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT, rapl_defaults_cht),
1180 RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT_MID,rapl_defaults_tng),
1181 RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT_MID, rapl_defaults_ann),
1182 RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT, rapl_defaults_core),
1183 RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT_X, rapl_defaults_core),
1185 RAPL_CPU(INTEL_FAM6_XEON_PHI_KNL, rapl_defaults_hsw_server),
1188 MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
1190 /* read once for all raw primitive data for all packages, domains */
1191 static void rapl_update_domain_data(void)
1195 struct rapl_package *rp;
1197 list_for_each_entry(rp, &rapl_packages, plist) {
1198 for (dmn = 0; dmn < rp->nr_domains; dmn++) {
1199 pr_debug("update package %d domain %s data\n", rp->id,
1200 rp->domains[dmn].name);
1201 /* exclude non-raw primitives */
1202 for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++)
1203 if (!rapl_read_data_raw(&rp->domains[dmn], prim,
1206 rp->domains[dmn].rdd.primitives[prim] =
1213 static int rapl_unregister_powercap(void)
1215 struct rapl_package *rp;
1216 struct rapl_domain *rd, *rd_package = NULL;
1218 /* unregister all active rapl packages from the powercap layer,
1221 list_for_each_entry(rp, &rapl_packages, plist) {
1222 package_power_limit_irq_restore(rp);
1224 for (rd = rp->domains; rd < rp->domains + rp->nr_domains;
1226 pr_debug("remove package, undo power limit on %d: %s\n",
1228 rapl_write_data_raw(rd, PL1_ENABLE, 0);
1229 rapl_write_data_raw(rd, PL1_CLAMP, 0);
1230 if (find_nr_power_limit(rd) > 1) {
1231 rapl_write_data_raw(rd, PL2_ENABLE, 0);
1232 rapl_write_data_raw(rd, PL2_CLAMP, 0);
1234 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1238 powercap_unregister_zone(control_type, &rd->power_zone);
1240 /* do the package zone last */
1242 powercap_unregister_zone(control_type,
1243 &rd_package->power_zone);
1246 if (platform_rapl_domain) {
1247 powercap_unregister_zone(control_type,
1248 &platform_rapl_domain->power_zone);
1249 kfree(platform_rapl_domain);
1252 powercap_unregister_control_type(control_type);
1257 static int rapl_package_register_powercap(struct rapl_package *rp)
1259 struct rapl_domain *rd;
1261 char dev_name[17]; /* max domain name = 7 + 1 + 8 for int + 1 for null*/
1262 struct powercap_zone *power_zone = NULL;
1265 /* first we register package domain as the parent zone*/
1266 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1267 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1268 nr_pl = find_nr_power_limit(rd);
1269 pr_debug("register socket %d package domain %s\n",
1271 memset(dev_name, 0, sizeof(dev_name));
1272 snprintf(dev_name, sizeof(dev_name), "%s-%d",
1274 power_zone = powercap_register_zone(&rd->power_zone,
1280 if (IS_ERR(power_zone)) {
1281 pr_debug("failed to register package, %d\n",
1283 ret = PTR_ERR(power_zone);
1286 /* track parent zone in per package/socket data */
1287 rp->power_zone = power_zone;
1288 /* done, only one package domain per socket */
1293 pr_err("no package domain found, unknown topology!\n");
1297 /* now register domains as children of the socket/package*/
1298 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1299 if (rd->id == RAPL_DOMAIN_PACKAGE)
1301 /* number of power limits per domain varies */
1302 nr_pl = find_nr_power_limit(rd);
1303 power_zone = powercap_register_zone(&rd->power_zone,
1304 control_type, rd->name,
1306 &zone_ops[rd->id], nr_pl,
1309 if (IS_ERR(power_zone)) {
1310 pr_debug("failed to register power_zone, %d:%s:%s\n",
1311 rp->id, rd->name, dev_name);
1312 ret = PTR_ERR(power_zone);
1320 /* clean up previously initialized domains within the package if we
1321 * failed after the first domain setup.
1323 while (--rd >= rp->domains) {
1324 pr_debug("unregister package %d domain %s\n", rp->id, rd->name);
1325 powercap_unregister_zone(control_type, &rd->power_zone);
1331 static int rapl_register_psys(void)
1333 struct rapl_domain *rd;
1334 struct powercap_zone *power_zone;
1337 if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_ENERGY_STATUS, &val) || !val)
1340 if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_POWER_LIMIT, &val) || !val)
1343 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
1347 rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM];
1348 rd->id = RAPL_DOMAIN_PLATFORM;
1349 rd->msrs[0] = MSR_PLATFORM_POWER_LIMIT;
1350 rd->msrs[1] = MSR_PLATFORM_ENERGY_STATUS;
1351 rd->rpl[0].prim_id = PL1_ENABLE;
1352 rd->rpl[0].name = pl1_name;
1353 rd->rpl[1].prim_id = PL2_ENABLE;
1354 rd->rpl[1].name = pl2_name;
1355 rd->rp = find_package_by_id(0);
1357 power_zone = powercap_register_zone(&rd->power_zone, control_type,
1359 &zone_ops[RAPL_DOMAIN_PLATFORM],
1360 2, &constraint_ops);
1362 if (IS_ERR(power_zone)) {
1364 return PTR_ERR(power_zone);
1367 platform_rapl_domain = rd;
1372 static int rapl_register_powercap(void)
1374 struct rapl_domain *rd;
1375 struct rapl_package *rp;
1378 control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
1379 if (IS_ERR(control_type)) {
1380 pr_debug("failed to register powercap control_type.\n");
1381 return PTR_ERR(control_type);
1383 /* read the initial data */
1384 rapl_update_domain_data();
1385 list_for_each_entry(rp, &rapl_packages, plist)
1386 if (rapl_package_register_powercap(rp))
1387 goto err_cleanup_package;
1389 /* Don't bail out if PSys is not supported */
1390 rapl_register_psys();
1394 err_cleanup_package:
1395 /* clean up previously initialized packages */
1396 list_for_each_entry_continue_reverse(rp, &rapl_packages, plist) {
1397 for (rd = rp->domains; rd < rp->domains + rp->nr_domains;
1399 pr_debug("unregister zone/package %d, %s domain\n",
1401 powercap_unregister_zone(control_type, &rd->power_zone);
1408 static int rapl_check_domain(int cpu, int domain)
1414 case RAPL_DOMAIN_PACKAGE:
1415 msr = MSR_PKG_ENERGY_STATUS;
1417 case RAPL_DOMAIN_PP0:
1418 msr = MSR_PP0_ENERGY_STATUS;
1420 case RAPL_DOMAIN_PP1:
1421 msr = MSR_PP1_ENERGY_STATUS;
1423 case RAPL_DOMAIN_DRAM:
1424 msr = MSR_DRAM_ENERGY_STATUS;
1426 case RAPL_DOMAIN_PLATFORM:
1427 /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */
1430 pr_err("invalid domain id %d\n", domain);
1433 /* make sure domain counters are available and contains non-zero
1434 * values, otherwise skip it.
1436 if (rdmsrl_safe_on_cpu(cpu, msr, &val) || !val)
1444 * Check if power limits are available. Two cases when they are not available:
1445 * 1. Locked by BIOS, in this case we still provide read-only access so that
1446 * users can see what limit is set by the BIOS.
1447 * 2. Some CPUs make some domains monitoring only which means PLx MSRs may not
1448 * exist at all. In this case, we do not show the contraints in powercap.
1450 * Called after domains are detected and initialized.
1452 static void rapl_detect_powerlimit(struct rapl_domain *rd)
1457 /* check if the domain is locked by BIOS, ignore if MSR doesn't exist */
1458 if (!rapl_read_data_raw(rd, FW_LOCK, false, &val64)) {
1460 pr_info("RAPL package %d domain %s locked by BIOS\n",
1461 rd->rp->id, rd->name);
1462 rd->state |= DOMAIN_STATE_BIOS_LOCKED;
1465 /* check if power limit MSRs exists, otherwise domain is monitoring only */
1466 for (i = 0; i < NR_POWER_LIMITS; i++) {
1467 int prim = rd->rpl[i].prim_id;
1468 if (rapl_read_data_raw(rd, prim, false, &val64))
1469 rd->rpl[i].name = NULL;
1473 /* Detect active and valid domains for the given CPU, caller must
1474 * ensure the CPU belongs to the targeted package and CPU hotlug is disabled.
1476 static int rapl_detect_domains(struct rapl_package *rp, int cpu)
1480 struct rapl_domain *rd;
1482 for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
1483 /* use physical package id to read counters */
1484 if (!rapl_check_domain(cpu, i)) {
1485 rp->domain_map |= 1 << i;
1486 pr_info("Found RAPL domain %s\n", rapl_domain_names[i]);
1489 rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX);
1490 if (!rp->nr_domains) {
1491 pr_debug("no valid rapl domains found in package %d\n", rp->id);
1495 pr_debug("found %d domains on package %d\n", rp->nr_domains, rp->id);
1497 rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain),
1503 rapl_init_domains(rp);
1505 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
1506 rapl_detect_powerlimit(rd);
1514 static bool is_package_new(int package)
1516 struct rapl_package *rp;
1518 /* caller prevents cpu hotplug, there will be no new packages added
1519 * or deleted while traversing the package list, no need for locking.
1521 list_for_each_entry(rp, &rapl_packages, plist)
1522 if (package == rp->id)
1528 /* RAPL interface can be made of a two-level hierarchy: package level and domain
1529 * level. We first detect the number of packages then domains of each package.
1530 * We have to consider the possiblity of CPU online/offline due to hotplug and
1533 static int rapl_detect_topology(void)
1537 struct rapl_package *new_package, *rp;
1539 for_each_online_cpu(i) {
1540 phy_package_id = topology_physical_package_id(i);
1541 if (is_package_new(phy_package_id)) {
1542 new_package = kzalloc(sizeof(*rp), GFP_KERNEL);
1544 rapl_cleanup_data();
1547 /* add the new package to the list */
1548 new_package->id = phy_package_id;
1549 new_package->nr_cpus = 1;
1550 /* use the first active cpu of the package to access */
1551 new_package->lead_cpu = i;
1552 /* check if the package contains valid domains */
1553 if (rapl_detect_domains(new_package, i) ||
1554 rapl_defaults->check_unit(new_package, i)) {
1555 kfree(new_package->domains);
1557 /* free up the packages already initialized */
1558 rapl_cleanup_data();
1561 INIT_LIST_HEAD(&new_package->plist);
1562 list_add(&new_package->plist, &rapl_packages);
1564 rp = find_package_by_id(phy_package_id);
1573 /* called from CPU hotplug notifier, hotplug lock held */
1574 static void rapl_remove_package(struct rapl_package *rp)
1576 struct rapl_domain *rd, *rd_package = NULL;
1578 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1579 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1583 pr_debug("remove package %d, %s domain\n", rp->id, rd->name);
1584 powercap_unregister_zone(control_type, &rd->power_zone);
1586 /* do parent zone last */
1587 powercap_unregister_zone(control_type, &rd_package->power_zone);
1588 list_del(&rp->plist);
1592 /* called from CPU hotplug notifier, hotplug lock held */
1593 static int rapl_add_package(int cpu)
1597 struct rapl_package *rp;
1599 phy_package_id = topology_physical_package_id(cpu);
1600 rp = kzalloc(sizeof(struct rapl_package), GFP_KERNEL);
1604 /* add the new package to the list */
1605 rp->id = phy_package_id;
1609 /* check if the package contains valid domains */
1610 if (rapl_detect_domains(rp, cpu) ||
1611 rapl_defaults->check_unit(rp, cpu)) {
1613 goto err_free_package;
1615 if (!rapl_package_register_powercap(rp)) {
1616 INIT_LIST_HEAD(&rp->plist);
1617 list_add(&rp->plist, &rapl_packages);
1628 /* Handles CPU hotplug on multi-socket systems.
1629 * If a CPU goes online as the first CPU of the physical package
1630 * we add the RAPL package to the system. Similarly, when the last
1631 * CPU of the package is removed, we remove the RAPL package and its
1632 * associated domains. Cooling devices are handled accordingly at
1635 static int rapl_cpu_callback(struct notifier_block *nfb,
1636 unsigned long action, void *hcpu)
1638 unsigned long cpu = (unsigned long)hcpu;
1640 struct rapl_package *rp;
1643 phy_package_id = topology_physical_package_id(cpu);
1646 case CPU_ONLINE_FROZEN:
1647 case CPU_DOWN_FAILED:
1648 case CPU_DOWN_FAILED_FROZEN:
1649 rp = find_package_by_id(phy_package_id);
1653 rapl_add_package(cpu);
1655 case CPU_DOWN_PREPARE:
1656 case CPU_DOWN_PREPARE_FROZEN:
1657 rp = find_package_by_id(phy_package_id);
1660 if (--rp->nr_cpus == 0)
1661 rapl_remove_package(rp);
1662 else if (cpu == rp->lead_cpu) {
1663 /* choose another active cpu in the package */
1664 lead_cpu = cpumask_any_but(topology_core_cpumask(cpu), cpu);
1665 if (lead_cpu < nr_cpu_ids)
1666 rp->lead_cpu = lead_cpu;
1667 else /* should never go here */
1668 pr_err("no active cpu available for package %d\n",
1676 static struct notifier_block rapl_cpu_notifier = {
1677 .notifier_call = rapl_cpu_callback,
1680 static int __init rapl_init(void)
1683 const struct x86_cpu_id *id;
1685 id = x86_match_cpu(rapl_ids);
1687 pr_err("driver does not support CPU family %d model %d\n",
1688 boot_cpu_data.x86, boot_cpu_data.x86_model);
1693 rapl_defaults = (struct rapl_defaults *)id->driver_data;
1695 cpu_notifier_register_begin();
1697 /* prevent CPU hotplug during detection */
1699 ret = rapl_detect_topology();
1703 if (rapl_register_powercap()) {
1704 rapl_cleanup_data();
1708 __register_hotcpu_notifier(&rapl_cpu_notifier);
1711 cpu_notifier_register_done();
1716 static void __exit rapl_exit(void)
1718 cpu_notifier_register_begin();
1720 __unregister_hotcpu_notifier(&rapl_cpu_notifier);
1721 rapl_unregister_powercap();
1722 rapl_cleanup_data();
1724 cpu_notifier_register_done();
1727 module_init(rapl_init);
1728 module_exit(rapl_exit);
1730 MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit)");
1731 MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
1732 MODULE_LICENSE("GPL v2");