1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. */
5 #include <linux/init.h>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/mutex.h>
9 #include <linux/pm_domain.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_opp.h>
13 #include <linux/soc/qcom/smd-rpm.h>
15 #include <dt-bindings/power/qcom-rpmpd.h>
17 #define domain_to_rpmpd(domain) container_of(domain, struct rpmpd, pd)
20 * RPMPD_X is X encoded as a little-endian, lower-case, ASCII string */
21 #define RPMPD_SMPA 0x61706d73
22 #define RPMPD_LDOA 0x616f646c
23 #define RPMPD_SMPB 0x62706d73
24 #define RPMPD_LDOB 0x626f646c
25 #define RPMPD_RWCX 0x78637772
26 #define RPMPD_RWMX 0x786d7772
27 #define RPMPD_RWLC 0x636c7772
28 #define RPMPD_RWLM 0x6d6c7772
29 #define RPMPD_RWSC 0x63737772
30 #define RPMPD_RWSM 0x6d737772
31 #define RPMPD_RWGX 0x78677772
34 #define KEY_CORNER 0x6e726f63 /* corn */
35 #define KEY_ENABLE 0x6e657773 /* swen */
36 #define KEY_FLOOR_CORNER 0x636676 /* vfc */
37 #define KEY_FLOOR_LEVEL 0x6c6676 /* vfl */
38 #define KEY_LEVEL 0x6c766c76 /* vlvl */
40 #define MAX_CORNER_RPMPD_STATE 6
49 struct generic_pm_domain pd;
50 struct generic_pm_domain *parent;
52 const bool active_only;
57 struct qcom_smd_rpm *rpm;
58 unsigned int max_state;
64 struct rpmpd **rpmpds;
66 unsigned int max_state;
69 static DEFINE_MUTEX(rpmpd_lock);
72 static struct rpmpd cx_rwcx0_lvl_ao;
73 static struct rpmpd cx_rwcx0_lvl = {
74 .pd = { .name = "cx", },
75 .peer = &cx_rwcx0_lvl_ao,
76 .res_type = RPMPD_RWCX,
81 static struct rpmpd cx_rwcx0_lvl_ao = {
82 .pd = { .name = "cx_ao", },
83 .peer = &cx_rwcx0_lvl,
85 .res_type = RPMPD_RWCX,
90 static struct rpmpd cx_s1a_corner_ao;
91 static struct rpmpd cx_s1a_corner = {
92 .pd = { .name = "cx", },
93 .peer = &cx_s1a_corner_ao,
94 .res_type = RPMPD_SMPA,
99 static struct rpmpd cx_s1a_corner_ao = {
100 .pd = { .name = "cx_ao", },
101 .peer = &cx_s1a_corner,
103 .res_type = RPMPD_SMPA,
108 static struct rpmpd cx_s1a_lvl_ao;
109 static struct rpmpd cx_s1a_lvl = {
110 .pd = { .name = "cx", },
111 .peer = &cx_s1a_lvl_ao,
112 .res_type = RPMPD_SMPA,
117 static struct rpmpd cx_s1a_lvl_ao = {
118 .pd = { .name = "cx_ao", },
121 .res_type = RPMPD_SMPA,
126 static struct rpmpd cx_s2a_corner_ao;
127 static struct rpmpd cx_s2a_corner = {
128 .pd = { .name = "cx", },
129 .peer = &cx_s2a_corner_ao,
130 .res_type = RPMPD_SMPA,
135 static struct rpmpd cx_s2a_corner_ao = {
136 .pd = { .name = "cx_ao", },
137 .peer = &cx_s2a_corner,
139 .res_type = RPMPD_SMPA,
144 static struct rpmpd cx_s2a_lvl_ao;
145 static struct rpmpd cx_s2a_lvl = {
146 .pd = { .name = "cx", },
147 .peer = &cx_s2a_lvl_ao,
148 .res_type = RPMPD_SMPA,
153 static struct rpmpd cx_s2a_lvl_ao = {
154 .pd = { .name = "cx_ao", },
157 .res_type = RPMPD_SMPA,
162 static struct rpmpd cx_s3a_lvl_ao;
163 static struct rpmpd cx_s3a_lvl = {
164 .pd = { .name = "cx", },
165 .peer = &cx_s3a_lvl_ao,
166 .res_type = RPMPD_SMPA,
171 static struct rpmpd cx_s3a_lvl_ao = {
172 .pd = { .name = "cx_ao", },
175 .res_type = RPMPD_SMPA,
180 static struct rpmpd cx_rwcx0_vfl = {
181 .pd = { .name = "cx_vfl", },
182 .res_type = RPMPD_RWCX,
184 .key = KEY_FLOOR_LEVEL,
187 static struct rpmpd cx_rwsc2_vfl = {
188 .pd = { .name = "cx_vfl", },
189 .res_type = RPMPD_RWSC,
191 .key = KEY_FLOOR_LEVEL,
194 static struct rpmpd cx_s1a_vfc = {
195 .pd = { .name = "cx_vfc", },
196 .res_type = RPMPD_SMPA,
198 .key = KEY_FLOOR_CORNER,
201 static struct rpmpd cx_s1a_vfl = {
202 .pd = { .name = "cx_vfl", },
203 .res_type = RPMPD_SMPA,
205 .key = KEY_FLOOR_LEVEL,
208 static struct rpmpd cx_s2a_vfc = {
209 .pd = { .name = "cx_vfc", },
210 .res_type = RPMPD_SMPA,
212 .key = KEY_FLOOR_CORNER,
215 static struct rpmpd cx_s2a_vfl = {
216 .pd = { .name = "cx_vfl", },
217 .res_type = RPMPD_SMPA,
219 .key = KEY_FLOOR_LEVEL,
222 static struct rpmpd cx_s3a_vfl = {
223 .pd = { .name = "cx_vfl", },
224 .res_type = RPMPD_SMPA,
226 .key = KEY_FLOOR_LEVEL,
230 static struct rpmpd gfx_s2b_corner = {
231 .pd = { .name = "gfx", },
232 .res_type = RPMPD_SMPB,
237 static struct rpmpd gfx_s2b_vfc = {
238 .pd = { .name = "gfx_vfc", },
239 .res_type = RPMPD_SMPB,
241 .key = KEY_FLOOR_CORNER,
244 static struct rpmpd mx_rwmx0_lvl;
245 static struct rpmpd gx_rwgx0_lvl_ao;
246 static struct rpmpd gx_rwgx0_lvl = {
247 .pd = { .name = "gx", },
248 .peer = &gx_rwgx0_lvl_ao,
249 .res_type = RPMPD_RWGX,
250 .parent = &mx_rwmx0_lvl.pd,
255 static struct rpmpd mx_rwmx0_lvl_ao;
256 static struct rpmpd gx_rwgx0_lvl_ao = {
257 .pd = { .name = "gx_ao", },
258 .peer = &gx_rwgx0_lvl,
259 .parent = &mx_rwmx0_lvl_ao.pd,
261 .res_type = RPMPD_RWGX,
267 static struct rpmpd mx_l2a_lvl_ao;
268 static struct rpmpd mx_l2a_lvl = {
269 .pd = { .name = "mx", },
270 .peer = &mx_l2a_lvl_ao,
271 .res_type = RPMPD_LDOA,
276 static struct rpmpd mx_l2a_lvl_ao = {
277 .pd = { .name = "mx_ao", },
280 .res_type = RPMPD_LDOA,
285 static struct rpmpd mx_l3a_corner_ao;
286 static struct rpmpd mx_l3a_corner = {
287 .pd = { .name = "mx", },
288 .peer = &mx_l3a_corner_ao,
289 .res_type = RPMPD_LDOA,
294 static struct rpmpd mx_l3a_corner_ao = {
295 .pd = { .name = "mx_ao", },
296 .peer = &mx_l3a_corner,
298 .res_type = RPMPD_LDOA,
303 static struct rpmpd mx_l3a_lvl_ao;
304 static struct rpmpd mx_l3a_lvl = {
305 .pd = { .name = "mx", },
306 .peer = &mx_l3a_lvl_ao,
307 .res_type = RPMPD_LDOA,
312 static struct rpmpd mx_l3a_lvl_ao = {
313 .pd = { .name = "mx_ao", },
316 .res_type = RPMPD_LDOA,
321 static struct rpmpd mx_l12a_lvl_ao;
322 static struct rpmpd mx_l12a_lvl = {
323 .pd = { .name = "mx", },
324 .peer = &mx_l12a_lvl_ao,
325 .res_type = RPMPD_LDOA,
330 static struct rpmpd mx_l12a_lvl_ao = {
331 .pd = { .name = "mx_ao", },
332 .peer = &mx_l12a_lvl,
334 .res_type = RPMPD_LDOA,
339 static struct rpmpd mx_s2a_corner_ao;
340 static struct rpmpd mx_s2a_corner = {
341 .pd = { .name = "mx", },
342 .peer = &mx_s2a_corner_ao,
343 .res_type = RPMPD_SMPA,
348 static struct rpmpd mx_s2a_corner_ao = {
349 .pd = { .name = "mx_ao", },
350 .peer = &mx_s2a_corner,
352 .res_type = RPMPD_SMPA,
357 static struct rpmpd mx_rwmx0_lvl_ao;
358 static struct rpmpd mx_rwmx0_lvl = {
359 .pd = { .name = "mx", },
360 .peer = &mx_rwmx0_lvl_ao,
361 .res_type = RPMPD_RWMX,
366 static struct rpmpd mx_rwmx0_lvl_ao = {
367 .pd = { .name = "mx_ao", },
368 .peer = &mx_rwmx0_lvl,
370 .res_type = RPMPD_RWMX,
375 static struct rpmpd mx_s6a_lvl_ao;
376 static struct rpmpd mx_s6a_lvl = {
377 .pd = { .name = "mx", },
378 .peer = &mx_s6a_lvl_ao,
379 .res_type = RPMPD_SMPA,
384 static struct rpmpd mx_s6a_lvl_ao = {
385 .pd = { .name = "mx_ao", },
388 .res_type = RPMPD_SMPA,
393 static struct rpmpd mx_s7a_lvl_ao;
394 static struct rpmpd mx_s7a_lvl = {
395 .pd = { .name = "mx", },
396 .peer = &mx_s7a_lvl_ao,
397 .res_type = RPMPD_SMPA,
402 static struct rpmpd mx_s7a_lvl_ao = {
403 .pd = { .name = "mx_ao", },
406 .res_type = RPMPD_SMPA,
411 static struct rpmpd mx_l12a_vfl = {
412 .pd = { .name = "mx_vfl", },
413 .res_type = RPMPD_LDOA,
415 .key = KEY_FLOOR_LEVEL,
418 static struct rpmpd mx_rwmx0_vfl = {
419 .pd = { .name = "mx_vfl", },
420 .res_type = RPMPD_RWMX,
422 .key = KEY_FLOOR_LEVEL,
425 static struct rpmpd mx_rwsm6_vfl = {
426 .pd = { .name = "mx_vfl", },
427 .res_type = RPMPD_RWSM,
429 .key = KEY_FLOOR_LEVEL,
433 static struct rpmpd md_s1a_corner_ao;
434 static struct rpmpd md_s1a_corner = {
435 .pd = { .name = "md", },
436 .peer = &md_s1a_corner_ao,
437 .res_type = RPMPD_SMPA,
442 static struct rpmpd md_s1a_corner_ao = {
443 .pd = { .name = "md_ao", },
444 .peer = &md_s1a_corner,
446 .res_type = RPMPD_SMPA,
451 static struct rpmpd md_s1a_lvl_ao;
452 static struct rpmpd md_s1a_lvl = {
453 .pd = { .name = "md", },
454 .peer = &md_s1a_lvl_ao,
455 .res_type = RPMPD_SMPA,
460 static struct rpmpd md_s1a_lvl_ao = {
461 .pd = { .name = "md_ao", },
464 .res_type = RPMPD_SMPA,
469 static struct rpmpd md_s1a_vfc = {
470 .pd = { .name = "md_vfc", },
471 .res_type = RPMPD_SMPA,
473 .key = KEY_FLOOR_CORNER,
477 static struct rpmpd lpi_cx_rwlc0_lvl = {
478 .pd = { .name = "lpi_cx", },
479 .res_type = RPMPD_RWLC,
484 static struct rpmpd lpi_cx_rwlc0_vfl = {
485 .pd = { .name = "lpi_cx_vfl", },
486 .res_type = RPMPD_RWLC,
488 .key = KEY_FLOOR_LEVEL,
492 static struct rpmpd lpi_mx_rwlm0_lvl = {
493 .pd = { .name = "lpi_mx", },
494 .res_type = RPMPD_RWLM,
499 static struct rpmpd lpi_mx_rwlm0_vfl = {
500 .pd = { .name = "lpi_mx_vfl", },
501 .res_type = RPMPD_RWLM,
503 .key = KEY_FLOOR_LEVEL,
507 static struct rpmpd ssc_cx_l26a_corner = {
508 .pd = { .name = "ssc_cx", },
509 .res_type = RPMPD_LDOA,
514 static struct rpmpd ssc_cx_rwlc0_lvl = {
515 .pd = { .name = "ssc_cx", },
516 .res_type = RPMPD_RWLC,
521 static struct rpmpd ssc_cx_rwsc0_lvl = {
522 .pd = { .name = "ssc_cx", },
523 .res_type = RPMPD_RWSC,
528 static struct rpmpd ssc_cx_l26a_vfc = {
529 .pd = { .name = "ssc_cx_vfc", },
530 .res_type = RPMPD_LDOA,
532 .key = KEY_FLOOR_CORNER,
535 static struct rpmpd ssc_cx_rwlc0_vfl = {
536 .pd = { .name = "ssc_cx_vfl", },
537 .res_type = RPMPD_RWLC,
539 .key = KEY_FLOOR_LEVEL,
542 static struct rpmpd ssc_cx_rwsc0_vfl = {
543 .pd = { .name = "ssc_cx_vfl", },
544 .res_type = RPMPD_RWSC,
546 .key = KEY_FLOOR_LEVEL,
550 static struct rpmpd ssc_mx_rwlm0_lvl = {
551 .pd = { .name = "ssc_mx", },
552 .res_type = RPMPD_RWLM,
557 static struct rpmpd ssc_mx_rwsm0_lvl = {
558 .pd = { .name = "ssc_mx", },
559 .res_type = RPMPD_RWSM,
564 static struct rpmpd ssc_mx_rwlm0_vfl = {
565 .pd = { .name = "ssc_mx_vfl", },
566 .res_type = RPMPD_RWLM,
568 .key = KEY_FLOOR_LEVEL,
571 static struct rpmpd ssc_mx_rwsm0_vfl = {
572 .pd = { .name = "ssc_mx_vfl", },
573 .res_type = RPMPD_RWSM,
575 .key = KEY_FLOOR_LEVEL,
578 static struct rpmpd *mdm9607_rpmpds[] = {
579 [MDM9607_VDDCX] = &cx_s3a_lvl,
580 [MDM9607_VDDCX_AO] = &cx_s3a_lvl_ao,
581 [MDM9607_VDDCX_VFL] = &cx_s3a_vfl,
582 [MDM9607_VDDMX] = &mx_l12a_lvl,
583 [MDM9607_VDDMX_AO] = &mx_l12a_lvl_ao,
584 [MDM9607_VDDMX_VFL] = &mx_l12a_vfl,
587 static const struct rpmpd_desc mdm9607_desc = {
588 .rpmpds = mdm9607_rpmpds,
589 .num_pds = ARRAY_SIZE(mdm9607_rpmpds),
590 .max_state = RPM_SMD_LEVEL_TURBO,
593 static struct rpmpd *msm8226_rpmpds[] = {
594 [MSM8226_VDDCX] = &cx_s1a_corner,
595 [MSM8226_VDDCX_AO] = &cx_s1a_corner_ao,
596 [MSM8226_VDDCX_VFC] = &cx_s1a_vfc,
599 static const struct rpmpd_desc msm8226_desc = {
600 .rpmpds = msm8226_rpmpds,
601 .num_pds = ARRAY_SIZE(msm8226_rpmpds),
602 .max_state = MAX_CORNER_RPMPD_STATE,
605 static struct rpmpd *msm8939_rpmpds[] = {
606 [MSM8939_VDDMDCX] = &md_s1a_corner,
607 [MSM8939_VDDMDCX_AO] = &md_s1a_corner_ao,
608 [MSM8939_VDDMDCX_VFC] = &md_s1a_vfc,
609 [MSM8939_VDDCX] = &cx_s2a_corner,
610 [MSM8939_VDDCX_AO] = &cx_s2a_corner_ao,
611 [MSM8939_VDDCX_VFC] = &cx_s2a_vfc,
612 [MSM8939_VDDMX] = &mx_l3a_corner,
613 [MSM8939_VDDMX_AO] = &mx_l3a_corner_ao,
616 static const struct rpmpd_desc msm8939_desc = {
617 .rpmpds = msm8939_rpmpds,
618 .num_pds = ARRAY_SIZE(msm8939_rpmpds),
619 .max_state = MAX_CORNER_RPMPD_STATE,
622 static struct rpmpd *msm8916_rpmpds[] = {
623 [MSM8916_VDDCX] = &cx_s1a_corner,
624 [MSM8916_VDDCX_AO] = &cx_s1a_corner_ao,
625 [MSM8916_VDDCX_VFC] = &cx_s1a_vfc,
626 [MSM8916_VDDMX] = &mx_l3a_corner,
627 [MSM8916_VDDMX_AO] = &mx_l3a_corner_ao,
630 static const struct rpmpd_desc msm8916_desc = {
631 .rpmpds = msm8916_rpmpds,
632 .num_pds = ARRAY_SIZE(msm8916_rpmpds),
633 .max_state = MAX_CORNER_RPMPD_STATE,
636 static struct rpmpd *msm8917_rpmpds[] = {
637 [MSM8917_VDDCX] = &cx_s2a_lvl,
638 [MSM8917_VDDCX_AO] = &cx_s2a_lvl_ao,
639 [MSM8917_VDDCX_VFL] = &cx_s2a_vfl,
640 [MSM8917_VDDMX] = &mx_l3a_lvl,
641 [MSM8917_VDDMX_AO] = &mx_l3a_lvl_ao,
644 static const struct rpmpd_desc msm8917_desc = {
645 .rpmpds = msm8917_rpmpds,
646 .num_pds = ARRAY_SIZE(msm8917_rpmpds),
647 .max_state = RPM_SMD_LEVEL_TURBO,
650 static struct rpmpd *msm8953_rpmpds[] = {
651 [MSM8953_VDDMD] = &md_s1a_lvl,
652 [MSM8953_VDDMD_AO] = &md_s1a_lvl_ao,
653 [MSM8953_VDDCX] = &cx_s2a_lvl,
654 [MSM8953_VDDCX_AO] = &cx_s2a_lvl_ao,
655 [MSM8953_VDDCX_VFL] = &cx_s2a_vfl,
656 [MSM8953_VDDMX] = &mx_s7a_lvl,
657 [MSM8953_VDDMX_AO] = &mx_s7a_lvl_ao,
660 static const struct rpmpd_desc msm8953_desc = {
661 .rpmpds = msm8953_rpmpds,
662 .num_pds = ARRAY_SIZE(msm8953_rpmpds),
663 .max_state = RPM_SMD_LEVEL_TURBO,
666 static struct rpmpd *msm8976_rpmpds[] = {
667 [MSM8976_VDDCX] = &cx_s2a_lvl,
668 [MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao,
669 [MSM8976_VDDCX_VFL] = &cx_rwsc2_vfl,
670 [MSM8976_VDDMX] = &mx_s6a_lvl,
671 [MSM8976_VDDMX_AO] = &mx_s6a_lvl_ao,
672 [MSM8976_VDDMX_VFL] = &mx_rwsm6_vfl,
675 static const struct rpmpd_desc msm8976_desc = {
676 .rpmpds = msm8976_rpmpds,
677 .num_pds = ARRAY_SIZE(msm8976_rpmpds),
678 .max_state = RPM_SMD_LEVEL_TURBO_HIGH,
681 static struct rpmpd *msm8994_rpmpds[] = {
682 [MSM8994_VDDCX] = &cx_s1a_corner,
683 [MSM8994_VDDCX_AO] = &cx_s1a_corner_ao,
684 [MSM8994_VDDCX_VFC] = &cx_s1a_vfc,
685 [MSM8994_VDDMX] = &mx_s2a_corner,
686 [MSM8994_VDDMX_AO] = &mx_s2a_corner_ao,
688 /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */
689 [MSM8994_VDDGFX] = &gfx_s2b_corner,
690 [MSM8994_VDDGFX_VFC] = &gfx_s2b_vfc,
693 static const struct rpmpd_desc msm8994_desc = {
694 .rpmpds = msm8994_rpmpds,
695 .num_pds = ARRAY_SIZE(msm8994_rpmpds),
696 .max_state = MAX_CORNER_RPMPD_STATE,
699 static struct rpmpd *msm8996_rpmpds[] = {
700 [MSM8996_VDDCX] = &cx_s1a_corner,
701 [MSM8996_VDDCX_AO] = &cx_s1a_corner_ao,
702 [MSM8996_VDDCX_VFC] = &cx_s1a_vfc,
703 [MSM8996_VDDMX] = &mx_s2a_corner,
704 [MSM8996_VDDMX_AO] = &mx_s2a_corner_ao,
705 [MSM8996_VDDSSCX] = &ssc_cx_l26a_corner,
706 [MSM8996_VDDSSCX_VFC] = &ssc_cx_l26a_vfc,
709 static const struct rpmpd_desc msm8996_desc = {
710 .rpmpds = msm8996_rpmpds,
711 .num_pds = ARRAY_SIZE(msm8996_rpmpds),
712 .max_state = MAX_CORNER_RPMPD_STATE,
715 static struct rpmpd *msm8998_rpmpds[] = {
716 [MSM8998_VDDCX] = &cx_rwcx0_lvl,
717 [MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao,
718 [MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl,
719 [MSM8998_VDDMX] = &mx_rwmx0_lvl,
720 [MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao,
721 [MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl,
722 [MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl,
723 [MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl,
724 [MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl,
725 [MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl,
728 static const struct rpmpd_desc msm8998_desc = {
729 .rpmpds = msm8998_rpmpds,
730 .num_pds = ARRAY_SIZE(msm8998_rpmpds),
731 .max_state = RPM_SMD_LEVEL_BINNING,
734 static struct rpmpd *qcs404_rpmpds[] = {
735 [QCS404_VDDMX] = &mx_rwmx0_lvl,
736 [QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao,
737 [QCS404_VDDMX_VFL] = &mx_rwmx0_vfl,
738 [QCS404_LPICX] = &lpi_cx_rwlc0_lvl,
739 [QCS404_LPICX_VFL] = &lpi_cx_rwlc0_vfl,
740 [QCS404_LPIMX] = &lpi_mx_rwlm0_lvl,
741 [QCS404_LPIMX_VFL] = &lpi_mx_rwlm0_vfl,
744 static const struct rpmpd_desc qcs404_desc = {
745 .rpmpds = qcs404_rpmpds,
746 .num_pds = ARRAY_SIZE(qcs404_rpmpds),
747 .max_state = RPM_SMD_LEVEL_BINNING,
750 static struct rpmpd *qm215_rpmpds[] = {
751 [QM215_VDDCX] = &cx_s1a_lvl,
752 [QM215_VDDCX_AO] = &cx_s1a_lvl_ao,
753 [QM215_VDDCX_VFL] = &cx_s1a_vfl,
754 [QM215_VDDMX] = &mx_l2a_lvl,
755 [QM215_VDDMX_AO] = &mx_l2a_lvl_ao,
758 static const struct rpmpd_desc qm215_desc = {
759 .rpmpds = qm215_rpmpds,
760 .num_pds = ARRAY_SIZE(qm215_rpmpds),
761 .max_state = RPM_SMD_LEVEL_TURBO,
764 static struct rpmpd *sdm660_rpmpds[] = {
765 [SDM660_VDDCX] = &cx_rwcx0_lvl,
766 [SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao,
767 [SDM660_VDDCX_VFL] = &cx_rwcx0_vfl,
768 [SDM660_VDDMX] = &mx_rwmx0_lvl,
769 [SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao,
770 [SDM660_VDDMX_VFL] = &mx_rwmx0_vfl,
771 [SDM660_SSCCX] = &ssc_cx_rwlc0_lvl,
772 [SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl,
773 [SDM660_SSCMX] = &ssc_mx_rwlm0_lvl,
774 [SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl,
777 static const struct rpmpd_desc sdm660_desc = {
778 .rpmpds = sdm660_rpmpds,
779 .num_pds = ARRAY_SIZE(sdm660_rpmpds),
780 .max_state = RPM_SMD_LEVEL_TURBO,
783 static struct rpmpd *sm6115_rpmpds[] = {
784 [SM6115_VDDCX] = &cx_rwcx0_lvl,
785 [SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao,
786 [SM6115_VDDCX_VFL] = &cx_rwcx0_vfl,
787 [SM6115_VDDMX] = &mx_rwmx0_lvl,
788 [SM6115_VDDMX_AO] = &mx_rwmx0_lvl_ao,
789 [SM6115_VDDMX_VFL] = &mx_rwmx0_vfl,
790 [SM6115_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
791 [SM6115_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
794 static const struct rpmpd_desc sm6115_desc = {
795 .rpmpds = sm6115_rpmpds,
796 .num_pds = ARRAY_SIZE(sm6115_rpmpds),
797 .max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
800 static struct rpmpd *sm6125_rpmpds[] = {
801 [SM6125_VDDCX] = &cx_rwcx0_lvl,
802 [SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao,
803 [SM6125_VDDCX_VFL] = &cx_rwcx0_vfl,
804 [SM6125_VDDMX] = &mx_rwmx0_lvl,
805 [SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao,
806 [SM6125_VDDMX_VFL] = &mx_rwmx0_vfl,
809 static const struct rpmpd_desc sm6125_desc = {
810 .rpmpds = sm6125_rpmpds,
811 .num_pds = ARRAY_SIZE(sm6125_rpmpds),
812 .max_state = RPM_SMD_LEVEL_BINNING,
815 static struct rpmpd *sm6375_rpmpds[] = {
816 [SM6375_VDDCX] = &cx_rwcx0_lvl,
817 [SM6375_VDDCX_AO] = &cx_rwcx0_lvl_ao,
818 [SM6375_VDDCX_VFL] = &cx_rwcx0_vfl,
819 [SM6375_VDDMX] = &mx_rwmx0_lvl,
820 [SM6375_VDDMX_AO] = &mx_rwmx0_lvl_ao,
821 [SM6375_VDDMX_VFL] = &mx_rwmx0_vfl,
822 [SM6375_VDDGX] = &gx_rwgx0_lvl,
823 [SM6375_VDDGX_AO] = &gx_rwgx0_lvl_ao,
824 [SM6375_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
825 [SM6375_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
828 static const struct rpmpd_desc sm6375_desc = {
829 .rpmpds = sm6375_rpmpds,
830 .num_pds = ARRAY_SIZE(sm6375_rpmpds),
831 .max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
834 static struct rpmpd *qcm2290_rpmpds[] = {
835 [QCM2290_VDDCX] = &cx_rwcx0_lvl,
836 [QCM2290_VDDCX_AO] = &cx_rwcx0_lvl_ao,
837 [QCM2290_VDDCX_VFL] = &cx_rwcx0_vfl,
838 [QCM2290_VDDMX] = &mx_rwmx0_lvl,
839 [QCM2290_VDDMX_AO] = &mx_rwmx0_lvl_ao,
840 [QCM2290_VDDMX_VFL] = &mx_rwmx0_vfl,
841 [QCM2290_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
842 [QCM2290_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
845 static const struct rpmpd_desc qcm2290_desc = {
846 .rpmpds = qcm2290_rpmpds,
847 .num_pds = ARRAY_SIZE(qcm2290_rpmpds),
848 .max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
851 static const struct of_device_id rpmpd_match_table[] = {
852 { .compatible = "qcom,mdm9607-rpmpd", .data = &mdm9607_desc },
853 { .compatible = "qcom,msm8226-rpmpd", .data = &msm8226_desc },
854 { .compatible = "qcom,msm8909-rpmpd", .data = &msm8916_desc },
855 { .compatible = "qcom,msm8916-rpmpd", .data = &msm8916_desc },
856 { .compatible = "qcom,msm8917-rpmpd", .data = &msm8917_desc },
857 { .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
858 { .compatible = "qcom,msm8953-rpmpd", .data = &msm8953_desc },
859 { .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
860 { .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
861 { .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
862 { .compatible = "qcom,msm8998-rpmpd", .data = &msm8998_desc },
863 { .compatible = "qcom,qcm2290-rpmpd", .data = &qcm2290_desc },
864 { .compatible = "qcom,qcs404-rpmpd", .data = &qcs404_desc },
865 { .compatible = "qcom,qm215-rpmpd", .data = &qm215_desc },
866 { .compatible = "qcom,sdm660-rpmpd", .data = &sdm660_desc },
867 { .compatible = "qcom,sm6115-rpmpd", .data = &sm6115_desc },
868 { .compatible = "qcom,sm6125-rpmpd", .data = &sm6125_desc },
869 { .compatible = "qcom,sm6375-rpmpd", .data = &sm6375_desc },
872 MODULE_DEVICE_TABLE(of, rpmpd_match_table);
874 static int rpmpd_send_enable(struct rpmpd *pd, bool enable)
876 struct rpmpd_req req = {
878 .nbytes = cpu_to_le32(sizeof(u32)),
879 .value = cpu_to_le32(enable),
882 return qcom_rpm_smd_write(pd->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
883 pd->res_type, pd->res_id, &req, sizeof(req));
886 static int rpmpd_send_corner(struct rpmpd *pd, int state, unsigned int corner)
888 struct rpmpd_req req = {
890 .nbytes = cpu_to_le32(sizeof(u32)),
891 .value = cpu_to_le32(corner),
894 return qcom_rpm_smd_write(pd->rpm, state, pd->res_type, pd->res_id,
898 static void to_active_sleep(struct rpmpd *pd, unsigned int corner,
899 unsigned int *active, unsigned int *sleep)
909 static int rpmpd_aggregate_corner(struct rpmpd *pd)
912 struct rpmpd *peer = pd->peer;
913 unsigned int active_corner, sleep_corner;
914 unsigned int this_active_corner = 0, this_sleep_corner = 0;
915 unsigned int peer_active_corner = 0, peer_sleep_corner = 0;
917 /* Clamp to the highest corner/level if sync_state isn't done yet */
918 if (!pd->state_synced)
919 this_active_corner = this_sleep_corner = pd->max_state - 1;
921 to_active_sleep(pd, pd->corner, &this_active_corner, &this_sleep_corner);
923 if (peer && peer->enabled)
924 to_active_sleep(peer, peer->corner, &peer_active_corner,
927 active_corner = max(this_active_corner, peer_active_corner);
929 ret = rpmpd_send_corner(pd, QCOM_SMD_RPM_ACTIVE_STATE, active_corner);
933 sleep_corner = max(this_sleep_corner, peer_sleep_corner);
935 return rpmpd_send_corner(pd, QCOM_SMD_RPM_SLEEP_STATE, sleep_corner);
938 static int rpmpd_power_on(struct generic_pm_domain *domain)
941 struct rpmpd *pd = domain_to_rpmpd(domain);
943 mutex_lock(&rpmpd_lock);
945 ret = rpmpd_send_enable(pd, true);
952 ret = rpmpd_aggregate_corner(pd);
955 mutex_unlock(&rpmpd_lock);
960 static int rpmpd_power_off(struct generic_pm_domain *domain)
963 struct rpmpd *pd = domain_to_rpmpd(domain);
965 mutex_lock(&rpmpd_lock);
967 ret = rpmpd_send_enable(pd, false);
971 mutex_unlock(&rpmpd_lock);
976 static int rpmpd_set_performance(struct generic_pm_domain *domain,
980 struct rpmpd *pd = domain_to_rpmpd(domain);
982 if (state > pd->max_state)
983 state = pd->max_state;
985 mutex_lock(&rpmpd_lock);
989 /* Always send updates for vfc and vfl */
990 if (!pd->enabled && pd->key != cpu_to_le32(KEY_FLOOR_CORNER) &&
991 pd->key != cpu_to_le32(KEY_FLOOR_LEVEL))
994 ret = rpmpd_aggregate_corner(pd);
997 mutex_unlock(&rpmpd_lock);
1002 static int rpmpd_probe(struct platform_device *pdev)
1006 struct genpd_onecell_data *data;
1007 struct qcom_smd_rpm *rpm;
1008 struct rpmpd **rpmpds;
1009 const struct rpmpd_desc *desc;
1011 rpm = dev_get_drvdata(pdev->dev.parent);
1013 dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n");
1017 desc = of_device_get_match_data(&pdev->dev);
1021 rpmpds = desc->rpmpds;
1022 num = desc->num_pds;
1024 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
1028 data->domains = devm_kcalloc(&pdev->dev, num, sizeof(*data->domains),
1033 data->num_domains = num;
1035 for (i = 0; i < num; i++) {
1037 dev_warn(&pdev->dev, "rpmpds[] with empty entry at index=%d\n",
1042 rpmpds[i]->rpm = rpm;
1043 rpmpds[i]->max_state = desc->max_state;
1044 rpmpds[i]->pd.power_off = rpmpd_power_off;
1045 rpmpds[i]->pd.power_on = rpmpd_power_on;
1046 rpmpds[i]->pd.set_performance_state = rpmpd_set_performance;
1047 rpmpds[i]->pd.flags = GENPD_FLAG_ACTIVE_WAKEUP;
1048 pm_genpd_init(&rpmpds[i]->pd, NULL, true);
1050 data->domains[i] = &rpmpds[i]->pd;
1053 /* Add subdomains */
1054 for (i = 0; i < num; i++) {
1058 if (rpmpds[i]->parent)
1059 pm_genpd_add_subdomain(rpmpds[i]->parent, &rpmpds[i]->pd);
1062 return of_genpd_add_provider_onecell(pdev->dev.of_node, data);
1065 static void rpmpd_sync_state(struct device *dev)
1067 const struct rpmpd_desc *desc = of_device_get_match_data(dev);
1068 struct rpmpd **rpmpds = desc->rpmpds;
1073 mutex_lock(&rpmpd_lock);
1074 for (i = 0; i < desc->num_pds; i++) {
1079 pd->state_synced = true;
1084 ret = rpmpd_aggregate_corner(pd);
1086 dev_err(dev, "failed to sync %s: %d\n", pd->pd.name, ret);
1088 mutex_unlock(&rpmpd_lock);
1091 static struct platform_driver rpmpd_driver = {
1093 .name = "qcom-rpmpd",
1094 .of_match_table = rpmpd_match_table,
1095 .suppress_bind_attrs = true,
1096 .sync_state = rpmpd_sync_state,
1098 .probe = rpmpd_probe,
1101 static int __init rpmpd_init(void)
1103 return platform_driver_register(&rpmpd_driver);
1105 core_initcall(rpmpd_init);
1107 MODULE_DESCRIPTION("Qualcomm Technologies, Inc. RPM Power Domain Driver");
1108 MODULE_LICENSE("GPL v2");