drivers/pmdomain/amlogic/meson-secure-pwrc.c

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2019 Amlogic, Inc.
   4  * Author: Jianxin Pan <jianxin.pan@amlogic.com>
   5  */
   6
   7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   8
   9 #include <linux/io.h>
  10 #include <linux/of.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/pm_domain.h>
  13 #include <dt-bindings/power/meson-a1-power.h>
  14 #include <dt-bindings/power/amlogic,c3-pwrc.h>
  15 #include <dt-bindings/power/meson-s4-power.h>
  16 #include <dt-bindings/power/amlogic,t7-pwrc.h>
  17 #include <linux/arm-smccc.h>
  18 #include <linux/firmware/meson/meson_sm.h>
  19 #include <linux/module.h>
  20
  21 #define PWRC_ON         1
  22 #define PWRC_OFF        0
  23 #define PWRC_NO_PARENT  UINT_MAX
  24
  25 struct meson_secure_pwrc_domain {
  26         struct generic_pm_domain base;
  27         unsigned int index;
  28         unsigned int parent;
  29         struct meson_secure_pwrc *pwrc;
  30 };
  31
  32 struct meson_secure_pwrc {
  33         struct meson_secure_pwrc_domain *domains;
  34         struct genpd_onecell_data xlate;
  35         struct meson_sm_firmware *fw;
  36 };
  37
  38 struct meson_secure_pwrc_domain_desc {
  39         unsigned int index;
  40         unsigned int parent;
  41         unsigned int flags;
  42         char *name;
  43         bool (*is_off)(struct meson_secure_pwrc_domain *pwrc_domain);
  44 };
  45
  46 struct meson_secure_pwrc_domain_data {
  47         unsigned int count;
  48         struct meson_secure_pwrc_domain_desc *domains;
  49 };
  50
  51 static bool pwrc_secure_is_off(struct meson_secure_pwrc_domain *pwrc_domain)
  52 {
  53         int is_off = 1;
  54
  55         if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off,
  56                           pwrc_domain->index, 0, 0, 0, 0) < 0)
  57                 pr_err("failed to get power domain status\n");
  58
  59         return is_off;
  60 }
  61
  62 static int meson_secure_pwrc_off(struct generic_pm_domain *domain)
  63 {
  64         int ret = 0;
  65         struct meson_secure_pwrc_domain *pwrc_domain =
  66                 container_of(domain, struct meson_secure_pwrc_domain, base);
  67
  68         if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
  69                           pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) {
  70                 pr_err("failed to set power domain off\n");
  71                 ret = -EINVAL;
  72         }
  73
  74         return ret;
  75 }
  76
  77 static int meson_secure_pwrc_on(struct generic_pm_domain *domain)
  78 {
  79         int ret = 0;
  80         struct meson_secure_pwrc_domain *pwrc_domain =
  81                 container_of(domain, struct meson_secure_pwrc_domain, base);
  82
  83         if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
  84                           pwrc_domain->index, PWRC_ON, 0, 0, 0) < 0) {
  85                 pr_err("failed to set power domain on\n");
  86                 ret = -EINVAL;
  87         }
  88
  89         return ret;
  90 }
  91
  92 #define SEC_PD(__name, __flag)                  \
  93 [PWRC_##__name##_ID] =                          \
  94 {                                               \
  95         .name = #__name,                        \
  96         .index = PWRC_##__name##_ID,            \
  97         .is_off = pwrc_secure_is_off,           \
  98         .flags = __flag,                        \
  99         .parent = PWRC_NO_PARENT,               \
 100 }
 101
 102 #define TOP_PD(__name, __flag, __parent)        \
 103 [PWRC_##__name##_ID] =                          \
 104 {                                               \
 105         .name = #__name,                        \
 106         .index = PWRC_##__name##_ID,            \
 107         .is_off = pwrc_secure_is_off,           \
 108         .flags = __flag,                        \
 109         .parent = __parent,                     \
 110 }
 111
 112 static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
 113         SEC_PD(DSPA,    0),
 114         SEC_PD(DSPB,    0),
 115         /* UART should keep working in ATF after suspend and before resume */
 116         SEC_PD(UART,    GENPD_FLAG_ALWAYS_ON),
 117         /* DMC is for DDR PHY ana/dig and DMC, and should be always on */
 118         SEC_PD(DMC,     GENPD_FLAG_ALWAYS_ON),
 119         SEC_PD(I2C,     0),
 120         SEC_PD(PSRAM,   0),
 121         SEC_PD(ACODEC,  0),
 122         SEC_PD(AUDIO,   0),
 123         SEC_PD(OTP,     0),
 124         SEC_PD(DMA,     GENPD_FLAG_ALWAYS_ON | GENPD_FLAG_IRQ_SAFE),
 125         SEC_PD(SD_EMMC, 0),
 126         SEC_PD(RAMA,    0),
 127         /* SRAMB is used as ATF runtime memory, and should be always on */
 128         SEC_PD(RAMB,    GENPD_FLAG_ALWAYS_ON),
 129         SEC_PD(IR,      0),
 130         SEC_PD(SPICC,   0),
 131         SEC_PD(SPIFC,   0),
 132         SEC_PD(USB,     0),
 133         /* NIC is for the Arm NIC-400 interconnect, and should be always on */
 134         SEC_PD(NIC,     GENPD_FLAG_ALWAYS_ON),
 135         SEC_PD(PDMIN,   0),
 136         SEC_PD(RSA,     0),
 137 };
 138
 139 static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = {
 140         SEC_PD(C3_NNA,          0),
 141         SEC_PD(C3_AUDIO,        0),
 142         SEC_PD(C3_SDIOA,        0),
 143         SEC_PD(C3_EMMC,         0),
 144         SEC_PD(C3_USB_COMB,     0),
 145         SEC_PD(C3_SDCARD,       0),
 146         /* ETH is for ethernet online wakeup, and should be always on */
 147         SEC_PD(C3_ETH,          GENPD_FLAG_ALWAYS_ON),
 148         SEC_PD(C3_GE2D,         0),
 149         SEC_PD(C3_CVE,          0),
 150         SEC_PD(C3_GDC_WRAP,     0),
 151         SEC_PD(C3_ISP_TOP,      0),
 152         SEC_PD(C3_MIPI_ISP_WRAP, 0),
 153         SEC_PD(C3_VCODEC,       0),
 154 };
 155
 156 static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
 157         SEC_PD(S4_DOS_HEVC,     0),
 158         SEC_PD(S4_DOS_VDEC,     0),
 159         SEC_PD(S4_VPU_HDMI,     0),
 160         SEC_PD(S4_USB_COMB,     0),
 161         SEC_PD(S4_GE2D,         0),
 162         /* ETH is for ethernet online wakeup, and should be always on */
 163         SEC_PD(S4_ETH,          GENPD_FLAG_ALWAYS_ON),
 164         SEC_PD(S4_DEMOD,        0),
 165         SEC_PD(S4_AUDIO,        0),
 166 };
 167
 168 static struct meson_secure_pwrc_domain_desc t7_pwrc_domains[] = {
 169         SEC_PD(T7_DSPA,         0),
 170         SEC_PD(T7_DSPB,         0),
 171         TOP_PD(T7_DOS_HCODEC,   0, PWRC_T7_NIC3_ID),
 172         TOP_PD(T7_DOS_HEVC,     0, PWRC_T7_NIC3_ID),
 173         TOP_PD(T7_DOS_VDEC,     0, PWRC_T7_NIC3_ID),
 174         TOP_PD(T7_DOS_WAVE,     0, PWRC_T7_NIC3_ID),
 175         SEC_PD(T7_VPU_HDMI,     0),
 176         SEC_PD(T7_USB_COMB,     0),
 177         SEC_PD(T7_PCIE,         0),
 178         TOP_PD(T7_GE2D,         0, PWRC_T7_NIC3_ID),
 179         /* SRAMA is used as ATF runtime memory, and should be always on */
 180         SEC_PD(T7_SRAMA,        GENPD_FLAG_ALWAYS_ON),
 181         /* SRAMB is used as ATF runtime memory, and should be always on */
 182         SEC_PD(T7_SRAMB,        GENPD_FLAG_ALWAYS_ON),
 183         SEC_PD(T7_HDMIRX,       0),
 184         SEC_PD(T7_VI_CLK1,      0),
 185         SEC_PD(T7_VI_CLK2,      0),
 186         /* ETH is for ethernet online wakeup, and should be always on */
 187         SEC_PD(T7_ETH,          GENPD_FLAG_ALWAYS_ON),
 188         SEC_PD(T7_ISP,          0),
 189         SEC_PD(T7_MIPI_ISP,     0),
 190         TOP_PD(T7_GDC,          0, PWRC_T7_NIC3_ID),
 191         TOP_PD(T7_DEWARP,       0, PWRC_T7_NIC3_ID),
 192         SEC_PD(T7_SDIO_A,       0),
 193         SEC_PD(T7_SDIO_B,       0),
 194         SEC_PD(T7_EMMC,         0),
 195         TOP_PD(T7_MALI_SC0,     0, PWRC_T7_NNA_TOP_ID),
 196         TOP_PD(T7_MALI_SC1,     0, PWRC_T7_NNA_TOP_ID),
 197         TOP_PD(T7_MALI_SC2,     0, PWRC_T7_NNA_TOP_ID),
 198         TOP_PD(T7_MALI_SC3,     0, PWRC_T7_NNA_TOP_ID),
 199         SEC_PD(T7_MALI_TOP,     0),
 200         TOP_PD(T7_NNA_CORE0,    0, PWRC_T7_NNA_TOP_ID),
 201         TOP_PD(T7_NNA_CORE1,    0, PWRC_T7_NNA_TOP_ID),
 202         TOP_PD(T7_NNA_CORE2,    0, PWRC_T7_NNA_TOP_ID),
 203         TOP_PD(T7_NNA_CORE3,    0, PWRC_T7_NNA_TOP_ID),
 204         SEC_PD(T7_NNA_TOP,      0),
 205         SEC_PD(T7_DDR0,         GENPD_FLAG_ALWAYS_ON),
 206         SEC_PD(T7_DDR1,         GENPD_FLAG_ALWAYS_ON),
 207         /* DMC0 is for DDR PHY ana/dig and DMC, and should be always on */
 208         SEC_PD(T7_DMC0,         GENPD_FLAG_ALWAYS_ON),
 209         /* DMC1 is for DDR PHY ana/dig and DMC, and should be always on */
 210         SEC_PD(T7_DMC1,         GENPD_FLAG_ALWAYS_ON),
 211         /* NOC is related to clk bus, and should be always on */
 212         SEC_PD(T7_NOC,          GENPD_FLAG_ALWAYS_ON),
 213         /* NIC is for the Arm NIC-400 interconnect, and should be always on */
 214         SEC_PD(T7_NIC2,         GENPD_FLAG_ALWAYS_ON),
 215         SEC_PD(T7_NIC3,         0),
 216         /* CPU accesses the interleave data to the ddr need cci, and should be always on */
 217         SEC_PD(T7_CCI,          GENPD_FLAG_ALWAYS_ON),
 218         SEC_PD(T7_MIPI_DSI0,    0),
 219         SEC_PD(T7_SPICC0,       0),
 220         SEC_PD(T7_SPICC1,       0),
 221         SEC_PD(T7_SPICC2,       0),
 222         SEC_PD(T7_SPICC3,       0),
 223         SEC_PD(T7_SPICC4,       0),
 224         SEC_PD(T7_SPICC5,       0),
 225         SEC_PD(T7_EDP0,         0),
 226         SEC_PD(T7_EDP1,         0),
 227         SEC_PD(T7_MIPI_DSI1,    0),
 228         SEC_PD(T7_AUDIO,        0),
 229 };
 230
 231 static int meson_secure_pwrc_probe(struct platform_device *pdev)
 232 {
 233         int i;
 234         struct device_node *sm_np;
 235         struct meson_secure_pwrc *pwrc;
 236         const struct meson_secure_pwrc_domain_data *match;
 237
 238         match = of_device_get_match_data(&pdev->dev);
 239         if (!match) {
 240                 dev_err(&pdev->dev, "failed to get match data\n");
 241                 return -ENODEV;
 242         }
 243
 244         sm_np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gxbb-sm");
 245         if (!sm_np) {
 246                 dev_err(&pdev->dev, "no secure-monitor node\n");
 247                 return -ENODEV;
 248         }
 249
 250         pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
 251         if (!pwrc) {
 252                 of_node_put(sm_np);
 253                 return -ENOMEM;
 254         }
 255
 256         pwrc->fw = meson_sm_get(sm_np);
 257         of_node_put(sm_np);
 258         if (!pwrc->fw)
 259                 return -EPROBE_DEFER;
 260
 261         pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
 262                                            sizeof(*pwrc->xlate.domains),
 263                                            GFP_KERNEL);
 264         if (!pwrc->xlate.domains)
 265                 return -ENOMEM;
 266
 267         pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
 268                                      sizeof(*pwrc->domains), GFP_KERNEL);
 269         if (!pwrc->domains)
 270                 return -ENOMEM;
 271
 272         pwrc->xlate.num_domains = match->count;
 273         platform_set_drvdata(pdev, pwrc);
 274
 275         for (i = 0 ; i < match->count ; ++i) {
 276                 struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
 277
 278                 if (!match->domains[i].name)
 279                         continue;
 280
 281                 dom->pwrc = pwrc;
 282                 dom->index = match->domains[i].index;
 283                 dom->parent = match->domains[i].parent;
 284                 dom->base.name = match->domains[i].name;
 285                 dom->base.flags = match->domains[i].flags;
 286                 dom->base.power_on = meson_secure_pwrc_on;
 287                 dom->base.power_off = meson_secure_pwrc_off;
 288
 289                 if (match->domains[i].is_off(dom) && (dom->base.flags & GENPD_FLAG_ALWAYS_ON))
 290                         meson_secure_pwrc_on(&dom->base);
 291
 292                 pm_genpd_init(&dom->base, NULL, match->domains[i].is_off(dom));
 293
 294                 pwrc->xlate.domains[i] = &dom->base;
 295         }
 296
 297         for (i = 0; i < match->count; i++) {
 298                 struct meson_secure_pwrc_domain *dom = pwrc->domains;
 299
 300                 if (!match->domains[i].name || match->domains[i].parent == PWRC_NO_PARENT)
 301                         continue;
 302
 303                 pm_genpd_add_subdomain(&dom[dom[i].parent].base, &dom[i].base);
 304         }
 305
 306         return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
 307 }
 308
 309 static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
 310         .domains = a1_pwrc_domains,
 311         .count = ARRAY_SIZE(a1_pwrc_domains),
 312 };
 313
 314 static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = {
 315         .domains = c3_pwrc_domains,
 316         .count = ARRAY_SIZE(c3_pwrc_domains),
 317 };
 318
 319 static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = {
 320         .domains = s4_pwrc_domains,
 321         .count = ARRAY_SIZE(s4_pwrc_domains),
 322 };
 323
 324 static struct meson_secure_pwrc_domain_data amlogic_secure_t7_pwrc_data = {
 325         .domains = t7_pwrc_domains,
 326         .count = ARRAY_SIZE(t7_pwrc_domains),
 327 };
 328
 329 static const struct of_device_id meson_secure_pwrc_match_table[] = {
 330         {
 331                 .compatible = "amlogic,meson-a1-pwrc",
 332                 .data = &meson_secure_a1_pwrc_data,
 333         },
 334         {
 335                 .compatible = "amlogic,c3-pwrc",
 336                 .data = &amlogic_secure_c3_pwrc_data,
 337         },
 338         {
 339                 .compatible = "amlogic,meson-s4-pwrc",
 340                 .data = &meson_secure_s4_pwrc_data,
 341         },
 342         {
 343                 .compatible = "amlogic,t7-pwrc",
 344                 .data = &amlogic_secure_t7_pwrc_data,
 345         },
 346         { /* sentinel */ }
 347 };
 348 MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);
 349
 350 static struct platform_driver meson_secure_pwrc_driver = {
 351         .probe = meson_secure_pwrc_probe,
 352         .driver = {
 353                 .name           = "meson_secure_pwrc",
 354                 .of_match_table = meson_secure_pwrc_match_table,
 355         },
 356 };
 357 module_platform_driver(meson_secure_pwrc_driver);
 358 MODULE_LICENSE("Dual MIT/GPL");